Mercurial > hg > truffle

annotate src/cpu/x86/vm/x86.ad @ 19157:3a2fce66fda0

Find changesets by keywords (author, files, the commit message), revision number or hash, or revset expression.
[SPARC] make CompareAndSwapOp side-effect free.
author Josef Eisl <josef.eisl@jku.at>
date Thu, 05 Feb 2015 13:16:09 +0100
parents 52b4284cb496
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
4761
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1 //
4950
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
2 // Copyright (c) 2011, 2012, Oracle and/or its affiliates. All rights reserved.
4761
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
3 // DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
4 //
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
5 // This code is free software; you can redistribute it and/or modify it
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
6 // under the terms of the GNU General Public License version 2 only, as
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
7 // published by the Free Software Foundation.
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
8 //
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
9 // This code is distributed in the hope that it will be useful, but WITHOUT
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
10 // ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
11 // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
12 // version 2 for more details (a copy is included in the LICENSE file that
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
13 // accompanied this code).
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
14 //
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
15 // You should have received a copy of the GNU General Public License version
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
16 // 2 along with this work; if not, write to the Free Software Foundation,
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
17 // Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
18 //
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
19 // Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
20 // or visit www.oracle.com if you need additional information or have any
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
21 // questions.
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
22 //
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
23 //
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
24
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
25 // X86 Common Architecture Description File
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
26
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
27 //----------REGISTER DEFINITION BLOCK------------------------------------------
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
28 // This information is used by the matcher and the register allocator to
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
29 // describe individual registers and classes of registers within the target
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
30 // archtecture.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
31
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
32 register %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
33 //----------Architecture Description Register Definitions----------------------
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
34 // General Registers
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
35 // "reg_def" name ( register save type, C convention save type,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
36 // ideal register type, encoding );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
37 // Register Save Types:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
38 //
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
39 // NS = No-Save: The register allocator assumes that these registers
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
40 // can be used without saving upon entry to the method, &
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
41 // that they do not need to be saved at call sites.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
42 //
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
43 // SOC = Save-On-Call: The register allocator assumes that these registers
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
44 // can be used without saving upon entry to the method,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
45 // but that they must be saved at call sites.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
46 //
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
47 // SOE = Save-On-Entry: The register allocator assumes that these registers
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
48 // must be saved before using them upon entry to the
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
49 // method, but they do not need to be saved at call
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
50 // sites.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
51 //
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
52 // AS = Always-Save: The register allocator assumes that these registers
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
53 // must be saved before using them upon entry to the
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
54 // method, & that they must be saved at call sites.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
55 //
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
56 // Ideal Register Type is used to determine how to save & restore a
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
57 // register. Op_RegI will get spilled with LoadI/StoreI, Op_RegP will get
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
58 // spilled with LoadP/StoreP. If the register supports both, use Op_RegI.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
59 //
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
60 // The encoding number is the actual bit-pattern placed into the opcodes.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
61
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
62 // XMM registers. 256-bit registers or 8 words each, labeled (a)-h.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
63 // Word a in each register holds a Float, words ab hold a Double.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
64 // The whole registers are used in SSE4.2 version intrinsics,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
65 // array copy stubs and superword operations (see UseSSE42Intrinsics,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
66 // UseXMMForArrayCopy and UseSuperword flags).
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
67 // XMM8-XMM15 must be encoded with REX (VEX for UseAVX).
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
68 // Linux ABI: No register preserved across function calls
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
69 // XMM0-XMM7 might hold parameters
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
70 // Windows ABI: XMM6-XMM15 preserved across function calls
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
71 // XMM0-XMM3 might hold parameters
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
72
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
73 reg_def XMM0 ( SOC, SOC, Op_RegF, 0, xmm0->as_VMReg());
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
74 reg_def XMM0b( SOC, SOC, Op_RegF, 0, xmm0->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
75 reg_def XMM0c( SOC, SOC, Op_RegF, 0, xmm0->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
76 reg_def XMM0d( SOC, SOC, Op_RegF, 0, xmm0->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
77 reg_def XMM0e( SOC, SOC, Op_RegF, 0, xmm0->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
78 reg_def XMM0f( SOC, SOC, Op_RegF, 0, xmm0->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
79 reg_def XMM0g( SOC, SOC, Op_RegF, 0, xmm0->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
80 reg_def XMM0h( SOC, SOC, Op_RegF, 0, xmm0->as_VMReg()->next(7));
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
81
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
82 reg_def XMM1 ( SOC, SOC, Op_RegF, 1, xmm1->as_VMReg());
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
83 reg_def XMM1b( SOC, SOC, Op_RegF, 1, xmm1->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
84 reg_def XMM1c( SOC, SOC, Op_RegF, 1, xmm1->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
85 reg_def XMM1d( SOC, SOC, Op_RegF, 1, xmm1->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
86 reg_def XMM1e( SOC, SOC, Op_RegF, 1, xmm1->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
87 reg_def XMM1f( SOC, SOC, Op_RegF, 1, xmm1->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
88 reg_def XMM1g( SOC, SOC, Op_RegF, 1, xmm1->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
89 reg_def XMM1h( SOC, SOC, Op_RegF, 1, xmm1->as_VMReg()->next(7));
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
90
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
91 reg_def XMM2 ( SOC, SOC, Op_RegF, 2, xmm2->as_VMReg());
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
92 reg_def XMM2b( SOC, SOC, Op_RegF, 2, xmm2->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
93 reg_def XMM2c( SOC, SOC, Op_RegF, 2, xmm2->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
94 reg_def XMM2d( SOC, SOC, Op_RegF, 2, xmm2->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
95 reg_def XMM2e( SOC, SOC, Op_RegF, 2, xmm2->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
96 reg_def XMM2f( SOC, SOC, Op_RegF, 2, xmm2->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
97 reg_def XMM2g( SOC, SOC, Op_RegF, 2, xmm2->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
98 reg_def XMM2h( SOC, SOC, Op_RegF, 2, xmm2->as_VMReg()->next(7));
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
99
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
100 reg_def XMM3 ( SOC, SOC, Op_RegF, 3, xmm3->as_VMReg());
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
101 reg_def XMM3b( SOC, SOC, Op_RegF, 3, xmm3->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
102 reg_def XMM3c( SOC, SOC, Op_RegF, 3, xmm3->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
103 reg_def XMM3d( SOC, SOC, Op_RegF, 3, xmm3->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
104 reg_def XMM3e( SOC, SOC, Op_RegF, 3, xmm3->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
105 reg_def XMM3f( SOC, SOC, Op_RegF, 3, xmm3->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
106 reg_def XMM3g( SOC, SOC, Op_RegF, 3, xmm3->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
107 reg_def XMM3h( SOC, SOC, Op_RegF, 3, xmm3->as_VMReg()->next(7));
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
108
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
109 reg_def XMM4 ( SOC, SOC, Op_RegF, 4, xmm4->as_VMReg());
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
110 reg_def XMM4b( SOC, SOC, Op_RegF, 4, xmm4->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
111 reg_def XMM4c( SOC, SOC, Op_RegF, 4, xmm4->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
112 reg_def XMM4d( SOC, SOC, Op_RegF, 4, xmm4->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
113 reg_def XMM4e( SOC, SOC, Op_RegF, 4, xmm4->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
114 reg_def XMM4f( SOC, SOC, Op_RegF, 4, xmm4->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
115 reg_def XMM4g( SOC, SOC, Op_RegF, 4, xmm4->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
116 reg_def XMM4h( SOC, SOC, Op_RegF, 4, xmm4->as_VMReg()->next(7));
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
117
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
118 reg_def XMM5 ( SOC, SOC, Op_RegF, 5, xmm5->as_VMReg());
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
119 reg_def XMM5b( SOC, SOC, Op_RegF, 5, xmm5->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
120 reg_def XMM5c( SOC, SOC, Op_RegF, 5, xmm5->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
121 reg_def XMM5d( SOC, SOC, Op_RegF, 5, xmm5->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
122 reg_def XMM5e( SOC, SOC, Op_RegF, 5, xmm5->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
123 reg_def XMM5f( SOC, SOC, Op_RegF, 5, xmm5->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
124 reg_def XMM5g( SOC, SOC, Op_RegF, 5, xmm5->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
125 reg_def XMM5h( SOC, SOC, Op_RegF, 5, xmm5->as_VMReg()->next(7));
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
126
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
127 #ifdef _WIN64
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
128
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
129 reg_def XMM6 ( SOC, SOE, Op_RegF, 6, xmm6->as_VMReg());
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
130 reg_def XMM6b( SOC, SOE, Op_RegF, 6, xmm6->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
131 reg_def XMM6c( SOC, SOE, Op_RegF, 6, xmm6->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
132 reg_def XMM6d( SOC, SOE, Op_RegF, 6, xmm6->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
133 reg_def XMM6e( SOC, SOE, Op_RegF, 6, xmm6->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
134 reg_def XMM6f( SOC, SOE, Op_RegF, 6, xmm6->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
135 reg_def XMM6g( SOC, SOE, Op_RegF, 6, xmm6->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
136 reg_def XMM6h( SOC, SOE, Op_RegF, 6, xmm6->as_VMReg()->next(7));
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
137
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
138 reg_def XMM7 ( SOC, SOE, Op_RegF, 7, xmm7->as_VMReg());
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
139 reg_def XMM7b( SOC, SOE, Op_RegF, 7, xmm7->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
140 reg_def XMM7c( SOC, SOE, Op_RegF, 7, xmm7->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
141 reg_def XMM7d( SOC, SOE, Op_RegF, 7, xmm7->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
142 reg_def XMM7e( SOC, SOE, Op_RegF, 7, xmm7->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
143 reg_def XMM7f( SOC, SOE, Op_RegF, 7, xmm7->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
144 reg_def XMM7g( SOC, SOE, Op_RegF, 7, xmm7->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
145 reg_def XMM7h( SOC, SOE, Op_RegF, 7, xmm7->as_VMReg()->next(7));
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
146
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
147 reg_def XMM8 ( SOC, SOE, Op_RegF, 8, xmm8->as_VMReg());
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
148 reg_def XMM8b( SOC, SOE, Op_RegF, 8, xmm8->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
149 reg_def XMM8c( SOC, SOE, Op_RegF, 8, xmm8->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
150 reg_def XMM8d( SOC, SOE, Op_RegF, 8, xmm8->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
151 reg_def XMM8e( SOC, SOE, Op_RegF, 8, xmm8->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
152 reg_def XMM8f( SOC, SOE, Op_RegF, 8, xmm8->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
153 reg_def XMM8g( SOC, SOE, Op_RegF, 8, xmm8->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
154 reg_def XMM8h( SOC, SOE, Op_RegF, 8, xmm8->as_VMReg()->next(7));
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
155
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
156 reg_def XMM9 ( SOC, SOE, Op_RegF, 9, xmm9->as_VMReg());
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
157 reg_def XMM9b( SOC, SOE, Op_RegF, 9, xmm9->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
158 reg_def XMM9c( SOC, SOE, Op_RegF, 9, xmm9->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
159 reg_def XMM9d( SOC, SOE, Op_RegF, 9, xmm9->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
160 reg_def XMM9e( SOC, SOE, Op_RegF, 9, xmm9->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
161 reg_def XMM9f( SOC, SOE, Op_RegF, 9, xmm9->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
162 reg_def XMM9g( SOC, SOE, Op_RegF, 9, xmm9->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
163 reg_def XMM9h( SOC, SOE, Op_RegF, 9, xmm9->as_VMReg()->next(7));
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
164
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
165 reg_def XMM10 ( SOC, SOE, Op_RegF, 10, xmm10->as_VMReg());
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
166 reg_def XMM10b( SOC, SOE, Op_RegF, 10, xmm10->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
167 reg_def XMM10c( SOC, SOE, Op_RegF, 10, xmm10->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
168 reg_def XMM10d( SOC, SOE, Op_RegF, 10, xmm10->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
169 reg_def XMM10e( SOC, SOE, Op_RegF, 10, xmm10->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
170 reg_def XMM10f( SOC, SOE, Op_RegF, 10, xmm10->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
171 reg_def XMM10g( SOC, SOE, Op_RegF, 10, xmm10->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
172 reg_def XMM10h( SOC, SOE, Op_RegF, 10, xmm10->as_VMReg()->next(7));
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
173
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
174 reg_def XMM11 ( SOC, SOE, Op_RegF, 11, xmm11->as_VMReg());
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
175 reg_def XMM11b( SOC, SOE, Op_RegF, 11, xmm11->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
176 reg_def XMM11c( SOC, SOE, Op_RegF, 11, xmm11->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
177 reg_def XMM11d( SOC, SOE, Op_RegF, 11, xmm11->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
178 reg_def XMM11e( SOC, SOE, Op_RegF, 11, xmm11->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
179 reg_def XMM11f( SOC, SOE, Op_RegF, 11, xmm11->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
180 reg_def XMM11g( SOC, SOE, Op_RegF, 11, xmm11->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
181 reg_def XMM11h( SOC, SOE, Op_RegF, 11, xmm11->as_VMReg()->next(7));
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
182
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
183 reg_def XMM12 ( SOC, SOE, Op_RegF, 12, xmm12->as_VMReg());
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
184 reg_def XMM12b( SOC, SOE, Op_RegF, 12, xmm12->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
185 reg_def XMM12c( SOC, SOE, Op_RegF, 12, xmm12->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
186 reg_def XMM12d( SOC, SOE, Op_RegF, 12, xmm12->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
187 reg_def XMM12e( SOC, SOE, Op_RegF, 12, xmm12->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
188 reg_def XMM12f( SOC, SOE, Op_RegF, 12, xmm12->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
189 reg_def XMM12g( SOC, SOE, Op_RegF, 12, xmm12->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
190 reg_def XMM12h( SOC, SOE, Op_RegF, 12, xmm12->as_VMReg()->next(7));
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
191
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
192 reg_def XMM13 ( SOC, SOE, Op_RegF, 13, xmm13->as_VMReg());
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
193 reg_def XMM13b( SOC, SOE, Op_RegF, 13, xmm13->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
194 reg_def XMM13c( SOC, SOE, Op_RegF, 13, xmm13->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
195 reg_def XMM13d( SOC, SOE, Op_RegF, 13, xmm13->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
196 reg_def XMM13e( SOC, SOE, Op_RegF, 13, xmm13->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
197 reg_def XMM13f( SOC, SOE, Op_RegF, 13, xmm13->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
198 reg_def XMM13g( SOC, SOE, Op_RegF, 13, xmm13->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
199 reg_def XMM13h( SOC, SOE, Op_RegF, 13, xmm13->as_VMReg()->next(7));
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
200
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
201 reg_def XMM14 ( SOC, SOE, Op_RegF, 14, xmm14->as_VMReg());
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
202 reg_def XMM14b( SOC, SOE, Op_RegF, 14, xmm14->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
203 reg_def XMM14c( SOC, SOE, Op_RegF, 14, xmm14->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
204 reg_def XMM14d( SOC, SOE, Op_RegF, 14, xmm14->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
205 reg_def XMM14e( SOC, SOE, Op_RegF, 14, xmm14->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
206 reg_def XMM14f( SOC, SOE, Op_RegF, 14, xmm14->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
207 reg_def XMM14g( SOC, SOE, Op_RegF, 14, xmm14->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
208 reg_def XMM14h( SOC, SOE, Op_RegF, 14, xmm14->as_VMReg()->next(7));
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
209
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
210 reg_def XMM15 ( SOC, SOE, Op_RegF, 15, xmm15->as_VMReg());
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
211 reg_def XMM15b( SOC, SOE, Op_RegF, 15, xmm15->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
212 reg_def XMM15c( SOC, SOE, Op_RegF, 15, xmm15->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
213 reg_def XMM15d( SOC, SOE, Op_RegF, 15, xmm15->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
214 reg_def XMM15e( SOC, SOE, Op_RegF, 15, xmm15->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
215 reg_def XMM15f( SOC, SOE, Op_RegF, 15, xmm15->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
216 reg_def XMM15g( SOC, SOE, Op_RegF, 15, xmm15->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
217 reg_def XMM15h( SOC, SOE, Op_RegF, 15, xmm15->as_VMReg()->next(7));
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
218
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
219 #else // _WIN64
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
220
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
221 reg_def XMM6 ( SOC, SOC, Op_RegF, 6, xmm6->as_VMReg());
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
222 reg_def XMM6b( SOC, SOC, Op_RegF, 6, xmm6->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
223 reg_def XMM6c( SOC, SOC, Op_RegF, 6, xmm6->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
224 reg_def XMM6d( SOC, SOC, Op_RegF, 6, xmm6->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
225 reg_def XMM6e( SOC, SOC, Op_RegF, 6, xmm6->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
226 reg_def XMM6f( SOC, SOC, Op_RegF, 6, xmm6->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
227 reg_def XMM6g( SOC, SOC, Op_RegF, 6, xmm6->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
228 reg_def XMM6h( SOC, SOC, Op_RegF, 6, xmm6->as_VMReg()->next(7));
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
229
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
230 reg_def XMM7 ( SOC, SOC, Op_RegF, 7, xmm7->as_VMReg());
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
231 reg_def XMM7b( SOC, SOC, Op_RegF, 7, xmm7->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
232 reg_def XMM7c( SOC, SOC, Op_RegF, 7, xmm7->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
233 reg_def XMM7d( SOC, SOC, Op_RegF, 7, xmm7->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
234 reg_def XMM7e( SOC, SOC, Op_RegF, 7, xmm7->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
235 reg_def XMM7f( SOC, SOC, Op_RegF, 7, xmm7->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
236 reg_def XMM7g( SOC, SOC, Op_RegF, 7, xmm7->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
237 reg_def XMM7h( SOC, SOC, Op_RegF, 7, xmm7->as_VMReg()->next(7));
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
238
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
239 #ifdef _LP64
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
240
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
241 reg_def XMM8 ( SOC, SOC, Op_RegF, 8, xmm8->as_VMReg());
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
242 reg_def XMM8b( SOC, SOC, Op_RegF, 8, xmm8->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
243 reg_def XMM8c( SOC, SOC, Op_RegF, 8, xmm8->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
244 reg_def XMM8d( SOC, SOC, Op_RegF, 8, xmm8->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
245 reg_def XMM8e( SOC, SOC, Op_RegF, 8, xmm8->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
246 reg_def XMM8f( SOC, SOC, Op_RegF, 8, xmm8->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
247 reg_def XMM8g( SOC, SOC, Op_RegF, 8, xmm8->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
248 reg_def XMM8h( SOC, SOC, Op_RegF, 8, xmm8->as_VMReg()->next(7));
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
249
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
250 reg_def XMM9 ( SOC, SOC, Op_RegF, 9, xmm9->as_VMReg());
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
251 reg_def XMM9b( SOC, SOC, Op_RegF, 9, xmm9->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
252 reg_def XMM9c( SOC, SOC, Op_RegF, 9, xmm9->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
253 reg_def XMM9d( SOC, SOC, Op_RegF, 9, xmm9->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
254 reg_def XMM9e( SOC, SOC, Op_RegF, 9, xmm9->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
255 reg_def XMM9f( SOC, SOC, Op_RegF, 9, xmm9->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
256 reg_def XMM9g( SOC, SOC, Op_RegF, 9, xmm9->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
257 reg_def XMM9h( SOC, SOC, Op_RegF, 9, xmm9->as_VMReg()->next(7));
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
258
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
259 reg_def XMM10 ( SOC, SOC, Op_RegF, 10, xmm10->as_VMReg());
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
260 reg_def XMM10b( SOC, SOC, Op_RegF, 10, xmm10->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
261 reg_def XMM10c( SOC, SOC, Op_RegF, 10, xmm10->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
262 reg_def XMM10d( SOC, SOC, Op_RegF, 10, xmm10->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
263 reg_def XMM10e( SOC, SOC, Op_RegF, 10, xmm10->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
264 reg_def XMM10f( SOC, SOC, Op_RegF, 10, xmm10->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
265 reg_def XMM10g( SOC, SOC, Op_RegF, 10, xmm10->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
266 reg_def XMM10h( SOC, SOC, Op_RegF, 10, xmm10->as_VMReg()->next(7));
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
267
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
268 reg_def XMM11 ( SOC, SOC, Op_RegF, 11, xmm11->as_VMReg());
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
269 reg_def XMM11b( SOC, SOC, Op_RegF, 11, xmm11->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
270 reg_def XMM11c( SOC, SOC, Op_RegF, 11, xmm11->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
271 reg_def XMM11d( SOC, SOC, Op_RegF, 11, xmm11->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
272 reg_def XMM11e( SOC, SOC, Op_RegF, 11, xmm11->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
273 reg_def XMM11f( SOC, SOC, Op_RegF, 11, xmm11->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
274 reg_def XMM11g( SOC, SOC, Op_RegF, 11, xmm11->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
275 reg_def XMM11h( SOC, SOC, Op_RegF, 11, xmm11->as_VMReg()->next(7));
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
276
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
277 reg_def XMM12 ( SOC, SOC, Op_RegF, 12, xmm12->as_VMReg());
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
278 reg_def XMM12b( SOC, SOC, Op_RegF, 12, xmm12->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
279 reg_def XMM12c( SOC, SOC, Op_RegF, 12, xmm12->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
280 reg_def XMM12d( SOC, SOC, Op_RegF, 12, xmm12->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
281 reg_def XMM12e( SOC, SOC, Op_RegF, 12, xmm12->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
282 reg_def XMM12f( SOC, SOC, Op_RegF, 12, xmm12->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
283 reg_def XMM12g( SOC, SOC, Op_RegF, 12, xmm12->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
284 reg_def XMM12h( SOC, SOC, Op_RegF, 12, xmm12->as_VMReg()->next(7));
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
285
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
286 reg_def XMM13 ( SOC, SOC, Op_RegF, 13, xmm13->as_VMReg());
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
287 reg_def XMM13b( SOC, SOC, Op_RegF, 13, xmm13->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
288 reg_def XMM13c( SOC, SOC, Op_RegF, 13, xmm13->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
289 reg_def XMM13d( SOC, SOC, Op_RegF, 13, xmm13->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
290 reg_def XMM13e( SOC, SOC, Op_RegF, 13, xmm13->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
291 reg_def XMM13f( SOC, SOC, Op_RegF, 13, xmm13->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
292 reg_def XMM13g( SOC, SOC, Op_RegF, 13, xmm13->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
293 reg_def XMM13h( SOC, SOC, Op_RegF, 13, xmm13->as_VMReg()->next(7));
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
294
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
295 reg_def XMM14 ( SOC, SOC, Op_RegF, 14, xmm14->as_VMReg());
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
296 reg_def XMM14b( SOC, SOC, Op_RegF, 14, xmm14->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
297 reg_def XMM14c( SOC, SOC, Op_RegF, 14, xmm14->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
298 reg_def XMM14d( SOC, SOC, Op_RegF, 14, xmm14->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
299 reg_def XMM14e( SOC, SOC, Op_RegF, 14, xmm14->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
300 reg_def XMM14f( SOC, SOC, Op_RegF, 14, xmm14->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
301 reg_def XMM14g( SOC, SOC, Op_RegF, 14, xmm14->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
302 reg_def XMM14h( SOC, SOC, Op_RegF, 14, xmm14->as_VMReg()->next(7));
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
303
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
304 reg_def XMM15 ( SOC, SOC, Op_RegF, 15, xmm15->as_VMReg());
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
305 reg_def XMM15b( SOC, SOC, Op_RegF, 15, xmm15->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
306 reg_def XMM15c( SOC, SOC, Op_RegF, 15, xmm15->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
307 reg_def XMM15d( SOC, SOC, Op_RegF, 15, xmm15->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
308 reg_def XMM15e( SOC, SOC, Op_RegF, 15, xmm15->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
309 reg_def XMM15f( SOC, SOC, Op_RegF, 15, xmm15->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
310 reg_def XMM15g( SOC, SOC, Op_RegF, 15, xmm15->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
311 reg_def XMM15h( SOC, SOC, Op_RegF, 15, xmm15->as_VMReg()->next(7));
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
312
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
313 #endif // _LP64
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
314
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
315 #endif // _WIN64
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
316
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
317 #ifdef _LP64
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
318 reg_def RFLAGS(SOC, SOC, 0, 16, VMRegImpl::Bad());
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
319 #else
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
320 reg_def RFLAGS(SOC, SOC, 0, 8, VMRegImpl::Bad());
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
321 #endif // _LP64
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
322
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
323 alloc_class chunk1(XMM0, XMM0b, XMM0c, XMM0d, XMM0e, XMM0f, XMM0g, XMM0h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
324 XMM1, XMM1b, XMM1c, XMM1d, XMM1e, XMM1f, XMM1g, XMM1h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
325 XMM2, XMM2b, XMM2c, XMM2d, XMM2e, XMM2f, XMM2g, XMM2h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
326 XMM3, XMM3b, XMM3c, XMM3d, XMM3e, XMM3f, XMM3g, XMM3h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
327 XMM4, XMM4b, XMM4c, XMM4d, XMM4e, XMM4f, XMM4g, XMM4h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
328 XMM5, XMM5b, XMM5c, XMM5d, XMM5e, XMM5f, XMM5g, XMM5h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
329 XMM6, XMM6b, XMM6c, XMM6d, XMM6e, XMM6f, XMM6g, XMM6h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
330 XMM7, XMM7b, XMM7c, XMM7d, XMM7e, XMM7f, XMM7g, XMM7h
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
331 #ifdef _LP64
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
332 ,XMM8, XMM8b, XMM8c, XMM8d, XMM8e, XMM8f, XMM8g, XMM8h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
333 XMM9, XMM9b, XMM9c, XMM9d, XMM9e, XMM9f, XMM9g, XMM9h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
334 XMM10, XMM10b, XMM10c, XMM10d, XMM10e, XMM10f, XMM10g, XMM10h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
335 XMM11, XMM11b, XMM11c, XMM11d, XMM11e, XMM11f, XMM11g, XMM11h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
336 XMM12, XMM12b, XMM12c, XMM12d, XMM12e, XMM12f, XMM12g, XMM12h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
337 XMM13, XMM13b, XMM13c, XMM13d, XMM13e, XMM13f, XMM13g, XMM13h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
338 XMM14, XMM14b, XMM14c, XMM14d, XMM14e, XMM14f, XMM14g, XMM14h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
339 XMM15, XMM15b, XMM15c, XMM15d, XMM15e, XMM15f, XMM15g, XMM15h
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
340 #endif
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
341 );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
342
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
343 // flags allocation class should be last.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
344 alloc_class chunk2(RFLAGS);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
345
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
346 // Singleton class for condition codes
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
347 reg_class int_flags(RFLAGS);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
348
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
349 // Class for all float registers
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
350 reg_class float_reg(XMM0,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
351 XMM1,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
352 XMM2,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
353 XMM3,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
354 XMM4,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
355 XMM5,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
356 XMM6,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
357 XMM7
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
358 #ifdef _LP64
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
359 ,XMM8,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
360 XMM9,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
361 XMM10,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
362 XMM11,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
363 XMM12,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
364 XMM13,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
365 XMM14,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
366 XMM15
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
367 #endif
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
368 );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
369
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
370 // Class for all double registers
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
371 reg_class double_reg(XMM0, XMM0b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
372 XMM1, XMM1b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
373 XMM2, XMM2b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
374 XMM3, XMM3b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
375 XMM4, XMM4b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
376 XMM5, XMM5b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
377 XMM6, XMM6b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
378 XMM7, XMM7b
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
379 #ifdef _LP64
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
380 ,XMM8, XMM8b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
381 XMM9, XMM9b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
382 XMM10, XMM10b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
383 XMM11, XMM11b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
384 XMM12, XMM12b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
385 XMM13, XMM13b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
386 XMM14, XMM14b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
387 XMM15, XMM15b
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
388 #endif
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
389 );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
390
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
391 // Class for all 32bit vector registers
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
392 reg_class vectors_reg(XMM0,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
393 XMM1,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
394 XMM2,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
395 XMM3,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
396 XMM4,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
397 XMM5,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
398 XMM6,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
399 XMM7
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
400 #ifdef _LP64
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
401 ,XMM8,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
402 XMM9,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
403 XMM10,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
404 XMM11,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
405 XMM12,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
406 XMM13,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
407 XMM14,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
408 XMM15
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
409 #endif
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
410 );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
411
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
412 // Class for all 64bit vector registers
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
413 reg_class vectord_reg(XMM0, XMM0b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
414 XMM1, XMM1b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
415 XMM2, XMM2b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
416 XMM3, XMM3b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
417 XMM4, XMM4b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
418 XMM5, XMM5b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
419 XMM6, XMM6b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
420 XMM7, XMM7b
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
421 #ifdef _LP64
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
422 ,XMM8, XMM8b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
423 XMM9, XMM9b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
424 XMM10, XMM10b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
425 XMM11, XMM11b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
426 XMM12, XMM12b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
427 XMM13, XMM13b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
428 XMM14, XMM14b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
429 XMM15, XMM15b
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
430 #endif
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
431 );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
432
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
433 // Class for all 128bit vector registers
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
434 reg_class vectorx_reg(XMM0, XMM0b, XMM0c, XMM0d,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
435 XMM1, XMM1b, XMM1c, XMM1d,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
436 XMM2, XMM2b, XMM2c, XMM2d,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
437 XMM3, XMM3b, XMM3c, XMM3d,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
438 XMM4, XMM4b, XMM4c, XMM4d,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
439 XMM5, XMM5b, XMM5c, XMM5d,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
440 XMM6, XMM6b, XMM6c, XMM6d,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
441 XMM7, XMM7b, XMM7c, XMM7d
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
442 #ifdef _LP64
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
443 ,XMM8, XMM8b, XMM8c, XMM8d,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
444 XMM9, XMM9b, XMM9c, XMM9d,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
445 XMM10, XMM10b, XMM10c, XMM10d,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
446 XMM11, XMM11b, XMM11c, XMM11d,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
447 XMM12, XMM12b, XMM12c, XMM12d,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
448 XMM13, XMM13b, XMM13c, XMM13d,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
449 XMM14, XMM14b, XMM14c, XMM14d,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
450 XMM15, XMM15b, XMM15c, XMM15d
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
451 #endif
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
452 );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
453
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
454 // Class for all 256bit vector registers
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
455 reg_class vectory_reg(XMM0, XMM0b, XMM0c, XMM0d, XMM0e, XMM0f, XMM0g, XMM0h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
456 XMM1, XMM1b, XMM1c, XMM1d, XMM1e, XMM1f, XMM1g, XMM1h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
457 XMM2, XMM2b, XMM2c, XMM2d, XMM2e, XMM2f, XMM2g, XMM2h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
458 XMM3, XMM3b, XMM3c, XMM3d, XMM3e, XMM3f, XMM3g, XMM3h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
459 XMM4, XMM4b, XMM4c, XMM4d, XMM4e, XMM4f, XMM4g, XMM4h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
460 XMM5, XMM5b, XMM5c, XMM5d, XMM5e, XMM5f, XMM5g, XMM5h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
461 XMM6, XMM6b, XMM6c, XMM6d, XMM6e, XMM6f, XMM6g, XMM6h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
462 XMM7, XMM7b, XMM7c, XMM7d, XMM7e, XMM7f, XMM7g, XMM7h
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
463 #ifdef _LP64
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
464 ,XMM8, XMM8b, XMM8c, XMM8d, XMM8e, XMM8f, XMM8g, XMM8h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
465 XMM9, XMM9b, XMM9c, XMM9d, XMM9e, XMM9f, XMM9g, XMM9h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
466 XMM10, XMM10b, XMM10c, XMM10d, XMM10e, XMM10f, XMM10g, XMM10h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
467 XMM11, XMM11b, XMM11c, XMM11d, XMM11e, XMM11f, XMM11g, XMM11h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
468 XMM12, XMM12b, XMM12c, XMM12d, XMM12e, XMM12f, XMM12g, XMM12h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
469 XMM13, XMM13b, XMM13c, XMM13d, XMM13e, XMM13f, XMM13g, XMM13h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
470 XMM14, XMM14b, XMM14c, XMM14d, XMM14e, XMM14f, XMM14g, XMM14h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
471 XMM15, XMM15b, XMM15c, XMM15d, XMM15e, XMM15f, XMM15g, XMM15h
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
472 #endif
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
473 );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
474
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
475 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
476
17809
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
477
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
478 //----------SOURCE BLOCK-------------------------------------------------------
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
479 // This is a block of C++ code which provides values, functions, and
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
480 // definitions necessary in the rest of the architecture description
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
481
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
482 source_hpp %{
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
483 // Header information of the source block.
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
484 // Method declarations/definitions which are used outside
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
485 // the ad-scope can conveniently be defined here.
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
486 //
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
487 // To keep related declarations/definitions/uses close together,
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
488 // we switch between source %{ }% and source_hpp %{ }% freely as needed.
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
489
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
490 class CallStubImpl {
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
491
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
492 //--------------------------------------------------------------
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
493 //---< Used for optimization in Compile::shorten_branches >---
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
494 //--------------------------------------------------------------
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
495
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
496 public:
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
497 // Size of call trampoline stub.
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
498 static uint size_call_trampoline() {
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
499 return 0; // no call trampolines on this platform
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
500 }
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
501
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
502 // number of relocations needed by a call trampoline stub
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
503 static uint reloc_call_trampoline() {
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
504 return 0; // no call trampolines on this platform
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
505 }
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
506 };
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
507
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
508 class HandlerImpl {
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
509
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
510 public:
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
511
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
512 static int emit_exception_handler(CodeBuffer &cbuf);
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
513 static int emit_deopt_handler(CodeBuffer& cbuf);
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
514
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
515 static uint size_exception_handler() {
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
516 // NativeCall instruction size is the same as NativeJump.
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
517 // exception handler starts out as jump and can be patched to
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
518 // a call be deoptimization. (4932387)
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
519 // Note that this value is also credited (in output.cpp) to
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
520 // the size of the code section.
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
521 return NativeJump::instruction_size;
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
522 }
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
523
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
524 #ifdef _LP64
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
525 static uint size_deopt_handler() {
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
526 // three 5 byte instructions
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
527 return 15;
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
528 }
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
529 #else
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
530 static uint size_deopt_handler() {
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
531 // NativeCall instruction size is the same as NativeJump.
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
532 // exception handler starts out as jump and can be patched to
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
533 // a call be deoptimization. (4932387)
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
534 // Note that this value is also credited (in output.cpp) to
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
535 // the size of the code section.
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
536 return 5 + NativeJump::instruction_size; // pushl(); jmp;
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
537 }
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
538 #endif
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
539 };
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
540
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
541 %} // end source_hpp
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
542
4761
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
543 source %{
17809
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
544
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
545 // Emit exception handler code.
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
546 // Stuff framesize into a register and call a VM stub routine.
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
547 int HandlerImpl::emit_exception_handler(CodeBuffer& cbuf) {
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
548
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
549 // Note that the code buffer's insts_mark is always relative to insts.
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
550 // That's why we must use the macroassembler to generate a handler.
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
551 MacroAssembler _masm(&cbuf);
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
552 address base = __ start_a_stub(size_exception_handler());
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
553 if (base == NULL) return 0; // CodeBuffer::expand failed
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
554 int offset = __ offset();
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
555 __ jump(RuntimeAddress(OptoRuntime::exception_blob()->entry_point()));
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
556 assert(__ offset() - offset <= (int) size_exception_handler(), "overflow");
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
557 __ end_a_stub();
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
558 return offset;
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
559 }
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
560
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
561 // Emit deopt handler code.
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
562 int HandlerImpl::emit_deopt_handler(CodeBuffer& cbuf) {
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
563
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
564 // Note that the code buffer's insts_mark is always relative to insts.
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
565 // That's why we must use the macroassembler to generate a handler.
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
566 MacroAssembler _masm(&cbuf);
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
567 address base = __ start_a_stub(size_deopt_handler());
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
568 if (base == NULL) return 0; // CodeBuffer::expand failed
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
569 int offset = __ offset();
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
570
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
571 #ifdef _LP64
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
572 address the_pc = (address) __ pc();
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
573 Label next;
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
574 // push a "the_pc" on the stack without destroying any registers
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
575 // as they all may be live.
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
576
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
577 // push address of "next"
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
578 __ call(next, relocInfo::none); // reloc none is fine since it is a disp32
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
579 __ bind(next);
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
580 // adjust it so it matches "the_pc"
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
581 __ subptr(Address(rsp, 0), __ offset() - offset);
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
582 #else
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
583 InternalAddress here(__ pc());
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
584 __ pushptr(here.addr());
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
585 #endif
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
586
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
587 __ jump(RuntimeAddress(SharedRuntime::deopt_blob()->unpack()));
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
588 assert(__ offset() - offset <= (int) size_deopt_handler(), "overflow");
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
589 __ end_a_stub();
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
590 return offset;
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
591 }
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
592
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
593
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
594 //=============================================================================
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
595
4761
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
596 // Float masks come from different places depending on platform.
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
597 #ifdef _LP64
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
598 static address float_signmask() { return StubRoutines::x86::float_sign_mask(); }
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
599 static address float_signflip() { return StubRoutines::x86::float_sign_flip(); }
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
600 static address double_signmask() { return StubRoutines::x86::double_sign_mask(); }
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
601 static address double_signflip() { return StubRoutines::x86::double_sign_flip(); }
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
602 #else
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
603 static address float_signmask() { return (address)float_signmask_pool; }
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
604 static address float_signflip() { return (address)float_signflip_pool; }
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
605 static address double_signmask() { return (address)double_signmask_pool; }
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
606 static address double_signflip() { return (address)double_signflip_pool; }
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
607 #endif
4950
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
608
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
609
6614
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
610 const bool Matcher::match_rule_supported(int opcode) {
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
611 if (!has_match_rule(opcode))
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
612 return false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
613
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
614 switch (opcode) {
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
615 case Op_PopCountI:
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
616 case Op_PopCountL:
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
617 if (!UsePopCountInstruction)
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
618 return false;
6792
137868b7aa6f 7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents: 6725
diff changeset
619 break;
6614
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
620 case Op_MulVI:
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
621 if ((UseSSE < 4) && (UseAVX < 1)) // only with SSE4_1 or AVX
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
622 return false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
623 break;
6795
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6792
diff changeset
624 case Op_CompareAndSwapL:
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6792
diff changeset
625 #ifdef _LP64
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6792
diff changeset
626 case Op_CompareAndSwapP:
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6792
diff changeset
627 #endif
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6792
diff changeset
628 if (!VM_Version::supports_cx8())
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6792
diff changeset
629 return false;
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6792
diff changeset
630 break;
6614
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
631 }
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
632
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
633 return true; // Per default match rules are supported.
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
634 }
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
635
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
636 // Max vector size in bytes. 0 if not supported.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
637 const int Matcher::vector_width_in_bytes(BasicType bt) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
638 assert(is_java_primitive(bt), "only primitive type vectors");
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
639 if (UseSSE < 2) return 0;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
640 // SSE2 supports 128bit vectors for all types.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
641 // AVX2 supports 256bit vectors for all types.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
642 int size = (UseAVX > 1) ? 32 : 16;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
643 // AVX1 supports 256bit vectors only for FLOAT and DOUBLE.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
644 if (UseAVX > 0 && (bt == T_FLOAT || bt == T_DOUBLE))
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
645 size = 32;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
646 // Use flag to limit vector size.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
647 size = MIN2(size,(int)MaxVectorSize);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
648 // Minimum 2 values in vector (or 4 for bytes).
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
649 switch (bt) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
650 case T_DOUBLE:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
651 case T_LONG:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
652 if (size < 16) return 0;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
653 case T_FLOAT:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
654 case T_INT:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
655 if (size < 8) return 0;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
656 case T_BOOLEAN:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
657 case T_BYTE:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
658 case T_CHAR:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
659 case T_SHORT:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
660 if (size < 4) return 0;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
661 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
662 default:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
663 ShouldNotReachHere();
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
664 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
665 return size;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
666 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
667
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
668 // Limits on vector size (number of elements) loaded into vector.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
669 const int Matcher::max_vector_size(const BasicType bt) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
670 return vector_width_in_bytes(bt)/type2aelembytes(bt);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
671 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
672 const int Matcher::min_vector_size(const BasicType bt) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
673 int max_size = max_vector_size(bt);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
674 // Min size which can be loaded into vector is 4 bytes.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
675 int size = (type2aelembytes(bt) == 1) ? 4 : 2;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
676 return MIN2(size,max_size);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
677 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
678
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
679 // Vector ideal reg corresponding to specidied size in bytes
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
680 const int Matcher::vector_ideal_reg(int size) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
681 assert(MaxVectorSize >= size, "");
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
682 switch(size) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
683 case 4: return Op_VecS;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
684 case 8: return Op_VecD;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
685 case 16: return Op_VecX;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
686 case 32: return Op_VecY;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
687 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
688 ShouldNotReachHere();
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
689 return 0;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
690 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
691
6823
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
692 // Only lowest bits of xmm reg are used for vector shift count.
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
693 const int Matcher::vector_shift_count_ideal_reg(int size) {
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
694 return Op_VecS;
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
695 }
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
696
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
697 // x86 supports misaligned vectors store/load.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
698 const bool Matcher::misaligned_vectors_ok() {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
699 return !AlignVector; // can be changed by flag
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
700 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
701
14261
00f5eff62d18 8002074: Support for AES on SPARC
kvn
parents: 6893
diff changeset
702 // x86 AES instructions are compatible with SunJCE expanded
00f5eff62d18 8002074: Support for AES on SPARC
kvn
parents: 6893
diff changeset
703 // keys, hence we do not need to pass the original key to stubs
00f5eff62d18 8002074: Support for AES on SPARC
kvn
parents: 6893
diff changeset
704 const bool Matcher::pass_original_key_for_aes() {
00f5eff62d18 8002074: Support for AES on SPARC
kvn
parents: 6893
diff changeset
705 return false;
00f5eff62d18 8002074: Support for AES on SPARC
kvn
parents: 6893
diff changeset
706 }
00f5eff62d18 8002074: Support for AES on SPARC
kvn
parents: 6893
diff changeset
707
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
708 // Helper methods for MachSpillCopyNode::implementation().
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
709 static int vec_mov_helper(CodeBuffer *cbuf, bool do_size, int src_lo, int dst_lo,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
710 int src_hi, int dst_hi, uint ireg, outputStream* st) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
711 // In 64-bit VM size calculation is very complex. Emitting instructions
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
712 // into scratch buffer is used to get size in 64-bit VM.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
713 LP64_ONLY( assert(!do_size, "this method calculates size only for 32-bit VM"); )
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
714 assert(ireg == Op_VecS || // 32bit vector
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
715 (src_lo & 1) == 0 && (src_lo + 1) == src_hi &&
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
716 (dst_lo & 1) == 0 && (dst_lo + 1) == dst_hi,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
717 "no non-adjacent vector moves" );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
718 if (cbuf) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
719 MacroAssembler _masm(cbuf);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
720 int offset = __ offset();
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
721 switch (ireg) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
722 case Op_VecS: // copy whole register
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
723 case Op_VecD:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
724 case Op_VecX:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
725 __ movdqu(as_XMMRegister(Matcher::_regEncode[dst_lo]), as_XMMRegister(Matcher::_regEncode[src_lo]));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
726 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
727 case Op_VecY:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
728 __ vmovdqu(as_XMMRegister(Matcher::_regEncode[dst_lo]), as_XMMRegister(Matcher::_regEncode[src_lo]));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
729 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
730 default:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
731 ShouldNotReachHere();
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
732 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
733 int size = __ offset() - offset;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
734 #ifdef ASSERT
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
735 // VEX_2bytes prefix is used if UseAVX > 0, so it takes the same 2 bytes as SIMD prefix.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
736 assert(!do_size || size == 4, "incorrect size calculattion");
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
737 #endif
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
738 return size;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
739 #ifndef PRODUCT
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
740 } else if (!do_size) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
741 switch (ireg) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
742 case Op_VecS:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
743 case Op_VecD:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
744 case Op_VecX:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
745 st->print("movdqu %s,%s\t# spill",Matcher::regName[dst_lo],Matcher::regName[src_lo]);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
746 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
747 case Op_VecY:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
748 st->print("vmovdqu %s,%s\t# spill",Matcher::regName[dst_lo],Matcher::regName[src_lo]);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
749 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
750 default:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
751 ShouldNotReachHere();
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
752 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
753 #endif
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
754 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
755 // VEX_2bytes prefix is used if UseAVX > 0, and it takes the same 2 bytes as SIMD prefix.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
756 return 4;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
757 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
758
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
759 static int vec_spill_helper(CodeBuffer *cbuf, bool do_size, bool is_load,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
760 int stack_offset, int reg, uint ireg, outputStream* st) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
761 // In 64-bit VM size calculation is very complex. Emitting instructions
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
762 // into scratch buffer is used to get size in 64-bit VM.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
763 LP64_ONLY( assert(!do_size, "this method calculates size only for 32-bit VM"); )
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
764 if (cbuf) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
765 MacroAssembler _masm(cbuf);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
766 int offset = __ offset();
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
767 if (is_load) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
768 switch (ireg) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
769 case Op_VecS:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
770 __ movdl(as_XMMRegister(Matcher::_regEncode[reg]), Address(rsp, stack_offset));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
771 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
772 case Op_VecD:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
773 __ movq(as_XMMRegister(Matcher::_regEncode[reg]), Address(rsp, stack_offset));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
774 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
775 case Op_VecX:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
776 __ movdqu(as_XMMRegister(Matcher::_regEncode[reg]), Address(rsp, stack_offset));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
777 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
778 case Op_VecY:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
779 __ vmovdqu(as_XMMRegister(Matcher::_regEncode[reg]), Address(rsp, stack_offset));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
780 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
781 default:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
782 ShouldNotReachHere();
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
783 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
784 } else { // store
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
785 switch (ireg) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
786 case Op_VecS:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
787 __ movdl(Address(rsp, stack_offset), as_XMMRegister(Matcher::_regEncode[reg]));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
788 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
789 case Op_VecD:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
790 __ movq(Address(rsp, stack_offset), as_XMMRegister(Matcher::_regEncode[reg]));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
791 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
792 case Op_VecX:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
793 __ movdqu(Address(rsp, stack_offset), as_XMMRegister(Matcher::_regEncode[reg]));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
794 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
795 case Op_VecY:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
796 __ vmovdqu(Address(rsp, stack_offset), as_XMMRegister(Matcher::_regEncode[reg]));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
797 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
798 default:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
799 ShouldNotReachHere();
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
800 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
801 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
802 int size = __ offset() - offset;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
803 #ifdef ASSERT
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
804 int offset_size = (stack_offset == 0) ? 0 : ((stack_offset < 0x80) ? 1 : 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
805 // VEX_2bytes prefix is used if UseAVX > 0, so it takes the same 2 bytes as SIMD prefix.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
806 assert(!do_size || size == (5+offset_size), "incorrect size calculattion");
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
807 #endif
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
808 return size;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
809 #ifndef PRODUCT
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
810 } else if (!do_size) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
811 if (is_load) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
812 switch (ireg) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
813 case Op_VecS:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
814 st->print("movd %s,[rsp + %d]\t# spill", Matcher::regName[reg], stack_offset);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
815 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
816 case Op_VecD:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
817 st->print("movq %s,[rsp + %d]\t# spill", Matcher::regName[reg], stack_offset);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
818 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
819 case Op_VecX:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
820 st->print("movdqu %s,[rsp + %d]\t# spill", Matcher::regName[reg], stack_offset);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
821 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
822 case Op_VecY:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
823 st->print("vmovdqu %s,[rsp + %d]\t# spill", Matcher::regName[reg], stack_offset);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
824 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
825 default:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
826 ShouldNotReachHere();
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
827 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
828 } else { // store
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
829 switch (ireg) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
830 case Op_VecS:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
831 st->print("movd [rsp + %d],%s\t# spill", stack_offset, Matcher::regName[reg]);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
832 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
833 case Op_VecD:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
834 st->print("movq [rsp + %d],%s\t# spill", stack_offset, Matcher::regName[reg]);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
835 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
836 case Op_VecX:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
837 st->print("movdqu [rsp + %d],%s\t# spill", stack_offset, Matcher::regName[reg]);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
838 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
839 case Op_VecY:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
840 st->print("vmovdqu [rsp + %d],%s\t# spill", stack_offset, Matcher::regName[reg]);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
841 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
842 default:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
843 ShouldNotReachHere();
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
844 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
845 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
846 #endif
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
847 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
848 int offset_size = (stack_offset == 0) ? 0 : ((stack_offset < 0x80) ? 1 : 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
849 // VEX_2bytes prefix is used if UseAVX > 0, so it takes the same 2 bytes as SIMD prefix.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
850 return 5+offset_size;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
851 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
852
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
853 static inline jfloat replicate4_imm(int con, int width) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
854 // Load a constant of "width" (in bytes) and replicate it to fill 32bit.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
855 assert(width == 1 || width == 2, "only byte or short types here");
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
856 int bit_width = width * 8;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
857 jint val = con;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
858 val &= (1 << bit_width) - 1; // mask off sign bits
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
859 while(bit_width < 32) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
860 val |= (val << bit_width);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
861 bit_width <<= 1;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
862 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
863 jfloat fval = *((jfloat*) &val); // coerce to float type
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
864 return fval;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
865 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
866
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
867 static inline jdouble replicate8_imm(int con, int width) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
868 // Load a constant of "width" (in bytes) and replicate it to fill 64bit.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
869 assert(width == 1 || width == 2 || width == 4, "only byte, short or int types here");
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
870 int bit_width = width * 8;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
871 jlong val = con;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
872 val &= (((jlong) 1) << bit_width) - 1; // mask off sign bits
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
873 while(bit_width < 64) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
874 val |= (val << bit_width);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
875 bit_width <<= 1;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
876 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
877 jdouble dval = *((jdouble*) &val); // coerce to double type
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
878 return dval;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
879 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
880
4950
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
881 #ifndef PRODUCT
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
882 void MachNopNode::format(PhaseRegAlloc*, outputStream* st) const {
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
883 st->print("nop \t# %d bytes pad for loops and calls", _count);
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
884 }
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
885 #endif
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
886
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
887 void MachNopNode::emit(CodeBuffer &cbuf, PhaseRegAlloc*) const {
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
888 MacroAssembler _masm(&cbuf);
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
889 __ nop(_count);
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
890 }
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
891
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
892 uint MachNopNode::size(PhaseRegAlloc*) const {
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
893 return _count;
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
894 }
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
895
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
896 #ifndef PRODUCT
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
897 void MachBreakpointNode::format(PhaseRegAlloc*, outputStream* st) const {
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
898 st->print("# breakpoint");
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
899 }
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
900 #endif
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
901
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
902 void MachBreakpointNode::emit(CodeBuffer &cbuf, PhaseRegAlloc* ra_) const {
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
903 MacroAssembler _masm(&cbuf);
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
904 __ int3();
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
905 }
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
906
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
907 uint MachBreakpointNode::size(PhaseRegAlloc* ra_) const {
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
908 return MachNode::size(ra_);
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
909 }
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
910
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
911 %}
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
912
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
913 encode %{
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
914
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
915 enc_class preserve_SP %{
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
916 debug_only(int off0 = cbuf.insts_size());
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
917 MacroAssembler _masm(&cbuf);
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
918 // RBP is preserved across all calls, even compiled calls.
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
919 // Use it to preserve RSP in places where the callee might change the SP.
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
920 __ movptr(rbp_mh_SP_save, rsp);
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
921 debug_only(int off1 = cbuf.insts_size());
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
922 assert(off1 - off0 == preserve_SP_size(), "correct size prediction");
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
923 %}
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
924
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
925 enc_class restore_SP %{
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
926 MacroAssembler _masm(&cbuf);
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
927 __ movptr(rsp, rbp_mh_SP_save);
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
928 %}
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
929
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
930 enc_class call_epilog %{
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
931 if (VerifyStackAtCalls) {
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
932 // Check that stack depth is unchanged: find majik cookie on stack
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
933 int framesize = ra_->reg2offset_unchecked(OptoReg::add(ra_->_matcher._old_SP, -3*VMRegImpl::slots_per_word));
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
934 MacroAssembler _masm(&cbuf);
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
935 Label L;
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
936 __ cmpptr(Address(rsp, framesize), (int32_t)0xbadb100d);
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
937 __ jccb(Assembler::equal, L);
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
938 // Die if stack mismatch
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
939 __ int3();
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
940 __ bind(L);
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
941 }
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
942 %}
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
943
4761
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
944 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
945
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
946
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
947 //----------OPERANDS-----------------------------------------------------------
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
948 // Operand definitions must precede instruction definitions for correct parsing
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
949 // in the ADLC because operands constitute user defined types which are used in
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
950 // instruction definitions.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
951
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
952 // Vectors
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
953 operand vecS() %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
954 constraint(ALLOC_IN_RC(vectors_reg));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
955 match(VecS);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
956
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
957 format %{ %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
958 interface(REG_INTER);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
959 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
960
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
961 operand vecD() %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
962 constraint(ALLOC_IN_RC(vectord_reg));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
963 match(VecD);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
964
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
965 format %{ %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
966 interface(REG_INTER);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
967 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
968
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
969 operand vecX() %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
970 constraint(ALLOC_IN_RC(vectorx_reg));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
971 match(VecX);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
972
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
973 format %{ %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
974 interface(REG_INTER);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
975 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
976
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
977 operand vecY() %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
978 constraint(ALLOC_IN_RC(vectory_reg));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
979 match(VecY);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
980
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
981 format %{ %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
982 interface(REG_INTER);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
983 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
984
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
985
4761
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
986 // INSTRUCTIONS -- Platform independent definitions (same for 32- and 64-bit)
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
987
4950
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
988 // ============================================================================
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
989
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
990 instruct ShouldNotReachHere() %{
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
991 match(Halt);
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
992 format %{ "int3\t# ShouldNotReachHere" %}
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
993 ins_encode %{
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
994 __ int3();
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
995 %}
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
996 ins_pipe(pipe_slow);
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
997 %}
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
998
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
999 // ============================================================================
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
1000
4761
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1001 instruct addF_reg(regF dst, regF src) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1002 predicate((UseSSE>=1) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1003 match(Set dst (AddF dst src));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1004
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1005 format %{ "addss $dst, $src" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1006 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1007 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1008 __ addss($dst$$XMMRegister, $src$$XMMRegister);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1009 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1010 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1011 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1012
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1013 instruct addF_mem(regF dst, memory src) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1014 predicate((UseSSE>=1) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1015 match(Set dst (AddF dst (LoadF src)));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1016
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1017 format %{ "addss $dst, $src" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1018 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1019 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1020 __ addss($dst$$XMMRegister, $src$$Address);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1021 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1022 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1023 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1024
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1025 instruct addF_imm(regF dst, immF con) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1026 predicate((UseSSE>=1) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1027 match(Set dst (AddF dst con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1028 format %{ "addss $dst, [$constantaddress]\t# load from constant table: float=$con" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1029 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1030 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1031 __ addss($dst$$XMMRegister, $constantaddress($con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1032 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1033 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1034 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1035
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
1036 instruct addF_reg_reg(regF dst, regF src1, regF src2) %{
4761
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1037 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1038 match(Set dst (AddF src1 src2));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1039
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1040 format %{ "vaddss $dst, $src1, $src2" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1041 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1042 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1043 __ vaddss($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1044 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1045 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1046 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1047
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
1048 instruct addF_reg_mem(regF dst, regF src1, memory src2) %{
4761
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1049 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1050 match(Set dst (AddF src1 (LoadF src2)));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1051
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1052 format %{ "vaddss $dst, $src1, $src2" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1053 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1054 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1055 __ vaddss($dst$$XMMRegister, $src1$$XMMRegister, $src2$$Address);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1056 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1057 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1058 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1059
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
1060 instruct addF_reg_imm(regF dst, regF src, immF con) %{
4761
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1061 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1062 match(Set dst (AddF src con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1063
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1064 format %{ "vaddss $dst, $src, [$constantaddress]\t# load from constant table: float=$con" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1065 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1066 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1067 __ vaddss($dst$$XMMRegister, $src$$XMMRegister, $constantaddress($con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1068 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1069 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1070 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1071
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1072 instruct addD_reg(regD dst, regD src) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1073 predicate((UseSSE>=2) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1074 match(Set dst (AddD dst src));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1075
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1076 format %{ "addsd $dst, $src" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1077 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1078 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1079 __ addsd($dst$$XMMRegister, $src$$XMMRegister);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1080 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1081 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1082 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1083
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1084 instruct addD_mem(regD dst, memory src) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1085 predicate((UseSSE>=2) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1086 match(Set dst (AddD dst (LoadD src)));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1087
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1088 format %{ "addsd $dst, $src" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1089 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1090 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1091 __ addsd($dst$$XMMRegister, $src$$Address);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1092 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1093 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1094 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1095
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1096 instruct addD_imm(regD dst, immD con) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1097 predicate((UseSSE>=2) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1098 match(Set dst (AddD dst con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1099 format %{ "addsd $dst, [$constantaddress]\t# load from constant table: double=$con" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1100 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1101 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1102 __ addsd($dst$$XMMRegister, $constantaddress($con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1103 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1104 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1105 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1106
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
1107 instruct addD_reg_reg(regD dst, regD src1, regD src2) %{
4761
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1108 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1109 match(Set dst (AddD src1 src2));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1110
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1111 format %{ "vaddsd $dst, $src1, $src2" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1112 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1113 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1114 __ vaddsd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1115 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1116 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1117 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1118
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
1119 instruct addD_reg_mem(regD dst, regD src1, memory src2) %{
4761
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1120 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1121 match(Set dst (AddD src1 (LoadD src2)));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1122
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1123 format %{ "vaddsd $dst, $src1, $src2" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1124 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1125 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1126 __ vaddsd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$Address);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1127 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1128 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1129 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1130
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
1131 instruct addD_reg_imm(regD dst, regD src, immD con) %{
4761
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1132 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1133 match(Set dst (AddD src con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1134
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1135 format %{ "vaddsd $dst, $src, [$constantaddress]\t# load from constant table: double=$con" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1136 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1137 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1138 __ vaddsd($dst$$XMMRegister, $src$$XMMRegister, $constantaddress($con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1139 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1140 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1141 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1142
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1143 instruct subF_reg(regF dst, regF src) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1144 predicate((UseSSE>=1) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1145 match(Set dst (SubF dst src));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1146
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1147 format %{ "subss $dst, $src" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1148 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1149 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1150 __ subss($dst$$XMMRegister, $src$$XMMRegister);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1151 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1152 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1153 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1154
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1155 instruct subF_mem(regF dst, memory src) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1156 predicate((UseSSE>=1) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1157 match(Set dst (SubF dst (LoadF src)));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1158
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1159 format %{ "subss $dst, $src" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1160 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1161 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1162 __ subss($dst$$XMMRegister, $src$$Address);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1163 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1164 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1165 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1166
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1167 instruct subF_imm(regF dst, immF con) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1168 predicate((UseSSE>=1) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1169 match(Set dst (SubF dst con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1170 format %{ "subss $dst, [$constantaddress]\t# load from constant table: float=$con" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1171 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1172 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1173 __ subss($dst$$XMMRegister, $constantaddress($con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1174 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1175 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1176 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1177
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
1178 instruct subF_reg_reg(regF dst, regF src1, regF src2) %{
4761
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1179 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1180 match(Set dst (SubF src1 src2));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1181
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1182 format %{ "vsubss $dst, $src1, $src2" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1183 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1184 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1185 __ vsubss($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1186 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1187 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1188 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1189
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
1190 instruct subF_reg_mem(regF dst, regF src1, memory src2) %{
4761
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1191 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1192 match(Set dst (SubF src1 (LoadF src2)));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1193
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1194 format %{ "vsubss $dst, $src1, $src2" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1195 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1196 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1197 __ vsubss($dst$$XMMRegister, $src1$$XMMRegister, $src2$$Address);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1198 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1199 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1200 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1201
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
1202 instruct subF_reg_imm(regF dst, regF src, immF con) %{
4761
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1203 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1204 match(Set dst (SubF src con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1205
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1206 format %{ "vsubss $dst, $src, [$constantaddress]\t# load from constant table: float=$con" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1207 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1208 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1209 __ vsubss($dst$$XMMRegister, $src$$XMMRegister, $constantaddress($con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1210 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1211 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1212 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1213
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1214 instruct subD_reg(regD dst, regD src) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1215 predicate((UseSSE>=2) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1216 match(Set dst (SubD dst src));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1217
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1218 format %{ "subsd $dst, $src" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1219 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1220 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1221 __ subsd($dst$$XMMRegister, $src$$XMMRegister);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1222 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1223 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1224 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1225
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1226 instruct subD_mem(regD dst, memory src) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1227 predicate((UseSSE>=2) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1228 match(Set dst (SubD dst (LoadD src)));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1229
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1230 format %{ "subsd $dst, $src" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1231 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1232 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1233 __ subsd($dst$$XMMRegister, $src$$Address);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1234 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1235 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1236 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1237
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1238 instruct subD_imm(regD dst, immD con) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1239 predicate((UseSSE>=2) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1240 match(Set dst (SubD dst con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1241 format %{ "subsd $dst, [$constantaddress]\t# load from constant table: double=$con" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1242 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1243 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1244 __ subsd($dst$$XMMRegister, $constantaddress($con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1245 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1246 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1247 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1248
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
1249 instruct subD_reg_reg(regD dst, regD src1, regD src2) %{
4761
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1250 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1251 match(Set dst (SubD src1 src2));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1252
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1253 format %{ "vsubsd $dst, $src1, $src2" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1254 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1255 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1256 __ vsubsd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1257 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1258 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1259 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1260
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
1261 instruct subD_reg_mem(regD dst, regD src1, memory src2) %{
4761
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1262 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1263 match(Set dst (SubD src1 (LoadD src2)));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1264
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1265 format %{ "vsubsd $dst, $src1, $src2" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1266 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1267 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1268 __ vsubsd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$Address);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1269 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1270 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1271 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1272
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
1273 instruct subD_reg_imm(regD dst, regD src, immD con) %{
4761
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1274 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1275 match(Set dst (SubD src con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1276
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1277 format %{ "vsubsd $dst, $src, [$constantaddress]\t# load from constant table: double=$con" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1278 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1279 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1280 __ vsubsd($dst$$XMMRegister, $src$$XMMRegister, $constantaddress($con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1281 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1282 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1283 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1284
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1285 instruct mulF_reg(regF dst, regF src) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1286 predicate((UseSSE>=1) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1287 match(Set dst (MulF dst src));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1288
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1289 format %{ "mulss $dst, $src" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1290 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1291 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1292 __ mulss($dst$$XMMRegister, $src$$XMMRegister);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1293 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1294 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1295 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1296
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1297 instruct mulF_mem(regF dst, memory src) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1298 predicate((UseSSE>=1) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1299 match(Set dst (MulF dst (LoadF src)));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1300
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1301 format %{ "mulss $dst, $src" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1302 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1303 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1304 __ mulss($dst$$XMMRegister, $src$$Address);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1305 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1306 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1307 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1308
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1309 instruct mulF_imm(regF dst, immF con) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1310 predicate((UseSSE>=1) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1311 match(Set dst (MulF dst con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1312 format %{ "mulss $dst, [$constantaddress]\t# load from constant table: float=$con" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1313 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1314 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1315 __ mulss($dst$$XMMRegister, $constantaddress($con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1316 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1317 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1318 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1319
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
1320 instruct mulF_reg_reg(regF dst, regF src1, regF src2) %{
4761
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1321 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1322 match(Set dst (MulF src1 src2));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1323
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1324 format %{ "vmulss $dst, $src1, $src2" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1325 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1326 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1327 __ vmulss($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1328 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1329 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1330 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1331
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
1332 instruct mulF_reg_mem(regF dst, regF src1, memory src2) %{
4761
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1333 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1334 match(Set dst (MulF src1 (LoadF src2)));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1335
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1336 format %{ "vmulss $dst, $src1, $src2" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1337 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1338 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1339 __ vmulss($dst$$XMMRegister, $src1$$XMMRegister, $src2$$Address);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1340 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1341 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1342 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1343
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
1344 instruct mulF_reg_imm(regF dst, regF src, immF con) %{
4761
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1345 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1346 match(Set dst (MulF src con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1347
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1348 format %{ "vmulss $dst, $src, [$constantaddress]\t# load from constant table: float=$con" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1349 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1350 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1351 __ vmulss($dst$$XMMRegister, $src$$XMMRegister, $constantaddress($con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1352 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1353 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1354 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1355
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1356 instruct mulD_reg(regD dst, regD src) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1357 predicate((UseSSE>=2) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1358 match(Set dst (MulD dst src));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1359
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1360 format %{ "mulsd $dst, $src" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1361 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1362 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1363 __ mulsd($dst$$XMMRegister, $src$$XMMRegister);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1364 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1365 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1366 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1367
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1368 instruct mulD_mem(regD dst, memory src) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1369 predicate((UseSSE>=2) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1370 match(Set dst (MulD dst (LoadD src)));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1371
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1372 format %{ "mulsd $dst, $src" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1373 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1374 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1375 __ mulsd($dst$$XMMRegister, $src$$Address);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1376 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1377 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1378 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1379
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1380 instruct mulD_imm(regD dst, immD con) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1381 predicate((UseSSE>=2) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1382 match(Set dst (MulD dst con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1383 format %{ "mulsd $dst, [$constantaddress]\t# load from constant table: double=$con" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1384 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1385 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1386 __ mulsd($dst$$XMMRegister, $constantaddress($con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1387 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1388 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1389 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1390
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
1391 instruct mulD_reg_reg(regD dst, regD src1, regD src2) %{
4761
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1392 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1393 match(Set dst (MulD src1 src2));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1394
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1395 format %{ "vmulsd $dst, $src1, $src2" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1396 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1397 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1398 __ vmulsd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1399 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1400 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1401 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1402
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
1403 instruct mulD_reg_mem(regD dst, regD src1, memory src2) %{
4761
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1404 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1405 match(Set dst (MulD src1 (LoadD src2)));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1406
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1407 format %{ "vmulsd $dst, $src1, $src2" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1408 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1409 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1410 __ vmulsd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$Address);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1411 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1412 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1413 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1414
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
1415 instruct mulD_reg_imm(regD dst, regD src, immD con) %{
4761
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1416 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1417 match(Set dst (MulD src con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1418
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1419 format %{ "vmulsd $dst, $src, [$constantaddress]\t# load from constant table: double=$con" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1420 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1421 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1422 __ vmulsd($dst$$XMMRegister, $src$$XMMRegister, $constantaddress($con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1423 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1424 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1425 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1426
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1427 instruct divF_reg(regF dst, regF src) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1428 predicate((UseSSE>=1) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1429 match(Set dst (DivF dst src));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1430
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1431 format %{ "divss $dst, $src" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1432 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1433 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1434 __ divss($dst$$XMMRegister, $src$$XMMRegister);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1435 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1436 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1437 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1438
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1439 instruct divF_mem(regF dst, memory src) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1440 predicate((UseSSE>=1) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1441 match(Set dst (DivF dst (LoadF src)));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1442
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1443 format %{ "divss $dst, $src" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1444 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1445 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1446 __ divss($dst$$XMMRegister, $src$$Address);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1447 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1448 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1449 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1450
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1451 instruct divF_imm(regF dst, immF con) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1452 predicate((UseSSE>=1) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1453 match(Set dst (DivF dst con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1454 format %{ "divss $dst, [$constantaddress]\t# load from constant table: float=$con" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1455 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1456 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1457 __ divss($dst$$XMMRegister, $constantaddress($con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1458 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1459 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1460 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1461
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
1462 instruct divF_reg_reg(regF dst, regF src1, regF src2) %{
4761
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1463 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1464 match(Set dst (DivF src1 src2));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1465
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1466 format %{ "vdivss $dst, $src1, $src2" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1467 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1468 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1469 __ vdivss($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1470 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1471 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1472 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1473
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
1474 instruct divF_reg_mem(regF dst, regF src1, memory src2) %{
4761
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1475 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1476 match(Set dst (DivF src1 (LoadF src2)));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1477
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1478 format %{ "vdivss $dst, $src1, $src2" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1479 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1480 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1481 __ vdivss($dst$$XMMRegister, $src1$$XMMRegister, $src2$$Address);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1482 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1483 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1484 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1485
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
1486 instruct divF_reg_imm(regF dst, regF src, immF con) %{
4761
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1487 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1488 match(Set dst (DivF src con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1489
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1490 format %{ "vdivss $dst, $src, [$constantaddress]\t# load from constant table: float=$con" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1491 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1492 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1493 __ vdivss($dst$$XMMRegister, $src$$XMMRegister, $constantaddress($con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1494 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1495 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1496 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1497
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1498 instruct divD_reg(regD dst, regD src) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1499 predicate((UseSSE>=2) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1500 match(Set dst (DivD dst src));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1501
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1502 format %{ "divsd $dst, $src" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1503 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1504 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1505 __ divsd($dst$$XMMRegister, $src$$XMMRegister);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1506 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1507 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1508 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1509
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1510 instruct divD_mem(regD dst, memory src) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1511 predicate((UseSSE>=2) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1512 match(Set dst (DivD dst (LoadD src)));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1513
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1514 format %{ "divsd $dst, $src" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1515 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1516 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1517 __ divsd($dst$$XMMRegister, $src$$Address);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1518 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1519 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1520 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1521
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1522 instruct divD_imm(regD dst, immD con) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1523 predicate((UseSSE>=2) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1524 match(Set dst (DivD dst con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1525 format %{ "divsd $dst, [$constantaddress]\t# load from constant table: double=$con" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1526 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1527 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1528 __ divsd($dst$$XMMRegister, $constantaddress($con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1529 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1530 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1531 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1532
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
1533 instruct divD_reg_reg(regD dst, regD src1, regD src2) %{
4761
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1534 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1535 match(Set dst (DivD src1 src2));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1536
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1537 format %{ "vdivsd $dst, $src1, $src2" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1538 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1539 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1540 __ vdivsd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1541 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1542 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1543 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1544
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
1545 instruct divD_reg_mem(regD dst, regD src1, memory src2) %{
4761
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1546 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1547 match(Set dst (DivD src1 (LoadD src2)));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1548
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1549 format %{ "vdivsd $dst, $src1, $src2" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1550 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1551 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1552 __ vdivsd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$Address);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1553 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1554 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1555 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1556
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
1557 instruct divD_reg_imm(regD dst, regD src, immD con) %{
4761
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1558 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1559 match(Set dst (DivD src con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1560
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1561 format %{ "vdivsd $dst, $src, [$constantaddress]\t# load from constant table: double=$con" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1562 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1563 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1564 __ vdivsd($dst$$XMMRegister, $src$$XMMRegister, $constantaddress($con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1565 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1566 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1567 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1568
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1569 instruct absF_reg(regF dst) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1570 predicate((UseSSE>=1) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1571 match(Set dst (AbsF dst));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1572 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1573 format %{ "andps $dst, [0x7fffffff]\t# abs float by sign masking" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1574 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1575 __ andps($dst$$XMMRegister, ExternalAddress(float_signmask()));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1576 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1577 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1578 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1579
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
1580 instruct absF_reg_reg(regF dst, regF src) %{
4761
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1581 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1582 match(Set dst (AbsF src));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1583 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1584 format %{ "vandps $dst, $src, [0x7fffffff]\t# abs float by sign masking" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1585 ins_encode %{
6614
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
1586 bool vector256 = false;
4761
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1587 __ vandps($dst$$XMMRegister, $src$$XMMRegister,
6614
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
1588 ExternalAddress(float_signmask()), vector256);
4761
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1589 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1590 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1591 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1592
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1593 instruct absD_reg(regD dst) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1594 predicate((UseSSE>=2) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1595 match(Set dst (AbsD dst));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1596 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1597 format %{ "andpd $dst, [0x7fffffffffffffff]\t"
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1598 "# abs double by sign masking" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1599 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1600 __ andpd($dst$$XMMRegister, ExternalAddress(double_signmask()));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1601 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1602 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1603 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1604
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
1605 instruct absD_reg_reg(regD dst, regD src) %{
4761
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1606 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1607 match(Set dst (AbsD src));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1608 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1609 format %{ "vandpd $dst, $src, [0x7fffffffffffffff]\t"
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1610 "# abs double by sign masking" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1611 ins_encode %{
6614
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
1612 bool vector256 = false;
4761
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1613 __ vandpd($dst$$XMMRegister, $src$$XMMRegister,
6614
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
1614 ExternalAddress(double_signmask()), vector256);
4761
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1615 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1616 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1617 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1618
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1619 instruct negF_reg(regF dst) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1620 predicate((UseSSE>=1) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1621 match(Set dst (NegF dst));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1622 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1623 format %{ "xorps $dst, [0x80000000]\t# neg float by sign flipping" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1624 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1625 __ xorps($dst$$XMMRegister, ExternalAddress(float_signflip()));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1626 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1627 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1628 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1629
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
1630 instruct negF_reg_reg(regF dst, regF src) %{
4761
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1631 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1632 match(Set dst (NegF src));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1633 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1634 format %{ "vxorps $dst, $src, [0x80000000]\t# neg float by sign flipping" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1635 ins_encode %{
6614
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
1636 bool vector256 = false;
4761
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1637 __ vxorps($dst$$XMMRegister, $src$$XMMRegister,
6614
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
1638 ExternalAddress(float_signflip()), vector256);
4761
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1639 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1640 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1641 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1642
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1643 instruct negD_reg(regD dst) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1644 predicate((UseSSE>=2) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1645 match(Set dst (NegD dst));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1646 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1647 format %{ "xorpd $dst, [0x8000000000000000]\t"
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1648 "# neg double by sign flipping" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1649 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1650 __ xorpd($dst$$XMMRegister, ExternalAddress(double_signflip()));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1651 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1652 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1653 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1654
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
1655 instruct negD_reg_reg(regD dst, regD src) %{
4761
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1656 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1657 match(Set dst (NegD src));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1658 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1659 format %{ "vxorpd $dst, $src, [0x8000000000000000]\t"
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1660 "# neg double by sign flipping" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1661 ins_encode %{
6614
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
1662 bool vector256 = false;
4761
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1663 __ vxorpd($dst$$XMMRegister, $src$$XMMRegister,
6614
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
1664 ExternalAddress(double_signflip()), vector256);
4761
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1665 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1666 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1667 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1668
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1669 instruct sqrtF_reg(regF dst, regF src) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1670 predicate(UseSSE>=1);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1671 match(Set dst (ConvD2F (SqrtD (ConvF2D src))));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1672
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1673 format %{ "sqrtss $dst, $src" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1674 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1675 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1676 __ sqrtss($dst$$XMMRegister, $src$$XMMRegister);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1677 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1678 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1679 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1680
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1681 instruct sqrtF_mem(regF dst, memory src) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1682 predicate(UseSSE>=1);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1683 match(Set dst (ConvD2F (SqrtD (ConvF2D (LoadF src)))));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1684
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1685 format %{ "sqrtss $dst, $src" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1686 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1687 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1688 __ sqrtss($dst$$XMMRegister, $src$$Address);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1689 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1690 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1691 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1692
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1693 instruct sqrtF_imm(regF dst, immF con) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1694 predicate(UseSSE>=1);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1695 match(Set dst (ConvD2F (SqrtD (ConvF2D con))));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1696 format %{ "sqrtss $dst, [$constantaddress]\t# load from constant table: float=$con" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1697 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1698 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1699 __ sqrtss($dst$$XMMRegister, $constantaddress($con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1700 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1701 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1702 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1703
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1704 instruct sqrtD_reg(regD dst, regD src) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1705 predicate(UseSSE>=2);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1706 match(Set dst (SqrtD src));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1707
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1708 format %{ "sqrtsd $dst, $src" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1709 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1710 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1711 __ sqrtsd($dst$$XMMRegister, $src$$XMMRegister);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1712 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1713 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1714 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1715
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1716 instruct sqrtD_mem(regD dst, memory src) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1717 predicate(UseSSE>=2);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1718 match(Set dst (SqrtD (LoadD src)));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1719
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1720 format %{ "sqrtsd $dst, $src" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1721 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1722 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1723 __ sqrtsd($dst$$XMMRegister, $src$$Address);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1724 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1725 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1726 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1727
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1728 instruct sqrtD_imm(regD dst, immD con) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1729 predicate(UseSSE>=2);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1730 match(Set dst (SqrtD con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1731 format %{ "sqrtsd $dst, [$constantaddress]\t# load from constant table: double=$con" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1732 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1733 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1734 __ sqrtsd($dst$$XMMRegister, $constantaddress($con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1735 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1736 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1737 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1738
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1739
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1740 // ====================VECTOR INSTRUCTIONS=====================================
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1741
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1742 // Load vectors (4 bytes long)
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1743 instruct loadV4(vecS dst, memory mem) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1744 predicate(n->as_LoadVector()->memory_size() == 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1745 match(Set dst (LoadVector mem));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1746 ins_cost(125);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1747 format %{ "movd $dst,$mem\t! load vector (4 bytes)" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1748 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1749 __ movdl($dst$$XMMRegister, $mem$$Address);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1750 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1751 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1752 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1753
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1754 // Load vectors (8 bytes long)
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1755 instruct loadV8(vecD dst, memory mem) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1756 predicate(n->as_LoadVector()->memory_size() == 8);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1757 match(Set dst (LoadVector mem));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1758 ins_cost(125);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1759 format %{ "movq $dst,$mem\t! load vector (8 bytes)" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1760 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1761 __ movq($dst$$XMMRegister, $mem$$Address);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1762 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1763 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1764 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1765
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1766 // Load vectors (16 bytes long)
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1767 instruct loadV16(vecX dst, memory mem) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1768 predicate(n->as_LoadVector()->memory_size() == 16);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1769 match(Set dst (LoadVector mem));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1770 ins_cost(125);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1771 format %{ "movdqu $dst,$mem\t! load vector (16 bytes)" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1772 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1773 __ movdqu($dst$$XMMRegister, $mem$$Address);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1774 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1775 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1776 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1777
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1778 // Load vectors (32 bytes long)
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1779 instruct loadV32(vecY dst, memory mem) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1780 predicate(n->as_LoadVector()->memory_size() == 32);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1781 match(Set dst (LoadVector mem));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1782 ins_cost(125);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1783 format %{ "vmovdqu $dst,$mem\t! load vector (32 bytes)" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1784 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1785 __ vmovdqu($dst$$XMMRegister, $mem$$Address);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1786 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1787 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1788 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1789
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1790 // Store vectors
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1791 instruct storeV4(memory mem, vecS src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1792 predicate(n->as_StoreVector()->memory_size() == 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1793 match(Set mem (StoreVector mem src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1794 ins_cost(145);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1795 format %{ "movd $mem,$src\t! store vector (4 bytes)" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1796 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1797 __ movdl($mem$$Address, $src$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1798 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1799 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1800 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1801
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1802 instruct storeV8(memory mem, vecD src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1803 predicate(n->as_StoreVector()->memory_size() == 8);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1804 match(Set mem (StoreVector mem src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1805 ins_cost(145);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1806 format %{ "movq $mem,$src\t! store vector (8 bytes)" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1807 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1808 __ movq($mem$$Address, $src$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1809 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1810 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1811 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1812
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1813 instruct storeV16(memory mem, vecX src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1814 predicate(n->as_StoreVector()->memory_size() == 16);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1815 match(Set mem (StoreVector mem src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1816 ins_cost(145);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1817 format %{ "movdqu $mem,$src\t! store vector (16 bytes)" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1818 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1819 __ movdqu($mem$$Address, $src$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1820 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1821 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1822 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1823
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1824 instruct storeV32(memory mem, vecY src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1825 predicate(n->as_StoreVector()->memory_size() == 32);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1826 match(Set mem (StoreVector mem src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1827 ins_cost(145);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1828 format %{ "vmovdqu $mem,$src\t! store vector (32 bytes)" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1829 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1830 __ vmovdqu($mem$$Address, $src$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1831 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1832 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1833 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1834
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1835 // Replicate byte scalar to be vector
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1836 instruct Repl4B(vecS dst, rRegI src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1837 predicate(n->as_Vector()->length() == 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1838 match(Set dst (ReplicateB src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1839 format %{ "movd $dst,$src\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1840 "punpcklbw $dst,$dst\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1841 "pshuflw $dst,$dst,0x00\t! replicate4B" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1842 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1843 __ movdl($dst$$XMMRegister, $src$$Register);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1844 __ punpcklbw($dst$$XMMRegister, $dst$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1845 __ pshuflw($dst$$XMMRegister, $dst$$XMMRegister, 0x00);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1846 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1847 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1848 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1849
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1850 instruct Repl8B(vecD dst, rRegI src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1851 predicate(n->as_Vector()->length() == 8);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1852 match(Set dst (ReplicateB src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1853 format %{ "movd $dst,$src\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1854 "punpcklbw $dst,$dst\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1855 "pshuflw $dst,$dst,0x00\t! replicate8B" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1856 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1857 __ movdl($dst$$XMMRegister, $src$$Register);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1858 __ punpcklbw($dst$$XMMRegister, $dst$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1859 __ pshuflw($dst$$XMMRegister, $dst$$XMMRegister, 0x00);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1860 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1861 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1862 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1863
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1864 instruct Repl16B(vecX dst, rRegI src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1865 predicate(n->as_Vector()->length() == 16);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1866 match(Set dst (ReplicateB src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1867 format %{ "movd $dst,$src\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1868 "punpcklbw $dst,$dst\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1869 "pshuflw $dst,$dst,0x00\n\t"
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
1870 "punpcklqdq $dst,$dst\t! replicate16B" %}
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1871 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1872 __ movdl($dst$$XMMRegister, $src$$Register);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1873 __ punpcklbw($dst$$XMMRegister, $dst$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1874 __ pshuflw($dst$$XMMRegister, $dst$$XMMRegister, 0x00);
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
1875 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister);
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1876 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1877 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1878 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1879
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1880 instruct Repl32B(vecY dst, rRegI src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1881 predicate(n->as_Vector()->length() == 32);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1882 match(Set dst (ReplicateB src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1883 format %{ "movd $dst,$src\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1884 "punpcklbw $dst,$dst\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1885 "pshuflw $dst,$dst,0x00\n\t"
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
1886 "punpcklqdq $dst,$dst\n\t"
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
1887 "vinserti128h $dst,$dst,$dst\t! replicate32B" %}
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1888 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1889 __ movdl($dst$$XMMRegister, $src$$Register);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1890 __ punpcklbw($dst$$XMMRegister, $dst$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1891 __ pshuflw($dst$$XMMRegister, $dst$$XMMRegister, 0x00);
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
1892 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister);
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
1893 __ vinserti128h($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister);
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1894 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1895 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1896 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1897
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1898 // Replicate byte scalar immediate to be vector by loading from const table.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1899 instruct Repl4B_imm(vecS dst, immI con) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1900 predicate(n->as_Vector()->length() == 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1901 match(Set dst (ReplicateB con));
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
1902 format %{ "movdl $dst,[$constantaddress]\t! replicate4B($con)" %}
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1903 ins_encode %{
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
1904 __ movdl($dst$$XMMRegister, $constantaddress(replicate4_imm($con$$constant, 1)));
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1905 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1906 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1907 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1908
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1909 instruct Repl8B_imm(vecD dst, immI con) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1910 predicate(n->as_Vector()->length() == 8);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1911 match(Set dst (ReplicateB con));
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
1912 format %{ "movq $dst,[$constantaddress]\t! replicate8B($con)" %}
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1913 ins_encode %{
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
1914 __ movq($dst$$XMMRegister, $constantaddress(replicate8_imm($con$$constant, 1)));
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1915 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1916 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1917 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1918
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1919 instruct Repl16B_imm(vecX dst, immI con) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1920 predicate(n->as_Vector()->length() == 16);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1921 match(Set dst (ReplicateB con));
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
1922 format %{ "movq $dst,[$constantaddress]\n\t"
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
1923 "punpcklqdq $dst,$dst\t! replicate16B($con)" %}
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1924 ins_encode %{
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
1925 __ movq($dst$$XMMRegister, $constantaddress(replicate8_imm($con$$constant, 1)));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
1926 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister);
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1927 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1928 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1929 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1930
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1931 instruct Repl32B_imm(vecY dst, immI con) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1932 predicate(n->as_Vector()->length() == 32);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1933 match(Set dst (ReplicateB con));
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
1934 format %{ "movq $dst,[$constantaddress]\n\t"
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
1935 "punpcklqdq $dst,$dst\n\t"
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
1936 "vinserti128h $dst,$dst,$dst\t! lreplicate32B($con)" %}
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1937 ins_encode %{
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
1938 __ movq($dst$$XMMRegister, $constantaddress(replicate8_imm($con$$constant, 1)));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
1939 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister);
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
1940 __ vinserti128h($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister);
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1941 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1942 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1943 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1944
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1945 // Replicate byte scalar zero to be vector
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1946 instruct Repl4B_zero(vecS dst, immI0 zero) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1947 predicate(n->as_Vector()->length() == 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1948 match(Set dst (ReplicateB zero));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1949 format %{ "pxor $dst,$dst\t! replicate4B zero" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1950 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1951 __ pxor($dst$$XMMRegister, $dst$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1952 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1953 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1954 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1955
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1956 instruct Repl8B_zero(vecD dst, immI0 zero) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1957 predicate(n->as_Vector()->length() == 8);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1958 match(Set dst (ReplicateB zero));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1959 format %{ "pxor $dst,$dst\t! replicate8B zero" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1960 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1961 __ pxor($dst$$XMMRegister, $dst$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1962 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1963 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1964 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1965
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1966 instruct Repl16B_zero(vecX dst, immI0 zero) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1967 predicate(n->as_Vector()->length() == 16);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1968 match(Set dst (ReplicateB zero));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1969 format %{ "pxor $dst,$dst\t! replicate16B zero" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1970 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1971 __ pxor($dst$$XMMRegister, $dst$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1972 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1973 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1974 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1975
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1976 instruct Repl32B_zero(vecY dst, immI0 zero) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1977 predicate(n->as_Vector()->length() == 32);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1978 match(Set dst (ReplicateB zero));
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
1979 format %{ "vpxor $dst,$dst,$dst\t! replicate32B zero" %}
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1980 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1981 // Use vxorpd since AVX does not have vpxor for 256-bit (AVX2 will have it).
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1982 bool vector256 = true;
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
1983 __ vpxor($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister, vector256);
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1984 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1985 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1986 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1987
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1988 // Replicate char/short (2 byte) scalar to be vector
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1989 instruct Repl2S(vecS dst, rRegI src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1990 predicate(n->as_Vector()->length() == 2);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1991 match(Set dst (ReplicateS src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1992 format %{ "movd $dst,$src\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1993 "pshuflw $dst,$dst,0x00\t! replicate2S" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1994 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1995 __ movdl($dst$$XMMRegister, $src$$Register);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1996 __ pshuflw($dst$$XMMRegister, $dst$$XMMRegister, 0x00);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1997 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1998 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1999 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2000
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2001 instruct Repl4S(vecD dst, rRegI src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2002 predicate(n->as_Vector()->length() == 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2003 match(Set dst (ReplicateS src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2004 format %{ "movd $dst,$src\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2005 "pshuflw $dst,$dst,0x00\t! replicate4S" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2006 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2007 __ movdl($dst$$XMMRegister, $src$$Register);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2008 __ pshuflw($dst$$XMMRegister, $dst$$XMMRegister, 0x00);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2009 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2010 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2011 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2012
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2013 instruct Repl8S(vecX dst, rRegI src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2014 predicate(n->as_Vector()->length() == 8);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2015 match(Set dst (ReplicateS src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2016 format %{ "movd $dst,$src\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2017 "pshuflw $dst,$dst,0x00\n\t"
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2018 "punpcklqdq $dst,$dst\t! replicate8S" %}
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2019 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2020 __ movdl($dst$$XMMRegister, $src$$Register);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2021 __ pshuflw($dst$$XMMRegister, $dst$$XMMRegister, 0x00);
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2022 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister);
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2023 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2024 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2025 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2026
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2027 instruct Repl16S(vecY dst, rRegI src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2028 predicate(n->as_Vector()->length() == 16);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2029 match(Set dst (ReplicateS src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2030 format %{ "movd $dst,$src\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2031 "pshuflw $dst,$dst,0x00\n\t"
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2032 "punpcklqdq $dst,$dst\n\t"
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2033 "vinserti128h $dst,$dst,$dst\t! replicate16S" %}
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2034 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2035 __ movdl($dst$$XMMRegister, $src$$Register);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2036 __ pshuflw($dst$$XMMRegister, $dst$$XMMRegister, 0x00);
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2037 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister);
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2038 __ vinserti128h($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister);
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2039 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2040 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2041 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2042
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2043 // Replicate char/short (2 byte) scalar immediate to be vector by loading from const table.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2044 instruct Repl2S_imm(vecS dst, immI con) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2045 predicate(n->as_Vector()->length() == 2);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2046 match(Set dst (ReplicateS con));
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2047 format %{ "movdl $dst,[$constantaddress]\t! replicate2S($con)" %}
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2048 ins_encode %{
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2049 __ movdl($dst$$XMMRegister, $constantaddress(replicate4_imm($con$$constant, 2)));
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2050 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2051 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2052 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2053
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2054 instruct Repl4S_imm(vecD dst, immI con) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2055 predicate(n->as_Vector()->length() == 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2056 match(Set dst (ReplicateS con));
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2057 format %{ "movq $dst,[$constantaddress]\t! replicate4S($con)" %}
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2058 ins_encode %{
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2059 __ movq($dst$$XMMRegister, $constantaddress(replicate8_imm($con$$constant, 2)));
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2060 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2061 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2062 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2063
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2064 instruct Repl8S_imm(vecX dst, immI con) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2065 predicate(n->as_Vector()->length() == 8);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2066 match(Set dst (ReplicateS con));
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2067 format %{ "movq $dst,[$constantaddress]\n\t"
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2068 "punpcklqdq $dst,$dst\t! replicate8S($con)" %}
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2069 ins_encode %{
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2070 __ movq($dst$$XMMRegister, $constantaddress(replicate8_imm($con$$constant, 2)));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2071 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister);
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2072 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2073 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2074 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2075
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2076 instruct Repl16S_imm(vecY dst, immI con) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2077 predicate(n->as_Vector()->length() == 16);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2078 match(Set dst (ReplicateS con));
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2079 format %{ "movq $dst,[$constantaddress]\n\t"
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2080 "punpcklqdq $dst,$dst\n\t"
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2081 "vinserti128h $dst,$dst,$dst\t! replicate16S($con)" %}
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2082 ins_encode %{
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2083 __ movq($dst$$XMMRegister, $constantaddress(replicate8_imm($con$$constant, 2)));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2084 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister);
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2085 __ vinserti128h($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister);
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2086 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2087 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2088 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2089
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2090 // Replicate char/short (2 byte) scalar zero to be vector
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2091 instruct Repl2S_zero(vecS dst, immI0 zero) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2092 predicate(n->as_Vector()->length() == 2);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2093 match(Set dst (ReplicateS zero));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2094 format %{ "pxor $dst,$dst\t! replicate2S zero" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2095 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2096 __ pxor($dst$$XMMRegister, $dst$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2097 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2098 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2099 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2100
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2101 instruct Repl4S_zero(vecD dst, immI0 zero) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2102 predicate(n->as_Vector()->length() == 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2103 match(Set dst (ReplicateS zero));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2104 format %{ "pxor $dst,$dst\t! replicate4S zero" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2105 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2106 __ pxor($dst$$XMMRegister, $dst$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2107 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2108 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2109 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2110
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2111 instruct Repl8S_zero(vecX dst, immI0 zero) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2112 predicate(n->as_Vector()->length() == 8);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2113 match(Set dst (ReplicateS zero));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2114 format %{ "pxor $dst,$dst\t! replicate8S zero" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2115 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2116 __ pxor($dst$$XMMRegister, $dst$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2117 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2118 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2119 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2120
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2121 instruct Repl16S_zero(vecY dst, immI0 zero) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2122 predicate(n->as_Vector()->length() == 16);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2123 match(Set dst (ReplicateS zero));
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2124 format %{ "vpxor $dst,$dst,$dst\t! replicate16S zero" %}
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2125 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2126 // Use vxorpd since AVX does not have vpxor for 256-bit (AVX2 will have it).
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2127 bool vector256 = true;
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2128 __ vpxor($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister, vector256);
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2129 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2130 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2131 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2132
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2133 // Replicate integer (4 byte) scalar to be vector
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2134 instruct Repl2I(vecD dst, rRegI src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2135 predicate(n->as_Vector()->length() == 2);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2136 match(Set dst (ReplicateI src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2137 format %{ "movd $dst,$src\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2138 "pshufd $dst,$dst,0x00\t! replicate2I" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2139 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2140 __ movdl($dst$$XMMRegister, $src$$Register);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2141 __ pshufd($dst$$XMMRegister, $dst$$XMMRegister, 0x00);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2142 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2143 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2144 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2145
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2146 instruct Repl4I(vecX dst, rRegI src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2147 predicate(n->as_Vector()->length() == 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2148 match(Set dst (ReplicateI src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2149 format %{ "movd $dst,$src\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2150 "pshufd $dst,$dst,0x00\t! replicate4I" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2151 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2152 __ movdl($dst$$XMMRegister, $src$$Register);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2153 __ pshufd($dst$$XMMRegister, $dst$$XMMRegister, 0x00);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2154 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2155 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2156 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2157
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2158 instruct Repl8I(vecY dst, rRegI src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2159 predicate(n->as_Vector()->length() == 8);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2160 match(Set dst (ReplicateI src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2161 format %{ "movd $dst,$src\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2162 "pshufd $dst,$dst,0x00\n\t"
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2163 "vinserti128h $dst,$dst,$dst\t! replicate8I" %}
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2164 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2165 __ movdl($dst$$XMMRegister, $src$$Register);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2166 __ pshufd($dst$$XMMRegister, $dst$$XMMRegister, 0x00);
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2167 __ vinserti128h($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister);
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2168 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2169 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2170 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2171
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2172 // Replicate integer (4 byte) scalar immediate to be vector by loading from const table.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2173 instruct Repl2I_imm(vecD dst, immI con) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2174 predicate(n->as_Vector()->length() == 2);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2175 match(Set dst (ReplicateI con));
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2176 format %{ "movq $dst,[$constantaddress]\t! replicate2I($con)" %}
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2177 ins_encode %{
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2178 __ movq($dst$$XMMRegister, $constantaddress(replicate8_imm($con$$constant, 4)));
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2179 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2180 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2181 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2182
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2183 instruct Repl4I_imm(vecX dst, immI con) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2184 predicate(n->as_Vector()->length() == 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2185 match(Set dst (ReplicateI con));
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2186 format %{ "movq $dst,[$constantaddress]\t! replicate4I($con)\n\t"
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2187 "punpcklqdq $dst,$dst" %}
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2188 ins_encode %{
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2189 __ movq($dst$$XMMRegister, $constantaddress(replicate8_imm($con$$constant, 4)));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2190 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister);
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2191 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2192 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2193 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2194
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2195 instruct Repl8I_imm(vecY dst, immI con) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2196 predicate(n->as_Vector()->length() == 8);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2197 match(Set dst (ReplicateI con));
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2198 format %{ "movq $dst,[$constantaddress]\t! replicate8I($con)\n\t"
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2199 "punpcklqdq $dst,$dst\n\t"
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2200 "vinserti128h $dst,$dst,$dst" %}
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2201 ins_encode %{
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2202 __ movq($dst$$XMMRegister, $constantaddress(replicate8_imm($con$$constant, 4)));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2203 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister);
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2204 __ vinserti128h($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister);
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2205 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2206 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2207 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2208
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2209 // Integer could be loaded into xmm register directly from memory.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2210 instruct Repl2I_mem(vecD dst, memory mem) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2211 predicate(n->as_Vector()->length() == 2);
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2212 match(Set dst (ReplicateI (LoadI mem)));
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2213 format %{ "movd $dst,$mem\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2214 "pshufd $dst,$dst,0x00\t! replicate2I" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2215 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2216 __ movdl($dst$$XMMRegister, $mem$$Address);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2217 __ pshufd($dst$$XMMRegister, $dst$$XMMRegister, 0x00);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2218 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2219 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2220 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2221
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2222 instruct Repl4I_mem(vecX dst, memory mem) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2223 predicate(n->as_Vector()->length() == 4);
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2224 match(Set dst (ReplicateI (LoadI mem)));
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2225 format %{ "movd $dst,$mem\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2226 "pshufd $dst,$dst,0x00\t! replicate4I" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2227 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2228 __ movdl($dst$$XMMRegister, $mem$$Address);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2229 __ pshufd($dst$$XMMRegister, $dst$$XMMRegister, 0x00);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2230 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2231 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2232 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2233
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2234 instruct Repl8I_mem(vecY dst, memory mem) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2235 predicate(n->as_Vector()->length() == 8);
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2236 match(Set dst (ReplicateI (LoadI mem)));
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2237 format %{ "movd $dst,$mem\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2238 "pshufd $dst,$dst,0x00\n\t"
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2239 "vinserti128h $dst,$dst,$dst\t! replicate8I" %}
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2240 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2241 __ movdl($dst$$XMMRegister, $mem$$Address);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2242 __ pshufd($dst$$XMMRegister, $dst$$XMMRegister, 0x00);
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2243 __ vinserti128h($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister);
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2244 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2245 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2246 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2247
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2248 // Replicate integer (4 byte) scalar zero to be vector
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2249 instruct Repl2I_zero(vecD dst, immI0 zero) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2250 predicate(n->as_Vector()->length() == 2);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2251 match(Set dst (ReplicateI zero));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2252 format %{ "pxor $dst,$dst\t! replicate2I" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2253 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2254 __ pxor($dst$$XMMRegister, $dst$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2255 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2256 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2257 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2258
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2259 instruct Repl4I_zero(vecX dst, immI0 zero) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2260 predicate(n->as_Vector()->length() == 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2261 match(Set dst (ReplicateI zero));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2262 format %{ "pxor $dst,$dst\t! replicate4I zero)" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2263 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2264 __ pxor($dst$$XMMRegister, $dst$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2265 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2266 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2267 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2268
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2269 instruct Repl8I_zero(vecY dst, immI0 zero) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2270 predicate(n->as_Vector()->length() == 8);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2271 match(Set dst (ReplicateI zero));
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2272 format %{ "vpxor $dst,$dst,$dst\t! replicate8I zero" %}
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2273 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2274 // Use vxorpd since AVX does not have vpxor for 256-bit (AVX2 will have it).
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2275 bool vector256 = true;
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2276 __ vpxor($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister, vector256);
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2277 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2278 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2279 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2280
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2281 // Replicate long (8 byte) scalar to be vector
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2282 #ifdef _LP64
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2283 instruct Repl2L(vecX dst, rRegL src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2284 predicate(n->as_Vector()->length() == 2);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2285 match(Set dst (ReplicateL src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2286 format %{ "movdq $dst,$src\n\t"
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2287 "punpcklqdq $dst,$dst\t! replicate2L" %}
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2288 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2289 __ movdq($dst$$XMMRegister, $src$$Register);
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2290 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister);
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2291 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2292 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2293 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2294
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2295 instruct Repl4L(vecY dst, rRegL src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2296 predicate(n->as_Vector()->length() == 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2297 match(Set dst (ReplicateL src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2298 format %{ "movdq $dst,$src\n\t"
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2299 "punpcklqdq $dst,$dst\n\t"
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2300 "vinserti128h $dst,$dst,$dst\t! replicate4L" %}
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2301 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2302 __ movdq($dst$$XMMRegister, $src$$Register);
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2303 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister);
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2304 __ vinserti128h($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister);
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2305 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2306 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2307 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2308 #else // _LP64
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2309 instruct Repl2L(vecX dst, eRegL src, regD tmp) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2310 predicate(n->as_Vector()->length() == 2);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2311 match(Set dst (ReplicateL src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2312 effect(TEMP dst, USE src, TEMP tmp);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2313 format %{ "movdl $dst,$src.lo\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2314 "movdl $tmp,$src.hi\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2315 "punpckldq $dst,$tmp\n\t"
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2316 "punpcklqdq $dst,$dst\t! replicate2L"%}
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2317 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2318 __ movdl($dst$$XMMRegister, $src$$Register);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2319 __ movdl($tmp$$XMMRegister, HIGH_FROM_LOW($src$$Register));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2320 __ punpckldq($dst$$XMMRegister, $tmp$$XMMRegister);
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2321 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister);
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2322 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2323 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2324 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2325
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2326 instruct Repl4L(vecY dst, eRegL src, regD tmp) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2327 predicate(n->as_Vector()->length() == 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2328 match(Set dst (ReplicateL src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2329 effect(TEMP dst, USE src, TEMP tmp);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2330 format %{ "movdl $dst,$src.lo\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2331 "movdl $tmp,$src.hi\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2332 "punpckldq $dst,$tmp\n\t"
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2333 "punpcklqdq $dst,$dst\n\t"
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2334 "vinserti128h $dst,$dst,$dst\t! replicate4L" %}
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2335 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2336 __ movdl($dst$$XMMRegister, $src$$Register);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2337 __ movdl($tmp$$XMMRegister, HIGH_FROM_LOW($src$$Register));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2338 __ punpckldq($dst$$XMMRegister, $tmp$$XMMRegister);
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2339 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister);
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2340 __ vinserti128h($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister);
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2341 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2342 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2343 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2344 #endif // _LP64
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2345
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2346 // Replicate long (8 byte) scalar immediate to be vector by loading from const table.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2347 instruct Repl2L_imm(vecX dst, immL con) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2348 predicate(n->as_Vector()->length() == 2);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2349 match(Set dst (ReplicateL con));
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2350 format %{ "movq $dst,[$constantaddress]\n\t"
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2351 "punpcklqdq $dst,$dst\t! replicate2L($con)" %}
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2352 ins_encode %{
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2353 __ movq($dst$$XMMRegister, $constantaddress($con));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2354 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister);
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2355 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2356 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2357 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2358
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2359 instruct Repl4L_imm(vecY dst, immL con) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2360 predicate(n->as_Vector()->length() == 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2361 match(Set dst (ReplicateL con));
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2362 format %{ "movq $dst,[$constantaddress]\n\t"
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2363 "punpcklqdq $dst,$dst\n\t"
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2364 "vinserti128h $dst,$dst,$dst\t! replicate4L($con)" %}
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2365 ins_encode %{
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2366 __ movq($dst$$XMMRegister, $constantaddress($con));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2367 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister);
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2368 __ vinserti128h($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister);
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2369 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2370 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2371 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2372
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2373 // Long could be loaded into xmm register directly from memory.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2374 instruct Repl2L_mem(vecX dst, memory mem) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2375 predicate(n->as_Vector()->length() == 2);
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2376 match(Set dst (ReplicateL (LoadL mem)));
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2377 format %{ "movq $dst,$mem\n\t"
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2378 "punpcklqdq $dst,$dst\t! replicate2L" %}
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2379 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2380 __ movq($dst$$XMMRegister, $mem$$Address);
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2381 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister);
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2382 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2383 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2384 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2385
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2386 instruct Repl4L_mem(vecY dst, memory mem) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2387 predicate(n->as_Vector()->length() == 4);
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2388 match(Set dst (ReplicateL (LoadL mem)));
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2389 format %{ "movq $dst,$mem\n\t"
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2390 "punpcklqdq $dst,$dst\n\t"
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2391 "vinserti128h $dst,$dst,$dst\t! replicate4L" %}
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2392 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2393 __ movq($dst$$XMMRegister, $mem$$Address);
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2394 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister);
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2395 __ vinserti128h($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister);
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2396 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2397 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2398 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2399
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2400 // Replicate long (8 byte) scalar zero to be vector
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2401 instruct Repl2L_zero(vecX dst, immL0 zero) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2402 predicate(n->as_Vector()->length() == 2);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2403 match(Set dst (ReplicateL zero));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2404 format %{ "pxor $dst,$dst\t! replicate2L zero" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2405 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2406 __ pxor($dst$$XMMRegister, $dst$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2407 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2408 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2409 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2410
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2411 instruct Repl4L_zero(vecY dst, immL0 zero) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2412 predicate(n->as_Vector()->length() == 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2413 match(Set dst (ReplicateL zero));
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2414 format %{ "vpxor $dst,$dst,$dst\t! replicate4L zero" %}
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2415 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2416 // Use vxorpd since AVX does not have vpxor for 256-bit (AVX2 will have it).
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2417 bool vector256 = true;
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2418 __ vpxor($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister, vector256);
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2419 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2420 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2421 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2422
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2423 // Replicate float (4 byte) scalar to be vector
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2424 instruct Repl2F(vecD dst, regF src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2425 predicate(n->as_Vector()->length() == 2);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2426 match(Set dst (ReplicateF src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2427 format %{ "pshufd $dst,$dst,0x00\t! replicate2F" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2428 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2429 __ pshufd($dst$$XMMRegister, $src$$XMMRegister, 0x00);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2430 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2431 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2432 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2433
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2434 instruct Repl4F(vecX dst, regF src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2435 predicate(n->as_Vector()->length() == 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2436 match(Set dst (ReplicateF src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2437 format %{ "pshufd $dst,$dst,0x00\t! replicate4F" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2438 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2439 __ pshufd($dst$$XMMRegister, $src$$XMMRegister, 0x00);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2440 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2441 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2442 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2443
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2444 instruct Repl8F(vecY dst, regF src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2445 predicate(n->as_Vector()->length() == 8);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2446 match(Set dst (ReplicateF src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2447 format %{ "pshufd $dst,$src,0x00\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2448 "vinsertf128h $dst,$dst,$dst\t! replicate8F" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2449 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2450 __ pshufd($dst$$XMMRegister, $src$$XMMRegister, 0x00);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2451 __ vinsertf128h($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2452 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2453 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2454 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2455
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2456 // Replicate float (4 byte) scalar zero to be vector
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2457 instruct Repl2F_zero(vecD dst, immF0 zero) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2458 predicate(n->as_Vector()->length() == 2);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2459 match(Set dst (ReplicateF zero));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2460 format %{ "xorps $dst,$dst\t! replicate2F zero" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2461 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2462 __ xorps($dst$$XMMRegister, $dst$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2463 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2464 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2465 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2466
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2467 instruct Repl4F_zero(vecX dst, immF0 zero) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2468 predicate(n->as_Vector()->length() == 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2469 match(Set dst (ReplicateF zero));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2470 format %{ "xorps $dst,$dst\t! replicate4F zero" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2471 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2472 __ xorps($dst$$XMMRegister, $dst$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2473 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2474 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2475 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2476
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2477 instruct Repl8F_zero(vecY dst, immF0 zero) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2478 predicate(n->as_Vector()->length() == 8);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2479 match(Set dst (ReplicateF zero));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2480 format %{ "vxorps $dst,$dst,$dst\t! replicate8F zero" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2481 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2482 bool vector256 = true;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2483 __ vxorps($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister, vector256);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2484 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2485 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2486 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2487
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2488 // Replicate double (8 bytes) scalar to be vector
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2489 instruct Repl2D(vecX dst, regD src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2490 predicate(n->as_Vector()->length() == 2);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2491 match(Set dst (ReplicateD src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2492 format %{ "pshufd $dst,$src,0x44\t! replicate2D" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2493 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2494 __ pshufd($dst$$XMMRegister, $src$$XMMRegister, 0x44);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2495 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2496 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2497 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2498
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2499 instruct Repl4D(vecY dst, regD src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2500 predicate(n->as_Vector()->length() == 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2501 match(Set dst (ReplicateD src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2502 format %{ "pshufd $dst,$src,0x44\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2503 "vinsertf128h $dst,$dst,$dst\t! replicate4D" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2504 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2505 __ pshufd($dst$$XMMRegister, $src$$XMMRegister, 0x44);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2506 __ vinsertf128h($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2507 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2508 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2509 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2510
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2511 // Replicate double (8 byte) scalar zero to be vector
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2512 instruct Repl2D_zero(vecX dst, immD0 zero) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2513 predicate(n->as_Vector()->length() == 2);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2514 match(Set dst (ReplicateD zero));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2515 format %{ "xorpd $dst,$dst\t! replicate2D zero" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2516 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2517 __ xorpd($dst$$XMMRegister, $dst$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2518 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2519 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2520 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2521
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2522 instruct Repl4D_zero(vecY dst, immD0 zero) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2523 predicate(n->as_Vector()->length() == 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2524 match(Set dst (ReplicateD zero));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2525 format %{ "vxorpd $dst,$dst,$dst,vect256\t! replicate4D zero" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2526 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2527 bool vector256 = true;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2528 __ vxorpd($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister, vector256);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2529 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2530 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2531 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2532
6614
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2533 // ====================VECTOR ARITHMETIC=======================================
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2534
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2535 // --------------------------------- ADD --------------------------------------
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2536
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2537 // Bytes vector add
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2538 instruct vadd4B(vecS dst, vecS src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2539 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2540 match(Set dst (AddVB dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2541 format %{ "paddb $dst,$src\t! add packed4B" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2542 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2543 __ paddb($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2544 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2545 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2546 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2547
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2548 instruct vadd4B_reg(vecS dst, vecS src1, vecS src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2549 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2550 match(Set dst (AddVB src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2551 format %{ "vpaddb $dst,$src1,$src2\t! add packed4B" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2552 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2553 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2554 __ vpaddb($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2555 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2556 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2557 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2558
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2559 instruct vadd8B(vecD dst, vecD src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2560 predicate(n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2561 match(Set dst (AddVB dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2562 format %{ "paddb $dst,$src\t! add packed8B" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2563 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2564 __ paddb($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2565 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2566 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2567 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2568
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2569 instruct vadd8B_reg(vecD dst, vecD src1, vecD src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2570 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2571 match(Set dst (AddVB src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2572 format %{ "vpaddb $dst,$src1,$src2\t! add packed8B" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2573 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2574 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2575 __ vpaddb($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2576 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2577 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2578 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2579
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2580 instruct vadd16B(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2581 predicate(n->as_Vector()->length() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2582 match(Set dst (AddVB dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2583 format %{ "paddb $dst,$src\t! add packed16B" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2584 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2585 __ paddb($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2586 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2587 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2588 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2589
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2590 instruct vadd16B_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2591 predicate(UseAVX > 0 && n->as_Vector()->length() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2592 match(Set dst (AddVB src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2593 format %{ "vpaddb $dst,$src1,$src2\t! add packed16B" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2594 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2595 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2596 __ vpaddb($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2597 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2598 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2599 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2600
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2601 instruct vadd16B_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2602 predicate(UseAVX > 0 && n->as_Vector()->length() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2603 match(Set dst (AddVB src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2604 format %{ "vpaddb $dst,$src,$mem\t! add packed16B" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2605 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2606 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2607 __ vpaddb($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2608 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2609 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2610 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2611
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2612 instruct vadd32B_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2613 predicate(UseAVX > 1 && n->as_Vector()->length() == 32);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2614 match(Set dst (AddVB src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2615 format %{ "vpaddb $dst,$src1,$src2\t! add packed32B" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2616 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2617 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2618 __ vpaddb($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2619 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2620 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2621 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2622
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2623 instruct vadd32B_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2624 predicate(UseAVX > 1 && n->as_Vector()->length() == 32);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2625 match(Set dst (AddVB src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2626 format %{ "vpaddb $dst,$src,$mem\t! add packed32B" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2627 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2628 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2629 __ vpaddb($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2630 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2631 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2632 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2633
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2634 // Shorts/Chars vector add
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2635 instruct vadd2S(vecS dst, vecS src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2636 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2637 match(Set dst (AddVS dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2638 format %{ "paddw $dst,$src\t! add packed2S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2639 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2640 __ paddw($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2641 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2642 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2643 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2644
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2645 instruct vadd2S_reg(vecS dst, vecS src1, vecS src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2646 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2647 match(Set dst (AddVS src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2648 format %{ "vpaddw $dst,$src1,$src2\t! add packed2S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2649 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2650 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2651 __ vpaddw($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2652 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2653 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2654 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2655
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2656 instruct vadd4S(vecD dst, vecD src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2657 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2658 match(Set dst (AddVS dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2659 format %{ "paddw $dst,$src\t! add packed4S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2660 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2661 __ paddw($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2662 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2663 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2664 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2665
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2666 instruct vadd4S_reg(vecD dst, vecD src1, vecD src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2667 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2668 match(Set dst (AddVS src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2669 format %{ "vpaddw $dst,$src1,$src2\t! add packed4S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2670 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2671 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2672 __ vpaddw($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2673 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2674 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2675 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2676
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2677 instruct vadd8S(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2678 predicate(n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2679 match(Set dst (AddVS dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2680 format %{ "paddw $dst,$src\t! add packed8S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2681 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2682 __ paddw($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2683 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2684 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2685 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2686
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2687 instruct vadd8S_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2688 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2689 match(Set dst (AddVS src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2690 format %{ "vpaddw $dst,$src1,$src2\t! add packed8S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2691 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2692 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2693 __ vpaddw($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2694 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2695 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2696 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2697
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2698 instruct vadd8S_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2699 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2700 match(Set dst (AddVS src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2701 format %{ "vpaddw $dst,$src,$mem\t! add packed8S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2702 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2703 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2704 __ vpaddw($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2705 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2706 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2707 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2708
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2709 instruct vadd16S_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2710 predicate(UseAVX > 1 && n->as_Vector()->length() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2711 match(Set dst (AddVS src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2712 format %{ "vpaddw $dst,$src1,$src2\t! add packed16S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2713 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2714 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2715 __ vpaddw($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2716 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2717 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2718 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2719
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2720 instruct vadd16S_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2721 predicate(UseAVX > 1 && n->as_Vector()->length() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2722 match(Set dst (AddVS src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2723 format %{ "vpaddw $dst,$src,$mem\t! add packed16S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2724 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2725 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2726 __ vpaddw($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2727 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2728 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2729 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2730
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2731 // Integers vector add
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2732 instruct vadd2I(vecD dst, vecD src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2733 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2734 match(Set dst (AddVI dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2735 format %{ "paddd $dst,$src\t! add packed2I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2736 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2737 __ paddd($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2738 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2739 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2740 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2741
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2742 instruct vadd2I_reg(vecD dst, vecD src1, vecD src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2743 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2744 match(Set dst (AddVI src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2745 format %{ "vpaddd $dst,$src1,$src2\t! add packed2I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2746 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2747 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2748 __ vpaddd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2749 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2750 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2751 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2752
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2753 instruct vadd4I(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2754 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2755 match(Set dst (AddVI dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2756 format %{ "paddd $dst,$src\t! add packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2757 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2758 __ paddd($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2759 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2760 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2761 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2762
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2763 instruct vadd4I_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2764 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2765 match(Set dst (AddVI src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2766 format %{ "vpaddd $dst,$src1,$src2\t! add packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2767 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2768 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2769 __ vpaddd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2770 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2771 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2772 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2773
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2774 instruct vadd4I_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2775 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2776 match(Set dst (AddVI src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2777 format %{ "vpaddd $dst,$src,$mem\t! add packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2778 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2779 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2780 __ vpaddd($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2781 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2782 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2783 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2784
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2785 instruct vadd8I_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2786 predicate(UseAVX > 1 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2787 match(Set dst (AddVI src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2788 format %{ "vpaddd $dst,$src1,$src2\t! add packed8I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2789 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2790 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2791 __ vpaddd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2792 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2793 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2794 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2795
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2796 instruct vadd8I_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2797 predicate(UseAVX > 1 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2798 match(Set dst (AddVI src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2799 format %{ "vpaddd $dst,$src,$mem\t! add packed8I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2800 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2801 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2802 __ vpaddd($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2803 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2804 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2805 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2806
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2807 // Longs vector add
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2808 instruct vadd2L(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2809 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2810 match(Set dst (AddVL dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2811 format %{ "paddq $dst,$src\t! add packed2L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2812 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2813 __ paddq($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2814 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2815 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2816 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2817
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2818 instruct vadd2L_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2819 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2820 match(Set dst (AddVL src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2821 format %{ "vpaddq $dst,$src1,$src2\t! add packed2L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2822 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2823 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2824 __ vpaddq($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2825 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2826 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2827 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2828
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2829 instruct vadd2L_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2830 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2831 match(Set dst (AddVL src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2832 format %{ "vpaddq $dst,$src,$mem\t! add packed2L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2833 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2834 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2835 __ vpaddq($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2836 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2837 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2838 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2839
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2840 instruct vadd4L_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2841 predicate(UseAVX > 1 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2842 match(Set dst (AddVL src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2843 format %{ "vpaddq $dst,$src1,$src2\t! add packed4L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2844 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2845 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2846 __ vpaddq($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2847 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2848 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2849 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2850
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2851 instruct vadd4L_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2852 predicate(UseAVX > 1 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2853 match(Set dst (AddVL src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2854 format %{ "vpaddq $dst,$src,$mem\t! add packed4L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2855 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2856 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2857 __ vpaddq($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2858 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2859 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2860 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2861
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2862 // Floats vector add
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2863 instruct vadd2F(vecD dst, vecD src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2864 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2865 match(Set dst (AddVF dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2866 format %{ "addps $dst,$src\t! add packed2F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2867 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2868 __ addps($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2869 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2870 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2871 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2872
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2873 instruct vadd2F_reg(vecD dst, vecD src1, vecD src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2874 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2875 match(Set dst (AddVF src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2876 format %{ "vaddps $dst,$src1,$src2\t! add packed2F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2877 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2878 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2879 __ vaddps($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2880 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2881 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2882 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2883
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2884 instruct vadd4F(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2885 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2886 match(Set dst (AddVF dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2887 format %{ "addps $dst,$src\t! add packed4F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2888 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2889 __ addps($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2890 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2891 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2892 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2893
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2894 instruct vadd4F_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2895 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2896 match(Set dst (AddVF src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2897 format %{ "vaddps $dst,$src1,$src2\t! add packed4F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2898 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2899 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2900 __ vaddps($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2901 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2902 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2903 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2904
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2905 instruct vadd4F_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2906 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2907 match(Set dst (AddVF src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2908 format %{ "vaddps $dst,$src,$mem\t! add packed4F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2909 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2910 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2911 __ vaddps($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2912 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2913 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2914 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2915
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2916 instruct vadd8F_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2917 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2918 match(Set dst (AddVF src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2919 format %{ "vaddps $dst,$src1,$src2\t! add packed8F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2920 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2921 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2922 __ vaddps($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2923 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2924 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2925 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2926
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2927 instruct vadd8F_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2928 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2929 match(Set dst (AddVF src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2930 format %{ "vaddps $dst,$src,$mem\t! add packed8F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2931 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2932 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2933 __ vaddps($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2934 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2935 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2936 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2937
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2938 // Doubles vector add
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2939 instruct vadd2D(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2940 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2941 match(Set dst (AddVD dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2942 format %{ "addpd $dst,$src\t! add packed2D" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2943 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2944 __ addpd($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2945 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2946 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2947 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2948
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2949 instruct vadd2D_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2950 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2951 match(Set dst (AddVD src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2952 format %{ "vaddpd $dst,$src1,$src2\t! add packed2D" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2953 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2954 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2955 __ vaddpd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2956 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2957 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2958 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2959
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2960 instruct vadd2D_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2961 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2962 match(Set dst (AddVD src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2963 format %{ "vaddpd $dst,$src,$mem\t! add packed2D" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2964 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2965 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2966 __ vaddpd($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2967 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2968 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2969 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2970
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2971 instruct vadd4D_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2972 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2973 match(Set dst (AddVD src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2974 format %{ "vaddpd $dst,$src1,$src2\t! add packed4D" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2975 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2976 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2977 __ vaddpd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2978 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2979 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2980 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2981
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2982 instruct vadd4D_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2983 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2984 match(Set dst (AddVD src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2985 format %{ "vaddpd $dst,$src,$mem\t! add packed4D" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2986 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2987 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2988 __ vaddpd($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2989 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2990 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2991 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2992
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2993 // --------------------------------- SUB --------------------------------------
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2994
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2995 // Bytes vector sub
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2996 instruct vsub4B(vecS dst, vecS src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2997 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2998 match(Set dst (SubVB dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2999 format %{ "psubb $dst,$src\t! sub packed4B" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3000 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3001 __ psubb($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3002 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3003 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3004 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3005
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3006 instruct vsub4B_reg(vecS dst, vecS src1, vecS src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3007 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3008 match(Set dst (SubVB src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3009 format %{ "vpsubb $dst,$src1,$src2\t! sub packed4B" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3010 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3011 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3012 __ vpsubb($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3013 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3014 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3015 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3016
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3017 instruct vsub8B(vecD dst, vecD src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3018 predicate(n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3019 match(Set dst (SubVB dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3020 format %{ "psubb $dst,$src\t! sub packed8B" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3021 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3022 __ psubb($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3023 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3024 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3025 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3026
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3027 instruct vsub8B_reg(vecD dst, vecD src1, vecD src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3028 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3029 match(Set dst (SubVB src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3030 format %{ "vpsubb $dst,$src1,$src2\t! sub packed8B" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3031 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3032 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3033 __ vpsubb($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3034 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3035 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3036 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3037
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3038 instruct vsub16B(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3039 predicate(n->as_Vector()->length() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3040 match(Set dst (SubVB dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3041 format %{ "psubb $dst,$src\t! sub packed16B" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3042 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3043 __ psubb($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3044 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3045 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3046 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3047
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3048 instruct vsub16B_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3049 predicate(UseAVX > 0 && n->as_Vector()->length() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3050 match(Set dst (SubVB src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3051 format %{ "vpsubb $dst,$src1,$src2\t! sub packed16B" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3052 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3053 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3054 __ vpsubb($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3055 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3056 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3057 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3058
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3059 instruct vsub16B_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3060 predicate(UseAVX > 0 && n->as_Vector()->length() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3061 match(Set dst (SubVB src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3062 format %{ "vpsubb $dst,$src,$mem\t! sub packed16B" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3063 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3064 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3065 __ vpsubb($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3066 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3067 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3068 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3069
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3070 instruct vsub32B_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3071 predicate(UseAVX > 1 && n->as_Vector()->length() == 32);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3072 match(Set dst (SubVB src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3073 format %{ "vpsubb $dst,$src1,$src2\t! sub packed32B" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3074 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3075 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3076 __ vpsubb($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3077 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3078 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3079 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3080
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3081 instruct vsub32B_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3082 predicate(UseAVX > 1 && n->as_Vector()->length() == 32);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3083 match(Set dst (SubVB src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3084 format %{ "vpsubb $dst,$src,$mem\t! sub packed32B" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3085 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3086 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3087 __ vpsubb($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3088 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3089 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3090 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3091
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3092 // Shorts/Chars vector sub
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3093 instruct vsub2S(vecS dst, vecS src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3094 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3095 match(Set dst (SubVS dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3096 format %{ "psubw $dst,$src\t! sub packed2S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3097 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3098 __ psubw($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3099 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3100 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3101 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3102
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3103 instruct vsub2S_reg(vecS dst, vecS src1, vecS src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3104 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3105 match(Set dst (SubVS src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3106 format %{ "vpsubw $dst,$src1,$src2\t! sub packed2S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3107 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3108 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3109 __ vpsubw($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3110 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3111 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3112 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3113
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3114 instruct vsub4S(vecD dst, vecD src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3115 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3116 match(Set dst (SubVS dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3117 format %{ "psubw $dst,$src\t! sub packed4S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3118 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3119 __ psubw($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3120 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3121 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3122 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3123
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3124 instruct vsub4S_reg(vecD dst, vecD src1, vecD src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3125 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3126 match(Set dst (SubVS src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3127 format %{ "vpsubw $dst,$src1,$src2\t! sub packed4S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3128 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3129 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3130 __ vpsubw($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3131 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3132 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3133 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3134
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3135 instruct vsub8S(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3136 predicate(n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3137 match(Set dst (SubVS dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3138 format %{ "psubw $dst,$src\t! sub packed8S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3139 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3140 __ psubw($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3141 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3142 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3143 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3144
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3145 instruct vsub8S_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3146 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3147 match(Set dst (SubVS src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3148 format %{ "vpsubw $dst,$src1,$src2\t! sub packed8S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3149 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3150 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3151 __ vpsubw($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3152 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3153 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3154 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3155
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3156 instruct vsub8S_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3157 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3158 match(Set dst (SubVS src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3159 format %{ "vpsubw $dst,$src,$mem\t! sub packed8S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3160 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3161 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3162 __ vpsubw($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3163 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3164 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3165 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3166
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3167 instruct vsub16S_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3168 predicate(UseAVX > 1 && n->as_Vector()->length() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3169 match(Set dst (SubVS src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3170 format %{ "vpsubw $dst,$src1,$src2\t! sub packed16S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3171 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3172 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3173 __ vpsubw($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3174 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3175 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3176 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3177
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3178 instruct vsub16S_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3179 predicate(UseAVX > 1 && n->as_Vector()->length() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3180 match(Set dst (SubVS src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3181 format %{ "vpsubw $dst,$src,$mem\t! sub packed16S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3182 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3183 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3184 __ vpsubw($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3185 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3186 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3187 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3188
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3189 // Integers vector sub
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3190 instruct vsub2I(vecD dst, vecD src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3191 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3192 match(Set dst (SubVI dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3193 format %{ "psubd $dst,$src\t! sub packed2I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3194 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3195 __ psubd($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3196 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3197 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3198 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3199
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3200 instruct vsub2I_reg(vecD dst, vecD src1, vecD src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3201 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3202 match(Set dst (SubVI src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3203 format %{ "vpsubd $dst,$src1,$src2\t! sub packed2I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3204 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3205 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3206 __ vpsubd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3207 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3208 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3209 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3210
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3211 instruct vsub4I(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3212 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3213 match(Set dst (SubVI dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3214 format %{ "psubd $dst,$src\t! sub packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3215 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3216 __ psubd($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3217 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3218 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3219 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3220
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3221 instruct vsub4I_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3222 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3223 match(Set dst (SubVI src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3224 format %{ "vpsubd $dst,$src1,$src2\t! sub packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3225 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3226 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3227 __ vpsubd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3228 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3229 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3230 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3231
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3232 instruct vsub4I_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3233 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3234 match(Set dst (SubVI src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3235 format %{ "vpsubd $dst,$src,$mem\t! sub packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3236 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3237 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3238 __ vpsubd($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3239 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3240 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3241 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3242
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3243 instruct vsub8I_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3244 predicate(UseAVX > 1 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3245 match(Set dst (SubVI src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3246 format %{ "vpsubd $dst,$src1,$src2\t! sub packed8I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3247 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3248 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3249 __ vpsubd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3250 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3251 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3252 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3253
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3254 instruct vsub8I_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3255 predicate(UseAVX > 1 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3256 match(Set dst (SubVI src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3257 format %{ "vpsubd $dst,$src,$mem\t! sub packed8I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3258 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3259 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3260 __ vpsubd($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3261 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3262 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3263 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3264
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3265 // Longs vector sub
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3266 instruct vsub2L(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3267 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3268 match(Set dst (SubVL dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3269 format %{ "psubq $dst,$src\t! sub packed2L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3270 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3271 __ psubq($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3272 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3273 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3274 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3275
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3276 instruct vsub2L_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3277 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3278 match(Set dst (SubVL src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3279 format %{ "vpsubq $dst,$src1,$src2\t! sub packed2L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3280 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3281 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3282 __ vpsubq($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3283 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3284 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3285 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3286
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3287 instruct vsub2L_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3288 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3289 match(Set dst (SubVL src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3290 format %{ "vpsubq $dst,$src,$mem\t! sub packed2L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3291 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3292 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3293 __ vpsubq($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3294 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3295 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3296 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3297
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3298 instruct vsub4L_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3299 predicate(UseAVX > 1 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3300 match(Set dst (SubVL src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3301 format %{ "vpsubq $dst,$src1,$src2\t! sub packed4L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3302 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3303 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3304 __ vpsubq($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3305 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3306 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3307 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3308
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3309 instruct vsub4L_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3310 predicate(UseAVX > 1 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3311 match(Set dst (SubVL src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3312 format %{ "vpsubq $dst,$src,$mem\t! sub packed4L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3313 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3314 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3315 __ vpsubq($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3316 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3317 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3318 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3319
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3320 // Floats vector sub
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3321 instruct vsub2F(vecD dst, vecD src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3322 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3323 match(Set dst (SubVF dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3324 format %{ "subps $dst,$src\t! sub packed2F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3325 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3326 __ subps($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3327 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3328 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3329 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3330
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3331 instruct vsub2F_reg(vecD dst, vecD src1, vecD src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3332 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3333 match(Set dst (SubVF src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3334 format %{ "vsubps $dst,$src1,$src2\t! sub packed2F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3335 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3336 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3337 __ vsubps($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3338 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3339 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3340 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3341
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3342 instruct vsub4F(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3343 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3344 match(Set dst (SubVF dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3345 format %{ "subps $dst,$src\t! sub packed4F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3346 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3347 __ subps($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3348 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3349 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3350 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3351
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3352 instruct vsub4F_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3353 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3354 match(Set dst (SubVF src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3355 format %{ "vsubps $dst,$src1,$src2\t! sub packed4F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3356 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3357 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3358 __ vsubps($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3359 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3360 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3361 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3362
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3363 instruct vsub4F_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3364 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3365 match(Set dst (SubVF src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3366 format %{ "vsubps $dst,$src,$mem\t! sub packed4F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3367 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3368 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3369 __ vsubps($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3370 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3371 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3372 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3373
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3374 instruct vsub8F_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3375 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3376 match(Set dst (SubVF src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3377 format %{ "vsubps $dst,$src1,$src2\t! sub packed8F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3378 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3379 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3380 __ vsubps($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3381 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3382 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3383 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3384
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3385 instruct vsub8F_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3386 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3387 match(Set dst (SubVF src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3388 format %{ "vsubps $dst,$src,$mem\t! sub packed8F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3389 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3390 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3391 __ vsubps($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3392 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3393 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3394 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3395
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3396 // Doubles vector sub
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3397 instruct vsub2D(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3398 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3399 match(Set dst (SubVD dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3400 format %{ "subpd $dst,$src\t! sub packed2D" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3401 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3402 __ subpd($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3403 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3404 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3405 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3406
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3407 instruct vsub2D_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3408 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3409 match(Set dst (SubVD src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3410 format %{ "vsubpd $dst,$src1,$src2\t! sub packed2D" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3411 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3412 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3413 __ vsubpd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3414 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3415 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3416 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3417
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3418 instruct vsub2D_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3419 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3420 match(Set dst (SubVD src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3421 format %{ "vsubpd $dst,$src,$mem\t! sub packed2D" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3422 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3423 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3424 __ vsubpd($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3425 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3426 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3427 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3428
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3429 instruct vsub4D_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3430 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3431 match(Set dst (SubVD src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3432 format %{ "vsubpd $dst,$src1,$src2\t! sub packed4D" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3433 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3434 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3435 __ vsubpd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3436 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3437 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3438 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3439
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3440 instruct vsub4D_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3441 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3442 match(Set dst (SubVD src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3443 format %{ "vsubpd $dst,$src,$mem\t! sub packed4D" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3444 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3445 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3446 __ vsubpd($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3447 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3448 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3449 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3450
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3451 // --------------------------------- MUL --------------------------------------
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3452
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3453 // Shorts/Chars vector mul
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3454 instruct vmul2S(vecS dst, vecS src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3455 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3456 match(Set dst (MulVS dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3457 format %{ "pmullw $dst,$src\t! mul packed2S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3458 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3459 __ pmullw($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3460 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3461 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3462 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3463
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3464 instruct vmul2S_reg(vecS dst, vecS src1, vecS src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3465 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3466 match(Set dst (MulVS src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3467 format %{ "vpmullw $dst,$src1,$src2\t! mul packed2S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3468 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3469 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3470 __ vpmullw($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3471 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3472 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3473 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3474
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3475 instruct vmul4S(vecD dst, vecD src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3476 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3477 match(Set dst (MulVS dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3478 format %{ "pmullw $dst,$src\t! mul packed4S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3479 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3480 __ pmullw($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3481 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3482 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3483 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3484
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3485 instruct vmul4S_reg(vecD dst, vecD src1, vecD src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3486 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3487 match(Set dst (MulVS src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3488 format %{ "vpmullw $dst,$src1,$src2\t! mul packed4S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3489 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3490 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3491 __ vpmullw($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3492 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3493 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3494 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3495
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3496 instruct vmul8S(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3497 predicate(n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3498 match(Set dst (MulVS dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3499 format %{ "pmullw $dst,$src\t! mul packed8S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3500 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3501 __ pmullw($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3502 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3503 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3504 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3505
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3506 instruct vmul8S_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3507 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3508 match(Set dst (MulVS src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3509 format %{ "vpmullw $dst,$src1,$src2\t! mul packed8S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3510 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3511 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3512 __ vpmullw($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3513 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3514 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3515 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3516
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3517 instruct vmul8S_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3518 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3519 match(Set dst (MulVS src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3520 format %{ "vpmullw $dst,$src,$mem\t! mul packed8S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3521 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3522 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3523 __ vpmullw($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3524 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3525 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3526 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3527
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3528 instruct vmul16S_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3529 predicate(UseAVX > 1 && n->as_Vector()->length() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3530 match(Set dst (MulVS src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3531 format %{ "vpmullw $dst,$src1,$src2\t! mul packed16S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3532 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3533 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3534 __ vpmullw($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3535 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3536 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3537 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3538
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3539 instruct vmul16S_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3540 predicate(UseAVX > 1 && n->as_Vector()->length() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3541 match(Set dst (MulVS src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3542 format %{ "vpmullw $dst,$src,$mem\t! mul packed16S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3543 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3544 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3545 __ vpmullw($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3546 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3547 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3548 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3549
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3550 // Integers vector mul (sse4_1)
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3551 instruct vmul2I(vecD dst, vecD src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3552 predicate(UseSSE > 3 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3553 match(Set dst (MulVI dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3554 format %{ "pmulld $dst,$src\t! mul packed2I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3555 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3556 __ pmulld($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3557 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3558 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3559 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3560
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3561 instruct vmul2I_reg(vecD dst, vecD src1, vecD src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3562 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3563 match(Set dst (MulVI src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3564 format %{ "vpmulld $dst,$src1,$src2\t! mul packed2I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3565 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3566 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3567 __ vpmulld($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3568 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3569 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3570 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3571
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3572 instruct vmul4I(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3573 predicate(UseSSE > 3 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3574 match(Set dst (MulVI dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3575 format %{ "pmulld $dst,$src\t! mul packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3576 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3577 __ pmulld($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3578 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3579 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3580 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3581
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3582 instruct vmul4I_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3583 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3584 match(Set dst (MulVI src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3585 format %{ "vpmulld $dst,$src1,$src2\t! mul packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3586 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3587 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3588 __ vpmulld($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3589 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3590 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3591 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3592
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3593 instruct vmul4I_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3594 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3595 match(Set dst (MulVI src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3596 format %{ "vpmulld $dst,$src,$mem\t! mul packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3597 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3598 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3599 __ vpmulld($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3600 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3601 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3602 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3603
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3604 instruct vmul8I_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3605 predicate(UseAVX > 1 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3606 match(Set dst (MulVI src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3607 format %{ "vpmulld $dst,$src1,$src2\t! mul packed8I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3608 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3609 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3610 __ vpmulld($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3611 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3612 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3613 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3614
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3615 instruct vmul8I_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3616 predicate(UseAVX > 1 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3617 match(Set dst (MulVI src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3618 format %{ "vpmulld $dst,$src,$mem\t! mul packed8I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3619 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3620 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3621 __ vpmulld($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3622 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3623 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3624 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3625
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3626 // Floats vector mul
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3627 instruct vmul2F(vecD dst, vecD src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3628 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3629 match(Set dst (MulVF dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3630 format %{ "mulps $dst,$src\t! mul packed2F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3631 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3632 __ mulps($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3633 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3634 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3635 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3636
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3637 instruct vmul2F_reg(vecD dst, vecD src1, vecD src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3638 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3639 match(Set dst (MulVF src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3640 format %{ "vmulps $dst,$src1,$src2\t! mul packed2F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3641 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3642 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3643 __ vmulps($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3644 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3645 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3646 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3647
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3648 instruct vmul4F(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3649 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3650 match(Set dst (MulVF dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3651 format %{ "mulps $dst,$src\t! mul packed4F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3652 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3653 __ mulps($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3654 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3655 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3656 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3657
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3658 instruct vmul4F_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3659 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3660 match(Set dst (MulVF src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3661 format %{ "vmulps $dst,$src1,$src2\t! mul packed4F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3662 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3663 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3664 __ vmulps($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3665 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3666 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3667 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3668
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3669 instruct vmul4F_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3670 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3671 match(Set dst (MulVF src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3672 format %{ "vmulps $dst,$src,$mem\t! mul packed4F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3673 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3674 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3675 __ vmulps($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3676 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3677 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3678 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3679
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3680 instruct vmul8F_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3681 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3682 match(Set dst (MulVF src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3683 format %{ "vmulps $dst,$src1,$src2\t! mul packed8F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3684 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3685 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3686 __ vmulps($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3687 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3688 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3689 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3690
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3691 instruct vmul8F_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3692 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3693 match(Set dst (MulVF src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3694 format %{ "vmulps $dst,$src,$mem\t! mul packed8F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3695 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3696 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3697 __ vmulps($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3698 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3699 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3700 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3701
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3702 // Doubles vector mul
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3703 instruct vmul2D(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3704 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3705 match(Set dst (MulVD dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3706 format %{ "mulpd $dst,$src\t! mul packed2D" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3707 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3708 __ mulpd($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3709 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3710 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3711 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3712
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3713 instruct vmul2D_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3714 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3715 match(Set dst (MulVD src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3716 format %{ "vmulpd $dst,$src1,$src2\t! mul packed2D" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3717 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3718 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3719 __ vmulpd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3720 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3721 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3722 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3723
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3724 instruct vmul2D_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3725 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3726 match(Set dst (MulVD src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3727 format %{ "vmulpd $dst,$src,$mem\t! mul packed2D" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3728 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3729 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3730 __ vmulpd($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3731 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3732 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3733 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3734
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3735 instruct vmul4D_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3736 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3737 match(Set dst (MulVD src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3738 format %{ "vmulpd $dst,$src1,$src2\t! mul packed4D" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3739 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3740 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3741 __ vmulpd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3742 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3743 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3744 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3745
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3746 instruct vmul4D_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3747 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3748 match(Set dst (MulVD src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3749 format %{ "vmulpd $dst,$src,$mem\t! mul packed4D" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3750 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3751 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3752 __ vmulpd($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3753 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3754 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3755 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3756
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3757 // --------------------------------- DIV --------------------------------------
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3758
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3759 // Floats vector div
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3760 instruct vdiv2F(vecD dst, vecD src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3761 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3762 match(Set dst (DivVF dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3763 format %{ "divps $dst,$src\t! div packed2F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3764 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3765 __ divps($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3766 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3767 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3768 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3769
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3770 instruct vdiv2F_reg(vecD dst, vecD src1, vecD src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3771 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3772 match(Set dst (DivVF src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3773 format %{ "vdivps $dst,$src1,$src2\t! div packed2F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3774 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3775 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3776 __ vdivps($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3777 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3778 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3779 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3780
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3781 instruct vdiv4F(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3782 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3783 match(Set dst (DivVF dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3784 format %{ "divps $dst,$src\t! div packed4F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3785 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3786 __ divps($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3787 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3788 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3789 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3790
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3791 instruct vdiv4F_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3792 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3793 match(Set dst (DivVF src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3794 format %{ "vdivps $dst,$src1,$src2\t! div packed4F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3795 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3796 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3797 __ vdivps($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3798 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3799 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3800 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3801
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3802 instruct vdiv4F_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3803 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3804 match(Set dst (DivVF src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3805 format %{ "vdivps $dst,$src,$mem\t! div packed4F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3806 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3807 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3808 __ vdivps($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3809 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3810 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3811 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3812
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3813 instruct vdiv8F_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3814 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3815 match(Set dst (DivVF src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3816 format %{ "vdivps $dst,$src1,$src2\t! div packed8F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3817 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3818 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3819 __ vdivps($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3820 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3821 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3822 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3823
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3824 instruct vdiv8F_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3825 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3826 match(Set dst (DivVF src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3827 format %{ "vdivps $dst,$src,$mem\t! div packed8F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3828 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3829 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3830 __ vdivps($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3831 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3832 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3833 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3834
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3835 // Doubles vector div
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3836 instruct vdiv2D(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3837 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3838 match(Set dst (DivVD dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3839 format %{ "divpd $dst,$src\t! div packed2D" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3840 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3841 __ divpd($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3842 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3843 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3844 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3845
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3846 instruct vdiv2D_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3847 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3848 match(Set dst (DivVD src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3849 format %{ "vdivpd $dst,$src1,$src2\t! div packed2D" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3850 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3851 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3852 __ vdivpd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3853 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3854 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3855 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3856
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3857 instruct vdiv2D_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3858 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3859 match(Set dst (DivVD src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3860 format %{ "vdivpd $dst,$src,$mem\t! div packed2D" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3861 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3862 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3863 __ vdivpd($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3864 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3865 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3866 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3867
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3868 instruct vdiv4D_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3869 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3870 match(Set dst (DivVD src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3871 format %{ "vdivpd $dst,$src1,$src2\t! div packed4D" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3872 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3873 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3874 __ vdivpd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3875 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3876 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3877 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3878
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3879 instruct vdiv4D_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3880 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3881 match(Set dst (DivVD src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3882 format %{ "vdivpd $dst,$src,$mem\t! div packed4D" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3883 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3884 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3885 __ vdivpd($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3886 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3887 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3888 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3889
6823
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
3890 // ------------------------------ Shift ---------------------------------------
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
3891
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
3892 // Left and right shift count vectors are the same on x86
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
3893 // (only lowest bits of xmm reg are used for count).
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
3894 instruct vshiftcnt(vecS dst, rRegI cnt) %{
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
3895 match(Set dst (LShiftCntV cnt));
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
3896 match(Set dst (RShiftCntV cnt));
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
3897 format %{ "movd $dst,$cnt\t! load shift count" %}
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
3898 ins_encode %{
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
3899 __ movdl($dst$$XMMRegister, $cnt$$Register);
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
3900 %}
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
3901 ins_pipe( pipe_slow );
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
3902 %}
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
3903
6614
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3904 // ------------------------------ LeftShift -----------------------------------
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3905
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3906 // Shorts/Chars vector left shift
6823
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
3907 instruct vsll2S(vecS dst, vecS shift) %{
6614
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3908 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3909 match(Set dst (LShiftVS dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3910 format %{ "psllw $dst,$shift\t! left shift packed2S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3911 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3912 __ psllw($dst$$XMMRegister, $shift$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3913 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3914 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3915 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3916
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3917 instruct vsll2S_imm(vecS dst, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3918 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3919 match(Set dst (LShiftVS dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3920 format %{ "psllw $dst,$shift\t! left shift packed2S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3921 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3922 __ psllw($dst$$XMMRegister, (int)$shift$$constant);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3923 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3924 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3925 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3926
6823
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
3927 instruct vsll2S_reg(vecS dst, vecS src, vecS shift) %{
6614
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3928 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3929 match(Set dst (LShiftVS src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3930 format %{ "vpsllw $dst,$src,$shift\t! left shift packed2S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3931 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3932 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3933 __ vpsllw($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3934 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3935 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3936 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3937
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3938 instruct vsll2S_reg_imm(vecS dst, vecS src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3939 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3940 match(Set dst (LShiftVS src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3941 format %{ "vpsllw $dst,$src,$shift\t! left shift packed2S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3942 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3943 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3944 __ vpsllw($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3945 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3946 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3947 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3948
6823
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
3949 instruct vsll4S(vecD dst, vecS shift) %{
6614
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3950 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3951 match(Set dst (LShiftVS dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3952 format %{ "psllw $dst,$shift\t! left shift packed4S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3953 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3954 __ psllw($dst$$XMMRegister, $shift$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3955 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3956 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3957 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3958
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3959 instruct vsll4S_imm(vecD dst, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3960 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3961 match(Set dst (LShiftVS dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3962 format %{ "psllw $dst,$shift\t! left shift packed4S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3963 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3964 __ psllw($dst$$XMMRegister, (int)$shift$$constant);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3965 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3966 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3967 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3968
6823
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
3969 instruct vsll4S_reg(vecD dst, vecD src, vecS shift) %{
6614
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3970 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3971 match(Set dst (LShiftVS src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3972 format %{ "vpsllw $dst,$src,$shift\t! left shift packed4S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3973 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3974 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3975 __ vpsllw($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3976 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3977 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3978 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3979
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3980 instruct vsll4S_reg_imm(vecD dst, vecD src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3981 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3982 match(Set dst (LShiftVS src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3983 format %{ "vpsllw $dst,$src,$shift\t! left shift packed4S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3984 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3985 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3986 __ vpsllw($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3987 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3988 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3989 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3990
6823
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
3991 instruct vsll8S(vecX dst, vecS shift) %{
6614
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3992 predicate(n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3993 match(Set dst (LShiftVS dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3994 format %{ "psllw $dst,$shift\t! left shift packed8S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3995 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3996 __ psllw($dst$$XMMRegister, $shift$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3997 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3998 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3999 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4000
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4001 instruct vsll8S_imm(vecX dst, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4002 predicate(n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4003 match(Set dst (LShiftVS dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4004 format %{ "psllw $dst,$shift\t! left shift packed8S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4005 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4006 __ psllw($dst$$XMMRegister, (int)$shift$$constant);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4007 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4008 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4009 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4010
6823
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
4011 instruct vsll8S_reg(vecX dst, vecX src, vecS shift) %{
6614
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4012 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4013 match(Set dst (LShiftVS src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4014 format %{ "vpsllw $dst,$src,$shift\t! left shift packed8S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4015 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4016 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4017 __ vpsllw($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4018 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4019 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4020 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4021
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4022 instruct vsll8S_reg_imm(vecX dst, vecX src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4023 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4024 match(Set dst (LShiftVS src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4025 format %{ "vpsllw $dst,$src,$shift\t! left shift packed8S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4026 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4027 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4028 __ vpsllw($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4029 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4030 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4031 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4032
6823
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
4033 instruct vsll16S_reg(vecY dst, vecY src, vecS shift) %{
6614
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4034 predicate(UseAVX > 1 && n->as_Vector()->length() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4035 match(Set dst (LShiftVS src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4036 format %{ "vpsllw $dst,$src,$shift\t! left shift packed16S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4037 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4038 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4039 __ vpsllw($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4040 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4041 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4042 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4043
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4044 instruct vsll16S_reg_imm(vecY dst, vecY src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4045 predicate(UseAVX > 1 && n->as_Vector()->length() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4046 match(Set dst (LShiftVS src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4047 format %{ "vpsllw $dst,$src,$shift\t! left shift packed16S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4048 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4049 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4050 __ vpsllw($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4051 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4052 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4053 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4054
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4055 // Integers vector left shift
6823
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
4056 instruct vsll2I(vecD dst, vecS shift) %{
6614
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4057 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4058 match(Set dst (LShiftVI dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4059 format %{ "pslld $dst,$shift\t! left shift packed2I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4060 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4061 __ pslld($dst$$XMMRegister, $shift$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4062 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4063 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4064 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4065
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4066 instruct vsll2I_imm(vecD dst, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4067 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4068 match(Set dst (LShiftVI dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4069 format %{ "pslld $dst,$shift\t! left shift packed2I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4070 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4071 __ pslld($dst$$XMMRegister, (int)$shift$$constant);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4072 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4073 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4074 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4075
6823
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
4076 instruct vsll2I_reg(vecD dst, vecD src, vecS shift) %{
6614
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4077 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4078 match(Set dst (LShiftVI src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4079 format %{ "vpslld $dst,$src,$shift\t! left shift packed2I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4080 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4081 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4082 __ vpslld($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4083 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4084 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4085 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4086
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4087 instruct vsll2I_reg_imm(vecD dst, vecD src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4088 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4089 match(Set dst (LShiftVI src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4090 format %{ "vpslld $dst,$src,$shift\t! left shift packed2I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4091 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4092 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4093 __ vpslld($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4094 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4095 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4096 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4097
6823
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
4098 instruct vsll4I(vecX dst, vecS shift) %{
6614
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4099 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4100 match(Set dst (LShiftVI dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4101 format %{ "pslld $dst,$shift\t! left shift packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4102 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4103 __ pslld($dst$$XMMRegister, $shift$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4104 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4105 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4106 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4107
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4108 instruct vsll4I_imm(vecX dst, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4109 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4110 match(Set dst (LShiftVI dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4111 format %{ "pslld $dst,$shift\t! left shift packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4112 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4113 __ pslld($dst$$XMMRegister, (int)$shift$$constant);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4114 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4115 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4116 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4117
6823
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
4118 instruct vsll4I_reg(vecX dst, vecX src, vecS shift) %{
6614
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4119 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4120 match(Set dst (LShiftVI src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4121 format %{ "vpslld $dst,$src,$shift\t! left shift packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4122 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4123 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4124 __ vpslld($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4125 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4126 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4127 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4128
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4129 instruct vsll4I_reg_imm(vecX dst, vecX src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4130 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4131 match(Set dst (LShiftVI src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4132 format %{ "vpslld $dst,$src,$shift\t! left shift packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4133 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4134 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4135 __ vpslld($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4136 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4137 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4138 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4139
6823
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
4140 instruct vsll8I_reg(vecY dst, vecY src, vecS shift) %{
6614
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4141 predicate(UseAVX > 1 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4142 match(Set dst (LShiftVI src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4143 format %{ "vpslld $dst,$src,$shift\t! left shift packed8I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4144 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4145 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4146 __ vpslld($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4147 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4148 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4149 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4150
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4151 instruct vsll8I_reg_imm(vecY dst, vecY src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4152 predicate(UseAVX > 1 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4153 match(Set dst (LShiftVI src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4154 format %{ "vpslld $dst,$src,$shift\t! left shift packed8I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4155 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4156 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4157 __ vpslld($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4158 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4159 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4160 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4161
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4162 // Longs vector left shift
6823
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
4163 instruct vsll2L(vecX dst, vecS shift) %{
6614
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4164 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4165 match(Set dst (LShiftVL dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4166 format %{ "psllq $dst,$shift\t! left shift packed2L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4167 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4168 __ psllq($dst$$XMMRegister, $shift$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4169 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4170 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4171 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4172
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4173 instruct vsll2L_imm(vecX dst, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4174 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4175 match(Set dst (LShiftVL dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4176 format %{ "psllq $dst,$shift\t! left shift packed2L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4177 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4178 __ psllq($dst$$XMMRegister, (int)$shift$$constant);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4179 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4180 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4181 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4182
6823
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
4183 instruct vsll2L_reg(vecX dst, vecX src, vecS shift) %{
6614
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4184 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4185 match(Set dst (LShiftVL src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4186 format %{ "vpsllq $dst,$src,$shift\t! left shift packed2L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4187 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4188 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4189 __ vpsllq($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4190 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4191 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4192 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4193
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4194 instruct vsll2L_reg_imm(vecX dst, vecX src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4195 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4196 match(Set dst (LShiftVL src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4197 format %{ "vpsllq $dst,$src,$shift\t! left shift packed2L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4198 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4199 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4200 __ vpsllq($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4201 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4202 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4203 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4204
6823
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
4205 instruct vsll4L_reg(vecY dst, vecY src, vecS shift) %{
6614
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4206 predicate(UseAVX > 1 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4207 match(Set dst (LShiftVL src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4208 format %{ "vpsllq $dst,$src,$shift\t! left shift packed4L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4209 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4210 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4211 __ vpsllq($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4212 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4213 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4214 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4215
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4216 instruct vsll4L_reg_imm(vecY dst, vecY src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4217 predicate(UseAVX > 1 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4218 match(Set dst (LShiftVL src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4219 format %{ "vpsllq $dst,$src,$shift\t! left shift packed4L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4220 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4221 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4222 __ vpsllq($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4223 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4224 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4225 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4226
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4227 // ----------------------- LogicalRightShift -----------------------------------
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4228
6893
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4229 // Shorts vector logical right shift produces incorrect Java result
6614
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4230 // for negative data because java code convert short value into int with
6893
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4231 // sign extension before a shift. But char vectors are fine since chars are
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4232 // unsigned values.
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4233
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4234 instruct vsrl2S(vecS dst, vecS shift) %{
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4235 predicate(n->as_Vector()->length() == 2);
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4236 match(Set dst (URShiftVS dst shift));
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4237 format %{ "psrlw $dst,$shift\t! logical right shift packed2S" %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4238 ins_encode %{
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4239 __ psrlw($dst$$XMMRegister, $shift$$XMMRegister);
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4240 %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4241 ins_pipe( pipe_slow );
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4242 %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4243
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4244 instruct vsrl2S_imm(vecS dst, immI8 shift) %{
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4245 predicate(n->as_Vector()->length() == 2);
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4246 match(Set dst (URShiftVS dst shift));
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4247 format %{ "psrlw $dst,$shift\t! logical right shift packed2S" %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4248 ins_encode %{
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4249 __ psrlw($dst$$XMMRegister, (int)$shift$$constant);
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4250 %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4251 ins_pipe( pipe_slow );
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4252 %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4253
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4254 instruct vsrl2S_reg(vecS dst, vecS src, vecS shift) %{
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4255 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4256 match(Set dst (URShiftVS src shift));
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4257 format %{ "vpsrlw $dst,$src,$shift\t! logical right shift packed2S" %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4258 ins_encode %{
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4259 bool vector256 = false;
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4260 __ vpsrlw($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4261 %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4262 ins_pipe( pipe_slow );
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4263 %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4264
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4265 instruct vsrl2S_reg_imm(vecS dst, vecS src, immI8 shift) %{
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4266 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4267 match(Set dst (URShiftVS src shift));
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4268 format %{ "vpsrlw $dst,$src,$shift\t! logical right shift packed2S" %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4269 ins_encode %{
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4270 bool vector256 = false;
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4271 __ vpsrlw($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4272 %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4273 ins_pipe( pipe_slow );
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4274 %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4275
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4276 instruct vsrl4S(vecD dst, vecS shift) %{
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4277 predicate(n->as_Vector()->length() == 4);
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4278 match(Set dst (URShiftVS dst shift));
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4279 format %{ "psrlw $dst,$shift\t! logical right shift packed4S" %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4280 ins_encode %{
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4281 __ psrlw($dst$$XMMRegister, $shift$$XMMRegister);
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4282 %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4283 ins_pipe( pipe_slow );
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4284 %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4285
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4286 instruct vsrl4S_imm(vecD dst, immI8 shift) %{
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4287 predicate(n->as_Vector()->length() == 4);
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4288 match(Set dst (URShiftVS dst shift));
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4289 format %{ "psrlw $dst,$shift\t! logical right shift packed4S" %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4290 ins_encode %{
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4291 __ psrlw($dst$$XMMRegister, (int)$shift$$constant);
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4292 %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4293 ins_pipe( pipe_slow );
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4294 %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4295
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4296 instruct vsrl4S_reg(vecD dst, vecD src, vecS shift) %{
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4297 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4298 match(Set dst (URShiftVS src shift));
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4299 format %{ "vpsrlw $dst,$src,$shift\t! logical right shift packed4S" %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4300 ins_encode %{
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4301 bool vector256 = false;
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4302 __ vpsrlw($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4303 %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4304 ins_pipe( pipe_slow );
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4305 %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4306
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4307 instruct vsrl4S_reg_imm(vecD dst, vecD src, immI8 shift) %{
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4308 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4309 match(Set dst (URShiftVS src shift));
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4310 format %{ "vpsrlw $dst,$src,$shift\t! logical right shift packed4S" %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4311 ins_encode %{
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4312 bool vector256 = false;
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4313 __ vpsrlw($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4314 %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4315 ins_pipe( pipe_slow );
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4316 %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4317
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4318 instruct vsrl8S(vecX dst, vecS shift) %{
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4319 predicate(n->as_Vector()->length() == 8);
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4320 match(Set dst (URShiftVS dst shift));
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4321 format %{ "psrlw $dst,$shift\t! logical right shift packed8S" %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4322 ins_encode %{
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4323 __ psrlw($dst$$XMMRegister, $shift$$XMMRegister);
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4324 %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4325 ins_pipe( pipe_slow );
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4326 %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4327
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4328 instruct vsrl8S_imm(vecX dst, immI8 shift) %{
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4329 predicate(n->as_Vector()->length() == 8);
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4330 match(Set dst (URShiftVS dst shift));
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4331 format %{ "psrlw $dst,$shift\t! logical right shift packed8S" %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4332 ins_encode %{
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4333 __ psrlw($dst$$XMMRegister, (int)$shift$$constant);
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4334 %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4335 ins_pipe( pipe_slow );
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4336 %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4337
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4338 instruct vsrl8S_reg(vecX dst, vecX src, vecS shift) %{
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4339 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4340 match(Set dst (URShiftVS src shift));
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4341 format %{ "vpsrlw $dst,$src,$shift\t! logical right shift packed8S" %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4342 ins_encode %{
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4343 bool vector256 = false;
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4344 __ vpsrlw($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4345 %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4346 ins_pipe( pipe_slow );
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4347 %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4348
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4349 instruct vsrl8S_reg_imm(vecX dst, vecX src, immI8 shift) %{
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4350 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4351 match(Set dst (URShiftVS src shift));
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4352 format %{ "vpsrlw $dst,$src,$shift\t! logical right shift packed8S" %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4353 ins_encode %{
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4354 bool vector256 = false;
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4355 __ vpsrlw($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4356 %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4357 ins_pipe( pipe_slow );
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4358 %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4359
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4360 instruct vsrl16S_reg(vecY dst, vecY src, vecS shift) %{
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4361 predicate(UseAVX > 1 && n->as_Vector()->length() == 16);
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4362 match(Set dst (URShiftVS src shift));
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4363 format %{ "vpsrlw $dst,$src,$shift\t! logical right shift packed16S" %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4364 ins_encode %{
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4365 bool vector256 = true;
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4366 __ vpsrlw($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4367 %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4368 ins_pipe( pipe_slow );
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4369 %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4370
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4371 instruct vsrl16S_reg_imm(vecY dst, vecY src, immI8 shift) %{
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4372 predicate(UseAVX > 1 && n->as_Vector()->length() == 16);
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4373 match(Set dst (URShiftVS src shift));
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4374 format %{ "vpsrlw $dst,$src,$shift\t! logical right shift packed16S" %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4375 ins_encode %{
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4376 bool vector256 = true;
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4377 __ vpsrlw($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4378 %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4379 ins_pipe( pipe_slow );
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4380 %}
6614
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4381
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4382 // Integers vector logical right shift
6823
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
4383 instruct vsrl2I(vecD dst, vecS shift) %{
6614
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4384 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4385 match(Set dst (URShiftVI dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4386 format %{ "psrld $dst,$shift\t! logical right shift packed2I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4387 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4388 __ psrld($dst$$XMMRegister, $shift$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4389 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4390 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4391 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4392
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4393 instruct vsrl2I_imm(vecD dst, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4394 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4395 match(Set dst (URShiftVI dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4396 format %{ "psrld $dst,$shift\t! logical right shift packed2I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4397 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4398 __ psrld($dst$$XMMRegister, (int)$shift$$constant);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4399 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4400 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4401 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4402
6823
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
4403 instruct vsrl2I_reg(vecD dst, vecD src, vecS shift) %{
6614
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4404 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4405 match(Set dst (URShiftVI src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4406 format %{ "vpsrld $dst,$src,$shift\t! logical right shift packed2I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4407 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4408 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4409 __ vpsrld($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4410 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4411 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4412 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4413
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4414 instruct vsrl2I_reg_imm(vecD dst, vecD src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4415 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4416 match(Set dst (URShiftVI src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4417 format %{ "vpsrld $dst,$src,$shift\t! logical right shift packed2I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4418 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4419 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4420 __ vpsrld($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4421 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4422 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4423 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4424
6823
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
4425 instruct vsrl4I(vecX dst, vecS shift) %{
6614
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4426 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4427 match(Set dst (URShiftVI dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4428 format %{ "psrld $dst,$shift\t! logical right shift packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4429 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4430 __ psrld($dst$$XMMRegister, $shift$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4431 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4432 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4433 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4434
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4435 instruct vsrl4I_imm(vecX dst, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4436 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4437 match(Set dst (URShiftVI dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4438 format %{ "psrld $dst,$shift\t! logical right shift packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4439 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4440 __ psrld($dst$$XMMRegister, (int)$shift$$constant);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4441 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4442 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4443 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4444
6823
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
4445 instruct vsrl4I_reg(vecX dst, vecX src, vecS shift) %{
6614
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4446 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4447 match(Set dst (URShiftVI src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4448 format %{ "vpsrld $dst,$src,$shift\t! logical right shift packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4449 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4450 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4451 __ vpsrld($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4452 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4453 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4454 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4455
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4456 instruct vsrl4I_reg_imm(vecX dst, vecX src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4457 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4458 match(Set dst (URShiftVI src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4459 format %{ "vpsrld $dst,$src,$shift\t! logical right shift packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4460 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4461 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4462 __ vpsrld($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4463 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4464 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4465 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4466
6823
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
4467 instruct vsrl8I_reg(vecY dst, vecY src, vecS shift) %{
6614
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4468 predicate(UseAVX > 1 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4469 match(Set dst (URShiftVI src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4470 format %{ "vpsrld $dst,$src,$shift\t! logical right shift packed8I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4471 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4472 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4473 __ vpsrld($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4474 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4475 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4476 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4477
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4478 instruct vsrl8I_reg_imm(vecY dst, vecY src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4479 predicate(UseAVX > 1 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4480 match(Set dst (URShiftVI src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4481 format %{ "vpsrld $dst,$src,$shift\t! logical right shift packed8I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4482 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4483 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4484 __ vpsrld($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4485 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4486 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4487 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4488
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4489 // Longs vector logical right shift
6823
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
4490 instruct vsrl2L(vecX dst, vecS shift) %{
6614
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4491 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4492 match(Set dst (URShiftVL dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4493 format %{ "psrlq $dst,$shift\t! logical right shift packed2L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4494 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4495 __ psrlq($dst$$XMMRegister, $shift$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4496 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4497 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4498 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4499
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4500 instruct vsrl2L_imm(vecX dst, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4501 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4502 match(Set dst (URShiftVL dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4503 format %{ "psrlq $dst,$shift\t! logical right shift packed2L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4504 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4505 __ psrlq($dst$$XMMRegister, (int)$shift$$constant);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4506 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4507 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4508 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4509
6823
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
4510 instruct vsrl2L_reg(vecX dst, vecX src, vecS shift) %{
6614
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4511 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4512 match(Set dst (URShiftVL src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4513 format %{ "vpsrlq $dst,$src,$shift\t! logical right shift packed2L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4514 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4515 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4516 __ vpsrlq($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4517 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4518 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4519 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4520
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4521 instruct vsrl2L_reg_imm(vecX dst, vecX src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4522 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4523 match(Set dst (URShiftVL src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4524 format %{ "vpsrlq $dst,$src,$shift\t! logical right shift packed2L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4525 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4526 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4527 __ vpsrlq($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4528 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4529 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4530 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4531
6823
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
4532 instruct vsrl4L_reg(vecY dst, vecY src, vecS shift) %{
6614
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4533 predicate(UseAVX > 1 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4534 match(Set dst (URShiftVL src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4535 format %{ "vpsrlq $dst,$src,$shift\t! logical right shift packed4L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4536 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4537 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4538 __ vpsrlq($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4539 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4540 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4541 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4542
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4543 instruct vsrl4L_reg_imm(vecY dst, vecY src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4544 predicate(UseAVX > 1 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4545 match(Set dst (URShiftVL src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4546 format %{ "vpsrlq $dst,$src,$shift\t! logical right shift packed4L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4547 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4548 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4549 __ vpsrlq($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4550 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4551 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4552 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4553
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4554 // ------------------- ArithmeticRightShift -----------------------------------
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4555
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4556 // Shorts/Chars vector arithmetic right shift
6823
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
4557 instruct vsra2S(vecS dst, vecS shift) %{
6614
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4558 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4559 match(Set dst (RShiftVS dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4560 format %{ "psraw $dst,$shift\t! arithmetic right shift packed2S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4561 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4562 __ psraw($dst$$XMMRegister, $shift$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4563 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4564 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4565 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4566
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4567 instruct vsra2S_imm(vecS dst, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4568 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4569 match(Set dst (RShiftVS dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4570 format %{ "psraw $dst,$shift\t! arithmetic right shift packed2S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4571 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4572 __ psraw($dst$$XMMRegister, (int)$shift$$constant);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4573 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4574 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4575 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4576
6823
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
4577 instruct vsra2S_reg(vecS dst, vecS src, vecS shift) %{
6614
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4578 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4579 match(Set dst (RShiftVS src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4580 format %{ "vpsraw $dst,$src,$shift\t! arithmetic right shift packed2S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4581 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4582 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4583 __ vpsraw($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4584 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4585 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4586 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4587
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4588 instruct vsra2S_reg_imm(vecS dst, vecS src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4589 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4590 match(Set dst (RShiftVS src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4591 format %{ "vpsraw $dst,$src,$shift\t! arithmetic right shift packed2S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4592 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4593 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4594 __ vpsraw($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4595 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4596 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4597 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4598
6823
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
4599 instruct vsra4S(vecD dst, vecS shift) %{
6614
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4600 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4601 match(Set dst (RShiftVS dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4602 format %{ "psraw $dst,$shift\t! arithmetic right shift packed4S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4603 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4604 __ psraw($dst$$XMMRegister, $shift$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4605 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4606 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4607 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4608
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4609 instruct vsra4S_imm(vecD dst, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4610 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4611 match(Set dst (RShiftVS dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4612 format %{ "psraw $dst,$shift\t! arithmetic right shift packed4S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4613 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4614 __ psraw($dst$$XMMRegister, (int)$shift$$constant);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4615 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4616 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4617 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4618
6823
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
4619 instruct vsra4S_reg(vecD dst, vecD src, vecS shift) %{
6614
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4620 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4621 match(Set dst (RShiftVS src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4622 format %{ "vpsraw $dst,$src,$shift\t! arithmetic right shift packed4S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4623 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4624 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4625 __ vpsraw($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4626 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4627 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4628 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4629
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4630 instruct vsra4S_reg_imm(vecD dst, vecD src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4631 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4632 match(Set dst (RShiftVS src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4633 format %{ "vpsraw $dst,$src,$shift\t! arithmetic right shift packed4S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4634 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4635 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4636 __ vpsraw($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4637 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4638 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4639 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4640
6823
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
4641 instruct vsra8S(vecX dst, vecS shift) %{
6614
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4642 predicate(n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4643 match(Set dst (RShiftVS dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4644 format %{ "psraw $dst,$shift\t! arithmetic right shift packed8S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4645 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4646 __ psraw($dst$$XMMRegister, $shift$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4647 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4648 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4649 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4650
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4651 instruct vsra8S_imm(vecX dst, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4652 predicate(n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4653 match(Set dst (RShiftVS dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4654 format %{ "psraw $dst,$shift\t! arithmetic right shift packed8S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4655 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4656 __ psraw($dst$$XMMRegister, (int)$shift$$constant);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4657 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4658 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4659 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4660
6823
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
4661 instruct vsra8S_reg(vecX dst, vecX src, vecS shift) %{
6614
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4662 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4663 match(Set dst (RShiftVS src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4664 format %{ "vpsraw $dst,$src,$shift\t! arithmetic right shift packed8S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4665 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4666 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4667 __ vpsraw($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4668 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4669 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4670 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4671
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4672 instruct vsra8S_reg_imm(vecX dst, vecX src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4673 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4674 match(Set dst (RShiftVS src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4675 format %{ "vpsraw $dst,$src,$shift\t! arithmetic right shift packed8S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4676 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4677 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4678 __ vpsraw($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4679 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4680 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4681 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4682
6823
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
4683 instruct vsra16S_reg(vecY dst, vecY src, vecS shift) %{
6614
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4684 predicate(UseAVX > 1 && n->as_Vector()->length() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4685 match(Set dst (RShiftVS src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4686 format %{ "vpsraw $dst,$src,$shift\t! arithmetic right shift packed16S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4687 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4688 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4689 __ vpsraw($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4690 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4691 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4692 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4693
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4694 instruct vsra16S_reg_imm(vecY dst, vecY src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4695 predicate(UseAVX > 1 && n->as_Vector()->length() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4696 match(Set dst (RShiftVS src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4697 format %{ "vpsraw $dst,$src,$shift\t! arithmetic right shift packed16S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4698 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4699 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4700 __ vpsraw($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4701 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4702 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4703 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4704
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4705 // Integers vector arithmetic right shift
6823
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
4706 instruct vsra2I(vecD dst, vecS shift) %{
6614
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4707 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4708 match(Set dst (RShiftVI dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4709 format %{ "psrad $dst,$shift\t! arithmetic right shift packed2I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4710 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4711 __ psrad($dst$$XMMRegister, $shift$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4712 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4713 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4714 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4715
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4716 instruct vsra2I_imm(vecD dst, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4717 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4718 match(Set dst (RShiftVI dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4719 format %{ "psrad $dst,$shift\t! arithmetic right shift packed2I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4720 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4721 __ psrad($dst$$XMMRegister, (int)$shift$$constant);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4722 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4723 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4724 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4725
6823
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
4726 instruct vsra2I_reg(vecD dst, vecD src, vecS shift) %{
6614
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4727 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4728 match(Set dst (RShiftVI src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4729 format %{ "vpsrad $dst,$src,$shift\t! arithmetic right shift packed2I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4730 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4731 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4732 __ vpsrad($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4733 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4734 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4735 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4736
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4737 instruct vsra2I_reg_imm(vecD dst, vecD src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4738 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4739 match(Set dst (RShiftVI src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4740 format %{ "vpsrad $dst,$src,$shift\t! arithmetic right shift packed2I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4741 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4742 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4743 __ vpsrad($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4744 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4745 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4746 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4747
6823
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
4748 instruct vsra4I(vecX dst, vecS shift) %{
6614
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4749 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4750 match(Set dst (RShiftVI dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4751 format %{ "psrad $dst,$shift\t! arithmetic right shift packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4752 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4753 __ psrad($dst$$XMMRegister, $shift$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4754 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4755 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4756 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4757
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4758 instruct vsra4I_imm(vecX dst, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4759 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4760 match(Set dst (RShiftVI dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4761 format %{ "psrad $dst,$shift\t! arithmetic right shift packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4762 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4763 __ psrad($dst$$XMMRegister, (int)$shift$$constant);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4764 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4765 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4766 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4767
6823
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
4768 instruct vsra4I_reg(vecX dst, vecX src, vecS shift) %{
6614
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4769 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4770 match(Set dst (RShiftVI src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4771 format %{ "vpsrad $dst,$src,$shift\t! arithmetic right shift packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4772 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4773 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4774 __ vpsrad($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4775 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4776 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4777 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4778
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4779 instruct vsra4I_reg_imm(vecX dst, vecX src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4780 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4781 match(Set dst (RShiftVI src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4782 format %{ "vpsrad $dst,$src,$shift\t! arithmetic right shift packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4783 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4784 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4785 __ vpsrad($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4786 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4787 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4788 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4789
6823
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
4790 instruct vsra8I_reg(vecY dst, vecY src, vecS shift) %{
6614
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4791 predicate(UseAVX > 1 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4792 match(Set dst (RShiftVI src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4793 format %{ "vpsrad $dst,$src,$shift\t! arithmetic right shift packed8I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4794 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4795 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4796 __ vpsrad($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4797 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4798 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4799 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4800
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4801 instruct vsra8I_reg_imm(vecY dst, vecY src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4802 predicate(UseAVX > 1 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4803 match(Set dst (RShiftVI src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4804 format %{ "vpsrad $dst,$src,$shift\t! arithmetic right shift packed8I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4805 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4806 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4807 __ vpsrad($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4808 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4809 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4810 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4811
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4812 // There are no longs vector arithmetic right shift instructions.
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4813
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4814
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4815 // --------------------------------- AND --------------------------------------
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4816
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4817 instruct vand4B(vecS dst, vecS src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4818 predicate(n->as_Vector()->length_in_bytes() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4819 match(Set dst (AndV dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4820 format %{ "pand $dst,$src\t! and vectors (4 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4821 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4822 __ pand($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4823 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4824 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4825 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4826
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4827 instruct vand4B_reg(vecS dst, vecS src1, vecS src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4828 predicate(UseAVX > 0 && n->as_Vector()->length_in_bytes() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4829 match(Set dst (AndV src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4830 format %{ "vpand $dst,$src1,$src2\t! and vectors (4 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4831 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4832 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4833 __ vpand($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4834 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4835 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4836 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4837
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4838 instruct vand8B(vecD dst, vecD src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4839 predicate(n->as_Vector()->length_in_bytes() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4840 match(Set dst (AndV dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4841 format %{ "pand $dst,$src\t! and vectors (8 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4842 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4843 __ pand($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4844 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4845 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4846 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4847
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4848 instruct vand8B_reg(vecD dst, vecD src1, vecD src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4849 predicate(UseAVX > 0 && n->as_Vector()->length_in_bytes() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4850 match(Set dst (AndV src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4851 format %{ "vpand $dst,$src1,$src2\t! and vectors (8 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4852 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4853 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4854 __ vpand($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4855 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4856 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4857 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4858
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4859 instruct vand16B(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4860 predicate(n->as_Vector()->length_in_bytes() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4861 match(Set dst (AndV dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4862 format %{ "pand $dst,$src\t! and vectors (16 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4863 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4864 __ pand($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4865 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4866 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4867 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4868
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4869 instruct vand16B_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4870 predicate(UseAVX > 0 && n->as_Vector()->length_in_bytes() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4871 match(Set dst (AndV src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4872 format %{ "vpand $dst,$src1,$src2\t! and vectors (16 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4873 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4874 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4875 __ vpand($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4876 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4877 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4878 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4879
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4880 instruct vand16B_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4881 predicate(UseAVX > 0 && n->as_Vector()->length_in_bytes() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4882 match(Set dst (AndV src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4883 format %{ "vpand $dst,$src,$mem\t! and vectors (16 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4884 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4885 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4886 __ vpand($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4887 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4888 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4889 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4890
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4891 instruct vand32B_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4892 predicate(UseAVX > 1 && n->as_Vector()->length_in_bytes() == 32);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4893 match(Set dst (AndV src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4894 format %{ "vpand $dst,$src1,$src2\t! and vectors (32 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4895 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4896 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4897 __ vpand($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4898 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4899 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4900 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4901
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4902 instruct vand32B_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4903 predicate(UseAVX > 1 && n->as_Vector()->length_in_bytes() == 32);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4904 match(Set dst (AndV src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4905 format %{ "vpand $dst,$src,$mem\t! and vectors (32 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4906 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4907 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4908 __ vpand($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4909 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4910 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4911 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4912
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4913 // --------------------------------- OR ---------------------------------------
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4914
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4915 instruct vor4B(vecS dst, vecS src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4916 predicate(n->as_Vector()->length_in_bytes() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4917 match(Set dst (OrV dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4918 format %{ "por $dst,$src\t! or vectors (4 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4919 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4920 __ por($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4921 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4922 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4923 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4924
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4925 instruct vor4B_reg(vecS dst, vecS src1, vecS src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4926 predicate(UseAVX > 0 && n->as_Vector()->length_in_bytes() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4927 match(Set dst (OrV src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4928 format %{ "vpor $dst,$src1,$src2\t! or vectors (4 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4929 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4930 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4931 __ vpor($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4932 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4933 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4934 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4935
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4936 instruct vor8B(vecD dst, vecD src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4937 predicate(n->as_Vector()->length_in_bytes() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4938 match(Set dst (OrV dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4939 format %{ "por $dst,$src\t! or vectors (8 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4940 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4941 __ por($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4942 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4943 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4944 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4945
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4946 instruct vor8B_reg(vecD dst, vecD src1, vecD src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4947 predicate(UseAVX > 0 && n->as_Vector()->length_in_bytes() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4948 match(Set dst (OrV src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4949 format %{ "vpor $dst,$src1,$src2\t! or vectors (8 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4950 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4951 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4952 __ vpor($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4953 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4954 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4955 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4956
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4957 instruct vor16B(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4958 predicate(n->as_Vector()->length_in_bytes() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4959 match(Set dst (OrV dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4960 format %{ "por $dst,$src\t! or vectors (16 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4961 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4962 __ por($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4963 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4964 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4965 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4966
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4967 instruct vor16B_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4968 predicate(UseAVX > 0 && n->as_Vector()->length_in_bytes() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4969 match(Set dst (OrV src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4970 format %{ "vpor $dst,$src1,$src2\t! or vectors (16 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4971 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4972 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4973 __ vpor($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4974 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4975 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4976 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4977
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4978 instruct vor16B_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4979 predicate(UseAVX > 0 && n->as_Vector()->length_in_bytes() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4980 match(Set dst (OrV src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4981 format %{ "vpor $dst,$src,$mem\t! or vectors (16 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4982 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4983 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4984 __ vpor($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4985 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4986 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4987 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4988
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4989 instruct vor32B_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4990 predicate(UseAVX > 1 && n->as_Vector()->length_in_bytes() == 32);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4991 match(Set dst (OrV src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4992 format %{ "vpor $dst,$src1,$src2\t! or vectors (32 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4993 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4994 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4995 __ vpor($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4996 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4997 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4998 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4999
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5000 instruct vor32B_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5001 predicate(UseAVX > 1 && n->as_Vector()->length_in_bytes() == 32);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5002 match(Set dst (OrV src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5003 format %{ "vpor $dst,$src,$mem\t! or vectors (32 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5004 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5005 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5006 __ vpor($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5007 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5008 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5009 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5010
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5011 // --------------------------------- XOR --------------------------------------
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5012
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5013 instruct vxor4B(vecS dst, vecS src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5014 predicate(n->as_Vector()->length_in_bytes() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5015 match(Set dst (XorV dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5016 format %{ "pxor $dst,$src\t! xor vectors (4 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5017 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5018 __ pxor($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5019 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5020 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5021 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5022
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5023 instruct vxor4B_reg(vecS dst, vecS src1, vecS src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5024 predicate(UseAVX > 0 && n->as_Vector()->length_in_bytes() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5025 match(Set dst (XorV src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5026 format %{ "vpxor $dst,$src1,$src2\t! xor vectors (4 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5027 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5028 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5029 __ vpxor($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5030 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5031 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5032 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5033
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5034 instruct vxor8B(vecD dst, vecD src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5035 predicate(n->as_Vector()->length_in_bytes() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5036 match(Set dst (XorV dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5037 format %{ "pxor $dst,$src\t! xor vectors (8 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5038 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5039 __ pxor($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5040 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5041 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5042 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5043
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5044 instruct vxor8B_reg(vecD dst, vecD src1, vecD src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5045 predicate(UseAVX > 0 && n->as_Vector()->length_in_bytes() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5046 match(Set dst (XorV src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5047 format %{ "vpxor $dst,$src1,$src2\t! xor vectors (8 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5048 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5049 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5050 __ vpxor($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5051 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5052 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5053 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5054
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5055 instruct vxor16B(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5056 predicate(n->as_Vector()->length_in_bytes() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5057 match(Set dst (XorV dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5058 format %{ "pxor $dst,$src\t! xor vectors (16 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5059 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5060 __ pxor($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5061 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5062 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5063 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5064
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5065 instruct vxor16B_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5066 predicate(UseAVX > 0 && n->as_Vector()->length_in_bytes() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5067 match(Set dst (XorV src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5068 format %{ "vpxor $dst,$src1,$src2\t! xor vectors (16 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5069 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5070 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5071 __ vpxor($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5072 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5073 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5074 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5075
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5076 instruct vxor16B_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5077 predicate(UseAVX > 0 && n->as_Vector()->length_in_bytes() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5078 match(Set dst (XorV src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5079 format %{ "vpxor $dst,$src,$mem\t! xor vectors (16 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5080 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5081 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5082 __ vpxor($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5083 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5084 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5085 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5086
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5087 instruct vxor32B_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5088 predicate(UseAVX > 1 && n->as_Vector()->length_in_bytes() == 32);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5089 match(Set dst (XorV src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5090 format %{ "vpxor $dst,$src1,$src2\t! xor vectors (32 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5091 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5092 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5093 __ vpxor($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5094 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5095 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5096 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5097
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5098 instruct vxor32B_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5099 predicate(UseAVX > 1 && n->as_Vector()->length_in_bytes() == 32);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5100 match(Set dst (XorV src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5101 format %{ "vpxor $dst,$src,$mem\t! xor vectors (32 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5102 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5103 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5104 __ vpxor($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5105 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5106 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5107 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5108