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annotate src/cpu/x86/vm/c1_LIRGenerator_x86.cpp @ 3101:6ccb95c97e6d
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author | Peter Hofer <peter.hofer@jku.at> |
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date | Thu, 30 Jun 2011 12:17:27 +0200 |
parents | f966c66b5463 |
children | e1162778c1c8 |
rev | line source |
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0 | 1 /* |
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2 * Copyright (c) 2005, 2011, Oracle and/or its affiliates. All rights reserved. |
0 | 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
4 * | |
5 * This code is free software; you can redistribute it and/or modify it | |
6 * under the terms of the GNU General Public License version 2 only, as | |
7 * published by the Free Software Foundation. | |
8 * | |
9 * This code is distributed in the hope that it will be useful, but WITHOUT | |
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
12 * version 2 for more details (a copy is included in the LICENSE file that | |
13 * accompanied this code). | |
14 * | |
15 * You should have received a copy of the GNU General Public License version | |
16 * 2 along with this work; if not, write to the Free Software Foundation, | |
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
18 * | |
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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20 * or visit www.oracle.com if you need additional information or have any |
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21 * questions. |
0 | 22 * |
23 */ | |
24 | |
1972 | 25 #include "precompiled.hpp" |
26 #include "c1/c1_Compilation.hpp" | |
27 #include "c1/c1_FrameMap.hpp" | |
28 #include "c1/c1_Instruction.hpp" | |
29 #include "c1/c1_LIRAssembler.hpp" | |
30 #include "c1/c1_LIRGenerator.hpp" | |
31 #include "c1/c1_Runtime1.hpp" | |
32 #include "c1/c1_ValueStack.hpp" | |
33 #include "ci/ciArray.hpp" | |
34 #include "ci/ciObjArrayKlass.hpp" | |
35 #include "ci/ciTypeArrayKlass.hpp" | |
36 #include "runtime/sharedRuntime.hpp" | |
37 #include "runtime/stubRoutines.hpp" | |
38 #include "vmreg_x86.inline.hpp" | |
0 | 39 |
40 #ifdef ASSERT | |
41 #define __ gen()->lir(__FILE__, __LINE__)-> | |
42 #else | |
43 #define __ gen()->lir()-> | |
44 #endif | |
45 | |
46 // Item will be loaded into a byte register; Intel only | |
47 void LIRItem::load_byte_item() { | |
48 load_item(); | |
49 LIR_Opr res = result(); | |
50 | |
51 if (!res->is_virtual() || !_gen->is_vreg_flag_set(res, LIRGenerator::byte_reg)) { | |
52 // make sure that it is a byte register | |
53 assert(!value()->type()->is_float() && !value()->type()->is_double(), | |
54 "can't load floats in byte register"); | |
55 LIR_Opr reg = _gen->rlock_byte(T_BYTE); | |
56 __ move(res, reg); | |
57 | |
58 _result = reg; | |
59 } | |
60 } | |
61 | |
62 | |
63 void LIRItem::load_nonconstant() { | |
64 LIR_Opr r = value()->operand(); | |
65 if (r->is_constant()) { | |
66 _result = r; | |
67 } else { | |
68 load_item(); | |
69 } | |
70 } | |
71 | |
72 //-------------------------------------------------------------- | |
73 // LIRGenerator | |
74 //-------------------------------------------------------------- | |
75 | |
76 | |
77 LIR_Opr LIRGenerator::exceptionOopOpr() { return FrameMap::rax_oop_opr; } | |
78 LIR_Opr LIRGenerator::exceptionPcOpr() { return FrameMap::rdx_opr; } | |
79 LIR_Opr LIRGenerator::divInOpr() { return FrameMap::rax_opr; } | |
80 LIR_Opr LIRGenerator::divOutOpr() { return FrameMap::rax_opr; } | |
81 LIR_Opr LIRGenerator::remOutOpr() { return FrameMap::rdx_opr; } | |
82 LIR_Opr LIRGenerator::shiftCountOpr() { return FrameMap::rcx_opr; } | |
83 LIR_Opr LIRGenerator::syncTempOpr() { return FrameMap::rax_opr; } | |
84 LIR_Opr LIRGenerator::getThreadTemp() { return LIR_OprFact::illegalOpr; } | |
85 | |
86 | |
87 LIR_Opr LIRGenerator::result_register_for(ValueType* type, bool callee) { | |
88 LIR_Opr opr; | |
89 switch (type->tag()) { | |
90 case intTag: opr = FrameMap::rax_opr; break; | |
91 case objectTag: opr = FrameMap::rax_oop_opr; break; | |
304 | 92 case longTag: opr = FrameMap::long0_opr; break; |
0 | 93 case floatTag: opr = UseSSE >= 1 ? FrameMap::xmm0_float_opr : FrameMap::fpu0_float_opr; break; |
94 case doubleTag: opr = UseSSE >= 2 ? FrameMap::xmm0_double_opr : FrameMap::fpu0_double_opr; break; | |
95 | |
96 case addressTag: | |
97 default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr; | |
98 } | |
99 | |
100 assert(opr->type_field() == as_OprType(as_BasicType(type)), "type mismatch"); | |
101 return opr; | |
102 } | |
103 | |
104 | |
105 LIR_Opr LIRGenerator::rlock_byte(BasicType type) { | |
106 LIR_Opr reg = new_register(T_INT); | |
107 set_vreg_flag(reg, LIRGenerator::byte_reg); | |
108 return reg; | |
109 } | |
110 | |
111 | |
112 //--------- loading items into registers -------------------------------- | |
113 | |
114 | |
115 // i486 instructions can inline constants | |
116 bool LIRGenerator::can_store_as_constant(Value v, BasicType type) const { | |
117 if (type == T_SHORT || type == T_CHAR) { | |
118 // there is no immediate move of word values in asembler_i486.?pp | |
119 return false; | |
120 } | |
121 Constant* c = v->as_Constant(); | |
1819 | 122 if (c && c->state_before() == NULL) { |
0 | 123 // constants of any type can be stored directly, except for |
124 // unloaded object constants. | |
125 return true; | |
126 } | |
127 return false; | |
128 } | |
129 | |
130 | |
131 bool LIRGenerator::can_inline_as_constant(Value v) const { | |
304 | 132 if (v->type()->tag() == longTag) return false; |
0 | 133 return v->type()->tag() != objectTag || |
134 (v->type()->is_constant() && v->type()->as_ObjectType()->constant_value()->is_null_object()); | |
135 } | |
136 | |
137 | |
138 bool LIRGenerator::can_inline_as_constant(LIR_Const* c) const { | |
304 | 139 if (c->type() == T_LONG) return false; |
0 | 140 return c->type() != T_OBJECT || c->as_jobject() == NULL; |
141 } | |
142 | |
143 | |
144 LIR_Opr LIRGenerator::safepoint_poll_register() { | |
145 return LIR_OprFact::illegalOpr; | |
146 } | |
147 | |
148 | |
149 LIR_Address* LIRGenerator::generate_address(LIR_Opr base, LIR_Opr index, | |
150 int shift, int disp, BasicType type) { | |
151 assert(base->is_register(), "must be"); | |
152 if (index->is_constant()) { | |
153 return new LIR_Address(base, | |
154 (index->as_constant_ptr()->as_jint() << shift) + disp, | |
155 type); | |
156 } else { | |
157 return new LIR_Address(base, index, (LIR_Address::Scale)shift, disp, type); | |
158 } | |
159 } | |
160 | |
161 | |
162 LIR_Address* LIRGenerator::emit_array_address(LIR_Opr array_opr, LIR_Opr index_opr, | |
163 BasicType type, bool needs_card_mark) { | |
164 int offset_in_bytes = arrayOopDesc::base_offset_in_bytes(type); | |
165 | |
166 LIR_Address* addr; | |
167 if (index_opr->is_constant()) { | |
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168 int elem_size = type2aelembytes(type); |
0 | 169 addr = new LIR_Address(array_opr, |
170 offset_in_bytes + index_opr->as_jint() * elem_size, type); | |
171 } else { | |
304 | 172 #ifdef _LP64 |
173 if (index_opr->type() == T_INT) { | |
174 LIR_Opr tmp = new_register(T_LONG); | |
175 __ convert(Bytecodes::_i2l, index_opr, tmp); | |
176 index_opr = tmp; | |
177 } | |
178 #endif // _LP64 | |
0 | 179 addr = new LIR_Address(array_opr, |
180 index_opr, | |
181 LIR_Address::scale(type), | |
182 offset_in_bytes, type); | |
183 } | |
184 if (needs_card_mark) { | |
185 // This store will need a precise card mark, so go ahead and | |
186 // compute the full adddres instead of computing once for the | |
187 // store and again for the card mark. | |
304 | 188 LIR_Opr tmp = new_pointer_register(); |
0 | 189 __ leal(LIR_OprFact::address(addr), tmp); |
1572 | 190 return new LIR_Address(tmp, type); |
0 | 191 } else { |
192 return addr; | |
193 } | |
194 } | |
195 | |
196 | |
1783 | 197 LIR_Opr LIRGenerator::load_immediate(int x, BasicType type) { |
198 LIR_Opr r; | |
199 if (type == T_LONG) { | |
200 r = LIR_OprFact::longConst(x); | |
201 } else if (type == T_INT) { | |
202 r = LIR_OprFact::intConst(x); | |
203 } else { | |
204 ShouldNotReachHere(); | |
205 } | |
206 return r; | |
207 } | |
208 | |
209 void LIRGenerator::increment_counter(address counter, BasicType type, int step) { | |
304 | 210 LIR_Opr pointer = new_pointer_register(); |
211 __ move(LIR_OprFact::intptrConst(counter), pointer); | |
1783 | 212 LIR_Address* addr = new LIR_Address(pointer, type); |
0 | 213 increment_counter(addr, step); |
214 } | |
215 | |
216 | |
217 void LIRGenerator::increment_counter(LIR_Address* addr, int step) { | |
218 __ add((LIR_Opr)addr, LIR_OprFact::intConst(step), (LIR_Opr)addr); | |
219 } | |
220 | |
221 void LIRGenerator::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) { | |
222 __ cmp_mem_int(condition, base, disp, c, info); | |
223 } | |
224 | |
225 | |
226 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, int disp, BasicType type, CodeEmitInfo* info) { | |
227 __ cmp_reg_mem(condition, reg, new LIR_Address(base, disp, type), info); | |
228 } | |
229 | |
230 | |
231 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, LIR_Opr disp, BasicType type, CodeEmitInfo* info) { | |
232 __ cmp_reg_mem(condition, reg, new LIR_Address(base, disp, type), info); | |
233 } | |
234 | |
235 | |
236 bool LIRGenerator::strength_reduce_multiply(LIR_Opr left, int c, LIR_Opr result, LIR_Opr tmp) { | |
237 if (tmp->is_valid()) { | |
238 if (is_power_of_2(c + 1)) { | |
239 __ move(left, tmp); | |
240 __ shift_left(left, log2_intptr(c + 1), left); | |
241 __ sub(left, tmp, result); | |
242 return true; | |
243 } else if (is_power_of_2(c - 1)) { | |
244 __ move(left, tmp); | |
245 __ shift_left(left, log2_intptr(c - 1), left); | |
246 __ add(left, tmp, result); | |
247 return true; | |
248 } | |
249 } | |
250 return false; | |
251 } | |
252 | |
253 | |
254 void LIRGenerator::store_stack_parameter (LIR_Opr item, ByteSize offset_from_sp) { | |
255 BasicType type = item->type(); | |
256 __ store(item, new LIR_Address(FrameMap::rsp_opr, in_bytes(offset_from_sp), type)); | |
257 } | |
258 | |
259 //---------------------------------------------------------------------- | |
260 // visitor functions | |
261 //---------------------------------------------------------------------- | |
262 | |
263 | |
264 void LIRGenerator::do_StoreIndexed(StoreIndexed* x) { | |
1819 | 265 assert(x->is_pinned(),""); |
0 | 266 bool needs_range_check = true; |
267 bool use_length = x->length() != NULL; | |
268 bool obj_store = x->elt_type() == T_ARRAY || x->elt_type() == T_OBJECT; | |
269 bool needs_store_check = obj_store && (x->value()->as_Constant() == NULL || | |
270 !get_jobject_constant(x->value())->is_null_object()); | |
271 | |
272 LIRItem array(x->array(), this); | |
273 LIRItem index(x->index(), this); | |
274 LIRItem value(x->value(), this); | |
275 LIRItem length(this); | |
276 | |
277 array.load_item(); | |
278 index.load_nonconstant(); | |
279 | |
280 if (use_length) { | |
281 needs_range_check = x->compute_needs_range_check(); | |
282 if (needs_range_check) { | |
283 length.set_instruction(x->length()); | |
284 length.load_item(); | |
285 } | |
286 } | |
287 if (needs_store_check) { | |
288 value.load_item(); | |
289 } else { | |
290 value.load_for_store(x->elt_type()); | |
291 } | |
292 | |
293 set_no_result(x); | |
294 | |
295 // the CodeEmitInfo must be duplicated for each different | |
296 // LIR-instruction because spilling can occur anywhere between two | |
297 // instructions and so the debug information must be different | |
298 CodeEmitInfo* range_check_info = state_for(x); | |
299 CodeEmitInfo* null_check_info = NULL; | |
300 if (x->needs_null_check()) { | |
301 null_check_info = new CodeEmitInfo(range_check_info); | |
302 } | |
303 | |
304 // emit array address setup early so it schedules better | |
305 LIR_Address* array_addr = emit_array_address(array.result(), index.result(), x->elt_type(), obj_store); | |
306 | |
307 if (GenerateRangeChecks && needs_range_check) { | |
308 if (use_length) { | |
309 __ cmp(lir_cond_belowEqual, length.result(), index.result()); | |
310 __ branch(lir_cond_belowEqual, T_INT, new RangeCheckStub(range_check_info, index.result())); | |
311 } else { | |
312 array_range_check(array.result(), index.result(), null_check_info, range_check_info); | |
313 // range_check also does the null check | |
314 null_check_info = NULL; | |
315 } | |
316 } | |
317 | |
318 if (GenerateArrayStoreCheck && needs_store_check) { | |
319 LIR_Opr tmp1 = new_register(objectType); | |
320 LIR_Opr tmp2 = new_register(objectType); | |
321 LIR_Opr tmp3 = new_register(objectType); | |
322 | |
323 CodeEmitInfo* store_check_info = new CodeEmitInfo(range_check_info); | |
324 __ store_check(value.result(), array.result(), tmp1, tmp2, tmp3, store_check_info); | |
325 } | |
326 | |
327 if (obj_store) { | |
342
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328 // Needs GC write barriers. |
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329 pre_barrier(LIR_OprFact::address(array_addr), false, NULL); |
0 | 330 __ move(value.result(), array_addr, null_check_info); |
331 // Seems to be a precise | |
332 post_barrier(LIR_OprFact::address(array_addr), value.result()); | |
333 } else { | |
334 __ move(value.result(), array_addr, null_check_info); | |
335 } | |
336 } | |
337 | |
338 | |
339 void LIRGenerator::do_MonitorEnter(MonitorEnter* x) { | |
1819 | 340 assert(x->is_pinned(),""); |
0 | 341 LIRItem obj(x->obj(), this); |
342 obj.load_item(); | |
343 | |
344 set_no_result(x); | |
345 | |
346 // "lock" stores the address of the monitor stack slot, so this is not an oop | |
347 LIR_Opr lock = new_register(T_INT); | |
348 // Need a scratch register for biased locking on x86 | |
349 LIR_Opr scratch = LIR_OprFact::illegalOpr; | |
350 if (UseBiasedLocking) { | |
351 scratch = new_register(T_INT); | |
352 } | |
353 | |
354 CodeEmitInfo* info_for_exception = NULL; | |
355 if (x->needs_null_check()) { | |
1819 | 356 info_for_exception = state_for(x); |
0 | 357 } |
358 // this CodeEmitInfo must not have the xhandlers because here the | |
359 // object is already locked (xhandlers expect object to be unlocked) | |
360 CodeEmitInfo* info = state_for(x, x->state(), true); | |
361 monitor_enter(obj.result(), lock, syncTempOpr(), scratch, | |
362 x->monitor_no(), info_for_exception, info); | |
363 } | |
364 | |
365 | |
366 void LIRGenerator::do_MonitorExit(MonitorExit* x) { | |
1819 | 367 assert(x->is_pinned(),""); |
0 | 368 |
369 LIRItem obj(x->obj(), this); | |
370 obj.dont_load_item(); | |
371 | |
372 LIR_Opr lock = new_register(T_INT); | |
373 LIR_Opr obj_temp = new_register(T_INT); | |
374 set_no_result(x); | |
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375 monitor_exit(obj_temp, lock, syncTempOpr(), LIR_OprFact::illegalOpr, x->monitor_no()); |
0 | 376 } |
377 | |
378 | |
379 // _ineg, _lneg, _fneg, _dneg | |
380 void LIRGenerator::do_NegateOp(NegateOp* x) { | |
381 LIRItem value(x->x(), this); | |
382 value.set_destroys_register(); | |
383 value.load_item(); | |
384 LIR_Opr reg = rlock(x); | |
385 __ negate(value.result(), reg); | |
386 | |
387 set_result(x, round_item(reg)); | |
388 } | |
389 | |
390 | |
391 // for _fadd, _fmul, _fsub, _fdiv, _frem | |
392 // _dadd, _dmul, _dsub, _ddiv, _drem | |
393 void LIRGenerator::do_ArithmeticOp_FPU(ArithmeticOp* x) { | |
394 LIRItem left(x->x(), this); | |
395 LIRItem right(x->y(), this); | |
396 LIRItem* left_arg = &left; | |
397 LIRItem* right_arg = &right; | |
398 assert(!left.is_stack() || !right.is_stack(), "can't both be memory operands"); | |
399 bool must_load_both = (x->op() == Bytecodes::_frem || x->op() == Bytecodes::_drem); | |
400 if (left.is_register() || x->x()->type()->is_constant() || must_load_both) { | |
401 left.load_item(); | |
402 } else { | |
403 left.dont_load_item(); | |
404 } | |
405 | |
406 // do not load right operand if it is a constant. only 0 and 1 are | |
407 // loaded because there are special instructions for loading them | |
408 // without memory access (not needed for SSE2 instructions) | |
409 bool must_load_right = false; | |
410 if (right.is_constant()) { | |
411 LIR_Const* c = right.result()->as_constant_ptr(); | |
412 assert(c != NULL, "invalid constant"); | |
413 assert(c->type() == T_FLOAT || c->type() == T_DOUBLE, "invalid type"); | |
414 | |
415 if (c->type() == T_FLOAT) { | |
416 must_load_right = UseSSE < 1 && (c->is_one_float() || c->is_zero_float()); | |
417 } else { | |
418 must_load_right = UseSSE < 2 && (c->is_one_double() || c->is_zero_double()); | |
419 } | |
420 } | |
421 | |
422 if (must_load_both) { | |
423 // frem and drem destroy also right operand, so move it to a new register | |
424 right.set_destroys_register(); | |
425 right.load_item(); | |
426 } else if (right.is_register() || must_load_right) { | |
427 right.load_item(); | |
428 } else { | |
429 right.dont_load_item(); | |
430 } | |
431 LIR_Opr reg = rlock(x); | |
432 LIR_Opr tmp = LIR_OprFact::illegalOpr; | |
433 if (x->is_strictfp() && (x->op() == Bytecodes::_dmul || x->op() == Bytecodes::_ddiv)) { | |
434 tmp = new_register(T_DOUBLE); | |
435 } | |
436 | |
437 if ((UseSSE >= 1 && x->op() == Bytecodes::_frem) || (UseSSE >= 2 && x->op() == Bytecodes::_drem)) { | |
438 // special handling for frem and drem: no SSE instruction, so must use FPU with temporary fpu stack slots | |
439 LIR_Opr fpu0, fpu1; | |
440 if (x->op() == Bytecodes::_frem) { | |
441 fpu0 = LIR_OprFact::single_fpu(0); | |
442 fpu1 = LIR_OprFact::single_fpu(1); | |
443 } else { | |
444 fpu0 = LIR_OprFact::double_fpu(0); | |
445 fpu1 = LIR_OprFact::double_fpu(1); | |
446 } | |
447 __ move(right.result(), fpu1); // order of left and right operand is important! | |
448 __ move(left.result(), fpu0); | |
449 __ rem (fpu0, fpu1, fpu0); | |
450 __ move(fpu0, reg); | |
451 | |
452 } else { | |
453 arithmetic_op_fpu(x->op(), reg, left.result(), right.result(), x->is_strictfp(), tmp); | |
454 } | |
455 | |
456 set_result(x, round_item(reg)); | |
457 } | |
458 | |
459 | |
460 // for _ladd, _lmul, _lsub, _ldiv, _lrem | |
461 void LIRGenerator::do_ArithmeticOp_Long(ArithmeticOp* x) { | |
462 if (x->op() == Bytecodes::_ldiv || x->op() == Bytecodes::_lrem ) { | |
463 // long division is implemented as a direct call into the runtime | |
464 LIRItem left(x->x(), this); | |
465 LIRItem right(x->y(), this); | |
466 | |
467 // the check for division by zero destroys the right operand | |
468 right.set_destroys_register(); | |
469 | |
470 BasicTypeList signature(2); | |
471 signature.append(T_LONG); | |
472 signature.append(T_LONG); | |
473 CallingConvention* cc = frame_map()->c_calling_convention(&signature); | |
474 | |
475 // check for division by zero (destroys registers of right operand!) | |
476 CodeEmitInfo* info = state_for(x); | |
477 | |
478 const LIR_Opr result_reg = result_register_for(x->type()); | |
479 left.load_item_force(cc->at(1)); | |
480 right.load_item(); | |
481 | |
482 __ move(right.result(), cc->at(0)); | |
483 | |
484 __ cmp(lir_cond_equal, right.result(), LIR_OprFact::longConst(0)); | |
485 __ branch(lir_cond_equal, T_LONG, new DivByZeroStub(info)); | |
486 | |
487 address entry; | |
488 switch (x->op()) { | |
489 case Bytecodes::_lrem: | |
490 entry = CAST_FROM_FN_PTR(address, SharedRuntime::lrem); | |
491 break; // check if dividend is 0 is done elsewhere | |
492 case Bytecodes::_ldiv: | |
493 entry = CAST_FROM_FN_PTR(address, SharedRuntime::ldiv); | |
494 break; // check if dividend is 0 is done elsewhere | |
495 case Bytecodes::_lmul: | |
496 entry = CAST_FROM_FN_PTR(address, SharedRuntime::lmul); | |
497 break; | |
498 default: | |
499 ShouldNotReachHere(); | |
500 } | |
501 | |
502 LIR_Opr result = rlock_result(x); | |
503 __ call_runtime_leaf(entry, getThreadTemp(), result_reg, cc->args()); | |
504 __ move(result_reg, result); | |
505 } else if (x->op() == Bytecodes::_lmul) { | |
506 // missing test if instr is commutative and if we should swap | |
507 LIRItem left(x->x(), this); | |
508 LIRItem right(x->y(), this); | |
509 | |
510 // right register is destroyed by the long mul, so it must be | |
511 // copied to a new register. | |
512 right.set_destroys_register(); | |
513 | |
514 left.load_item(); | |
515 right.load_item(); | |
516 | |
304 | 517 LIR_Opr reg = FrameMap::long0_opr; |
0 | 518 arithmetic_op_long(x->op(), reg, left.result(), right.result(), NULL); |
519 LIR_Opr result = rlock_result(x); | |
520 __ move(reg, result); | |
521 } else { | |
522 // missing test if instr is commutative and if we should swap | |
523 LIRItem left(x->x(), this); | |
524 LIRItem right(x->y(), this); | |
525 | |
526 left.load_item(); | |
605 | 527 // don't load constants to save register |
0 | 528 right.load_nonconstant(); |
529 rlock_result(x); | |
530 arithmetic_op_long(x->op(), x->operand(), left.result(), right.result(), NULL); | |
531 } | |
532 } | |
533 | |
534 | |
535 | |
536 // for: _iadd, _imul, _isub, _idiv, _irem | |
537 void LIRGenerator::do_ArithmeticOp_Int(ArithmeticOp* x) { | |
538 if (x->op() == Bytecodes::_idiv || x->op() == Bytecodes::_irem) { | |
539 // The requirements for division and modulo | |
540 // input : rax,: dividend min_int | |
541 // reg: divisor (may not be rax,/rdx) -1 | |
542 // | |
543 // output: rax,: quotient (= rax, idiv reg) min_int | |
544 // rdx: remainder (= rax, irem reg) 0 | |
545 | |
546 // rax, and rdx will be destroyed | |
547 | |
548 // Note: does this invalidate the spec ??? | |
549 LIRItem right(x->y(), this); | |
550 LIRItem left(x->x() , this); // visit left second, so that the is_register test is valid | |
551 | |
552 // call state_for before load_item_force because state_for may | |
553 // force the evaluation of other instructions that are needed for | |
554 // correct debug info. Otherwise the live range of the fix | |
555 // register might be too long. | |
556 CodeEmitInfo* info = state_for(x); | |
557 | |
558 left.load_item_force(divInOpr()); | |
559 | |
560 right.load_item(); | |
561 | |
562 LIR_Opr result = rlock_result(x); | |
563 LIR_Opr result_reg; | |
564 if (x->op() == Bytecodes::_idiv) { | |
565 result_reg = divOutOpr(); | |
566 } else { | |
567 result_reg = remOutOpr(); | |
568 } | |
569 | |
570 if (!ImplicitDiv0Checks) { | |
571 __ cmp(lir_cond_equal, right.result(), LIR_OprFact::intConst(0)); | |
572 __ branch(lir_cond_equal, T_INT, new DivByZeroStub(info)); | |
573 } | |
574 LIR_Opr tmp = FrameMap::rdx_opr; // idiv and irem use rdx in their implementation | |
575 if (x->op() == Bytecodes::_irem) { | |
576 __ irem(left.result(), right.result(), result_reg, tmp, info); | |
577 } else if (x->op() == Bytecodes::_idiv) { | |
578 __ idiv(left.result(), right.result(), result_reg, tmp, info); | |
579 } else { | |
580 ShouldNotReachHere(); | |
581 } | |
582 | |
583 __ move(result_reg, result); | |
584 } else { | |
585 // missing test if instr is commutative and if we should swap | |
586 LIRItem left(x->x(), this); | |
587 LIRItem right(x->y(), this); | |
588 LIRItem* left_arg = &left; | |
589 LIRItem* right_arg = &right; | |
590 if (x->is_commutative() && left.is_stack() && right.is_register()) { | |
591 // swap them if left is real stack (or cached) and right is real register(not cached) | |
592 left_arg = &right; | |
593 right_arg = &left; | |
594 } | |
595 | |
596 left_arg->load_item(); | |
597 | |
598 // do not need to load right, as we can handle stack and constants | |
599 if (x->op() == Bytecodes::_imul ) { | |
600 // check if we can use shift instead | |
601 bool use_constant = false; | |
602 bool use_tmp = false; | |
603 if (right_arg->is_constant()) { | |
604 int iconst = right_arg->get_jint_constant(); | |
605 if (iconst > 0) { | |
606 if (is_power_of_2(iconst)) { | |
607 use_constant = true; | |
608 } else if (is_power_of_2(iconst - 1) || is_power_of_2(iconst + 1)) { | |
609 use_constant = true; | |
610 use_tmp = true; | |
611 } | |
612 } | |
613 } | |
614 if (use_constant) { | |
615 right_arg->dont_load_item(); | |
616 } else { | |
617 right_arg->load_item(); | |
618 } | |
619 LIR_Opr tmp = LIR_OprFact::illegalOpr; | |
620 if (use_tmp) { | |
621 tmp = new_register(T_INT); | |
622 } | |
623 rlock_result(x); | |
624 | |
625 arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), tmp); | |
626 } else { | |
627 right_arg->dont_load_item(); | |
628 rlock_result(x); | |
629 LIR_Opr tmp = LIR_OprFact::illegalOpr; | |
630 arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), tmp); | |
631 } | |
632 } | |
633 } | |
634 | |
635 | |
636 void LIRGenerator::do_ArithmeticOp(ArithmeticOp* x) { | |
637 // when an operand with use count 1 is the left operand, then it is | |
638 // likely that no move for 2-operand-LIR-form is necessary | |
639 if (x->is_commutative() && x->y()->as_Constant() == NULL && x->x()->use_count() > x->y()->use_count()) { | |
640 x->swap_operands(); | |
641 } | |
642 | |
643 ValueTag tag = x->type()->tag(); | |
644 assert(x->x()->type()->tag() == tag && x->y()->type()->tag() == tag, "wrong parameters"); | |
645 switch (tag) { | |
646 case floatTag: | |
647 case doubleTag: do_ArithmeticOp_FPU(x); return; | |
648 case longTag: do_ArithmeticOp_Long(x); return; | |
649 case intTag: do_ArithmeticOp_Int(x); return; | |
650 } | |
651 ShouldNotReachHere(); | |
652 } | |
653 | |
654 | |
655 // _ishl, _lshl, _ishr, _lshr, _iushr, _lushr | |
656 void LIRGenerator::do_ShiftOp(ShiftOp* x) { | |
657 // count must always be in rcx | |
658 LIRItem value(x->x(), this); | |
659 LIRItem count(x->y(), this); | |
660 | |
661 ValueTag elemType = x->type()->tag(); | |
662 bool must_load_count = !count.is_constant() || elemType == longTag; | |
663 if (must_load_count) { | |
664 // count for long must be in register | |
665 count.load_item_force(shiftCountOpr()); | |
666 } else { | |
667 count.dont_load_item(); | |
668 } | |
669 value.load_item(); | |
670 LIR_Opr reg = rlock_result(x); | |
671 | |
672 shift_op(x->op(), reg, value.result(), count.result(), LIR_OprFact::illegalOpr); | |
673 } | |
674 | |
675 | |
676 // _iand, _land, _ior, _lor, _ixor, _lxor | |
677 void LIRGenerator::do_LogicOp(LogicOp* x) { | |
678 // when an operand with use count 1 is the left operand, then it is | |
679 // likely that no move for 2-operand-LIR-form is necessary | |
680 if (x->is_commutative() && x->y()->as_Constant() == NULL && x->x()->use_count() > x->y()->use_count()) { | |
681 x->swap_operands(); | |
682 } | |
683 | |
684 LIRItem left(x->x(), this); | |
685 LIRItem right(x->y(), this); | |
686 | |
687 left.load_item(); | |
688 right.load_nonconstant(); | |
689 LIR_Opr reg = rlock_result(x); | |
690 | |
691 logic_op(x->op(), reg, left.result(), right.result()); | |
692 } | |
693 | |
694 | |
695 | |
696 // _lcmp, _fcmpl, _fcmpg, _dcmpl, _dcmpg | |
697 void LIRGenerator::do_CompareOp(CompareOp* x) { | |
698 LIRItem left(x->x(), this); | |
699 LIRItem right(x->y(), this); | |
700 ValueTag tag = x->x()->type()->tag(); | |
701 if (tag == longTag) { | |
702 left.set_destroys_register(); | |
703 } | |
704 left.load_item(); | |
705 right.load_item(); | |
706 LIR_Opr reg = rlock_result(x); | |
707 | |
708 if (x->x()->type()->is_float_kind()) { | |
709 Bytecodes::Code code = x->op(); | |
710 __ fcmp2int(left.result(), right.result(), reg, (code == Bytecodes::_fcmpl || code == Bytecodes::_dcmpl)); | |
711 } else if (x->x()->type()->tag() == longTag) { | |
712 __ lcmp2int(left.result(), right.result(), reg); | |
713 } else { | |
714 Unimplemented(); | |
715 } | |
716 } | |
717 | |
718 | |
719 void LIRGenerator::do_AttemptUpdate(Intrinsic* x) { | |
720 assert(x->number_of_arguments() == 3, "wrong type"); | |
721 LIRItem obj (x->argument_at(0), this); // AtomicLong object | |
722 LIRItem cmp_value (x->argument_at(1), this); // value to compare with field | |
723 LIRItem new_value (x->argument_at(2), this); // replace field with new_value if it matches cmp_value | |
724 | |
725 // compare value must be in rdx,eax (hi,lo); may be destroyed by cmpxchg8 instruction | |
304 | 726 cmp_value.load_item_force(FrameMap::long0_opr); |
0 | 727 |
728 // new value must be in rcx,ebx (hi,lo) | |
304 | 729 new_value.load_item_force(FrameMap::long1_opr); |
0 | 730 |
731 // object pointer register is overwritten with field address | |
732 obj.load_item(); | |
733 | |
734 // generate compare-and-swap; produces zero condition if swap occurs | |
735 int value_offset = sun_misc_AtomicLongCSImpl::value_offset(); | |
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736 LIR_Opr addr = new_pointer_register(); |
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737 __ leal(LIR_OprFact::address(new LIR_Address(obj.result(), value_offset, T_LONG)), addr); |
0 | 738 LIR_Opr t1 = LIR_OprFact::illegalOpr; // no temp needed |
739 LIR_Opr t2 = LIR_OprFact::illegalOpr; // no temp needed | |
740 __ cas_long(addr, cmp_value.result(), new_value.result(), t1, t2); | |
741 | |
742 // generate conditional move of boolean result | |
743 LIR_Opr result = rlock_result(x); | |
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744 __ cmove(lir_cond_equal, LIR_OprFact::intConst(1), LIR_OprFact::intConst(0), result, T_LONG); |
0 | 745 } |
746 | |
747 | |
748 void LIRGenerator::do_CompareAndSwap(Intrinsic* x, ValueType* type) { | |
749 assert(x->number_of_arguments() == 4, "wrong type"); | |
750 LIRItem obj (x->argument_at(0), this); // object | |
751 LIRItem offset(x->argument_at(1), this); // offset of field | |
752 LIRItem cmp (x->argument_at(2), this); // value to compare with field | |
753 LIRItem val (x->argument_at(3), this); // replace field with val if matches cmp | |
754 | |
755 assert(obj.type()->tag() == objectTag, "invalid type"); | |
304 | 756 |
757 // In 64bit the type can be long, sparc doesn't have this assert | |
758 // assert(offset.type()->tag() == intTag, "invalid type"); | |
759 | |
0 | 760 assert(cmp.type()->tag() == type->tag(), "invalid type"); |
761 assert(val.type()->tag() == type->tag(), "invalid type"); | |
762 | |
763 // get address of field | |
764 obj.load_item(); | |
765 offset.load_nonconstant(); | |
766 | |
767 if (type == objectType) { | |
768 cmp.load_item_force(FrameMap::rax_oop_opr); | |
769 val.load_item(); | |
770 } else if (type == intType) { | |
771 cmp.load_item_force(FrameMap::rax_opr); | |
772 val.load_item(); | |
773 } else if (type == longType) { | |
304 | 774 cmp.load_item_force(FrameMap::long0_opr); |
775 val.load_item_force(FrameMap::long1_opr); | |
0 | 776 } else { |
777 ShouldNotReachHere(); | |
778 } | |
779 | |
1873 | 780 LIR_Opr addr = new_pointer_register(); |
1060 | 781 LIR_Address* a; |
782 if(offset.result()->is_constant()) { | |
783 a = new LIR_Address(obj.result(), | |
784 NOT_LP64(offset.result()->as_constant_ptr()->as_jint()) LP64_ONLY((int)offset.result()->as_constant_ptr()->as_jlong()), | |
785 as_BasicType(type)); | |
786 } else { | |
787 a = new LIR_Address(obj.result(), | |
788 offset.result(), | |
789 LIR_Address::times_1, | |
790 0, | |
791 as_BasicType(type)); | |
792 } | |
793 __ leal(LIR_OprFact::address(a), addr); | |
0 | 794 |
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795 if (type == objectType) { // Write-barrier needed for Object fields. |
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796 // Do the pre-write barrier, if any. |
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797 pre_barrier(addr, false, NULL); |
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798 } |
0 | 799 |
800 LIR_Opr ill = LIR_OprFact::illegalOpr; // for convenience | |
801 if (type == objectType) | |
802 __ cas_obj(addr, cmp.result(), val.result(), ill, ill); | |
803 else if (type == intType) | |
804 __ cas_int(addr, cmp.result(), val.result(), ill, ill); | |
805 else if (type == longType) | |
806 __ cas_long(addr, cmp.result(), val.result(), ill, ill); | |
807 else { | |
808 ShouldNotReachHere(); | |
809 } | |
810 | |
811 // generate conditional move of boolean result | |
812 LIR_Opr result = rlock_result(x); | |
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813 __ cmove(lir_cond_equal, LIR_OprFact::intConst(1), LIR_OprFact::intConst(0), |
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814 result, as_BasicType(type)); |
0 | 815 if (type == objectType) { // Write-barrier needed for Object fields. |
816 // Seems to be precise | |
817 post_barrier(addr, val.result()); | |
818 } | |
819 } | |
820 | |
821 | |
822 void LIRGenerator::do_MathIntrinsic(Intrinsic* x) { | |
823 assert(x->number_of_arguments() == 1, "wrong type"); | |
824 LIRItem value(x->argument_at(0), this); | |
825 | |
826 bool use_fpu = false; | |
827 if (UseSSE >= 2) { | |
828 switch(x->id()) { | |
829 case vmIntrinsics::_dsin: | |
830 case vmIntrinsics::_dcos: | |
831 case vmIntrinsics::_dtan: | |
832 case vmIntrinsics::_dlog: | |
833 case vmIntrinsics::_dlog10: | |
834 use_fpu = true; | |
835 } | |
836 } else { | |
837 value.set_destroys_register(); | |
838 } | |
839 | |
840 value.load_item(); | |
841 | |
842 LIR_Opr calc_input = value.result(); | |
843 LIR_Opr calc_result = rlock_result(x); | |
844 | |
845 // sin and cos need two free fpu stack slots, so register two temporary operands | |
846 LIR_Opr tmp1 = FrameMap::caller_save_fpu_reg_at(0); | |
847 LIR_Opr tmp2 = FrameMap::caller_save_fpu_reg_at(1); | |
848 | |
849 if (use_fpu) { | |
850 LIR_Opr tmp = FrameMap::fpu0_double_opr; | |
851 __ move(calc_input, tmp); | |
852 | |
853 calc_input = tmp; | |
854 calc_result = tmp; | |
855 tmp1 = FrameMap::caller_save_fpu_reg_at(1); | |
856 tmp2 = FrameMap::caller_save_fpu_reg_at(2); | |
857 } | |
858 | |
859 switch(x->id()) { | |
860 case vmIntrinsics::_dabs: __ abs (calc_input, calc_result, LIR_OprFact::illegalOpr); break; | |
861 case vmIntrinsics::_dsqrt: __ sqrt (calc_input, calc_result, LIR_OprFact::illegalOpr); break; | |
862 case vmIntrinsics::_dsin: __ sin (calc_input, calc_result, tmp1, tmp2); break; | |
863 case vmIntrinsics::_dcos: __ cos (calc_input, calc_result, tmp1, tmp2); break; | |
864 case vmIntrinsics::_dtan: __ tan (calc_input, calc_result, tmp1, tmp2); break; | |
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865 case vmIntrinsics::_dlog: __ log (calc_input, calc_result, tmp1); break; |
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866 case vmIntrinsics::_dlog10: __ log10(calc_input, calc_result, tmp1); break; |
0 | 867 default: ShouldNotReachHere(); |
868 } | |
869 | |
870 if (use_fpu) { | |
871 __ move(calc_result, x->operand()); | |
872 } | |
873 } | |
874 | |
875 | |
876 void LIRGenerator::do_ArrayCopy(Intrinsic* x) { | |
877 assert(x->number_of_arguments() == 5, "wrong type"); | |
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878 |
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879 // Make all state_for calls early since they can emit code |
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880 CodeEmitInfo* info = state_for(x, x->state()); |
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881 |
0 | 882 LIRItem src(x->argument_at(0), this); |
883 LIRItem src_pos(x->argument_at(1), this); | |
884 LIRItem dst(x->argument_at(2), this); | |
885 LIRItem dst_pos(x->argument_at(3), this); | |
886 LIRItem length(x->argument_at(4), this); | |
887 | |
888 // operands for arraycopy must use fixed registers, otherwise | |
889 // LinearScan will fail allocation (because arraycopy always needs a | |
890 // call) | |
304 | 891 |
892 #ifndef _LP64 | |
0 | 893 src.load_item_force (FrameMap::rcx_oop_opr); |
894 src_pos.load_item_force (FrameMap::rdx_opr); | |
895 dst.load_item_force (FrameMap::rax_oop_opr); | |
896 dst_pos.load_item_force (FrameMap::rbx_opr); | |
897 length.load_item_force (FrameMap::rdi_opr); | |
898 LIR_Opr tmp = (FrameMap::rsi_opr); | |
304 | 899 #else |
900 | |
901 // The java calling convention will give us enough registers | |
902 // so that on the stub side the args will be perfect already. | |
903 // On the other slow/special case side we call C and the arg | |
904 // positions are not similar enough to pick one as the best. | |
905 // Also because the java calling convention is a "shifted" version | |
906 // of the C convention we can process the java args trivially into C | |
907 // args without worry of overwriting during the xfer | |
908 | |
909 src.load_item_force (FrameMap::as_oop_opr(j_rarg0)); | |
910 src_pos.load_item_force (FrameMap::as_opr(j_rarg1)); | |
911 dst.load_item_force (FrameMap::as_oop_opr(j_rarg2)); | |
912 dst_pos.load_item_force (FrameMap::as_opr(j_rarg3)); | |
913 length.load_item_force (FrameMap::as_opr(j_rarg4)); | |
914 | |
915 LIR_Opr tmp = FrameMap::as_opr(j_rarg5); | |
916 #endif // LP64 | |
917 | |
0 | 918 set_no_result(x); |
919 | |
920 int flags; | |
921 ciArrayKlass* expected_type; | |
922 arraycopy_helper(x, &flags, &expected_type); | |
923 | |
924 __ arraycopy(src.result(), src_pos.result(), dst.result(), dst_pos.result(), length.result(), tmp, expected_type, flags, info); // does add_safepoint | |
925 } | |
926 | |
927 | |
928 // _i2l, _i2f, _i2d, _l2i, _l2f, _l2d, _f2i, _f2l, _f2d, _d2i, _d2l, _d2f | |
929 // _i2b, _i2c, _i2s | |
930 LIR_Opr fixed_register_for(BasicType type) { | |
931 switch (type) { | |
932 case T_FLOAT: return FrameMap::fpu0_float_opr; | |
933 case T_DOUBLE: return FrameMap::fpu0_double_opr; | |
934 case T_INT: return FrameMap::rax_opr; | |
304 | 935 case T_LONG: return FrameMap::long0_opr; |
0 | 936 default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr; |
937 } | |
938 } | |
939 | |
940 void LIRGenerator::do_Convert(Convert* x) { | |
941 // flags that vary for the different operations and different SSE-settings | |
942 bool fixed_input, fixed_result, round_result, needs_stub; | |
943 | |
944 switch (x->op()) { | |
945 case Bytecodes::_i2l: // fall through | |
946 case Bytecodes::_l2i: // fall through | |
947 case Bytecodes::_i2b: // fall through | |
948 case Bytecodes::_i2c: // fall through | |
949 case Bytecodes::_i2s: fixed_input = false; fixed_result = false; round_result = false; needs_stub = false; break; | |
950 | |
951 case Bytecodes::_f2d: fixed_input = UseSSE == 1; fixed_result = false; round_result = false; needs_stub = false; break; | |
952 case Bytecodes::_d2f: fixed_input = false; fixed_result = UseSSE == 1; round_result = UseSSE < 1; needs_stub = false; break; | |
953 case Bytecodes::_i2f: fixed_input = false; fixed_result = false; round_result = UseSSE < 1; needs_stub = false; break; | |
954 case Bytecodes::_i2d: fixed_input = false; fixed_result = false; round_result = false; needs_stub = false; break; | |
955 case Bytecodes::_f2i: fixed_input = false; fixed_result = false; round_result = false; needs_stub = true; break; | |
956 case Bytecodes::_d2i: fixed_input = false; fixed_result = false; round_result = false; needs_stub = true; break; | |
957 case Bytecodes::_l2f: fixed_input = false; fixed_result = UseSSE >= 1; round_result = UseSSE < 1; needs_stub = false; break; | |
958 case Bytecodes::_l2d: fixed_input = false; fixed_result = UseSSE >= 2; round_result = UseSSE < 2; needs_stub = false; break; | |
959 case Bytecodes::_f2l: fixed_input = true; fixed_result = true; round_result = false; needs_stub = false; break; | |
960 case Bytecodes::_d2l: fixed_input = true; fixed_result = true; round_result = false; needs_stub = false; break; | |
961 default: ShouldNotReachHere(); | |
962 } | |
963 | |
964 LIRItem value(x->value(), this); | |
965 value.load_item(); | |
966 LIR_Opr input = value.result(); | |
967 LIR_Opr result = rlock(x); | |
968 | |
969 // arguments of lir_convert | |
970 LIR_Opr conv_input = input; | |
971 LIR_Opr conv_result = result; | |
972 ConversionStub* stub = NULL; | |
973 | |
974 if (fixed_input) { | |
975 conv_input = fixed_register_for(input->type()); | |
976 __ move(input, conv_input); | |
977 } | |
978 | |
979 assert(fixed_result == false || round_result == false, "cannot set both"); | |
980 if (fixed_result) { | |
981 conv_result = fixed_register_for(result->type()); | |
982 } else if (round_result) { | |
983 result = new_register(result->type()); | |
984 set_vreg_flag(result, must_start_in_memory); | |
985 } | |
986 | |
987 if (needs_stub) { | |
988 stub = new ConversionStub(x->op(), conv_input, conv_result); | |
989 } | |
990 | |
991 __ convert(x->op(), conv_input, conv_result, stub); | |
992 | |
993 if (result != conv_result) { | |
994 __ move(conv_result, result); | |
995 } | |
996 | |
997 assert(result->is_virtual(), "result must be virtual register"); | |
998 set_result(x, result); | |
999 } | |
1000 | |
1001 | |
1002 void LIRGenerator::do_NewInstance(NewInstance* x) { | |
1819 | 1003 #ifndef PRODUCT |
0 | 1004 if (PrintNotLoaded && !x->klass()->is_loaded()) { |
1819 | 1005 tty->print_cr(" ###class not loaded at new bci %d", x->printable_bci()); |
0 | 1006 } |
1819 | 1007 #endif |
0 | 1008 CodeEmitInfo* info = state_for(x, x->state()); |
1009 LIR_Opr reg = result_register_for(x->type()); | |
1010 LIR_Opr klass_reg = new_register(objectType); | |
1011 new_instance(reg, x->klass(), | |
1012 FrameMap::rcx_oop_opr, | |
1013 FrameMap::rdi_oop_opr, | |
1014 FrameMap::rsi_oop_opr, | |
1015 LIR_OprFact::illegalOpr, | |
1016 FrameMap::rdx_oop_opr, info); | |
1017 LIR_Opr result = rlock_result(x); | |
1018 __ move(reg, result); | |
1019 } | |
1020 | |
1021 | |
1022 void LIRGenerator::do_NewTypeArray(NewTypeArray* x) { | |
1023 CodeEmitInfo* info = state_for(x, x->state()); | |
1024 | |
1025 LIRItem length(x->length(), this); | |
1026 length.load_item_force(FrameMap::rbx_opr); | |
1027 | |
1028 LIR_Opr reg = result_register_for(x->type()); | |
1029 LIR_Opr tmp1 = FrameMap::rcx_oop_opr; | |
1030 LIR_Opr tmp2 = FrameMap::rsi_oop_opr; | |
1031 LIR_Opr tmp3 = FrameMap::rdi_oop_opr; | |
1032 LIR_Opr tmp4 = reg; | |
1033 LIR_Opr klass_reg = FrameMap::rdx_oop_opr; | |
1034 LIR_Opr len = length.result(); | |
1035 BasicType elem_type = x->elt_type(); | |
1036 | |
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1037 __ oop2reg(ciTypeArrayKlass::make(elem_type)->constant_encoding(), klass_reg); |
0 | 1038 |
1039 CodeStub* slow_path = new NewTypeArrayStub(klass_reg, len, reg, info); | |
1040 __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, elem_type, klass_reg, slow_path); | |
1041 | |
1042 LIR_Opr result = rlock_result(x); | |
1043 __ move(reg, result); | |
1044 } | |
1045 | |
1046 | |
1047 void LIRGenerator::do_NewObjectArray(NewObjectArray* x) { | |
1048 LIRItem length(x->length(), this); | |
1049 // in case of patching (i.e., object class is not yet loaded), we need to reexecute the instruction | |
1050 // and therefore provide the state before the parameters have been consumed | |
1051 CodeEmitInfo* patching_info = NULL; | |
1052 if (!x->klass()->is_loaded() || PatchALot) { | |
1053 patching_info = state_for(x, x->state_before()); | |
1054 } | |
1055 | |
1056 CodeEmitInfo* info = state_for(x, x->state()); | |
1057 | |
1058 const LIR_Opr reg = result_register_for(x->type()); | |
1059 LIR_Opr tmp1 = FrameMap::rcx_oop_opr; | |
1060 LIR_Opr tmp2 = FrameMap::rsi_oop_opr; | |
1061 LIR_Opr tmp3 = FrameMap::rdi_oop_opr; | |
1062 LIR_Opr tmp4 = reg; | |
1063 LIR_Opr klass_reg = FrameMap::rdx_oop_opr; | |
1064 | |
1065 length.load_item_force(FrameMap::rbx_opr); | |
1066 LIR_Opr len = length.result(); | |
1067 | |
1068 CodeStub* slow_path = new NewObjectArrayStub(klass_reg, len, reg, info); | |
1069 ciObject* obj = (ciObject*) ciObjArrayKlass::make(x->klass()); | |
1070 if (obj == ciEnv::unloaded_ciobjarrayklass()) { | |
1071 BAILOUT("encountered unloaded_ciobjarrayklass due to out of memory error"); | |
1072 } | |
1073 jobject2reg_with_patching(klass_reg, obj, patching_info); | |
1074 __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, T_OBJECT, klass_reg, slow_path); | |
1075 | |
1076 LIR_Opr result = rlock_result(x); | |
1077 __ move(reg, result); | |
1078 } | |
1079 | |
1080 | |
1081 void LIRGenerator::do_NewMultiArray(NewMultiArray* x) { | |
1082 Values* dims = x->dims(); | |
1083 int i = dims->length(); | |
1084 LIRItemList* items = new LIRItemList(dims->length(), NULL); | |
1085 while (i-- > 0) { | |
1086 LIRItem* size = new LIRItem(dims->at(i), this); | |
1087 items->at_put(i, size); | |
1088 } | |
1089 | |
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1090 // Evaluate state_for early since it may emit code. |
0 | 1091 CodeEmitInfo* patching_info = NULL; |
1092 if (!x->klass()->is_loaded() || PatchALot) { | |
1093 patching_info = state_for(x, x->state_before()); | |
1094 | |
1095 // cannot re-use same xhandlers for multiple CodeEmitInfos, so | |
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1096 // clone all handlers. This is handled transparently in other |
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1097 // places by the CodeEmitInfo cloning logic but is handled |
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1098 // specially here because a stub isn't being used. |
0 | 1099 x->set_exception_handlers(new XHandlers(x->exception_handlers())); |
1100 } | |
1101 CodeEmitInfo* info = state_for(x, x->state()); | |
1102 | |
1103 i = dims->length(); | |
1104 while (i-- > 0) { | |
1105 LIRItem* size = items->at(i); | |
1106 size->load_nonconstant(); | |
1107 | |
1108 store_stack_parameter(size->result(), in_ByteSize(i*4)); | |
1109 } | |
1110 | |
1111 LIR_Opr reg = result_register_for(x->type()); | |
1112 jobject2reg_with_patching(reg, x->klass(), patching_info); | |
1113 | |
1114 LIR_Opr rank = FrameMap::rbx_opr; | |
1115 __ move(LIR_OprFact::intConst(x->rank()), rank); | |
1116 LIR_Opr varargs = FrameMap::rcx_opr; | |
1117 __ move(FrameMap::rsp_opr, varargs); | |
1118 LIR_OprList* args = new LIR_OprList(3); | |
1119 args->append(reg); | |
1120 args->append(rank); | |
1121 args->append(varargs); | |
1122 __ call_runtime(Runtime1::entry_for(Runtime1::new_multi_array_id), | |
1123 LIR_OprFact::illegalOpr, | |
1124 reg, args, info); | |
1125 | |
1126 LIR_Opr result = rlock_result(x); | |
1127 __ move(reg, result); | |
1128 } | |
1129 | |
1130 | |
1131 void LIRGenerator::do_BlockBegin(BlockBegin* x) { | |
1132 // nothing to do for now | |
1133 } | |
1134 | |
1135 | |
1136 void LIRGenerator::do_CheckCast(CheckCast* x) { | |
1137 LIRItem obj(x->obj(), this); | |
1138 | |
1139 CodeEmitInfo* patching_info = NULL; | |
1140 if (!x->klass()->is_loaded() || (PatchALot && !x->is_incompatible_class_change_check())) { | |
1141 // must do this before locking the destination register as an oop register, | |
1142 // and before the obj is loaded (the latter is for deoptimization) | |
1143 patching_info = state_for(x, x->state_before()); | |
1144 } | |
1145 obj.load_item(); | |
1146 | |
1147 // info for exceptions | |
1819 | 1148 CodeEmitInfo* info_for_exception = state_for(x); |
0 | 1149 |
1150 CodeStub* stub; | |
1151 if (x->is_incompatible_class_change_check()) { | |
1152 assert(patching_info == NULL, "can't patch this"); | |
1153 stub = new SimpleExceptionStub(Runtime1::throw_incompatible_class_change_error_id, LIR_OprFact::illegalOpr, info_for_exception); | |
1154 } else { | |
1155 stub = new SimpleExceptionStub(Runtime1::throw_class_cast_exception_id, obj.result(), info_for_exception); | |
1156 } | |
1157 LIR_Opr reg = rlock_result(x); | |
2002 | 1158 LIR_Opr tmp3 = LIR_OprFact::illegalOpr; |
1159 if (!x->klass()->is_loaded() || UseCompressedOops) { | |
1160 tmp3 = new_register(objectType); | |
1161 } | |
0 | 1162 __ checkcast(reg, obj.result(), x->klass(), |
2002 | 1163 new_register(objectType), new_register(objectType), tmp3, |
0 | 1164 x->direct_compare(), info_for_exception, patching_info, stub, |
1165 x->profiled_method(), x->profiled_bci()); | |
1166 } | |
1167 | |
1168 | |
1169 void LIRGenerator::do_InstanceOf(InstanceOf* x) { | |
1170 LIRItem obj(x->obj(), this); | |
1171 | |
1172 // result and test object may not be in same register | |
1173 LIR_Opr reg = rlock_result(x); | |
1174 CodeEmitInfo* patching_info = NULL; | |
1175 if ((!x->klass()->is_loaded() || PatchALot)) { | |
1176 // must do this before locking the destination register as an oop register | |
1177 patching_info = state_for(x, x->state_before()); | |
1178 } | |
1179 obj.load_item(); | |
2002 | 1180 LIR_Opr tmp3 = LIR_OprFact::illegalOpr; |
1181 if (!x->klass()->is_loaded() || UseCompressedOops) { | |
1182 tmp3 = new_register(objectType); | |
1183 } | |
0 | 1184 __ instanceof(reg, obj.result(), x->klass(), |
2002 | 1185 new_register(objectType), new_register(objectType), tmp3, |
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1186 x->direct_compare(), patching_info, x->profiled_method(), x->profiled_bci()); |
0 | 1187 } |
1188 | |
1189 | |
1190 void LIRGenerator::do_If(If* x) { | |
1191 assert(x->number_of_sux() == 2, "inconsistency"); | |
1192 ValueTag tag = x->x()->type()->tag(); | |
1193 bool is_safepoint = x->is_safepoint(); | |
1194 | |
1195 If::Condition cond = x->cond(); | |
1196 | |
1197 LIRItem xitem(x->x(), this); | |
1198 LIRItem yitem(x->y(), this); | |
1199 LIRItem* xin = &xitem; | |
1200 LIRItem* yin = &yitem; | |
1201 | |
1202 if (tag == longTag) { | |
1203 // for longs, only conditions "eql", "neq", "lss", "geq" are valid; | |
1204 // mirror for other conditions | |
1205 if (cond == If::gtr || cond == If::leq) { | |
1206 cond = Instruction::mirror(cond); | |
1207 xin = &yitem; | |
1208 yin = &xitem; | |
1209 } | |
1210 xin->set_destroys_register(); | |
1211 } | |
1212 xin->load_item(); | |
1213 if (tag == longTag && yin->is_constant() && yin->get_jlong_constant() == 0 && (cond == If::eql || cond == If::neq)) { | |
1214 // inline long zero | |
1215 yin->dont_load_item(); | |
1216 } else if (tag == longTag || tag == floatTag || tag == doubleTag) { | |
1217 // longs cannot handle constants at right side | |
1218 yin->load_item(); | |
1219 } else { | |
1220 yin->dont_load_item(); | |
1221 } | |
1222 | |
1223 // add safepoint before generating condition code so it can be recomputed | |
1224 if (x->is_safepoint()) { | |
1225 // increment backedge counter if needed | |
1783 | 1226 increment_backedge_counter(state_for(x, x->state_before()), x->profiled_bci()); |
0 | 1227 __ safepoint(LIR_OprFact::illegalOpr, state_for(x, x->state_before())); |
1228 } | |
1229 set_no_result(x); | |
1230 | |
1231 LIR_Opr left = xin->result(); | |
1232 LIR_Opr right = yin->result(); | |
1233 __ cmp(lir_cond(cond), left, right); | |
1783 | 1234 // Generate branch profiling. Profiling code doesn't kill flags. |
0 | 1235 profile_branch(x, cond); |
1236 move_to_phi(x->state()); | |
1237 if (x->x()->type()->is_float_kind()) { | |
1238 __ branch(lir_cond(cond), right->type(), x->tsux(), x->usux()); | |
1239 } else { | |
1240 __ branch(lir_cond(cond), right->type(), x->tsux()); | |
1241 } | |
1242 assert(x->default_sux() == x->fsux(), "wrong destination above"); | |
1243 __ jump(x->default_sux()); | |
1244 } | |
1245 | |
1246 | |
1247 LIR_Opr LIRGenerator::getThreadPointer() { | |
304 | 1248 #ifdef _LP64 |
1249 return FrameMap::as_pointer_opr(r15_thread); | |
1250 #else | |
0 | 1251 LIR_Opr result = new_register(T_INT); |
1252 __ get_thread(result); | |
1253 return result; | |
304 | 1254 #endif // |
0 | 1255 } |
1256 | |
1257 void LIRGenerator::trace_block_entry(BlockBegin* block) { | |
1258 store_stack_parameter(LIR_OprFact::intConst(block->block_id()), in_ByteSize(0)); | |
1259 LIR_OprList* args = new LIR_OprList(); | |
1260 address func = CAST_FROM_FN_PTR(address, Runtime1::trace_block_entry); | |
1261 __ call_runtime_leaf(func, LIR_OprFact::illegalOpr, LIR_OprFact::illegalOpr, args); | |
1262 } | |
1263 | |
1264 | |
1265 void LIRGenerator::volatile_field_store(LIR_Opr value, LIR_Address* address, | |
1266 CodeEmitInfo* info) { | |
1267 if (address->type() == T_LONG) { | |
1268 address = new LIR_Address(address->base(), | |
1269 address->index(), address->scale(), | |
1270 address->disp(), T_DOUBLE); | |
1271 // Transfer the value atomically by using FP moves. This means | |
1272 // the value has to be moved between CPU and FPU registers. It | |
1273 // always has to be moved through spill slot since there's no | |
1274 // quick way to pack the value into an SSE register. | |
1275 LIR_Opr temp_double = new_register(T_DOUBLE); | |
1276 LIR_Opr spill = new_register(T_LONG); | |
1277 set_vreg_flag(spill, must_start_in_memory); | |
1278 __ move(value, spill); | |
1279 __ volatile_move(spill, temp_double, T_LONG); | |
1280 __ volatile_move(temp_double, LIR_OprFact::address(address), T_LONG, info); | |
1281 } else { | |
1282 __ store(value, address, info); | |
1283 } | |
1284 } | |
1285 | |
1286 | |
1287 | |
1288 void LIRGenerator::volatile_field_load(LIR_Address* address, LIR_Opr result, | |
1289 CodeEmitInfo* info) { | |
1290 if (address->type() == T_LONG) { | |
1291 address = new LIR_Address(address->base(), | |
1292 address->index(), address->scale(), | |
1293 address->disp(), T_DOUBLE); | |
1294 // Transfer the value atomically by using FP moves. This means | |
1295 // the value has to be moved between CPU and FPU registers. In | |
1296 // SSE0 and SSE1 mode it has to be moved through spill slot but in | |
1297 // SSE2+ mode it can be moved directly. | |
1298 LIR_Opr temp_double = new_register(T_DOUBLE); | |
1299 __ volatile_move(LIR_OprFact::address(address), temp_double, T_LONG, info); | |
1300 __ volatile_move(temp_double, result, T_LONG); | |
1301 if (UseSSE < 2) { | |
1302 // no spill slot needed in SSE2 mode because xmm->cpu register move is possible | |
1303 set_vreg_flag(result, must_start_in_memory); | |
1304 } | |
1305 } else { | |
1306 __ load(address, result, info); | |
1307 } | |
1308 } | |
1309 | |
1310 void LIRGenerator::get_Object_unsafe(LIR_Opr dst, LIR_Opr src, LIR_Opr offset, | |
1311 BasicType type, bool is_volatile) { | |
1312 if (is_volatile && type == T_LONG) { | |
1313 LIR_Address* addr = new LIR_Address(src, offset, T_DOUBLE); | |
1314 LIR_Opr tmp = new_register(T_DOUBLE); | |
1315 __ load(addr, tmp); | |
1316 LIR_Opr spill = new_register(T_LONG); | |
1317 set_vreg_flag(spill, must_start_in_memory); | |
1318 __ move(tmp, spill); | |
1319 __ move(spill, dst); | |
1320 } else { | |
1321 LIR_Address* addr = new LIR_Address(src, offset, type); | |
1322 __ load(addr, dst); | |
1323 } | |
1324 } | |
1325 | |
1326 | |
1327 void LIRGenerator::put_Object_unsafe(LIR_Opr src, LIR_Opr offset, LIR_Opr data, | |
1328 BasicType type, bool is_volatile) { | |
1329 if (is_volatile && type == T_LONG) { | |
1330 LIR_Address* addr = new LIR_Address(src, offset, T_DOUBLE); | |
1331 LIR_Opr tmp = new_register(T_DOUBLE); | |
1332 LIR_Opr spill = new_register(T_DOUBLE); | |
1333 set_vreg_flag(spill, must_start_in_memory); | |
1334 __ move(data, spill); | |
1335 __ move(spill, tmp); | |
1336 __ move(tmp, addr); | |
1337 } else { | |
1338 LIR_Address* addr = new LIR_Address(src, offset, type); | |
1339 bool is_obj = (type == T_ARRAY || type == T_OBJECT); | |
1340 if (is_obj) { | |
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1342 pre_barrier(LIR_OprFact::address(addr), false, NULL); |
0 | 1343 __ move(data, addr); |
1344 assert(src->is_register(), "must be register"); | |
1345 // Seems to be a precise address | |
1346 post_barrier(LIR_OprFact::address(addr), data); | |
1347 } else { | |
1348 __ move(data, addr); | |
1349 } | |
1350 } | |
1351 } |