Mercurial > hg > truffle
annotate src/cpu/x86/vm/x86.ad @ 14655:7380034e5b31
8035735: Metaspace::contains become extremely slow in some cases
Summary: Call is_metadata instead which does less work for the call in debugInfo.hpp which is called for all compiled code stack frames.
Reviewed-by: jmasa, dcubed
author | coleenp |
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date | Mon, 03 Mar 2014 13:58:52 -0500 |
parents | 00f5eff62d18 |
children | 4ca6dc0799b6 a433eb716ce1 |
rev | line source |
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4761 | 1 // |
4950 | 2 // Copyright (c) 2011, 2012, Oracle and/or its affiliates. All rights reserved. |
4761 | 3 // DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
4 // | |
5 // This code is free software; you can redistribute it and/or modify it | |
6 // under the terms of the GNU General Public License version 2 only, as | |
7 // published by the Free Software Foundation. | |
8 // | |
9 // This code is distributed in the hope that it will be useful, but WITHOUT | |
10 // ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
11 // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
12 // version 2 for more details (a copy is included in the LICENSE file that | |
13 // accompanied this code). | |
14 // | |
15 // You should have received a copy of the GNU General Public License version | |
16 // 2 along with this work; if not, write to the Free Software Foundation, | |
17 // Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
18 // | |
19 // Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA | |
20 // or visit www.oracle.com if you need additional information or have any | |
21 // questions. | |
22 // | |
23 // | |
24 | |
25 // X86 Common Architecture Description File | |
26 | |
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27 //----------REGISTER DEFINITION BLOCK------------------------------------------ |
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28 // This information is used by the matcher and the register allocator to |
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29 // describe individual registers and classes of registers within the target |
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30 // archtecture. |
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31 |
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32 register %{ |
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33 //----------Architecture Description Register Definitions---------------------- |
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34 // General Registers |
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35 // "reg_def" name ( register save type, C convention save type, |
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36 // ideal register type, encoding ); |
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37 // Register Save Types: |
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38 // |
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39 // NS = No-Save: The register allocator assumes that these registers |
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40 // can be used without saving upon entry to the method, & |
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41 // that they do not need to be saved at call sites. |
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42 // |
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43 // SOC = Save-On-Call: The register allocator assumes that these registers |
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44 // can be used without saving upon entry to the method, |
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45 // but that they must be saved at call sites. |
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46 // |
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47 // SOE = Save-On-Entry: The register allocator assumes that these registers |
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48 // must be saved before using them upon entry to the |
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49 // method, but they do not need to be saved at call |
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50 // sites. |
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51 // |
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52 // AS = Always-Save: The register allocator assumes that these registers |
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53 // must be saved before using them upon entry to the |
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54 // method, & that they must be saved at call sites. |
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55 // |
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56 // Ideal Register Type is used to determine how to save & restore a |
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57 // register. Op_RegI will get spilled with LoadI/StoreI, Op_RegP will get |
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58 // spilled with LoadP/StoreP. If the register supports both, use Op_RegI. |
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59 // |
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60 // The encoding number is the actual bit-pattern placed into the opcodes. |
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61 |
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62 // XMM registers. 256-bit registers or 8 words each, labeled (a)-h. |
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63 // Word a in each register holds a Float, words ab hold a Double. |
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64 // The whole registers are used in SSE4.2 version intrinsics, |
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65 // array copy stubs and superword operations (see UseSSE42Intrinsics, |
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66 // UseXMMForArrayCopy and UseSuperword flags). |
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67 // XMM8-XMM15 must be encoded with REX (VEX for UseAVX). |
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68 // Linux ABI: No register preserved across function calls |
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69 // XMM0-XMM7 might hold parameters |
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70 // Windows ABI: XMM6-XMM15 preserved across function calls |
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71 // XMM0-XMM3 might hold parameters |
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72 |
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73 reg_def XMM0 ( SOC, SOC, Op_RegF, 0, xmm0->as_VMReg()); |
6225 | 74 reg_def XMM0b( SOC, SOC, Op_RegF, 0, xmm0->as_VMReg()->next(1)); |
75 reg_def XMM0c( SOC, SOC, Op_RegF, 0, xmm0->as_VMReg()->next(2)); | |
76 reg_def XMM0d( SOC, SOC, Op_RegF, 0, xmm0->as_VMReg()->next(3)); | |
77 reg_def XMM0e( SOC, SOC, Op_RegF, 0, xmm0->as_VMReg()->next(4)); | |
78 reg_def XMM0f( SOC, SOC, Op_RegF, 0, xmm0->as_VMReg()->next(5)); | |
79 reg_def XMM0g( SOC, SOC, Op_RegF, 0, xmm0->as_VMReg()->next(6)); | |
80 reg_def XMM0h( SOC, SOC, Op_RegF, 0, xmm0->as_VMReg()->next(7)); | |
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81 |
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82 reg_def XMM1 ( SOC, SOC, Op_RegF, 1, xmm1->as_VMReg()); |
6225 | 83 reg_def XMM1b( SOC, SOC, Op_RegF, 1, xmm1->as_VMReg()->next(1)); |
84 reg_def XMM1c( SOC, SOC, Op_RegF, 1, xmm1->as_VMReg()->next(2)); | |
85 reg_def XMM1d( SOC, SOC, Op_RegF, 1, xmm1->as_VMReg()->next(3)); | |
86 reg_def XMM1e( SOC, SOC, Op_RegF, 1, xmm1->as_VMReg()->next(4)); | |
87 reg_def XMM1f( SOC, SOC, Op_RegF, 1, xmm1->as_VMReg()->next(5)); | |
88 reg_def XMM1g( SOC, SOC, Op_RegF, 1, xmm1->as_VMReg()->next(6)); | |
89 reg_def XMM1h( SOC, SOC, Op_RegF, 1, xmm1->as_VMReg()->next(7)); | |
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90 |
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91 reg_def XMM2 ( SOC, SOC, Op_RegF, 2, xmm2->as_VMReg()); |
6225 | 92 reg_def XMM2b( SOC, SOC, Op_RegF, 2, xmm2->as_VMReg()->next(1)); |
93 reg_def XMM2c( SOC, SOC, Op_RegF, 2, xmm2->as_VMReg()->next(2)); | |
94 reg_def XMM2d( SOC, SOC, Op_RegF, 2, xmm2->as_VMReg()->next(3)); | |
95 reg_def XMM2e( SOC, SOC, Op_RegF, 2, xmm2->as_VMReg()->next(4)); | |
96 reg_def XMM2f( SOC, SOC, Op_RegF, 2, xmm2->as_VMReg()->next(5)); | |
97 reg_def XMM2g( SOC, SOC, Op_RegF, 2, xmm2->as_VMReg()->next(6)); | |
98 reg_def XMM2h( SOC, SOC, Op_RegF, 2, xmm2->as_VMReg()->next(7)); | |
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99 |
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100 reg_def XMM3 ( SOC, SOC, Op_RegF, 3, xmm3->as_VMReg()); |
6225 | 101 reg_def XMM3b( SOC, SOC, Op_RegF, 3, xmm3->as_VMReg()->next(1)); |
102 reg_def XMM3c( SOC, SOC, Op_RegF, 3, xmm3->as_VMReg()->next(2)); | |
103 reg_def XMM3d( SOC, SOC, Op_RegF, 3, xmm3->as_VMReg()->next(3)); | |
104 reg_def XMM3e( SOC, SOC, Op_RegF, 3, xmm3->as_VMReg()->next(4)); | |
105 reg_def XMM3f( SOC, SOC, Op_RegF, 3, xmm3->as_VMReg()->next(5)); | |
106 reg_def XMM3g( SOC, SOC, Op_RegF, 3, xmm3->as_VMReg()->next(6)); | |
107 reg_def XMM3h( SOC, SOC, Op_RegF, 3, xmm3->as_VMReg()->next(7)); | |
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108 |
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109 reg_def XMM4 ( SOC, SOC, Op_RegF, 4, xmm4->as_VMReg()); |
6225 | 110 reg_def XMM4b( SOC, SOC, Op_RegF, 4, xmm4->as_VMReg()->next(1)); |
111 reg_def XMM4c( SOC, SOC, Op_RegF, 4, xmm4->as_VMReg()->next(2)); | |
112 reg_def XMM4d( SOC, SOC, Op_RegF, 4, xmm4->as_VMReg()->next(3)); | |
113 reg_def XMM4e( SOC, SOC, Op_RegF, 4, xmm4->as_VMReg()->next(4)); | |
114 reg_def XMM4f( SOC, SOC, Op_RegF, 4, xmm4->as_VMReg()->next(5)); | |
115 reg_def XMM4g( SOC, SOC, Op_RegF, 4, xmm4->as_VMReg()->next(6)); | |
116 reg_def XMM4h( SOC, SOC, Op_RegF, 4, xmm4->as_VMReg()->next(7)); | |
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117 |
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118 reg_def XMM5 ( SOC, SOC, Op_RegF, 5, xmm5->as_VMReg()); |
6225 | 119 reg_def XMM5b( SOC, SOC, Op_RegF, 5, xmm5->as_VMReg()->next(1)); |
120 reg_def XMM5c( SOC, SOC, Op_RegF, 5, xmm5->as_VMReg()->next(2)); | |
121 reg_def XMM5d( SOC, SOC, Op_RegF, 5, xmm5->as_VMReg()->next(3)); | |
122 reg_def XMM5e( SOC, SOC, Op_RegF, 5, xmm5->as_VMReg()->next(4)); | |
123 reg_def XMM5f( SOC, SOC, Op_RegF, 5, xmm5->as_VMReg()->next(5)); | |
124 reg_def XMM5g( SOC, SOC, Op_RegF, 5, xmm5->as_VMReg()->next(6)); | |
125 reg_def XMM5h( SOC, SOC, Op_RegF, 5, xmm5->as_VMReg()->next(7)); | |
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126 |
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127 #ifdef _WIN64 |
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128 |
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129 reg_def XMM6 ( SOC, SOE, Op_RegF, 6, xmm6->as_VMReg()); |
6225 | 130 reg_def XMM6b( SOC, SOE, Op_RegF, 6, xmm6->as_VMReg()->next(1)); |
131 reg_def XMM6c( SOC, SOE, Op_RegF, 6, xmm6->as_VMReg()->next(2)); | |
132 reg_def XMM6d( SOC, SOE, Op_RegF, 6, xmm6->as_VMReg()->next(3)); | |
133 reg_def XMM6e( SOC, SOE, Op_RegF, 6, xmm6->as_VMReg()->next(4)); | |
134 reg_def XMM6f( SOC, SOE, Op_RegF, 6, xmm6->as_VMReg()->next(5)); | |
135 reg_def XMM6g( SOC, SOE, Op_RegF, 6, xmm6->as_VMReg()->next(6)); | |
136 reg_def XMM6h( SOC, SOE, Op_RegF, 6, xmm6->as_VMReg()->next(7)); | |
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137 |
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138 reg_def XMM7 ( SOC, SOE, Op_RegF, 7, xmm7->as_VMReg()); |
6225 | 139 reg_def XMM7b( SOC, SOE, Op_RegF, 7, xmm7->as_VMReg()->next(1)); |
140 reg_def XMM7c( SOC, SOE, Op_RegF, 7, xmm7->as_VMReg()->next(2)); | |
141 reg_def XMM7d( SOC, SOE, Op_RegF, 7, xmm7->as_VMReg()->next(3)); | |
142 reg_def XMM7e( SOC, SOE, Op_RegF, 7, xmm7->as_VMReg()->next(4)); | |
143 reg_def XMM7f( SOC, SOE, Op_RegF, 7, xmm7->as_VMReg()->next(5)); | |
144 reg_def XMM7g( SOC, SOE, Op_RegF, 7, xmm7->as_VMReg()->next(6)); | |
145 reg_def XMM7h( SOC, SOE, Op_RegF, 7, xmm7->as_VMReg()->next(7)); | |
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146 |
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147 reg_def XMM8 ( SOC, SOE, Op_RegF, 8, xmm8->as_VMReg()); |
6225 | 148 reg_def XMM8b( SOC, SOE, Op_RegF, 8, xmm8->as_VMReg()->next(1)); |
149 reg_def XMM8c( SOC, SOE, Op_RegF, 8, xmm8->as_VMReg()->next(2)); | |
150 reg_def XMM8d( SOC, SOE, Op_RegF, 8, xmm8->as_VMReg()->next(3)); | |
151 reg_def XMM8e( SOC, SOE, Op_RegF, 8, xmm8->as_VMReg()->next(4)); | |
152 reg_def XMM8f( SOC, SOE, Op_RegF, 8, xmm8->as_VMReg()->next(5)); | |
153 reg_def XMM8g( SOC, SOE, Op_RegF, 8, xmm8->as_VMReg()->next(6)); | |
154 reg_def XMM8h( SOC, SOE, Op_RegF, 8, xmm8->as_VMReg()->next(7)); | |
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155 |
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156 reg_def XMM9 ( SOC, SOE, Op_RegF, 9, xmm9->as_VMReg()); |
6225 | 157 reg_def XMM9b( SOC, SOE, Op_RegF, 9, xmm9->as_VMReg()->next(1)); |
158 reg_def XMM9c( SOC, SOE, Op_RegF, 9, xmm9->as_VMReg()->next(2)); | |
159 reg_def XMM9d( SOC, SOE, Op_RegF, 9, xmm9->as_VMReg()->next(3)); | |
160 reg_def XMM9e( SOC, SOE, Op_RegF, 9, xmm9->as_VMReg()->next(4)); | |
161 reg_def XMM9f( SOC, SOE, Op_RegF, 9, xmm9->as_VMReg()->next(5)); | |
162 reg_def XMM9g( SOC, SOE, Op_RegF, 9, xmm9->as_VMReg()->next(6)); | |
163 reg_def XMM9h( SOC, SOE, Op_RegF, 9, xmm9->as_VMReg()->next(7)); | |
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164 |
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165 reg_def XMM10 ( SOC, SOE, Op_RegF, 10, xmm10->as_VMReg()); |
6225 | 166 reg_def XMM10b( SOC, SOE, Op_RegF, 10, xmm10->as_VMReg()->next(1)); |
167 reg_def XMM10c( SOC, SOE, Op_RegF, 10, xmm10->as_VMReg()->next(2)); | |
168 reg_def XMM10d( SOC, SOE, Op_RegF, 10, xmm10->as_VMReg()->next(3)); | |
169 reg_def XMM10e( SOC, SOE, Op_RegF, 10, xmm10->as_VMReg()->next(4)); | |
170 reg_def XMM10f( SOC, SOE, Op_RegF, 10, xmm10->as_VMReg()->next(5)); | |
171 reg_def XMM10g( SOC, SOE, Op_RegF, 10, xmm10->as_VMReg()->next(6)); | |
172 reg_def XMM10h( SOC, SOE, Op_RegF, 10, xmm10->as_VMReg()->next(7)); | |
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173 |
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174 reg_def XMM11 ( SOC, SOE, Op_RegF, 11, xmm11->as_VMReg()); |
6225 | 175 reg_def XMM11b( SOC, SOE, Op_RegF, 11, xmm11->as_VMReg()->next(1)); |
176 reg_def XMM11c( SOC, SOE, Op_RegF, 11, xmm11->as_VMReg()->next(2)); | |
177 reg_def XMM11d( SOC, SOE, Op_RegF, 11, xmm11->as_VMReg()->next(3)); | |
178 reg_def XMM11e( SOC, SOE, Op_RegF, 11, xmm11->as_VMReg()->next(4)); | |
179 reg_def XMM11f( SOC, SOE, Op_RegF, 11, xmm11->as_VMReg()->next(5)); | |
180 reg_def XMM11g( SOC, SOE, Op_RegF, 11, xmm11->as_VMReg()->next(6)); | |
181 reg_def XMM11h( SOC, SOE, Op_RegF, 11, xmm11->as_VMReg()->next(7)); | |
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182 |
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183 reg_def XMM12 ( SOC, SOE, Op_RegF, 12, xmm12->as_VMReg()); |
6225 | 184 reg_def XMM12b( SOC, SOE, Op_RegF, 12, xmm12->as_VMReg()->next(1)); |
185 reg_def XMM12c( SOC, SOE, Op_RegF, 12, xmm12->as_VMReg()->next(2)); | |
186 reg_def XMM12d( SOC, SOE, Op_RegF, 12, xmm12->as_VMReg()->next(3)); | |
187 reg_def XMM12e( SOC, SOE, Op_RegF, 12, xmm12->as_VMReg()->next(4)); | |
188 reg_def XMM12f( SOC, SOE, Op_RegF, 12, xmm12->as_VMReg()->next(5)); | |
189 reg_def XMM12g( SOC, SOE, Op_RegF, 12, xmm12->as_VMReg()->next(6)); | |
190 reg_def XMM12h( SOC, SOE, Op_RegF, 12, xmm12->as_VMReg()->next(7)); | |
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191 |
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192 reg_def XMM13 ( SOC, SOE, Op_RegF, 13, xmm13->as_VMReg()); |
6225 | 193 reg_def XMM13b( SOC, SOE, Op_RegF, 13, xmm13->as_VMReg()->next(1)); |
194 reg_def XMM13c( SOC, SOE, Op_RegF, 13, xmm13->as_VMReg()->next(2)); | |
195 reg_def XMM13d( SOC, SOE, Op_RegF, 13, xmm13->as_VMReg()->next(3)); | |
196 reg_def XMM13e( SOC, SOE, Op_RegF, 13, xmm13->as_VMReg()->next(4)); | |
197 reg_def XMM13f( SOC, SOE, Op_RegF, 13, xmm13->as_VMReg()->next(5)); | |
198 reg_def XMM13g( SOC, SOE, Op_RegF, 13, xmm13->as_VMReg()->next(6)); | |
199 reg_def XMM13h( SOC, SOE, Op_RegF, 13, xmm13->as_VMReg()->next(7)); | |
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200 |
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201 reg_def XMM14 ( SOC, SOE, Op_RegF, 14, xmm14->as_VMReg()); |
6225 | 202 reg_def XMM14b( SOC, SOE, Op_RegF, 14, xmm14->as_VMReg()->next(1)); |
203 reg_def XMM14c( SOC, SOE, Op_RegF, 14, xmm14->as_VMReg()->next(2)); | |
204 reg_def XMM14d( SOC, SOE, Op_RegF, 14, xmm14->as_VMReg()->next(3)); | |
205 reg_def XMM14e( SOC, SOE, Op_RegF, 14, xmm14->as_VMReg()->next(4)); | |
206 reg_def XMM14f( SOC, SOE, Op_RegF, 14, xmm14->as_VMReg()->next(5)); | |
207 reg_def XMM14g( SOC, SOE, Op_RegF, 14, xmm14->as_VMReg()->next(6)); | |
208 reg_def XMM14h( SOC, SOE, Op_RegF, 14, xmm14->as_VMReg()->next(7)); | |
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209 |
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210 reg_def XMM15 ( SOC, SOE, Op_RegF, 15, xmm15->as_VMReg()); |
6225 | 211 reg_def XMM15b( SOC, SOE, Op_RegF, 15, xmm15->as_VMReg()->next(1)); |
212 reg_def XMM15c( SOC, SOE, Op_RegF, 15, xmm15->as_VMReg()->next(2)); | |
213 reg_def XMM15d( SOC, SOE, Op_RegF, 15, xmm15->as_VMReg()->next(3)); | |
214 reg_def XMM15e( SOC, SOE, Op_RegF, 15, xmm15->as_VMReg()->next(4)); | |
215 reg_def XMM15f( SOC, SOE, Op_RegF, 15, xmm15->as_VMReg()->next(5)); | |
216 reg_def XMM15g( SOC, SOE, Op_RegF, 15, xmm15->as_VMReg()->next(6)); | |
217 reg_def XMM15h( SOC, SOE, Op_RegF, 15, xmm15->as_VMReg()->next(7)); | |
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218 |
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219 #else // _WIN64 |
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220 |
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221 reg_def XMM6 ( SOC, SOC, Op_RegF, 6, xmm6->as_VMReg()); |
6225 | 222 reg_def XMM6b( SOC, SOC, Op_RegF, 6, xmm6->as_VMReg()->next(1)); |
223 reg_def XMM6c( SOC, SOC, Op_RegF, 6, xmm6->as_VMReg()->next(2)); | |
224 reg_def XMM6d( SOC, SOC, Op_RegF, 6, xmm6->as_VMReg()->next(3)); | |
225 reg_def XMM6e( SOC, SOC, Op_RegF, 6, xmm6->as_VMReg()->next(4)); | |
226 reg_def XMM6f( SOC, SOC, Op_RegF, 6, xmm6->as_VMReg()->next(5)); | |
227 reg_def XMM6g( SOC, SOC, Op_RegF, 6, xmm6->as_VMReg()->next(6)); | |
228 reg_def XMM6h( SOC, SOC, Op_RegF, 6, xmm6->as_VMReg()->next(7)); | |
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229 |
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230 reg_def XMM7 ( SOC, SOC, Op_RegF, 7, xmm7->as_VMReg()); |
6225 | 231 reg_def XMM7b( SOC, SOC, Op_RegF, 7, xmm7->as_VMReg()->next(1)); |
232 reg_def XMM7c( SOC, SOC, Op_RegF, 7, xmm7->as_VMReg()->next(2)); | |
233 reg_def XMM7d( SOC, SOC, Op_RegF, 7, xmm7->as_VMReg()->next(3)); | |
234 reg_def XMM7e( SOC, SOC, Op_RegF, 7, xmm7->as_VMReg()->next(4)); | |
235 reg_def XMM7f( SOC, SOC, Op_RegF, 7, xmm7->as_VMReg()->next(5)); | |
236 reg_def XMM7g( SOC, SOC, Op_RegF, 7, xmm7->as_VMReg()->next(6)); | |
237 reg_def XMM7h( SOC, SOC, Op_RegF, 7, xmm7->as_VMReg()->next(7)); | |
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238 |
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239 #ifdef _LP64 |
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240 |
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241 reg_def XMM8 ( SOC, SOC, Op_RegF, 8, xmm8->as_VMReg()); |
6225 | 242 reg_def XMM8b( SOC, SOC, Op_RegF, 8, xmm8->as_VMReg()->next(1)); |
243 reg_def XMM8c( SOC, SOC, Op_RegF, 8, xmm8->as_VMReg()->next(2)); | |
244 reg_def XMM8d( SOC, SOC, Op_RegF, 8, xmm8->as_VMReg()->next(3)); | |
245 reg_def XMM8e( SOC, SOC, Op_RegF, 8, xmm8->as_VMReg()->next(4)); | |
246 reg_def XMM8f( SOC, SOC, Op_RegF, 8, xmm8->as_VMReg()->next(5)); | |
247 reg_def XMM8g( SOC, SOC, Op_RegF, 8, xmm8->as_VMReg()->next(6)); | |
248 reg_def XMM8h( SOC, SOC, Op_RegF, 8, xmm8->as_VMReg()->next(7)); | |
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249 |
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250 reg_def XMM9 ( SOC, SOC, Op_RegF, 9, xmm9->as_VMReg()); |
6225 | 251 reg_def XMM9b( SOC, SOC, Op_RegF, 9, xmm9->as_VMReg()->next(1)); |
252 reg_def XMM9c( SOC, SOC, Op_RegF, 9, xmm9->as_VMReg()->next(2)); | |
253 reg_def XMM9d( SOC, SOC, Op_RegF, 9, xmm9->as_VMReg()->next(3)); | |
254 reg_def XMM9e( SOC, SOC, Op_RegF, 9, xmm9->as_VMReg()->next(4)); | |
255 reg_def XMM9f( SOC, SOC, Op_RegF, 9, xmm9->as_VMReg()->next(5)); | |
256 reg_def XMM9g( SOC, SOC, Op_RegF, 9, xmm9->as_VMReg()->next(6)); | |
257 reg_def XMM9h( SOC, SOC, Op_RegF, 9, xmm9->as_VMReg()->next(7)); | |
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258 |
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259 reg_def XMM10 ( SOC, SOC, Op_RegF, 10, xmm10->as_VMReg()); |
6225 | 260 reg_def XMM10b( SOC, SOC, Op_RegF, 10, xmm10->as_VMReg()->next(1)); |
261 reg_def XMM10c( SOC, SOC, Op_RegF, 10, xmm10->as_VMReg()->next(2)); | |
262 reg_def XMM10d( SOC, SOC, Op_RegF, 10, xmm10->as_VMReg()->next(3)); | |
263 reg_def XMM10e( SOC, SOC, Op_RegF, 10, xmm10->as_VMReg()->next(4)); | |
264 reg_def XMM10f( SOC, SOC, Op_RegF, 10, xmm10->as_VMReg()->next(5)); | |
265 reg_def XMM10g( SOC, SOC, Op_RegF, 10, xmm10->as_VMReg()->next(6)); | |
266 reg_def XMM10h( SOC, SOC, Op_RegF, 10, xmm10->as_VMReg()->next(7)); | |
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267 |
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268 reg_def XMM11 ( SOC, SOC, Op_RegF, 11, xmm11->as_VMReg()); |
6225 | 269 reg_def XMM11b( SOC, SOC, Op_RegF, 11, xmm11->as_VMReg()->next(1)); |
270 reg_def XMM11c( SOC, SOC, Op_RegF, 11, xmm11->as_VMReg()->next(2)); | |
271 reg_def XMM11d( SOC, SOC, Op_RegF, 11, xmm11->as_VMReg()->next(3)); | |
272 reg_def XMM11e( SOC, SOC, Op_RegF, 11, xmm11->as_VMReg()->next(4)); | |
273 reg_def XMM11f( SOC, SOC, Op_RegF, 11, xmm11->as_VMReg()->next(5)); | |
274 reg_def XMM11g( SOC, SOC, Op_RegF, 11, xmm11->as_VMReg()->next(6)); | |
275 reg_def XMM11h( SOC, SOC, Op_RegF, 11, xmm11->as_VMReg()->next(7)); | |
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276 |
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277 reg_def XMM12 ( SOC, SOC, Op_RegF, 12, xmm12->as_VMReg()); |
6225 | 278 reg_def XMM12b( SOC, SOC, Op_RegF, 12, xmm12->as_VMReg()->next(1)); |
279 reg_def XMM12c( SOC, SOC, Op_RegF, 12, xmm12->as_VMReg()->next(2)); | |
280 reg_def XMM12d( SOC, SOC, Op_RegF, 12, xmm12->as_VMReg()->next(3)); | |
281 reg_def XMM12e( SOC, SOC, Op_RegF, 12, xmm12->as_VMReg()->next(4)); | |
282 reg_def XMM12f( SOC, SOC, Op_RegF, 12, xmm12->as_VMReg()->next(5)); | |
283 reg_def XMM12g( SOC, SOC, Op_RegF, 12, xmm12->as_VMReg()->next(6)); | |
284 reg_def XMM12h( SOC, SOC, Op_RegF, 12, xmm12->as_VMReg()->next(7)); | |
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285 |
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286 reg_def XMM13 ( SOC, SOC, Op_RegF, 13, xmm13->as_VMReg()); |
6225 | 287 reg_def XMM13b( SOC, SOC, Op_RegF, 13, xmm13->as_VMReg()->next(1)); |
288 reg_def XMM13c( SOC, SOC, Op_RegF, 13, xmm13->as_VMReg()->next(2)); | |
289 reg_def XMM13d( SOC, SOC, Op_RegF, 13, xmm13->as_VMReg()->next(3)); | |
290 reg_def XMM13e( SOC, SOC, Op_RegF, 13, xmm13->as_VMReg()->next(4)); | |
291 reg_def XMM13f( SOC, SOC, Op_RegF, 13, xmm13->as_VMReg()->next(5)); | |
292 reg_def XMM13g( SOC, SOC, Op_RegF, 13, xmm13->as_VMReg()->next(6)); | |
293 reg_def XMM13h( SOC, SOC, Op_RegF, 13, xmm13->as_VMReg()->next(7)); | |
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294 |
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295 reg_def XMM14 ( SOC, SOC, Op_RegF, 14, xmm14->as_VMReg()); |
6225 | 296 reg_def XMM14b( SOC, SOC, Op_RegF, 14, xmm14->as_VMReg()->next(1)); |
297 reg_def XMM14c( SOC, SOC, Op_RegF, 14, xmm14->as_VMReg()->next(2)); | |
298 reg_def XMM14d( SOC, SOC, Op_RegF, 14, xmm14->as_VMReg()->next(3)); | |
299 reg_def XMM14e( SOC, SOC, Op_RegF, 14, xmm14->as_VMReg()->next(4)); | |
300 reg_def XMM14f( SOC, SOC, Op_RegF, 14, xmm14->as_VMReg()->next(5)); | |
301 reg_def XMM14g( SOC, SOC, Op_RegF, 14, xmm14->as_VMReg()->next(6)); | |
302 reg_def XMM14h( SOC, SOC, Op_RegF, 14, xmm14->as_VMReg()->next(7)); | |
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303 |
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304 reg_def XMM15 ( SOC, SOC, Op_RegF, 15, xmm15->as_VMReg()); |
6225 | 305 reg_def XMM15b( SOC, SOC, Op_RegF, 15, xmm15->as_VMReg()->next(1)); |
306 reg_def XMM15c( SOC, SOC, Op_RegF, 15, xmm15->as_VMReg()->next(2)); | |
307 reg_def XMM15d( SOC, SOC, Op_RegF, 15, xmm15->as_VMReg()->next(3)); | |
308 reg_def XMM15e( SOC, SOC, Op_RegF, 15, xmm15->as_VMReg()->next(4)); | |
309 reg_def XMM15f( SOC, SOC, Op_RegF, 15, xmm15->as_VMReg()->next(5)); | |
310 reg_def XMM15g( SOC, SOC, Op_RegF, 15, xmm15->as_VMReg()->next(6)); | |
311 reg_def XMM15h( SOC, SOC, Op_RegF, 15, xmm15->as_VMReg()->next(7)); | |
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312 |
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313 #endif // _LP64 |
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314 |
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315 #endif // _WIN64 |
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316 |
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317 #ifdef _LP64 |
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318 reg_def RFLAGS(SOC, SOC, 0, 16, VMRegImpl::Bad()); |
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319 #else |
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320 reg_def RFLAGS(SOC, SOC, 0, 8, VMRegImpl::Bad()); |
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321 #endif // _LP64 |
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322 |
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323 alloc_class chunk1(XMM0, XMM0b, XMM0c, XMM0d, XMM0e, XMM0f, XMM0g, XMM0h, |
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324 XMM1, XMM1b, XMM1c, XMM1d, XMM1e, XMM1f, XMM1g, XMM1h, |
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325 XMM2, XMM2b, XMM2c, XMM2d, XMM2e, XMM2f, XMM2g, XMM2h, |
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326 XMM3, XMM3b, XMM3c, XMM3d, XMM3e, XMM3f, XMM3g, XMM3h, |
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327 XMM4, XMM4b, XMM4c, XMM4d, XMM4e, XMM4f, XMM4g, XMM4h, |
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328 XMM5, XMM5b, XMM5c, XMM5d, XMM5e, XMM5f, XMM5g, XMM5h, |
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329 XMM6, XMM6b, XMM6c, XMM6d, XMM6e, XMM6f, XMM6g, XMM6h, |
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330 XMM7, XMM7b, XMM7c, XMM7d, XMM7e, XMM7f, XMM7g, XMM7h |
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331 #ifdef _LP64 |
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332 ,XMM8, XMM8b, XMM8c, XMM8d, XMM8e, XMM8f, XMM8g, XMM8h, |
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333 XMM9, XMM9b, XMM9c, XMM9d, XMM9e, XMM9f, XMM9g, XMM9h, |
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334 XMM10, XMM10b, XMM10c, XMM10d, XMM10e, XMM10f, XMM10g, XMM10h, |
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335 XMM11, XMM11b, XMM11c, XMM11d, XMM11e, XMM11f, XMM11g, XMM11h, |
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336 XMM12, XMM12b, XMM12c, XMM12d, XMM12e, XMM12f, XMM12g, XMM12h, |
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337 XMM13, XMM13b, XMM13c, XMM13d, XMM13e, XMM13f, XMM13g, XMM13h, |
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338 XMM14, XMM14b, XMM14c, XMM14d, XMM14e, XMM14f, XMM14g, XMM14h, |
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339 XMM15, XMM15b, XMM15c, XMM15d, XMM15e, XMM15f, XMM15g, XMM15h |
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|
340 #endif |
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|
341 ); |
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|
342 |
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|
343 // flags allocation class should be last. |
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|
344 alloc_class chunk2(RFLAGS); |
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|
345 |
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|
346 // Singleton class for condition codes |
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|
347 reg_class int_flags(RFLAGS); |
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|
348 |
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349 // Class for all float registers |
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|
350 reg_class float_reg(XMM0, |
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|
351 XMM1, |
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352 XMM2, |
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|
353 XMM3, |
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kvn
parents:
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|
354 XMM4, |
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kvn
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|
355 XMM5, |
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kvn
parents:
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|
356 XMM6, |
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kvn
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357 XMM7 |
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358 #ifdef _LP64 |
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359 ,XMM8, |
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kvn
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|
360 XMM9, |
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kvn
parents:
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|
361 XMM10, |
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kvn
parents:
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|
362 XMM11, |
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kvn
parents:
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|
363 XMM12, |
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kvn
parents:
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|
364 XMM13, |
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kvn
parents:
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|
365 XMM14, |
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kvn
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|
366 XMM15 |
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367 #endif |
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|
368 ); |
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|
369 |
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370 // Class for all double registers |
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371 reg_class double_reg(XMM0, XMM0b, |
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372 XMM1, XMM1b, |
8c92982cbbc4
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kvn
parents:
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diff
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|
373 XMM2, XMM2b, |
8c92982cbbc4
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kvn
parents:
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diff
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|
374 XMM3, XMM3b, |
8c92982cbbc4
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kvn
parents:
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diff
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|
375 XMM4, XMM4b, |
8c92982cbbc4
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kvn
parents:
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diff
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|
376 XMM5, XMM5b, |
8c92982cbbc4
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kvn
parents:
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diff
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|
377 XMM6, XMM6b, |
8c92982cbbc4
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kvn
parents:
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|
378 XMM7, XMM7b |
8c92982cbbc4
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kvn
parents:
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|
379 #ifdef _LP64 |
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380 ,XMM8, XMM8b, |
8c92982cbbc4
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kvn
parents:
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|
381 XMM9, XMM9b, |
8c92982cbbc4
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kvn
parents:
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changeset
|
382 XMM10, XMM10b, |
8c92982cbbc4
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kvn
parents:
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diff
changeset
|
383 XMM11, XMM11b, |
8c92982cbbc4
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kvn
parents:
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diff
changeset
|
384 XMM12, XMM12b, |
8c92982cbbc4
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kvn
parents:
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diff
changeset
|
385 XMM13, XMM13b, |
8c92982cbbc4
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kvn
parents:
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diff
changeset
|
386 XMM14, XMM14b, |
8c92982cbbc4
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kvn
parents:
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diff
changeset
|
387 XMM15, XMM15b |
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kvn
parents:
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|
388 #endif |
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|
389 ); |
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kvn
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|
390 |
8c92982cbbc4
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kvn
parents:
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|
391 // Class for all 32bit vector registers |
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kvn
parents:
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|
392 reg_class vectors_reg(XMM0, |
8c92982cbbc4
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|
393 XMM1, |
8c92982cbbc4
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kvn
parents:
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changeset
|
394 XMM2, |
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kvn
parents:
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diff
changeset
|
395 XMM3, |
8c92982cbbc4
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kvn
parents:
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changeset
|
396 XMM4, |
8c92982cbbc4
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kvn
parents:
4950
diff
changeset
|
397 XMM5, |
8c92982cbbc4
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kvn
parents:
4950
diff
changeset
|
398 XMM6, |
8c92982cbbc4
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kvn
parents:
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changeset
|
399 XMM7 |
8c92982cbbc4
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kvn
parents:
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changeset
|
400 #ifdef _LP64 |
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|
401 ,XMM8, |
8c92982cbbc4
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kvn
parents:
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diff
changeset
|
402 XMM9, |
8c92982cbbc4
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kvn
parents:
4950
diff
changeset
|
403 XMM10, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
404 XMM11, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
405 XMM12, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
406 XMM13, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
407 XMM14, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
408 XMM15 |
8c92982cbbc4
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kvn
parents:
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|
409 #endif |
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kvn
parents:
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|
410 ); |
8c92982cbbc4
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kvn
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changeset
|
411 |
8c92982cbbc4
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kvn
parents:
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|
412 // Class for all 64bit vector registers |
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kvn
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|
413 reg_class vectord_reg(XMM0, XMM0b, |
8c92982cbbc4
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kvn
parents:
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|
414 XMM1, XMM1b, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
415 XMM2, XMM2b, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
416 XMM3, XMM3b, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
417 XMM4, XMM4b, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
418 XMM5, XMM5b, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
419 XMM6, XMM6b, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
420 XMM7, XMM7b |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
421 #ifdef _LP64 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
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changeset
|
422 ,XMM8, XMM8b, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
423 XMM9, XMM9b, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
424 XMM10, XMM10b, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
425 XMM11, XMM11b, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
426 XMM12, XMM12b, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
427 XMM13, XMM13b, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
428 XMM14, XMM14b, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
429 XMM15, XMM15b |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
430 #endif |
8c92982cbbc4
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kvn
parents:
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changeset
|
431 ); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
432 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
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diff
changeset
|
433 // Class for all 128bit vector registers |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
434 reg_class vectorx_reg(XMM0, XMM0b, XMM0c, XMM0d, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
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changeset
|
435 XMM1, XMM1b, XMM1c, XMM1d, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
436 XMM2, XMM2b, XMM2c, XMM2d, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
437 XMM3, XMM3b, XMM3c, XMM3d, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
438 XMM4, XMM4b, XMM4c, XMM4d, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
439 XMM5, XMM5b, XMM5c, XMM5d, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
440 XMM6, XMM6b, XMM6c, XMM6d, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
441 XMM7, XMM7b, XMM7c, XMM7d |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
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diff
changeset
|
442 #ifdef _LP64 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
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diff
changeset
|
443 ,XMM8, XMM8b, XMM8c, XMM8d, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
444 XMM9, XMM9b, XMM9c, XMM9d, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
445 XMM10, XMM10b, XMM10c, XMM10d, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
446 XMM11, XMM11b, XMM11c, XMM11d, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
447 XMM12, XMM12b, XMM12c, XMM12d, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
448 XMM13, XMM13b, XMM13c, XMM13d, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
449 XMM14, XMM14b, XMM14c, XMM14d, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
450 XMM15, XMM15b, XMM15c, XMM15d |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
451 #endif |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
452 ); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
453 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
454 // Class for all 256bit vector registers |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
455 reg_class vectory_reg(XMM0, XMM0b, XMM0c, XMM0d, XMM0e, XMM0f, XMM0g, XMM0h, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
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changeset
|
456 XMM1, XMM1b, XMM1c, XMM1d, XMM1e, XMM1f, XMM1g, XMM1h, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
457 XMM2, XMM2b, XMM2c, XMM2d, XMM2e, XMM2f, XMM2g, XMM2h, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
458 XMM3, XMM3b, XMM3c, XMM3d, XMM3e, XMM3f, XMM3g, XMM3h, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
459 XMM4, XMM4b, XMM4c, XMM4d, XMM4e, XMM4f, XMM4g, XMM4h, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
460 XMM5, XMM5b, XMM5c, XMM5d, XMM5e, XMM5f, XMM5g, XMM5h, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
461 XMM6, XMM6b, XMM6c, XMM6d, XMM6e, XMM6f, XMM6g, XMM6h, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
462 XMM7, XMM7b, XMM7c, XMM7d, XMM7e, XMM7f, XMM7g, XMM7h |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
463 #ifdef _LP64 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
464 ,XMM8, XMM8b, XMM8c, XMM8d, XMM8e, XMM8f, XMM8g, XMM8h, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
465 XMM9, XMM9b, XMM9c, XMM9d, XMM9e, XMM9f, XMM9g, XMM9h, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
466 XMM10, XMM10b, XMM10c, XMM10d, XMM10e, XMM10f, XMM10g, XMM10h, |
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467 XMM11, XMM11b, XMM11c, XMM11d, XMM11e, XMM11f, XMM11g, XMM11h, |
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468 XMM12, XMM12b, XMM12c, XMM12d, XMM12e, XMM12f, XMM12g, XMM12h, |
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469 XMM13, XMM13b, XMM13c, XMM13d, XMM13e, XMM13f, XMM13g, XMM13h, |
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470 XMM14, XMM14b, XMM14c, XMM14d, XMM14e, XMM14f, XMM14g, XMM14h, |
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471 XMM15, XMM15b, XMM15c, XMM15d, XMM15e, XMM15f, XMM15g, XMM15h |
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472 #endif |
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473 ); |
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474 |
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475 %} |
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476 |
4761 | 477 source %{ |
478 // Float masks come from different places depending on platform. | |
479 #ifdef _LP64 | |
480 static address float_signmask() { return StubRoutines::x86::float_sign_mask(); } | |
481 static address float_signflip() { return StubRoutines::x86::float_sign_flip(); } | |
482 static address double_signmask() { return StubRoutines::x86::double_sign_mask(); } | |
483 static address double_signflip() { return StubRoutines::x86::double_sign_flip(); } | |
484 #else | |
485 static address float_signmask() { return (address)float_signmask_pool; } | |
486 static address float_signflip() { return (address)float_signflip_pool; } | |
487 static address double_signmask() { return (address)double_signmask_pool; } | |
488 static address double_signflip() { return (address)double_signflip_pool; } | |
489 #endif | |
4950 | 490 |
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491 |
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492 const bool Matcher::match_rule_supported(int opcode) { |
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493 if (!has_match_rule(opcode)) |
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494 return false; |
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495 |
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496 switch (opcode) { |
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497 case Op_PopCountI: |
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498 case Op_PopCountL: |
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499 if (!UsePopCountInstruction) |
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500 return false; |
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501 break; |
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502 case Op_MulVI: |
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503 if ((UseSSE < 4) && (UseAVX < 1)) // only with SSE4_1 or AVX |
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504 return false; |
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505 break; |
6795
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506 case Op_CompareAndSwapL: |
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507 #ifdef _LP64 |
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508 case Op_CompareAndSwapP: |
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509 #endif |
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510 if (!VM_Version::supports_cx8()) |
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511 return false; |
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512 break; |
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513 } |
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514 |
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515 return true; // Per default match rules are supported. |
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516 } |
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517 |
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518 // Max vector size in bytes. 0 if not supported. |
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519 const int Matcher::vector_width_in_bytes(BasicType bt) { |
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520 assert(is_java_primitive(bt), "only primitive type vectors"); |
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521 if (UseSSE < 2) return 0; |
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522 // SSE2 supports 128bit vectors for all types. |
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523 // AVX2 supports 256bit vectors for all types. |
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524 int size = (UseAVX > 1) ? 32 : 16; |
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525 // AVX1 supports 256bit vectors only for FLOAT and DOUBLE. |
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526 if (UseAVX > 0 && (bt == T_FLOAT || bt == T_DOUBLE)) |
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527 size = 32; |
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528 // Use flag to limit vector size. |
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529 size = MIN2(size,(int)MaxVectorSize); |
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530 // Minimum 2 values in vector (or 4 for bytes). |
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531 switch (bt) { |
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532 case T_DOUBLE: |
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533 case T_LONG: |
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534 if (size < 16) return 0; |
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535 case T_FLOAT: |
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536 case T_INT: |
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537 if (size < 8) return 0; |
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538 case T_BOOLEAN: |
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539 case T_BYTE: |
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540 case T_CHAR: |
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541 case T_SHORT: |
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542 if (size < 4) return 0; |
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543 break; |
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544 default: |
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545 ShouldNotReachHere(); |
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546 } |
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547 return size; |
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548 } |
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549 |
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550 // Limits on vector size (number of elements) loaded into vector. |
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551 const int Matcher::max_vector_size(const BasicType bt) { |
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552 return vector_width_in_bytes(bt)/type2aelembytes(bt); |
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553 } |
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554 const int Matcher::min_vector_size(const BasicType bt) { |
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555 int max_size = max_vector_size(bt); |
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556 // Min size which can be loaded into vector is 4 bytes. |
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557 int size = (type2aelembytes(bt) == 1) ? 4 : 2; |
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558 return MIN2(size,max_size); |
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559 } |
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560 |
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561 // Vector ideal reg corresponding to specidied size in bytes |
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562 const int Matcher::vector_ideal_reg(int size) { |
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563 assert(MaxVectorSize >= size, ""); |
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564 switch(size) { |
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565 case 4: return Op_VecS; |
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566 case 8: return Op_VecD; |
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567 case 16: return Op_VecX; |
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568 case 32: return Op_VecY; |
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569 } |
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570 ShouldNotReachHere(); |
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571 return 0; |
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572 } |
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573 |
6823 | 574 // Only lowest bits of xmm reg are used for vector shift count. |
575 const int Matcher::vector_shift_count_ideal_reg(int size) { | |
576 return Op_VecS; | |
577 } | |
578 | |
6179
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579 // x86 supports misaligned vectors store/load. |
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580 const bool Matcher::misaligned_vectors_ok() { |
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581 return !AlignVector; // can be changed by flag |
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582 } |
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583 |
14261 | 584 // x86 AES instructions are compatible with SunJCE expanded |
585 // keys, hence we do not need to pass the original key to stubs | |
586 const bool Matcher::pass_original_key_for_aes() { | |
587 return false; | |
588 } | |
589 | |
6179
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590 // Helper methods for MachSpillCopyNode::implementation(). |
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591 static int vec_mov_helper(CodeBuffer *cbuf, bool do_size, int src_lo, int dst_lo, |
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592 int src_hi, int dst_hi, uint ireg, outputStream* st) { |
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593 // In 64-bit VM size calculation is very complex. Emitting instructions |
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594 // into scratch buffer is used to get size in 64-bit VM. |
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595 LP64_ONLY( assert(!do_size, "this method calculates size only for 32-bit VM"); ) |
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596 assert(ireg == Op_VecS || // 32bit vector |
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597 (src_lo & 1) == 0 && (src_lo + 1) == src_hi && |
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598 (dst_lo & 1) == 0 && (dst_lo + 1) == dst_hi, |
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599 "no non-adjacent vector moves" ); |
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600 if (cbuf) { |
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601 MacroAssembler _masm(cbuf); |
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602 int offset = __ offset(); |
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603 switch (ireg) { |
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604 case Op_VecS: // copy whole register |
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605 case Op_VecD: |
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606 case Op_VecX: |
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607 __ movdqu(as_XMMRegister(Matcher::_regEncode[dst_lo]), as_XMMRegister(Matcher::_regEncode[src_lo])); |
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608 break; |
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609 case Op_VecY: |
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610 __ vmovdqu(as_XMMRegister(Matcher::_regEncode[dst_lo]), as_XMMRegister(Matcher::_regEncode[src_lo])); |
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611 break; |
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612 default: |
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|
613 ShouldNotReachHere(); |
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|
614 } |
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|
615 int size = __ offset() - offset; |
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|
616 #ifdef ASSERT |
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617 // VEX_2bytes prefix is used if UseAVX > 0, so it takes the same 2 bytes as SIMD prefix. |
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618 assert(!do_size || size == 4, "incorrect size calculattion"); |
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|
619 #endif |
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|
620 return size; |
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|
621 #ifndef PRODUCT |
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|
622 } else if (!do_size) { |
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|
623 switch (ireg) { |
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|
624 case Op_VecS: |
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kvn
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|
625 case Op_VecD: |
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|
626 case Op_VecX: |
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627 st->print("movdqu %s,%s\t# spill",Matcher::regName[dst_lo],Matcher::regName[src_lo]); |
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|
628 break; |
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parents:
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|
629 case Op_VecY: |
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|
630 st->print("vmovdqu %s,%s\t# spill",Matcher::regName[dst_lo],Matcher::regName[src_lo]); |
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|
631 break; |
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|
632 default: |
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|
633 ShouldNotReachHere(); |
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kvn
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|
634 } |
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parents:
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|
635 #endif |
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|
636 } |
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|
637 // VEX_2bytes prefix is used if UseAVX > 0, and it takes the same 2 bytes as SIMD prefix. |
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|
638 return 4; |
8c92982cbbc4
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kvn
parents:
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|
639 } |
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|
640 |
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641 static int vec_spill_helper(CodeBuffer *cbuf, bool do_size, bool is_load, |
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642 int stack_offset, int reg, uint ireg, outputStream* st) { |
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643 // In 64-bit VM size calculation is very complex. Emitting instructions |
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644 // into scratch buffer is used to get size in 64-bit VM. |
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645 LP64_ONLY( assert(!do_size, "this method calculates size only for 32-bit VM"); ) |
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646 if (cbuf) { |
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647 MacroAssembler _masm(cbuf); |
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648 int offset = __ offset(); |
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649 if (is_load) { |
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|
650 switch (ireg) { |
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|
651 case Op_VecS: |
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|
652 __ movdl(as_XMMRegister(Matcher::_regEncode[reg]), Address(rsp, stack_offset)); |
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|
653 break; |
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|
654 case Op_VecD: |
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|
655 __ movq(as_XMMRegister(Matcher::_regEncode[reg]), Address(rsp, stack_offset)); |
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|
656 break; |
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|
657 case Op_VecX: |
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658 __ movdqu(as_XMMRegister(Matcher::_regEncode[reg]), Address(rsp, stack_offset)); |
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|
659 break; |
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|
660 case Op_VecY: |
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661 __ vmovdqu(as_XMMRegister(Matcher::_regEncode[reg]), Address(rsp, stack_offset)); |
8c92982cbbc4
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|
662 break; |
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parents:
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|
663 default: |
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|
664 ShouldNotReachHere(); |
8c92982cbbc4
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|
665 } |
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|
666 } else { // store |
8c92982cbbc4
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|
667 switch (ireg) { |
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|
668 case Op_VecS: |
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|
669 __ movdl(Address(rsp, stack_offset), as_XMMRegister(Matcher::_regEncode[reg])); |
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|
670 break; |
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|
671 case Op_VecD: |
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|
672 __ movq(Address(rsp, stack_offset), as_XMMRegister(Matcher::_regEncode[reg])); |
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|
673 break; |
8c92982cbbc4
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parents:
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|
674 case Op_VecX: |
8c92982cbbc4
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|
675 __ movdqu(Address(rsp, stack_offset), as_XMMRegister(Matcher::_regEncode[reg])); |
8c92982cbbc4
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|
676 break; |
8c92982cbbc4
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kvn
parents:
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changeset
|
677 case Op_VecY: |
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|
678 __ vmovdqu(Address(rsp, stack_offset), as_XMMRegister(Matcher::_regEncode[reg])); |
8c92982cbbc4
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|
679 break; |
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kvn
parents:
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changeset
|
680 default: |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
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changeset
|
681 ShouldNotReachHere(); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
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|
682 } |
8c92982cbbc4
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kvn
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|
683 } |
8c92982cbbc4
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|
684 int size = __ offset() - offset; |
8c92982cbbc4
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parents:
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changeset
|
685 #ifdef ASSERT |
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|
686 int offset_size = (stack_offset == 0) ? 0 : ((stack_offset < 0x80) ? 1 : 4); |
8c92982cbbc4
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|
687 // VEX_2bytes prefix is used if UseAVX > 0, so it takes the same 2 bytes as SIMD prefix. |
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688 assert(!do_size || size == (5+offset_size), "incorrect size calculattion"); |
8c92982cbbc4
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|
689 #endif |
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kvn
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|
690 return size; |
8c92982cbbc4
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kvn
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changeset
|
691 #ifndef PRODUCT |
8c92982cbbc4
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kvn
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|
692 } else if (!do_size) { |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
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diff
changeset
|
693 if (is_load) { |
8c92982cbbc4
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kvn
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|
694 switch (ireg) { |
8c92982cbbc4
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kvn
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|
695 case Op_VecS: |
8c92982cbbc4
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|
696 st->print("movd %s,[rsp + %d]\t# spill", Matcher::regName[reg], stack_offset); |
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7119644: Increase superword's vector size up to 256 bits
kvn
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changeset
|
697 break; |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
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changeset
|
698 case Op_VecD: |
8c92982cbbc4
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kvn
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|
699 st->print("movq %s,[rsp + %d]\t# spill", Matcher::regName[reg], stack_offset); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
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|
700 break; |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
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diff
changeset
|
701 case Op_VecX: |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
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|
702 st->print("movdqu %s,[rsp + %d]\t# spill", Matcher::regName[reg], stack_offset); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
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changeset
|
703 break; |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
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diff
changeset
|
704 case Op_VecY: |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
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|
705 st->print("vmovdqu %s,[rsp + %d]\t# spill", Matcher::regName[reg], stack_offset); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
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changeset
|
706 break; |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
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diff
changeset
|
707 default: |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
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changeset
|
708 ShouldNotReachHere(); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
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changeset
|
709 } |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
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changeset
|
710 } else { // store |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
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changeset
|
711 switch (ireg) { |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
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|
712 case Op_VecS: |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
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|
713 st->print("movd [rsp + %d],%s\t# spill", stack_offset, Matcher::regName[reg]); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
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changeset
|
714 break; |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
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diff
changeset
|
715 case Op_VecD: |
8c92982cbbc4
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|
716 st->print("movq [rsp + %d],%s\t# spill", stack_offset, Matcher::regName[reg]); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
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changeset
|
717 break; |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
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changeset
|
718 case Op_VecX: |
8c92982cbbc4
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kvn
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|
719 st->print("movdqu [rsp + %d],%s\t# spill", stack_offset, Matcher::regName[reg]); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
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changeset
|
720 break; |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
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diff
changeset
|
721 case Op_VecY: |
8c92982cbbc4
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kvn
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|
722 st->print("vmovdqu [rsp + %d],%s\t# spill", stack_offset, Matcher::regName[reg]); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
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changeset
|
723 break; |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
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diff
changeset
|
724 default: |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
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changeset
|
725 ShouldNotReachHere(); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
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diff
changeset
|
726 } |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
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changeset
|
727 } |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
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changeset
|
728 #endif |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
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changeset
|
729 } |
8c92982cbbc4
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kvn
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|
730 int offset_size = (stack_offset == 0) ? 0 : ((stack_offset < 0x80) ? 1 : 4); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
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changeset
|
731 // VEX_2bytes prefix is used if UseAVX > 0, so it takes the same 2 bytes as SIMD prefix. |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
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changeset
|
732 return 5+offset_size; |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
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diff
changeset
|
733 } |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
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changeset
|
734 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
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changeset
|
735 static inline jfloat replicate4_imm(int con, int width) { |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
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diff
changeset
|
736 // Load a constant of "width" (in bytes) and replicate it to fill 32bit. |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
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|
737 assert(width == 1 || width == 2, "only byte or short types here"); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
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changeset
|
738 int bit_width = width * 8; |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
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parents:
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diff
changeset
|
739 jint val = con; |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
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|
740 val &= (1 << bit_width) - 1; // mask off sign bits |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
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diff
changeset
|
741 while(bit_width < 32) { |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
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742 val |= (val << bit_width); |
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743 bit_width <<= 1; |
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744 } |
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745 jfloat fval = *((jfloat*) &val); // coerce to float type |
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746 return fval; |
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747 } |
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748 |
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749 static inline jdouble replicate8_imm(int con, int width) { |
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750 // Load a constant of "width" (in bytes) and replicate it to fill 64bit. |
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751 assert(width == 1 || width == 2 || width == 4, "only byte, short or int types here"); |
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752 int bit_width = width * 8; |
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753 jlong val = con; |
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754 val &= (((jlong) 1) << bit_width) - 1; // mask off sign bits |
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755 while(bit_width < 64) { |
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756 val |= (val << bit_width); |
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757 bit_width <<= 1; |
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758 } |
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759 jdouble dval = *((jdouble*) &val); // coerce to double type |
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760 return dval; |
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761 } |
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762 |
4950 | 763 #ifndef PRODUCT |
764 void MachNopNode::format(PhaseRegAlloc*, outputStream* st) const { | |
765 st->print("nop \t# %d bytes pad for loops and calls", _count); | |
766 } | |
767 #endif | |
768 | |
769 void MachNopNode::emit(CodeBuffer &cbuf, PhaseRegAlloc*) const { | |
770 MacroAssembler _masm(&cbuf); | |
771 __ nop(_count); | |
772 } | |
773 | |
774 uint MachNopNode::size(PhaseRegAlloc*) const { | |
775 return _count; | |
776 } | |
777 | |
778 #ifndef PRODUCT | |
779 void MachBreakpointNode::format(PhaseRegAlloc*, outputStream* st) const { | |
780 st->print("# breakpoint"); | |
781 } | |
782 #endif | |
783 | |
784 void MachBreakpointNode::emit(CodeBuffer &cbuf, PhaseRegAlloc* ra_) const { | |
785 MacroAssembler _masm(&cbuf); | |
786 __ int3(); | |
787 } | |
788 | |
789 uint MachBreakpointNode::size(PhaseRegAlloc* ra_) const { | |
790 return MachNode::size(ra_); | |
791 } | |
792 | |
793 %} | |
794 | |
795 encode %{ | |
796 | |
797 enc_class preserve_SP %{ | |
798 debug_only(int off0 = cbuf.insts_size()); | |
799 MacroAssembler _masm(&cbuf); | |
800 // RBP is preserved across all calls, even compiled calls. | |
801 // Use it to preserve RSP in places where the callee might change the SP. | |
802 __ movptr(rbp_mh_SP_save, rsp); | |
803 debug_only(int off1 = cbuf.insts_size()); | |
804 assert(off1 - off0 == preserve_SP_size(), "correct size prediction"); | |
805 %} | |
806 | |
807 enc_class restore_SP %{ | |
808 MacroAssembler _masm(&cbuf); | |
809 __ movptr(rsp, rbp_mh_SP_save); | |
810 %} | |
811 | |
812 enc_class call_epilog %{ | |
813 if (VerifyStackAtCalls) { | |
814 // Check that stack depth is unchanged: find majik cookie on stack | |
815 int framesize = ra_->reg2offset_unchecked(OptoReg::add(ra_->_matcher._old_SP, -3*VMRegImpl::slots_per_word)); | |
816 MacroAssembler _masm(&cbuf); | |
817 Label L; | |
818 __ cmpptr(Address(rsp, framesize), (int32_t)0xbadb100d); | |
819 __ jccb(Assembler::equal, L); | |
820 // Die if stack mismatch | |
821 __ int3(); | |
822 __ bind(L); | |
823 } | |
824 %} | |
825 | |
4761 | 826 %} |
827 | |
6179
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828 |
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829 //----------OPERANDS----------------------------------------------------------- |
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830 // Operand definitions must precede instruction definitions for correct parsing |
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831 // in the ADLC because operands constitute user defined types which are used in |
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832 // instruction definitions. |
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833 |
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834 // Vectors |
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835 operand vecS() %{ |
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836 constraint(ALLOC_IN_RC(vectors_reg)); |
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837 match(VecS); |
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838 |
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839 format %{ %} |
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840 interface(REG_INTER); |
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841 %} |
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842 |
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843 operand vecD() %{ |
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844 constraint(ALLOC_IN_RC(vectord_reg)); |
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845 match(VecD); |
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846 |
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847 format %{ %} |
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848 interface(REG_INTER); |
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849 %} |
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850 |
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851 operand vecX() %{ |
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852 constraint(ALLOC_IN_RC(vectorx_reg)); |
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853 match(VecX); |
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854 |
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855 format %{ %} |
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856 interface(REG_INTER); |
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857 %} |
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858 |
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859 operand vecY() %{ |
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860 constraint(ALLOC_IN_RC(vectory_reg)); |
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861 match(VecY); |
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862 |
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863 format %{ %} |
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864 interface(REG_INTER); |
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865 %} |
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866 |
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867 |
4761 | 868 // INSTRUCTIONS -- Platform independent definitions (same for 32- and 64-bit) |
869 | |
4950 | 870 // ============================================================================ |
871 | |
872 instruct ShouldNotReachHere() %{ | |
873 match(Halt); | |
874 format %{ "int3\t# ShouldNotReachHere" %} | |
875 ins_encode %{ | |
876 __ int3(); | |
877 %} | |
878 ins_pipe(pipe_slow); | |
879 %} | |
880 | |
881 // ============================================================================ | |
882 | |
4761 | 883 instruct addF_reg(regF dst, regF src) %{ |
884 predicate((UseSSE>=1) && (UseAVX == 0)); | |
885 match(Set dst (AddF dst src)); | |
886 | |
887 format %{ "addss $dst, $src" %} | |
888 ins_cost(150); | |
889 ins_encode %{ | |
890 __ addss($dst$$XMMRegister, $src$$XMMRegister); | |
891 %} | |
892 ins_pipe(pipe_slow); | |
893 %} | |
894 | |
895 instruct addF_mem(regF dst, memory src) %{ | |
896 predicate((UseSSE>=1) && (UseAVX == 0)); | |
897 match(Set dst (AddF dst (LoadF src))); | |
898 | |
899 format %{ "addss $dst, $src" %} | |
900 ins_cost(150); | |
901 ins_encode %{ | |
902 __ addss($dst$$XMMRegister, $src$$Address); | |
903 %} | |
904 ins_pipe(pipe_slow); | |
905 %} | |
906 | |
907 instruct addF_imm(regF dst, immF con) %{ | |
908 predicate((UseSSE>=1) && (UseAVX == 0)); | |
909 match(Set dst (AddF dst con)); | |
910 format %{ "addss $dst, [$constantaddress]\t# load from constant table: float=$con" %} | |
911 ins_cost(150); | |
912 ins_encode %{ | |
913 __ addss($dst$$XMMRegister, $constantaddress($con)); | |
914 %} | |
915 ins_pipe(pipe_slow); | |
916 %} | |
917 | |
6225 | 918 instruct addF_reg_reg(regF dst, regF src1, regF src2) %{ |
4761 | 919 predicate(UseAVX > 0); |
920 match(Set dst (AddF src1 src2)); | |
921 | |
922 format %{ "vaddss $dst, $src1, $src2" %} | |
923 ins_cost(150); | |
924 ins_encode %{ | |
925 __ vaddss($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister); | |
926 %} | |
927 ins_pipe(pipe_slow); | |
928 %} | |
929 | |
6225 | 930 instruct addF_reg_mem(regF dst, regF src1, memory src2) %{ |
4761 | 931 predicate(UseAVX > 0); |
932 match(Set dst (AddF src1 (LoadF src2))); | |
933 | |
934 format %{ "vaddss $dst, $src1, $src2" %} | |
935 ins_cost(150); | |
936 ins_encode %{ | |
937 __ vaddss($dst$$XMMRegister, $src1$$XMMRegister, $src2$$Address); | |
938 %} | |
939 ins_pipe(pipe_slow); | |
940 %} | |
941 | |
6225 | 942 instruct addF_reg_imm(regF dst, regF src, immF con) %{ |
4761 | 943 predicate(UseAVX > 0); |
944 match(Set dst (AddF src con)); | |
945 | |
946 format %{ "vaddss $dst, $src, [$constantaddress]\t# load from constant table: float=$con" %} | |
947 ins_cost(150); | |
948 ins_encode %{ | |
949 __ vaddss($dst$$XMMRegister, $src$$XMMRegister, $constantaddress($con)); | |
950 %} | |
951 ins_pipe(pipe_slow); | |
952 %} | |
953 | |
954 instruct addD_reg(regD dst, regD src) %{ | |
955 predicate((UseSSE>=2) && (UseAVX == 0)); | |
956 match(Set dst (AddD dst src)); | |
957 | |
958 format %{ "addsd $dst, $src" %} | |
959 ins_cost(150); | |
960 ins_encode %{ | |
961 __ addsd($dst$$XMMRegister, $src$$XMMRegister); | |
962 %} | |
963 ins_pipe(pipe_slow); | |
964 %} | |
965 | |
966 instruct addD_mem(regD dst, memory src) %{ | |
967 predicate((UseSSE>=2) && (UseAVX == 0)); | |
968 match(Set dst (AddD dst (LoadD src))); | |
969 | |
970 format %{ "addsd $dst, $src" %} | |
971 ins_cost(150); | |
972 ins_encode %{ | |
973 __ addsd($dst$$XMMRegister, $src$$Address); | |
974 %} | |
975 ins_pipe(pipe_slow); | |
976 %} | |
977 | |
978 instruct addD_imm(regD dst, immD con) %{ | |
979 predicate((UseSSE>=2) && (UseAVX == 0)); | |
980 match(Set dst (AddD dst con)); | |
981 format %{ "addsd $dst, [$constantaddress]\t# load from constant table: double=$con" %} | |
982 ins_cost(150); | |
983 ins_encode %{ | |
984 __ addsd($dst$$XMMRegister, $constantaddress($con)); | |
985 %} | |
986 ins_pipe(pipe_slow); | |
987 %} | |
988 | |
6225 | 989 instruct addD_reg_reg(regD dst, regD src1, regD src2) %{ |
4761 | 990 predicate(UseAVX > 0); |
991 match(Set dst (AddD src1 src2)); | |
992 | |
993 format %{ "vaddsd $dst, $src1, $src2" %} | |
994 ins_cost(150); | |
995 ins_encode %{ | |
996 __ vaddsd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister); | |
997 %} | |
998 ins_pipe(pipe_slow); | |
999 %} | |
1000 | |
6225 | 1001 instruct addD_reg_mem(regD dst, regD src1, memory src2) %{ |
4761 | 1002 predicate(UseAVX > 0); |
1003 match(Set dst (AddD src1 (LoadD src2))); | |
1004 | |
1005 format %{ "vaddsd $dst, $src1, $src2" %} | |
1006 ins_cost(150); | |
1007 ins_encode %{ | |
1008 __ vaddsd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$Address); | |
1009 %} | |
1010 ins_pipe(pipe_slow); | |
1011 %} | |
1012 | |
6225 | 1013 instruct addD_reg_imm(regD dst, regD src, immD con) %{ |
4761 | 1014 predicate(UseAVX > 0); |
1015 match(Set dst (AddD src con)); | |
1016 | |
1017 format %{ "vaddsd $dst, $src, [$constantaddress]\t# load from constant table: double=$con" %} | |
1018 ins_cost(150); | |
1019 ins_encode %{ | |
1020 __ vaddsd($dst$$XMMRegister, $src$$XMMRegister, $constantaddress($con)); | |
1021 %} | |
1022 ins_pipe(pipe_slow); | |
1023 %} | |
1024 | |
1025 instruct subF_reg(regF dst, regF src) %{ | |
1026 predicate((UseSSE>=1) && (UseAVX == 0)); | |
1027 match(Set dst (SubF dst src)); | |
1028 | |
1029 format %{ "subss $dst, $src" %} | |
1030 ins_cost(150); | |
1031 ins_encode %{ | |
1032 __ subss($dst$$XMMRegister, $src$$XMMRegister); | |
1033 %} | |
1034 ins_pipe(pipe_slow); | |
1035 %} | |
1036 | |
1037 instruct subF_mem(regF dst, memory src) %{ | |
1038 predicate((UseSSE>=1) && (UseAVX == 0)); | |
1039 match(Set dst (SubF dst (LoadF src))); | |
1040 | |
1041 format %{ "subss $dst, $src" %} | |
1042 ins_cost(150); | |
1043 ins_encode %{ | |
1044 __ subss($dst$$XMMRegister, $src$$Address); | |
1045 %} | |
1046 ins_pipe(pipe_slow); | |
1047 %} | |
1048 | |
1049 instruct subF_imm(regF dst, immF con) %{ | |
1050 predicate((UseSSE>=1) && (UseAVX == 0)); | |
1051 match(Set dst (SubF dst con)); | |
1052 format %{ "subss $dst, [$constantaddress]\t# load from constant table: float=$con" %} | |
1053 ins_cost(150); | |
1054 ins_encode %{ | |
1055 __ subss($dst$$XMMRegister, $constantaddress($con)); | |
1056 %} | |
1057 ins_pipe(pipe_slow); | |
1058 %} | |
1059 | |
6225 | 1060 instruct subF_reg_reg(regF dst, regF src1, regF src2) %{ |
4761 | 1061 predicate(UseAVX > 0); |
1062 match(Set dst (SubF src1 src2)); | |
1063 | |
1064 format %{ "vsubss $dst, $src1, $src2" %} | |
1065 ins_cost(150); | |
1066 ins_encode %{ | |
1067 __ vsubss($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister); | |
1068 %} | |
1069 ins_pipe(pipe_slow); | |
1070 %} | |
1071 | |
6225 | 1072 instruct subF_reg_mem(regF dst, regF src1, memory src2) %{ |
4761 | 1073 predicate(UseAVX > 0); |
1074 match(Set dst (SubF src1 (LoadF src2))); | |
1075 | |
1076 format %{ "vsubss $dst, $src1, $src2" %} | |
1077 ins_cost(150); | |
1078 ins_encode %{ | |
1079 __ vsubss($dst$$XMMRegister, $src1$$XMMRegister, $src2$$Address); | |
1080 %} | |
1081 ins_pipe(pipe_slow); | |
1082 %} | |
1083 | |
6225 | 1084 instruct subF_reg_imm(regF dst, regF src, immF con) %{ |
4761 | 1085 predicate(UseAVX > 0); |
1086 match(Set dst (SubF src con)); | |
1087 | |
1088 format %{ "vsubss $dst, $src, [$constantaddress]\t# load from constant table: float=$con" %} | |
1089 ins_cost(150); | |
1090 ins_encode %{ | |
1091 __ vsubss($dst$$XMMRegister, $src$$XMMRegister, $constantaddress($con)); | |
1092 %} | |
1093 ins_pipe(pipe_slow); | |
1094 %} | |
1095 | |
1096 instruct subD_reg(regD dst, regD src) %{ | |
1097 predicate((UseSSE>=2) && (UseAVX == 0)); | |
1098 match(Set dst (SubD dst src)); | |
1099 | |
1100 format %{ "subsd $dst, $src" %} | |
1101 ins_cost(150); | |
1102 ins_encode %{ | |
1103 __ subsd($dst$$XMMRegister, $src$$XMMRegister); | |
1104 %} | |
1105 ins_pipe(pipe_slow); | |
1106 %} | |
1107 | |
1108 instruct subD_mem(regD dst, memory src) %{ | |
1109 predicate((UseSSE>=2) && (UseAVX == 0)); | |
1110 match(Set dst (SubD dst (LoadD src))); | |
1111 | |
1112 format %{ "subsd $dst, $src" %} | |
1113 ins_cost(150); | |
1114 ins_encode %{ | |
1115 __ subsd($dst$$XMMRegister, $src$$Address); | |
1116 %} | |
1117 ins_pipe(pipe_slow); | |
1118 %} | |
1119 | |
1120 instruct subD_imm(regD dst, immD con) %{ | |
1121 predicate((UseSSE>=2) && (UseAVX == 0)); | |
1122 match(Set dst (SubD dst con)); | |
1123 format %{ "subsd $dst, [$constantaddress]\t# load from constant table: double=$con" %} | |
1124 ins_cost(150); | |
1125 ins_encode %{ | |
1126 __ subsd($dst$$XMMRegister, $constantaddress($con)); | |
1127 %} | |
1128 ins_pipe(pipe_slow); | |
1129 %} | |
1130 | |
6225 | 1131 instruct subD_reg_reg(regD dst, regD src1, regD src2) %{ |
4761 | 1132 predicate(UseAVX > 0); |
1133 match(Set dst (SubD src1 src2)); | |
1134 | |
1135 format %{ "vsubsd $dst, $src1, $src2" %} | |
1136 ins_cost(150); | |
1137 ins_encode %{ | |
1138 __ vsubsd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister); | |
1139 %} | |
1140 ins_pipe(pipe_slow); | |
1141 %} | |
1142 | |
6225 | 1143 instruct subD_reg_mem(regD dst, regD src1, memory src2) %{ |
4761 | 1144 predicate(UseAVX > 0); |
1145 match(Set dst (SubD src1 (LoadD src2))); | |
1146 | |
1147 format %{ "vsubsd $dst, $src1, $src2" %} | |
1148 ins_cost(150); | |
1149 ins_encode %{ | |
1150 __ vsubsd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$Address); | |
1151 %} | |
1152 ins_pipe(pipe_slow); | |
1153 %} | |
1154 | |
6225 | 1155 instruct subD_reg_imm(regD dst, regD src, immD con) %{ |
4761 | 1156 predicate(UseAVX > 0); |
1157 match(Set dst (SubD src con)); | |
1158 | |
1159 format %{ "vsubsd $dst, $src, [$constantaddress]\t# load from constant table: double=$con" %} | |
1160 ins_cost(150); | |
1161 ins_encode %{ | |
1162 __ vsubsd($dst$$XMMRegister, $src$$XMMRegister, $constantaddress($con)); | |
1163 %} | |
1164 ins_pipe(pipe_slow); | |
1165 %} | |
1166 | |
1167 instruct mulF_reg(regF dst, regF src) %{ | |
1168 predicate((UseSSE>=1) && (UseAVX == 0)); | |
1169 match(Set dst (MulF dst src)); | |
1170 | |
1171 format %{ "mulss $dst, $src" %} | |
1172 ins_cost(150); | |
1173 ins_encode %{ | |
1174 __ mulss($dst$$XMMRegister, $src$$XMMRegister); | |
1175 %} | |
1176 ins_pipe(pipe_slow); | |
1177 %} | |
1178 | |
1179 instruct mulF_mem(regF dst, memory src) %{ | |
1180 predicate((UseSSE>=1) && (UseAVX == 0)); | |
1181 match(Set dst (MulF dst (LoadF src))); | |
1182 | |
1183 format %{ "mulss $dst, $src" %} | |
1184 ins_cost(150); | |
1185 ins_encode %{ | |
1186 __ mulss($dst$$XMMRegister, $src$$Address); | |
1187 %} | |
1188 ins_pipe(pipe_slow); | |
1189 %} | |
1190 | |
1191 instruct mulF_imm(regF dst, immF con) %{ | |
1192 predicate((UseSSE>=1) && (UseAVX == 0)); | |
1193 match(Set dst (MulF dst con)); | |
1194 format %{ "mulss $dst, [$constantaddress]\t# load from constant table: float=$con" %} | |
1195 ins_cost(150); | |
1196 ins_encode %{ | |
1197 __ mulss($dst$$XMMRegister, $constantaddress($con)); | |
1198 %} | |
1199 ins_pipe(pipe_slow); | |
1200 %} | |
1201 | |
6225 | 1202 instruct mulF_reg_reg(regF dst, regF src1, regF src2) %{ |
4761 | 1203 predicate(UseAVX > 0); |
1204 match(Set dst (MulF src1 src2)); | |
1205 | |
1206 format %{ "vmulss $dst, $src1, $src2" %} | |
1207 ins_cost(150); | |
1208 ins_encode %{ | |
1209 __ vmulss($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister); | |
1210 %} | |
1211 ins_pipe(pipe_slow); | |
1212 %} | |
1213 | |
6225 | 1214 instruct mulF_reg_mem(regF dst, regF src1, memory src2) %{ |
4761 | 1215 predicate(UseAVX > 0); |
1216 match(Set dst (MulF src1 (LoadF src2))); | |
1217 | |
1218 format %{ "vmulss $dst, $src1, $src2" %} | |
1219 ins_cost(150); | |
1220 ins_encode %{ | |
1221 __ vmulss($dst$$XMMRegister, $src1$$XMMRegister, $src2$$Address); | |
1222 %} | |
1223 ins_pipe(pipe_slow); | |
1224 %} | |
1225 | |
6225 | 1226 instruct mulF_reg_imm(regF dst, regF src, immF con) %{ |
4761 | 1227 predicate(UseAVX > 0); |
1228 match(Set dst (MulF src con)); | |
1229 | |
1230 format %{ "vmulss $dst, $src, [$constantaddress]\t# load from constant table: float=$con" %} | |
1231 ins_cost(150); | |
1232 ins_encode %{ | |
1233 __ vmulss($dst$$XMMRegister, $src$$XMMRegister, $constantaddress($con)); | |
1234 %} | |
1235 ins_pipe(pipe_slow); | |
1236 %} | |
1237 | |
1238 instruct mulD_reg(regD dst, regD src) %{ | |
1239 predicate((UseSSE>=2) && (UseAVX == 0)); | |
1240 match(Set dst (MulD dst src)); | |
1241 | |
1242 format %{ "mulsd $dst, $src" %} | |
1243 ins_cost(150); | |
1244 ins_encode %{ | |
1245 __ mulsd($dst$$XMMRegister, $src$$XMMRegister); | |
1246 %} | |
1247 ins_pipe(pipe_slow); | |
1248 %} | |
1249 | |
1250 instruct mulD_mem(regD dst, memory src) %{ | |
1251 predicate((UseSSE>=2) && (UseAVX == 0)); | |
1252 match(Set dst (MulD dst (LoadD src))); | |
1253 | |
1254 format %{ "mulsd $dst, $src" %} | |
1255 ins_cost(150); | |
1256 ins_encode %{ | |
1257 __ mulsd($dst$$XMMRegister, $src$$Address); | |
1258 %} | |
1259 ins_pipe(pipe_slow); | |
1260 %} | |
1261 | |
1262 instruct mulD_imm(regD dst, immD con) %{ | |
1263 predicate((UseSSE>=2) && (UseAVX == 0)); | |
1264 match(Set dst (MulD dst con)); | |
1265 format %{ "mulsd $dst, [$constantaddress]\t# load from constant table: double=$con" %} | |
1266 ins_cost(150); | |
1267 ins_encode %{ | |
1268 __ mulsd($dst$$XMMRegister, $constantaddress($con)); | |
1269 %} | |
1270 ins_pipe(pipe_slow); | |
1271 %} | |
1272 | |
6225 | 1273 instruct mulD_reg_reg(regD dst, regD src1, regD src2) %{ |
4761 | 1274 predicate(UseAVX > 0); |
1275 match(Set dst (MulD src1 src2)); | |
1276 | |
1277 format %{ "vmulsd $dst, $src1, $src2" %} | |
1278 ins_cost(150); | |
1279 ins_encode %{ | |
1280 __ vmulsd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister); | |
1281 %} | |
1282 ins_pipe(pipe_slow); | |
1283 %} | |
1284 | |
6225 | 1285 instruct mulD_reg_mem(regD dst, regD src1, memory src2) %{ |
4761 | 1286 predicate(UseAVX > 0); |
1287 match(Set dst (MulD src1 (LoadD src2))); | |
1288 | |
1289 format %{ "vmulsd $dst, $src1, $src2" %} | |
1290 ins_cost(150); | |
1291 ins_encode %{ | |
1292 __ vmulsd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$Address); | |
1293 %} | |
1294 ins_pipe(pipe_slow); | |
1295 %} | |
1296 | |
6225 | 1297 instruct mulD_reg_imm(regD dst, regD src, immD con) %{ |
4761 | 1298 predicate(UseAVX > 0); |
1299 match(Set dst (MulD src con)); | |
1300 | |
1301 format %{ "vmulsd $dst, $src, [$constantaddress]\t# load from constant table: double=$con" %} | |
1302 ins_cost(150); | |
1303 ins_encode %{ | |
1304 __ vmulsd($dst$$XMMRegister, $src$$XMMRegister, $constantaddress($con)); | |
1305 %} | |
1306 ins_pipe(pipe_slow); | |
1307 %} | |
1308 | |
1309 instruct divF_reg(regF dst, regF src) %{ | |
1310 predicate((UseSSE>=1) && (UseAVX == 0)); | |
1311 match(Set dst (DivF dst src)); | |
1312 | |
1313 format %{ "divss $dst, $src" %} | |
1314 ins_cost(150); | |
1315 ins_encode %{ | |
1316 __ divss($dst$$XMMRegister, $src$$XMMRegister); | |
1317 %} | |
1318 ins_pipe(pipe_slow); | |
1319 %} | |
1320 | |
1321 instruct divF_mem(regF dst, memory src) %{ | |
1322 predicate((UseSSE>=1) && (UseAVX == 0)); | |
1323 match(Set dst (DivF dst (LoadF src))); | |
1324 | |
1325 format %{ "divss $dst, $src" %} | |
1326 ins_cost(150); | |
1327 ins_encode %{ | |
1328 __ divss($dst$$XMMRegister, $src$$Address); | |
1329 %} | |
1330 ins_pipe(pipe_slow); | |
1331 %} | |
1332 | |
1333 instruct divF_imm(regF dst, immF con) %{ | |
1334 predicate((UseSSE>=1) && (UseAVX == 0)); | |
1335 match(Set dst (DivF dst con)); | |
1336 format %{ "divss $dst, [$constantaddress]\t# load from constant table: float=$con" %} | |
1337 ins_cost(150); | |
1338 ins_encode %{ | |
1339 __ divss($dst$$XMMRegister, $constantaddress($con)); | |
1340 %} | |
1341 ins_pipe(pipe_slow); | |
1342 %} | |
1343 | |
6225 | 1344 instruct divF_reg_reg(regF dst, regF src1, regF src2) %{ |
4761 | 1345 predicate(UseAVX > 0); |
1346 match(Set dst (DivF src1 src2)); | |
1347 | |
1348 format %{ "vdivss $dst, $src1, $src2" %} | |
1349 ins_cost(150); | |
1350 ins_encode %{ | |
1351 __ vdivss($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister); | |
1352 %} | |
1353 ins_pipe(pipe_slow); | |
1354 %} | |
1355 | |
6225 | 1356 instruct divF_reg_mem(regF dst, regF src1, memory src2) %{ |
4761 | 1357 predicate(UseAVX > 0); |
1358 match(Set dst (DivF src1 (LoadF src2))); | |
1359 | |
1360 format %{ "vdivss $dst, $src1, $src2" %} | |
1361 ins_cost(150); | |
1362 ins_encode %{ | |
1363 __ vdivss($dst$$XMMRegister, $src1$$XMMRegister, $src2$$Address); | |
1364 %} | |
1365 ins_pipe(pipe_slow); | |
1366 %} | |
1367 | |
6225 | 1368 instruct divF_reg_imm(regF dst, regF src, immF con) %{ |
4761 | 1369 predicate(UseAVX > 0); |
1370 match(Set dst (DivF src con)); | |
1371 | |
1372 format %{ "vdivss $dst, $src, [$constantaddress]\t# load from constant table: float=$con" %} | |
1373 ins_cost(150); | |
1374 ins_encode %{ | |
1375 __ vdivss($dst$$XMMRegister, $src$$XMMRegister, $constantaddress($con)); | |
1376 %} | |
1377 ins_pipe(pipe_slow); | |
1378 %} | |
1379 | |
1380 instruct divD_reg(regD dst, regD src) %{ | |
1381 predicate((UseSSE>=2) && (UseAVX == 0)); | |
1382 match(Set dst (DivD dst src)); | |
1383 | |
1384 format %{ "divsd $dst, $src" %} | |
1385 ins_cost(150); | |
1386 ins_encode %{ | |
1387 __ divsd($dst$$XMMRegister, $src$$XMMRegister); | |
1388 %} | |
1389 ins_pipe(pipe_slow); | |
1390 %} | |
1391 | |
1392 instruct divD_mem(regD dst, memory src) %{ | |
1393 predicate((UseSSE>=2) && (UseAVX == 0)); | |
1394 match(Set dst (DivD dst (LoadD src))); | |
1395 | |
1396 format %{ "divsd $dst, $src" %} | |
1397 ins_cost(150); | |
1398 ins_encode %{ | |
1399 __ divsd($dst$$XMMRegister, $src$$Address); | |
1400 %} | |
1401 ins_pipe(pipe_slow); | |
1402 %} | |
1403 | |
1404 instruct divD_imm(regD dst, immD con) %{ | |
1405 predicate((UseSSE>=2) && (UseAVX == 0)); | |
1406 match(Set dst (DivD dst con)); | |
1407 format %{ "divsd $dst, [$constantaddress]\t# load from constant table: double=$con" %} | |
1408 ins_cost(150); | |
1409 ins_encode %{ | |
1410 __ divsd($dst$$XMMRegister, $constantaddress($con)); | |
1411 %} | |
1412 ins_pipe(pipe_slow); | |
1413 %} | |
1414 | |
6225 | 1415 instruct divD_reg_reg(regD dst, regD src1, regD src2) %{ |
4761 | 1416 predicate(UseAVX > 0); |
1417 match(Set dst (DivD src1 src2)); | |
1418 | |
1419 format %{ "vdivsd $dst, $src1, $src2" %} | |
1420 ins_cost(150); | |
1421 ins_encode %{ | |
1422 __ vdivsd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister); | |
1423 %} | |
1424 ins_pipe(pipe_slow); | |
1425 %} | |
1426 | |
6225 | 1427 instruct divD_reg_mem(regD dst, regD src1, memory src2) %{ |
4761 | 1428 predicate(UseAVX > 0); |
1429 match(Set dst (DivD src1 (LoadD src2))); | |
1430 | |
1431 format %{ "vdivsd $dst, $src1, $src2" %} | |
1432 ins_cost(150); | |
1433 ins_encode %{ | |
1434 __ vdivsd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$Address); | |
1435 %} | |
1436 ins_pipe(pipe_slow); | |
1437 %} | |
1438 | |
6225 | 1439 instruct divD_reg_imm(regD dst, regD src, immD con) %{ |
4761 | 1440 predicate(UseAVX > 0); |
1441 match(Set dst (DivD src con)); | |
1442 | |
1443 format %{ "vdivsd $dst, $src, [$constantaddress]\t# load from constant table: double=$con" %} | |
1444 ins_cost(150); | |
1445 ins_encode %{ | |
1446 __ vdivsd($dst$$XMMRegister, $src$$XMMRegister, $constantaddress($con)); | |
1447 %} | |
1448 ins_pipe(pipe_slow); | |
1449 %} | |
1450 | |
1451 instruct absF_reg(regF dst) %{ | |
1452 predicate((UseSSE>=1) && (UseAVX == 0)); | |
1453 match(Set dst (AbsF dst)); | |
1454 ins_cost(150); | |
1455 format %{ "andps $dst, [0x7fffffff]\t# abs float by sign masking" %} | |
1456 ins_encode %{ | |
1457 __ andps($dst$$XMMRegister, ExternalAddress(float_signmask())); | |
1458 %} | |
1459 ins_pipe(pipe_slow); | |
1460 %} | |
1461 | |
6225 | 1462 instruct absF_reg_reg(regF dst, regF src) %{ |
4761 | 1463 predicate(UseAVX > 0); |
1464 match(Set dst (AbsF src)); | |
1465 ins_cost(150); | |
1466 format %{ "vandps $dst, $src, [0x7fffffff]\t# abs float by sign masking" %} | |
1467 ins_encode %{ | |
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1468 bool vector256 = false; |
4761 | 1469 __ vandps($dst$$XMMRegister, $src$$XMMRegister, |
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1470 ExternalAddress(float_signmask()), vector256); |
4761 | 1471 %} |
1472 ins_pipe(pipe_slow); | |
1473 %} | |
1474 | |
1475 instruct absD_reg(regD dst) %{ | |
1476 predicate((UseSSE>=2) && (UseAVX == 0)); | |
1477 match(Set dst (AbsD dst)); | |
1478 ins_cost(150); | |
1479 format %{ "andpd $dst, [0x7fffffffffffffff]\t" | |
1480 "# abs double by sign masking" %} | |
1481 ins_encode %{ | |
1482 __ andpd($dst$$XMMRegister, ExternalAddress(double_signmask())); | |
1483 %} | |
1484 ins_pipe(pipe_slow); | |
1485 %} | |
1486 | |
6225 | 1487 instruct absD_reg_reg(regD dst, regD src) %{ |
4761 | 1488 predicate(UseAVX > 0); |
1489 match(Set dst (AbsD src)); | |
1490 ins_cost(150); | |
1491 format %{ "vandpd $dst, $src, [0x7fffffffffffffff]\t" | |
1492 "# abs double by sign masking" %} | |
1493 ins_encode %{ | |
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1494 bool vector256 = false; |
4761 | 1495 __ vandpd($dst$$XMMRegister, $src$$XMMRegister, |
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1496 ExternalAddress(double_signmask()), vector256); |
4761 | 1497 %} |
1498 ins_pipe(pipe_slow); | |
1499 %} | |
1500 | |
1501 instruct negF_reg(regF dst) %{ | |
1502 predicate((UseSSE>=1) && (UseAVX == 0)); | |
1503 match(Set dst (NegF dst)); | |
1504 ins_cost(150); | |
1505 format %{ "xorps $dst, [0x80000000]\t# neg float by sign flipping" %} | |
1506 ins_encode %{ | |
1507 __ xorps($dst$$XMMRegister, ExternalAddress(float_signflip())); | |
1508 %} | |
1509 ins_pipe(pipe_slow); | |
1510 %} | |
1511 | |
6225 | 1512 instruct negF_reg_reg(regF dst, regF src) %{ |
4761 | 1513 predicate(UseAVX > 0); |
1514 match(Set dst (NegF src)); | |
1515 ins_cost(150); | |
1516 format %{ "vxorps $dst, $src, [0x80000000]\t# neg float by sign flipping" %} | |
1517 ins_encode %{ | |
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1518 bool vector256 = false; |
4761 | 1519 __ vxorps($dst$$XMMRegister, $src$$XMMRegister, |
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1520 ExternalAddress(float_signflip()), vector256); |
4761 | 1521 %} |
1522 ins_pipe(pipe_slow); | |
1523 %} | |
1524 | |
1525 instruct negD_reg(regD dst) %{ | |
1526 predicate((UseSSE>=2) && (UseAVX == 0)); | |
1527 match(Set dst (NegD dst)); | |
1528 ins_cost(150); | |
1529 format %{ "xorpd $dst, [0x8000000000000000]\t" | |
1530 "# neg double by sign flipping" %} | |
1531 ins_encode %{ | |
1532 __ xorpd($dst$$XMMRegister, ExternalAddress(double_signflip())); | |
1533 %} | |
1534 ins_pipe(pipe_slow); | |
1535 %} | |
1536 | |
6225 | 1537 instruct negD_reg_reg(regD dst, regD src) %{ |
4761 | 1538 predicate(UseAVX > 0); |
1539 match(Set dst (NegD src)); | |
1540 ins_cost(150); | |
1541 format %{ "vxorpd $dst, $src, [0x8000000000000000]\t" | |
1542 "# neg double by sign flipping" %} | |
1543 ins_encode %{ | |
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1544 bool vector256 = false; |
4761 | 1545 __ vxorpd($dst$$XMMRegister, $src$$XMMRegister, |
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1546 ExternalAddress(double_signflip()), vector256); |
4761 | 1547 %} |
1548 ins_pipe(pipe_slow); | |
1549 %} | |
1550 | |
1551 instruct sqrtF_reg(regF dst, regF src) %{ | |
1552 predicate(UseSSE>=1); | |
1553 match(Set dst (ConvD2F (SqrtD (ConvF2D src)))); | |
1554 | |
1555 format %{ "sqrtss $dst, $src" %} | |
1556 ins_cost(150); | |
1557 ins_encode %{ | |
1558 __ sqrtss($dst$$XMMRegister, $src$$XMMRegister); | |
1559 %} | |
1560 ins_pipe(pipe_slow); | |
1561 %} | |
1562 | |
1563 instruct sqrtF_mem(regF dst, memory src) %{ | |
1564 predicate(UseSSE>=1); | |
1565 match(Set dst (ConvD2F (SqrtD (ConvF2D (LoadF src))))); | |
1566 | |
1567 format %{ "sqrtss $dst, $src" %} | |
1568 ins_cost(150); | |
1569 ins_encode %{ | |
1570 __ sqrtss($dst$$XMMRegister, $src$$Address); | |
1571 %} | |
1572 ins_pipe(pipe_slow); | |
1573 %} | |
1574 | |
1575 instruct sqrtF_imm(regF dst, immF con) %{ | |
1576 predicate(UseSSE>=1); | |
1577 match(Set dst (ConvD2F (SqrtD (ConvF2D con)))); | |
1578 format %{ "sqrtss $dst, [$constantaddress]\t# load from constant table: float=$con" %} | |
1579 ins_cost(150); | |
1580 ins_encode %{ | |
1581 __ sqrtss($dst$$XMMRegister, $constantaddress($con)); | |
1582 %} | |
1583 ins_pipe(pipe_slow); | |
1584 %} | |
1585 | |
1586 instruct sqrtD_reg(regD dst, regD src) %{ | |
1587 predicate(UseSSE>=2); | |
1588 match(Set dst (SqrtD src)); | |
1589 | |
1590 format %{ "sqrtsd $dst, $src" %} | |
1591 ins_cost(150); | |
1592 ins_encode %{ | |
1593 __ sqrtsd($dst$$XMMRegister, $src$$XMMRegister); | |
1594 %} | |
1595 ins_pipe(pipe_slow); | |
1596 %} | |
1597 | |
1598 instruct sqrtD_mem(regD dst, memory src) %{ | |
1599 predicate(UseSSE>=2); | |
1600 match(Set dst (SqrtD (LoadD src))); | |
1601 | |
1602 format %{ "sqrtsd $dst, $src" %} | |
1603 ins_cost(150); | |
1604 ins_encode %{ | |
1605 __ sqrtsd($dst$$XMMRegister, $src$$Address); | |
1606 %} | |
1607 ins_pipe(pipe_slow); | |
1608 %} | |
1609 | |
1610 instruct sqrtD_imm(regD dst, immD con) %{ | |
1611 predicate(UseSSE>=2); | |
1612 match(Set dst (SqrtD con)); | |
1613 format %{ "sqrtsd $dst, [$constantaddress]\t# load from constant table: double=$con" %} | |
1614 ins_cost(150); | |
1615 ins_encode %{ | |
1616 __ sqrtsd($dst$$XMMRegister, $constantaddress($con)); | |
1617 %} | |
1618 ins_pipe(pipe_slow); | |
1619 %} | |
1620 | |
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1621 |
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1622 // ====================VECTOR INSTRUCTIONS===================================== |
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1623 |
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1624 // Load vectors (4 bytes long) |
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1625 instruct loadV4(vecS dst, memory mem) %{ |
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1626 predicate(n->as_LoadVector()->memory_size() == 4); |
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1627 match(Set dst (LoadVector mem)); |
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1628 ins_cost(125); |
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1629 format %{ "movd $dst,$mem\t! load vector (4 bytes)" %} |
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1630 ins_encode %{ |
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1631 __ movdl($dst$$XMMRegister, $mem$$Address); |
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7119644: Increase superword's vector size up to 256 bits
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|
1632 %} |
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|
1633 ins_pipe( pipe_slow ); |
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|
1634 %} |
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|
1635 |
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|
1636 // Load vectors (8 bytes long) |
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|
1637 instruct loadV8(vecD dst, memory mem) %{ |
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1638 predicate(n->as_LoadVector()->memory_size() == 8); |
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|
1639 match(Set dst (LoadVector mem)); |
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|
1640 ins_cost(125); |
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|
1641 format %{ "movq $dst,$mem\t! load vector (8 bytes)" %} |
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|
1642 ins_encode %{ |
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|
1643 __ movq($dst$$XMMRegister, $mem$$Address); |
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|
1644 %} |
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|
1645 ins_pipe( pipe_slow ); |
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|
1646 %} |
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|
1647 |
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|
1648 // Load vectors (16 bytes long) |
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|
1649 instruct loadV16(vecX dst, memory mem) %{ |
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|
1650 predicate(n->as_LoadVector()->memory_size() == 16); |
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|
1651 match(Set dst (LoadVector mem)); |
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|
1652 ins_cost(125); |
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|
1653 format %{ "movdqu $dst,$mem\t! load vector (16 bytes)" %} |
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|
1654 ins_encode %{ |
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|
1655 __ movdqu($dst$$XMMRegister, $mem$$Address); |
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|
1656 %} |
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|
1657 ins_pipe( pipe_slow ); |
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|
1658 %} |
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|
1659 |
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|
1660 // Load vectors (32 bytes long) |
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|
1661 instruct loadV32(vecY dst, memory mem) %{ |
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|
1662 predicate(n->as_LoadVector()->memory_size() == 32); |
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|
1663 match(Set dst (LoadVector mem)); |
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|
1664 ins_cost(125); |
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|
1665 format %{ "vmovdqu $dst,$mem\t! load vector (32 bytes)" %} |
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|
1666 ins_encode %{ |
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|
1667 __ vmovdqu($dst$$XMMRegister, $mem$$Address); |
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7119644: Increase superword's vector size up to 256 bits
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|
1668 %} |
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|
1669 ins_pipe( pipe_slow ); |
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|
1670 %} |
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|
1671 |
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|
1672 // Store vectors |
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|
1673 instruct storeV4(memory mem, vecS src) %{ |
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|
1674 predicate(n->as_StoreVector()->memory_size() == 4); |
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|
1675 match(Set mem (StoreVector mem src)); |
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|
1676 ins_cost(145); |
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|
1677 format %{ "movd $mem,$src\t! store vector (4 bytes)" %} |
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|
1678 ins_encode %{ |
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|
1679 __ movdl($mem$$Address, $src$$XMMRegister); |
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7119644: Increase superword's vector size up to 256 bits
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|
1680 %} |
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|
1681 ins_pipe( pipe_slow ); |
8c92982cbbc4
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4950
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|
1682 %} |
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|
1683 |
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7119644: Increase superword's vector size up to 256 bits
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|
1684 instruct storeV8(memory mem, vecD src) %{ |
8c92982cbbc4
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|
1685 predicate(n->as_StoreVector()->memory_size() == 8); |
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4950
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|
1686 match(Set mem (StoreVector mem src)); |
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4950
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changeset
|
1687 ins_cost(145); |
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changeset
|
1688 format %{ "movq $mem,$src\t! store vector (8 bytes)" %} |
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7119644: Increase superword's vector size up to 256 bits
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changeset
|
1689 ins_encode %{ |
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4950
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|
1690 __ movq($mem$$Address, $src$$XMMRegister); |
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7119644: Increase superword's vector size up to 256 bits
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changeset
|
1691 %} |
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4950
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changeset
|
1692 ins_pipe( pipe_slow ); |
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kvn
parents:
4950
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changeset
|
1693 %} |
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4950
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changeset
|
1694 |
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7119644: Increase superword's vector size up to 256 bits
kvn
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4950
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|
1695 instruct storeV16(memory mem, vecX src) %{ |
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7119644: Increase superword's vector size up to 256 bits
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|
1696 predicate(n->as_StoreVector()->memory_size() == 16); |
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7119644: Increase superword's vector size up to 256 bits
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4950
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changeset
|
1697 match(Set mem (StoreVector mem src)); |
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4950
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changeset
|
1698 ins_cost(145); |
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changeset
|
1699 format %{ "movdqu $mem,$src\t! store vector (16 bytes)" %} |
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|
1700 ins_encode %{ |
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4950
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|
1701 __ movdqu($mem$$Address, $src$$XMMRegister); |
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7119644: Increase superword's vector size up to 256 bits
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4950
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changeset
|
1702 %} |
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kvn
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4950
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changeset
|
1703 ins_pipe( pipe_slow ); |
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kvn
parents:
4950
diff
changeset
|
1704 %} |
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4950
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changeset
|
1705 |
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7119644: Increase superword's vector size up to 256 bits
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|
1706 instruct storeV32(memory mem, vecY src) %{ |
8c92982cbbc4
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changeset
|
1707 predicate(n->as_StoreVector()->memory_size() == 32); |
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kvn
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4950
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changeset
|
1708 match(Set mem (StoreVector mem src)); |
8c92982cbbc4
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kvn
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4950
diff
changeset
|
1709 ins_cost(145); |
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4950
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changeset
|
1710 format %{ "vmovdqu $mem,$src\t! store vector (32 bytes)" %} |
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7119644: Increase superword's vector size up to 256 bits
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4950
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changeset
|
1711 ins_encode %{ |
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4950
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changeset
|
1712 __ vmovdqu($mem$$Address, $src$$XMMRegister); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
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4950
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changeset
|
1713 %} |
8c92982cbbc4
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4950
diff
changeset
|
1714 ins_pipe( pipe_slow ); |
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7119644: Increase superword's vector size up to 256 bits
kvn
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4950
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changeset
|
1715 %} |
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4950
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changeset
|
1716 |
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7119644: Increase superword's vector size up to 256 bits
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diff
changeset
|
1717 // Replicate byte scalar to be vector |
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7119644: Increase superword's vector size up to 256 bits
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|
1718 instruct Repl4B(vecS dst, rRegI src) %{ |
8c92982cbbc4
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|
1719 predicate(n->as_Vector()->length() == 4); |
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changeset
|
1720 match(Set dst (ReplicateB src)); |
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changeset
|
1721 format %{ "movd $dst,$src\n\t" |
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|
1722 "punpcklbw $dst,$dst\n\t" |
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changeset
|
1723 "pshuflw $dst,$dst,0x00\t! replicate4B" %} |
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changeset
|
1724 ins_encode %{ |
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changeset
|
1725 __ movdl($dst$$XMMRegister, $src$$Register); |
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|
1726 __ punpcklbw($dst$$XMMRegister, $dst$$XMMRegister); |
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|
1727 __ pshuflw($dst$$XMMRegister, $dst$$XMMRegister, 0x00); |
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changeset
|
1728 %} |
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changeset
|
1729 ins_pipe( pipe_slow ); |
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4950
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changeset
|
1730 %} |
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changeset
|
1731 |
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|
1732 instruct Repl8B(vecD dst, rRegI src) %{ |
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changeset
|
1733 predicate(n->as_Vector()->length() == 8); |
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changeset
|
1734 match(Set dst (ReplicateB src)); |
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changeset
|
1735 format %{ "movd $dst,$src\n\t" |
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changeset
|
1736 "punpcklbw $dst,$dst\n\t" |
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changeset
|
1737 "pshuflw $dst,$dst,0x00\t! replicate8B" %} |
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changeset
|
1738 ins_encode %{ |
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changeset
|
1739 __ movdl($dst$$XMMRegister, $src$$Register); |
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changeset
|
1740 __ punpcklbw($dst$$XMMRegister, $dst$$XMMRegister); |
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changeset
|
1741 __ pshuflw($dst$$XMMRegister, $dst$$XMMRegister, 0x00); |
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changeset
|
1742 %} |
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changeset
|
1743 ins_pipe( pipe_slow ); |
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4950
diff
changeset
|
1744 %} |
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changeset
|
1745 |
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changeset
|
1746 instruct Repl16B(vecX dst, rRegI src) %{ |
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changeset
|
1747 predicate(n->as_Vector()->length() == 16); |
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changeset
|
1748 match(Set dst (ReplicateB src)); |
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changeset
|
1749 format %{ "movd $dst,$src\n\t" |
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changeset
|
1750 "punpcklbw $dst,$dst\n\t" |
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changeset
|
1751 "pshuflw $dst,$dst,0x00\n\t" |
6225 | 1752 "punpcklqdq $dst,$dst\t! replicate16B" %} |
6179
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changeset
|
1753 ins_encode %{ |
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changeset
|
1754 __ movdl($dst$$XMMRegister, $src$$Register); |
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changeset
|
1755 __ punpcklbw($dst$$XMMRegister, $dst$$XMMRegister); |
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changeset
|
1756 __ pshuflw($dst$$XMMRegister, $dst$$XMMRegister, 0x00); |
6225 | 1757 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister); |
6179
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|
1758 %} |
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1759 ins_pipe( pipe_slow ); |
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1760 %} |
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1761 |
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1762 instruct Repl32B(vecY dst, rRegI src) %{ |
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1763 predicate(n->as_Vector()->length() == 32); |
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1764 match(Set dst (ReplicateB src)); |
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1765 format %{ "movd $dst,$src\n\t" |
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1766 "punpcklbw $dst,$dst\n\t" |
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1767 "pshuflw $dst,$dst,0x00\n\t" |
6225 | 1768 "punpcklqdq $dst,$dst\n\t" |
1769 "vinserti128h $dst,$dst,$dst\t! replicate32B" %} | |
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1770 ins_encode %{ |
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1771 __ movdl($dst$$XMMRegister, $src$$Register); |
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1772 __ punpcklbw($dst$$XMMRegister, $dst$$XMMRegister); |
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1773 __ pshuflw($dst$$XMMRegister, $dst$$XMMRegister, 0x00); |
6225 | 1774 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister); |
1775 __ vinserti128h($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister); | |
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1776 %} |
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1777 ins_pipe( pipe_slow ); |
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1778 %} |
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1779 |
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1780 // Replicate byte scalar immediate to be vector by loading from const table. |
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1781 instruct Repl4B_imm(vecS dst, immI con) %{ |
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1782 predicate(n->as_Vector()->length() == 4); |
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1783 match(Set dst (ReplicateB con)); |
6225 | 1784 format %{ "movdl $dst,[$constantaddress]\t! replicate4B($con)" %} |
6179
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1785 ins_encode %{ |
6225 | 1786 __ movdl($dst$$XMMRegister, $constantaddress(replicate4_imm($con$$constant, 1))); |
6179
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1787 %} |
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1788 ins_pipe( pipe_slow ); |
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1789 %} |
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1790 |
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1791 instruct Repl8B_imm(vecD dst, immI con) %{ |
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1792 predicate(n->as_Vector()->length() == 8); |
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1793 match(Set dst (ReplicateB con)); |
6225 | 1794 format %{ "movq $dst,[$constantaddress]\t! replicate8B($con)" %} |
6179
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1795 ins_encode %{ |
6225 | 1796 __ movq($dst$$XMMRegister, $constantaddress(replicate8_imm($con$$constant, 1))); |
6179
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1797 %} |
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1798 ins_pipe( pipe_slow ); |
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1799 %} |
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1800 |
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1801 instruct Repl16B_imm(vecX dst, immI con) %{ |
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1802 predicate(n->as_Vector()->length() == 16); |
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1803 match(Set dst (ReplicateB con)); |
6225 | 1804 format %{ "movq $dst,[$constantaddress]\n\t" |
1805 "punpcklqdq $dst,$dst\t! replicate16B($con)" %} | |
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1806 ins_encode %{ |
6225 | 1807 __ movq($dst$$XMMRegister, $constantaddress(replicate8_imm($con$$constant, 1))); |
1808 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister); | |
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1809 %} |
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1810 ins_pipe( pipe_slow ); |
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1811 %} |
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1812 |
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1813 instruct Repl32B_imm(vecY dst, immI con) %{ |
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1814 predicate(n->as_Vector()->length() == 32); |
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1815 match(Set dst (ReplicateB con)); |
6225 | 1816 format %{ "movq $dst,[$constantaddress]\n\t" |
1817 "punpcklqdq $dst,$dst\n\t" | |
1818 "vinserti128h $dst,$dst,$dst\t! lreplicate32B($con)" %} | |
6179
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1819 ins_encode %{ |
6225 | 1820 __ movq($dst$$XMMRegister, $constantaddress(replicate8_imm($con$$constant, 1))); |
1821 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister); | |
1822 __ vinserti128h($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister); | |
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1823 %} |
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1824 ins_pipe( pipe_slow ); |
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1825 %} |
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1826 |
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1827 // Replicate byte scalar zero to be vector |
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1828 instruct Repl4B_zero(vecS dst, immI0 zero) %{ |
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1829 predicate(n->as_Vector()->length() == 4); |
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1830 match(Set dst (ReplicateB zero)); |
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1831 format %{ "pxor $dst,$dst\t! replicate4B zero" %} |
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1832 ins_encode %{ |
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1833 __ pxor($dst$$XMMRegister, $dst$$XMMRegister); |
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1834 %} |
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1835 ins_pipe( fpu_reg_reg ); |
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1836 %} |
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1837 |
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1838 instruct Repl8B_zero(vecD dst, immI0 zero) %{ |
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1839 predicate(n->as_Vector()->length() == 8); |
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1840 match(Set dst (ReplicateB zero)); |
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1841 format %{ "pxor $dst,$dst\t! replicate8B zero" %} |
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1842 ins_encode %{ |
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1843 __ pxor($dst$$XMMRegister, $dst$$XMMRegister); |
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1844 %} |
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1845 ins_pipe( fpu_reg_reg ); |
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1846 %} |
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1847 |
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1848 instruct Repl16B_zero(vecX dst, immI0 zero) %{ |
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1849 predicate(n->as_Vector()->length() == 16); |
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1850 match(Set dst (ReplicateB zero)); |
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1851 format %{ "pxor $dst,$dst\t! replicate16B zero" %} |
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1852 ins_encode %{ |
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1853 __ pxor($dst$$XMMRegister, $dst$$XMMRegister); |
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1854 %} |
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1855 ins_pipe( fpu_reg_reg ); |
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1856 %} |
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1857 |
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1858 instruct Repl32B_zero(vecY dst, immI0 zero) %{ |
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1859 predicate(n->as_Vector()->length() == 32); |
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1860 match(Set dst (ReplicateB zero)); |
6225 | 1861 format %{ "vpxor $dst,$dst,$dst\t! replicate32B zero" %} |
6179
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1862 ins_encode %{ |
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1863 // Use vxorpd since AVX does not have vpxor for 256-bit (AVX2 will have it). |
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1864 bool vector256 = true; |
6225 | 1865 __ vpxor($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister, vector256); |
6179
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1866 %} |
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1867 ins_pipe( fpu_reg_reg ); |
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1868 %} |
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1869 |
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1870 // Replicate char/short (2 byte) scalar to be vector |
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1871 instruct Repl2S(vecS dst, rRegI src) %{ |
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1872 predicate(n->as_Vector()->length() == 2); |
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1873 match(Set dst (ReplicateS src)); |
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1874 format %{ "movd $dst,$src\n\t" |
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1875 "pshuflw $dst,$dst,0x00\t! replicate2S" %} |
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1876 ins_encode %{ |
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1877 __ movdl($dst$$XMMRegister, $src$$Register); |
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1878 __ pshuflw($dst$$XMMRegister, $dst$$XMMRegister, 0x00); |
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1879 %} |
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1880 ins_pipe( fpu_reg_reg ); |
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1881 %} |
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1882 |
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1883 instruct Repl4S(vecD dst, rRegI src) %{ |
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1884 predicate(n->as_Vector()->length() == 4); |
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1885 match(Set dst (ReplicateS src)); |
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1886 format %{ "movd $dst,$src\n\t" |
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1887 "pshuflw $dst,$dst,0x00\t! replicate4S" %} |
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1888 ins_encode %{ |
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1889 __ movdl($dst$$XMMRegister, $src$$Register); |
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1890 __ pshuflw($dst$$XMMRegister, $dst$$XMMRegister, 0x00); |
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1891 %} |
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1892 ins_pipe( fpu_reg_reg ); |
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1893 %} |
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1894 |
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1895 instruct Repl8S(vecX dst, rRegI src) %{ |
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1896 predicate(n->as_Vector()->length() == 8); |
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1897 match(Set dst (ReplicateS src)); |
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1898 format %{ "movd $dst,$src\n\t" |
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1899 "pshuflw $dst,$dst,0x00\n\t" |
6225 | 1900 "punpcklqdq $dst,$dst\t! replicate8S" %} |
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1901 ins_encode %{ |
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1902 __ movdl($dst$$XMMRegister, $src$$Register); |
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1903 __ pshuflw($dst$$XMMRegister, $dst$$XMMRegister, 0x00); |
6225 | 1904 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister); |
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1905 %} |
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1906 ins_pipe( pipe_slow ); |
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1907 %} |
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1908 |
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1909 instruct Repl16S(vecY dst, rRegI src) %{ |
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1910 predicate(n->as_Vector()->length() == 16); |
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1911 match(Set dst (ReplicateS src)); |
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1912 format %{ "movd $dst,$src\n\t" |
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1913 "pshuflw $dst,$dst,0x00\n\t" |
6225 | 1914 "punpcklqdq $dst,$dst\n\t" |
1915 "vinserti128h $dst,$dst,$dst\t! replicate16S" %} | |
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1916 ins_encode %{ |
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1917 __ movdl($dst$$XMMRegister, $src$$Register); |
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1918 __ pshuflw($dst$$XMMRegister, $dst$$XMMRegister, 0x00); |
6225 | 1919 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister); |
1920 __ vinserti128h($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister); | |
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1921 %} |
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1922 ins_pipe( pipe_slow ); |
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1923 %} |
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1924 |
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1925 // Replicate char/short (2 byte) scalar immediate to be vector by loading from const table. |
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1926 instruct Repl2S_imm(vecS dst, immI con) %{ |
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1927 predicate(n->as_Vector()->length() == 2); |
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1928 match(Set dst (ReplicateS con)); |
6225 | 1929 format %{ "movdl $dst,[$constantaddress]\t! replicate2S($con)" %} |
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1930 ins_encode %{ |
6225 | 1931 __ movdl($dst$$XMMRegister, $constantaddress(replicate4_imm($con$$constant, 2))); |
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1932 %} |
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1933 ins_pipe( fpu_reg_reg ); |
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1934 %} |
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1935 |
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1936 instruct Repl4S_imm(vecD dst, immI con) %{ |
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1937 predicate(n->as_Vector()->length() == 4); |
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1938 match(Set dst (ReplicateS con)); |
6225 | 1939 format %{ "movq $dst,[$constantaddress]\t! replicate4S($con)" %} |
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1940 ins_encode %{ |
6225 | 1941 __ movq($dst$$XMMRegister, $constantaddress(replicate8_imm($con$$constant, 2))); |
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1942 %} |
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1943 ins_pipe( fpu_reg_reg ); |
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1944 %} |
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1945 |
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1946 instruct Repl8S_imm(vecX dst, immI con) %{ |
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1947 predicate(n->as_Vector()->length() == 8); |
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1948 match(Set dst (ReplicateS con)); |
6225 | 1949 format %{ "movq $dst,[$constantaddress]\n\t" |
1950 "punpcklqdq $dst,$dst\t! replicate8S($con)" %} | |
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1951 ins_encode %{ |
6225 | 1952 __ movq($dst$$XMMRegister, $constantaddress(replicate8_imm($con$$constant, 2))); |
1953 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister); | |
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1954 %} |
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1955 ins_pipe( pipe_slow ); |
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1956 %} |
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1957 |
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1958 instruct Repl16S_imm(vecY dst, immI con) %{ |
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1959 predicate(n->as_Vector()->length() == 16); |
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1960 match(Set dst (ReplicateS con)); |
6225 | 1961 format %{ "movq $dst,[$constantaddress]\n\t" |
1962 "punpcklqdq $dst,$dst\n\t" | |
1963 "vinserti128h $dst,$dst,$dst\t! replicate16S($con)" %} | |
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1964 ins_encode %{ |
6225 | 1965 __ movq($dst$$XMMRegister, $constantaddress(replicate8_imm($con$$constant, 2))); |
1966 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister); | |
1967 __ vinserti128h($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister); | |
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1968 %} |
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1969 ins_pipe( pipe_slow ); |
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1970 %} |
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1971 |
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1972 // Replicate char/short (2 byte) scalar zero to be vector |
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1973 instruct Repl2S_zero(vecS dst, immI0 zero) %{ |
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1974 predicate(n->as_Vector()->length() == 2); |
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1975 match(Set dst (ReplicateS zero)); |
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1976 format %{ "pxor $dst,$dst\t! replicate2S zero" %} |
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1977 ins_encode %{ |
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1978 __ pxor($dst$$XMMRegister, $dst$$XMMRegister); |
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1979 %} |
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1980 ins_pipe( fpu_reg_reg ); |
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1981 %} |
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1982 |
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1983 instruct Repl4S_zero(vecD dst, immI0 zero) %{ |
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1984 predicate(n->as_Vector()->length() == 4); |
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1985 match(Set dst (ReplicateS zero)); |
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1986 format %{ "pxor $dst,$dst\t! replicate4S zero" %} |
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1987 ins_encode %{ |
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1988 __ pxor($dst$$XMMRegister, $dst$$XMMRegister); |
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1989 %} |
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1990 ins_pipe( fpu_reg_reg ); |
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1991 %} |
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1992 |
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1993 instruct Repl8S_zero(vecX dst, immI0 zero) %{ |
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1994 predicate(n->as_Vector()->length() == 8); |
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1995 match(Set dst (ReplicateS zero)); |
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1996 format %{ "pxor $dst,$dst\t! replicate8S zero" %} |
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1997 ins_encode %{ |
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1998 __ pxor($dst$$XMMRegister, $dst$$XMMRegister); |
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1999 %} |
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2000 ins_pipe( fpu_reg_reg ); |
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2001 %} |
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2002 |
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2003 instruct Repl16S_zero(vecY dst, immI0 zero) %{ |
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2004 predicate(n->as_Vector()->length() == 16); |
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2005 match(Set dst (ReplicateS zero)); |
6225 | 2006 format %{ "vpxor $dst,$dst,$dst\t! replicate16S zero" %} |
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2007 ins_encode %{ |
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2008 // Use vxorpd since AVX does not have vpxor for 256-bit (AVX2 will have it). |
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2009 bool vector256 = true; |
6225 | 2010 __ vpxor($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister, vector256); |
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2011 %} |
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2012 ins_pipe( fpu_reg_reg ); |
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2013 %} |
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2014 |
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2015 // Replicate integer (4 byte) scalar to be vector |
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2016 instruct Repl2I(vecD dst, rRegI src) %{ |
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2017 predicate(n->as_Vector()->length() == 2); |
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2018 match(Set dst (ReplicateI src)); |
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2019 format %{ "movd $dst,$src\n\t" |
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2020 "pshufd $dst,$dst,0x00\t! replicate2I" %} |
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2021 ins_encode %{ |
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2022 __ movdl($dst$$XMMRegister, $src$$Register); |
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2023 __ pshufd($dst$$XMMRegister, $dst$$XMMRegister, 0x00); |
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2024 %} |
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2025 ins_pipe( fpu_reg_reg ); |
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2026 %} |
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2027 |
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2028 instruct Repl4I(vecX dst, rRegI src) %{ |
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2029 predicate(n->as_Vector()->length() == 4); |
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2030 match(Set dst (ReplicateI src)); |
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2031 format %{ "movd $dst,$src\n\t" |
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2032 "pshufd $dst,$dst,0x00\t! replicate4I" %} |
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2033 ins_encode %{ |
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2034 __ movdl($dst$$XMMRegister, $src$$Register); |
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2035 __ pshufd($dst$$XMMRegister, $dst$$XMMRegister, 0x00); |
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2036 %} |
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2037 ins_pipe( pipe_slow ); |
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2038 %} |
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2039 |
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2040 instruct Repl8I(vecY dst, rRegI src) %{ |
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2041 predicate(n->as_Vector()->length() == 8); |
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2042 match(Set dst (ReplicateI src)); |
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2043 format %{ "movd $dst,$src\n\t" |
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2044 "pshufd $dst,$dst,0x00\n\t" |
6225 | 2045 "vinserti128h $dst,$dst,$dst\t! replicate8I" %} |
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2046 ins_encode %{ |
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2047 __ movdl($dst$$XMMRegister, $src$$Register); |
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2048 __ pshufd($dst$$XMMRegister, $dst$$XMMRegister, 0x00); |
6225 | 2049 __ vinserti128h($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister); |
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2050 %} |
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2051 ins_pipe( pipe_slow ); |
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2052 %} |
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2053 |
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2054 // Replicate integer (4 byte) scalar immediate to be vector by loading from const table. |
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2055 instruct Repl2I_imm(vecD dst, immI con) %{ |
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2056 predicate(n->as_Vector()->length() == 2); |
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2057 match(Set dst (ReplicateI con)); |
6225 | 2058 format %{ "movq $dst,[$constantaddress]\t! replicate2I($con)" %} |
6179
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2059 ins_encode %{ |
6225 | 2060 __ movq($dst$$XMMRegister, $constantaddress(replicate8_imm($con$$constant, 4))); |
6179
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2061 %} |
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2062 ins_pipe( fpu_reg_reg ); |
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2063 %} |
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2064 |
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2065 instruct Repl4I_imm(vecX dst, immI con) %{ |
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2066 predicate(n->as_Vector()->length() == 4); |
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2067 match(Set dst (ReplicateI con)); |
6225 | 2068 format %{ "movq $dst,[$constantaddress]\t! replicate4I($con)\n\t" |
2069 "punpcklqdq $dst,$dst" %} | |
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2070 ins_encode %{ |
6225 | 2071 __ movq($dst$$XMMRegister, $constantaddress(replicate8_imm($con$$constant, 4))); |
2072 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister); | |
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2073 %} |
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2074 ins_pipe( pipe_slow ); |
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2075 %} |
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2076 |
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2077 instruct Repl8I_imm(vecY dst, immI con) %{ |
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2078 predicate(n->as_Vector()->length() == 8); |
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2079 match(Set dst (ReplicateI con)); |
6225 | 2080 format %{ "movq $dst,[$constantaddress]\t! replicate8I($con)\n\t" |
2081 "punpcklqdq $dst,$dst\n\t" | |
2082 "vinserti128h $dst,$dst,$dst" %} | |
6179
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2083 ins_encode %{ |
6225 | 2084 __ movq($dst$$XMMRegister, $constantaddress(replicate8_imm($con$$constant, 4))); |
2085 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister); | |
2086 __ vinserti128h($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister); | |
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2087 %} |
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2088 ins_pipe( pipe_slow ); |
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2089 %} |
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2090 |
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2091 // Integer could be loaded into xmm register directly from memory. |
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2092 instruct Repl2I_mem(vecD dst, memory mem) %{ |
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2093 predicate(n->as_Vector()->length() == 2); |
6225 | 2094 match(Set dst (ReplicateI (LoadI mem))); |
6179
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2095 format %{ "movd $dst,$mem\n\t" |
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2096 "pshufd $dst,$dst,0x00\t! replicate2I" %} |
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2097 ins_encode %{ |
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2098 __ movdl($dst$$XMMRegister, $mem$$Address); |
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2099 __ pshufd($dst$$XMMRegister, $dst$$XMMRegister, 0x00); |
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2100 %} |
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2101 ins_pipe( fpu_reg_reg ); |
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2102 %} |
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|
2103 |
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2104 instruct Repl4I_mem(vecX dst, memory mem) %{ |
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2105 predicate(n->as_Vector()->length() == 4); |
6225 | 2106 match(Set dst (ReplicateI (LoadI mem))); |
6179
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2107 format %{ "movd $dst,$mem\n\t" |
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2108 "pshufd $dst,$dst,0x00\t! replicate4I" %} |
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|
2109 ins_encode %{ |
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2110 __ movdl($dst$$XMMRegister, $mem$$Address); |
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2111 __ pshufd($dst$$XMMRegister, $dst$$XMMRegister, 0x00); |
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2112 %} |
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|
2113 ins_pipe( pipe_slow ); |
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|
2114 %} |
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|
2115 |
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2116 instruct Repl8I_mem(vecY dst, memory mem) %{ |
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2117 predicate(n->as_Vector()->length() == 8); |
6225 | 2118 match(Set dst (ReplicateI (LoadI mem))); |
6179
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2119 format %{ "movd $dst,$mem\n\t" |
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2120 "pshufd $dst,$dst,0x00\n\t" |
6225 | 2121 "vinserti128h $dst,$dst,$dst\t! replicate8I" %} |
6179
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|
2122 ins_encode %{ |
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2123 __ movdl($dst$$XMMRegister, $mem$$Address); |
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2124 __ pshufd($dst$$XMMRegister, $dst$$XMMRegister, 0x00); |
6225 | 2125 __ vinserti128h($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister); |
6179
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|
2126 %} |
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|
2127 ins_pipe( pipe_slow ); |
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|
2128 %} |
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|
2129 |
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|
2130 // Replicate integer (4 byte) scalar zero to be vector |
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2131 instruct Repl2I_zero(vecD dst, immI0 zero) %{ |
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|
2132 predicate(n->as_Vector()->length() == 2); |
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|
2133 match(Set dst (ReplicateI zero)); |
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|
2134 format %{ "pxor $dst,$dst\t! replicate2I" %} |
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|
2135 ins_encode %{ |
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|
2136 __ pxor($dst$$XMMRegister, $dst$$XMMRegister); |
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|
2137 %} |
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|
2138 ins_pipe( fpu_reg_reg ); |
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|
2139 %} |
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|
2140 |
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|
2141 instruct Repl4I_zero(vecX dst, immI0 zero) %{ |
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|
2142 predicate(n->as_Vector()->length() == 4); |
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|
2143 match(Set dst (ReplicateI zero)); |
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|
2144 format %{ "pxor $dst,$dst\t! replicate4I zero)" %} |
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|
2145 ins_encode %{ |
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|
2146 __ pxor($dst$$XMMRegister, $dst$$XMMRegister); |
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|
2147 %} |
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|
2148 ins_pipe( fpu_reg_reg ); |
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|
2149 %} |
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|
2150 |
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|
2151 instruct Repl8I_zero(vecY dst, immI0 zero) %{ |
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|
2152 predicate(n->as_Vector()->length() == 8); |
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|
2153 match(Set dst (ReplicateI zero)); |
6225 | 2154 format %{ "vpxor $dst,$dst,$dst\t! replicate8I zero" %} |
6179
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|
2155 ins_encode %{ |
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|
2156 // Use vxorpd since AVX does not have vpxor for 256-bit (AVX2 will have it). |
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|
2157 bool vector256 = true; |
6225 | 2158 __ vpxor($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister, vector256); |
6179
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|
2159 %} |
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|
2160 ins_pipe( fpu_reg_reg ); |
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|
2161 %} |
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|
2162 |
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|
2163 // Replicate long (8 byte) scalar to be vector |
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|
2164 #ifdef _LP64 |
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|
2165 instruct Repl2L(vecX dst, rRegL src) %{ |
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|
2166 predicate(n->as_Vector()->length() == 2); |
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|
2167 match(Set dst (ReplicateL src)); |
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|
2168 format %{ "movdq $dst,$src\n\t" |
6225 | 2169 "punpcklqdq $dst,$dst\t! replicate2L" %} |
6179
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|
2170 ins_encode %{ |
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|
2171 __ movdq($dst$$XMMRegister, $src$$Register); |
6225 | 2172 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister); |
6179
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2173 %} |
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|
2174 ins_pipe( pipe_slow ); |
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|
2175 %} |
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|
2176 |
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2177 instruct Repl4L(vecY dst, rRegL src) %{ |
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|
2178 predicate(n->as_Vector()->length() == 4); |
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changeset
|
2179 match(Set dst (ReplicateL src)); |
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changeset
|
2180 format %{ "movdq $dst,$src\n\t" |
6225 | 2181 "punpcklqdq $dst,$dst\n\t" |
2182 "vinserti128h $dst,$dst,$dst\t! replicate4L" %} | |
6179
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2183 ins_encode %{ |
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2184 __ movdq($dst$$XMMRegister, $src$$Register); |
6225 | 2185 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister); |
2186 __ vinserti128h($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister); | |
6179
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2187 %} |
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2188 ins_pipe( pipe_slow ); |
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2189 %} |
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2190 #else // _LP64 |
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2191 instruct Repl2L(vecX dst, eRegL src, regD tmp) %{ |
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2192 predicate(n->as_Vector()->length() == 2); |
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2193 match(Set dst (ReplicateL src)); |
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2194 effect(TEMP dst, USE src, TEMP tmp); |
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2195 format %{ "movdl $dst,$src.lo\n\t" |
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2196 "movdl $tmp,$src.hi\n\t" |
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2197 "punpckldq $dst,$tmp\n\t" |
6225 | 2198 "punpcklqdq $dst,$dst\t! replicate2L"%} |
6179
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2199 ins_encode %{ |
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2200 __ movdl($dst$$XMMRegister, $src$$Register); |
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2201 __ movdl($tmp$$XMMRegister, HIGH_FROM_LOW($src$$Register)); |
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2202 __ punpckldq($dst$$XMMRegister, $tmp$$XMMRegister); |
6225 | 2203 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister); |
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2204 %} |
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2205 ins_pipe( pipe_slow ); |
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2206 %} |
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2207 |
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2208 instruct Repl4L(vecY dst, eRegL src, regD tmp) %{ |
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2209 predicate(n->as_Vector()->length() == 4); |
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2210 match(Set dst (ReplicateL src)); |
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2211 effect(TEMP dst, USE src, TEMP tmp); |
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2212 format %{ "movdl $dst,$src.lo\n\t" |
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2213 "movdl $tmp,$src.hi\n\t" |
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2214 "punpckldq $dst,$tmp\n\t" |
6225 | 2215 "punpcklqdq $dst,$dst\n\t" |
2216 "vinserti128h $dst,$dst,$dst\t! replicate4L" %} | |
6179
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2217 ins_encode %{ |
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2218 __ movdl($dst$$XMMRegister, $src$$Register); |
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2219 __ movdl($tmp$$XMMRegister, HIGH_FROM_LOW($src$$Register)); |
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2220 __ punpckldq($dst$$XMMRegister, $tmp$$XMMRegister); |
6225 | 2221 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister); |
2222 __ vinserti128h($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister); | |
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2223 %} |
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2224 ins_pipe( pipe_slow ); |
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2225 %} |
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2226 #endif // _LP64 |
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2227 |
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2228 // Replicate long (8 byte) scalar immediate to be vector by loading from const table. |
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2229 instruct Repl2L_imm(vecX dst, immL con) %{ |
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2230 predicate(n->as_Vector()->length() == 2); |
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2231 match(Set dst (ReplicateL con)); |
6225 | 2232 format %{ "movq $dst,[$constantaddress]\n\t" |
2233 "punpcklqdq $dst,$dst\t! replicate2L($con)" %} | |
6179
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2234 ins_encode %{ |
6225 | 2235 __ movq($dst$$XMMRegister, $constantaddress($con)); |
2236 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister); | |
6179
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2237 %} |
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2238 ins_pipe( pipe_slow ); |
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2239 %} |
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2240 |
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2241 instruct Repl4L_imm(vecY dst, immL con) %{ |
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2242 predicate(n->as_Vector()->length() == 4); |
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2243 match(Set dst (ReplicateL con)); |
6225 | 2244 format %{ "movq $dst,[$constantaddress]\n\t" |
2245 "punpcklqdq $dst,$dst\n\t" | |
2246 "vinserti128h $dst,$dst,$dst\t! replicate4L($con)" %} | |
6179
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2247 ins_encode %{ |
6225 | 2248 __ movq($dst$$XMMRegister, $constantaddress($con)); |
2249 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister); | |
2250 __ vinserti128h($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister); | |
6179
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2251 %} |
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2252 ins_pipe( pipe_slow ); |
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2253 %} |
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2254 |
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2255 // Long could be loaded into xmm register directly from memory. |
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2256 instruct Repl2L_mem(vecX dst, memory mem) %{ |
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2257 predicate(n->as_Vector()->length() == 2); |
6225 | 2258 match(Set dst (ReplicateL (LoadL mem))); |
6179
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2259 format %{ "movq $dst,$mem\n\t" |
6225 | 2260 "punpcklqdq $dst,$dst\t! replicate2L" %} |
6179
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2261 ins_encode %{ |
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2262 __ movq($dst$$XMMRegister, $mem$$Address); |
6225 | 2263 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister); |
6179
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2264 %} |
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2265 ins_pipe( pipe_slow ); |
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|
2266 %} |
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2267 |
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2268 instruct Repl4L_mem(vecY dst, memory mem) %{ |
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2269 predicate(n->as_Vector()->length() == 4); |
6225 | 2270 match(Set dst (ReplicateL (LoadL mem))); |
6179
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2271 format %{ "movq $dst,$mem\n\t" |
6225 | 2272 "punpcklqdq $dst,$dst\n\t" |
2273 "vinserti128h $dst,$dst,$dst\t! replicate4L" %} | |
6179
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2274 ins_encode %{ |
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2275 __ movq($dst$$XMMRegister, $mem$$Address); |
6225 | 2276 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister); |
2277 __ vinserti128h($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister); | |
6179
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2278 %} |
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2279 ins_pipe( pipe_slow ); |
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|
2280 %} |
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|
2281 |
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2282 // Replicate long (8 byte) scalar zero to be vector |
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2283 instruct Repl2L_zero(vecX dst, immL0 zero) %{ |
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2284 predicate(n->as_Vector()->length() == 2); |
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2285 match(Set dst (ReplicateL zero)); |
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2286 format %{ "pxor $dst,$dst\t! replicate2L zero" %} |
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2287 ins_encode %{ |
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2288 __ pxor($dst$$XMMRegister, $dst$$XMMRegister); |
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2289 %} |
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2290 ins_pipe( fpu_reg_reg ); |
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2291 %} |
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2292 |
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2293 instruct Repl4L_zero(vecY dst, immL0 zero) %{ |
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2294 predicate(n->as_Vector()->length() == 4); |
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2295 match(Set dst (ReplicateL zero)); |
6225 | 2296 format %{ "vpxor $dst,$dst,$dst\t! replicate4L zero" %} |
6179
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2297 ins_encode %{ |
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2298 // Use vxorpd since AVX does not have vpxor for 256-bit (AVX2 will have it). |
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2299 bool vector256 = true; |
6225 | 2300 __ vpxor($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister, vector256); |
6179
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2301 %} |
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2302 ins_pipe( fpu_reg_reg ); |
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2303 %} |
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2304 |
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2305 // Replicate float (4 byte) scalar to be vector |
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2306 instruct Repl2F(vecD dst, regF src) %{ |
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2307 predicate(n->as_Vector()->length() == 2); |
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2308 match(Set dst (ReplicateF src)); |
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2309 format %{ "pshufd $dst,$dst,0x00\t! replicate2F" %} |
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2310 ins_encode %{ |
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2311 __ pshufd($dst$$XMMRegister, $src$$XMMRegister, 0x00); |
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2312 %} |
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2313 ins_pipe( fpu_reg_reg ); |
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|
2314 %} |
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|
2315 |
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2316 instruct Repl4F(vecX dst, regF src) %{ |
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2317 predicate(n->as_Vector()->length() == 4); |
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2318 match(Set dst (ReplicateF src)); |
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2319 format %{ "pshufd $dst,$dst,0x00\t! replicate4F" %} |
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2320 ins_encode %{ |
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2321 __ pshufd($dst$$XMMRegister, $src$$XMMRegister, 0x00); |
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2322 %} |
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|
2323 ins_pipe( pipe_slow ); |
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2324 %} |
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|
2325 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
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|
2326 instruct Repl8F(vecY dst, regF src) %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
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changeset
|
2327 predicate(n->as_Vector()->length() == 8); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2328 match(Set dst (ReplicateF src)); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2329 format %{ "pshufd $dst,$src,0x00\n\t" |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
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changeset
|
2330 "vinsertf128h $dst,$dst,$dst\t! replicate8F" %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
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4950
diff
changeset
|
2331 ins_encode %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2332 __ pshufd($dst$$XMMRegister, $src$$XMMRegister, 0x00); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2333 __ vinsertf128h($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2334 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2335 ins_pipe( pipe_slow ); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2336 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2337 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2338 // Replicate float (4 byte) scalar zero to be vector |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2339 instruct Repl2F_zero(vecD dst, immF0 zero) %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
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4950
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changeset
|
2340 predicate(n->as_Vector()->length() == 2); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2341 match(Set dst (ReplicateF zero)); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2342 format %{ "xorps $dst,$dst\t! replicate2F zero" %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2343 ins_encode %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
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changeset
|
2344 __ xorps($dst$$XMMRegister, $dst$$XMMRegister); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2345 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2346 ins_pipe( fpu_reg_reg ); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2347 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2348 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2349 instruct Repl4F_zero(vecX dst, immF0 zero) %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
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changeset
|
2350 predicate(n->as_Vector()->length() == 4); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2351 match(Set dst (ReplicateF zero)); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2352 format %{ "xorps $dst,$dst\t! replicate4F zero" %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2353 ins_encode %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2354 __ xorps($dst$$XMMRegister, $dst$$XMMRegister); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2355 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2356 ins_pipe( fpu_reg_reg ); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2357 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2358 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2359 instruct Repl8F_zero(vecY dst, immF0 zero) %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
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changeset
|
2360 predicate(n->as_Vector()->length() == 8); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2361 match(Set dst (ReplicateF zero)); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2362 format %{ "vxorps $dst,$dst,$dst\t! replicate8F zero" %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2363 ins_encode %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2364 bool vector256 = true; |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2365 __ vxorps($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister, vector256); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2366 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2367 ins_pipe( fpu_reg_reg ); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2368 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2369 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2370 // Replicate double (8 bytes) scalar to be vector |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2371 instruct Repl2D(vecX dst, regD src) %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
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4950
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changeset
|
2372 predicate(n->as_Vector()->length() == 2); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2373 match(Set dst (ReplicateD src)); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2374 format %{ "pshufd $dst,$src,0x44\t! replicate2D" %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2375 ins_encode %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2376 __ pshufd($dst$$XMMRegister, $src$$XMMRegister, 0x44); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2377 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2378 ins_pipe( pipe_slow ); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2379 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2380 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2381 instruct Repl4D(vecY dst, regD src) %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
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parents:
4950
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changeset
|
2382 predicate(n->as_Vector()->length() == 4); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2383 match(Set dst (ReplicateD src)); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2384 format %{ "pshufd $dst,$src,0x44\n\t" |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2385 "vinsertf128h $dst,$dst,$dst\t! replicate4D" %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2386 ins_encode %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2387 __ pshufd($dst$$XMMRegister, $src$$XMMRegister, 0x44); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2388 __ vinsertf128h($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2389 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2390 ins_pipe( pipe_slow ); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2391 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2392 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2393 // Replicate double (8 byte) scalar zero to be vector |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2394 instruct Repl2D_zero(vecX dst, immD0 zero) %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2395 predicate(n->as_Vector()->length() == 2); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2396 match(Set dst (ReplicateD zero)); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2397 format %{ "xorpd $dst,$dst\t! replicate2D zero" %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2398 ins_encode %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2399 __ xorpd($dst$$XMMRegister, $dst$$XMMRegister); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2400 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2401 ins_pipe( fpu_reg_reg ); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2402 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2403 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2404 instruct Repl4D_zero(vecY dst, immD0 zero) %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2405 predicate(n->as_Vector()->length() == 4); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2406 match(Set dst (ReplicateD zero)); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2407 format %{ "vxorpd $dst,$dst,$dst,vect256\t! replicate4D zero" %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2408 ins_encode %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2409 bool vector256 = true; |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2410 __ vxorpd($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister, vector256); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2411 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2412 ins_pipe( fpu_reg_reg ); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2413 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2414 |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2415 // ====================VECTOR ARITHMETIC======================================= |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2416 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2417 // --------------------------------- ADD -------------------------------------- |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2418 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2419 // Bytes vector add |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2420 instruct vadd4B(vecS dst, vecS src) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2421 predicate(n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2422 match(Set dst (AddVB dst src)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2423 format %{ "paddb $dst,$src\t! add packed4B" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2424 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2425 __ paddb($dst$$XMMRegister, $src$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2426 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2427 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2428 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2429 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2430 instruct vadd4B_reg(vecS dst, vecS src1, vecS src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
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diff
changeset
|
2431 predicate(UseAVX > 0 && n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2432 match(Set dst (AddVB src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2433 format %{ "vpaddb $dst,$src1,$src2\t! add packed4B" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2434 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2435 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2436 __ vpaddb($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2437 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2438 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2439 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2440 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2441 instruct vadd8B(vecD dst, vecD src) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2442 predicate(n->as_Vector()->length() == 8); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2443 match(Set dst (AddVB dst src)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2444 format %{ "paddb $dst,$src\t! add packed8B" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2445 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2446 __ paddb($dst$$XMMRegister, $src$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2447 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2448 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2449 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2450 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2451 instruct vadd8B_reg(vecD dst, vecD src1, vecD src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2452 predicate(UseAVX > 0 && n->as_Vector()->length() == 8); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2453 match(Set dst (AddVB src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2454 format %{ "vpaddb $dst,$src1,$src2\t! add packed8B" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2455 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2456 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2457 __ vpaddb($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2458 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2459 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2460 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2461 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2462 instruct vadd16B(vecX dst, vecX src) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2463 predicate(n->as_Vector()->length() == 16); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2464 match(Set dst (AddVB dst src)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2465 format %{ "paddb $dst,$src\t! add packed16B" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2466 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2467 __ paddb($dst$$XMMRegister, $src$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2468 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2469 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2470 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2471 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2472 instruct vadd16B_reg(vecX dst, vecX src1, vecX src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2473 predicate(UseAVX > 0 && n->as_Vector()->length() == 16); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2474 match(Set dst (AddVB src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2475 format %{ "vpaddb $dst,$src1,$src2\t! add packed16B" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2476 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2477 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2478 __ vpaddb($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2479 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2480 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2481 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2482 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2483 instruct vadd16B_mem(vecX dst, vecX src, memory mem) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2484 predicate(UseAVX > 0 && n->as_Vector()->length() == 16); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2485 match(Set dst (AddVB src (LoadVector mem))); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2486 format %{ "vpaddb $dst,$src,$mem\t! add packed16B" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2487 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2488 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2489 __ vpaddb($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2490 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2491 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2492 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2493 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2494 instruct vadd32B_reg(vecY dst, vecY src1, vecY src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2495 predicate(UseAVX > 1 && n->as_Vector()->length() == 32); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2496 match(Set dst (AddVB src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2497 format %{ "vpaddb $dst,$src1,$src2\t! add packed32B" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2498 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2499 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2500 __ vpaddb($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2501 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2502 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2503 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2504 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2505 instruct vadd32B_mem(vecY dst, vecY src, memory mem) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2506 predicate(UseAVX > 1 && n->as_Vector()->length() == 32); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2507 match(Set dst (AddVB src (LoadVector mem))); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2508 format %{ "vpaddb $dst,$src,$mem\t! add packed32B" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2509 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2510 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2511 __ vpaddb($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2512 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2513 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2514 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2515 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2516 // Shorts/Chars vector add |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2517 instruct vadd2S(vecS dst, vecS src) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2518 predicate(n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2519 match(Set dst (AddVS dst src)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2520 format %{ "paddw $dst,$src\t! add packed2S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2521 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2522 __ paddw($dst$$XMMRegister, $src$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2523 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2524 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2525 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2526 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2527 instruct vadd2S_reg(vecS dst, vecS src1, vecS src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2528 predicate(UseAVX > 0 && n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2529 match(Set dst (AddVS src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2530 format %{ "vpaddw $dst,$src1,$src2\t! add packed2S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2531 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2532 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2533 __ vpaddw($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2534 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2535 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2536 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2537 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2538 instruct vadd4S(vecD dst, vecD src) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2539 predicate(n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2540 match(Set dst (AddVS dst src)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2541 format %{ "paddw $dst,$src\t! add packed4S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2542 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2543 __ paddw($dst$$XMMRegister, $src$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2544 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2545 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2546 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2547 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2548 instruct vadd4S_reg(vecD dst, vecD src1, vecD src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2549 predicate(UseAVX > 0 && n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2550 match(Set dst (AddVS src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2551 format %{ "vpaddw $dst,$src1,$src2\t! add packed4S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2552 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2553 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2554 __ vpaddw($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2555 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2556 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2557 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2558 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2559 instruct vadd8S(vecX dst, vecX src) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2560 predicate(n->as_Vector()->length() == 8); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2561 match(Set dst (AddVS dst src)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2562 format %{ "paddw $dst,$src\t! add packed8S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2563 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2564 __ paddw($dst$$XMMRegister, $src$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2565 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2566 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2567 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2568 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2569 instruct vadd8S_reg(vecX dst, vecX src1, vecX src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2570 predicate(UseAVX > 0 && n->as_Vector()->length() == 8); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2571 match(Set dst (AddVS src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2572 format %{ "vpaddw $dst,$src1,$src2\t! add packed8S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2573 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2574 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2575 __ vpaddw($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2576 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2577 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2578 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2579 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2580 instruct vadd8S_mem(vecX dst, vecX src, memory mem) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2581 predicate(UseAVX > 0 && n->as_Vector()->length() == 8); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2582 match(Set dst (AddVS src (LoadVector mem))); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2583 format %{ "vpaddw $dst,$src,$mem\t! add packed8S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2584 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2585 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2586 __ vpaddw($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2587 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2588 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2589 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2590 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2591 instruct vadd16S_reg(vecY dst, vecY src1, vecY src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2592 predicate(UseAVX > 1 && n->as_Vector()->length() == 16); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2593 match(Set dst (AddVS src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2594 format %{ "vpaddw $dst,$src1,$src2\t! add packed16S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2595 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2596 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2597 __ vpaddw($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2598 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2599 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2600 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2601 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2602 instruct vadd16S_mem(vecY dst, vecY src, memory mem) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2603 predicate(UseAVX > 1 && n->as_Vector()->length() == 16); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2604 match(Set dst (AddVS src (LoadVector mem))); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2605 format %{ "vpaddw $dst,$src,$mem\t! add packed16S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2606 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2607 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2608 __ vpaddw($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2609 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2610 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2611 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2612 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2613 // Integers vector add |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2614 instruct vadd2I(vecD dst, vecD src) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2615 predicate(n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2616 match(Set dst (AddVI dst src)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2617 format %{ "paddd $dst,$src\t! add packed2I" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2618 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2619 __ paddd($dst$$XMMRegister, $src$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2620 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2621 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2622 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2623 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2624 instruct vadd2I_reg(vecD dst, vecD src1, vecD src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2625 predicate(UseAVX > 0 && n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2626 match(Set dst (AddVI src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2627 format %{ "vpaddd $dst,$src1,$src2\t! add packed2I" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2628 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2629 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2630 __ vpaddd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2631 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2632 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2633 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2634 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2635 instruct vadd4I(vecX dst, vecX src) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2636 predicate(n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2637 match(Set dst (AddVI dst src)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2638 format %{ "paddd $dst,$src\t! add packed4I" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2639 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2640 __ paddd($dst$$XMMRegister, $src$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2641 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2642 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2643 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2644 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2645 instruct vadd4I_reg(vecX dst, vecX src1, vecX src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2646 predicate(UseAVX > 0 && n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2647 match(Set dst (AddVI src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2648 format %{ "vpaddd $dst,$src1,$src2\t! add packed4I" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2649 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2650 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2651 __ vpaddd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2652 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2653 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2654 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2655 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2656 instruct vadd4I_mem(vecX dst, vecX src, memory mem) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2657 predicate(UseAVX > 0 && n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2658 match(Set dst (AddVI src (LoadVector mem))); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2659 format %{ "vpaddd $dst,$src,$mem\t! add packed4I" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2660 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2661 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2662 __ vpaddd($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2663 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2664 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2665 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2666 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2667 instruct vadd8I_reg(vecY dst, vecY src1, vecY src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2668 predicate(UseAVX > 1 && n->as_Vector()->length() == 8); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2669 match(Set dst (AddVI src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2670 format %{ "vpaddd $dst,$src1,$src2\t! add packed8I" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2671 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2672 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2673 __ vpaddd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2674 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2675 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2676 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2677 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2678 instruct vadd8I_mem(vecY dst, vecY src, memory mem) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2679 predicate(UseAVX > 1 && n->as_Vector()->length() == 8); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2680 match(Set dst (AddVI src (LoadVector mem))); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2681 format %{ "vpaddd $dst,$src,$mem\t! add packed8I" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2682 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2683 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2684 __ vpaddd($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2685 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2686 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2687 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2688 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2689 // Longs vector add |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2690 instruct vadd2L(vecX dst, vecX src) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2691 predicate(n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2692 match(Set dst (AddVL dst src)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2693 format %{ "paddq $dst,$src\t! add packed2L" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2694 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2695 __ paddq($dst$$XMMRegister, $src$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2696 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2697 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2698 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2699 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2700 instruct vadd2L_reg(vecX dst, vecX src1, vecX src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2701 predicate(UseAVX > 0 && n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2702 match(Set dst (AddVL src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2703 format %{ "vpaddq $dst,$src1,$src2\t! add packed2L" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2704 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2705 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2706 __ vpaddq($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2707 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2708 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2709 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2710 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2711 instruct vadd2L_mem(vecX dst, vecX src, memory mem) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2712 predicate(UseAVX > 0 && n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2713 match(Set dst (AddVL src (LoadVector mem))); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2714 format %{ "vpaddq $dst,$src,$mem\t! add packed2L" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2715 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2716 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2717 __ vpaddq($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2718 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2719 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2720 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2721 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2722 instruct vadd4L_reg(vecY dst, vecY src1, vecY src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2723 predicate(UseAVX > 1 && n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2724 match(Set dst (AddVL src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2725 format %{ "vpaddq $dst,$src1,$src2\t! add packed4L" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2726 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2727 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2728 __ vpaddq($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2729 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2730 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2731 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2732 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2733 instruct vadd4L_mem(vecY dst, vecY src, memory mem) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2734 predicate(UseAVX > 1 && n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2735 match(Set dst (AddVL src (LoadVector mem))); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2736 format %{ "vpaddq $dst,$src,$mem\t! add packed4L" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2737 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2738 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2739 __ vpaddq($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2740 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2741 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2742 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2743 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2744 // Floats vector add |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2745 instruct vadd2F(vecD dst, vecD src) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2746 predicate(n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2747 match(Set dst (AddVF dst src)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2748 format %{ "addps $dst,$src\t! add packed2F" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2749 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2750 __ addps($dst$$XMMRegister, $src$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2751 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2752 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2753 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2754 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2755 instruct vadd2F_reg(vecD dst, vecD src1, vecD src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2756 predicate(UseAVX > 0 && n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2757 match(Set dst (AddVF src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2758 format %{ "vaddps $dst,$src1,$src2\t! add packed2F" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2759 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2760 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2761 __ vaddps($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2762 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2763 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2764 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2765 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2766 instruct vadd4F(vecX dst, vecX src) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2767 predicate(n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2768 match(Set dst (AddVF dst src)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2769 format %{ "addps $dst,$src\t! add packed4F" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2770 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2771 __ addps($dst$$XMMRegister, $src$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2772 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2773 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2774 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2775 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2776 instruct vadd4F_reg(vecX dst, vecX src1, vecX src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2777 predicate(UseAVX > 0 && n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2778 match(Set dst (AddVF src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2779 format %{ "vaddps $dst,$src1,$src2\t! add packed4F" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2780 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2781 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2782 __ vaddps($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2783 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2784 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2785 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2786 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2787 instruct vadd4F_mem(vecX dst, vecX src, memory mem) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2788 predicate(UseAVX > 0 && n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2789 match(Set dst (AddVF src (LoadVector mem))); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2790 format %{ "vaddps $dst,$src,$mem\t! add packed4F" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2791 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2792 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2793 __ vaddps($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2794 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2795 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2796 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2797 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2798 instruct vadd8F_reg(vecY dst, vecY src1, vecY src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2799 predicate(UseAVX > 0 && n->as_Vector()->length() == 8); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2800 match(Set dst (AddVF src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2801 format %{ "vaddps $dst,$src1,$src2\t! add packed8F" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2802 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2803 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2804 __ vaddps($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2805 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2806 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2807 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2808 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2809 instruct vadd8F_mem(vecY dst, vecY src, memory mem) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2810 predicate(UseAVX > 0 && n->as_Vector()->length() == 8); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2811 match(Set dst (AddVF src (LoadVector mem))); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2812 format %{ "vaddps $dst,$src,$mem\t! add packed8F" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2813 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2814 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2815 __ vaddps($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2816 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2817 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2818 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2819 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2820 // Doubles vector add |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2821 instruct vadd2D(vecX dst, vecX src) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2822 predicate(n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2823 match(Set dst (AddVD dst src)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2824 format %{ "addpd $dst,$src\t! add packed2D" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2825 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2826 __ addpd($dst$$XMMRegister, $src$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2827 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2828 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2829 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2830 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2831 instruct vadd2D_reg(vecX dst, vecX src1, vecX src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2832 predicate(UseAVX > 0 && n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2833 match(Set dst (AddVD src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2834 format %{ "vaddpd $dst,$src1,$src2\t! add packed2D" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2835 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2836 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2837 __ vaddpd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2838 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2839 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2840 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2841 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2842 instruct vadd2D_mem(vecX dst, vecX src, memory mem) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2843 predicate(UseAVX > 0 && n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2844 match(Set dst (AddVD src (LoadVector mem))); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2845 format %{ "vaddpd $dst,$src,$mem\t! add packed2D" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2846 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2847 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2848 __ vaddpd($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2849 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2850 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2851 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2852 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2853 instruct vadd4D_reg(vecY dst, vecY src1, vecY src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2854 predicate(UseAVX > 0 && n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2855 match(Set dst (AddVD src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2856 format %{ "vaddpd $dst,$src1,$src2\t! add packed4D" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2857 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2858 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2859 __ vaddpd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2860 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2861 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2862 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2863 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2864 instruct vadd4D_mem(vecY dst, vecY src, memory mem) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2865 predicate(UseAVX > 0 && n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2866 match(Set dst (AddVD src (LoadVector mem))); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2867 format %{ "vaddpd $dst,$src,$mem\t! add packed4D" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2868 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2869 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2870 __ vaddpd($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2871 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2872 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2873 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2874 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2875 // --------------------------------- SUB -------------------------------------- |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2876 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2877 // Bytes vector sub |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2878 instruct vsub4B(vecS dst, vecS src) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2879 predicate(n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2880 match(Set dst (SubVB dst src)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2881 format %{ "psubb $dst,$src\t! sub packed4B" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2882 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2883 __ psubb($dst$$XMMRegister, $src$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2884 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2885 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2886 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2887 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2888 instruct vsub4B_reg(vecS dst, vecS src1, vecS src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2889 predicate(UseAVX > 0 && n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2890 match(Set dst (SubVB src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2891 format %{ "vpsubb $dst,$src1,$src2\t! sub packed4B" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2892 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2893 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2894 __ vpsubb($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2895 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2896 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2897 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2898 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2899 instruct vsub8B(vecD dst, vecD src) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2900 predicate(n->as_Vector()->length() == 8); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2901 match(Set dst (SubVB dst src)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2902 format %{ "psubb $dst,$src\t! sub packed8B" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2903 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2904 __ psubb($dst$$XMMRegister, $src$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2905 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2906 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2907 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2908 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2909 instruct vsub8B_reg(vecD dst, vecD src1, vecD src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2910 predicate(UseAVX > 0 && n->as_Vector()->length() == 8); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2911 match(Set dst (SubVB src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2912 format %{ "vpsubb $dst,$src1,$src2\t! sub packed8B" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2913 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2914 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2915 __ vpsubb($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2916 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2917 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2918 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2919 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2920 instruct vsub16B(vecX dst, vecX src) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2921 predicate(n->as_Vector()->length() == 16); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2922 match(Set dst (SubVB dst src)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2923 format %{ "psubb $dst,$src\t! sub packed16B" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2924 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2925 __ psubb($dst$$XMMRegister, $src$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2926 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2927 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2928 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2929 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2930 instruct vsub16B_reg(vecX dst, vecX src1, vecX src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2931 predicate(UseAVX > 0 && n->as_Vector()->length() == 16); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2932 match(Set dst (SubVB src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2933 format %{ "vpsubb $dst,$src1,$src2\t! sub packed16B" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2934 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2935 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2936 __ vpsubb($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2937 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2938 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2939 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2940 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2941 instruct vsub16B_mem(vecX dst, vecX src, memory mem) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2942 predicate(UseAVX > 0 && n->as_Vector()->length() == 16); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2943 match(Set dst (SubVB src (LoadVector mem))); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2944 format %{ "vpsubb $dst,$src,$mem\t! sub packed16B" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2945 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2946 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2947 __ vpsubb($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2948 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2949 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2950 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2951 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2952 instruct vsub32B_reg(vecY dst, vecY src1, vecY src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2953 predicate(UseAVX > 1 && n->as_Vector()->length() == 32); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2954 match(Set dst (SubVB src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2955 format %{ "vpsubb $dst,$src1,$src2\t! sub packed32B" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2956 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2957 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2958 __ vpsubb($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2959 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2960 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2961 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2962 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2963 instruct vsub32B_mem(vecY dst, vecY src, memory mem) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2964 predicate(UseAVX > 1 && n->as_Vector()->length() == 32); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2965 match(Set dst (SubVB src (LoadVector mem))); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2966 format %{ "vpsubb $dst,$src,$mem\t! sub packed32B" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2967 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2968 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2969 __ vpsubb($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2970 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2971 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2972 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2973 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2974 // Shorts/Chars vector sub |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2975 instruct vsub2S(vecS dst, vecS src) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2976 predicate(n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2977 match(Set dst (SubVS dst src)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2978 format %{ "psubw $dst,$src\t! sub packed2S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2979 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2980 __ psubw($dst$$XMMRegister, $src$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2981 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2982 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2983 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2984 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2985 instruct vsub2S_reg(vecS dst, vecS src1, vecS src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2986 predicate(UseAVX > 0 && n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2987 match(Set dst (SubVS src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2988 format %{ "vpsubw $dst,$src1,$src2\t! sub packed2S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2989 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2990 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2991 __ vpsubw($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2992 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2993 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2994 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2995 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2996 instruct vsub4S(vecD dst, vecD src) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2997 predicate(n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2998 match(Set dst (SubVS dst src)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2999 format %{ "psubw $dst,$src\t! sub packed4S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3000 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3001 __ psubw($dst$$XMMRegister, $src$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3002 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3003 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3004 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3005 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3006 instruct vsub4S_reg(vecD dst, vecD src1, vecD src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3007 predicate(UseAVX > 0 && n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3008 match(Set dst (SubVS src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3009 format %{ "vpsubw $dst,$src1,$src2\t! sub packed4S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3010 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3011 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3012 __ vpsubw($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3013 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3014 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3015 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3016 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3017 instruct vsub8S(vecX dst, vecX src) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3018 predicate(n->as_Vector()->length() == 8); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3019 match(Set dst (SubVS dst src)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3020 format %{ "psubw $dst,$src\t! sub packed8S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3021 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3022 __ psubw($dst$$XMMRegister, $src$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3023 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3024 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3025 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3026 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3027 instruct vsub8S_reg(vecX dst, vecX src1, vecX src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3028 predicate(UseAVX > 0 && n->as_Vector()->length() == 8); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3029 match(Set dst (SubVS src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3030 format %{ "vpsubw $dst,$src1,$src2\t! sub packed8S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3031 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3032 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3033 __ vpsubw($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3034 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3035 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3036 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3037 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3038 instruct vsub8S_mem(vecX dst, vecX src, memory mem) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3039 predicate(UseAVX > 0 && n->as_Vector()->length() == 8); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3040 match(Set dst (SubVS src (LoadVector mem))); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3041 format %{ "vpsubw $dst,$src,$mem\t! sub packed8S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3042 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3043 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3044 __ vpsubw($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3045 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3046 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3047 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3048 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3049 instruct vsub16S_reg(vecY dst, vecY src1, vecY src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3050 predicate(UseAVX > 1 && n->as_Vector()->length() == 16); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3051 match(Set dst (SubVS src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3052 format %{ "vpsubw $dst,$src1,$src2\t! sub packed16S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3053 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3054 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3055 __ vpsubw($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3056 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3057 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3058 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3059 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3060 instruct vsub16S_mem(vecY dst, vecY src, memory mem) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3061 predicate(UseAVX > 1 && n->as_Vector()->length() == 16); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3062 match(Set dst (SubVS src (LoadVector mem))); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3063 format %{ "vpsubw $dst,$src,$mem\t! sub packed16S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3064 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3065 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3066 __ vpsubw($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3067 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3068 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3069 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3070 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3071 // Integers vector sub |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3072 instruct vsub2I(vecD dst, vecD src) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3073 predicate(n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3074 match(Set dst (SubVI dst src)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3075 format %{ "psubd $dst,$src\t! sub packed2I" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3076 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3077 __ psubd($dst$$XMMRegister, $src$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3078 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3079 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3080 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3081 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3082 instruct vsub2I_reg(vecD dst, vecD src1, vecD src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3083 predicate(UseAVX > 0 && n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3084 match(Set dst (SubVI src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3085 format %{ "vpsubd $dst,$src1,$src2\t! sub packed2I" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3086 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3087 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3088 __ vpsubd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3089 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3090 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3091 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3092 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3093 instruct vsub4I(vecX dst, vecX src) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3094 predicate(n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3095 match(Set dst (SubVI dst src)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3096 format %{ "psubd $dst,$src\t! sub packed4I" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3097 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3098 __ psubd($dst$$XMMRegister, $src$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3099 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3100 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3101 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3102 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3103 instruct vsub4I_reg(vecX dst, vecX src1, vecX src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3104 predicate(UseAVX > 0 && n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3105 match(Set dst (SubVI src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3106 format %{ "vpsubd $dst,$src1,$src2\t! sub packed4I" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3107 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3108 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3109 __ vpsubd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3110 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3111 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3112 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3113 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3114 instruct vsub4I_mem(vecX dst, vecX src, memory mem) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3115 predicate(UseAVX > 0 && n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3116 match(Set dst (SubVI src (LoadVector mem))); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3117 format %{ "vpsubd $dst,$src,$mem\t! sub packed4I" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3118 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3119 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3120 __ vpsubd($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3121 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3122 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3123 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3124 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3125 instruct vsub8I_reg(vecY dst, vecY src1, vecY src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3126 predicate(UseAVX > 1 && n->as_Vector()->length() == 8); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3127 match(Set dst (SubVI src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3128 format %{ "vpsubd $dst,$src1,$src2\t! sub packed8I" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3129 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3130 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3131 __ vpsubd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3132 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3133 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3134 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3135 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3136 instruct vsub8I_mem(vecY dst, vecY src, memory mem) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3137 predicate(UseAVX > 1 && n->as_Vector()->length() == 8); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3138 match(Set dst (SubVI src (LoadVector mem))); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3139 format %{ "vpsubd $dst,$src,$mem\t! sub packed8I" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3140 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3141 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3142 __ vpsubd($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3143 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3144 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3145 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3146 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3147 // Longs vector sub |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3148 instruct vsub2L(vecX dst, vecX src) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3149 predicate(n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3150 match(Set dst (SubVL dst src)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3151 format %{ "psubq $dst,$src\t! sub packed2L" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3152 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3153 __ psubq($dst$$XMMRegister, $src$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3154 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3155 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3156 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3157 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3158 instruct vsub2L_reg(vecX dst, vecX src1, vecX src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3159 predicate(UseAVX > 0 && n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3160 match(Set dst (SubVL src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3161 format %{ "vpsubq $dst,$src1,$src2\t! sub packed2L" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3162 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3163 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3164 __ vpsubq($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3165 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3166 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3167 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3168 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3169 instruct vsub2L_mem(vecX dst, vecX src, memory mem) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3170 predicate(UseAVX > 0 && n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3171 match(Set dst (SubVL src (LoadVector mem))); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3172 format %{ "vpsubq $dst,$src,$mem\t! sub packed2L" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3173 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3174 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3175 __ vpsubq($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3176 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3177 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3178 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3179 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3180 instruct vsub4L_reg(vecY dst, vecY src1, vecY src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3181 predicate(UseAVX > 1 && n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3182 match(Set dst (SubVL src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3183 format %{ "vpsubq $dst,$src1,$src2\t! sub packed4L" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3184 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3185 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3186 __ vpsubq($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3187 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3188 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3189 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3190 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3191 instruct vsub4L_mem(vecY dst, vecY src, memory mem) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3192 predicate(UseAVX > 1 && n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3193 match(Set dst (SubVL src (LoadVector mem))); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3194 format %{ "vpsubq $dst,$src,$mem\t! sub packed4L" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3195 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3196 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3197 __ vpsubq($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3198 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3199 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3200 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3201 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3202 // Floats vector sub |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3203 instruct vsub2F(vecD dst, vecD src) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3204 predicate(n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3205 match(Set dst (SubVF dst src)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3206 format %{ "subps $dst,$src\t! sub packed2F" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3207 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3208 __ subps($dst$$XMMRegister, $src$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3209 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3210 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3211 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3212 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3213 instruct vsub2F_reg(vecD dst, vecD src1, vecD src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3214 predicate(UseAVX > 0 && n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3215 match(Set dst (SubVF src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3216 format %{ "vsubps $dst,$src1,$src2\t! sub packed2F" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3217 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3218 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3219 __ vsubps($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3220 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3221 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3222 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3223 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3224 instruct vsub4F(vecX dst, vecX src) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3225 predicate(n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3226 match(Set dst (SubVF dst src)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3227 format %{ "subps $dst,$src\t! sub packed4F" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3228 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3229 __ subps($dst$$XMMRegister, $src$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3230 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3231 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3232 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3233 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3234 instruct vsub4F_reg(vecX dst, vecX src1, vecX src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3235 predicate(UseAVX > 0 && n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3236 match(Set dst (SubVF src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3237 format %{ "vsubps $dst,$src1,$src2\t! sub packed4F" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3238 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3239 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3240 __ vsubps($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3241 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3242 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3243 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3244 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3245 instruct vsub4F_mem(vecX dst, vecX src, memory mem) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3246 predicate(UseAVX > 0 && n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3247 match(Set dst (SubVF src (LoadVector mem))); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3248 format %{ "vsubps $dst,$src,$mem\t! sub packed4F" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3249 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3250 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3251 __ vsubps($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3252 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3253 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3254 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3255 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3256 instruct vsub8F_reg(vecY dst, vecY src1, vecY src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3257 predicate(UseAVX > 0 && n->as_Vector()->length() == 8); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3258 match(Set dst (SubVF src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3259 format %{ "vsubps $dst,$src1,$src2\t! sub packed8F" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3260 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3261 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3262 __ vsubps($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3263 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3264 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3265 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3266 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3267 instruct vsub8F_mem(vecY dst, vecY src, memory mem) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3268 predicate(UseAVX > 0 && n->as_Vector()->length() == 8); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3269 match(Set dst (SubVF src (LoadVector mem))); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3270 format %{ "vsubps $dst,$src,$mem\t! sub packed8F" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3271 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3272 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3273 __ vsubps($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3274 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3275 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3276 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3277 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3278 // Doubles vector sub |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3279 instruct vsub2D(vecX dst, vecX src) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3280 predicate(n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3281 match(Set dst (SubVD dst src)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3282 format %{ "subpd $dst,$src\t! sub packed2D" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3283 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3284 __ subpd($dst$$XMMRegister, $src$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3285 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3286 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3287 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3288 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3289 instruct vsub2D_reg(vecX dst, vecX src1, vecX src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3290 predicate(UseAVX > 0 && n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3291 match(Set dst (SubVD src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3292 format %{ "vsubpd $dst,$src1,$src2\t! sub packed2D" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3293 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3294 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3295 __ vsubpd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3296 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3297 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3298 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3299 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3300 instruct vsub2D_mem(vecX dst, vecX src, memory mem) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3301 predicate(UseAVX > 0 && n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3302 match(Set dst (SubVD src (LoadVector mem))); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3303 format %{ "vsubpd $dst,$src,$mem\t! sub packed2D" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3304 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3305 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3306 __ vsubpd($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3307 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3308 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3309 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3310 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3311 instruct vsub4D_reg(vecY dst, vecY src1, vecY src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3312 predicate(UseAVX > 0 && n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3313 match(Set dst (SubVD src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3314 format %{ "vsubpd $dst,$src1,$src2\t! sub packed4D" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3315 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3316 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3317 __ vsubpd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3318 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3319 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3320 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3321 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3322 instruct vsub4D_mem(vecY dst, vecY src, memory mem) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3323 predicate(UseAVX > 0 && n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3324 match(Set dst (SubVD src (LoadVector mem))); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3325 format %{ "vsubpd $dst,$src,$mem\t! sub packed4D" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3326 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3327 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3328 __ vsubpd($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3329 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3330 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3331 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3332 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3333 // --------------------------------- MUL -------------------------------------- |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3334 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3335 // Shorts/Chars vector mul |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3336 instruct vmul2S(vecS dst, vecS src) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3337 predicate(n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3338 match(Set dst (MulVS dst src)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3339 format %{ "pmullw $dst,$src\t! mul packed2S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3340 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3341 __ pmullw($dst$$XMMRegister, $src$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3342 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3343 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3344 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3345 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3346 instruct vmul2S_reg(vecS dst, vecS src1, vecS src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3347 predicate(UseAVX > 0 && n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3348 match(Set dst (MulVS src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3349 format %{ "vpmullw $dst,$src1,$src2\t! mul packed2S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3350 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3351 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3352 __ vpmullw($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3353 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3354 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3355 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3356 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3357 instruct vmul4S(vecD dst, vecD src) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3358 predicate(n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3359 match(Set dst (MulVS dst src)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3360 format %{ "pmullw $dst,$src\t! mul packed4S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3361 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3362 __ pmullw($dst$$XMMRegister, $src$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3363 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3364 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3365 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3366 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3367 instruct vmul4S_reg(vecD dst, vecD src1, vecD src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3368 predicate(UseAVX > 0 && n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3369 match(Set dst (MulVS src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3370 format %{ "vpmullw $dst,$src1,$src2\t! mul packed4S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3371 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3372 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3373 __ vpmullw($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3374 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3375 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3376 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3377 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3378 instruct vmul8S(vecX dst, vecX src) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3379 predicate(n->as_Vector()->length() == 8); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3380 match(Set dst (MulVS dst src)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3381 format %{ "pmullw $dst,$src\t! mul packed8S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3382 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3383 __ pmullw($dst$$XMMRegister, $src$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3384 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3385 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3386 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3387 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3388 instruct vmul8S_reg(vecX dst, vecX src1, vecX src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3389 predicate(UseAVX > 0 && n->as_Vector()->length() == 8); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3390 match(Set dst (MulVS src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3391 format %{ "vpmullw $dst,$src1,$src2\t! mul packed8S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3392 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3393 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3394 __ vpmullw($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3395 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3396 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3397 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3398 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3399 instruct vmul8S_mem(vecX dst, vecX src, memory mem) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3400 predicate(UseAVX > 0 && n->as_Vector()->length() == 8); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3401 match(Set dst (MulVS src (LoadVector mem))); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3402 format %{ "vpmullw $dst,$src,$mem\t! mul packed8S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3403 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3404 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3405 __ vpmullw($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3406 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3407 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3408 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3409 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3410 instruct vmul16S_reg(vecY dst, vecY src1, vecY src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3411 predicate(UseAVX > 1 && n->as_Vector()->length() == 16); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3412 match(Set dst (MulVS src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3413 format %{ "vpmullw $dst,$src1,$src2\t! mul packed16S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3414 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3415 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3416 __ vpmullw($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3417 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3418 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3419 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3420 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3421 instruct vmul16S_mem(vecY dst, vecY src, memory mem) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3422 predicate(UseAVX > 1 && n->as_Vector()->length() == 16); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3423 match(Set dst (MulVS src (LoadVector mem))); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3424 format %{ "vpmullw $dst,$src,$mem\t! mul packed16S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3425 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3426 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3427 __ vpmullw($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3428 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3429 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3430 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3431 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3432 // Integers vector mul (sse4_1) |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3433 instruct vmul2I(vecD dst, vecD src) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3434 predicate(UseSSE > 3 && n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3435 match(Set dst (MulVI dst src)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3436 format %{ "pmulld $dst,$src\t! mul packed2I" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3437 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3438 __ pmulld($dst$$XMMRegister, $src$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3439 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3440 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3441 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3442 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3443 instruct vmul2I_reg(vecD dst, vecD src1, vecD src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3444 predicate(UseAVX > 0 && n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3445 match(Set dst (MulVI src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3446 format %{ "vpmulld $dst,$src1,$src2\t! mul packed2I" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3447 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3448 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3449 __ vpmulld($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3450 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3451 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3452 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3453 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3454 instruct vmul4I(vecX dst, vecX src) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3455 predicate(UseSSE > 3 && n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3456 match(Set dst (MulVI dst src)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3457 format %{ "pmulld $dst,$src\t! mul packed4I" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3458 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3459 __ pmulld($dst$$XMMRegister, $src$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3460 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3461 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3462 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3463 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3464 instruct vmul4I_reg(vecX dst, vecX src1, vecX src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3465 predicate(UseAVX > 0 && n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3466 match(Set dst (MulVI src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3467 format %{ "vpmulld $dst,$src1,$src2\t! mul packed4I" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3468 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3469 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3470 __ vpmulld($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3471 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3472 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3473 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3474 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3475 instruct vmul4I_mem(vecX dst, vecX src, memory mem) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3476 predicate(UseAVX > 0 && n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3477 match(Set dst (MulVI src (LoadVector mem))); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3478 format %{ "vpmulld $dst,$src,$mem\t! mul packed4I" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3479 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3480 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3481 __ vpmulld($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3482 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3483 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3484 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3485 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3486 instruct vmul8I_reg(vecY dst, vecY src1, vecY src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3487 predicate(UseAVX > 1 && n->as_Vector()->length() == 8); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3488 match(Set dst (MulVI src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3489 format %{ "vpmulld $dst,$src1,$src2\t! mul packed8I" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3490 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3491 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3492 __ vpmulld($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3493 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3494 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3495 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3496 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3497 instruct vmul8I_mem(vecY dst, vecY src, memory mem) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3498 predicate(UseAVX > 1 && n->as_Vector()->length() == 8); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3499 match(Set dst (MulVI src (LoadVector mem))); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3500 format %{ "vpmulld $dst,$src,$mem\t! mul packed8I" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3501 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3502 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3503 __ vpmulld($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3504 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3505 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3506 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3507 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3508 // Floats vector mul |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3509 instruct vmul2F(vecD dst, vecD src) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3510 predicate(n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3511 match(Set dst (MulVF dst src)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3512 format %{ "mulps $dst,$src\t! mul packed2F" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3513 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3514 __ mulps($dst$$XMMRegister, $src$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3515 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3516 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3517 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3518 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3519 instruct vmul2F_reg(vecD dst, vecD src1, vecD src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3520 predicate(UseAVX > 0 && n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3521 match(Set dst (MulVF src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3522 format %{ "vmulps $dst,$src1,$src2\t! mul packed2F" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3523 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3524 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3525 __ vmulps($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3526 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3527 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3528 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3529 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3530 instruct vmul4F(vecX dst, vecX src) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3531 predicate(n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3532 match(Set dst (MulVF dst src)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3533 format %{ "mulps $dst,$src\t! mul packed4F" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3534 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3535 __ mulps($dst$$XMMRegister, $src$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3536 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3537 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3538 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3539 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3540 instruct vmul4F_reg(vecX dst, vecX src1, vecX src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3541 predicate(UseAVX > 0 && n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3542 match(Set dst (MulVF src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3543 format %{ "vmulps $dst,$src1,$src2\t! mul packed4F" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3544 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3545 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3546 __ vmulps($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3547 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3548 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3549 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3550 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3551 instruct vmul4F_mem(vecX dst, vecX src, memory mem) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3552 predicate(UseAVX > 0 && n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3553 match(Set dst (MulVF src (LoadVector mem))); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3554 format %{ "vmulps $dst,$src,$mem\t! mul packed4F" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3555 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3556 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3557 __ vmulps($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3558 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3559 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3560 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3561 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3562 instruct vmul8F_reg(vecY dst, vecY src1, vecY src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3563 predicate(UseAVX > 0 && n->as_Vector()->length() == 8); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3564 match(Set dst (MulVF src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3565 format %{ "vmulps $dst,$src1,$src2\t! mul packed8F" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3566 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3567 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3568 __ vmulps($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3569 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3570 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3571 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3572 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3573 instruct vmul8F_mem(vecY dst, vecY src, memory mem) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3574 predicate(UseAVX > 0 && n->as_Vector()->length() == 8); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3575 match(Set dst (MulVF src (LoadVector mem))); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3576 format %{ "vmulps $dst,$src,$mem\t! mul packed8F" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3577 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3578 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3579 __ vmulps($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3580 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3581 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3582 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3583 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3584 // Doubles vector mul |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3585 instruct vmul2D(vecX dst, vecX src) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3586 predicate(n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3587 match(Set dst (MulVD dst src)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3588 format %{ "mulpd $dst,$src\t! mul packed2D" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3589 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3590 __ mulpd($dst$$XMMRegister, $src$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3591 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3592 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3593 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3594 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3595 instruct vmul2D_reg(vecX dst, vecX src1, vecX src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3596 predicate(UseAVX > 0 && n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3597 match(Set dst (MulVD src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3598 format %{ "vmulpd $dst,$src1,$src2\t! mul packed2D" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3599 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3600 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3601 __ vmulpd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3602 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3603 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3604 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3605 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3606 instruct vmul2D_mem(vecX dst, vecX src, memory mem) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3607 predicate(UseAVX > 0 && n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3608 match(Set dst (MulVD src (LoadVector mem))); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3609 format %{ "vmulpd $dst,$src,$mem\t! mul packed2D" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3610 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3611 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3612 __ vmulpd($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3613 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3614 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3615 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3616 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3617 instruct vmul4D_reg(vecY dst, vecY src1, vecY src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3618 predicate(UseAVX > 0 && n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3619 match(Set dst (MulVD src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3620 format %{ "vmulpd $dst,$src1,$src2\t! mul packed4D" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3621 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3622 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3623 __ vmulpd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3624 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3625 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3626 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3627 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3628 instruct vmul4D_mem(vecY dst, vecY src, memory mem) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3629 predicate(UseAVX > 0 && n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3630 match(Set dst (MulVD src (LoadVector mem))); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3631 format %{ "vmulpd $dst,$src,$mem\t! mul packed4D" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3632 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3633 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3634 __ vmulpd($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3635 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3636 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3637 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3638 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3639 // --------------------------------- DIV -------------------------------------- |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3640 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3641 // Floats vector div |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3642 instruct vdiv2F(vecD dst, vecD src) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3643 predicate(n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3644 match(Set dst (DivVF dst src)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3645 format %{ "divps $dst,$src\t! div packed2F" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3646 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3647 __ divps($dst$$XMMRegister, $src$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3648 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3649 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3650 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3651 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3652 instruct vdiv2F_reg(vecD dst, vecD src1, vecD src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3653 predicate(UseAVX > 0 && n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3654 match(Set dst (DivVF src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3655 format %{ "vdivps $dst,$src1,$src2\t! div packed2F" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3656 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3657 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3658 __ vdivps($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3659 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3660 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3661 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3662 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3663 instruct vdiv4F(vecX dst, vecX src) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3664 predicate(n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3665 match(Set dst (DivVF dst src)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3666 format %{ "divps $dst,$src\t! div packed4F" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3667 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3668 __ divps($dst$$XMMRegister, $src$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3669 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3670 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3671 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3672 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3673 instruct vdiv4F_reg(vecX dst, vecX src1, vecX src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3674 predicate(UseAVX > 0 && n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3675 match(Set dst (DivVF src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3676 format %{ "vdivps $dst,$src1,$src2\t! div packed4F" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3677 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3678 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3679 __ vdivps($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3680 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3681 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3682 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3683 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3684 instruct vdiv4F_mem(vecX dst, vecX src, memory mem) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3685 predicate(UseAVX > 0 && n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3686 match(Set dst (DivVF src (LoadVector mem))); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3687 format %{ "vdivps $dst,$src,$mem\t! div packed4F" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3688 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3689 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3690 __ vdivps($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3691 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3692 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3693 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3694 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3695 instruct vdiv8F_reg(vecY dst, vecY src1, vecY src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3696 predicate(UseAVX > 0 && n->as_Vector()->length() == 8); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3697 match(Set dst (DivVF src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3698 format %{ "vdivps $dst,$src1,$src2\t! div packed8F" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3699 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3700 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3701 __ vdivps($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3702 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3703 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3704 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3705 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3706 instruct vdiv8F_mem(vecY dst, vecY src, memory mem) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3707 predicate(UseAVX > 0 && n->as_Vector()->length() == 8); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3708 match(Set dst (DivVF src (LoadVector mem))); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3709 format %{ "vdivps $dst,$src,$mem\t! div packed8F" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3710 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3711 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3712 __ vdivps($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3713 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3714 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3715 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3716 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3717 // Doubles vector div |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3718 instruct vdiv2D(vecX dst, vecX src) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3719 predicate(n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3720 match(Set dst (DivVD dst src)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3721 format %{ "divpd $dst,$src\t! div packed2D" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3722 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3723 __ divpd($dst$$XMMRegister, $src$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3724 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3725 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3726 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3727 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3728 instruct vdiv2D_reg(vecX dst, vecX src1, vecX src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3729 predicate(UseAVX > 0 && n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3730 match(Set dst (DivVD src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3731 format %{ "vdivpd $dst,$src1,$src2\t! div packed2D" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3732 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3733 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3734 __ vdivpd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3735 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3736 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3737 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
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parents:
6225
diff
changeset
|
3738 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3739 instruct vdiv2D_mem(vecX dst, vecX src, memory mem) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3740 predicate(UseAVX > 0 && n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3741 match(Set dst (DivVD src (LoadVector mem))); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3742 format %{ "vdivpd $dst,$src,$mem\t! div packed2D" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3743 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3744 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3745 __ vdivpd($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3746 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3747 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3748 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3749 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3750 instruct vdiv4D_reg(vecY dst, vecY src1, vecY src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3751 predicate(UseAVX > 0 && n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3752 match(Set dst (DivVD src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3753 format %{ "vdivpd $dst,$src1,$src2\t! div packed4D" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3754 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3755 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3756 __ vdivpd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3757 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3758 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3759 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3760 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3761 instruct vdiv4D_mem(vecY dst, vecY src, memory mem) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3762 predicate(UseAVX > 0 && n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3763 match(Set dst (DivVD src (LoadVector mem))); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3764 format %{ "vdivpd $dst,$src,$mem\t! div packed4D" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3765 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3766 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3767 __ vdivpd($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3768 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3769 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3770 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3771 |
6823 | 3772 // ------------------------------ Shift --------------------------------------- |
3773 | |
3774 // Left and right shift count vectors are the same on x86 | |
3775 // (only lowest bits of xmm reg are used for count). | |
3776 instruct vshiftcnt(vecS dst, rRegI cnt) %{ | |
3777 match(Set dst (LShiftCntV cnt)); | |
3778 match(Set dst (RShiftCntV cnt)); | |
3779 format %{ "movd $dst,$cnt\t! load shift count" %} | |
3780 ins_encode %{ | |
3781 __ movdl($dst$$XMMRegister, $cnt$$Register); | |
3782 %} | |
3783 ins_pipe( pipe_slow ); | |
3784 %} | |
3785 | |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
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diff
changeset
|
3786 // ------------------------------ LeftShift ----------------------------------- |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3787 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3788 // Shorts/Chars vector left shift |
6823 | 3789 instruct vsll2S(vecS dst, vecS shift) %{ |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3790 predicate(n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3791 match(Set dst (LShiftVS dst shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3792 format %{ "psllw $dst,$shift\t! left shift packed2S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3793 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3794 __ psllw($dst$$XMMRegister, $shift$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3795 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3796 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3797 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3798 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3799 instruct vsll2S_imm(vecS dst, immI8 shift) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3800 predicate(n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3801 match(Set dst (LShiftVS dst shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3802 format %{ "psllw $dst,$shift\t! left shift packed2S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3803 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3804 __ psllw($dst$$XMMRegister, (int)$shift$$constant); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3805 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3806 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3807 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3808 |
6823 | 3809 instruct vsll2S_reg(vecS dst, vecS src, vecS shift) %{ |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3810 predicate(UseAVX > 0 && n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3811 match(Set dst (LShiftVS src shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3812 format %{ "vpsllw $dst,$src,$shift\t! left shift packed2S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3813 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3814 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3815 __ vpsllw($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3816 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3817 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3818 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3819 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3820 instruct vsll2S_reg_imm(vecS dst, vecS src, immI8 shift) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3821 predicate(UseAVX > 0 && n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3822 match(Set dst (LShiftVS src shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3823 format %{ "vpsllw $dst,$src,$shift\t! left shift packed2S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3824 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3825 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3826 __ vpsllw($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3827 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3828 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3829 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3830 |
6823 | 3831 instruct vsll4S(vecD dst, vecS shift) %{ |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3832 predicate(n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3833 match(Set dst (LShiftVS dst shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3834 format %{ "psllw $dst,$shift\t! left shift packed4S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3835 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3836 __ psllw($dst$$XMMRegister, $shift$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3837 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3838 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3839 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3840 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3841 instruct vsll4S_imm(vecD dst, immI8 shift) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3842 predicate(n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3843 match(Set dst (LShiftVS dst shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3844 format %{ "psllw $dst,$shift\t! left shift packed4S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3845 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3846 __ psllw($dst$$XMMRegister, (int)$shift$$constant); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3847 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3848 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3849 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3850 |
6823 | 3851 instruct vsll4S_reg(vecD dst, vecD src, vecS shift) %{ |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3852 predicate(UseAVX > 0 && n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3853 match(Set dst (LShiftVS src shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3854 format %{ "vpsllw $dst,$src,$shift\t! left shift packed4S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3855 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3856 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3857 __ vpsllw($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3858 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3859 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3860 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3861 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3862 instruct vsll4S_reg_imm(vecD dst, vecD src, immI8 shift) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3863 predicate(UseAVX > 0 && n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3864 match(Set dst (LShiftVS src shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3865 format %{ "vpsllw $dst,$src,$shift\t! left shift packed4S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3866 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3867 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3868 __ vpsllw($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3869 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3870 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3871 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3872 |
6823 | 3873 instruct vsll8S(vecX dst, vecS shift) %{ |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3874 predicate(n->as_Vector()->length() == 8); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3875 match(Set dst (LShiftVS dst shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3876 format %{ "psllw $dst,$shift\t! left shift packed8S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3877 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3878 __ psllw($dst$$XMMRegister, $shift$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3879 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3880 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3881 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3882 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3883 instruct vsll8S_imm(vecX dst, immI8 shift) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3884 predicate(n->as_Vector()->length() == 8); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3885 match(Set dst (LShiftVS dst shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3886 format %{ "psllw $dst,$shift\t! left shift packed8S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3887 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3888 __ psllw($dst$$XMMRegister, (int)$shift$$constant); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3889 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3890 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3891 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3892 |
6823 | 3893 instruct vsll8S_reg(vecX dst, vecX src, vecS shift) %{ |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3894 predicate(UseAVX > 0 && n->as_Vector()->length() == 8); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3895 match(Set dst (LShiftVS src shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3896 format %{ "vpsllw $dst,$src,$shift\t! left shift packed8S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3897 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3898 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3899 __ vpsllw($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3900 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3901 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3902 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3903 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3904 instruct vsll8S_reg_imm(vecX dst, vecX src, immI8 shift) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3905 predicate(UseAVX > 0 && n->as_Vector()->length() == 8); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3906 match(Set dst (LShiftVS src shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3907 format %{ "vpsllw $dst,$src,$shift\t! left shift packed8S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3908 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3909 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3910 __ vpsllw($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3911 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3912 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3913 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3914 |
6823 | 3915 instruct vsll16S_reg(vecY dst, vecY src, vecS shift) %{ |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3916 predicate(UseAVX > 1 && n->as_Vector()->length() == 16); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3917 match(Set dst (LShiftVS src shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3918 format %{ "vpsllw $dst,$src,$shift\t! left shift packed16S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3919 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3920 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3921 __ vpsllw($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3922 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3923 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3924 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3925 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3926 instruct vsll16S_reg_imm(vecY dst, vecY src, immI8 shift) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3927 predicate(UseAVX > 1 && n->as_Vector()->length() == 16); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3928 match(Set dst (LShiftVS src shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3929 format %{ "vpsllw $dst,$src,$shift\t! left shift packed16S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3930 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3931 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3932 __ vpsllw($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3933 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3934 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3935 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3936 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3937 // Integers vector left shift |
6823 | 3938 instruct vsll2I(vecD dst, vecS shift) %{ |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3939 predicate(n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3940 match(Set dst (LShiftVI dst shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3941 format %{ "pslld $dst,$shift\t! left shift packed2I" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3942 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3943 __ pslld($dst$$XMMRegister, $shift$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3944 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3945 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3946 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3947 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3948 instruct vsll2I_imm(vecD dst, immI8 shift) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3949 predicate(n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3950 match(Set dst (LShiftVI dst shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3951 format %{ "pslld $dst,$shift\t! left shift packed2I" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3952 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3953 __ pslld($dst$$XMMRegister, (int)$shift$$constant); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3954 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3955 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3956 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3957 |
6823 | 3958 instruct vsll2I_reg(vecD dst, vecD src, vecS shift) %{ |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3959 predicate(UseAVX > 0 && n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3960 match(Set dst (LShiftVI src shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3961 format %{ "vpslld $dst,$src,$shift\t! left shift packed2I" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3962 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3963 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3964 __ vpslld($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3965 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3966 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3967 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3968 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3969 instruct vsll2I_reg_imm(vecD dst, vecD src, immI8 shift) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3970 predicate(UseAVX > 0 && n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3971 match(Set dst (LShiftVI src shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3972 format %{ "vpslld $dst,$src,$shift\t! left shift packed2I" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3973 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3974 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3975 __ vpslld($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3976 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3977 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3978 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3979 |
6823 | 3980 instruct vsll4I(vecX dst, vecS shift) %{ |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3981 predicate(n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3982 match(Set dst (LShiftVI dst shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3983 format %{ "pslld $dst,$shift\t! left shift packed4I" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3984 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3985 __ pslld($dst$$XMMRegister, $shift$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3986 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3987 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3988 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3989 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3990 instruct vsll4I_imm(vecX dst, immI8 shift) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3991 predicate(n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3992 match(Set dst (LShiftVI dst shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3993 format %{ "pslld $dst,$shift\t! left shift packed4I" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3994 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3995 __ pslld($dst$$XMMRegister, (int)$shift$$constant); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3996 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3997 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3998 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3999 |
6823 | 4000 instruct vsll4I_reg(vecX dst, vecX src, vecS shift) %{ |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4001 predicate(UseAVX > 0 && n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4002 match(Set dst (LShiftVI src shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4003 format %{ "vpslld $dst,$src,$shift\t! left shift packed4I" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4004 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4005 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4006 __ vpslld($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4007 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4008 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4009 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4010 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4011 instruct vsll4I_reg_imm(vecX dst, vecX src, immI8 shift) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4012 predicate(UseAVX > 0 && n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4013 match(Set dst (LShiftVI src shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4014 format %{ "vpslld $dst,$src,$shift\t! left shift packed4I" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4015 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4016 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4017 __ vpslld($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4018 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4019 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4020 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4021 |
6823 | 4022 instruct vsll8I_reg(vecY dst, vecY src, vecS shift) %{ |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4023 predicate(UseAVX > 1 && n->as_Vector()->length() == 8); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4024 match(Set dst (LShiftVI src shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4025 format %{ "vpslld $dst,$src,$shift\t! left shift packed8I" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4026 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4027 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4028 __ vpslld($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4029 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4030 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4031 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4032 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4033 instruct vsll8I_reg_imm(vecY dst, vecY src, immI8 shift) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4034 predicate(UseAVX > 1 && n->as_Vector()->length() == 8); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4035 match(Set dst (LShiftVI src shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4036 format %{ "vpslld $dst,$src,$shift\t! left shift packed8I" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4037 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4038 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4039 __ vpslld($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4040 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4041 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4042 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4043 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4044 // Longs vector left shift |
6823 | 4045 instruct vsll2L(vecX dst, vecS shift) %{ |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4046 predicate(n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4047 match(Set dst (LShiftVL dst shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4048 format %{ "psllq $dst,$shift\t! left shift packed2L" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4049 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4050 __ psllq($dst$$XMMRegister, $shift$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4051 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4052 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4053 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4054 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4055 instruct vsll2L_imm(vecX dst, immI8 shift) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4056 predicate(n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4057 match(Set dst (LShiftVL dst shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4058 format %{ "psllq $dst,$shift\t! left shift packed2L" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4059 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4060 __ psllq($dst$$XMMRegister, (int)$shift$$constant); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4061 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4062 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4063 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4064 |
6823 | 4065 instruct vsll2L_reg(vecX dst, vecX src, vecS shift) %{ |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4066 predicate(UseAVX > 0 && n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4067 match(Set dst (LShiftVL src shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4068 format %{ "vpsllq $dst,$src,$shift\t! left shift packed2L" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4069 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4070 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4071 __ vpsllq($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4072 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4073 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4074 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4075 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4076 instruct vsll2L_reg_imm(vecX dst, vecX src, immI8 shift) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4077 predicate(UseAVX > 0 && n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4078 match(Set dst (LShiftVL src shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4079 format %{ "vpsllq $dst,$src,$shift\t! left shift packed2L" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4080 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4081 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4082 __ vpsllq($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4083 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4084 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4085 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4086 |
6823 | 4087 instruct vsll4L_reg(vecY dst, vecY src, vecS shift) %{ |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4088 predicate(UseAVX > 1 && n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4089 match(Set dst (LShiftVL src shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4090 format %{ "vpsllq $dst,$src,$shift\t! left shift packed4L" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4091 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4092 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4093 __ vpsllq($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4094 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4095 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4096 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4097 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4098 instruct vsll4L_reg_imm(vecY dst, vecY src, immI8 shift) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4099 predicate(UseAVX > 1 && n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4100 match(Set dst (LShiftVL src shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4101 format %{ "vpsllq $dst,$src,$shift\t! left shift packed4L" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4102 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4103 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4104 __ vpsllq($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4105 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4106 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4107 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4108 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4109 // ----------------------- LogicalRightShift ----------------------------------- |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4110 |
6893
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4111 // Shorts vector logical right shift produces incorrect Java result |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4112 // for negative data because java code convert short value into int with |
6893
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4113 // sign extension before a shift. But char vectors are fine since chars are |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4114 // unsigned values. |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4115 |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4116 instruct vsrl2S(vecS dst, vecS shift) %{ |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4117 predicate(n->as_Vector()->length() == 2); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4118 match(Set dst (URShiftVS dst shift)); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4119 format %{ "psrlw $dst,$shift\t! logical right shift packed2S" %} |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4120 ins_encode %{ |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4121 __ psrlw($dst$$XMMRegister, $shift$$XMMRegister); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4122 %} |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4123 ins_pipe( pipe_slow ); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4124 %} |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4125 |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4126 instruct vsrl2S_imm(vecS dst, immI8 shift) %{ |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4127 predicate(n->as_Vector()->length() == 2); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4128 match(Set dst (URShiftVS dst shift)); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4129 format %{ "psrlw $dst,$shift\t! logical right shift packed2S" %} |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4130 ins_encode %{ |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4131 __ psrlw($dst$$XMMRegister, (int)$shift$$constant); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4132 %} |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4133 ins_pipe( pipe_slow ); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4134 %} |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4135 |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4136 instruct vsrl2S_reg(vecS dst, vecS src, vecS shift) %{ |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4137 predicate(UseAVX > 0 && n->as_Vector()->length() == 2); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4138 match(Set dst (URShiftVS src shift)); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4139 format %{ "vpsrlw $dst,$src,$shift\t! logical right shift packed2S" %} |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4140 ins_encode %{ |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4141 bool vector256 = false; |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4142 __ vpsrlw($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4143 %} |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4144 ins_pipe( pipe_slow ); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4145 %} |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4146 |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4147 instruct vsrl2S_reg_imm(vecS dst, vecS src, immI8 shift) %{ |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4148 predicate(UseAVX > 0 && n->as_Vector()->length() == 2); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4149 match(Set dst (URShiftVS src shift)); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4150 format %{ "vpsrlw $dst,$src,$shift\t! logical right shift packed2S" %} |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4151 ins_encode %{ |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4152 bool vector256 = false; |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4153 __ vpsrlw($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4154 %} |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4155 ins_pipe( pipe_slow ); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4156 %} |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4157 |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4158 instruct vsrl4S(vecD dst, vecS shift) %{ |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4159 predicate(n->as_Vector()->length() == 4); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4160 match(Set dst (URShiftVS dst shift)); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4161 format %{ "psrlw $dst,$shift\t! logical right shift packed4S" %} |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4162 ins_encode %{ |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4163 __ psrlw($dst$$XMMRegister, $shift$$XMMRegister); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4164 %} |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4165 ins_pipe( pipe_slow ); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4166 %} |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4167 |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4168 instruct vsrl4S_imm(vecD dst, immI8 shift) %{ |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4169 predicate(n->as_Vector()->length() == 4); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4170 match(Set dst (URShiftVS dst shift)); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4171 format %{ "psrlw $dst,$shift\t! logical right shift packed4S" %} |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4172 ins_encode %{ |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4173 __ psrlw($dst$$XMMRegister, (int)$shift$$constant); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4174 %} |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4175 ins_pipe( pipe_slow ); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4176 %} |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4177 |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4178 instruct vsrl4S_reg(vecD dst, vecD src, vecS shift) %{ |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4179 predicate(UseAVX > 0 && n->as_Vector()->length() == 4); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4180 match(Set dst (URShiftVS src shift)); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4181 format %{ "vpsrlw $dst,$src,$shift\t! logical right shift packed4S" %} |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4182 ins_encode %{ |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4183 bool vector256 = false; |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4184 __ vpsrlw($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4185 %} |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4186 ins_pipe( pipe_slow ); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4187 %} |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4188 |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4189 instruct vsrl4S_reg_imm(vecD dst, vecD src, immI8 shift) %{ |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4190 predicate(UseAVX > 0 && n->as_Vector()->length() == 4); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4191 match(Set dst (URShiftVS src shift)); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4192 format %{ "vpsrlw $dst,$src,$shift\t! logical right shift packed4S" %} |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4193 ins_encode %{ |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4194 bool vector256 = false; |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4195 __ vpsrlw($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4196 %} |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4197 ins_pipe( pipe_slow ); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4198 %} |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4199 |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4200 instruct vsrl8S(vecX dst, vecS shift) %{ |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4201 predicate(n->as_Vector()->length() == 8); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4202 match(Set dst (URShiftVS dst shift)); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4203 format %{ "psrlw $dst,$shift\t! logical right shift packed8S" %} |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4204 ins_encode %{ |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4205 __ psrlw($dst$$XMMRegister, $shift$$XMMRegister); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4206 %} |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4207 ins_pipe( pipe_slow ); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4208 %} |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4209 |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4210 instruct vsrl8S_imm(vecX dst, immI8 shift) %{ |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4211 predicate(n->as_Vector()->length() == 8); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4212 match(Set dst (URShiftVS dst shift)); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4213 format %{ "psrlw $dst,$shift\t! logical right shift packed8S" %} |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4214 ins_encode %{ |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4215 __ psrlw($dst$$XMMRegister, (int)$shift$$constant); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4216 %} |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4217 ins_pipe( pipe_slow ); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4218 %} |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4219 |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4220 instruct vsrl8S_reg(vecX dst, vecX src, vecS shift) %{ |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4221 predicate(UseAVX > 0 && n->as_Vector()->length() == 8); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4222 match(Set dst (URShiftVS src shift)); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4223 format %{ "vpsrlw $dst,$src,$shift\t! logical right shift packed8S" %} |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4224 ins_encode %{ |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4225 bool vector256 = false; |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4226 __ vpsrlw($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4227 %} |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4228 ins_pipe( pipe_slow ); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4229 %} |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4230 |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4231 instruct vsrl8S_reg_imm(vecX dst, vecX src, immI8 shift) %{ |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4232 predicate(UseAVX > 0 && n->as_Vector()->length() == 8); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4233 match(Set dst (URShiftVS src shift)); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4234 format %{ "vpsrlw $dst,$src,$shift\t! logical right shift packed8S" %} |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4235 ins_encode %{ |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4236 bool vector256 = false; |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4237 __ vpsrlw($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4238 %} |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4239 ins_pipe( pipe_slow ); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4240 %} |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4241 |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4242 instruct vsrl16S_reg(vecY dst, vecY src, vecS shift) %{ |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4243 predicate(UseAVX > 1 && n->as_Vector()->length() == 16); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4244 match(Set dst (URShiftVS src shift)); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4245 format %{ "vpsrlw $dst,$src,$shift\t! logical right shift packed16S" %} |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4246 ins_encode %{ |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4247 bool vector256 = true; |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4248 __ vpsrlw($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4249 %} |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4250 ins_pipe( pipe_slow ); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4251 %} |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4252 |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4253 instruct vsrl16S_reg_imm(vecY dst, vecY src, immI8 shift) %{ |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4254 predicate(UseAVX > 1 && n->as_Vector()->length() == 16); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4255 match(Set dst (URShiftVS src shift)); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4256 format %{ "vpsrlw $dst,$src,$shift\t! logical right shift packed16S" %} |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4257 ins_encode %{ |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4258 bool vector256 = true; |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4259 __ vpsrlw($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4260 %} |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4261 ins_pipe( pipe_slow ); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4262 %} |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4263 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4264 // Integers vector logical right shift |
6823 | 4265 instruct vsrl2I(vecD dst, vecS shift) %{ |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4266 predicate(n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4267 match(Set dst (URShiftVI dst shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4268 format %{ "psrld $dst,$shift\t! logical right shift packed2I" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4269 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4270 __ psrld($dst$$XMMRegister, $shift$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4271 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4272 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4273 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4274 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4275 instruct vsrl2I_imm(vecD dst, immI8 shift) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4276 predicate(n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4277 match(Set dst (URShiftVI dst shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4278 format %{ "psrld $dst,$shift\t! logical right shift packed2I" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4279 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4280 __ psrld($dst$$XMMRegister, (int)$shift$$constant); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4281 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4282 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4283 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4284 |
6823 | 4285 instruct vsrl2I_reg(vecD dst, vecD src, vecS shift) %{ |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4286 predicate(UseAVX > 0 && n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4287 match(Set dst (URShiftVI src shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4288 format %{ "vpsrld $dst,$src,$shift\t! logical right shift packed2I" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4289 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4290 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4291 __ vpsrld($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4292 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4293 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4294 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4295 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4296 instruct vsrl2I_reg_imm(vecD dst, vecD src, immI8 shift) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4297 predicate(UseAVX > 0 && n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4298 match(Set dst (URShiftVI src shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4299 format %{ "vpsrld $dst,$src,$shift\t! logical right shift packed2I" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4300 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4301 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4302 __ vpsrld($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4303 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4304 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4305 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4306 |
6823 | 4307 instruct vsrl4I(vecX dst, vecS shift) %{ |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4308 predicate(n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4309 match(Set dst (URShiftVI dst shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4310 format %{ "psrld $dst,$shift\t! logical right shift packed4I" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4311 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4312 __ psrld($dst$$XMMRegister, $shift$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4313 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4314 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4315 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4316 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4317 instruct vsrl4I_imm(vecX dst, immI8 shift) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4318 predicate(n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4319 match(Set dst (URShiftVI dst shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4320 format %{ "psrld $dst,$shift\t! logical right shift packed4I" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4321 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4322 __ psrld($dst$$XMMRegister, (int)$shift$$constant); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4323 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4324 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4325 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4326 |
6823 | 4327 instruct vsrl4I_reg(vecX dst, vecX src, vecS shift) %{ |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4328 predicate(UseAVX > 0 && n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4329 match(Set dst (URShiftVI src shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4330 format %{ "vpsrld $dst,$src,$shift\t! logical right shift packed4I" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4331 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4332 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4333 __ vpsrld($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4334 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4335 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4336 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4337 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4338 instruct vsrl4I_reg_imm(vecX dst, vecX src, immI8 shift) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4339 predicate(UseAVX > 0 && n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4340 match(Set dst (URShiftVI src shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4341 format %{ "vpsrld $dst,$src,$shift\t! logical right shift packed4I" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4342 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4343 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4344 __ vpsrld($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4345 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4346 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4347 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4348 |
6823 | 4349 instruct vsrl8I_reg(vecY dst, vecY src, vecS shift) %{ |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4350 predicate(UseAVX > 1 && n->as_Vector()->length() == 8); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4351 match(Set dst (URShiftVI src shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4352 format %{ "vpsrld $dst,$src,$shift\t! logical right shift packed8I" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4353 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4354 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4355 __ vpsrld($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4356 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4357 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4358 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4359 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4360 instruct vsrl8I_reg_imm(vecY dst, vecY src, immI8 shift) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4361 predicate(UseAVX > 1 && n->as_Vector()->length() == 8); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4362 match(Set dst (URShiftVI src shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4363 format %{ "vpsrld $dst,$src,$shift\t! logical right shift packed8I" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4364 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4365 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4366 __ vpsrld($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4367 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4368 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4369 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4370 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4371 // Longs vector logical right shift |
6823 | 4372 instruct vsrl2L(vecX dst, vecS shift) %{ |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4373 predicate(n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4374 match(Set dst (URShiftVL dst shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4375 format %{ "psrlq $dst,$shift\t! logical right shift packed2L" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4376 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4377 __ psrlq($dst$$XMMRegister, $shift$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4378 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4379 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4380 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4381 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4382 instruct vsrl2L_imm(vecX dst, immI8 shift) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4383 predicate(n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4384 match(Set dst (URShiftVL dst shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4385 format %{ "psrlq $dst,$shift\t! logical right shift packed2L" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4386 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4387 __ psrlq($dst$$XMMRegister, (int)$shift$$constant); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4388 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4389 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4390 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4391 |
6823 | 4392 instruct vsrl2L_reg(vecX dst, vecX src, vecS shift) %{ |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4393 predicate(UseAVX > 0 && n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4394 match(Set dst (URShiftVL src shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4395 format %{ "vpsrlq $dst,$src,$shift\t! logical right shift packed2L" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4396 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4397 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4398 __ vpsrlq($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4399 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4400 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4401 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4402 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4403 instruct vsrl2L_reg_imm(vecX dst, vecX src, immI8 shift) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4404 predicate(UseAVX > 0 && n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4405 match(Set dst (URShiftVL src shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4406 format %{ "vpsrlq $dst,$src,$shift\t! logical right shift packed2L" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4407 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4408 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4409 __ vpsrlq($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4410 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4411 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4412 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4413 |
6823 | 4414 instruct vsrl4L_reg(vecY dst, vecY src, vecS shift) %{ |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4415 predicate(UseAVX > 1 && n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4416 match(Set dst (URShiftVL src shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4417 format %{ "vpsrlq $dst,$src,$shift\t! logical right shift packed4L" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4418 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4419 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4420 __ vpsrlq($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4421 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4422 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4423 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4424 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4425 instruct vsrl4L_reg_imm(vecY dst, vecY src, immI8 shift) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4426 predicate(UseAVX > 1 && n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4427 match(Set dst (URShiftVL src shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4428 format %{ "vpsrlq $dst,$src,$shift\t! logical right shift packed4L" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4429 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4430 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4431 __ vpsrlq($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4432 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4433 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4434 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4435 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4436 // ------------------- ArithmeticRightShift ----------------------------------- |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4437 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4438 // Shorts/Chars vector arithmetic right shift |
6823 | 4439 instruct vsra2S(vecS dst, vecS shift) %{ |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4440 predicate(n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4441 match(Set dst (RShiftVS dst shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4442 format %{ "psraw $dst,$shift\t! arithmetic right shift packed2S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4443 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4444 __ psraw($dst$$XMMRegister, $shift$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4445 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4446 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4447 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4448 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4449 instruct vsra2S_imm(vecS dst, immI8 shift) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4450 predicate(n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4451 match(Set dst (RShiftVS dst shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4452 format %{ "psraw $dst,$shift\t! arithmetic right shift packed2S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4453 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4454 __ psraw($dst$$XMMRegister, (int)$shift$$constant); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4455 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4456 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4457 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4458 |
6823 | 4459 instruct vsra2S_reg(vecS dst, vecS src, vecS shift) %{ |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4460 predicate(UseAVX > 0 && n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4461 match(Set dst (RShiftVS src shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4462 format %{ "vpsraw $dst,$src,$shift\t! arithmetic right shift packed2S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4463 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4464 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4465 __ vpsraw($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4466 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4467 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4468 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4469 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4470 instruct vsra2S_reg_imm(vecS dst, vecS src, immI8 shift) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4471 predicate(UseAVX > 0 && n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4472 match(Set dst (RShiftVS src shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4473 format %{ "vpsraw $dst,$src,$shift\t! arithmetic right shift packed2S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4474 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4475 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4476 __ vpsraw($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4477 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4478 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4479 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4480 |
6823 | 4481 instruct vsra4S(vecD dst, vecS shift) %{ |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4482 predicate(n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4483 match(Set dst (RShiftVS dst shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4484 format %{ "psraw $dst,$shift\t! arithmetic right shift packed4S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4485 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4486 __ psraw($dst$$XMMRegister, $shift$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4487 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4488 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4489 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4490 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4491 instruct vsra4S_imm(vecD dst, immI8 shift) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4492 predicate(n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4493 match(Set dst (RShiftVS dst shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4494 format %{ "psraw $dst,$shift\t! arithmetic right shift packed4S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4495 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4496 __ psraw($dst$$XMMRegister, (int)$shift$$constant); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4497 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4498 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4499 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4500 |
6823 | 4501 instruct vsra4S_reg(vecD dst, vecD src, vecS shift) %{ |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4502 predicate(UseAVX > 0 && n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4503 match(Set dst (RShiftVS src shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4504 format %{ "vpsraw $dst,$src,$shift\t! arithmetic right shift packed4S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4505 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4506 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4507 __ vpsraw($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4508 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4509 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4510 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4511 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4512 instruct vsra4S_reg_imm(vecD dst, vecD src, immI8 shift) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4513 predicate(UseAVX > 0 && n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4514 match(Set dst (RShiftVS src shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4515 format %{ "vpsraw $dst,$src,$shift\t! arithmetic right shift packed4S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4516 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4517 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4518 __ vpsraw($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4519 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4520 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4521 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4522 |
6823 | 4523 instruct vsra8S(vecX dst, vecS shift) %{ |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4524 predicate(n->as_Vector()->length() == 8); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4525 match(Set dst (RShiftVS dst shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4526 format %{ "psraw $dst,$shift\t! arithmetic right shift packed8S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4527 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4528 __ psraw($dst$$XMMRegister, $shift$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4529 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4530 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4531 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4532 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4533 instruct vsra8S_imm(vecX dst, immI8 shift) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4534 predicate(n->as_Vector()->length() == 8); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4535 match(Set dst (RShiftVS dst shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4536 format %{ "psraw $dst,$shift\t! arithmetic right shift packed8S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4537 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4538 __ psraw($dst$$XMMRegister, (int)$shift$$constant); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4539 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4540 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4541 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4542 |
6823 | 4543 instruct vsra8S_reg(vecX dst, vecX src, vecS shift) %{ |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4544 predicate(UseAVX > 0 && n->as_Vector()->length() == 8); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4545 match(Set dst (RShiftVS src shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4546 format %{ "vpsraw $dst,$src,$shift\t! arithmetic right shift packed8S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4547 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4548 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4549 __ vpsraw($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4550 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4551 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4552 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4553 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4554 instruct vsra8S_reg_imm(vecX dst, vecX src, immI8 shift) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4555 predicate(UseAVX > 0 && n->as_Vector()->length() == 8); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4556 match(Set dst (RShiftVS src shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4557 format %{ "vpsraw $dst,$src,$shift\t! arithmetic right shift packed8S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4558 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4559 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4560 __ vpsraw($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4561 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4562 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4563 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4564 |
6823 | 4565 instruct vsra16S_reg(vecY dst, vecY src, vecS shift) %{ |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4566 predicate(UseAVX > 1 && n->as_Vector()->length() == 16); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4567 match(Set dst (RShiftVS src shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4568 format %{ "vpsraw $dst,$src,$shift\t! arithmetic right shift packed16S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4569 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4570 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4571 __ vpsraw($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4572 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4573 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4574 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4575 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4576 instruct vsra16S_reg_imm(vecY dst, vecY src, immI8 shift) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4577 predicate(UseAVX > 1 && n->as_Vector()->length() == 16); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4578 match(Set dst (RShiftVS src shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4579 format %{ "vpsraw $dst,$src,$shift\t! arithmetic right shift packed16S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4580 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4581 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4582 __ vpsraw($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4583 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4584 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4585 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4586 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4587 // Integers vector arithmetic right shift |
6823 | 4588 instruct vsra2I(vecD dst, vecS shift) %{ |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4589 predicate(n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4590 match(Set dst (RShiftVI dst shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4591 format %{ "psrad $dst,$shift\t! arithmetic right shift packed2I" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4592 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4593 __ psrad($dst$$XMMRegister, $shift$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4594 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4595 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4596 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4597 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4598 instruct vsra2I_imm(vecD dst, immI8 shift) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4599 predicate(n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4600 match(Set dst (RShiftVI dst shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4601 format %{ "psrad $dst,$shift\t! arithmetic right shift packed2I" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4602 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4603 __ psrad($dst$$XMMRegister, (int)$shift$$constant); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4604 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4605 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4606 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4607 |
6823 | 4608 instruct vsra2I_reg(vecD dst, vecD src, vecS shift) %{ |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4609 predicate(UseAVX > 0 && n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4610 match(Set dst (RShiftVI src shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4611 format %{ "vpsrad $dst,$src,$shift\t! arithmetic right shift packed2I" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4612 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4613 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4614 __ vpsrad($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4615 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4616 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4617 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4618 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4619 instruct vsra2I_reg_imm(vecD dst, vecD src, immI8 shift) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4620 predicate(UseAVX > 0 && n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4621 match(Set dst (RShiftVI src shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4622 format %{ "vpsrad $dst,$src,$shift\t! arithmetic right shift packed2I" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4623 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4624 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4625 __ vpsrad($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4626 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4627 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4628 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4629 |
6823 | 4630 instruct vsra4I(vecX dst, vecS shift) %{ |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4631 predicate(n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4632 match(Set dst (RShiftVI dst shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4633 format %{ "psrad $dst,$shift\t! arithmetic right shift packed4I" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4634 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4635 __ psrad($dst$$XMMRegister, $shift$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4636 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4637 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4638 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4639 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4640 instruct vsra4I_imm(vecX dst, immI8 shift) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4641 predicate(n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4642 match(Set dst (RShiftVI dst shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4643 format %{ "psrad $dst,$shift\t! arithmetic right shift packed4I" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4644 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4645 __ psrad($dst$$XMMRegister, (int)$shift$$constant); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4646 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4647 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4648 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4649 |
6823 | 4650 instruct vsra4I_reg(vecX dst, vecX src, vecS shift) %{ |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4651 predicate(UseAVX > 0 && n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4652 match(Set dst (RShiftVI src shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4653 format %{ "vpsrad $dst,$src,$shift\t! arithmetic right shift packed4I" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4654 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4655 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4656 __ vpsrad($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4657 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4658 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4659 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4660 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4661 instruct vsra4I_reg_imm(vecX dst, vecX src, immI8 shift) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4662 predicate(UseAVX > 0 && n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4663 match(Set dst (RShiftVI src shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4664 format %{ "vpsrad $dst,$src,$shift\t! arithmetic right shift packed4I" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4665 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4666 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4667 __ vpsrad($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4668 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4669 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4670 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4671 |
6823 | 4672 instruct vsra8I_reg(vecY dst, vecY src, vecS shift) %{ |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4673 predicate(UseAVX > 1 && n->as_Vector()->length() == 8); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4674 match(Set dst (RShiftVI src shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4675 format %{ "vpsrad $dst,$src,$shift\t! arithmetic right shift packed8I" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4676 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4677 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4678 __ vpsrad($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4679 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4680 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4681 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4682 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4683 instruct vsra8I_reg_imm(vecY dst, vecY src, immI8 shift) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4684 predicate(UseAVX > 1 && n->as_Vector()->length() == 8); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4685 match(Set dst (RShiftVI src shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4686 format %{ "vpsrad $dst,$src,$shift\t! arithmetic right shift packed8I" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4687 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4688 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4689 __ vpsrad($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4690 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4691 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4692 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4693 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4694 // There are no longs vector arithmetic right shift instructions. |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4695 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4696 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4697 // --------------------------------- AND -------------------------------------- |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4698 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4699 instruct vand4B(vecS dst, vecS src) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4700 predicate(n->as_Vector()->length_in_bytes() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4701 match(Set dst (AndV dst src)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4702 format %{ "pand $dst,$src\t! and vectors (4 bytes)" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4703 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4704 __ pand($dst$$XMMRegister, $src$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4705 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4706 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4707 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4708 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4709 instruct vand4B_reg(vecS dst, vecS src1, vecS src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4710 predicate(UseAVX > 0 && n->as_Vector()->length_in_bytes() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4711 match(Set dst (AndV src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4712 format %{ "vpand $dst,$src1,$src2\t! and vectors (4 bytes)" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4713 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4714 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4715 __ vpand($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4716 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4717 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4718 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4719 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4720 instruct vand8B(vecD dst, vecD src) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4721 predicate(n->as_Vector()->length_in_bytes() == 8); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4722 match(Set dst (AndV dst src)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4723 format %{ "pand $dst,$src\t! and vectors (8 bytes)" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4724 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4725 __ pand($dst$$XMMRegister, $src$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4726 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4727 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4728 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4729 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4730 instruct vand8B_reg(vecD dst, vecD src1, vecD src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4731 predicate(UseAVX > 0 && n->as_Vector()->length_in_bytes() == 8); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4732 match(Set dst (AndV src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4733 format %{ "vpand $dst,$src1,$src2\t! and vectors (8 bytes)" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4734 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4735 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4736 __ vpand($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4737 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4738 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4739 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4740 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4741 instruct vand16B(vecX dst, vecX src) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4742 predicate(n->as_Vector()->length_in_bytes() == 16); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4743 match(Set dst (AndV dst src)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4744 format %{ "pand $dst,$src\t! and vectors (16 bytes)" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4745 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4746 __ pand($dst$$XMMRegister, $src$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4747 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4748 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4749 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4750 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4751 instruct vand16B_reg(vecX dst, vecX src1, vecX src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4752 predicate(UseAVX > 0 && n->as_Vector()->length_in_bytes() == 16); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4753 match(Set dst (AndV src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4754 format %{ "vpand $dst,$src1,$src2\t! and vectors (16 bytes)" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4755 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4756 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4757 __ vpand($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4758 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4759 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4760 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4761 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4762 instruct vand16B_mem(vecX dst, vecX src, memory mem) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4763 predicate(UseAVX > 0 && n->as_Vector()->length_in_bytes() == 16); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4764 match(Set dst (AndV src (LoadVector mem))); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4765 format %{ "vpand $dst,$src,$mem\t! and vectors (16 bytes)" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4766 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4767 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4768 __ vpand($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4769 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4770 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4771 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4772 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4773 instruct vand32B_reg(vecY dst, vecY src1, vecY src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4774 predicate(UseAVX > 1 && n->as_Vector()->length_in_bytes() == 32); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4775 match(Set dst (AndV src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4776 format %{ "vpand $dst,$src1,$src2\t! and vectors (32 bytes)" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4777 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4778 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4779 __ vpand($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4780 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4781 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4782 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4783 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4784 instruct vand32B_mem(vecY dst, vecY src, memory mem) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4785 predicate(UseAVX > 1 && n->as_Vector()->length_in_bytes() == 32); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4786 match(Set dst (AndV src (LoadVector mem))); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4787 format %{ "vpand $dst,$src,$mem\t! and vectors (32 bytes)" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4788 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4789 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4790 __ vpand($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4791 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4792 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4793 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4794 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4795 // --------------------------------- OR --------------------------------------- |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4796 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4797 instruct vor4B(vecS dst, vecS src) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4798 predicate(n->as_Vector()->length_in_bytes() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4799 match(Set dst (OrV dst src)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4800 format %{ "por $dst,$src\t! or vectors (4 bytes)" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4801 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4802 __ por($dst$$XMMRegister, $src$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4803 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4804 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4805 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4806 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4807 instruct vor4B_reg(vecS dst, vecS src1, vecS src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4808 predicate(UseAVX > 0 && n->as_Vector()->length_in_bytes() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4809 match(Set dst (OrV src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4810 format %{ "vpor $dst,$src1,$src2\t! or vectors (4 bytes)" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4811 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4812 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4813 __ vpor($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4814 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4815 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4816 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4817 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4818 instruct vor8B(vecD dst, vecD src) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4819 predicate(n->as_Vector()->length_in_bytes() == 8); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4820 match(Set dst (OrV dst src)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4821 format %{ "por $dst,$src\t! or vectors (8 bytes)" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4822 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4823 __ por($dst$$XMMRegister, $src$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4824 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4825 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4826 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4827 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4828 instruct vor8B_reg(vecD dst, vecD src1, vecD src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4829 predicate(UseAVX > 0 && n->as_Vector()->length_in_bytes() == 8); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4830 match(Set dst (OrV src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4831 format %{ "vpor $dst,$src1,$src2\t! or vectors (8 bytes)" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4832 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4833 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4834 __ vpor($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4835 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4836 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4837 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4838 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4839 instruct vor16B(vecX dst, vecX src) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4840 predicate(n->as_Vector()->length_in_bytes() == 16); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4841 match(Set dst (OrV dst src)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4842 format %{ "por $dst,$src\t! or vectors (16 bytes)" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4843 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4844 __ por($dst$$XMMRegister, $src$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4845 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4846 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4847 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4848 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4849 instruct vor16B_reg(vecX dst, vecX src1, vecX src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4850 predicate(UseAVX > 0 && n->as_Vector()->length_in_bytes() == 16); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4851 match(Set dst (OrV src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4852 format %{ "vpor $dst,$src1,$src2\t! or vectors (16 bytes)" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4853 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4854 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4855 __ vpor($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4856 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4857 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4858 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4859 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4860 instruct vor16B_mem(vecX dst, vecX src, memory mem) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4861 predicate(UseAVX > 0 && n->as_Vector()->length_in_bytes() == 16); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4862 match(Set dst (OrV src (LoadVector mem))); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4863 format %{ "vpor $dst,$src,$mem\t! or vectors (16 bytes)" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4864 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4865 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4866 __ vpor($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4867 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4868 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4869 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4870 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4871 instruct vor32B_reg(vecY dst, vecY src1, vecY src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4872 predicate(UseAVX > 1 && n->as_Vector()->length_in_bytes() == 32); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4873 match(Set dst (OrV src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4874 format %{ "vpor $dst,$src1,$src2\t! or vectors (32 bytes)" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4875 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4876 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4877 __ vpor($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4878 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4879 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4880 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4881 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4882 instruct vor32B_mem(vecY dst, vecY src, memory mem) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4883 predicate(UseAVX > 1 && n->as_Vector()->length_in_bytes() == 32); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4884 match(Set dst (OrV src (LoadVector mem))); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4885 format %{ "vpor $dst,$src,$mem\t! or vectors (32 bytes)" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4886 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4887 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4888 __ vpor($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4889 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4890 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4891 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4892 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4893 // --------------------------------- XOR -------------------------------------- |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4894 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4895 instruct vxor4B(vecS dst, vecS src) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4896 predicate(n->as_Vector()->length_in_bytes() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4897 match(Set dst (XorV dst src)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4898 format %{ "pxor $dst,$src\t! xor vectors (4 bytes)" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4899 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4900 __ pxor($dst$$XMMRegister, $src$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4901 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4902 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4903 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4904 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4905 instruct vxor4B_reg(vecS dst, vecS src1, vecS src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4906 predicate(UseAVX > 0 && n->as_Vector()->length_in_bytes() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4907 match(Set dst (XorV src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4908 format %{ "vpxor $dst,$src1,$src2\t! xor vectors (4 bytes)" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4909 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4910 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4911 __ vpxor($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4912 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4913 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4914 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4915 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4916 instruct vxor8B(vecD dst, vecD src) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4917 predicate(n->as_Vector()->length_in_bytes() == 8); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4918 match(Set dst (XorV dst src)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4919 format %{ "pxor $dst,$src\t! xor vectors (8 bytes)" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4920 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4921 __ pxor($dst$$XMMRegister, $src$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4922 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4923 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4924 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4925 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4926 instruct vxor8B_reg(vecD dst, vecD src1, vecD src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4927 predicate(UseAVX > 0 && n->as_Vector()->length_in_bytes() == 8); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4928 match(Set dst (XorV src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
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4929 format %{ "vpxor $dst,$src1,$src2\t! xor vectors (8 bytes)" %} |
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4930 ins_encode %{ |
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4931 bool vector256 = false; |
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4932 __ vpxor($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
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4933 %} |
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4934 ins_pipe( pipe_slow ); |
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4935 %} |
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4936 |
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6340864: Implement vectorization optimizations in hotspot-server
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4937 instruct vxor16B(vecX dst, vecX src) %{ |
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4938 predicate(n->as_Vector()->length_in_bytes() == 16); |
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4939 match(Set dst (XorV dst src)); |
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4940 format %{ "pxor $dst,$src\t! xor vectors (16 bytes)" %} |
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4941 ins_encode %{ |
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4942 __ pxor($dst$$XMMRegister, $src$$XMMRegister); |
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4943 %} |
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4944 ins_pipe( pipe_slow ); |
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4945 %} |
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4946 |
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4947 instruct vxor16B_reg(vecX dst, vecX src1, vecX src2) %{ |
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4948 predicate(UseAVX > 0 && n->as_Vector()->length_in_bytes() == 16); |
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4949 match(Set dst (XorV src1 src2)); |
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4950 format %{ "vpxor $dst,$src1,$src2\t! xor vectors (16 bytes)" %} |
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4951 ins_encode %{ |
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4952 bool vector256 = false; |
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4953 __ vpxor($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
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4954 %} |
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4955 ins_pipe( pipe_slow ); |
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4956 %} |
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4957 |
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4958 instruct vxor16B_mem(vecX dst, vecX src, memory mem) %{ |
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4959 predicate(UseAVX > 0 && n->as_Vector()->length_in_bytes() == 16); |
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4960 match(Set dst (XorV src (LoadVector mem))); |
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4961 format %{ "vpxor $dst,$src,$mem\t! xor vectors (16 bytes)" %} |
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4962 ins_encode %{ |
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4963 bool vector256 = false; |
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4964 __ vpxor($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256); |
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4965 %} |
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4966 ins_pipe( pipe_slow ); |
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|
4967 %} |
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|
4968 |
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4969 instruct vxor32B_reg(vecY dst, vecY src1, vecY src2) %{ |
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4970 predicate(UseAVX > 1 && n->as_Vector()->length_in_bytes() == 32); |
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4971 match(Set dst (XorV src1 src2)); |
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4972 format %{ "vpxor $dst,$src1,$src2\t! xor vectors (32 bytes)" %} |
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|
4973 ins_encode %{ |
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4974 bool vector256 = true; |
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4975 __ vpxor($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
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|
4976 %} |
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|
4977 ins_pipe( pipe_slow ); |
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|
4978 %} |
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|
4979 |
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4980 instruct vxor32B_mem(vecY dst, vecY src, memory mem) %{ |
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|
4981 predicate(UseAVX > 1 && n->as_Vector()->length_in_bytes() == 32); |
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|
4982 match(Set dst (XorV src (LoadVector mem))); |
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|
4983 format %{ "vpxor $dst,$src,$mem\t! xor vectors (32 bytes)" %} |
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|
4984 ins_encode %{ |
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|
4985 bool vector256 = true; |
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|
4986 __ vpxor($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256); |
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|
4987 %} |
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|
4988 ins_pipe( pipe_slow ); |
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|
4989 %} |
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|
4990 |