Mercurial > hg > truffle
annotate src/share/vm/opto/machnode.cpp @ 20804:7848fc12602b
Merge with jdk8u40-b25
| author | Gilles Duboscq <gilles.m.duboscq@oracle.com> |
|---|---|
| date | Tue, 07 Apr 2015 14:58:49 +0200 |
| parents | 52b4284cb496 fc2c88ea11a9 |
| children |
| rev | line source |
|---|---|
| 0 | 1 /* |
|
20447
fc2c88ea11a9
8036588: VerifyFieldClosure fails instanceKlass:3133
drchase
parents:
14437
diff
changeset
|
2 * Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved. |
| 0 | 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
| 4 * | |
| 5 * This code is free software; you can redistribute it and/or modify it | |
| 6 * under the terms of the GNU General Public License version 2 only, as | |
| 7 * published by the Free Software Foundation. | |
| 8 * | |
| 9 * This code is distributed in the hope that it will be useful, but WITHOUT | |
| 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
| 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
| 12 * version 2 for more details (a copy is included in the LICENSE file that | |
| 13 * accompanied this code). | |
| 14 * | |
| 15 * You should have received a copy of the GNU General Public License version | |
| 16 * 2 along with this work; if not, write to the Free Software Foundation, | |
| 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
| 18 * | |
|
1552
c18cbe5936b8
6941466: Oracle rebranding changes for Hotspot repositories
trims
parents:
1137
diff
changeset
|
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
|
c18cbe5936b8
6941466: Oracle rebranding changes for Hotspot repositories
trims
parents:
1137
diff
changeset
|
20 * or visit www.oracle.com if you need additional information or have any |
|
c18cbe5936b8
6941466: Oracle rebranding changes for Hotspot repositories
trims
parents:
1137
diff
changeset
|
21 * questions. |
| 0 | 22 * |
| 23 */ | |
| 24 | |
| 1972 | 25 #include "precompiled.hpp" |
| 26 #include "gc_interface/collectedHeap.hpp" | |
| 27 #include "opto/machnode.hpp" | |
| 28 #include "opto/regalloc.hpp" | |
| 0 | 29 |
| 30 //============================================================================= | |
| 31 // Return the value requested | |
| 32 // result register lookup, corresponding to int_format | |
| 33 int MachOper::reg(PhaseRegAlloc *ra_, const Node *node) const { | |
| 34 return (int)ra_->get_encode(node); | |
| 35 } | |
| 36 // input register lookup, corresponding to ext_format | |
| 37 int MachOper::reg(PhaseRegAlloc *ra_, const Node *node, int idx) const { | |
| 38 return (int)(ra_->get_encode(node->in(idx))); | |
| 39 } | |
| 40 intptr_t MachOper::constant() const { return 0x00; } | |
|
6725
da91efe96a93
6964458: Reimplement class meta-data storage to use native memory
coleenp
parents:
6179
diff
changeset
|
41 relocInfo::relocType MachOper::constant_reloc() const { return relocInfo::none; } |
| 0 | 42 jdouble MachOper::constantD() const { ShouldNotReachHere(); return 0.0; } |
| 43 jfloat MachOper::constantF() const { ShouldNotReachHere(); return 0.0; } | |
| 44 jlong MachOper::constantL() const { ShouldNotReachHere(); return CONST64(0) ; } | |
| 45 TypeOopPtr *MachOper::oop() const { return NULL; } | |
| 46 int MachOper::ccode() const { return 0x00; } | |
| 47 // A zero, default, indicates this value is not needed. | |
| 48 // May need to lookup the base register, as done in int_ and ext_format | |
| 49 int MachOper::base (PhaseRegAlloc *ra_, const Node *node, int idx) const { return 0x00; } | |
| 50 int MachOper::index(PhaseRegAlloc *ra_, const Node *node, int idx) const { return 0x00; } | |
| 51 int MachOper::scale() const { return 0x00; } | |
| 52 int MachOper::disp (PhaseRegAlloc *ra_, const Node *node, int idx) const { return 0x00; } | |
| 53 int MachOper::constant_disp() const { return 0; } | |
| 54 int MachOper::base_position() const { return -1; } // no base input | |
| 55 int MachOper::index_position() const { return -1; } // no index input | |
| 56 // Check for PC-Relative displacement | |
|
6725
da91efe96a93
6964458: Reimplement class meta-data storage to use native memory
coleenp
parents:
6179
diff
changeset
|
57 relocInfo::relocType MachOper::disp_reloc() const { return relocInfo::none; } |
| 0 | 58 // Return the label |
| 59 Label* MachOper::label() const { ShouldNotReachHere(); return 0; } | |
| 60 intptr_t MachOper::method() const { ShouldNotReachHere(); return 0; } | |
| 61 | |
| 62 | |
| 63 //------------------------------negate----------------------------------------- | |
| 64 // Negate conditional branches. Error for non-branch operands | |
| 65 void MachOper::negate() { | |
| 66 ShouldNotCallThis(); | |
| 67 } | |
| 68 | |
| 69 //-----------------------------type-------------------------------------------- | |
| 70 const Type *MachOper::type() const { | |
| 71 return Type::BOTTOM; | |
| 72 } | |
| 73 | |
| 74 //------------------------------in_RegMask------------------------------------- | |
| 75 const RegMask *MachOper::in_RegMask(int index) const { | |
| 76 ShouldNotReachHere(); | |
| 77 return NULL; | |
| 78 } | |
| 79 | |
| 80 //------------------------------dump_spec-------------------------------------- | |
| 81 // Print any per-operand special info | |
| 82 #ifndef PRODUCT | |
| 83 void MachOper::dump_spec(outputStream *st) const { } | |
| 84 #endif | |
| 85 | |
| 86 //------------------------------hash------------------------------------------- | |
| 87 // Print any per-operand special info | |
| 88 uint MachOper::hash() const { | |
| 89 ShouldNotCallThis(); | |
| 90 return 5; | |
| 91 } | |
| 92 | |
| 93 //------------------------------cmp-------------------------------------------- | |
| 94 // Print any per-operand special info | |
| 95 uint MachOper::cmp( const MachOper &oper ) const { | |
| 96 ShouldNotCallThis(); | |
| 97 return opcode() == oper.opcode(); | |
| 98 } | |
| 99 | |
| 100 //------------------------------hash------------------------------------------- | |
| 101 // Print any per-operand special info | |
| 102 uint labelOper::hash() const { | |
| 103 return _block_num; | |
| 104 } | |
| 105 | |
| 106 //------------------------------cmp-------------------------------------------- | |
| 107 // Print any per-operand special info | |
| 108 uint labelOper::cmp( const MachOper &oper ) const { | |
| 109 return (opcode() == oper.opcode()) && (_label == oper.label()); | |
| 110 } | |
| 111 | |
| 112 //------------------------------hash------------------------------------------- | |
| 113 // Print any per-operand special info | |
| 114 uint methodOper::hash() const { | |
| 115 return (uint)_method; | |
| 116 } | |
| 117 | |
| 118 //------------------------------cmp-------------------------------------------- | |
| 119 // Print any per-operand special info | |
| 120 uint methodOper::cmp( const MachOper &oper ) const { | |
| 121 return (opcode() == oper.opcode()) && (_method == oper.method()); | |
| 122 } | |
| 123 | |
| 124 | |
| 125 //============================================================================= | |
| 126 //------------------------------MachNode--------------------------------------- | |
| 127 | |
| 128 //------------------------------emit------------------------------------------- | |
| 129 void MachNode::emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const { | |
| 130 #ifdef ASSERT | |
| 131 tty->print("missing MachNode emit function: "); | |
| 132 dump(); | |
| 133 #endif | |
| 134 ShouldNotCallThis(); | |
| 135 } | |
| 136 | |
|
14428
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12316
diff
changeset
|
137 //---------------------------postalloc_expand---------------------------------- |
|
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12316
diff
changeset
|
138 // Expand node after register allocation. |
|
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12316
diff
changeset
|
139 void MachNode::postalloc_expand(GrowableArray <Node *> *nodes, PhaseRegAlloc *ra_) {} |
|
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12316
diff
changeset
|
140 |
| 0 | 141 //------------------------------size------------------------------------------- |
| 142 // Size of instruction in bytes | |
| 143 uint MachNode::size(PhaseRegAlloc *ra_) const { | |
| 144 // If a virtual was not defined for this specific instruction, | |
| 605 | 145 // Call the helper which finds the size by emitting the bits. |
| 0 | 146 return MachNode::emit_size(ra_); |
| 147 } | |
| 148 | |
| 149 //------------------------------size------------------------------------------- | |
| 150 // Helper function that computes size by emitting code | |
| 151 uint MachNode::emit_size(PhaseRegAlloc *ra_) const { | |
| 152 // Emit into a trash buffer and count bytes emitted. | |
| 153 assert(ra_ == ra_->C->regalloc(), "sanity"); | |
| 154 return ra_->C->scratch_emit_size(this); | |
| 155 } | |
| 156 | |
| 157 | |
| 158 | |
| 159 //------------------------------hash------------------------------------------- | |
| 160 uint MachNode::hash() const { | |
| 161 uint no = num_opnds(); | |
| 162 uint sum = rule(); | |
| 163 for( uint i=0; i<no; i++ ) | |
| 164 sum += _opnds[i]->hash(); | |
| 165 return sum+Node::hash(); | |
| 166 } | |
| 167 | |
| 168 //-----------------------------cmp--------------------------------------------- | |
| 169 uint MachNode::cmp( const Node &node ) const { | |
| 170 MachNode& n = *((Node&)node).as_Mach(); | |
| 171 uint no = num_opnds(); | |
| 172 if( no != n.num_opnds() ) return 0; | |
| 173 if( rule() != n.rule() ) return 0; | |
| 174 for( uint i=0; i<no; i++ ) // All operands must match | |
| 175 if( !_opnds[i]->cmp( *n._opnds[i] ) ) | |
| 176 return 0; // mis-matched operands | |
| 177 return 1; // match | |
| 178 } | |
| 179 | |
| 180 // Return an equivalent instruction using memory for cisc_operand position | |
| 181 MachNode *MachNode::cisc_version(int offset, Compile* C) { | |
| 182 ShouldNotCallThis(); | |
| 183 return NULL; | |
| 184 } | |
| 185 | |
| 186 void MachNode::use_cisc_RegMask() { | |
| 187 ShouldNotReachHere(); | |
| 188 } | |
| 189 | |
| 190 | |
| 191 //-----------------------------in_RegMask-------------------------------------- | |
| 192 const RegMask &MachNode::in_RegMask( uint idx ) const { | |
| 193 uint numopnds = num_opnds(); // Virtual call for number of operands | |
| 194 uint skipped = oper_input_base(); // Sum of leaves skipped so far | |
| 195 if( idx < skipped ) { | |
| 196 assert( ideal_Opcode() == Op_AddP, "expected base ptr here" ); | |
| 197 assert( idx == 1, "expected base ptr here" ); | |
| 198 // debug info can be anywhere | |
| 199 return *Compile::current()->matcher()->idealreg2spillmask[Op_RegP]; | |
| 200 } | |
| 201 uint opcnt = 1; // First operand | |
| 202 uint num_edges = _opnds[1]->num_edges(); // leaves for first operand | |
| 203 while( idx >= skipped+num_edges ) { | |
| 204 skipped += num_edges; | |
| 205 opcnt++; // Bump operand count | |
| 206 assert( opcnt < numopnds, "Accessing non-existent operand" ); | |
| 207 num_edges = _opnds[opcnt]->num_edges(); // leaves for next operand | |
| 208 } | |
| 209 | |
| 210 const RegMask *rm = cisc_RegMask(); | |
| 211 if( rm == NULL || (int)opcnt != cisc_operand() ) { | |
| 212 rm = _opnds[opcnt]->in_RegMask(idx-skipped); | |
| 213 } | |
| 214 return *rm; | |
| 215 } | |
| 216 | |
| 217 //-----------------------------memory_inputs-------------------------------- | |
| 218 const MachOper* MachNode::memory_inputs(Node* &base, Node* &index) const { | |
| 219 const MachOper* oper = memory_operand(); | |
| 220 | |
| 221 if (oper == (MachOper*)-1) { | |
| 222 base = NodeSentinel; | |
| 223 index = NodeSentinel; | |
| 224 } else { | |
| 225 base = NULL; | |
| 226 index = NULL; | |
| 227 if (oper != NULL) { | |
| 228 // It has a unique memory operand. Find its index. | |
| 229 int oper_idx = num_opnds(); | |
| 230 while (--oper_idx >= 0) { | |
| 231 if (_opnds[oper_idx] == oper) break; | |
| 232 } | |
| 233 int oper_pos = operand_index(oper_idx); | |
| 234 int base_pos = oper->base_position(); | |
| 235 if (base_pos >= 0) { | |
| 236 base = _in[oper_pos+base_pos]; | |
| 237 } | |
| 238 int index_pos = oper->index_position(); | |
| 239 if (index_pos >= 0) { | |
| 240 index = _in[oper_pos+index_pos]; | |
| 241 } | |
| 242 } | |
| 243 } | |
| 244 | |
| 245 return oper; | |
| 246 } | |
| 247 | |
| 248 //-----------------------------get_base_and_disp---------------------------- | |
| 249 const Node* MachNode::get_base_and_disp(intptr_t &offset, const TypePtr* &adr_type) const { | |
| 250 | |
| 251 // Find the memory inputs using our helper function | |
| 252 Node* base; | |
| 253 Node* index; | |
| 254 const MachOper* oper = memory_inputs(base, index); | |
| 255 | |
| 256 if (oper == NULL) { | |
| 257 // Base has been set to NULL | |
| 258 offset = 0; | |
| 259 } else if (oper == (MachOper*)-1) { | |
| 260 // Base has been set to NodeSentinel | |
| 261 // There is not a unique memory use here. We will fall to AliasIdxBot. | |
| 262 offset = Type::OffsetBot; | |
| 263 } else { | |
| 264 // Base may be NULL, even if offset turns out to be != 0 | |
| 265 | |
| 266 intptr_t disp = oper->constant_disp(); | |
| 267 int scale = oper->scale(); | |
| 268 // Now we have collected every part of the ADLC MEMORY_INTER. | |
| 269 // See if it adds up to a base + offset. | |
| 270 if (index != NULL) { | |
|
221
1e026f8da827
6710487: More than half of JDI Regression tests hang with COOPs in -Xcomp mode
kvn
parents:
216
diff
changeset
|
271 const Type* t_index = index->bottom_type(); |
|
6848
8e47bac5643a
7054512: Compress class pointers after perm gen removal
roland
parents:
6725
diff
changeset
|
272 if (t_index->isa_narrowoop() || t_index->isa_narrowklass()) { // EncodeN, LoadN, LoadConN, LoadNKlass, |
|
8e47bac5643a
7054512: Compress class pointers after perm gen removal
roland
parents:
6725
diff
changeset
|
273 // EncodeNKlass, LoadConNklass. |
|
216
8d191a7697e2
6715633: when matching a memory node the adr_type should not change
kvn
parents:
113
diff
changeset
|
274 // Memory references through narrow oops have a |
|
8d191a7697e2
6715633: when matching a memory node the adr_type should not change
kvn
parents:
113
diff
changeset
|
275 // funny base so grab the type from the index: |
|
8d191a7697e2
6715633: when matching a memory node the adr_type should not change
kvn
parents:
113
diff
changeset
|
276 // [R12 + narrow_oop_reg<<3 + offset] |
|
8d191a7697e2
6715633: when matching a memory node the adr_type should not change
kvn
parents:
113
diff
changeset
|
277 assert(base == NULL, "Memory references through narrow oops have no base"); |
|
8d191a7697e2
6715633: when matching a memory node the adr_type should not change
kvn
parents:
113
diff
changeset
|
278 offset = disp; |
|
221
1e026f8da827
6710487: More than half of JDI Regression tests hang with COOPs in -Xcomp mode
kvn
parents:
216
diff
changeset
|
279 adr_type = t_index->make_ptr()->add_offset(offset); |
|
216
8d191a7697e2
6715633: when matching a memory node the adr_type should not change
kvn
parents:
113
diff
changeset
|
280 return NULL; |
|
8d191a7697e2
6715633: when matching a memory node the adr_type should not change
kvn
parents:
113
diff
changeset
|
281 } else if (!index->is_Con()) { |
| 0 | 282 disp = Type::OffsetBot; |
| 283 } else if (disp != Type::OffsetBot) { | |
|
221
1e026f8da827
6710487: More than half of JDI Regression tests hang with COOPs in -Xcomp mode
kvn
parents:
216
diff
changeset
|
284 const TypeX* ti = t_index->isa_intptr_t(); |
| 0 | 285 if (ti == NULL) { |
| 286 disp = Type::OffsetBot; // a random constant?? | |
| 287 } else { | |
| 288 disp += ti->get_con() << scale; | |
| 289 } | |
| 290 } | |
| 291 } | |
| 292 offset = disp; | |
| 293 | |
| 294 // In i486.ad, indOffset32X uses base==RegI and disp==RegP, | |
| 295 // this will prevent alias analysis without the following support: | |
| 296 // Lookup the TypePtr used by indOffset32X, a compile-time constant oop, | |
| 297 // Add the offset determined by the "base", or use Type::OffsetBot. | |
| 298 if( adr_type == TYPE_PTR_SENTINAL ) { | |
| 299 const TypePtr *t_disp = oper->disp_as_type(); // only !NULL for indOffset32X | |
| 300 if (t_disp != NULL) { | |
| 301 offset = Type::OffsetBot; | |
| 302 const Type* t_base = base->bottom_type(); | |
| 303 if (t_base->isa_intptr_t()) { | |
| 304 const TypeX *t_offset = t_base->is_intptr_t(); | |
| 305 if( t_offset->is_con() ) { | |
| 306 offset = t_offset->get_con(); | |
| 307 } | |
| 308 } | |
| 309 adr_type = t_disp->add_offset(offset); | |
|
851
fc4be448891f
6851742: (EA) allocation elimination doesn't work with UseG1GC
kvn
parents:
673
diff
changeset
|
310 } else if( base == NULL && offset != 0 && offset != Type::OffsetBot ) { |
|
fc4be448891f
6851742: (EA) allocation elimination doesn't work with UseG1GC
kvn
parents:
673
diff
changeset
|
311 // Use ideal type if it is oop ptr. |
|
fc4be448891f
6851742: (EA) allocation elimination doesn't work with UseG1GC
kvn
parents:
673
diff
changeset
|
312 const TypePtr *tp = oper->type()->isa_ptr(); |
|
fc4be448891f
6851742: (EA) allocation elimination doesn't work with UseG1GC
kvn
parents:
673
diff
changeset
|
313 if( tp != NULL) { |
|
fc4be448891f
6851742: (EA) allocation elimination doesn't work with UseG1GC
kvn
parents:
673
diff
changeset
|
314 adr_type = tp; |
|
fc4be448891f
6851742: (EA) allocation elimination doesn't work with UseG1GC
kvn
parents:
673
diff
changeset
|
315 } |
| 0 | 316 } |
| 317 } | |
| 318 | |
| 319 } | |
| 320 return base; | |
| 321 } | |
| 322 | |
| 323 | |
| 324 //---------------------------------adr_type--------------------------------- | |
| 325 const class TypePtr *MachNode::adr_type() const { | |
| 326 intptr_t offset = 0; | |
| 327 const TypePtr *adr_type = TYPE_PTR_SENTINAL; // attempt computing adr_type | |
| 328 const Node *base = get_base_and_disp(offset, adr_type); | |
| 329 if( adr_type != TYPE_PTR_SENTINAL ) { | |
| 330 return adr_type; // get_base_and_disp has the answer | |
| 331 } | |
| 332 | |
| 333 // Direct addressing modes have no base node, simply an indirect | |
| 334 // offset, which is always to raw memory. | |
| 335 // %%%%% Someday we'd like to allow constant oop offsets which | |
| 336 // would let Intel load from static globals in 1 instruction. | |
| 337 // Currently Intel requires 2 instructions and a register temp. | |
| 338 if (base == NULL) { | |
| 339 // NULL base, zero offset means no memory at all (a null pointer!) | |
| 340 if (offset == 0) { | |
| 341 return NULL; | |
| 342 } | |
| 343 // NULL base, any offset means any pointer whatever | |
| 344 if (offset == Type::OffsetBot) { | |
| 345 return TypePtr::BOTTOM; | |
| 346 } | |
| 347 // %%% make offset be intptr_t | |
|
12316
190899198332
7195622: CheckUnhandledOops has limited usefulness now
hseigel
parents:
10279
diff
changeset
|
348 assert(!Universe::heap()->is_in_reserved(cast_to_oop(offset)), "must be a raw ptr"); |
| 0 | 349 return TypeRawPtr::BOTTOM; |
| 350 } | |
| 351 | |
| 352 // base of -1 with no particular offset means all of memory | |
| 353 if (base == NodeSentinel) return TypePtr::BOTTOM; | |
| 354 | |
| 355 const Type* t = base->bottom_type(); | |
|
10279
70120f47d403
8014189: JVM crash with SEGV in ConnectionGraph::record_for_escape_analysis()
kvn
parents:
7636
diff
changeset
|
356 if (t->isa_narrowoop() && Universe::narrow_oop_shift() == 0) { |
| 673 | 357 // 32-bit unscaled narrow oop can be the base of any address expression |
| 358 t = t->make_ptr(); | |
| 359 } | |
|
10279
70120f47d403
8014189: JVM crash with SEGV in ConnectionGraph::record_for_escape_analysis()
kvn
parents:
7636
diff
changeset
|
360 if (t->isa_narrowklass() && Universe::narrow_klass_shift() == 0) { |
|
6848
8e47bac5643a
7054512: Compress class pointers after perm gen removal
roland
parents:
6725
diff
changeset
|
361 // 32-bit unscaled narrow oop can be the base of any address expression |
|
8e47bac5643a
7054512: Compress class pointers after perm gen removal
roland
parents:
6725
diff
changeset
|
362 t = t->make_ptr(); |
|
8e47bac5643a
7054512: Compress class pointers after perm gen removal
roland
parents:
6725
diff
changeset
|
363 } |
| 0 | 364 if (t->isa_intptr_t() && offset != 0 && offset != Type::OffsetBot) { |
| 365 // We cannot assert that the offset does not look oop-ish here. | |
| 366 // Depending on the heap layout the cardmark base could land | |
| 367 // inside some oopish region. It definitely does for Win2K. | |
| 368 // The sum of cardmark-base plus shift-by-9-oop lands outside | |
| 369 // the oop-ish area but we can't assert for that statically. | |
| 370 return TypeRawPtr::BOTTOM; | |
| 371 } | |
| 372 | |
| 373 const TypePtr *tp = t->isa_ptr(); | |
| 374 | |
| 375 // be conservative if we do not recognize the type | |
| 376 if (tp == NULL) { | |
| 673 | 377 assert(false, "this path may produce not optimal code"); |
| 0 | 378 return TypePtr::BOTTOM; |
| 379 } | |
| 380 assert(tp->base() != Type::AnyPtr, "not a bare pointer"); | |
| 381 | |
| 382 return tp->add_offset(offset); | |
| 383 } | |
| 384 | |
| 385 | |
| 386 //-----------------------------operand_index--------------------------------- | |
| 387 int MachNode::operand_index( uint operand ) const { | |
| 388 if( operand < 1 ) return -1; | |
| 389 assert(operand < num_opnds(), "oob"); | |
| 390 if( _opnds[operand]->num_edges() == 0 ) return -1; | |
| 391 | |
| 392 uint skipped = oper_input_base(); // Sum of leaves skipped so far | |
| 393 for (uint opcnt = 1; opcnt < operand; opcnt++) { | |
| 394 uint num_edges = _opnds[opcnt]->num_edges(); // leaves for operand | |
| 395 skipped += num_edges; | |
| 396 } | |
| 397 return skipped; | |
| 398 } | |
| 399 | |
|
14437
15120a36272d
8028767: PPC64: (part 121): smaller shared changes needed to build C2
goetz
parents:
14434
diff
changeset
|
400 int MachNode::operand_index(const MachOper *oper) const { |
|
15120a36272d
8028767: PPC64: (part 121): smaller shared changes needed to build C2
goetz
parents:
14434
diff
changeset
|
401 uint skipped = oper_input_base(); // Sum of leaves skipped so far |
|
15120a36272d
8028767: PPC64: (part 121): smaller shared changes needed to build C2
goetz
parents:
14434
diff
changeset
|
402 uint opcnt; |
|
15120a36272d
8028767: PPC64: (part 121): smaller shared changes needed to build C2
goetz
parents:
14434
diff
changeset
|
403 for (opcnt = 1; opcnt < num_opnds(); opcnt++) { |
|
15120a36272d
8028767: PPC64: (part 121): smaller shared changes needed to build C2
goetz
parents:
14434
diff
changeset
|
404 if (_opnds[opcnt] == oper) break; |
|
15120a36272d
8028767: PPC64: (part 121): smaller shared changes needed to build C2
goetz
parents:
14434
diff
changeset
|
405 uint num_edges = _opnds[opcnt]->num_edges(); // leaves for operand |
|
15120a36272d
8028767: PPC64: (part 121): smaller shared changes needed to build C2
goetz
parents:
14434
diff
changeset
|
406 skipped += num_edges; |
|
15120a36272d
8028767: PPC64: (part 121): smaller shared changes needed to build C2
goetz
parents:
14434
diff
changeset
|
407 } |
|
15120a36272d
8028767: PPC64: (part 121): smaller shared changes needed to build C2
goetz
parents:
14434
diff
changeset
|
408 if (_opnds[opcnt] != oper) return -1; |
|
15120a36272d
8028767: PPC64: (part 121): smaller shared changes needed to build C2
goetz
parents:
14434
diff
changeset
|
409 return skipped; |
|
15120a36272d
8028767: PPC64: (part 121): smaller shared changes needed to build C2
goetz
parents:
14434
diff
changeset
|
410 } |
| 0 | 411 |
| 412 //------------------------------peephole--------------------------------------- | |
| 413 // Apply peephole rule(s) to this instruction | |
| 414 MachNode *MachNode::peephole( Block *block, int block_index, PhaseRegAlloc *ra_, int &deleted, Compile* C ) { | |
| 415 return NULL; | |
| 416 } | |
| 417 | |
| 418 //------------------------------add_case_label--------------------------------- | |
| 419 // Adds the label for the case | |
| 420 void MachNode::add_case_label( int index_num, Label* blockLabel) { | |
| 421 ShouldNotCallThis(); | |
| 422 } | |
| 423 | |
| 424 //------------------------------method_set------------------------------------- | |
| 425 // Set the absolute address of a method | |
| 426 void MachNode::method_set( intptr_t addr ) { | |
| 427 ShouldNotCallThis(); | |
| 428 } | |
| 429 | |
| 430 //------------------------------rematerialize---------------------------------- | |
| 431 bool MachNode::rematerialize() const { | |
| 432 // Temps are always rematerializable | |
| 433 if (is_MachTemp()) return true; | |
| 434 | |
| 435 uint r = rule(); // Match rule | |
| 436 if( r < Matcher::_begin_rematerialize || | |
| 437 r >= Matcher::_end_rematerialize ) | |
| 438 return false; | |
| 439 | |
| 440 // For 2-address instructions, the input live range is also the output | |
| 441 // live range. Remateralizing does not make progress on the that live range. | |
| 442 if( two_adr() ) return false; | |
| 443 | |
| 444 // Check for rematerializing float constants, or not | |
| 445 if( !Matcher::rematerialize_float_constants ) { | |
| 446 int op = ideal_Opcode(); | |
| 447 if( op == Op_ConF || op == Op_ConD ) | |
| 448 return false; | |
| 449 } | |
| 450 | |
| 451 // Defining flags - can't spill these! Must remateralize. | |
| 452 if( ideal_reg() == Op_RegFlags ) | |
| 453 return true; | |
| 454 | |
| 455 // Stretching lots of inputs - don't do it. | |
| 456 if( req() > 2 ) | |
| 457 return false; | |
| 458 | |
| 459 // Don't remateralize somebody with bound inputs - it stretches a | |
| 460 // fixed register lifetime. | |
| 461 uint idx = oper_input_base(); | |
|
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4114
diff
changeset
|
462 if (req() > idx) { |
| 0 | 463 const RegMask &rm = in_RegMask(idx); |
|
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4114
diff
changeset
|
464 if (rm.is_bound(ideal_reg())) |
| 0 | 465 return false; |
| 466 } | |
| 467 | |
| 468 return true; | |
| 469 } | |
| 470 | |
| 471 #ifndef PRODUCT | |
| 472 //------------------------------dump_spec-------------------------------------- | |
| 473 // Print any per-operand special info | |
| 474 void MachNode::dump_spec(outputStream *st) const { | |
| 475 uint cnt = num_opnds(); | |
| 476 for( uint i=0; i<cnt; i++ ) | |
| 477 _opnds[i]->dump_spec(st); | |
| 478 const TypePtr *t = adr_type(); | |
| 479 if( t ) { | |
| 480 Compile* C = Compile::current(); | |
| 481 if( C->alias_type(t)->is_volatile() ) | |
| 482 st->print(" Volatile!"); | |
| 483 } | |
| 484 } | |
| 485 | |
| 486 //------------------------------dump_format------------------------------------ | |
| 487 // access to virtual | |
| 488 void MachNode::dump_format(PhaseRegAlloc *ra, outputStream *st) const { | |
| 489 format(ra, st); // access to virtual | |
| 490 } | |
| 491 #endif | |
| 492 | |
| 493 //============================================================================= | |
| 494 #ifndef PRODUCT | |
| 495 void MachTypeNode::dump_spec(outputStream *st) const { | |
| 496 _bottom_type->dump_on(st); | |
| 497 } | |
| 498 #endif | |
| 499 | |
| 2008 | 500 |
| 501 //============================================================================= | |
| 502 int MachConstantNode::constant_offset() { | |
| 503 // Bind the offset lazily. | |
|
4114
6729bbc1fcd6
7003454: order constants in constant table by number of references in code
twisti
parents:
4053
diff
changeset
|
504 if (_constant.offset() == -1) { |
| 2008 | 505 Compile::ConstantTable& constant_table = Compile::current()->constant_table(); |
|
4114
6729bbc1fcd6
7003454: order constants in constant table by number of references in code
twisti
parents:
4053
diff
changeset
|
506 int offset = constant_table.find_offset(_constant); |
|
6729bbc1fcd6
7003454: order constants in constant table by number of references in code
twisti
parents:
4053
diff
changeset
|
507 // If called from Compile::scratch_emit_size return the |
|
6729bbc1fcd6
7003454: order constants in constant table by number of references in code
twisti
parents:
4053
diff
changeset
|
508 // pre-calculated offset. |
|
6729bbc1fcd6
7003454: order constants in constant table by number of references in code
twisti
parents:
4053
diff
changeset
|
509 // NOTE: If the AD file does some table base offset optimizations |
|
6729bbc1fcd6
7003454: order constants in constant table by number of references in code
twisti
parents:
4053
diff
changeset
|
510 // later the AD file needs to take care of this fact. |
|
6729bbc1fcd6
7003454: order constants in constant table by number of references in code
twisti
parents:
4053
diff
changeset
|
511 if (Compile::current()->in_scratch_emit_size()) { |
|
6729bbc1fcd6
7003454: order constants in constant table by number of references in code
twisti
parents:
4053
diff
changeset
|
512 return constant_table.calculate_table_base_offset() + offset; |
|
6729bbc1fcd6
7003454: order constants in constant table by number of references in code
twisti
parents:
4053
diff
changeset
|
513 } |
|
6729bbc1fcd6
7003454: order constants in constant table by number of references in code
twisti
parents:
4053
diff
changeset
|
514 _constant.set_offset(constant_table.table_base_offset() + offset); |
| 2008 | 515 } |
|
4114
6729bbc1fcd6
7003454: order constants in constant table by number of references in code
twisti
parents:
4053
diff
changeset
|
516 return _constant.offset(); |
| 2008 | 517 } |
| 518 | |
|
14431
1410ad6b05f1
8028401: PPC (part 117): Improve usability of adlc and format() functionality.
goetz
parents:
14428
diff
changeset
|
519 int MachConstantNode::constant_offset_unchecked() const { |
|
1410ad6b05f1
8028401: PPC (part 117): Improve usability of adlc and format() functionality.
goetz
parents:
14428
diff
changeset
|
520 return _constant.offset(); |
|
1410ad6b05f1
8028401: PPC (part 117): Improve usability of adlc and format() functionality.
goetz
parents:
14428
diff
changeset
|
521 } |
| 2008 | 522 |
| 0 | 523 //============================================================================= |
| 524 #ifndef PRODUCT | |
| 525 void MachNullCheckNode::format( PhaseRegAlloc *ra_, outputStream *st ) const { | |
| 526 int reg = ra_->get_reg_first(in(1)->in(_vidx)); | |
|
7636
a7114d3d712e
8005055: pass outputStream to more opto debug routines
kvn
parents:
6848
diff
changeset
|
527 st->print("%s %s", Name(), Matcher::regName[reg]); |
| 0 | 528 } |
| 529 #endif | |
| 530 | |
| 531 void MachNullCheckNode::emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const { | |
| 532 // only emits entries in the null-pointer exception handler table | |
| 533 } | |
| 3839 | 534 void MachNullCheckNode::label_set(Label* label, uint block_num) { |
| 535 // Nothing to emit | |
| 536 } | |
|
3853
11211f7cb5a0
7079317: Incorrect branch's destination block in PrintoOptoAssembly output
kvn
parents:
3839
diff
changeset
|
537 void MachNullCheckNode::save_label( Label** label, uint* block_num ) { |
|
11211f7cb5a0
7079317: Incorrect branch's destination block in PrintoOptoAssembly output
kvn
parents:
3839
diff
changeset
|
538 // Nothing to emit |
|
11211f7cb5a0
7079317: Incorrect branch's destination block in PrintoOptoAssembly output
kvn
parents:
3839
diff
changeset
|
539 } |
| 0 | 540 |
| 541 const RegMask &MachNullCheckNode::in_RegMask( uint idx ) const { | |
| 542 if( idx == 0 ) return RegMask::Empty; | |
| 543 else return in(1)->as_Mach()->out_RegMask(); | |
| 544 } | |
| 545 | |
| 546 //============================================================================= | |
| 547 const Type *MachProjNode::bottom_type() const { | |
| 548 if( _ideal_reg == fat_proj ) return Type::BOTTOM; | |
| 549 // Try the normal mechanism first | |
| 550 const Type *t = in(0)->bottom_type(); | |
| 551 if( t->base() == Type::Tuple ) { | |
| 552 const TypeTuple *tt = t->is_tuple(); | |
| 553 if (_con < tt->cnt()) | |
| 554 return tt->field_at(_con); | |
| 555 } | |
| 556 // Else use generic type from ideal register set | |
| 557 assert((uint)_ideal_reg < (uint)_last_machine_leaf && Type::mreg2type[_ideal_reg], "in bounds"); | |
| 558 return Type::mreg2type[_ideal_reg]; | |
| 559 } | |
| 560 | |
| 561 const TypePtr *MachProjNode::adr_type() const { | |
| 562 if (bottom_type() == Type::MEMORY) { | |
| 563 // in(0) might be a narrow MemBar; otherwise we will report TypePtr::BOTTOM | |
| 564 const TypePtr* adr_type = in(0)->adr_type(); | |
| 565 #ifdef ASSERT | |
| 566 if (!is_error_reported() && !Node::in_dump()) | |
| 567 assert(adr_type != NULL, "source must have adr_type"); | |
| 568 #endif | |
| 569 return adr_type; | |
| 570 } | |
| 571 assert(bottom_type()->base() != Type::Memory, "no other memories?"); | |
| 572 return NULL; | |
| 573 } | |
| 574 | |
| 575 #ifndef PRODUCT | |
| 576 void MachProjNode::dump_spec(outputStream *st) const { | |
| 577 ProjNode::dump_spec(st); | |
| 578 switch (_ideal_reg) { | |
| 579 case unmatched_proj: st->print("/unmatched"); break; | |
| 580 case fat_proj: st->print("/fat"); if (WizardMode) _rout.dump(); break; | |
| 581 } | |
| 582 } | |
| 583 #endif | |
| 584 | |
| 585 //============================================================================= | |
| 586 #ifndef PRODUCT | |
| 587 void MachIfNode::dump_spec(outputStream *st) const { | |
| 588 st->print("P=%f, C=%f",_prob, _fcnt); | |
| 589 } | |
| 590 #endif | |
| 591 | |
| 592 //============================================================================= | |
| 593 uint MachReturnNode::size_of() const { return sizeof(*this); } | |
| 594 | |
| 595 //------------------------------Registers-------------------------------------- | |
| 596 const RegMask &MachReturnNode::in_RegMask( uint idx ) const { | |
| 597 return _in_rms[idx]; | |
| 598 } | |
| 599 | |
| 600 const TypePtr *MachReturnNode::adr_type() const { | |
| 601 // most returns and calls are assumed to consume & modify all of memory | |
| 602 // the matcher will copy non-wide adr_types from ideal originals | |
| 603 return _adr_type; | |
| 604 } | |
| 605 | |
| 606 //============================================================================= | |
| 607 const Type *MachSafePointNode::bottom_type() const { return TypeTuple::MEMBAR; } | |
| 608 | |
| 609 //------------------------------Registers-------------------------------------- | |
| 610 const RegMask &MachSafePointNode::in_RegMask( uint idx ) const { | |
| 611 // Values in the domain use the users calling convention, embodied in the | |
| 612 // _in_rms array of RegMasks. | |
| 613 if( idx < TypeFunc::Parms ) return _in_rms[idx]; | |
| 614 | |
| 615 if (SafePointNode::needs_polling_address_input() && | |
| 616 idx == TypeFunc::Parms && | |
| 617 ideal_Opcode() == Op_SafePoint) { | |
| 618 return MachNode::in_RegMask(idx); | |
| 619 } | |
| 620 | |
| 621 // Values outside the domain represent debug info | |
| 622 return *Compile::current()->matcher()->idealreg2spillmask[in(idx)->ideal_reg()]; | |
| 623 } | |
| 624 | |
| 625 | |
| 626 //============================================================================= | |
| 627 | |
| 628 uint MachCallNode::cmp( const Node &n ) const | |
| 629 { return _tf == ((MachCallNode&)n)._tf; } | |
| 630 const Type *MachCallNode::bottom_type() const { return tf()->range(); } | |
| 631 const Type *MachCallNode::Value(PhaseTransform *phase) const { return tf()->range(); } | |
| 632 | |
| 633 #ifndef PRODUCT | |
| 634 void MachCallNode::dump_spec(outputStream *st) const { | |
| 635 st->print("# "); | |
| 636 tf()->dump_on(st); | |
| 637 if (_cnt != COUNT_UNKNOWN) st->print(" C=%f",_cnt); | |
| 638 if (jvms() != NULL) jvms()->dump_spec(st); | |
| 639 } | |
| 640 #endif | |
| 641 | |
| 642 bool MachCallNode::return_value_is_used() const { | |
| 643 if (tf()->range()->cnt() == TypeFunc::Parms) { | |
| 644 // void return | |
| 645 return false; | |
| 646 } | |
| 647 | |
| 648 // find the projection corresponding to the return value | |
| 649 for (DUIterator_Fast imax, i = fast_outs(imax); i < imax; i++) { | |
| 650 Node *use = fast_out(i); | |
| 651 if (!use->is_Proj()) continue; | |
| 652 if (use->as_Proj()->_con == TypeFunc::Parms) { | |
| 653 return true; | |
| 654 } | |
| 655 } | |
| 656 return false; | |
| 657 } | |
| 658 | |
|
20447
fc2c88ea11a9
8036588: VerifyFieldClosure fails instanceKlass:3133
drchase
parents:
14437
diff
changeset
|
659 // Similar to cousin class CallNode::returns_pointer |
|
fc2c88ea11a9
8036588: VerifyFieldClosure fails instanceKlass:3133
drchase
parents:
14437
diff
changeset
|
660 // Because this is used in deoptimization, we want the type info, not the data |
|
fc2c88ea11a9
8036588: VerifyFieldClosure fails instanceKlass:3133
drchase
parents:
14437
diff
changeset
|
661 // flow info; the interpreter will "use" things that are dead to the optimizer. |
|
fc2c88ea11a9
8036588: VerifyFieldClosure fails instanceKlass:3133
drchase
parents:
14437
diff
changeset
|
662 bool MachCallNode::returns_pointer() const { |
|
fc2c88ea11a9
8036588: VerifyFieldClosure fails instanceKlass:3133
drchase
parents:
14437
diff
changeset
|
663 const TypeTuple *r = tf()->range(); |
|
fc2c88ea11a9
8036588: VerifyFieldClosure fails instanceKlass:3133
drchase
parents:
14437
diff
changeset
|
664 return (r->cnt() > TypeFunc::Parms && |
|
fc2c88ea11a9
8036588: VerifyFieldClosure fails instanceKlass:3133
drchase
parents:
14437
diff
changeset
|
665 r->field_at(TypeFunc::Parms)->isa_ptr()); |
|
fc2c88ea11a9
8036588: VerifyFieldClosure fails instanceKlass:3133
drchase
parents:
14437
diff
changeset
|
666 } |
| 0 | 667 |
| 668 //------------------------------Registers-------------------------------------- | |
|
14434
318d0622a6d7
8028580: PPC64 (part 114/120): Support for Call nodes with constants.
goetz
parents:
14431
diff
changeset
|
669 const RegMask &MachCallNode::in_RegMask(uint idx) const { |
| 0 | 670 // Values in the domain use the users calling convention, embodied in the |
| 671 // _in_rms array of RegMasks. | |
|
14434
318d0622a6d7
8028580: PPC64 (part 114/120): Support for Call nodes with constants.
goetz
parents:
14431
diff
changeset
|
672 if (idx < tf()->domain()->cnt()) { |
|
318d0622a6d7
8028580: PPC64 (part 114/120): Support for Call nodes with constants.
goetz
parents:
14431
diff
changeset
|
673 return _in_rms[idx]; |
|
318d0622a6d7
8028580: PPC64 (part 114/120): Support for Call nodes with constants.
goetz
parents:
14431
diff
changeset
|
674 } |
|
318d0622a6d7
8028580: PPC64 (part 114/120): Support for Call nodes with constants.
goetz
parents:
14431
diff
changeset
|
675 if (idx == mach_constant_base_node_input()) { |
|
318d0622a6d7
8028580: PPC64 (part 114/120): Support for Call nodes with constants.
goetz
parents:
14431
diff
changeset
|
676 return MachConstantBaseNode::static_out_RegMask(); |
|
318d0622a6d7
8028580: PPC64 (part 114/120): Support for Call nodes with constants.
goetz
parents:
14431
diff
changeset
|
677 } |
| 0 | 678 // Values outside the domain represent debug info |
| 679 return *Compile::current()->matcher()->idealreg2debugmask[in(idx)->ideal_reg()]; | |
| 680 } | |
| 681 | |
| 682 //============================================================================= | |
| 683 uint MachCallJavaNode::size_of() const { return sizeof(*this); } | |
| 684 uint MachCallJavaNode::cmp( const Node &n ) const { | |
| 685 MachCallJavaNode &call = (MachCallJavaNode&)n; | |
| 686 return MachCallNode::cmp(call) && _method->equals(call._method); | |
| 687 } | |
| 688 #ifndef PRODUCT | |
| 689 void MachCallJavaNode::dump_spec(outputStream *st) const { | |
|
1137
97125851f396
6829187: compiler optimizations required for JSR 292
twisti
parents:
866
diff
changeset
|
690 if (_method_handle_invoke) |
|
97125851f396
6829187: compiler optimizations required for JSR 292
twisti
parents:
866
diff
changeset
|
691 st->print("MethodHandle "); |
|
97125851f396
6829187: compiler optimizations required for JSR 292
twisti
parents:
866
diff
changeset
|
692 if (_method) { |
| 0 | 693 _method->print_short_name(st); |
| 694 st->print(" "); | |
| 695 } | |
| 696 MachCallNode::dump_spec(st); | |
| 697 } | |
| 698 #endif | |
| 699 | |
|
1137
97125851f396
6829187: compiler optimizations required for JSR 292
twisti
parents:
866
diff
changeset
|
700 //------------------------------Registers-------------------------------------- |
|
97125851f396
6829187: compiler optimizations required for JSR 292
twisti
parents:
866
diff
changeset
|
701 const RegMask &MachCallJavaNode::in_RegMask(uint idx) const { |
|
97125851f396
6829187: compiler optimizations required for JSR 292
twisti
parents:
866
diff
changeset
|
702 // Values in the domain use the users calling convention, embodied in the |
|
97125851f396
6829187: compiler optimizations required for JSR 292
twisti
parents:
866
diff
changeset
|
703 // _in_rms array of RegMasks. |
|
14434
318d0622a6d7
8028580: PPC64 (part 114/120): Support for Call nodes with constants.
goetz
parents:
14431
diff
changeset
|
704 if (idx < tf()->domain()->cnt()) { |
|
318d0622a6d7
8028580: PPC64 (part 114/120): Support for Call nodes with constants.
goetz
parents:
14431
diff
changeset
|
705 return _in_rms[idx]; |
|
318d0622a6d7
8028580: PPC64 (part 114/120): Support for Call nodes with constants.
goetz
parents:
14431
diff
changeset
|
706 } |
|
318d0622a6d7
8028580: PPC64 (part 114/120): Support for Call nodes with constants.
goetz
parents:
14431
diff
changeset
|
707 if (idx == mach_constant_base_node_input()) { |
|
318d0622a6d7
8028580: PPC64 (part 114/120): Support for Call nodes with constants.
goetz
parents:
14431
diff
changeset
|
708 return MachConstantBaseNode::static_out_RegMask(); |
|
318d0622a6d7
8028580: PPC64 (part 114/120): Support for Call nodes with constants.
goetz
parents:
14431
diff
changeset
|
709 } |
|
1137
97125851f396
6829187: compiler optimizations required for JSR 292
twisti
parents:
866
diff
changeset
|
710 // Values outside the domain represent debug info |
|
97125851f396
6829187: compiler optimizations required for JSR 292
twisti
parents:
866
diff
changeset
|
711 Matcher* m = Compile::current()->matcher(); |
|
97125851f396
6829187: compiler optimizations required for JSR 292
twisti
parents:
866
diff
changeset
|
712 // If this call is a MethodHandle invoke we have to use a different |
|
97125851f396
6829187: compiler optimizations required for JSR 292
twisti
parents:
866
diff
changeset
|
713 // debugmask which does not include the register we use to save the |
|
97125851f396
6829187: compiler optimizations required for JSR 292
twisti
parents:
866
diff
changeset
|
714 // SP over MH invokes. |
|
97125851f396
6829187: compiler optimizations required for JSR 292
twisti
parents:
866
diff
changeset
|
715 RegMask** debugmask = _method_handle_invoke ? m->idealreg2mhdebugmask : m->idealreg2debugmask; |
|
97125851f396
6829187: compiler optimizations required for JSR 292
twisti
parents:
866
diff
changeset
|
716 return *debugmask[in(idx)->ideal_reg()]; |
|
97125851f396
6829187: compiler optimizations required for JSR 292
twisti
parents:
866
diff
changeset
|
717 } |
|
97125851f396
6829187: compiler optimizations required for JSR 292
twisti
parents:
866
diff
changeset
|
718 |
| 0 | 719 //============================================================================= |
| 720 uint MachCallStaticJavaNode::size_of() const { return sizeof(*this); } | |
| 721 uint MachCallStaticJavaNode::cmp( const Node &n ) const { | |
| 722 MachCallStaticJavaNode &call = (MachCallStaticJavaNode&)n; | |
| 723 return MachCallJavaNode::cmp(call) && _name == call._name; | |
| 724 } | |
| 725 | |
| 726 //----------------------------uncommon_trap_request---------------------------- | |
| 727 // If this is an uncommon trap, return the request code, else zero. | |
| 728 int MachCallStaticJavaNode::uncommon_trap_request() const { | |
| 729 if (_name != NULL && !strcmp(_name, "uncommon_trap")) { | |
| 730 return CallStaticJavaNode::extract_uncommon_trap_request(this); | |
| 731 } | |
| 732 return 0; | |
| 733 } | |
| 734 | |
| 735 #ifndef PRODUCT | |
| 736 // Helper for summarizing uncommon_trap arguments. | |
| 737 void MachCallStaticJavaNode::dump_trap_args(outputStream *st) const { | |
| 738 int trap_req = uncommon_trap_request(); | |
| 739 if (trap_req != 0) { | |
| 740 char buf[100]; | |
| 741 st->print("(%s)", | |
| 742 Deoptimization::format_trap_request(buf, sizeof(buf), | |
| 743 trap_req)); | |
| 744 } | |
| 745 } | |
| 746 | |
| 747 void MachCallStaticJavaNode::dump_spec(outputStream *st) const { | |
| 748 st->print("Static "); | |
| 749 if (_name != NULL) { | |
| 750 st->print("wrapper for: %s", _name ); | |
| 751 dump_trap_args(st); | |
| 752 st->print(" "); | |
| 753 } | |
| 754 MachCallJavaNode::dump_spec(st); | |
| 755 } | |
| 756 #endif | |
| 757 | |
| 758 //============================================================================= | |
| 759 #ifndef PRODUCT | |
| 760 void MachCallDynamicJavaNode::dump_spec(outputStream *st) const { | |
| 761 st->print("Dynamic "); | |
| 762 MachCallJavaNode::dump_spec(st); | |
| 763 } | |
| 764 #endif | |
| 765 //============================================================================= | |
| 766 uint MachCallRuntimeNode::size_of() const { return sizeof(*this); } | |
| 767 uint MachCallRuntimeNode::cmp( const Node &n ) const { | |
| 768 MachCallRuntimeNode &call = (MachCallRuntimeNode&)n; | |
| 769 return MachCallNode::cmp(call) && !strcmp(_name,call._name); | |
| 770 } | |
| 771 #ifndef PRODUCT | |
| 772 void MachCallRuntimeNode::dump_spec(outputStream *st) const { | |
| 773 st->print("%s ",_name); | |
| 774 MachCallNode::dump_spec(st); | |
| 775 } | |
| 776 #endif | |
| 777 //============================================================================= | |
| 778 // A shared JVMState for all HaltNodes. Indicates the start of debug info | |
| 779 // is at TypeFunc::Parms. Only required for SOE register spill handling - | |
| 780 // to indicate where the stack-slot-only debug info inputs begin. | |
| 781 // There is no other JVM state needed here. | |
| 782 JVMState jvms_for_throw(0); | |
| 783 JVMState *MachHaltNode::jvms() const { | |
| 784 return &jvms_for_throw; | |
| 785 } | |
| 786 | |
| 787 //============================================================================= | |
| 788 #ifndef PRODUCT | |
| 789 void labelOper::int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const { | |
| 790 st->print("B%d", _block_num); | |
| 791 } | |
| 792 #endif // PRODUCT | |
| 793 | |
| 794 //============================================================================= | |
| 795 #ifndef PRODUCT | |
| 796 void methodOper::int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const { | |
| 797 st->print(INTPTR_FORMAT, _method); | |
| 798 } | |
| 799 #endif // PRODUCT |