Mercurial > hg > truffle
annotate src/cpu/x86/vm/sharedRuntime_x86_32.cpp @ 17524:89152779163c
Merge with jdk8-b132
| author | Gilles Duboscq <duboscq@ssw.jku.at> |
|---|---|
| date | Wed, 15 Oct 2014 11:59:32 +0200 |
| parents | 2d6dd2eebd51 |
| children | 52b4284cb496 |
| rev | line source |
|---|---|
| 0 | 1 /* |
| 17524 | 2 * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. |
| 0 | 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
| 4 * | |
| 5 * This code is free software; you can redistribute it and/or modify it | |
| 6 * under the terms of the GNU General Public License version 2 only, as | |
| 7 * published by the Free Software Foundation. | |
| 8 * | |
| 9 * This code is distributed in the hope that it will be useful, but WITHOUT | |
| 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
| 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
| 12 * version 2 for more details (a copy is included in the LICENSE file that | |
| 13 * accompanied this code). | |
| 14 * | |
| 15 * You should have received a copy of the GNU General Public License version | |
| 16 * 2 along with this work; if not, write to the Free Software Foundation, | |
| 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
| 18 * | |
|
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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20 * or visit www.oracle.com if you need additional information or have any |
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21 * questions. |
| 0 | 22 * |
| 23 */ | |
| 24 | |
| 1972 | 25 #include "precompiled.hpp" |
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26 #include "asm/macroAssembler.hpp" |
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27 #include "asm/macroAssembler.inline.hpp" |
| 1972 | 28 #include "code/debugInfoRec.hpp" |
| 29 #include "code/icBuffer.hpp" | |
| 30 #include "code/vtableStubs.hpp" | |
| 31 #include "interpreter/interpreter.hpp" | |
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32 #include "oops/compiledICHolder.hpp" |
| 1972 | 33 #include "prims/jvmtiRedefineClassesTrace.hpp" |
| 34 #include "runtime/sharedRuntime.hpp" | |
| 35 #include "runtime/vframeArray.hpp" | |
| 36 #include "vmreg_x86.inline.hpp" | |
| 37 #ifdef COMPILER1 | |
| 38 #include "c1/c1_Runtime1.hpp" | |
| 39 #endif | |
| 40 #ifdef COMPILER2 | |
| 41 #include "opto/runtime.hpp" | |
| 42 #endif | |
| 0 | 43 |
| 44 #define __ masm-> | |
| 45 | |
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46 const int StackAlignmentInSlots = StackAlignmentInBytes / VMRegImpl::stack_slot_size; |
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47 |
| 0 | 48 class RegisterSaver { |
| 49 // Capture info about frame layout | |
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50 #define DEF_XMM_OFFS(regnum) xmm ## regnum ## _off = xmm_off + (regnum)*16/BytesPerInt, xmm ## regnum ## H_off |
| 0 | 51 enum layout { |
| 52 fpu_state_off = 0, | |
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53 fpu_state_end = fpu_state_off+FPUStateSizeInWords, |
| 0 | 54 st0_off, st0H_off, |
| 55 st1_off, st1H_off, | |
| 56 st2_off, st2H_off, | |
| 57 st3_off, st3H_off, | |
| 58 st4_off, st4H_off, | |
| 59 st5_off, st5H_off, | |
| 60 st6_off, st6H_off, | |
| 61 st7_off, st7H_off, | |
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62 xmm_off, |
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63 DEF_XMM_OFFS(0), |
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64 DEF_XMM_OFFS(1), |
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65 DEF_XMM_OFFS(2), |
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66 DEF_XMM_OFFS(3), |
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67 DEF_XMM_OFFS(4), |
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68 DEF_XMM_OFFS(5), |
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69 DEF_XMM_OFFS(6), |
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70 DEF_XMM_OFFS(7), |
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71 flags_off = xmm7_off + 16/BytesPerInt + 1, // 16-byte stack alignment fill word |
| 0 | 72 rdi_off, |
| 73 rsi_off, | |
| 74 ignore_off, // extra copy of rbp, | |
| 75 rsp_off, | |
| 76 rbx_off, | |
| 77 rdx_off, | |
| 78 rcx_off, | |
| 79 rax_off, | |
| 80 // The frame sender code expects that rbp will be in the "natural" place and | |
| 81 // will override any oopMap setting for it. We must therefore force the layout | |
| 82 // so that it agrees with the frame sender code. | |
| 83 rbp_off, | |
| 84 return_off, // slot for return address | |
| 85 reg_save_size }; | |
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86 enum { FPU_regs_live = flags_off - fpu_state_end }; |
| 0 | 87 |
| 88 public: | |
| 89 | |
| 90 static OopMap* save_live_registers(MacroAssembler* masm, int additional_frame_words, | |
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91 int* total_frame_words, bool verify_fpu = true, bool save_vectors = false); |
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92 static void restore_live_registers(MacroAssembler* masm, bool restore_vectors = false); |
| 0 | 93 |
| 94 static int rax_offset() { return rax_off; } | |
| 95 static int rbx_offset() { return rbx_off; } | |
| 96 | |
| 97 // Offsets into the register save area | |
| 98 // Used by deoptimization when it is managing result register | |
| 99 // values on its own | |
| 100 | |
| 101 static int raxOffset(void) { return rax_off; } | |
| 102 static int rdxOffset(void) { return rdx_off; } | |
| 103 static int rbxOffset(void) { return rbx_off; } | |
| 104 static int xmm0Offset(void) { return xmm0_off; } | |
| 105 // This really returns a slot in the fp save area, which one is not important | |
| 106 static int fpResultOffset(void) { return st0_off; } | |
| 107 | |
| 108 // During deoptimization only the result register need to be restored | |
| 109 // all the other values have already been extracted. | |
| 110 | |
| 111 static void restore_result_registers(MacroAssembler* masm); | |
| 112 | |
| 113 }; | |
| 114 | |
| 115 OopMap* RegisterSaver::save_live_registers(MacroAssembler* masm, int additional_frame_words, | |
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116 int* total_frame_words, bool verify_fpu, bool save_vectors) { |
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117 int vect_words = 0; |
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118 #ifdef COMPILER2 |
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119 if (save_vectors) { |
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120 assert(UseAVX > 0, "256bit vectors are supported only with AVX"); |
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121 assert(MaxVectorSize == 32, "only 256bit vectors are supported now"); |
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122 // Save upper half of YMM registes |
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123 vect_words = 8 * 16 / wordSize; |
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124 additional_frame_words += vect_words; |
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125 } |
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126 #else |
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127 assert(!save_vectors, "vectors are generated only by C2"); |
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128 #endif |
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129 int frame_size_in_bytes = (reg_save_size + additional_frame_words) * wordSize; |
| 0 | 130 int frame_words = frame_size_in_bytes / wordSize; |
| 131 *total_frame_words = frame_words; | |
| 132 | |
| 133 assert(FPUStateSizeInWords == 27, "update stack layout"); | |
| 134 | |
| 135 // save registers, fpu state, and flags | |
| 136 // We assume caller has already has return address slot on the stack | |
| 137 // We push epb twice in this sequence because we want the real rbp, | |
| 304 | 138 // to be under the return like a normal enter and we want to use pusha |
| 0 | 139 // We push by hand instead of pusing push |
| 140 __ enter(); | |
| 304 | 141 __ pusha(); |
| 142 __ pushf(); | |
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143 __ subptr(rsp,FPU_regs_live*wordSize); // Push FPU registers space |
| 0 | 144 __ push_FPU_state(); // Save FPU state & init |
| 145 | |
| 146 if (verify_fpu) { | |
| 147 // Some stubs may have non standard FPU control word settings so | |
| 148 // only check and reset the value when it required to be the | |
| 149 // standard value. The safepoint blob in particular can be used | |
| 150 // in methods which are using the 24 bit control word for | |
| 151 // optimized float math. | |
| 152 | |
| 153 #ifdef ASSERT | |
| 154 // Make sure the control word has the expected value | |
| 155 Label ok; | |
| 156 __ cmpw(Address(rsp, 0), StubRoutines::fpu_cntrl_wrd_std()); | |
| 157 __ jccb(Assembler::equal, ok); | |
| 158 __ stop("corrupted control word detected"); | |
| 159 __ bind(ok); | |
| 160 #endif | |
| 161 | |
| 162 // Reset the control word to guard against exceptions being unmasked | |
| 163 // since fstp_d can cause FPU stack underflow exceptions. Write it | |
| 164 // into the on stack copy and then reload that to make sure that the | |
| 165 // current and future values are correct. | |
| 166 __ movw(Address(rsp, 0), StubRoutines::fpu_cntrl_wrd_std()); | |
| 167 } | |
| 168 | |
| 169 __ frstor(Address(rsp, 0)); | |
| 170 if (!verify_fpu) { | |
| 171 // Set the control word so that exceptions are masked for the | |
| 172 // following code. | |
| 173 __ fldcw(ExternalAddress(StubRoutines::addr_fpu_cntrl_wrd_std())); | |
| 174 } | |
| 175 | |
| 176 // Save the FPU registers in de-opt-able form | |
| 177 | |
| 178 __ fstp_d(Address(rsp, st0_off*wordSize)); // st(0) | |
| 179 __ fstp_d(Address(rsp, st1_off*wordSize)); // st(1) | |
| 180 __ fstp_d(Address(rsp, st2_off*wordSize)); // st(2) | |
| 181 __ fstp_d(Address(rsp, st3_off*wordSize)); // st(3) | |
| 182 __ fstp_d(Address(rsp, st4_off*wordSize)); // st(4) | |
| 183 __ fstp_d(Address(rsp, st5_off*wordSize)); // st(5) | |
| 184 __ fstp_d(Address(rsp, st6_off*wordSize)); // st(6) | |
| 185 __ fstp_d(Address(rsp, st7_off*wordSize)); // st(7) | |
| 186 | |
| 187 if( UseSSE == 1 ) { // Save the XMM state | |
| 188 __ movflt(Address(rsp,xmm0_off*wordSize),xmm0); | |
| 189 __ movflt(Address(rsp,xmm1_off*wordSize),xmm1); | |
| 190 __ movflt(Address(rsp,xmm2_off*wordSize),xmm2); | |
| 191 __ movflt(Address(rsp,xmm3_off*wordSize),xmm3); | |
| 192 __ movflt(Address(rsp,xmm4_off*wordSize),xmm4); | |
| 193 __ movflt(Address(rsp,xmm5_off*wordSize),xmm5); | |
| 194 __ movflt(Address(rsp,xmm6_off*wordSize),xmm6); | |
| 195 __ movflt(Address(rsp,xmm7_off*wordSize),xmm7); | |
| 196 } else if( UseSSE >= 2 ) { | |
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197 // Save whole 128bit (16 bytes) XMM regiters |
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198 __ movdqu(Address(rsp,xmm0_off*wordSize),xmm0); |
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199 __ movdqu(Address(rsp,xmm1_off*wordSize),xmm1); |
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200 __ movdqu(Address(rsp,xmm2_off*wordSize),xmm2); |
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201 __ movdqu(Address(rsp,xmm3_off*wordSize),xmm3); |
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202 __ movdqu(Address(rsp,xmm4_off*wordSize),xmm4); |
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203 __ movdqu(Address(rsp,xmm5_off*wordSize),xmm5); |
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204 __ movdqu(Address(rsp,xmm6_off*wordSize),xmm6); |
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205 __ movdqu(Address(rsp,xmm7_off*wordSize),xmm7); |
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206 } |
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207 |
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208 if (vect_words > 0) { |
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209 assert(vect_words*wordSize == 128, ""); |
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210 __ subptr(rsp, 128); // Save upper half of YMM registes |
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211 __ vextractf128h(Address(rsp, 0),xmm0); |
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212 __ vextractf128h(Address(rsp, 16),xmm1); |
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213 __ vextractf128h(Address(rsp, 32),xmm2); |
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214 __ vextractf128h(Address(rsp, 48),xmm3); |
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215 __ vextractf128h(Address(rsp, 64),xmm4); |
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216 __ vextractf128h(Address(rsp, 80),xmm5); |
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217 __ vextractf128h(Address(rsp, 96),xmm6); |
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218 __ vextractf128h(Address(rsp,112),xmm7); |
| 0 | 219 } |
| 220 | |
| 221 // Set an oopmap for the call site. This oopmap will map all | |
| 222 // oop-registers and debug-info registers as callee-saved. This | |
| 223 // will allow deoptimization at this safepoint to find all possible | |
| 224 // debug-info recordings, as well as let GC find all oops. | |
| 225 | |
| 226 OopMapSet *oop_maps = new OopMapSet(); | |
| 227 OopMap* map = new OopMap( frame_words, 0 ); | |
| 228 | |
| 229 #define STACK_OFFSET(x) VMRegImpl::stack2reg((x) + additional_frame_words) | |
| 230 | |
| 231 map->set_callee_saved(STACK_OFFSET( rax_off), rax->as_VMReg()); | |
| 232 map->set_callee_saved(STACK_OFFSET( rcx_off), rcx->as_VMReg()); | |
| 233 map->set_callee_saved(STACK_OFFSET( rdx_off), rdx->as_VMReg()); | |
| 234 map->set_callee_saved(STACK_OFFSET( rbx_off), rbx->as_VMReg()); | |
| 235 // rbp, location is known implicitly, no oopMap | |
| 236 map->set_callee_saved(STACK_OFFSET( rsi_off), rsi->as_VMReg()); | |
| 237 map->set_callee_saved(STACK_OFFSET( rdi_off), rdi->as_VMReg()); | |
| 238 map->set_callee_saved(STACK_OFFSET(st0_off), as_FloatRegister(0)->as_VMReg()); | |
| 239 map->set_callee_saved(STACK_OFFSET(st1_off), as_FloatRegister(1)->as_VMReg()); | |
| 240 map->set_callee_saved(STACK_OFFSET(st2_off), as_FloatRegister(2)->as_VMReg()); | |
| 241 map->set_callee_saved(STACK_OFFSET(st3_off), as_FloatRegister(3)->as_VMReg()); | |
| 242 map->set_callee_saved(STACK_OFFSET(st4_off), as_FloatRegister(4)->as_VMReg()); | |
| 243 map->set_callee_saved(STACK_OFFSET(st5_off), as_FloatRegister(5)->as_VMReg()); | |
| 244 map->set_callee_saved(STACK_OFFSET(st6_off), as_FloatRegister(6)->as_VMReg()); | |
| 245 map->set_callee_saved(STACK_OFFSET(st7_off), as_FloatRegister(7)->as_VMReg()); | |
| 246 map->set_callee_saved(STACK_OFFSET(xmm0_off), xmm0->as_VMReg()); | |
| 247 map->set_callee_saved(STACK_OFFSET(xmm1_off), xmm1->as_VMReg()); | |
| 248 map->set_callee_saved(STACK_OFFSET(xmm2_off), xmm2->as_VMReg()); | |
| 249 map->set_callee_saved(STACK_OFFSET(xmm3_off), xmm3->as_VMReg()); | |
| 250 map->set_callee_saved(STACK_OFFSET(xmm4_off), xmm4->as_VMReg()); | |
| 251 map->set_callee_saved(STACK_OFFSET(xmm5_off), xmm5->as_VMReg()); | |
| 252 map->set_callee_saved(STACK_OFFSET(xmm6_off), xmm6->as_VMReg()); | |
| 253 map->set_callee_saved(STACK_OFFSET(xmm7_off), xmm7->as_VMReg()); | |
| 254 // %%% This is really a waste but we'll keep things as they were for now | |
| 255 if (true) { | |
| 256 #define NEXTREG(x) (x)->as_VMReg()->next() | |
| 257 map->set_callee_saved(STACK_OFFSET(st0H_off), NEXTREG(as_FloatRegister(0))); | |
| 258 map->set_callee_saved(STACK_OFFSET(st1H_off), NEXTREG(as_FloatRegister(1))); | |
| 259 map->set_callee_saved(STACK_OFFSET(st2H_off), NEXTREG(as_FloatRegister(2))); | |
| 260 map->set_callee_saved(STACK_OFFSET(st3H_off), NEXTREG(as_FloatRegister(3))); | |
| 261 map->set_callee_saved(STACK_OFFSET(st4H_off), NEXTREG(as_FloatRegister(4))); | |
| 262 map->set_callee_saved(STACK_OFFSET(st5H_off), NEXTREG(as_FloatRegister(5))); | |
| 263 map->set_callee_saved(STACK_OFFSET(st6H_off), NEXTREG(as_FloatRegister(6))); | |
| 264 map->set_callee_saved(STACK_OFFSET(st7H_off), NEXTREG(as_FloatRegister(7))); | |
| 265 map->set_callee_saved(STACK_OFFSET(xmm0H_off), NEXTREG(xmm0)); | |
| 266 map->set_callee_saved(STACK_OFFSET(xmm1H_off), NEXTREG(xmm1)); | |
| 267 map->set_callee_saved(STACK_OFFSET(xmm2H_off), NEXTREG(xmm2)); | |
| 268 map->set_callee_saved(STACK_OFFSET(xmm3H_off), NEXTREG(xmm3)); | |
| 269 map->set_callee_saved(STACK_OFFSET(xmm4H_off), NEXTREG(xmm4)); | |
| 270 map->set_callee_saved(STACK_OFFSET(xmm5H_off), NEXTREG(xmm5)); | |
| 271 map->set_callee_saved(STACK_OFFSET(xmm6H_off), NEXTREG(xmm6)); | |
| 272 map->set_callee_saved(STACK_OFFSET(xmm7H_off), NEXTREG(xmm7)); | |
| 273 #undef NEXTREG | |
| 274 #undef STACK_OFFSET | |
| 275 } | |
| 276 | |
| 277 return map; | |
| 278 | |
| 279 } | |
| 280 | |
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281 void RegisterSaver::restore_live_registers(MacroAssembler* masm, bool restore_vectors) { |
| 0 | 282 // Recover XMM & FPU state |
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283 int additional_frame_bytes = 0; |
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284 #ifdef COMPILER2 |
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285 if (restore_vectors) { |
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286 assert(UseAVX > 0, "256bit vectors are supported only with AVX"); |
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287 assert(MaxVectorSize == 32, "only 256bit vectors are supported now"); |
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288 additional_frame_bytes = 128; |
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289 } |
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290 #else |
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291 assert(!restore_vectors, "vectors are generated only by C2"); |
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292 #endif |
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293 if (UseSSE == 1) { |
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294 assert(additional_frame_bytes == 0, ""); |
| 0 | 295 __ movflt(xmm0,Address(rsp,xmm0_off*wordSize)); |
| 296 __ movflt(xmm1,Address(rsp,xmm1_off*wordSize)); | |
| 297 __ movflt(xmm2,Address(rsp,xmm2_off*wordSize)); | |
| 298 __ movflt(xmm3,Address(rsp,xmm3_off*wordSize)); | |
| 299 __ movflt(xmm4,Address(rsp,xmm4_off*wordSize)); | |
| 300 __ movflt(xmm5,Address(rsp,xmm5_off*wordSize)); | |
| 301 __ movflt(xmm6,Address(rsp,xmm6_off*wordSize)); | |
| 302 __ movflt(xmm7,Address(rsp,xmm7_off*wordSize)); | |
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303 } else if (UseSSE >= 2) { |
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304 #define STACK_ADDRESS(x) Address(rsp,(x)*wordSize + additional_frame_bytes) |
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305 __ movdqu(xmm0,STACK_ADDRESS(xmm0_off)); |
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306 __ movdqu(xmm1,STACK_ADDRESS(xmm1_off)); |
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307 __ movdqu(xmm2,STACK_ADDRESS(xmm2_off)); |
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308 __ movdqu(xmm3,STACK_ADDRESS(xmm3_off)); |
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309 __ movdqu(xmm4,STACK_ADDRESS(xmm4_off)); |
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310 __ movdqu(xmm5,STACK_ADDRESS(xmm5_off)); |
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311 __ movdqu(xmm6,STACK_ADDRESS(xmm6_off)); |
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312 __ movdqu(xmm7,STACK_ADDRESS(xmm7_off)); |
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313 #undef STACK_ADDRESS |
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314 } |
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315 if (restore_vectors) { |
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316 // Restore upper half of YMM registes. |
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317 assert(additional_frame_bytes == 128, ""); |
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318 __ vinsertf128h(xmm0, Address(rsp, 0)); |
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319 __ vinsertf128h(xmm1, Address(rsp, 16)); |
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320 __ vinsertf128h(xmm2, Address(rsp, 32)); |
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321 __ vinsertf128h(xmm3, Address(rsp, 48)); |
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322 __ vinsertf128h(xmm4, Address(rsp, 64)); |
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323 __ vinsertf128h(xmm5, Address(rsp, 80)); |
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324 __ vinsertf128h(xmm6, Address(rsp, 96)); |
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325 __ vinsertf128h(xmm7, Address(rsp,112)); |
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326 __ addptr(rsp, additional_frame_bytes); |
| 0 | 327 } |
| 328 __ pop_FPU_state(); | |
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329 __ addptr(rsp, FPU_regs_live*wordSize); // Pop FPU registers |
| 304 | 330 |
| 331 __ popf(); | |
| 332 __ popa(); | |
| 0 | 333 // Get the rbp, described implicitly by the frame sender code (no oopMap) |
| 304 | 334 __ pop(rbp); |
| 0 | 335 |
| 336 } | |
| 337 | |
| 338 void RegisterSaver::restore_result_registers(MacroAssembler* masm) { | |
| 339 | |
| 340 // Just restore result register. Only used by deoptimization. By | |
| 341 // now any callee save register that needs to be restore to a c2 | |
| 342 // caller of the deoptee has been extracted into the vframeArray | |
| 343 // and will be stuffed into the c2i adapter we create for later | |
| 344 // restoration so only result registers need to be restored here. | |
| 345 // | |
| 346 | |
| 347 __ frstor(Address(rsp, 0)); // Restore fpu state | |
| 348 | |
| 349 // Recover XMM & FPU state | |
| 350 if( UseSSE == 1 ) { | |
| 351 __ movflt(xmm0, Address(rsp, xmm0_off*wordSize)); | |
| 352 } else if( UseSSE >= 2 ) { | |
| 353 __ movdbl(xmm0, Address(rsp, xmm0_off*wordSize)); | |
| 354 } | |
| 304 | 355 __ movptr(rax, Address(rsp, rax_off*wordSize)); |
| 356 __ movptr(rdx, Address(rsp, rdx_off*wordSize)); | |
| 0 | 357 // Pop all of the register save are off the stack except the return address |
| 304 | 358 __ addptr(rsp, return_off * wordSize); |
| 0 | 359 } |
| 360 | |
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361 // Is vector's size (in bytes) bigger than a size saved by default? |
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362 // 16 bytes XMM registers are saved by default using SSE2 movdqu instructions. |
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363 // Note, MaxVectorSize == 0 with UseSSE < 2 and vectors are not generated. |
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364 bool SharedRuntime::is_wide_vector(int size) { |
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365 return size > 16; |
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366 } |
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367 |
| 0 | 368 // The java_calling_convention describes stack locations as ideal slots on |
| 369 // a frame with no abi restrictions. Since we must observe abi restrictions | |
| 370 // (like the placement of the register window) the slots must be biased by | |
| 371 // the following value. | |
| 372 static int reg2offset_in(VMReg r) { | |
| 373 // Account for saved rbp, and return address | |
| 374 // This should really be in_preserve_stack_slots | |
| 375 return (r->reg2stack() + 2) * VMRegImpl::stack_slot_size; | |
| 376 } | |
| 377 | |
| 378 static int reg2offset_out(VMReg r) { | |
| 379 return (r->reg2stack() + SharedRuntime::out_preserve_stack_slots()) * VMRegImpl::stack_slot_size; | |
| 380 } | |
| 381 | |
| 382 // --------------------------------------------------------------------------- | |
| 383 // Read the array of BasicTypes from a signature, and compute where the | |
| 384 // arguments should go. Values in the VMRegPair regs array refer to 4-byte | |
| 385 // quantities. Values less than SharedInfo::stack0 are registers, those above | |
| 386 // refer to 4-byte stack slots. All stack slots are based off of the stack pointer | |
| 387 // as framesizes are fixed. | |
| 388 // VMRegImpl::stack0 refers to the first slot 0(sp). | |
| 389 // and VMRegImpl::stack0+1 refers to the memory word 4-byes higher. Register | |
| 390 // up to RegisterImpl::number_of_registers) are the 32-bit | |
| 391 // integer registers. | |
| 392 | |
| 393 // Pass first two oop/int args in registers ECX and EDX. | |
| 394 // Pass first two float/double args in registers XMM0 and XMM1. | |
| 395 // Doubles have precedence, so if you pass a mix of floats and doubles | |
| 396 // the doubles will grab the registers before the floats will. | |
| 397 | |
| 398 // Note: the INPUTS in sig_bt are in units of Java argument words, which are | |
| 399 // either 32-bit or 64-bit depending on the build. The OUTPUTS are in 32-bit | |
| 400 // units regardless of build. Of course for i486 there is no 64 bit build | |
| 401 | |
| 402 | |
| 403 // --------------------------------------------------------------------------- | |
| 404 // The compiled Java calling convention. | |
| 405 // Pass first two oop/int args in registers ECX and EDX. | |
| 406 // Pass first two float/double args in registers XMM0 and XMM1. | |
| 407 // Doubles have precedence, so if you pass a mix of floats and doubles | |
| 408 // the doubles will grab the registers before the floats will. | |
| 409 int SharedRuntime::java_calling_convention(const BasicType *sig_bt, | |
| 410 VMRegPair *regs, | |
| 411 int total_args_passed, | |
| 412 int is_outgoing) { | |
| 413 uint stack = 0; // Starting stack position for args on stack | |
| 414 | |
| 415 | |
| 416 // Pass first two oop/int args in registers ECX and EDX. | |
| 417 uint reg_arg0 = 9999; | |
| 418 uint reg_arg1 = 9999; | |
| 419 | |
| 420 // Pass first two float/double args in registers XMM0 and XMM1. | |
| 421 // Doubles have precedence, so if you pass a mix of floats and doubles | |
| 422 // the doubles will grab the registers before the floats will. | |
| 423 // CNC - TURNED OFF FOR non-SSE. | |
| 424 // On Intel we have to round all doubles (and most floats) at | |
| 425 // call sites by storing to the stack in any case. | |
| 426 // UseSSE=0 ==> Don't Use ==> 9999+0 | |
| 427 // UseSSE=1 ==> Floats only ==> 9999+1 | |
| 428 // UseSSE>=2 ==> Floats or doubles ==> 9999+2 | |
| 429 enum { fltarg_dontuse = 9999+0, fltarg_float_only = 9999+1, fltarg_flt_dbl = 9999+2 }; | |
| 430 uint fargs = (UseSSE>=2) ? 2 : UseSSE; | |
| 431 uint freg_arg0 = 9999+fargs; | |
| 432 uint freg_arg1 = 9999+fargs; | |
| 433 | |
| 434 // Pass doubles & longs aligned on the stack. First count stack slots for doubles | |
| 435 int i; | |
| 436 for( i = 0; i < total_args_passed; i++) { | |
| 437 if( sig_bt[i] == T_DOUBLE ) { | |
| 438 // first 2 doubles go in registers | |
| 439 if( freg_arg0 == fltarg_flt_dbl ) freg_arg0 = i; | |
| 440 else if( freg_arg1 == fltarg_flt_dbl ) freg_arg1 = i; | |
| 441 else // Else double is passed low on the stack to be aligned. | |
| 442 stack += 2; | |
| 443 } else if( sig_bt[i] == T_LONG ) { | |
| 444 stack += 2; | |
| 445 } | |
| 446 } | |
| 447 int dstack = 0; // Separate counter for placing doubles | |
| 448 | |
| 449 // Now pick where all else goes. | |
| 450 for( i = 0; i < total_args_passed; i++) { | |
| 451 // From the type and the argument number (count) compute the location | |
| 452 switch( sig_bt[i] ) { | |
| 453 case T_SHORT: | |
| 454 case T_CHAR: | |
| 455 case T_BYTE: | |
| 456 case T_BOOLEAN: | |
| 457 case T_INT: | |
| 458 case T_ARRAY: | |
| 459 case T_OBJECT: | |
| 460 case T_ADDRESS: | |
| 461 if( reg_arg0 == 9999 ) { | |
| 462 reg_arg0 = i; | |
| 463 regs[i].set1(rcx->as_VMReg()); | |
| 464 } else if( reg_arg1 == 9999 ) { | |
| 465 reg_arg1 = i; | |
| 466 regs[i].set1(rdx->as_VMReg()); | |
| 467 } else { | |
| 468 regs[i].set1(VMRegImpl::stack2reg(stack++)); | |
| 469 } | |
| 470 break; | |
| 471 case T_FLOAT: | |
| 472 if( freg_arg0 == fltarg_flt_dbl || freg_arg0 == fltarg_float_only ) { | |
| 473 freg_arg0 = i; | |
| 474 regs[i].set1(xmm0->as_VMReg()); | |
| 475 } else if( freg_arg1 == fltarg_flt_dbl || freg_arg1 == fltarg_float_only ) { | |
| 476 freg_arg1 = i; | |
| 477 regs[i].set1(xmm1->as_VMReg()); | |
| 478 } else { | |
| 479 regs[i].set1(VMRegImpl::stack2reg(stack++)); | |
| 480 } | |
| 481 break; | |
| 482 case T_LONG: | |
| 483 assert(sig_bt[i+1] == T_VOID, "missing Half" ); | |
| 484 regs[i].set2(VMRegImpl::stack2reg(dstack)); | |
| 485 dstack += 2; | |
| 486 break; | |
| 487 case T_DOUBLE: | |
| 488 assert(sig_bt[i+1] == T_VOID, "missing Half" ); | |
| 489 if( freg_arg0 == (uint)i ) { | |
| 490 regs[i].set2(xmm0->as_VMReg()); | |
| 491 } else if( freg_arg1 == (uint)i ) { | |
| 492 regs[i].set2(xmm1->as_VMReg()); | |
| 493 } else { | |
| 494 regs[i].set2(VMRegImpl::stack2reg(dstack)); | |
| 495 dstack += 2; | |
| 496 } | |
| 497 break; | |
| 498 case T_VOID: regs[i].set_bad(); break; | |
| 499 break; | |
| 500 default: | |
| 501 ShouldNotReachHere(); | |
| 502 break; | |
| 503 } | |
| 504 } | |
| 505 | |
| 506 // return value can be odd number of VMRegImpl stack slots make multiple of 2 | |
| 507 return round_to(stack, 2); | |
| 508 } | |
| 509 | |
| 510 // Patch the callers callsite with entry to compiled code if it exists. | |
| 511 static void patch_callers_callsite(MacroAssembler *masm) { | |
| 512 Label L; | |
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513 __ cmpptr(Address(rbx, in_bytes(Method::code_offset())), (int32_t)NULL_WORD); |
| 0 | 514 __ jcc(Assembler::equal, L); |
| 515 // Schedule the branch target address early. | |
| 516 // Call into the VM to patch the caller, then jump to compiled callee | |
| 517 // rax, isn't live so capture return address while we easily can | |
| 304 | 518 __ movptr(rax, Address(rsp, 0)); |
| 519 __ pusha(); | |
| 520 __ pushf(); | |
| 0 | 521 |
| 522 if (UseSSE == 1) { | |
| 304 | 523 __ subptr(rsp, 2*wordSize); |
| 0 | 524 __ movflt(Address(rsp, 0), xmm0); |
| 525 __ movflt(Address(rsp, wordSize), xmm1); | |
| 526 } | |
| 527 if (UseSSE >= 2) { | |
| 304 | 528 __ subptr(rsp, 4*wordSize); |
| 0 | 529 __ movdbl(Address(rsp, 0), xmm0); |
| 530 __ movdbl(Address(rsp, 2*wordSize), xmm1); | |
| 531 } | |
| 532 #ifdef COMPILER2 | |
| 533 // C2 may leave the stack dirty if not in SSE2+ mode | |
| 534 if (UseSSE >= 2) { | |
| 535 __ verify_FPU(0, "c2i transition should have clean FPU stack"); | |
| 536 } else { | |
| 537 __ empty_FPU_stack(); | |
| 538 } | |
| 539 #endif /* COMPILER2 */ | |
| 540 | |
| 541 // VM needs caller's callsite | |
| 304 | 542 __ push(rax); |
| 0 | 543 // VM needs target method |
| 304 | 544 __ push(rbx); |
| 0 | 545 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::fixup_callers_callsite))); |
| 304 | 546 __ addptr(rsp, 2*wordSize); |
| 0 | 547 |
| 548 if (UseSSE == 1) { | |
| 549 __ movflt(xmm0, Address(rsp, 0)); | |
| 550 __ movflt(xmm1, Address(rsp, wordSize)); | |
| 304 | 551 __ addptr(rsp, 2*wordSize); |
| 0 | 552 } |
| 553 if (UseSSE >= 2) { | |
| 554 __ movdbl(xmm0, Address(rsp, 0)); | |
| 555 __ movdbl(xmm1, Address(rsp, 2*wordSize)); | |
| 304 | 556 __ addptr(rsp, 4*wordSize); |
| 0 | 557 } |
| 558 | |
| 304 | 559 __ popf(); |
| 560 __ popa(); | |
| 0 | 561 __ bind(L); |
| 562 } | |
| 563 | |
| 564 | |
| 565 static void move_c2i_double(MacroAssembler *masm, XMMRegister r, int st_off) { | |
| 1506 | 566 int next_off = st_off - Interpreter::stackElementSize; |
| 567 __ movdbl(Address(rsp, next_off), r); | |
| 0 | 568 } |
| 569 | |
| 570 static void gen_c2i_adapter(MacroAssembler *masm, | |
| 571 int total_args_passed, | |
| 572 int comp_args_on_stack, | |
| 573 const BasicType *sig_bt, | |
| 574 const VMRegPair *regs, | |
| 575 Label& skip_fixup) { | |
| 576 // Before we get into the guts of the C2I adapter, see if we should be here | |
| 577 // at all. We've come from compiled code and are attempting to jump to the | |
| 578 // interpreter, which means the caller made a static call to get here | |
| 579 // (vcalls always get a compiled target if there is one). Check for a | |
| 580 // compiled target. If there is one, we need to patch the caller's call. | |
| 581 patch_callers_callsite(masm); | |
| 582 | |
| 583 __ bind(skip_fixup); | |
| 584 | |
| 585 #ifdef COMPILER2 | |
| 586 // C2 may leave the stack dirty if not in SSE2+ mode | |
| 587 if (UseSSE >= 2) { | |
| 588 __ verify_FPU(0, "c2i transition should have clean FPU stack"); | |
| 589 } else { | |
| 590 __ empty_FPU_stack(); | |
| 591 } | |
| 592 #endif /* COMPILER2 */ | |
| 593 | |
| 594 // Since all args are passed on the stack, total_args_passed * interpreter_ | |
| 595 // stack_element_size is the | |
| 596 // space we need. | |
| 1506 | 597 int extraspace = total_args_passed * Interpreter::stackElementSize; |
| 0 | 598 |
| 599 // Get return address | |
| 304 | 600 __ pop(rax); |
| 0 | 601 |
| 602 // set senderSP value | |
| 304 | 603 __ movptr(rsi, rsp); |
| 604 | |
| 605 __ subptr(rsp, extraspace); | |
| 0 | 606 |
| 607 // Now write the args into the outgoing interpreter space | |
| 608 for (int i = 0; i < total_args_passed; i++) { | |
| 609 if (sig_bt[i] == T_VOID) { | |
| 610 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half"); | |
| 611 continue; | |
| 612 } | |
| 613 | |
| 614 // st_off points to lowest address on stack. | |
| 1506 | 615 int st_off = ((total_args_passed - 1) - i) * Interpreter::stackElementSize; |
| 616 int next_off = st_off - Interpreter::stackElementSize; | |
| 304 | 617 |
| 0 | 618 // Say 4 args: |
| 619 // i st_off | |
| 620 // 0 12 T_LONG | |
| 621 // 1 8 T_VOID | |
| 622 // 2 4 T_OBJECT | |
| 623 // 3 0 T_BOOL | |
| 624 VMReg r_1 = regs[i].first(); | |
| 625 VMReg r_2 = regs[i].second(); | |
| 626 if (!r_1->is_valid()) { | |
| 627 assert(!r_2->is_valid(), ""); | |
| 628 continue; | |
| 629 } | |
| 630 | |
| 631 if (r_1->is_stack()) { | |
| 632 // memory to memory use fpu stack top | |
| 633 int ld_off = r_1->reg2stack() * VMRegImpl::stack_slot_size + extraspace; | |
| 634 | |
| 635 if (!r_2->is_valid()) { | |
| 636 __ movl(rdi, Address(rsp, ld_off)); | |
| 304 | 637 __ movptr(Address(rsp, st_off), rdi); |
| 0 | 638 } else { |
| 639 | |
| 640 // ld_off == LSW, ld_off+VMRegImpl::stack_slot_size == MSW | |
| 641 // st_off == MSW, st_off-wordSize == LSW | |
| 642 | |
| 304 | 643 __ movptr(rdi, Address(rsp, ld_off)); |
| 644 __ movptr(Address(rsp, next_off), rdi); | |
| 645 #ifndef _LP64 | |
| 646 __ movptr(rdi, Address(rsp, ld_off + wordSize)); | |
| 647 __ movptr(Address(rsp, st_off), rdi); | |
| 648 #else | |
| 649 #ifdef ASSERT | |
| 650 // Overwrite the unused slot with known junk | |
| 651 __ mov64(rax, CONST64(0xdeadffffdeadaaaa)); | |
| 652 __ movptr(Address(rsp, st_off), rax); | |
| 653 #endif /* ASSERT */ | |
| 654 #endif // _LP64 | |
| 0 | 655 } |
| 656 } else if (r_1->is_Register()) { | |
| 657 Register r = r_1->as_Register(); | |
| 658 if (!r_2->is_valid()) { | |
| 659 __ movl(Address(rsp, st_off), r); | |
| 660 } else { | |
| 661 // long/double in gpr | |
| 304 | 662 NOT_LP64(ShouldNotReachHere()); |
| 663 // Two VMRegs can be T_OBJECT, T_ADDRESS, T_DOUBLE, T_LONG | |
| 664 // T_DOUBLE and T_LONG use two slots in the interpreter | |
| 665 if ( sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) { | |
| 666 // long/double in gpr | |
| 667 #ifdef ASSERT | |
| 668 // Overwrite the unused slot with known junk | |
| 669 LP64_ONLY(__ mov64(rax, CONST64(0xdeadffffdeadaaab))); | |
| 670 __ movptr(Address(rsp, st_off), rax); | |
| 671 #endif /* ASSERT */ | |
| 672 __ movptr(Address(rsp, next_off), r); | |
| 673 } else { | |
| 674 __ movptr(Address(rsp, st_off), r); | |
| 675 } | |
| 0 | 676 } |
| 677 } else { | |
| 678 assert(r_1->is_XMMRegister(), ""); | |
| 679 if (!r_2->is_valid()) { | |
| 680 __ movflt(Address(rsp, st_off), r_1->as_XMMRegister()); | |
| 681 } else { | |
| 682 assert(sig_bt[i] == T_DOUBLE || sig_bt[i] == T_LONG, "wrong type"); | |
| 683 move_c2i_double(masm, r_1->as_XMMRegister(), st_off); | |
| 684 } | |
| 685 } | |
| 686 } | |
| 687 | |
| 688 // Schedule the branch target address early. | |
|
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689 __ movptr(rcx, Address(rbx, in_bytes(Method::interpreter_entry_offset()))); |
| 0 | 690 // And repush original return address |
| 304 | 691 __ push(rax); |
| 0 | 692 __ jmp(rcx); |
| 693 } | |
| 694 | |
| 695 | |
| 696 static void move_i2c_double(MacroAssembler *masm, XMMRegister r, Register saved_sp, int ld_off) { | |
| 1506 | 697 int next_val_off = ld_off - Interpreter::stackElementSize; |
| 698 __ movdbl(r, Address(saved_sp, next_val_off)); | |
| 0 | 699 } |
| 700 | |
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701 static void range_check(MacroAssembler* masm, Register pc_reg, Register temp_reg, |
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702 address code_start, address code_end, |
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703 Label& L_ok) { |
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704 Label L_fail; |
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705 __ lea(temp_reg, ExternalAddress(code_start)); |
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706 __ cmpptr(pc_reg, temp_reg); |
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707 __ jcc(Assembler::belowEqual, L_fail); |
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708 __ lea(temp_reg, ExternalAddress(code_end)); |
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709 __ cmpptr(pc_reg, temp_reg); |
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710 __ jcc(Assembler::below, L_ok); |
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711 __ bind(L_fail); |
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712 } |
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713 |
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714 void SharedRuntime::gen_i2c_adapter(MacroAssembler *masm, |
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715 int total_args_passed, |
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716 int comp_args_on_stack, |
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717 const BasicType *sig_bt, |
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718 const VMRegPair *regs |
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719 int frame_extension_argument) { |
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720 assert(frame_extension_arguments == -1, "unsupported"); |
| 0 | 721 |
| 722 // Note: rsi contains the senderSP on entry. We must preserve it since | |
| 723 // we may do a i2c -> c2i transition if we lose a race where compiled | |
| 724 // code goes non-entrant while we get args ready. | |
| 725 | |
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726 // Adapters can be frameless because they do not require the caller |
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727 // to perform additional cleanup work, such as correcting the stack pointer. |
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728 // An i2c adapter is frameless because the *caller* frame, which is interpreted, |
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729 // routinely repairs its own stack pointer (from interpreter_frame_last_sp), |
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730 // even if a callee has modified the stack pointer. |
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731 // A c2i adapter is frameless because the *callee* frame, which is interpreted, |
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732 // routinely repairs its caller's stack pointer (from sender_sp, which is set |
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733 // up via the senderSP register). |
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734 // In other words, if *either* the caller or callee is interpreted, we can |
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735 // get the stack pointer repaired after a call. |
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736 // This is why c2i and i2c adapters cannot be indefinitely composed. |
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737 // In particular, if a c2i adapter were to somehow call an i2c adapter, |
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738 // both caller and callee would be compiled methods, and neither would |
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739 // clean up the stack pointer changes performed by the two adapters. |
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740 // If this happens, control eventually transfers back to the compiled |
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741 // caller, but with an uncorrected stack, causing delayed havoc. |
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742 |
| 0 | 743 // Pick up the return address |
| 304 | 744 __ movptr(rax, Address(rsp, 0)); |
| 0 | 745 |
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746 if (VerifyAdapterCalls && |
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747 (Interpreter::code() != NULL || StubRoutines::code1() != NULL)) { |
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748 // So, let's test for cascading c2i/i2c adapters right now. |
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749 // assert(Interpreter::contains($return_addr) || |
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750 // StubRoutines::contains($return_addr), |
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751 // "i2c adapter must return to an interpreter frame"); |
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752 __ block_comment("verify_i2c { "); |
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753 Label L_ok; |
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754 if (Interpreter::code() != NULL) |
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755 range_check(masm, rax, rdi, |
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756 Interpreter::code()->code_start(), Interpreter::code()->code_end(), |
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757 L_ok); |
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758 if (StubRoutines::code1() != NULL) |
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759 range_check(masm, rax, rdi, |
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760 StubRoutines::code1()->code_begin(), StubRoutines::code1()->code_end(), |
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761 L_ok); |
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762 if (StubRoutines::code2() != NULL) |
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763 range_check(masm, rax, rdi, |
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764 StubRoutines::code2()->code_begin(), StubRoutines::code2()->code_end(), |
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765 L_ok); |
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766 const char* msg = "i2c adapter must return to an interpreter frame"; |
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767 __ block_comment(msg); |
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768 __ stop(msg); |
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769 __ bind(L_ok); |
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770 __ block_comment("} verify_i2ce "); |
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771 } |
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772 |
| 0 | 773 // Must preserve original SP for loading incoming arguments because |
| 774 // we need to align the outgoing SP for compiled code. | |
| 304 | 775 __ movptr(rdi, rsp); |
| 0 | 776 |
| 777 // Cut-out for having no stack args. Since up to 2 int/oop args are passed | |
| 778 // in registers, we will occasionally have no stack args. | |
| 779 int comp_words_on_stack = 0; | |
| 780 if (comp_args_on_stack) { | |
| 781 // Sig words on the stack are greater-than VMRegImpl::stack0. Those in | |
| 782 // registers are below. By subtracting stack0, we either get a negative | |
| 783 // number (all values in registers) or the maximum stack slot accessed. | |
| 784 // int comp_args_on_stack = VMRegImpl::reg2stack(max_arg); | |
| 785 // Convert 4-byte stack slots to words. | |
| 786 comp_words_on_stack = round_to(comp_args_on_stack*4, wordSize)>>LogBytesPerWord; | |
| 787 // Round up to miminum stack alignment, in wordSize | |
| 788 comp_words_on_stack = round_to(comp_words_on_stack, 2); | |
| 304 | 789 __ subptr(rsp, comp_words_on_stack * wordSize); |
| 0 | 790 } |
| 791 | |
| 792 // Align the outgoing SP | |
| 304 | 793 __ andptr(rsp, -(StackAlignmentInBytes)); |
| 0 | 794 |
| 795 // push the return address on the stack (note that pushing, rather | |
| 796 // than storing it, yields the correct frame alignment for the callee) | |
| 304 | 797 __ push(rax); |
| 0 | 798 |
| 799 // Put saved SP in another register | |
| 800 const Register saved_sp = rax; | |
| 304 | 801 __ movptr(saved_sp, rdi); |
| 0 | 802 |
| 803 | |
| 804 // Will jump to the compiled code just as if compiled code was doing it. | |
| 805 // Pre-load the register-jump target early, to schedule it better. | |
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806 __ movptr(rdi, Address(rbx, in_bytes(Method::from_compiled_offset()))); |
| 0 | 807 |
| 808 // Now generate the shuffle code. Pick up all register args and move the | |
| 809 // rest through the floating point stack top. | |
| 810 for (int i = 0; i < total_args_passed; i++) { | |
| 811 if (sig_bt[i] == T_VOID) { | |
| 812 // Longs and doubles are passed in native word order, but misaligned | |
| 813 // in the 32-bit build. | |
| 814 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half"); | |
| 815 continue; | |
| 816 } | |
| 817 | |
| 818 // Pick up 0, 1 or 2 words from SP+offset. | |
| 819 | |
| 820 assert(!regs[i].second()->is_valid() || regs[i].first()->next() == regs[i].second(), | |
| 821 "scrambled load targets?"); | |
| 822 // Load in argument order going down. | |
| 1506 | 823 int ld_off = (total_args_passed - i) * Interpreter::stackElementSize; |
| 0 | 824 // Point to interpreter value (vs. tag) |
| 1506 | 825 int next_off = ld_off - Interpreter::stackElementSize; |
| 0 | 826 // |
| 827 // | |
| 828 // | |
| 829 VMReg r_1 = regs[i].first(); | |
| 830 VMReg r_2 = regs[i].second(); | |
| 831 if (!r_1->is_valid()) { | |
| 832 assert(!r_2->is_valid(), ""); | |
| 833 continue; | |
| 834 } | |
| 835 if (r_1->is_stack()) { | |
| 836 // Convert stack slot to an SP offset (+ wordSize to account for return address ) | |
| 837 int st_off = regs[i].first()->reg2stack()*VMRegImpl::stack_slot_size + wordSize; | |
| 838 | |
| 839 // We can use rsi as a temp here because compiled code doesn't need rsi as an input | |
| 840 // and if we end up going thru a c2i because of a miss a reasonable value of rsi | |
| 841 // we be generated. | |
| 842 if (!r_2->is_valid()) { | |
| 843 // __ fld_s(Address(saved_sp, ld_off)); | |
| 844 // __ fstp_s(Address(rsp, st_off)); | |
| 845 __ movl(rsi, Address(saved_sp, ld_off)); | |
| 304 | 846 __ movptr(Address(rsp, st_off), rsi); |
| 0 | 847 } else { |
| 848 // Interpreter local[n] == MSW, local[n+1] == LSW however locals | |
| 849 // are accessed as negative so LSW is at LOW address | |
| 850 | |
| 851 // ld_off is MSW so get LSW | |
| 852 // st_off is LSW (i.e. reg.first()) | |
| 853 // __ fld_d(Address(saved_sp, next_off)); | |
| 854 // __ fstp_d(Address(rsp, st_off)); | |
| 304 | 855 // |
| 856 // We are using two VMRegs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE | |
| 857 // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case | |
| 858 // So we must adjust where to pick up the data to match the interpreter. | |
| 859 // | |
| 860 // Interpreter local[n] == MSW, local[n+1] == LSW however locals | |
| 861 // are accessed as negative so LSW is at LOW address | |
| 862 | |
| 863 // ld_off is MSW so get LSW | |
| 864 const int offset = (NOT_LP64(true ||) sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)? | |
| 865 next_off : ld_off; | |
| 866 __ movptr(rsi, Address(saved_sp, offset)); | |
| 867 __ movptr(Address(rsp, st_off), rsi); | |
| 868 #ifndef _LP64 | |
| 869 __ movptr(rsi, Address(saved_sp, ld_off)); | |
| 870 __ movptr(Address(rsp, st_off + wordSize), rsi); | |
| 871 #endif // _LP64 | |
| 0 | 872 } |
| 873 } else if (r_1->is_Register()) { // Register argument | |
| 874 Register r = r_1->as_Register(); | |
| 875 assert(r != rax, "must be different"); | |
| 876 if (r_2->is_valid()) { | |
| 304 | 877 // |
| 878 // We are using two VMRegs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE | |
| 879 // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case | |
| 880 // So we must adjust where to pick up the data to match the interpreter. | |
| 881 | |
| 882 const int offset = (NOT_LP64(true ||) sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)? | |
| 883 next_off : ld_off; | |
| 884 | |
| 885 // this can be a misaligned move | |
| 886 __ movptr(r, Address(saved_sp, offset)); | |
| 887 #ifndef _LP64 | |
| 0 | 888 assert(r_2->as_Register() != rax, "need another temporary register"); |
| 889 // Remember r_1 is low address (and LSB on x86) | |
| 890 // So r_2 gets loaded from high address regardless of the platform | |
| 304 | 891 __ movptr(r_2->as_Register(), Address(saved_sp, ld_off)); |
| 892 #endif // _LP64 | |
| 0 | 893 } else { |
| 894 __ movl(r, Address(saved_sp, ld_off)); | |
| 895 } | |
| 896 } else { | |
| 897 assert(r_1->is_XMMRegister(), ""); | |
| 898 if (!r_2->is_valid()) { | |
| 899 __ movflt(r_1->as_XMMRegister(), Address(saved_sp, ld_off)); | |
| 900 } else { | |
| 901 move_i2c_double(masm, r_1->as_XMMRegister(), saved_sp, ld_off); | |
| 902 } | |
| 903 } | |
| 904 } | |
| 905 | |
| 906 // 6243940 We might end up in handle_wrong_method if | |
| 907 // the callee is deoptimized as we race thru here. If that | |
| 908 // happens we don't want to take a safepoint because the | |
| 909 // caller frame will look interpreted and arguments are now | |
| 910 // "compiled" so it is much better to make this transition | |
| 911 // invisible to the stack walking code. Unfortunately if | |
| 912 // we try and find the callee by normal means a safepoint | |
| 913 // is possible. So we stash the desired callee in the thread | |
| 914 // and the vm will find there should this case occur. | |
| 915 | |
| 916 __ get_thread(rax); | |
| 304 | 917 __ movptr(Address(rax, JavaThread::callee_target_offset()), rbx); |
| 0 | 918 |
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919 // move Method* to rax, in case we end up in an c2i adapter. |
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920 // the c2i adapters expect Method* in rax, (c2) because c2's |
| 0 | 921 // resolve stubs return the result (the method) in rax,. |
| 922 // I'd love to fix this. | |
| 304 | 923 __ mov(rax, rbx); |
| 0 | 924 |
| 925 __ jmp(rdi); | |
| 926 } | |
| 927 | |
| 928 // --------------------------------------------------------------- | |
| 929 AdapterHandlerEntry* SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm, | |
| 930 int total_args_passed, | |
| 931 int comp_args_on_stack, | |
| 932 const BasicType *sig_bt, | |
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933 const VMRegPair *regs, |
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934 AdapterFingerPrint* fingerprint) { |
| 0 | 935 address i2c_entry = __ pc(); |
| 936 | |
| 937 gen_i2c_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs); | |
| 938 | |
| 939 // ------------------------------------------------------------------------- | |
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940 // Generate a C2I adapter. On entry we know rbx, holds the Method* during calls |
| 0 | 941 // to the interpreter. The args start out packed in the compiled layout. They |
| 942 // need to be unpacked into the interpreter layout. This will almost always | |
| 943 // require some stack space. We grow the current (compiled) stack, then repack | |
| 944 // the args. We finally end in a jump to the generic interpreter entry point. | |
| 945 // On exit from the interpreter, the interpreter will restore our SP (lest the | |
| 946 // compiled code, which relys solely on SP and not EBP, get sick). | |
| 947 | |
| 948 address c2i_unverified_entry = __ pc(); | |
| 949 Label skip_fixup; | |
| 950 | |
| 951 Register holder = rax; | |
| 952 Register receiver = rcx; | |
| 953 Register temp = rbx; | |
| 954 | |
| 955 { | |
| 956 | |
| 957 Label missed; | |
| 304 | 958 __ movptr(temp, Address(receiver, oopDesc::klass_offset_in_bytes())); |
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959 __ cmpptr(temp, Address(holder, CompiledICHolder::holder_klass_offset())); |
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960 __ movptr(rbx, Address(holder, CompiledICHolder::holder_method_offset())); |
| 0 | 961 __ jcc(Assembler::notEqual, missed); |
| 962 // Method might have been compiled since the call site was patched to | |
| 963 // interpreted if that is the case treat it as a miss so we can get | |
| 964 // the call site corrected. | |
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965 __ cmpptr(Address(rbx, in_bytes(Method::code_offset())), (int32_t)NULL_WORD); |
| 0 | 966 __ jcc(Assembler::equal, skip_fixup); |
| 967 | |
| 968 __ bind(missed); | |
| 969 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub())); | |
| 970 } | |
| 971 | |
| 972 address c2i_entry = __ pc(); | |
| 973 | |
| 974 gen_c2i_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs, skip_fixup); | |
| 975 | |
| 976 __ flush(); | |
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977 return AdapterHandlerLibrary::new_entry(fingerprint, i2c_entry, c2i_entry, c2i_unverified_entry); |
| 0 | 978 } |
| 979 | |
| 980 int SharedRuntime::c_calling_convention(const BasicType *sig_bt, | |
| 981 VMRegPair *regs, | |
| 982 int total_args_passed) { | |
| 983 // We return the amount of VMRegImpl stack slots we need to reserve for all | |
| 984 // the arguments NOT counting out_preserve_stack_slots. | |
| 985 | |
| 986 uint stack = 0; // All arguments on stack | |
| 987 | |
| 988 for( int i = 0; i < total_args_passed; i++) { | |
| 989 // From the type and the argument number (count) compute the location | |
| 990 switch( sig_bt[i] ) { | |
| 991 case T_BOOLEAN: | |
| 992 case T_CHAR: | |
| 993 case T_FLOAT: | |
| 994 case T_BYTE: | |
| 995 case T_SHORT: | |
| 996 case T_INT: | |
| 997 case T_OBJECT: | |
| 998 case T_ARRAY: | |
| 999 case T_ADDRESS: | |
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1000 case T_METADATA: |
| 0 | 1001 regs[i].set1(VMRegImpl::stack2reg(stack++)); |
| 1002 break; | |
| 1003 case T_LONG: | |
| 1004 case T_DOUBLE: // The stack numbering is reversed from Java | |
| 1005 // Since C arguments do not get reversed, the ordering for | |
| 1006 // doubles on the stack must be opposite the Java convention | |
| 1007 assert(sig_bt[i+1] == T_VOID, "missing Half" ); | |
| 1008 regs[i].set2(VMRegImpl::stack2reg(stack)); | |
| 1009 stack += 2; | |
| 1010 break; | |
| 1011 case T_VOID: regs[i].set_bad(); break; | |
| 1012 default: | |
| 1013 ShouldNotReachHere(); | |
| 1014 break; | |
| 1015 } | |
| 1016 } | |
| 1017 return stack; | |
| 1018 } | |
| 1019 | |
| 1020 // A simple move of integer like type | |
| 1021 static void simple_move32(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { | |
| 1022 if (src.first()->is_stack()) { | |
| 1023 if (dst.first()->is_stack()) { | |
| 1024 // stack to stack | |
| 1025 // __ ld(FP, reg2offset(src.first()) + STACK_BIAS, L5); | |
| 1026 // __ st(L5, SP, reg2offset(dst.first()) + STACK_BIAS); | |
| 304 | 1027 __ movl2ptr(rax, Address(rbp, reg2offset_in(src.first()))); |
| 1028 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax); | |
| 0 | 1029 } else { |
| 1030 // stack to reg | |
| 304 | 1031 __ movl2ptr(dst.first()->as_Register(), Address(rbp, reg2offset_in(src.first()))); |
| 0 | 1032 } |
| 1033 } else if (dst.first()->is_stack()) { | |
| 1034 // reg to stack | |
| 304 | 1035 // no need to sign extend on 64bit |
| 1036 __ movptr(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register()); | |
| 0 | 1037 } else { |
| 304 | 1038 if (dst.first() != src.first()) { |
| 1039 __ mov(dst.first()->as_Register(), src.first()->as_Register()); | |
| 1040 } | |
| 0 | 1041 } |
| 1042 } | |
| 1043 | |
| 1044 // An oop arg. Must pass a handle not the oop itself | |
| 1045 static void object_move(MacroAssembler* masm, | |
| 1046 OopMap* map, | |
| 1047 int oop_handle_offset, | |
| 1048 int framesize_in_slots, | |
| 1049 VMRegPair src, | |
| 1050 VMRegPair dst, | |
| 1051 bool is_receiver, | |
| 1052 int* receiver_offset) { | |
| 1053 | |
| 1054 // Because of the calling conventions we know that src can be a | |
| 1055 // register or a stack location. dst can only be a stack location. | |
| 1056 | |
| 1057 assert(dst.first()->is_stack(), "must be stack"); | |
| 1058 // must pass a handle. First figure out the location we use as a handle | |
| 1059 | |
| 1060 if (src.first()->is_stack()) { | |
| 1061 // Oop is already on the stack as an argument | |
| 1062 Register rHandle = rax; | |
| 1063 Label nil; | |
| 304 | 1064 __ xorptr(rHandle, rHandle); |
| 1065 __ cmpptr(Address(rbp, reg2offset_in(src.first())), (int32_t)NULL_WORD); | |
| 0 | 1066 __ jcc(Assembler::equal, nil); |
| 304 | 1067 __ lea(rHandle, Address(rbp, reg2offset_in(src.first()))); |
| 0 | 1068 __ bind(nil); |
| 304 | 1069 __ movptr(Address(rsp, reg2offset_out(dst.first())), rHandle); |
| 0 | 1070 |
| 1071 int offset_in_older_frame = src.first()->reg2stack() + SharedRuntime::out_preserve_stack_slots(); | |
| 1072 map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + framesize_in_slots)); | |
| 1073 if (is_receiver) { | |
| 1074 *receiver_offset = (offset_in_older_frame + framesize_in_slots) * VMRegImpl::stack_slot_size; | |
| 1075 } | |
| 1076 } else { | |
| 1077 // Oop is in an a register we must store it to the space we reserve | |
| 1078 // on the stack for oop_handles | |
| 1079 const Register rOop = src.first()->as_Register(); | |
| 1080 const Register rHandle = rax; | |
| 1081 int oop_slot = (rOop == rcx ? 0 : 1) * VMRegImpl::slots_per_word + oop_handle_offset; | |
| 1082 int offset = oop_slot*VMRegImpl::stack_slot_size; | |
| 1083 Label skip; | |
| 304 | 1084 __ movptr(Address(rsp, offset), rOop); |
| 0 | 1085 map->set_oop(VMRegImpl::stack2reg(oop_slot)); |
| 304 | 1086 __ xorptr(rHandle, rHandle); |
| 1087 __ cmpptr(rOop, (int32_t)NULL_WORD); | |
| 0 | 1088 __ jcc(Assembler::equal, skip); |
| 304 | 1089 __ lea(rHandle, Address(rsp, offset)); |
| 0 | 1090 __ bind(skip); |
| 1091 // Store the handle parameter | |
| 304 | 1092 __ movptr(Address(rsp, reg2offset_out(dst.first())), rHandle); |
| 0 | 1093 if (is_receiver) { |
| 1094 *receiver_offset = offset; | |
| 1095 } | |
| 1096 } | |
| 1097 } | |
| 1098 | |
| 1099 // A float arg may have to do float reg int reg conversion | |
| 1100 static void float_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { | |
| 1101 assert(!src.second()->is_valid() && !dst.second()->is_valid(), "bad float_move"); | |
| 1102 | |
| 1103 // Because of the calling convention we know that src is either a stack location | |
| 1104 // or an xmm register. dst can only be a stack location. | |
| 1105 | |
| 1106 assert(dst.first()->is_stack() && ( src.first()->is_stack() || src.first()->is_XMMRegister()), "bad parameters"); | |
| 1107 | |
| 1108 if (src.first()->is_stack()) { | |
| 1109 __ movl(rax, Address(rbp, reg2offset_in(src.first()))); | |
| 304 | 1110 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax); |
| 0 | 1111 } else { |
| 1112 // reg to stack | |
| 1113 __ movflt(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister()); | |
| 1114 } | |
| 1115 } | |
| 1116 | |
| 1117 // A long move | |
| 1118 static void long_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { | |
| 1119 | |
| 1120 // The only legal possibility for a long_move VMRegPair is: | |
| 1121 // 1: two stack slots (possibly unaligned) | |
| 1122 // as neither the java or C calling convention will use registers | |
| 1123 // for longs. | |
| 1124 | |
| 1125 if (src.first()->is_stack() && dst.first()->is_stack()) { | |
| 1126 assert(src.second()->is_stack() && dst.second()->is_stack(), "must be all stack"); | |
| 304 | 1127 __ movptr(rax, Address(rbp, reg2offset_in(src.first()))); |
| 1128 NOT_LP64(__ movptr(rbx, Address(rbp, reg2offset_in(src.second())))); | |
| 1129 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax); | |
| 1130 NOT_LP64(__ movptr(Address(rsp, reg2offset_out(dst.second())), rbx)); | |
| 0 | 1131 } else { |
| 1132 ShouldNotReachHere(); | |
| 1133 } | |
| 1134 } | |
| 1135 | |
| 1136 // A double move | |
| 1137 static void double_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { | |
| 1138 | |
| 1139 // The only legal possibilities for a double_move VMRegPair are: | |
| 1140 // The painful thing here is that like long_move a VMRegPair might be | |
| 1141 | |
| 1142 // Because of the calling convention we know that src is either | |
| 1143 // 1: a single physical register (xmm registers only) | |
| 1144 // 2: two stack slots (possibly unaligned) | |
| 1145 // dst can only be a pair of stack slots. | |
| 1146 | |
| 1147 assert(dst.first()->is_stack() && (src.first()->is_XMMRegister() || src.first()->is_stack()), "bad args"); | |
| 1148 | |
| 1149 if (src.first()->is_stack()) { | |
| 1150 // source is all stack | |
| 304 | 1151 __ movptr(rax, Address(rbp, reg2offset_in(src.first()))); |
| 1152 NOT_LP64(__ movptr(rbx, Address(rbp, reg2offset_in(src.second())))); | |
| 1153 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax); | |
| 1154 NOT_LP64(__ movptr(Address(rsp, reg2offset_out(dst.second())), rbx)); | |
| 0 | 1155 } else { |
| 1156 // reg to stack | |
| 1157 // No worries about stack alignment | |
| 1158 __ movdbl(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister()); | |
| 1159 } | |
| 1160 } | |
| 1161 | |
| 1162 | |
| 1163 void SharedRuntime::save_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) { | |
| 1164 // We always ignore the frame_slots arg and just use the space just below frame pointer | |
| 1165 // which by this time is free to use | |
| 1166 switch (ret_type) { | |
| 1167 case T_FLOAT: | |
| 1168 __ fstp_s(Address(rbp, -wordSize)); | |
| 1169 break; | |
| 1170 case T_DOUBLE: | |
| 1171 __ fstp_d(Address(rbp, -2*wordSize)); | |
| 1172 break; | |
| 1173 case T_VOID: break; | |
| 1174 case T_LONG: | |
| 304 | 1175 __ movptr(Address(rbp, -wordSize), rax); |
| 1176 NOT_LP64(__ movptr(Address(rbp, -2*wordSize), rdx)); | |
| 0 | 1177 break; |
| 1178 default: { | |
| 304 | 1179 __ movptr(Address(rbp, -wordSize), rax); |
| 0 | 1180 } |
| 1181 } | |
| 1182 } | |
| 1183 | |
| 1184 void SharedRuntime::restore_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) { | |
| 1185 // We always ignore the frame_slots arg and just use the space just below frame pointer | |
| 1186 // which by this time is free to use | |
| 1187 switch (ret_type) { | |
| 1188 case T_FLOAT: | |
| 1189 __ fld_s(Address(rbp, -wordSize)); | |
| 1190 break; | |
| 1191 case T_DOUBLE: | |
| 1192 __ fld_d(Address(rbp, -2*wordSize)); | |
| 1193 break; | |
| 1194 case T_LONG: | |
| 304 | 1195 __ movptr(rax, Address(rbp, -wordSize)); |
| 1196 NOT_LP64(__ movptr(rdx, Address(rbp, -2*wordSize))); | |
| 0 | 1197 break; |
| 1198 case T_VOID: break; | |
| 1199 default: { | |
| 304 | 1200 __ movptr(rax, Address(rbp, -wordSize)); |
| 0 | 1201 } |
| 1202 } | |
| 1203 } | |
| 1204 | |
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1205 |
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1206 static void save_or_restore_arguments(MacroAssembler* masm, |
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1207 const int stack_slots, |
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1208 const int total_in_args, |
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1209 const int arg_save_area, |
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1210 OopMap* map, |
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1211 VMRegPair* in_regs, |
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1212 BasicType* in_sig_bt) { |
|
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1213 // if map is non-NULL then the code should store the values, |
|
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1214 // otherwise it should load them. |
|
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1215 int handle_index = 0; |
|
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1216 // Save down double word first |
|
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1217 for ( int i = 0; i < total_in_args; i++) { |
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1218 if (in_regs[i].first()->is_XMMRegister() && in_sig_bt[i] == T_DOUBLE) { |
|
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1219 int slot = handle_index * VMRegImpl::slots_per_word + arg_save_area; |
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1220 int offset = slot * VMRegImpl::stack_slot_size; |
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1221 handle_index += 2; |
|
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1222 assert(handle_index <= stack_slots, "overflow"); |
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1223 if (map != NULL) { |
|
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1224 __ movdbl(Address(rsp, offset), in_regs[i].first()->as_XMMRegister()); |
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1225 } else { |
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1226 __ movdbl(in_regs[i].first()->as_XMMRegister(), Address(rsp, offset)); |
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1227 } |
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1228 } |
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1229 if (in_regs[i].first()->is_Register() && in_sig_bt[i] == T_LONG) { |
|
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1230 int slot = handle_index * VMRegImpl::slots_per_word + arg_save_area; |
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1231 int offset = slot * VMRegImpl::stack_slot_size; |
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1232 handle_index += 2; |
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1233 assert(handle_index <= stack_slots, "overflow"); |
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1234 if (map != NULL) { |
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1235 __ movl(Address(rsp, offset), in_regs[i].first()->as_Register()); |
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1236 if (in_regs[i].second()->is_Register()) { |
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1237 __ movl(Address(rsp, offset + 4), in_regs[i].second()->as_Register()); |
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1238 } |
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1239 } else { |
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1240 __ movl(in_regs[i].first()->as_Register(), Address(rsp, offset)); |
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1241 if (in_regs[i].second()->is_Register()) { |
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1242 __ movl(in_regs[i].second()->as_Register(), Address(rsp, offset + 4)); |
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1243 } |
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1244 } |
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1245 } |
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1246 } |
|
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1247 // Save or restore single word registers |
|
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1248 for ( int i = 0; i < total_in_args; i++) { |
|
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1249 if (in_regs[i].first()->is_Register()) { |
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1250 int slot = handle_index++ * VMRegImpl::slots_per_word + arg_save_area; |
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1251 int offset = slot * VMRegImpl::stack_slot_size; |
|
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|
1252 assert(handle_index <= stack_slots, "overflow"); |
|
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1253 if (in_sig_bt[i] == T_ARRAY && map != NULL) { |
|
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1254 map->set_oop(VMRegImpl::stack2reg(slot));; |
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1255 } |
|
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1256 |
|
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1257 // Value is in an input register pass we must flush it to the stack |
|
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1258 const Register reg = in_regs[i].first()->as_Register(); |
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1259 switch (in_sig_bt[i]) { |
|
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1260 case T_ARRAY: |
|
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1261 if (map != NULL) { |
|
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|
1262 __ movptr(Address(rsp, offset), reg); |
|
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|
1263 } else { |
|
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1264 __ movptr(reg, Address(rsp, offset)); |
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|
1265 } |
|
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|
1266 break; |
|
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1267 case T_BOOLEAN: |
|
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1268 case T_CHAR: |
|
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1269 case T_BYTE: |
|
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1270 case T_SHORT: |
|
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|
1271 case T_INT: |
|
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1272 if (map != NULL) { |
|
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|
1273 __ movl(Address(rsp, offset), reg); |
|
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|
1274 } else { |
|
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|
1275 __ movl(reg, Address(rsp, offset)); |
|
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|
1276 } |
|
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|
1277 break; |
|
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|
1278 case T_OBJECT: |
|
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|
1279 default: ShouldNotReachHere(); |
|
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1280 } |
|
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1281 } else if (in_regs[i].first()->is_XMMRegister()) { |
|
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|
1282 if (in_sig_bt[i] == T_FLOAT) { |
|
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|
1283 int slot = handle_index++ * VMRegImpl::slots_per_word + arg_save_area; |
|
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|
1284 int offset = slot * VMRegImpl::stack_slot_size; |
|
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|
1285 assert(handle_index <= stack_slots, "overflow"); |
|
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1286 if (map != NULL) { |
|
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|
1287 __ movflt(Address(rsp, offset), in_regs[i].first()->as_XMMRegister()); |
|
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|
1288 } else { |
|
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|
1289 __ movflt(in_regs[i].first()->as_XMMRegister(), Address(rsp, offset)); |
|
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|
1290 } |
|
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|
1291 } |
|
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|
1292 } else if (in_regs[i].first()->is_stack()) { |
|
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1293 if (in_sig_bt[i] == T_ARRAY && map != NULL) { |
|
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1294 int offset_in_older_frame = in_regs[i].first()->reg2stack() + SharedRuntime::out_preserve_stack_slots(); |
|
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|
1295 map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + stack_slots)); |
|
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|
1296 } |
|
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|
1297 } |
|
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|
1298 } |
|
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|
1299 } |
|
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|
1300 |
|
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|
1301 // Check GC_locker::needs_gc and enter the runtime if it's true. This |
|
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|
1302 // keeps a new JNI critical region from starting until a GC has been |
|
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|
1303 // forced. Save down any oops in registers and describe them in an |
|
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|
1304 // OopMap. |
|
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|
1305 static void check_needs_gc_for_critical_native(MacroAssembler* masm, |
|
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|
1306 Register thread, |
|
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|
1307 int stack_slots, |
|
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|
1308 int total_c_args, |
|
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|
1309 int total_in_args, |
|
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|
1310 int arg_save_area, |
|
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|
1311 OopMapSet* oop_maps, |
|
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|
1312 VMRegPair* in_regs, |
|
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|
1313 BasicType* in_sig_bt) { |
|
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|
1314 __ block_comment("check GC_locker::needs_gc"); |
|
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|
1315 Label cont; |
|
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|
1316 __ cmp8(ExternalAddress((address)GC_locker::needs_gc_address()), false); |
|
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|
1317 __ jcc(Assembler::equal, cont); |
|
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|
1318 |
|
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|
1319 // Save down any incoming oops and call into the runtime to halt for a GC |
|
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|
1320 |
|
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|
1321 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/); |
|
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|
1322 |
|
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|
1323 save_or_restore_arguments(masm, stack_slots, total_in_args, |
|
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|
1324 arg_save_area, map, in_regs, in_sig_bt); |
|
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|
1325 |
|
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|
1326 address the_pc = __ pc(); |
|
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|
1327 oop_maps->add_gc_map( __ offset(), map); |
|
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|
1328 __ set_last_Java_frame(thread, rsp, noreg, the_pc); |
|
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|
1329 |
|
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|
1330 __ block_comment("block_for_jni_critical"); |
|
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1331 __ push(thread); |
|
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|
1332 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::block_for_jni_critical))); |
|
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|
1333 __ increment(rsp, wordSize); |
|
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|
1334 |
|
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|
1335 __ get_thread(thread); |
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1336 __ reset_last_Java_frame(thread, false, true); |
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1337 |
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1338 save_or_restore_arguments(masm, stack_slots, total_in_args, |
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1339 arg_save_area, NULL, in_regs, in_sig_bt); |
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1340 |
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1341 __ bind(cont); |
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1342 #ifdef ASSERT |
|
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1343 if (StressCriticalJNINatives) { |
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1344 // Stress register saving |
|
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1345 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/); |
|
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1346 save_or_restore_arguments(masm, stack_slots, total_in_args, |
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1347 arg_save_area, map, in_regs, in_sig_bt); |
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1348 // Destroy argument registers |
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1349 for (int i = 0; i < total_in_args - 1; i++) { |
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1350 if (in_regs[i].first()->is_Register()) { |
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1351 const Register reg = in_regs[i].first()->as_Register(); |
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1352 __ xorptr(reg, reg); |
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1353 } else if (in_regs[i].first()->is_XMMRegister()) { |
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1354 __ xorpd(in_regs[i].first()->as_XMMRegister(), in_regs[i].first()->as_XMMRegister()); |
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1355 } else if (in_regs[i].first()->is_FloatRegister()) { |
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1356 ShouldNotReachHere(); |
|
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1357 } else if (in_regs[i].first()->is_stack()) { |
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1358 // Nothing to do |
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1359 } else { |
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1360 ShouldNotReachHere(); |
|
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1361 } |
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1362 if (in_sig_bt[i] == T_LONG || in_sig_bt[i] == T_DOUBLE) { |
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1363 i++; |
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1364 } |
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1365 } |
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1366 |
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1367 save_or_restore_arguments(masm, stack_slots, total_in_args, |
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1368 arg_save_area, NULL, in_regs, in_sig_bt); |
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1369 } |
|
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1370 #endif |
|
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1371 } |
|
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|
1372 |
|
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1373 // Unpack an array argument into a pointer to the body and the length |
|
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1374 // if the array is non-null, otherwise pass 0 for both. |
|
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1375 static void unpack_array_argument(MacroAssembler* masm, VMRegPair reg, BasicType in_elem_type, VMRegPair body_arg, VMRegPair length_arg) { |
|
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1376 Register tmp_reg = rax; |
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|
1377 assert(!body_arg.first()->is_Register() || body_arg.first()->as_Register() != tmp_reg, |
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1378 "possible collision"); |
|
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1379 assert(!length_arg.first()->is_Register() || length_arg.first()->as_Register() != tmp_reg, |
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1380 "possible collision"); |
|
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1381 |
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|
1382 // Pass the length, ptr pair |
|
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|
1383 Label is_null, done; |
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|
1384 VMRegPair tmp(tmp_reg->as_VMReg()); |
|
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1385 if (reg.first()->is_stack()) { |
|
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1386 // Load the arg up from the stack |
|
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|
1387 simple_move32(masm, reg, tmp); |
|
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1388 reg = tmp; |
|
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1389 } |
|
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1390 __ testptr(reg.first()->as_Register(), reg.first()->as_Register()); |
|
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1391 __ jccb(Assembler::equal, is_null); |
|
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1392 __ lea(tmp_reg, Address(reg.first()->as_Register(), arrayOopDesc::base_offset_in_bytes(in_elem_type))); |
|
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|
1393 simple_move32(masm, tmp, body_arg); |
|
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1394 // load the length relative to the body. |
|
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|
1395 __ movl(tmp_reg, Address(tmp_reg, arrayOopDesc::length_offset_in_bytes() - |
|
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|
1396 arrayOopDesc::base_offset_in_bytes(in_elem_type))); |
|
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|
1397 simple_move32(masm, tmp, length_arg); |
|
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|
1398 __ jmpb(done); |
|
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|
1399 __ bind(is_null); |
|
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|
1400 // Pass zeros |
|
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1401 __ xorptr(tmp_reg, tmp_reg); |
|
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|
1402 simple_move32(masm, tmp, body_arg); |
|
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|
1403 simple_move32(masm, tmp, length_arg); |
|
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1404 __ bind(done); |
|
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|
1405 } |
|
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|
1406 |
|
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1407 static void verify_oop_args(MacroAssembler* masm, |
|
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1408 methodHandle method, |
|
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1409 const BasicType* sig_bt, |
|
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1410 const VMRegPair* regs) { |
|
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1411 Register temp_reg = rbx; // not part of any compiled calling seq |
|
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1412 if (VerifyOops) { |
|
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1413 for (int i = 0; i < method->size_of_parameters(); i++) { |
|
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1414 if (sig_bt[i] == T_OBJECT || |
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1415 sig_bt[i] == T_ARRAY) { |
|
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1416 VMReg r = regs[i].first(); |
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1417 assert(r->is_valid(), "bad oop arg"); |
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1418 if (r->is_stack()) { |
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1419 __ movptr(temp_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize)); |
|
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1420 __ verify_oop(temp_reg); |
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1421 } else { |
|
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1422 __ verify_oop(r->as_Register()); |
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1423 } |
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1424 } |
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1425 } |
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1426 } |
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1427 } |
|
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|
1428 |
|
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1429 static void gen_special_dispatch(MacroAssembler* masm, |
|
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1430 methodHandle method, |
|
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1431 const BasicType* sig_bt, |
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1432 const VMRegPair* regs) { |
|
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|
1433 verify_oop_args(masm, method, sig_bt, regs); |
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1434 vmIntrinsics::ID iid = method->intrinsic_id(); |
|
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1435 |
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1436 // Now write the args into the outgoing interpreter space |
|
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1437 bool has_receiver = false; |
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1438 Register receiver_reg = noreg; |
|
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1439 int member_arg_pos = -1; |
|
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1440 Register member_reg = noreg; |
|
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|
1441 int ref_kind = MethodHandles::signature_polymorphic_intrinsic_ref_kind(iid); |
|
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1442 if (ref_kind != 0) { |
|
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|
1443 member_arg_pos = method->size_of_parameters() - 1; // trailing MemberName argument |
|
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|
1444 member_reg = rbx; // known to be free at this point |
|
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|
1445 has_receiver = MethodHandles::ref_kind_has_receiver(ref_kind); |
|
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|
1446 } else if (iid == vmIntrinsics::_invokeBasic) { |
|
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|
1447 has_receiver = true; |
|
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1448 } else { |
|
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|
1449 fatal(err_msg_res("unexpected intrinsic id %d", iid)); |
|
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1450 } |
|
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|
1451 |
|
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1452 if (member_reg != noreg) { |
|
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|
1453 // Load the member_arg into register, if necessary. |
|
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1454 SharedRuntime::check_member_name_argument_is_last_argument(method, sig_bt, regs); |
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1455 VMReg r = regs[member_arg_pos].first(); |
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1456 if (r->is_stack()) { |
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1457 __ movptr(member_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize)); |
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1458 } else { |
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1459 // no data motion is needed |
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1460 member_reg = r->as_Register(); |
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1461 } |
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1462 } |
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1463 |
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1464 if (has_receiver) { |
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1465 // Make sure the receiver is loaded into a register. |
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1466 assert(method->size_of_parameters() > 0, "oob"); |
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1467 assert(sig_bt[0] == T_OBJECT, "receiver argument must be an object"); |
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1468 VMReg r = regs[0].first(); |
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1469 assert(r->is_valid(), "bad receiver arg"); |
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1470 if (r->is_stack()) { |
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1471 // Porting note: This assumes that compiled calling conventions always |
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1472 // pass the receiver oop in a register. If this is not true on some |
|
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1473 // platform, pick a temp and load the receiver from stack. |
|
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1474 fatal("receiver always in a register"); |
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1475 receiver_reg = rcx; // known to be free at this point |
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1476 __ movptr(receiver_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize)); |
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1477 } else { |
|
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1478 // no data motion is needed |
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1479 receiver_reg = r->as_Register(); |
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1480 } |
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1481 } |
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1482 |
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1483 // Figure out which address we are really jumping to: |
|
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1484 MethodHandles::generate_method_handle_dispatch(masm, iid, |
|
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1485 receiver_reg, member_reg, /*for_compiler_entry:*/ true); |
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1486 } |
|
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1487 |
| 0 | 1488 // --------------------------------------------------------------------------- |
| 1489 // Generate a native wrapper for a given method. The method takes arguments | |
| 1490 // in the Java compiled code convention, marshals them to the native | |
| 1491 // convention (handlizes oops, etc), transitions to native, makes the call, | |
| 1492 // returns to java state (possibly blocking), unhandlizes any result and | |
| 1493 // returns. | |
|
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1494 // |
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1495 // Critical native functions are a shorthand for the use of |
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1496 // GetPrimtiveArrayCritical and disallow the use of any other JNI |
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1497 // functions. The wrapper is expected to unpack the arguments before |
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1498 // passing them to the callee and perform checks before and after the |
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1499 // native call to ensure that they GC_locker |
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1500 // lock_critical/unlock_critical semantics are followed. Some other |
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1501 // parts of JNI setup are skipped like the tear down of the JNI handle |
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1502 // block and the check for pending exceptions it's impossible for them |
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1503 // to be thrown. |
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1504 // |
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1505 // They are roughly structured like this: |
|
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1506 // if (GC_locker::needs_gc()) |
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1507 // SharedRuntime::block_for_jni_critical(); |
|
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1508 // tranistion to thread_in_native |
|
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1509 // unpack arrray arguments and call native entry point |
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1510 // check for safepoint in progress |
|
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|
1511 // check if any thread suspend flags are set |
|
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1512 // call into JVM and possible unlock the JNI critical |
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1513 // if a GC was suppressed while in the critical native. |
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1514 // transition back to thread_in_Java |
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1515 // return to caller |
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|
1516 // |
|
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1517 nmethod* SharedRuntime::generate_native_wrapper(MacroAssembler* masm, |
| 0 | 1518 methodHandle method, |
|
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|
1519 int compile_id, |
|
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1520 BasicType* in_sig_bt, |
|
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|
1521 VMRegPair* in_regs, |
| 0 | 1522 BasicType ret_type) { |
|
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1523 if (method->is_method_handle_intrinsic()) { |
|
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|
1524 vmIntrinsics::ID iid = method->intrinsic_id(); |
|
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|
1525 intptr_t start = (intptr_t)__ pc(); |
|
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|
1526 int vep_offset = ((intptr_t)__ pc()) - start; |
|
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|
1527 gen_special_dispatch(masm, |
|
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|
1528 method, |
|
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|
1529 in_sig_bt, |
|
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|
1530 in_regs); |
|
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|
1531 int frame_complete = ((intptr_t)__ pc()) - start; // not complete, period |
|
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|
1532 __ flush(); |
|
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|
1533 int stack_slots = SharedRuntime::out_preserve_stack_slots(); // no out slots at all, actually |
|
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|
1534 return nmethod::new_native_nmethod(method, |
|
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|
1535 compile_id, |
|
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|
1536 masm->code(), |
|
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|
1537 vep_offset, |
|
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|
1538 frame_complete, |
|
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|
1539 stack_slots / VMRegImpl::slots_per_word, |
|
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|
1540 in_ByteSize(-1), |
|
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|
1541 in_ByteSize(-1), |
|
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|
1542 (OopMapSet*)NULL); |
|
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|
1543 } |
|
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|
1544 bool is_critical_native = true; |
|
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|
1545 address native_func = method->critical_native_function(); |
|
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|
1546 if (native_func == NULL) { |
|
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|
1547 native_func = method->native_function(); |
|
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|
1548 is_critical_native = false; |
|
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|
1549 } |
|
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|
1550 assert(native_func != NULL, "must have function"); |
| 0 | 1551 |
| 1552 // An OopMap for lock (and class if static) | |
| 1553 OopMapSet *oop_maps = new OopMapSet(); | |
| 1554 | |
| 1555 // We have received a description of where all the java arg are located | |
| 1556 // on entry to the wrapper. We need to convert these args to where | |
| 1557 // the jni function will expect them. To figure out where they go | |
| 1558 // we convert the java signature to a C signature by inserting | |
| 1559 // the hidden arguments as arg[0] and possibly arg[1] (static method) | |
| 1560 | |
|
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|
1561 const int total_in_args = method->size_of_parameters(); |
|
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|
1562 int total_c_args = total_in_args; |
|
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|
1563 if (!is_critical_native) { |
|
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|
1564 total_c_args += 1; |
|
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|
1565 if (method->is_static()) { |
|
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|
1566 total_c_args++; |
|
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|
1567 } |
|
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|
1568 } else { |
|
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|
1569 for (int i = 0; i < total_in_args; i++) { |
|
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|
1570 if (in_sig_bt[i] == T_ARRAY) { |
|
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|
1571 total_c_args++; |
|
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|
1572 } |
|
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|
1573 } |
| 0 | 1574 } |
| 1575 | |
| 1576 BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_c_args); | |
|
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|
1577 VMRegPair* out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_c_args); |
|
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|
1578 BasicType* in_elem_bt = NULL; |
| 0 | 1579 |
| 1580 int argc = 0; | |
|
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|
1581 if (!is_critical_native) { |
|
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|
1582 out_sig_bt[argc++] = T_ADDRESS; |
|
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|
1583 if (method->is_static()) { |
|
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|
1584 out_sig_bt[argc++] = T_OBJECT; |
|
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|
1585 } |
|
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|
1586 |
|
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|
1587 for (int i = 0; i < total_in_args ; i++ ) { |
|
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|
1588 out_sig_bt[argc++] = in_sig_bt[i]; |
|
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|
1589 } |
|
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|
1590 } else { |
|
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|
1591 Thread* THREAD = Thread::current(); |
|
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|
1592 in_elem_bt = NEW_RESOURCE_ARRAY(BasicType, total_in_args); |
|
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1593 SignatureStream ss(method->signature()); |
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1594 for (int i = 0; i < total_in_args ; i++ ) { |
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1595 if (in_sig_bt[i] == T_ARRAY) { |
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1596 // Arrays are passed as int, elem* pair |
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1597 out_sig_bt[argc++] = T_INT; |
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1598 out_sig_bt[argc++] = T_ADDRESS; |
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1599 Symbol* atype = ss.as_symbol(CHECK_NULL); |
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1600 const char* at = atype->as_C_string(); |
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1601 if (strlen(at) == 2) { |
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1602 assert(at[0] == '[', "must be"); |
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1603 switch (at[1]) { |
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1604 case 'B': in_elem_bt[i] = T_BYTE; break; |
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1605 case 'C': in_elem_bt[i] = T_CHAR; break; |
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1606 case 'D': in_elem_bt[i] = T_DOUBLE; break; |
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1607 case 'F': in_elem_bt[i] = T_FLOAT; break; |
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1608 case 'I': in_elem_bt[i] = T_INT; break; |
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1609 case 'J': in_elem_bt[i] = T_LONG; break; |
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1610 case 'S': in_elem_bt[i] = T_SHORT; break; |
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1611 case 'Z': in_elem_bt[i] = T_BOOLEAN; break; |
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1612 default: ShouldNotReachHere(); |
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1613 } |
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1614 } |
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1615 } else { |
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1616 out_sig_bt[argc++] = in_sig_bt[i]; |
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1617 in_elem_bt[i] = T_VOID; |
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1618 } |
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1619 if (in_sig_bt[i] != T_VOID) { |
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1620 assert(in_sig_bt[i] == ss.type(), "must match"); |
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1621 ss.next(); |
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1622 } |
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1623 } |
| 0 | 1624 } |
| 1625 | |
| 1626 // Now figure out where the args must be stored and how much stack space | |
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1627 // they require. |
| 0 | 1628 int out_arg_slots; |
| 14909 | 1629 out_arg_slots = c_calling_convention(out_sig_bt, out_regs, total_c_args); |
| 0 | 1630 |
| 1631 // Compute framesize for the wrapper. We need to handlize all oops in | |
| 1632 // registers a max of 2 on x86. | |
| 1633 | |
| 1634 // Calculate the total number of stack slots we will need. | |
| 1635 | |
| 1636 // First count the abi requirement plus all of the outgoing args | |
| 1637 int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots; | |
| 1638 | |
| 1639 // Now the space for the inbound oop handle area | |
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1640 int total_save_slots = 2 * VMRegImpl::slots_per_word; // 2 arguments passed in registers |
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1641 if (is_critical_native) { |
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1642 // Critical natives may have to call out so they need a save area |
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1643 // for register arguments. |
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1644 int double_slots = 0; |
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1645 int single_slots = 0; |
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1646 for ( int i = 0; i < total_in_args; i++) { |
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1647 if (in_regs[i].first()->is_Register()) { |
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1648 const Register reg = in_regs[i].first()->as_Register(); |
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1649 switch (in_sig_bt[i]) { |
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1650 case T_ARRAY: // critical array (uses 2 slots on LP64) |
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1651 case T_BOOLEAN: |
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1652 case T_BYTE: |
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1653 case T_SHORT: |
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1654 case T_CHAR: |
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1655 case T_INT: single_slots++; break; |
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1656 case T_LONG: double_slots++; break; |
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1657 default: ShouldNotReachHere(); |
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1658 } |
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1659 } else if (in_regs[i].first()->is_XMMRegister()) { |
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1660 switch (in_sig_bt[i]) { |
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1661 case T_FLOAT: single_slots++; break; |
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1662 case T_DOUBLE: double_slots++; break; |
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1663 default: ShouldNotReachHere(); |
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1664 } |
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1665 } else if (in_regs[i].first()->is_FloatRegister()) { |
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1666 ShouldNotReachHere(); |
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1667 } |
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1668 } |
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1669 total_save_slots = double_slots * 2 + single_slots; |
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1670 // align the save area |
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1671 if (double_slots != 0) { |
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1672 stack_slots = round_to(stack_slots, 2); |
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1673 } |
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1674 } |
| 0 | 1675 |
| 1676 int oop_handle_offset = stack_slots; | |
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1677 stack_slots += total_save_slots; |
| 0 | 1678 |
| 1679 // Now any space we need for handlizing a klass if static method | |
| 1680 | |
| 1681 int klass_slot_offset = 0; | |
| 1682 int klass_offset = -1; | |
| 1683 int lock_slot_offset = 0; | |
| 1684 bool is_static = false; | |
| 1685 | |
| 1686 if (method->is_static()) { | |
| 1687 klass_slot_offset = stack_slots; | |
| 1688 stack_slots += VMRegImpl::slots_per_word; | |
| 1689 klass_offset = klass_slot_offset * VMRegImpl::stack_slot_size; | |
| 1690 is_static = true; | |
| 1691 } | |
| 1692 | |
| 1693 // Plus a lock if needed | |
| 1694 | |
| 1695 if (method->is_synchronized()) { | |
| 1696 lock_slot_offset = stack_slots; | |
| 1697 stack_slots += VMRegImpl::slots_per_word; | |
| 1698 } | |
| 1699 | |
| 1700 // Now a place (+2) to save return values or temp during shuffling | |
| 1701 // + 2 for return address (which we own) and saved rbp, | |
| 1702 stack_slots += 4; | |
| 1703 | |
| 1704 // Ok The space we have allocated will look like: | |
| 1705 // | |
| 1706 // | |
| 1707 // FP-> | | | |
| 1708 // |---------------------| | |
| 1709 // | 2 slots for moves | | |
| 1710 // |---------------------| | |
| 1711 // | lock box (if sync) | | |
| 1712 // |---------------------| <- lock_slot_offset (-lock_slot_rbp_offset) | |
| 1713 // | klass (if static) | | |
| 1714 // |---------------------| <- klass_slot_offset | |
| 1715 // | oopHandle area | | |
| 1716 // |---------------------| <- oop_handle_offset (a max of 2 registers) | |
| 1717 // | outbound memory | | |
| 1718 // | based arguments | | |
| 1719 // | | | |
| 1720 // |---------------------| | |
| 1721 // | | | |
| 1722 // SP-> | out_preserved_slots | | |
| 1723 // | |
| 1724 // | |
| 1725 // **************************************************************************** | |
| 1726 // WARNING - on Windows Java Natives use pascal calling convention and pop the | |
| 1727 // arguments off of the stack after the jni call. Before the call we can use | |
| 1728 // instructions that are SP relative. After the jni call we switch to FP | |
| 1729 // relative instructions instead of re-adjusting the stack on windows. | |
| 1730 // **************************************************************************** | |
| 1731 | |
| 1732 | |
| 1733 // Now compute actual number of stack words we need rounding to make | |
| 1734 // stack properly aligned. | |
|
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1735 stack_slots = round_to(stack_slots, StackAlignmentInSlots); |
| 0 | 1736 |
| 1737 int stack_size = stack_slots * VMRegImpl::stack_slot_size; | |
| 1738 | |
| 1739 intptr_t start = (intptr_t)__ pc(); | |
| 1740 | |
| 1741 // First thing make an ic check to see if we should even be here | |
| 1742 | |
| 1743 // We are free to use all registers as temps without saving them and | |
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1744 // restoring them except rbp. rbp is the only callee save register |
| 0 | 1745 // as far as the interpreter and the compiler(s) are concerned. |
| 1746 | |
| 1747 | |
| 1748 const Register ic_reg = rax; | |
| 1749 const Register receiver = rcx; | |
| 1750 Label hit; | |
| 1751 Label exception_pending; | |
| 1752 | |
| 1753 __ verify_oop(receiver); | |
| 304 | 1754 __ cmpptr(ic_reg, Address(receiver, oopDesc::klass_offset_in_bytes())); |
| 0 | 1755 __ jcc(Assembler::equal, hit); |
| 1756 | |
| 1757 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub())); | |
| 1758 | |
| 1759 // verified entry must be aligned for code patching. | |
| 1760 // and the first 5 bytes must be in the same cache line | |
| 1761 // if we align at 8 then we will be sure 5 bytes are in the same line | |
| 1762 __ align(8); | |
| 1763 | |
| 1764 __ bind(hit); | |
| 1765 | |
| 1766 int vep_offset = ((intptr_t)__ pc()) - start; | |
| 1767 | |
| 1768 #ifdef COMPILER1 | |
| 1769 if (InlineObjectHash && method->intrinsic_id() == vmIntrinsics::_hashCode) { | |
| 1770 // Object.hashCode can pull the hashCode from the header word | |
| 1771 // instead of doing a full VM transition once it's been computed. | |
| 1772 // Since hashCode is usually polymorphic at call sites we can't do | |
| 1773 // this optimization at the call site without a lot of work. | |
| 1774 Label slowCase; | |
| 1775 Register receiver = rcx; | |
| 1776 Register result = rax; | |
| 304 | 1777 __ movptr(result, Address(receiver, oopDesc::mark_offset_in_bytes())); |
| 0 | 1778 |
| 1779 // check if locked | |
| 304 | 1780 __ testptr(result, markOopDesc::unlocked_value); |
| 0 | 1781 __ jcc (Assembler::zero, slowCase); |
| 1782 | |
| 1783 if (UseBiasedLocking) { | |
| 1784 // Check if biased and fall through to runtime if so | |
| 304 | 1785 __ testptr(result, markOopDesc::biased_lock_bit_in_place); |
| 0 | 1786 __ jcc (Assembler::notZero, slowCase); |
| 1787 } | |
| 1788 | |
| 1789 // get hash | |
| 304 | 1790 __ andptr(result, markOopDesc::hash_mask_in_place); |
| 0 | 1791 // test if hashCode exists |
| 1792 __ jcc (Assembler::zero, slowCase); | |
| 304 | 1793 __ shrptr(result, markOopDesc::hash_shift); |
| 0 | 1794 __ ret(0); |
| 1795 __ bind (slowCase); | |
| 1796 } | |
| 1797 #endif // COMPILER1 | |
| 1798 | |
| 1799 // The instruction at the verified entry point must be 5 bytes or longer | |
| 1800 // because it can be patched on the fly by make_non_entrant. The stack bang | |
| 1801 // instruction fits that requirement. | |
| 1802 | |
| 1803 // Generate stack overflow check | |
| 1804 | |
| 1805 if (UseStackBanging) { | |
| 1806 __ bang_stack_with_offset(StackShadowPages*os::vm_page_size()); | |
| 1807 } else { | |
| 1808 // need a 5 byte instruction to allow MT safe patching to non-entrant | |
| 1809 __ fat_nop(); | |
| 1810 } | |
| 1811 | |
| 1812 // Generate a new frame for the wrapper. | |
| 1813 __ enter(); | |
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1814 // -2 because return address is already present and so is saved rbp |
| 304 | 1815 __ subptr(rsp, stack_size - 2*wordSize); |
| 0 | 1816 |
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1817 // Frame is now completed as far as size and linkage. |
| 0 | 1818 int frame_complete = ((intptr_t)__ pc()) - start; |
| 1819 | |
| 1820 // Calculate the difference between rsp and rbp,. We need to know it | |
| 1821 // after the native call because on windows Java Natives will pop | |
| 1822 // the arguments and it is painful to do rsp relative addressing | |
| 1823 // in a platform independent way. So after the call we switch to | |
| 1824 // rbp, relative addressing. | |
| 1825 | |
| 1826 int fp_adjustment = stack_size - 2*wordSize; | |
| 1827 | |
| 1828 #ifdef COMPILER2 | |
| 1829 // C2 may leave the stack dirty if not in SSE2+ mode | |
| 1830 if (UseSSE >= 2) { | |
| 1831 __ verify_FPU(0, "c2i transition should have clean FPU stack"); | |
| 1832 } else { | |
| 1833 __ empty_FPU_stack(); | |
| 1834 } | |
| 1835 #endif /* COMPILER2 */ | |
| 1836 | |
| 1837 // Compute the rbp, offset for any slots used after the jni call | |
| 1838 | |
| 1839 int lock_slot_rbp_offset = (lock_slot_offset*VMRegImpl::stack_slot_size) - fp_adjustment; | |
| 1840 | |
| 1841 // We use rdi as a thread pointer because it is callee save and | |
| 1842 // if we load it once it is usable thru the entire wrapper | |
| 1843 const Register thread = rdi; | |
| 1844 | |
| 1845 // We use rsi as the oop handle for the receiver/klass | |
| 1846 // It is callee save so it survives the call to native | |
| 1847 | |
| 1848 const Register oop_handle_reg = rsi; | |
| 1849 | |
| 1850 __ get_thread(thread); | |
| 1851 | |
|
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1852 if (is_critical_native) { |
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1853 check_needs_gc_for_critical_native(masm, thread, stack_slots, total_c_args, total_in_args, |
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1854 oop_handle_offset, oop_maps, in_regs, in_sig_bt); |
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1855 } |
| 0 | 1856 |
| 1857 // | |
| 1858 // We immediately shuffle the arguments so that any vm call we have to | |
| 1859 // make from here on out (sync slow path, jvmti, etc.) we will have | |
| 1860 // captured the oops from our caller and have a valid oopMap for | |
| 1861 // them. | |
| 1862 | |
| 1863 // ----------------- | |
| 1864 // The Grand Shuffle | |
| 1865 // | |
| 1866 // Natives require 1 or 2 extra arguments over the normal ones: the JNIEnv* | |
| 1867 // and, if static, the class mirror instead of a receiver. This pretty much | |
| 1868 // guarantees that register layout will not match (and x86 doesn't use reg | |
| 1869 // parms though amd does). Since the native abi doesn't use register args | |
| 1870 // and the java conventions does we don't have to worry about collisions. | |
| 1871 // All of our moved are reg->stack or stack->stack. | |
| 1872 // We ignore the extra arguments during the shuffle and handle them at the | |
| 1873 // last moment. The shuffle is described by the two calling convention | |
| 1874 // vectors we have in our possession. We simply walk the java vector to | |
| 1875 // get the source locations and the c vector to get the destinations. | |
| 1876 | |
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1877 int c_arg = is_critical_native ? 0 : (method->is_static() ? 2 : 1 ); |
| 0 | 1878 |
| 1879 // Record rsp-based slot for receiver on stack for non-static methods | |
| 1880 int receiver_offset = -1; | |
| 1881 | |
| 1882 // This is a trick. We double the stack slots so we can claim | |
| 1883 // the oops in the caller's frame. Since we are sure to have | |
| 1884 // more args than the caller doubling is enough to make | |
| 1885 // sure we can capture all the incoming oop args from the | |
| 1886 // caller. | |
| 1887 // | |
| 1888 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/); | |
| 1889 | |
| 1890 // Mark location of rbp, | |
| 1891 // map->set_callee_saved(VMRegImpl::stack2reg( stack_slots - 2), stack_slots * 2, 0, rbp->as_VMReg()); | |
| 1892 | |
| 1893 // We know that we only have args in at most two integer registers (rcx, rdx). So rax, rbx | |
| 1894 // Are free to temporaries if we have to do stack to steck moves. | |
| 1895 // All inbound args are referenced based on rbp, and all outbound args via rsp. | |
| 1896 | |
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1897 for (int i = 0; i < total_in_args ; i++, c_arg++ ) { |
| 0 | 1898 switch (in_sig_bt[i]) { |
| 1899 case T_ARRAY: | |
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1900 if (is_critical_native) { |
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1901 unpack_array_argument(masm, in_regs[i], in_elem_bt[i], out_regs[c_arg + 1], out_regs[c_arg]); |
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1902 c_arg++; |
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1903 break; |
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1904 } |
| 0 | 1905 case T_OBJECT: |
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1906 assert(!is_critical_native, "no oop arguments"); |
| 0 | 1907 object_move(masm, map, oop_handle_offset, stack_slots, in_regs[i], out_regs[c_arg], |
| 1908 ((i == 0) && (!is_static)), | |
| 1909 &receiver_offset); | |
| 1910 break; | |
| 1911 case T_VOID: | |
| 1912 break; | |
| 1913 | |
| 1914 case T_FLOAT: | |
| 1915 float_move(masm, in_regs[i], out_regs[c_arg]); | |
| 1916 break; | |
| 1917 | |
| 1918 case T_DOUBLE: | |
| 1919 assert( i + 1 < total_in_args && | |
| 1920 in_sig_bt[i + 1] == T_VOID && | |
| 1921 out_sig_bt[c_arg+1] == T_VOID, "bad arg list"); | |
| 1922 double_move(masm, in_regs[i], out_regs[c_arg]); | |
| 1923 break; | |
| 1924 | |
| 1925 case T_LONG : | |
| 1926 long_move(masm, in_regs[i], out_regs[c_arg]); | |
| 1927 break; | |
| 1928 | |
| 1929 case T_ADDRESS: assert(false, "found T_ADDRESS in java args"); | |
| 1930 | |
| 1931 default: | |
| 1932 simple_move32(masm, in_regs[i], out_regs[c_arg]); | |
| 1933 } | |
| 1934 } | |
| 1935 | |
| 1936 // Pre-load a static method's oop into rsi. Used both by locking code and | |
| 1937 // the normal JNI call code. | |
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1938 if (method->is_static() && !is_critical_native) { |
| 0 | 1939 |
| 1940 // load opp into a register | |
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1941 __ movoop(oop_handle_reg, JNIHandles::make_local(method->method_holder()->java_mirror())); |
| 0 | 1942 |
| 1943 // Now handlize the static class mirror it's known not-null. | |
| 304 | 1944 __ movptr(Address(rsp, klass_offset), oop_handle_reg); |
| 0 | 1945 map->set_oop(VMRegImpl::stack2reg(klass_slot_offset)); |
| 1946 | |
| 1947 // Now get the handle | |
| 304 | 1948 __ lea(oop_handle_reg, Address(rsp, klass_offset)); |
| 0 | 1949 // store the klass handle as second argument |
| 304 | 1950 __ movptr(Address(rsp, wordSize), oop_handle_reg); |
| 0 | 1951 } |
| 1952 | |
| 1953 // Change state to native (we save the return address in the thread, since it might not | |
| 1954 // be pushed on the stack when we do a a stack traversal). It is enough that the pc() | |
| 1955 // points into the right code segment. It does not have to be the correct return pc. | |
| 1956 // We use the same pc/oopMap repeatedly when we call out | |
| 1957 | |
| 1958 intptr_t the_pc = (intptr_t) __ pc(); | |
| 1959 oop_maps->add_gc_map(the_pc - start, map); | |
| 1960 | |
| 1961 __ set_last_Java_frame(thread, rsp, noreg, (address)the_pc); | |
| 1962 | |
| 1963 | |
| 1964 // We have all of the arguments setup at this point. We must not touch any register | |
| 1965 // argument registers at this point (what if we save/restore them there are no oop? | |
| 1966 | |
| 1967 { | |
| 1968 SkipIfEqual skip_if(masm, &DTraceMethodProbes, 0); | |
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1969 __ mov_metadata(rax, method()); |
| 0 | 1970 __ call_VM_leaf( |
| 1971 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_entry), | |
| 1972 thread, rax); | |
| 1973 } | |
| 1974 | |
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1975 // RedefineClasses() tracing support for obsolete method entry |
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1976 if (RC_TRACE_IN_RANGE(0x00001000, 0x00002000)) { |
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1977 __ mov_metadata(rax, method()); |
|
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1978 __ call_VM_leaf( |
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1979 CAST_FROM_FN_PTR(address, SharedRuntime::rc_trace_method_entry), |
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1980 thread, rax); |
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1981 } |
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1982 |
| 0 | 1983 // These are register definitions we need for locking/unlocking |
| 1984 const Register swap_reg = rax; // Must use rax, for cmpxchg instruction | |
| 1985 const Register obj_reg = rcx; // Will contain the oop | |
| 1986 const Register lock_reg = rdx; // Address of compiler lock object (BasicLock) | |
| 1987 | |
| 1988 Label slow_path_lock; | |
| 1989 Label lock_done; | |
| 1990 | |
| 1991 // Lock a synchronized method | |
| 1992 if (method->is_synchronized()) { | |
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1993 assert(!is_critical_native, "unhandled"); |
| 0 | 1994 |
| 1995 | |
| 1996 const int mark_word_offset = BasicLock::displaced_header_offset_in_bytes(); | |
| 1997 | |
| 1998 // Get the handle (the 2nd argument) | |
| 304 | 1999 __ movptr(oop_handle_reg, Address(rsp, wordSize)); |
| 0 | 2000 |
| 2001 // Get address of the box | |
| 2002 | |
| 304 | 2003 __ lea(lock_reg, Address(rbp, lock_slot_rbp_offset)); |
| 0 | 2004 |
| 2005 // Load the oop from the handle | |
| 304 | 2006 __ movptr(obj_reg, Address(oop_handle_reg, 0)); |
| 0 | 2007 |
| 2008 if (UseBiasedLocking) { | |
| 2009 // Note that oop_handle_reg is trashed during this call | |
| 2010 __ biased_locking_enter(lock_reg, obj_reg, swap_reg, oop_handle_reg, false, lock_done, &slow_path_lock); | |
| 2011 } | |
| 2012 | |
| 2013 // Load immediate 1 into swap_reg %rax, | |
| 304 | 2014 __ movptr(swap_reg, 1); |
| 0 | 2015 |
| 2016 // Load (object->mark() | 1) into swap_reg %rax, | |
| 304 | 2017 __ orptr(swap_reg, Address(obj_reg, 0)); |
| 0 | 2018 |
| 2019 // Save (object->mark() | 1) into BasicLock's displaced header | |
| 304 | 2020 __ movptr(Address(lock_reg, mark_word_offset), swap_reg); |
| 0 | 2021 |
| 2022 if (os::is_MP()) { | |
| 2023 __ lock(); | |
| 2024 } | |
| 2025 | |
| 2026 // src -> dest iff dest == rax, else rax, <- dest | |
| 2027 // *obj_reg = lock_reg iff *obj_reg == rax, else rax, = *(obj_reg) | |
| 304 | 2028 __ cmpxchgptr(lock_reg, Address(obj_reg, 0)); |
| 0 | 2029 __ jcc(Assembler::equal, lock_done); |
| 2030 | |
| 2031 // Test if the oopMark is an obvious stack pointer, i.e., | |
| 2032 // 1) (mark & 3) == 0, and | |
| 2033 // 2) rsp <= mark < mark + os::pagesize() | |
| 2034 // These 3 tests can be done by evaluating the following | |
| 2035 // expression: ((mark - rsp) & (3 - os::vm_page_size())), | |
| 2036 // assuming both stack pointer and pagesize have their | |
| 2037 // least significant 2 bits clear. | |
| 2038 // NOTE: the oopMark is in swap_reg %rax, as the result of cmpxchg | |
| 2039 | |
| 304 | 2040 __ subptr(swap_reg, rsp); |
| 2041 __ andptr(swap_reg, 3 - os::vm_page_size()); | |
| 0 | 2042 |
| 2043 // Save the test result, for recursive case, the result is zero | |
| 304 | 2044 __ movptr(Address(lock_reg, mark_word_offset), swap_reg); |
| 0 | 2045 __ jcc(Assembler::notEqual, slow_path_lock); |
| 2046 // Slow path will re-enter here | |
| 2047 __ bind(lock_done); | |
| 2048 | |
| 2049 if (UseBiasedLocking) { | |
| 2050 // Re-fetch oop_handle_reg as we trashed it above | |
| 304 | 2051 __ movptr(oop_handle_reg, Address(rsp, wordSize)); |
| 0 | 2052 } |
| 2053 } | |
| 2054 | |
| 2055 | |
| 2056 // Finally just about ready to make the JNI call | |
| 2057 | |
| 2058 | |
| 2059 // get JNIEnv* which is first argument to native | |
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2060 if (!is_critical_native) { |
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2061 __ lea(rdx, Address(thread, in_bytes(JavaThread::jni_environment_offset()))); |
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2062 __ movptr(Address(rsp, 0), rdx); |
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2063 } |
| 0 | 2064 |
| 2065 // Now set thread in native | |
| 2066 __ movl(Address(thread, JavaThread::thread_state_offset()), _thread_in_native); | |
| 2067 | |
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2068 __ call(RuntimeAddress(native_func)); |
| 0 | 2069 |
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2070 // Verify or restore cpu control state after JNI call |
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2071 __ restore_cpu_control_state_after_jni(); |
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2072 |
| 0 | 2073 // WARNING - on Windows Java Natives use pascal calling convention and pop the |
| 2074 // arguments off of the stack. We could just re-adjust the stack pointer here | |
| 2075 // and continue to do SP relative addressing but we instead switch to FP | |
| 2076 // relative addressing. | |
| 2077 | |
| 2078 // Unpack native results. | |
| 2079 switch (ret_type) { | |
| 2080 case T_BOOLEAN: __ c2bool(rax); break; | |
| 304 | 2081 case T_CHAR : __ andptr(rax, 0xFFFF); break; |
| 0 | 2082 case T_BYTE : __ sign_extend_byte (rax); break; |
| 2083 case T_SHORT : __ sign_extend_short(rax); break; | |
| 2084 case T_INT : /* nothing to do */ break; | |
| 2085 case T_DOUBLE : | |
| 2086 case T_FLOAT : | |
| 2087 // Result is in st0 we'll save as needed | |
| 2088 break; | |
| 2089 case T_ARRAY: // Really a handle | |
| 2090 case T_OBJECT: // Really a handle | |
| 2091 break; // can't de-handlize until after safepoint check | |
| 2092 case T_VOID: break; | |
| 2093 case T_LONG: break; | |
| 2094 default : ShouldNotReachHere(); | |
| 2095 } | |
| 2096 | |
| 2097 // Switch thread to "native transition" state before reading the synchronization state. | |
| 2098 // This additional state is necessary because reading and testing the synchronization | |
| 2099 // state is not atomic w.r.t. GC, as this scenario demonstrates: | |
| 2100 // Java thread A, in _thread_in_native state, loads _not_synchronized and is preempted. | |
| 2101 // VM thread changes sync state to synchronizing and suspends threads for GC. | |
| 2102 // Thread A is resumed to finish this native method, but doesn't block here since it | |
| 2103 // didn't see any synchronization is progress, and escapes. | |
| 2104 __ movl(Address(thread, JavaThread::thread_state_offset()), _thread_in_native_trans); | |
| 2105 | |
| 2106 if(os::is_MP()) { | |
| 2107 if (UseMembar) { | |
| 304 | 2108 // Force this write out before the read below |
| 2109 __ membar(Assembler::Membar_mask_bits( | |
| 2110 Assembler::LoadLoad | Assembler::LoadStore | | |
| 2111 Assembler::StoreLoad | Assembler::StoreStore)); | |
| 0 | 2112 } else { |
| 2113 // Write serialization page so VM thread can do a pseudo remote membar. | |
| 2114 // We use the current thread pointer to calculate a thread specific | |
| 2115 // offset to write to within the page. This minimizes bus traffic | |
| 2116 // due to cache line collision. | |
| 2117 __ serialize_memory(thread, rcx); | |
| 2118 } | |
| 2119 } | |
| 2120 | |
| 2121 if (AlwaysRestoreFPU) { | |
| 2122 // Make sure the control word is correct. | |
| 2123 __ fldcw(ExternalAddress(StubRoutines::addr_fpu_cntrl_wrd_std())); | |
| 2124 } | |
| 2125 | |
|
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2126 Label after_transition; |
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2127 |
| 0 | 2128 // check for safepoint operation in progress and/or pending suspend requests |
| 2129 { Label Continue; | |
| 2130 | |
| 2131 __ cmp32(ExternalAddress((address)SafepointSynchronize::address_of_state()), | |
| 2132 SafepointSynchronize::_not_synchronized); | |
| 2133 | |
| 2134 Label L; | |
| 2135 __ jcc(Assembler::notEqual, L); | |
| 2136 __ cmpl(Address(thread, JavaThread::suspend_flags_offset()), 0); | |
| 2137 __ jcc(Assembler::equal, Continue); | |
| 2138 __ bind(L); | |
| 2139 | |
| 2140 // Don't use call_VM as it will see a possible pending exception and forward it | |
| 2141 // and never return here preventing us from clearing _last_native_pc down below. | |
| 2142 // Also can't use call_VM_leaf either as it will check to see if rsi & rdi are | |
| 2143 // preserved and correspond to the bcp/locals pointers. So we do a runtime call | |
| 2144 // by hand. | |
| 2145 // | |
| 2146 save_native_result(masm, ret_type, stack_slots); | |
| 304 | 2147 __ push(thread); |
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2148 if (!is_critical_native) { |
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2149 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, |
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2150 JavaThread::check_special_condition_for_native_trans))); |
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2151 } else { |
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2152 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, |
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2153 JavaThread::check_special_condition_for_native_trans_and_transition))); |
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2154 } |
| 0 | 2155 __ increment(rsp, wordSize); |
| 2156 // Restore any method result value | |
| 2157 restore_native_result(masm, ret_type, stack_slots); | |
| 2158 | |
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2159 if (is_critical_native) { |
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2160 // The call above performed the transition to thread_in_Java so |
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2161 // skip the transition logic below. |
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2162 __ jmpb(after_transition); |
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2163 } |
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2164 |
| 0 | 2165 __ bind(Continue); |
| 2166 } | |
| 2167 | |
| 2168 // change thread state | |
| 2169 __ movl(Address(thread, JavaThread::thread_state_offset()), _thread_in_Java); | |
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2170 __ bind(after_transition); |
| 0 | 2171 |
| 2172 Label reguard; | |
| 2173 Label reguard_done; | |
| 2174 __ cmpl(Address(thread, JavaThread::stack_guard_state_offset()), JavaThread::stack_guard_yellow_disabled); | |
| 2175 __ jcc(Assembler::equal, reguard); | |
| 2176 | |
| 2177 // slow path reguard re-enters here | |
| 2178 __ bind(reguard_done); | |
| 2179 | |
| 2180 // Handle possible exception (will unlock if necessary) | |
| 2181 | |
| 2182 // native result if any is live | |
| 2183 | |
| 2184 // Unlock | |
| 2185 Label slow_path_unlock; | |
| 2186 Label unlock_done; | |
| 2187 if (method->is_synchronized()) { | |
| 2188 | |
| 2189 Label done; | |
| 2190 | |
| 2191 // Get locked oop from the handle we passed to jni | |
| 304 | 2192 __ movptr(obj_reg, Address(oop_handle_reg, 0)); |
| 0 | 2193 |
| 2194 if (UseBiasedLocking) { | |
| 2195 __ biased_locking_exit(obj_reg, rbx, done); | |
| 2196 } | |
| 2197 | |
| 2198 // Simple recursive lock? | |
| 2199 | |
| 304 | 2200 __ cmpptr(Address(rbp, lock_slot_rbp_offset), (int32_t)NULL_WORD); |
| 0 | 2201 __ jcc(Assembler::equal, done); |
| 2202 | |
| 2203 // Must save rax, if if it is live now because cmpxchg must use it | |
| 2204 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) { | |
| 2205 save_native_result(masm, ret_type, stack_slots); | |
| 2206 } | |
| 2207 | |
| 2208 // get old displaced header | |
| 304 | 2209 __ movptr(rbx, Address(rbp, lock_slot_rbp_offset)); |
| 0 | 2210 |
| 2211 // get address of the stack lock | |
| 304 | 2212 __ lea(rax, Address(rbp, lock_slot_rbp_offset)); |
| 0 | 2213 |
| 2214 // Atomic swap old header if oop still contains the stack lock | |
| 2215 if (os::is_MP()) { | |
| 2216 __ lock(); | |
| 2217 } | |
| 2218 | |
| 2219 // src -> dest iff dest == rax, else rax, <- dest | |
| 2220 // *obj_reg = rbx, iff *obj_reg == rax, else rax, = *(obj_reg) | |
| 304 | 2221 __ cmpxchgptr(rbx, Address(obj_reg, 0)); |
| 0 | 2222 __ jcc(Assembler::notEqual, slow_path_unlock); |
| 2223 | |
| 2224 // slow path re-enters here | |
| 2225 __ bind(unlock_done); | |
| 2226 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) { | |
| 2227 restore_native_result(masm, ret_type, stack_slots); | |
| 2228 } | |
| 2229 | |
| 2230 __ bind(done); | |
| 2231 | |
| 2232 } | |
| 2233 | |
| 2234 { | |
| 2235 SkipIfEqual skip_if(masm, &DTraceMethodProbes, 0); | |
| 2236 // Tell dtrace about this method exit | |
| 2237 save_native_result(masm, ret_type, stack_slots); | |
|
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2238 __ mov_metadata(rax, method()); |
| 0 | 2239 __ call_VM_leaf( |
| 2240 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_exit), | |
| 2241 thread, rax); | |
| 2242 restore_native_result(masm, ret_type, stack_slots); | |
| 2243 } | |
| 2244 | |
| 2245 // We can finally stop using that last_Java_frame we setup ages ago | |
| 2246 | |
| 2247 __ reset_last_Java_frame(thread, false, true); | |
| 2248 | |
| 2249 // Unpack oop result | |
| 2250 if (ret_type == T_OBJECT || ret_type == T_ARRAY) { | |
| 2251 Label L; | |
| 304 | 2252 __ cmpptr(rax, (int32_t)NULL_WORD); |
| 0 | 2253 __ jcc(Assembler::equal, L); |
| 304 | 2254 __ movptr(rax, Address(rax, 0)); |
| 0 | 2255 __ bind(L); |
| 2256 __ verify_oop(rax); | |
| 2257 } | |
| 2258 | |
|
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2259 if (!is_critical_native) { |
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|
2260 // reset handle block |
|
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2261 __ movptr(rcx, Address(thread, JavaThread::active_handles_offset())); |
|
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2262 __ movptr(Address(rcx, JNIHandleBlock::top_offset_in_bytes()), NULL_WORD); |
|
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2263 |
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|
2264 // Any exception pending? |
|
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|
2265 __ cmpptr(Address(thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD); |
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2266 __ jcc(Assembler::notEqual, exception_pending); |
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|
2267 } |
| 0 | 2268 |
| 2269 // no exception, we're almost done | |
| 2270 | |
| 2271 // check that only result value is on FPU stack | |
| 2272 __ verify_FPU(ret_type == T_FLOAT || ret_type == T_DOUBLE ? 1 : 0, "native_wrapper normal exit"); | |
| 2273 | |
| 2274 // Fixup floating pointer results so that result looks like a return from a compiled method | |
| 2275 if (ret_type == T_FLOAT) { | |
| 2276 if (UseSSE >= 1) { | |
| 2277 // Pop st0 and store as float and reload into xmm register | |
| 2278 __ fstp_s(Address(rbp, -4)); | |
| 2279 __ movflt(xmm0, Address(rbp, -4)); | |
| 2280 } | |
| 2281 } else if (ret_type == T_DOUBLE) { | |
| 2282 if (UseSSE >= 2) { | |
| 2283 // Pop st0 and store as double and reload into xmm register | |
| 2284 __ fstp_d(Address(rbp, -8)); | |
| 2285 __ movdbl(xmm0, Address(rbp, -8)); | |
| 2286 } | |
| 2287 } | |
| 2288 | |
| 2289 // Return | |
| 2290 | |
| 2291 __ leave(); | |
| 2292 __ ret(0); | |
| 2293 | |
| 2294 // Unexpected paths are out of line and go here | |
| 2295 | |
| 2296 // Slow path locking & unlocking | |
| 2297 if (method->is_synchronized()) { | |
| 2298 | |
| 2299 // BEGIN Slow path lock | |
| 2300 | |
| 2301 __ bind(slow_path_lock); | |
| 2302 | |
| 2303 // has last_Java_frame setup. No exceptions so do vanilla call not call_VM | |
| 2304 // args are (oop obj, BasicLock* lock, JavaThread* thread) | |
| 304 | 2305 __ push(thread); |
| 2306 __ push(lock_reg); | |
| 2307 __ push(obj_reg); | |
| 0 | 2308 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_locking_C))); |
| 304 | 2309 __ addptr(rsp, 3*wordSize); |
| 0 | 2310 |
| 2311 #ifdef ASSERT | |
| 2312 { Label L; | |
| 304 | 2313 __ cmpptr(Address(thread, in_bytes(Thread::pending_exception_offset())), (int)NULL_WORD); |
| 0 | 2314 __ jcc(Assembler::equal, L); |
| 2315 __ stop("no pending exception allowed on exit from monitorenter"); | |
| 2316 __ bind(L); | |
| 2317 } | |
| 2318 #endif | |
| 2319 __ jmp(lock_done); | |
| 2320 | |
| 2321 // END Slow path lock | |
| 2322 | |
| 2323 // BEGIN Slow path unlock | |
| 2324 __ bind(slow_path_unlock); | |
| 2325 | |
| 2326 // Slow path unlock | |
| 2327 | |
| 2328 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) { | |
| 2329 save_native_result(masm, ret_type, stack_slots); | |
| 2330 } | |
| 2331 // Save pending exception around call to VM (which contains an EXCEPTION_MARK) | |
| 2332 | |
| 304 | 2333 __ pushptr(Address(thread, in_bytes(Thread::pending_exception_offset()))); |
|
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|
2334 __ movptr(Address(thread, in_bytes(Thread::pending_exception_offset())), NULL_WORD); |
| 0 | 2335 |
| 2336 | |
| 2337 // should be a peal | |
| 2338 // +wordSize because of the push above | |
| 304 | 2339 __ lea(rax, Address(rbp, lock_slot_rbp_offset)); |
| 2340 __ push(rax); | |
| 2341 | |
| 2342 __ push(obj_reg); | |
| 0 | 2343 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_unlocking_C))); |
| 304 | 2344 __ addptr(rsp, 2*wordSize); |
| 0 | 2345 #ifdef ASSERT |
| 2346 { | |
| 2347 Label L; | |
| 304 | 2348 __ cmpptr(Address(thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD); |
| 0 | 2349 __ jcc(Assembler::equal, L); |
| 2350 __ stop("no pending exception allowed on exit complete_monitor_unlocking_C"); | |
| 2351 __ bind(L); | |
| 2352 } | |
| 2353 #endif /* ASSERT */ | |
| 2354 | |
| 304 | 2355 __ popptr(Address(thread, in_bytes(Thread::pending_exception_offset()))); |
| 0 | 2356 |
| 2357 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) { | |
| 2358 restore_native_result(masm, ret_type, stack_slots); | |
| 2359 } | |
| 2360 __ jmp(unlock_done); | |
| 2361 // END Slow path unlock | |
| 2362 | |
| 2363 } | |
| 2364 | |
| 2365 // SLOW PATH Reguard the stack if needed | |
| 2366 | |
| 2367 __ bind(reguard); | |
| 2368 save_native_result(masm, ret_type, stack_slots); | |
| 2369 { | |
| 2370 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::reguard_yellow_pages))); | |
| 2371 } | |
| 2372 restore_native_result(masm, ret_type, stack_slots); | |
| 2373 __ jmp(reguard_done); | |
| 2374 | |
| 2375 | |
| 2376 // BEGIN EXCEPTION PROCESSING | |
| 2377 | |
|
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|
2378 if (!is_critical_native) { |
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|
2379 // Forward the exception |
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|
2380 __ bind(exception_pending); |
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|
2381 |
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|
2382 // remove possible return value from FPU register stack |
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|
2383 __ empty_FPU_stack(); |
|
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|
2384 |
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|
2385 // pop our frame |
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|
2386 __ leave(); |
|
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|
2387 // and forward the exception |
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|
2388 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry())); |
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|
2389 } |
| 0 | 2390 |
| 2391 __ flush(); | |
| 2392 | |
| 2393 nmethod *nm = nmethod::new_native_nmethod(method, | |
|
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|
2394 compile_id, |
| 0 | 2395 masm->code(), |
| 2396 vep_offset, | |
| 2397 frame_complete, | |
| 2398 stack_slots / VMRegImpl::slots_per_word, | |
| 2399 (is_static ? in_ByteSize(klass_offset) : in_ByteSize(receiver_offset)), | |
| 2400 in_ByteSize(lock_slot_offset*VMRegImpl::stack_slot_size), | |
| 2401 oop_maps); | |
|
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|
2402 |
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|
2403 if (is_critical_native) { |
|
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|
2404 nm->set_lazy_critical_native(true); |
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|
2405 } |
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|
2406 |
| 0 | 2407 return nm; |
| 2408 | |
| 2409 } | |
| 2410 | |
|
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2411 #ifdef HAVE_DTRACE_H |
|
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2412 // --------------------------------------------------------------------------- |
|
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2413 // Generate a dtrace nmethod for a given signature. The method takes arguments |
|
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2414 // in the Java compiled code convention, marshals them to the native |
|
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|
2415 // abi and then leaves nops at the position you would expect to call a native |
|
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|
2416 // function. When the probe is enabled the nops are replaced with a trap |
|
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2417 // instruction that dtrace inserts and the trace will cause a notification |
|
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|
2418 // to dtrace. |
|
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|
2419 // |
|
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2420 // The probes are only able to take primitive types and java/lang/String as |
|
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|
2421 // arguments. No other java types are allowed. Strings are converted to utf8 |
|
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|
2422 // strings so that from dtrace point of view java strings are converted to C |
|
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|
2423 // strings. There is an arbitrary fixed limit on the total space that a method |
|
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|
2424 // can use for converting the strings. (256 chars per string in the signature). |
|
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|
2425 // So any java string larger then this is truncated. |
|
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|
2426 |
|
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|
2427 nmethod *SharedRuntime::generate_dtrace_nmethod( |
|
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|
2428 MacroAssembler *masm, methodHandle method) { |
|
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|
2429 |
|
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|
2430 // generate_dtrace_nmethod is guarded by a mutex so we are sure to |
|
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|
2431 // be single threaded in this method. |
|
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|
2432 assert(AdapterHandlerLibrary_lock->owned_by_self(), "must be"); |
|
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|
2433 |
|
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|
2434 // Fill in the signature array, for the calling-convention call. |
|
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|
2435 int total_args_passed = method->size_of_parameters(); |
|
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2436 |
|
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|
2437 BasicType* in_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_args_passed); |
|
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|
2438 VMRegPair *in_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_args_passed); |
|
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|
2439 |
|
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|
2440 // The signature we are going to use for the trap that dtrace will see |
|
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2441 // java/lang/String is converted. We drop "this" and any other object |
|
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|
2442 // is converted to NULL. (A one-slot java/lang/Long object reference |
|
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|
2443 // is converted to a two-slot long, which is why we double the allocation). |
|
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|
2444 BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_args_passed * 2); |
|
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|
2445 VMRegPair* out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_args_passed * 2); |
|
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|
2446 |
|
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|
2447 int i=0; |
|
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|
2448 int total_strings = 0; |
|
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|
2449 int first_arg_to_pass = 0; |
|
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|
2450 int total_c_args = 0; |
|
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|
2451 |
|
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|
2452 if( !method->is_static() ) { // Pass in receiver first |
|
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|
2453 in_sig_bt[i++] = T_OBJECT; |
|
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|
2454 first_arg_to_pass = 1; |
|
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|
2455 } |
|
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|
2456 |
|
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|
2457 // We need to convert the java args to where a native (non-jni) function |
|
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|
2458 // would expect them. To figure out where they go we convert the java |
|
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|
2459 // signature to a C signature. |
|
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|
2460 |
|
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|
2461 SignatureStream ss(method->signature()); |
|
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2462 for ( ; !ss.at_return_type(); ss.next()) { |
|
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2463 BasicType bt = ss.type(); |
|
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2464 in_sig_bt[i++] = bt; // Collect remaining bits of signature |
|
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2465 out_sig_bt[total_c_args++] = bt; |
|
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2466 if( bt == T_OBJECT) { |
|
2177
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2467 Symbol* s = ss.as_symbol_or_null(); // symbol is created |
|
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2468 if (s == vmSymbols::java_lang_String()) { |
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2469 total_strings++; |
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2470 out_sig_bt[total_c_args-1] = T_ADDRESS; |
|
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2471 } else if (s == vmSymbols::java_lang_Boolean() || |
|
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2472 s == vmSymbols::java_lang_Character() || |
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2473 s == vmSymbols::java_lang_Byte() || |
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2474 s == vmSymbols::java_lang_Short() || |
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2475 s == vmSymbols::java_lang_Integer() || |
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2476 s == vmSymbols::java_lang_Float()) { |
|
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2477 out_sig_bt[total_c_args-1] = T_INT; |
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2478 } else if (s == vmSymbols::java_lang_Long() || |
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2479 s == vmSymbols::java_lang_Double()) { |
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2480 out_sig_bt[total_c_args-1] = T_LONG; |
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2481 out_sig_bt[total_c_args++] = T_VOID; |
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2482 } |
|
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2483 } else if ( bt == T_LONG || bt == T_DOUBLE ) { |
|
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2484 in_sig_bt[i++] = T_VOID; // Longs & doubles take 2 Java slots |
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2485 out_sig_bt[total_c_args++] = T_VOID; |
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2486 } |
|
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2487 } |
|
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2488 |
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2489 assert(i==total_args_passed, "validly parsed signature"); |
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2490 |
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2491 // Now get the compiled-Java layout as input arguments |
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2492 int comp_args_on_stack; |
|
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2493 comp_args_on_stack = SharedRuntime::java_calling_convention( |
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2494 in_sig_bt, in_regs, total_args_passed, false); |
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2495 |
|
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2496 // Now figure out where the args must be stored and how much stack space |
|
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2497 // they require (neglecting out_preserve_stack_slots). |
|
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2498 |
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2499 int out_arg_slots; |
| 14909 | 2500 out_arg_slots = c_calling_convention(out_sig_bt, out_regs, total_c_args); |
|
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2501 |
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2502 // Calculate the total number of stack slots we will need. |
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2503 |
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2504 // First count the abi requirement plus all of the outgoing args |
|
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2505 int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots; |
|
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2506 |
|
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2507 // Now space for the string(s) we must convert |
|
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2508 |
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2509 int* string_locs = NEW_RESOURCE_ARRAY(int, total_strings + 1); |
|
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2510 for (i = 0; i < total_strings ; i++) { |
|
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2511 string_locs[i] = stack_slots; |
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2512 stack_slots += max_dtrace_string_size / VMRegImpl::stack_slot_size; |
|
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2513 } |
|
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2514 |
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2515 // + 2 for return address (which we own) and saved rbp, |
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2516 |
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2517 stack_slots += 2; |
|
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2518 |
|
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2519 // Ok The space we have allocated will look like: |
|
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2520 // |
|
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2521 // |
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2522 // FP-> | | |
|
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2523 // |---------------------| |
|
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2524 // | string[n] | |
|
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2525 // |---------------------| <- string_locs[n] |
|
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2526 // | string[n-1] | |
|
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2527 // |---------------------| <- string_locs[n-1] |
|
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2528 // | ... | |
|
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2529 // | ... | |
|
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2530 // |---------------------| <- string_locs[1] |
|
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2531 // | string[0] | |
|
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2532 // |---------------------| <- string_locs[0] |
|
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2533 // | outbound memory | |
|
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2534 // | based arguments | |
|
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2535 // | | |
|
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2536 // |---------------------| |
|
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2537 // | | |
|
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2538 // SP-> | out_preserved_slots | |
|
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2539 // |
|
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|
2540 // |
|
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2541 |
|
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|
2542 // Now compute actual number of stack words we need rounding to make |
|
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2543 // stack properly aligned. |
|
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|
2544 stack_slots = round_to(stack_slots, 2 * VMRegImpl::slots_per_word); |
|
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2545 |
|
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|
2546 int stack_size = stack_slots * VMRegImpl::stack_slot_size; |
|
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2547 |
|
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|
2548 intptr_t start = (intptr_t)__ pc(); |
|
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2549 |
|
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|
2550 // First thing make an ic check to see if we should even be here |
|
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2551 |
|
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2552 // We are free to use all registers as temps without saving them and |
|
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2553 // restoring them except rbp. rbp, is the only callee save register |
|
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2554 // as far as the interpreter and the compiler(s) are concerned. |
|
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2555 |
|
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|
2556 const Register ic_reg = rax; |
|
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2557 const Register receiver = rcx; |
|
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2558 Label hit; |
|
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|
2559 Label exception_pending; |
|
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2560 |
|
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2561 |
|
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|
2562 __ verify_oop(receiver); |
|
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2563 __ cmpl(ic_reg, Address(receiver, oopDesc::klass_offset_in_bytes())); |
|
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2564 __ jcc(Assembler::equal, hit); |
|
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2565 |
|
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|
2566 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub())); |
|
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2567 |
|
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2568 // verified entry must be aligned for code patching. |
|
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2569 // and the first 5 bytes must be in the same cache line |
|
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2570 // if we align at 8 then we will be sure 5 bytes are in the same line |
|
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2571 __ align(8); |
|
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2572 |
|
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|
2573 __ bind(hit); |
|
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2574 |
|
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|
2575 int vep_offset = ((intptr_t)__ pc()) - start; |
|
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2576 |
|
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|
2577 |
|
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6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
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0
diff
changeset
|
2578 // The instruction at the verified entry point must be 5 bytes or longer |
|
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kamg
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0
diff
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|
2579 // because it can be patched on the fly by make_non_entrant. The stack bang |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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0
diff
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|
2580 // instruction fits that requirement. |
|
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6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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0
diff
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|
2581 |
|
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6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
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0
diff
changeset
|
2582 // Generate stack overflow check |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2583 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2584 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2585 if (UseStackBanging) { |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2586 if (stack_size <= StackShadowPages*os::vm_page_size()) { |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2587 __ bang_stack_with_offset(StackShadowPages*os::vm_page_size()); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
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|
2588 } else { |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2589 __ movl(rax, stack_size); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
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parents:
0
diff
changeset
|
2590 __ bang_stack_size(rax, rbx); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2591 } |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2592 } else { |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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0
diff
changeset
|
2593 // need a 5 byte instruction to allow MT safe patching to non-entrant |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2594 __ fat_nop(); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2595 } |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2596 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2597 assert(((int)__ pc() - start - vep_offset) >= 5, |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
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|
2598 "valid size for make_non_entrant"); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2599 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2600 // Generate a new frame for the wrapper. |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2601 __ enter(); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2602 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
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|
2603 // -2 because return address is already present and so is saved rbp, |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2604 if (stack_size - 2*wordSize != 0) { |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
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|
2605 __ subl(rsp, stack_size - 2*wordSize); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
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|
2606 } |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2607 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
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0
diff
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|
2608 // Frame is now completed as far a size and linkage. |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2609 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
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0
diff
changeset
|
2610 int frame_complete = ((intptr_t)__ pc()) - start; |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2611 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2612 // First thing we do store all the args as if we are doing the call. |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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0
diff
changeset
|
2613 // Since the C calling convention is stack based that ensures that |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2614 // all the Java register args are stored before we need to convert any |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2615 // string we might have. |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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0
diff
changeset
|
2616 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2617 int sid = 0; |
|
018d5b58dd4f
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kamg
parents:
0
diff
changeset
|
2618 int c_arg, j_arg; |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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0
diff
changeset
|
2619 int string_reg = 0; |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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0
diff
changeset
|
2620 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2621 for (j_arg = first_arg_to_pass, c_arg = 0 ; |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2622 j_arg < total_args_passed ; j_arg++, c_arg++ ) { |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2623 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2624 VMRegPair src = in_regs[j_arg]; |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2625 VMRegPair dst = out_regs[c_arg]; |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2626 assert(dst.first()->is_stack() || in_sig_bt[j_arg] == T_VOID, |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2627 "stack based abi assumed"); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2628 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2629 switch (in_sig_bt[j_arg]) { |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2630 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2631 case T_ARRAY: |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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0
diff
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|
2632 case T_OBJECT: |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2633 if (out_sig_bt[c_arg] == T_ADDRESS) { |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2634 // Any register based arg for a java string after the first |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2635 // will be destroyed by the call to get_utf so we store |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2636 // the original value in the location the utf string address |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2637 // will eventually be stored. |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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0
diff
changeset
|
2638 if (src.first()->is_reg()) { |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2639 if (string_reg++ != 0) { |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2640 simple_move32(masm, src, dst); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2641 } |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2642 } |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2643 } else if (out_sig_bt[c_arg] == T_INT || out_sig_bt[c_arg] == T_LONG) { |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2644 // need to unbox a one-word value |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2645 Register in_reg = rax; |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2646 if ( src.first()->is_reg() ) { |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2647 in_reg = src.first()->as_Register(); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
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|
2648 } else { |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2649 simple_move32(masm, src, in_reg->as_VMReg()); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2650 } |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2651 Label skipUnbox; |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2652 __ movl(Address(rsp, reg2offset_out(dst.first())), NULL_WORD); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2653 if ( out_sig_bt[c_arg] == T_LONG ) { |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2654 __ movl(Address(rsp, reg2offset_out(dst.second())), NULL_WORD); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2655 } |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2656 __ testl(in_reg, in_reg); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2657 __ jcc(Assembler::zero, skipUnbox); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2658 assert(dst.first()->is_stack() && |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2659 (!dst.second()->is_valid() || dst.second()->is_stack()), |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2660 "value(s) must go into stack slots"); |
|
165
437d03ea40b1
6703888: Compressed Oops: use the 32-bits gap after klass in a object
kvn
parents:
116
diff
changeset
|
2661 |
|
437d03ea40b1
6703888: Compressed Oops: use the 32-bits gap after klass in a object
kvn
parents:
116
diff
changeset
|
2662 BasicType bt = out_sig_bt[c_arg]; |
|
437d03ea40b1
6703888: Compressed Oops: use the 32-bits gap after klass in a object
kvn
parents:
116
diff
changeset
|
2663 int box_offset = java_lang_boxing_object::value_offset_in_bytes(bt); |
|
437d03ea40b1
6703888: Compressed Oops: use the 32-bits gap after klass in a object
kvn
parents:
116
diff
changeset
|
2664 if ( bt == T_LONG ) { |
|
116
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2665 __ movl(rbx, Address(in_reg, |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2666 box_offset + VMRegImpl::stack_slot_size)); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2667 __ movl(Address(rsp, reg2offset_out(dst.second())), rbx); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2668 } |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2669 __ movl(in_reg, Address(in_reg, box_offset)); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2670 __ movl(Address(rsp, reg2offset_out(dst.first())), in_reg); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2671 __ bind(skipUnbox); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2672 } else { |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2673 // Convert the arg to NULL |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2674 __ movl(Address(rsp, reg2offset_out(dst.first())), NULL_WORD); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2675 } |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2676 if (out_sig_bt[c_arg] == T_LONG) { |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2677 assert(out_sig_bt[c_arg+1] == T_VOID, "must be"); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2678 ++c_arg; // Move over the T_VOID To keep the loop indices in sync |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2679 } |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2680 break; |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2681 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2682 case T_VOID: |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2683 break; |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2684 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2685 case T_FLOAT: |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2686 float_move(masm, src, dst); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2687 break; |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2688 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2689 case T_DOUBLE: |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2690 assert( j_arg + 1 < total_args_passed && |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2691 in_sig_bt[j_arg + 1] == T_VOID, "bad arg list"); |
|
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2692 double_move(masm, src, dst); |
|
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2693 break; |
|
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|
2694 |
|
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2695 case T_LONG : |
|
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2696 long_move(masm, src, dst); |
|
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2697 break; |
|
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|
2698 |
|
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2699 case T_ADDRESS: assert(false, "found T_ADDRESS in java args"); |
|
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2700 |
|
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2701 default: |
|
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|
2702 simple_move32(masm, src, dst); |
|
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2703 } |
|
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|
2704 } |
|
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|
2705 |
|
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|
2706 // Now we must convert any string we have to utf8 |
|
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2707 // |
|
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2708 |
|
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2709 for (sid = 0, j_arg = first_arg_to_pass, c_arg = 0 ; |
|
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2710 sid < total_strings ; j_arg++, c_arg++ ) { |
|
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2711 |
|
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2712 if (out_sig_bt[c_arg] == T_ADDRESS) { |
|
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2713 |
|
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2714 Address utf8_addr = Address( |
|
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2715 rsp, string_locs[sid++] * VMRegImpl::stack_slot_size); |
|
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2716 __ leal(rax, utf8_addr); |
|
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2717 |
|
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2718 // The first string we find might still be in the original java arg |
|
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2719 // register |
|
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2720 VMReg orig_loc = in_regs[j_arg].first(); |
|
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2721 Register string_oop; |
|
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2722 |
|
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2723 // This is where the argument will eventually reside |
|
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2724 Address dest = Address(rsp, reg2offset_out(out_regs[c_arg].first())); |
|
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2725 |
|
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2726 if (sid == 1 && orig_loc->is_reg()) { |
|
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2727 string_oop = orig_loc->as_Register(); |
|
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2728 assert(string_oop != rax, "smashed arg"); |
|
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2729 } else { |
|
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|
2730 |
|
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|
2731 if (orig_loc->is_reg()) { |
|
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2732 // Get the copy of the jls object |
|
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2733 __ movl(rcx, dest); |
|
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2734 } else { |
|
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2735 // arg is still in the original location |
|
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2736 __ movl(rcx, Address(rbp, reg2offset_in(orig_loc))); |
|
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|
2737 } |
|
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|
2738 string_oop = rcx; |
|
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2739 |
|
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|
2740 } |
|
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2741 Label nullString; |
|
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2742 __ movl(dest, NULL_WORD); |
|
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2743 __ testl(string_oop, string_oop); |
|
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2744 __ jcc(Assembler::zero, nullString); |
|
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2745 |
|
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2746 // Now we can store the address of the utf string as the argument |
|
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2747 __ movl(dest, rax); |
|
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2748 |
|
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|
2749 // And do the conversion |
|
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2750 __ call_VM_leaf(CAST_FROM_FN_PTR( |
|
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2751 address, SharedRuntime::get_utf), string_oop, rax); |
|
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2752 __ bind(nullString); |
|
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|
2753 } |
|
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|
2754 |
|
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2755 if (in_sig_bt[j_arg] == T_OBJECT && out_sig_bt[c_arg] == T_LONG) { |
|
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2756 assert(out_sig_bt[c_arg+1] == T_VOID, "must be"); |
|
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2757 ++c_arg; // Move over the T_VOID To keep the loop indices in sync |
|
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2758 } |
|
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|
2759 } |
|
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|
2760 |
|
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|
2761 |
|
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|
2762 // Ok now we are done. Need to place the nop that dtrace wants in order to |
|
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2763 // patch in the trap |
|
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|
2764 |
|
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|
2765 int patch_offset = ((intptr_t)__ pc()) - start; |
|
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2766 |
|
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|
2767 __ nop(); |
|
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|
2768 |
|
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|
2769 |
|
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|
2770 // Return |
|
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|
2771 |
|
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|
2772 __ leave(); |
|
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|
2773 __ ret(0); |
|
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|
2774 |
|
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|
2775 __ flush(); |
|
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|
2776 |
|
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|
2777 nmethod *nm = nmethod::new_dtrace_nmethod( |
|
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2778 method, masm->code(), vep_offset, patch_offset, frame_complete, |
|
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2779 stack_slots / VMRegImpl::slots_per_word); |
|
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2780 return nm; |
|
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|
2781 |
|
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|
2782 } |
|
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|
2783 |
|
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|
2784 #endif // HAVE_DTRACE_H |
|
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2785 |
| 0 | 2786 // this function returns the adjust size (in number of words) to a c2i adapter |
| 2787 // activation for use during deoptimization | |
| 2788 int Deoptimization::last_frame_adjust(int callee_parameters, int callee_locals ) { | |
| 1506 | 2789 return (callee_locals - callee_parameters) * Interpreter::stackElementWords; |
| 0 | 2790 } |
| 2791 | |
| 2792 | |
| 2793 uint SharedRuntime::out_preserve_stack_slots() { | |
| 2794 return 0; | |
| 2795 } | |
| 2796 | |
| 2797 //------------------------------generate_deopt_blob---------------------------- | |
| 2798 void SharedRuntime::generate_deopt_blob() { | |
| 2799 // allocate space for the code | |
| 2800 ResourceMark rm; | |
| 2801 // setup code generation tools | |
| 2802 CodeBuffer buffer("deopt_blob", 1024, 1024); | |
| 2803 MacroAssembler* masm = new MacroAssembler(&buffer); | |
| 2804 int frame_size_in_words; | |
| 2805 OopMap* map = NULL; | |
| 2806 // Account for the extra args we place on the stack | |
| 2807 // by the time we call fetch_unroll_info | |
| 2808 const int additional_words = 2; // deopt kind, thread | |
| 2809 | |
| 2810 OopMapSet *oop_maps = new OopMapSet(); | |
| 2811 | |
| 2812 // ------------- | |
| 2813 // This code enters when returning to a de-optimized nmethod. A return | |
| 2814 // address has been pushed on the the stack, and return values are in | |
| 2815 // registers. | |
| 2816 // If we are doing a normal deopt then we were called from the patched | |
| 2817 // nmethod from the point we returned to the nmethod. So the return | |
| 2818 // address on the stack is wrong by NativeCall::instruction_size | |
| 2819 // We will adjust the value to it looks like we have the original return | |
| 2820 // address on the stack (like when we eagerly deoptimized). | |
| 2821 // In the case of an exception pending with deoptimized then we enter | |
| 2822 // with a return address on the stack that points after the call we patched | |
| 2823 // into the exception handler. We have the following register state: | |
| 2824 // rax,: exception | |
| 2825 // rbx,: exception handler | |
| 2826 // rdx: throwing pc | |
| 2827 // So in this case we simply jam rdx into the useless return address and | |
| 2828 // the stack looks just like we want. | |
| 2829 // | |
| 2830 // At this point we need to de-opt. We save the argument return | |
| 2831 // registers. We call the first C routine, fetch_unroll_info(). This | |
| 2832 // routine captures the return values and returns a structure which | |
| 2833 // describes the current frame size and the sizes of all replacement frames. | |
| 2834 // The current frame is compiled code and may contain many inlined | |
| 2835 // functions, each with their own JVM state. We pop the current frame, then | |
| 2836 // push all the new frames. Then we call the C routine unpack_frames() to | |
| 2837 // populate these frames. Finally unpack_frames() returns us the new target | |
| 2838 // address. Notice that callee-save registers are BLOWN here; they have | |
| 2839 // already been captured in the vframeArray at the time the return PC was | |
| 2840 // patched. | |
| 2841 address start = __ pc(); | |
| 2842 Label cont; | |
| 2843 | |
| 2844 // Prolog for non exception case! | |
| 2845 | |
| 2846 // Save everything in sight. | |
| 2847 | |
|
926
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2848 map = RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false); |
| 0 | 2849 // Normal deoptimization |
| 304 | 2850 __ push(Deoptimization::Unpack_deopt); |
| 0 | 2851 __ jmp(cont); |
| 2852 | |
| 2853 int reexecute_offset = __ pc() - start; | |
| 2854 | |
| 2855 // Reexecute case | |
| 2856 // return address is the pc describes what bci to do re-execute at | |
| 2857 | |
| 2858 // No need to update map as each call to save_live_registers will produce identical oopmap | |
|
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|
2859 (void) RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false); |
| 0 | 2860 |
| 304 | 2861 __ push(Deoptimization::Unpack_reexecute); |
| 0 | 2862 __ jmp(cont); |
| 2863 | |
| 2864 int exception_offset = __ pc() - start; | |
| 2865 | |
| 2866 // Prolog for exception case | |
| 2867 | |
| 2868 // all registers are dead at this entry point, except for rax, and | |
| 2869 // rdx which contain the exception oop and exception pc | |
| 2870 // respectively. Set them in TLS and fall thru to the | |
| 2871 // unpack_with_exception_in_tls entry point. | |
| 2872 | |
| 2873 __ get_thread(rdi); | |
| 304 | 2874 __ movptr(Address(rdi, JavaThread::exception_pc_offset()), rdx); |
| 2875 __ movptr(Address(rdi, JavaThread::exception_oop_offset()), rax); | |
| 0 | 2876 |
| 2877 int exception_in_tls_offset = __ pc() - start; | |
| 2878 | |
| 2879 // new implementation because exception oop is now passed in JavaThread | |
| 2880 | |
| 2881 // Prolog for exception case | |
| 2882 // All registers must be preserved because they might be used by LinearScan | |
| 2883 // Exceptiop oop and throwing PC are passed in JavaThread | |
| 2884 // tos: stack at point of call to method that threw the exception (i.e. only | |
| 2885 // args are on the stack, no return address) | |
| 2886 | |
| 2887 // make room on stack for the return address | |
| 2888 // It will be patched later with the throwing pc. The correct value is not | |
| 2889 // available now because loading it from memory would destroy registers. | |
| 304 | 2890 __ push(0); |
| 0 | 2891 |
| 2892 // Save everything in sight. | |
| 2893 | |
| 2894 // No need to update map as each call to save_live_registers will produce identical oopmap | |
|
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2895 (void) RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false); |
| 0 | 2896 |
| 2897 // Now it is safe to overwrite any register | |
| 2898 | |
| 2899 // store the correct deoptimization type | |
| 304 | 2900 __ push(Deoptimization::Unpack_exception); |
| 0 | 2901 |
| 2902 // load throwing pc from JavaThread and patch it as the return address | |
| 2903 // of the current frame. Then clear the field in JavaThread | |
| 2904 __ get_thread(rdi); | |
| 304 | 2905 __ movptr(rdx, Address(rdi, JavaThread::exception_pc_offset())); |
| 2906 __ movptr(Address(rbp, wordSize), rdx); | |
|
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2907 __ movptr(Address(rdi, JavaThread::exception_pc_offset()), NULL_WORD); |
| 0 | 2908 |
| 2909 #ifdef ASSERT | |
| 2910 // verify that there is really an exception oop in JavaThread | |
| 304 | 2911 __ movptr(rax, Address(rdi, JavaThread::exception_oop_offset())); |
| 0 | 2912 __ verify_oop(rax); |
| 2913 | |
| 2914 // verify that there is no pending exception | |
| 2915 Label no_pending_exception; | |
| 304 | 2916 __ movptr(rax, Address(rdi, Thread::pending_exception_offset())); |
| 2917 __ testptr(rax, rax); | |
| 0 | 2918 __ jcc(Assembler::zero, no_pending_exception); |
| 2919 __ stop("must not have pending exception here"); | |
| 2920 __ bind(no_pending_exception); | |
| 2921 #endif | |
| 2922 | |
| 2923 __ bind(cont); | |
| 2924 | |
| 2925 // Compiled code leaves the floating point stack dirty, empty it. | |
| 2926 __ empty_FPU_stack(); | |
| 2927 | |
| 2928 | |
| 2929 // Call C code. Need thread and this frame, but NOT official VM entry | |
| 2930 // crud. We cannot block on this call, no GC can happen. | |
| 2931 __ get_thread(rcx); | |
| 304 | 2932 __ push(rcx); |
| 0 | 2933 // fetch_unroll_info needs to call last_java_frame() |
| 2934 __ set_last_Java_frame(rcx, noreg, noreg, NULL); | |
| 2935 | |
| 2936 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::fetch_unroll_info))); | |
| 2937 | |
| 2938 // Need to have an oopmap that tells fetch_unroll_info where to | |
| 2939 // find any register it might need. | |
| 2940 | |
| 2941 oop_maps->add_gc_map( __ pc()-start, map); | |
| 2942 | |
| 2943 // Discard arg to fetch_unroll_info | |
| 304 | 2944 __ pop(rcx); |
| 0 | 2945 |
| 2946 __ get_thread(rcx); | |
| 2947 __ reset_last_Java_frame(rcx, false, false); | |
| 2948 | |
| 2949 // Load UnrollBlock into EDI | |
| 304 | 2950 __ mov(rdi, rax); |
| 0 | 2951 |
| 2952 // Move the unpack kind to a safe place in the UnrollBlock because | |
| 2953 // we are very short of registers | |
| 2954 | |
| 2955 Address unpack_kind(rdi, Deoptimization::UnrollBlock::unpack_kind_offset_in_bytes()); | |
| 2956 // retrieve the deopt kind from where we left it. | |
| 304 | 2957 __ pop(rax); |
| 0 | 2958 __ movl(unpack_kind, rax); // save the unpack_kind value |
| 2959 | |
| 2960 Label noException; | |
| 2961 __ cmpl(rax, Deoptimization::Unpack_exception); // Was exception pending? | |
| 2962 __ jcc(Assembler::notEqual, noException); | |
| 304 | 2963 __ movptr(rax, Address(rcx, JavaThread::exception_oop_offset())); |
| 2964 __ movptr(rdx, Address(rcx, JavaThread::exception_pc_offset())); | |
|
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2965 __ movptr(Address(rcx, JavaThread::exception_oop_offset()), NULL_WORD); |
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2966 __ movptr(Address(rcx, JavaThread::exception_pc_offset()), NULL_WORD); |
| 0 | 2967 |
| 2968 __ verify_oop(rax); | |
| 2969 | |
| 2970 // Overwrite the result registers with the exception results. | |
| 304 | 2971 __ movptr(Address(rsp, RegisterSaver::raxOffset()*wordSize), rax); |
| 2972 __ movptr(Address(rsp, RegisterSaver::rdxOffset()*wordSize), rdx); | |
| 0 | 2973 |
| 2974 __ bind(noException); | |
| 2975 | |
| 2976 // Stack is back to only having register save data on the stack. | |
| 2977 // Now restore the result registers. Everything else is either dead or captured | |
| 2978 // in the vframeArray. | |
| 2979 | |
| 2980 RegisterSaver::restore_result_registers(masm); | |
| 2981 | |
|
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2982 // Non standard control word may be leaked out through a safepoint blob, and we can |
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2983 // deopt at a poll point with the non standard control word. However, we should make |
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2984 // sure the control word is correct after restore_result_registers. |
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2985 __ fldcw(ExternalAddress(StubRoutines::addr_fpu_cntrl_wrd_std())); |
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2986 |
| 0 | 2987 // All of the register save area has been popped of the stack. Only the |
| 2988 // return address remains. | |
| 2989 | |
| 2990 // Pop all the frames we must move/replace. | |
| 2991 // | |
| 2992 // Frame picture (youngest to oldest) | |
| 2993 // 1: self-frame (no frame link) | |
| 2994 // 2: deopting frame (no frame link) | |
| 2995 // 3: caller of deopting frame (could be compiled/interpreted). | |
| 2996 // | |
| 2997 // Note: by leaving the return address of self-frame on the stack | |
| 2998 // and using the size of frame 2 to adjust the stack | |
| 2999 // when we are done the return to frame 3 will still be on the stack. | |
| 3000 | |
| 3001 // Pop deoptimized frame | |
| 304 | 3002 __ addptr(rsp, Address(rdi,Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset_in_bytes())); |
| 0 | 3003 |
| 3004 // sp should be pointing at the return address to the caller (3) | |
| 3005 | |
|
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3006 // Pick up the initial fp we should save |
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3007 // restore rbp before stack bang because if stack overflow is thrown it needs to be pushed (and preserved) |
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3008 __ movptr(rbp, Address(rdi, Deoptimization::UnrollBlock::initial_info_offset_in_bytes())); |
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3009 |
| 0 | 3010 // Stack bang to make sure there's enough room for these interpreter frames. |
| 3011 if (UseStackBanging) { | |
| 3012 __ movl(rbx, Address(rdi ,Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes())); | |
| 3013 __ bang_stack_size(rbx, rcx); | |
| 3014 } | |
| 3015 | |
| 3016 // Load array of frame pcs into ECX | |
| 304 | 3017 __ movptr(rcx,Address(rdi,Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes())); |
| 3018 | |
| 3019 __ pop(rsi); // trash the old pc | |
| 0 | 3020 |
| 3021 // Load array of frame sizes into ESI | |
| 304 | 3022 __ movptr(rsi,Address(rdi,Deoptimization::UnrollBlock::frame_sizes_offset_in_bytes())); |
| 0 | 3023 |
| 3024 Address counter(rdi, Deoptimization::UnrollBlock::counter_temp_offset_in_bytes()); | |
| 3025 | |
| 3026 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::number_of_frames_offset_in_bytes())); | |
| 3027 __ movl(counter, rbx); | |
| 3028 | |
| 3029 // Now adjust the caller's stack to make up for the extra locals | |
| 3030 // but record the original sp so that we can save it in the skeletal interpreter | |
| 3031 // frame and the stack walking of interpreter_sender will get the unextended sp | |
| 3032 // value and not the "real" sp value. | |
| 3033 | |
| 3034 Address sp_temp(rdi, Deoptimization::UnrollBlock::sender_sp_temp_offset_in_bytes()); | |
| 304 | 3035 __ movptr(sp_temp, rsp); |
| 3036 __ movl2ptr(rbx, Address(rdi, Deoptimization::UnrollBlock::caller_adjustment_offset_in_bytes())); | |
| 3037 __ subptr(rsp, rbx); | |
| 0 | 3038 |
| 3039 // Push interpreter frames in a loop | |
| 3040 Label loop; | |
| 3041 __ bind(loop); | |
| 304 | 3042 __ movptr(rbx, Address(rsi, 0)); // Load frame size |
| 0 | 3043 #ifdef CC_INTERP |
| 304 | 3044 __ subptr(rbx, 4*wordSize); // we'll push pc and ebp by hand and |
| 0 | 3045 #ifdef ASSERT |
| 304 | 3046 __ push(0xDEADDEAD); // Make a recognizable pattern |
| 3047 __ push(0xDEADDEAD); | |
| 0 | 3048 #else /* ASSERT */ |
| 304 | 3049 __ subptr(rsp, 2*wordSize); // skip the "static long no_param" |
| 0 | 3050 #endif /* ASSERT */ |
| 3051 #else /* CC_INTERP */ | |
| 304 | 3052 __ subptr(rbx, 2*wordSize); // we'll push pc and rbp, by hand |
| 0 | 3053 #endif /* CC_INTERP */ |
| 304 | 3054 __ pushptr(Address(rcx, 0)); // save return address |
| 0 | 3055 __ enter(); // save old & set new rbp, |
| 304 | 3056 __ subptr(rsp, rbx); // Prolog! |
| 3057 __ movptr(rbx, sp_temp); // sender's sp | |
| 0 | 3058 #ifdef CC_INTERP |
| 304 | 3059 __ movptr(Address(rbp, |
| 0 | 3060 -(sizeof(BytecodeInterpreter)) + in_bytes(byte_offset_of(BytecodeInterpreter, _sender_sp))), |
| 3061 rbx); // Make it walkable | |
| 3062 #else /* CC_INTERP */ | |
| 3063 // This value is corrected by layout_activation_impl | |
|
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3064 __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), NULL_WORD); |
| 304 | 3065 __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), rbx); // Make it walkable |
| 0 | 3066 #endif /* CC_INTERP */ |
| 304 | 3067 __ movptr(sp_temp, rsp); // pass to next frame |
| 3068 __ addptr(rsi, wordSize); // Bump array pointer (sizes) | |
| 3069 __ addptr(rcx, wordSize); // Bump array pointer (pcs) | |
| 3070 __ decrementl(counter); // decrement counter | |
| 0 | 3071 __ jcc(Assembler::notZero, loop); |
| 304 | 3072 __ pushptr(Address(rcx, 0)); // save final return address |
| 0 | 3073 |
| 3074 // Re-push self-frame | |
| 3075 __ enter(); // save old & set new rbp, | |
| 3076 | |
| 3077 // Return address and rbp, are in place | |
| 3078 // We'll push additional args later. Just allocate a full sized | |
| 3079 // register save area | |
| 304 | 3080 __ subptr(rsp, (frame_size_in_words-additional_words - 2) * wordSize); |
| 0 | 3081 |
| 3082 // Restore frame locals after moving the frame | |
| 304 | 3083 __ movptr(Address(rsp, RegisterSaver::raxOffset()*wordSize), rax); |
| 3084 __ movptr(Address(rsp, RegisterSaver::rdxOffset()*wordSize), rdx); | |
| 0 | 3085 __ fstp_d(Address(rsp, RegisterSaver::fpResultOffset()*wordSize)); // Pop float stack and store in local |
| 3086 if( UseSSE>=2 ) __ movdbl(Address(rsp, RegisterSaver::xmm0Offset()*wordSize), xmm0); | |
| 3087 if( UseSSE==1 ) __ movflt(Address(rsp, RegisterSaver::xmm0Offset()*wordSize), xmm0); | |
| 3088 | |
| 3089 // Set up the args to unpack_frame | |
| 3090 | |
| 3091 __ pushl(unpack_kind); // get the unpack_kind value | |
| 3092 __ get_thread(rcx); | |
| 304 | 3093 __ push(rcx); |
| 0 | 3094 |
| 3095 // set last_Java_sp, last_Java_fp | |
| 3096 __ set_last_Java_frame(rcx, noreg, rbp, NULL); | |
| 3097 | |
| 3098 // Call C code. Need thread but NOT official VM entry | |
| 3099 // crud. We cannot block on this call, no GC can happen. Call should | |
| 3100 // restore return values to their stack-slots with the new SP. | |
| 3101 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames))); | |
| 3102 // Set an oopmap for the call site | |
| 3103 oop_maps->add_gc_map( __ pc()-start, new OopMap( frame_size_in_words, 0 )); | |
| 3104 | |
| 3105 // rax, contains the return result type | |
| 304 | 3106 __ push(rax); |
| 0 | 3107 |
| 3108 __ get_thread(rcx); | |
| 3109 __ reset_last_Java_frame(rcx, false, false); | |
| 3110 | |
| 3111 // Collect return values | |
| 304 | 3112 __ movptr(rax,Address(rsp, (RegisterSaver::raxOffset() + additional_words + 1)*wordSize)); |
| 3113 __ movptr(rdx,Address(rsp, (RegisterSaver::rdxOffset() + additional_words + 1)*wordSize)); | |
| 0 | 3114 |
| 3115 // Clear floating point stack before returning to interpreter | |
| 3116 __ empty_FPU_stack(); | |
| 3117 | |
| 3118 // Check if we should push the float or double return value. | |
| 3119 Label results_done, yes_double_value; | |
| 3120 __ cmpl(Address(rsp, 0), T_DOUBLE); | |
| 3121 __ jcc (Assembler::zero, yes_double_value); | |
| 3122 __ cmpl(Address(rsp, 0), T_FLOAT); | |
| 3123 __ jcc (Assembler::notZero, results_done); | |
| 3124 | |
| 3125 // return float value as expected by interpreter | |
| 3126 if( UseSSE>=1 ) __ movflt(xmm0, Address(rsp, (RegisterSaver::xmm0Offset() + additional_words + 1)*wordSize)); | |
| 3127 else __ fld_d(Address(rsp, (RegisterSaver::fpResultOffset() + additional_words + 1)*wordSize)); | |
| 3128 __ jmp(results_done); | |
| 3129 | |
| 3130 // return double value as expected by interpreter | |
| 3131 __ bind(yes_double_value); | |
| 3132 if( UseSSE>=2 ) __ movdbl(xmm0, Address(rsp, (RegisterSaver::xmm0Offset() + additional_words + 1)*wordSize)); | |
| 3133 else __ fld_d(Address(rsp, (RegisterSaver::fpResultOffset() + additional_words + 1)*wordSize)); | |
| 3134 | |
| 3135 __ bind(results_done); | |
| 3136 | |
| 3137 // Pop self-frame. | |
| 3138 __ leave(); // Epilog! | |
| 3139 | |
| 3140 // Jump to interpreter | |
| 3141 __ ret(0); | |
| 3142 | |
| 3143 // ------------- | |
| 3144 // make sure all code is generated | |
| 3145 masm->flush(); | |
| 3146 | |
| 3147 _deopt_blob = DeoptimizationBlob::create( &buffer, oop_maps, 0, exception_offset, reexecute_offset, frame_size_in_words); | |
| 3148 _deopt_blob->set_unpack_with_exception_in_tls_offset(exception_in_tls_offset); | |
| 3149 } | |
| 3150 | |
| 3151 | |
| 3152 #ifdef COMPILER2 | |
| 3153 //------------------------------generate_uncommon_trap_blob-------------------- | |
| 3154 void SharedRuntime::generate_uncommon_trap_blob() { | |
| 3155 // allocate space for the code | |
| 3156 ResourceMark rm; | |
| 3157 // setup code generation tools | |
| 3158 CodeBuffer buffer("uncommon_trap_blob", 512, 512); | |
| 3159 MacroAssembler* masm = new MacroAssembler(&buffer); | |
| 3160 | |
| 3161 enum frame_layout { | |
| 3162 arg0_off, // thread sp + 0 // Arg location for | |
| 3163 arg1_off, // unloaded_class_index sp + 1 // calling C | |
| 3164 // The frame sender code expects that rbp will be in the "natural" place and | |
| 3165 // will override any oopMap setting for it. We must therefore force the layout | |
| 3166 // so that it agrees with the frame sender code. | |
| 3167 rbp_off, // callee saved register sp + 2 | |
| 3168 return_off, // slot for return address sp + 3 | |
| 3169 framesize | |
| 3170 }; | |
| 3171 | |
| 3172 address start = __ pc(); | |
| 3173 // Push self-frame. | |
| 304 | 3174 __ subptr(rsp, return_off*wordSize); // Epilog! |
| 0 | 3175 |
| 3176 // rbp, is an implicitly saved callee saved register (i.e. the calling | |
| 3177 // convention will save restore it in prolog/epilog) Other than that | |
| 3178 // there are no callee save registers no that adapter frames are gone. | |
| 304 | 3179 __ movptr(Address(rsp, rbp_off*wordSize), rbp); |
| 0 | 3180 |
| 3181 // Clear the floating point exception stack | |
| 3182 __ empty_FPU_stack(); | |
| 3183 | |
| 3184 // set last_Java_sp | |
| 3185 __ get_thread(rdx); | |
| 3186 __ set_last_Java_frame(rdx, noreg, noreg, NULL); | |
| 3187 | |
| 3188 // Call C code. Need thread but NOT official VM entry | |
| 3189 // crud. We cannot block on this call, no GC can happen. Call should | |
| 3190 // capture callee-saved registers as well as return values. | |
| 304 | 3191 __ movptr(Address(rsp, arg0_off*wordSize), rdx); |
| 0 | 3192 // argument already in ECX |
| 3193 __ movl(Address(rsp, arg1_off*wordSize),rcx); | |
| 3194 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::uncommon_trap))); | |
| 3195 | |
| 3196 // Set an oopmap for the call site | |
| 3197 OopMapSet *oop_maps = new OopMapSet(); | |
| 3198 OopMap* map = new OopMap( framesize, 0 ); | |
| 3199 // No oopMap for rbp, it is known implicitly | |
| 3200 | |
| 3201 oop_maps->add_gc_map( __ pc()-start, map); | |
| 3202 | |
| 3203 __ get_thread(rcx); | |
| 3204 | |
| 3205 __ reset_last_Java_frame(rcx, false, false); | |
| 3206 | |
| 3207 // Load UnrollBlock into EDI | |
| 304 | 3208 __ movptr(rdi, rax); |
| 0 | 3209 |
| 3210 // Pop all the frames we must move/replace. | |
| 3211 // | |
| 3212 // Frame picture (youngest to oldest) | |
| 3213 // 1: self-frame (no frame link) | |
| 3214 // 2: deopting frame (no frame link) | |
| 3215 // 3: caller of deopting frame (could be compiled/interpreted). | |
| 3216 | |
| 3217 // Pop self-frame. We have no frame, and must rely only on EAX and ESP. | |
| 304 | 3218 __ addptr(rsp,(framesize-1)*wordSize); // Epilog! |
| 0 | 3219 |
| 3220 // Pop deoptimized frame | |
| 304 | 3221 __ movl2ptr(rcx, Address(rdi,Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset_in_bytes())); |
| 3222 __ addptr(rsp, rcx); | |
| 0 | 3223 |
| 3224 // sp should be pointing at the return address to the caller (3) | |
| 3225 | |
|
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3226 // Pick up the initial fp we should save |
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3227 // restore rbp before stack bang because if stack overflow is thrown it needs to be pushed (and preserved) |
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3228 __ movptr(rbp, Address(rdi, Deoptimization::UnrollBlock::initial_info_offset_in_bytes())); |
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3229 |
| 0 | 3230 // Stack bang to make sure there's enough room for these interpreter frames. |
| 3231 if (UseStackBanging) { | |
| 3232 __ movl(rbx, Address(rdi ,Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes())); | |
| 3233 __ bang_stack_size(rbx, rcx); | |
| 3234 } | |
| 3235 | |
| 3236 | |
| 3237 // Load array of frame pcs into ECX | |
| 3238 __ movl(rcx,Address(rdi,Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes())); | |
| 3239 | |
| 304 | 3240 __ pop(rsi); // trash the pc |
| 0 | 3241 |
| 3242 // Load array of frame sizes into ESI | |
| 304 | 3243 __ movptr(rsi,Address(rdi,Deoptimization::UnrollBlock::frame_sizes_offset_in_bytes())); |
| 0 | 3244 |
| 3245 Address counter(rdi, Deoptimization::UnrollBlock::counter_temp_offset_in_bytes()); | |
| 3246 | |
| 3247 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::number_of_frames_offset_in_bytes())); | |
| 3248 __ movl(counter, rbx); | |
| 3249 | |
| 3250 // Now adjust the caller's stack to make up for the extra locals | |
| 3251 // but record the original sp so that we can save it in the skeletal interpreter | |
| 3252 // frame and the stack walking of interpreter_sender will get the unextended sp | |
| 3253 // value and not the "real" sp value. | |
| 3254 | |
| 3255 Address sp_temp(rdi, Deoptimization::UnrollBlock::sender_sp_temp_offset_in_bytes()); | |
| 304 | 3256 __ movptr(sp_temp, rsp); |
| 3257 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::caller_adjustment_offset_in_bytes())); | |
| 3258 __ subptr(rsp, rbx); | |
| 0 | 3259 |
| 3260 // Push interpreter frames in a loop | |
| 3261 Label loop; | |
| 3262 __ bind(loop); | |
| 304 | 3263 __ movptr(rbx, Address(rsi, 0)); // Load frame size |
| 0 | 3264 #ifdef CC_INTERP |
| 304 | 3265 __ subptr(rbx, 4*wordSize); // we'll push pc and ebp by hand and |
| 0 | 3266 #ifdef ASSERT |
| 304 | 3267 __ push(0xDEADDEAD); // Make a recognizable pattern |
| 3268 __ push(0xDEADDEAD); // (parm to RecursiveInterpreter...) | |
| 0 | 3269 #else /* ASSERT */ |
| 304 | 3270 __ subptr(rsp, 2*wordSize); // skip the "static long no_param" |
| 0 | 3271 #endif /* ASSERT */ |
| 3272 #else /* CC_INTERP */ | |
| 304 | 3273 __ subptr(rbx, 2*wordSize); // we'll push pc and rbp, by hand |
| 0 | 3274 #endif /* CC_INTERP */ |
| 304 | 3275 __ pushptr(Address(rcx, 0)); // save return address |
| 0 | 3276 __ enter(); // save old & set new rbp, |
| 304 | 3277 __ subptr(rsp, rbx); // Prolog! |
| 3278 __ movptr(rbx, sp_temp); // sender's sp | |
| 0 | 3279 #ifdef CC_INTERP |
| 304 | 3280 __ movptr(Address(rbp, |
| 0 | 3281 -(sizeof(BytecodeInterpreter)) + in_bytes(byte_offset_of(BytecodeInterpreter, _sender_sp))), |
| 3282 rbx); // Make it walkable | |
| 3283 #else /* CC_INTERP */ | |
| 3284 // This value is corrected by layout_activation_impl | |
|
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3285 __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), NULL_WORD ); |
| 304 | 3286 __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), rbx); // Make it walkable |
| 0 | 3287 #endif /* CC_INTERP */ |
| 304 | 3288 __ movptr(sp_temp, rsp); // pass to next frame |
| 3289 __ addptr(rsi, wordSize); // Bump array pointer (sizes) | |
| 3290 __ addptr(rcx, wordSize); // Bump array pointer (pcs) | |
| 3291 __ decrementl(counter); // decrement counter | |
| 0 | 3292 __ jcc(Assembler::notZero, loop); |
| 304 | 3293 __ pushptr(Address(rcx, 0)); // save final return address |
| 0 | 3294 |
| 3295 // Re-push self-frame | |
| 3296 __ enter(); // save old & set new rbp, | |
| 304 | 3297 __ subptr(rsp, (framesize-2) * wordSize); // Prolog! |
| 0 | 3298 |
| 3299 | |
| 3300 // set last_Java_sp, last_Java_fp | |
| 3301 __ get_thread(rdi); | |
| 3302 __ set_last_Java_frame(rdi, noreg, rbp, NULL); | |
| 3303 | |
| 3304 // Call C code. Need thread but NOT official VM entry | |
| 3305 // crud. We cannot block on this call, no GC can happen. Call should | |
| 3306 // restore return values to their stack-slots with the new SP. | |
| 304 | 3307 __ movptr(Address(rsp,arg0_off*wordSize),rdi); |
| 0 | 3308 __ movl(Address(rsp,arg1_off*wordSize), Deoptimization::Unpack_uncommon_trap); |
| 3309 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames))); | |
| 3310 // Set an oopmap for the call site | |
| 3311 oop_maps->add_gc_map( __ pc()-start, new OopMap( framesize, 0 ) ); | |
| 3312 | |
| 3313 __ get_thread(rdi); | |
| 3314 __ reset_last_Java_frame(rdi, true, false); | |
| 3315 | |
| 3316 // Pop self-frame. | |
| 3317 __ leave(); // Epilog! | |
| 3318 | |
| 3319 // Jump to interpreter | |
| 3320 __ ret(0); | |
| 3321 | |
| 3322 // ------------- | |
| 3323 // make sure all code is generated | |
| 3324 masm->flush(); | |
| 3325 | |
| 3326 _uncommon_trap_blob = UncommonTrapBlob::create(&buffer, oop_maps, framesize); | |
| 3327 } | |
| 3328 #endif // COMPILER2 | |
| 3329 | |
| 3330 //------------------------------generate_handler_blob------ | |
| 3331 // | |
| 3332 // Generate a special Compile2Runtime blob that saves all registers, | |
| 3333 // setup oopmap, and calls safepoint code to stop the compiled code for | |
| 3334 // a safepoint. | |
| 3335 // | |
|
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3336 SafepointBlob* SharedRuntime::generate_handler_blob(address call_ptr, int poll_type) { |
| 0 | 3337 |
| 3338 // Account for thread arg in our frame | |
| 3339 const int additional_words = 1; | |
| 3340 int frame_size_in_words; | |
| 3341 | |
| 3342 assert (StubRoutines::forward_exception_entry() != NULL, "must be generated before"); | |
| 3343 | |
| 3344 ResourceMark rm; | |
| 3345 OopMapSet *oop_maps = new OopMapSet(); | |
| 3346 OopMap* map; | |
| 3347 | |
| 3348 // allocate space for the code | |
| 3349 // setup code generation tools | |
| 3350 CodeBuffer buffer("handler_blob", 1024, 512); | |
| 3351 MacroAssembler* masm = new MacroAssembler(&buffer); | |
| 3352 | |
| 3353 const Register java_thread = rdi; // callee-saved for VC++ | |
| 3354 address start = __ pc(); | |
| 3355 address call_pc = NULL; | |
|
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3356 bool cause_return = (poll_type == POLL_AT_RETURN); |
|
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3357 bool save_vectors = (poll_type == POLL_AT_VECTOR_LOOP); |
| 0 | 3358 // If cause_return is true we are at a poll_return and there is |
| 3359 // the return address on the stack to the caller on the nmethod | |
| 3360 // that is safepoint. We can leave this return on the stack and | |
| 3361 // effectively complete the return and safepoint in the caller. | |
| 3362 // Otherwise we push space for a return address that the safepoint | |
| 3363 // handler will install later to make the stack walking sensible. | |
|
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|
3364 if (!cause_return) |
|
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|
3365 __ push(rbx); // Make room for return address (or push it again) |
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3366 |
|
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|
3367 map = RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false, save_vectors); |
| 0 | 3368 |
| 3369 // The following is basically a call_VM. However, we need the precise | |
| 3370 // address of the call in order to generate an oopmap. Hence, we do all the | |
| 3371 // work ourselves. | |
| 3372 | |
| 3373 // Push thread argument and setup last_Java_sp | |
| 3374 __ get_thread(java_thread); | |
| 304 | 3375 __ push(java_thread); |
| 0 | 3376 __ set_last_Java_frame(java_thread, noreg, noreg, NULL); |
| 3377 | |
| 3378 // if this was not a poll_return then we need to correct the return address now. | |
|
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|
3379 if (!cause_return) { |
| 304 | 3380 __ movptr(rax, Address(java_thread, JavaThread::saved_exception_pc_offset())); |
| 3381 __ movptr(Address(rbp, wordSize), rax); | |
| 0 | 3382 } |
| 3383 | |
| 3384 // do the call | |
| 3385 __ call(RuntimeAddress(call_ptr)); | |
| 3386 | |
| 3387 // Set an oopmap for the call site. This oopmap will map all | |
| 3388 // oop-registers and debug-info registers as callee-saved. This | |
| 3389 // will allow deoptimization at this safepoint to find all possible | |
| 3390 // debug-info recordings, as well as let GC find all oops. | |
| 3391 | |
| 3392 oop_maps->add_gc_map( __ pc() - start, map); | |
| 3393 | |
| 3394 // Discard arg | |
| 304 | 3395 __ pop(rcx); |
| 0 | 3396 |
| 3397 Label noException; | |
| 3398 | |
| 3399 // Clear last_Java_sp again | |
| 3400 __ get_thread(java_thread); | |
| 3401 __ reset_last_Java_frame(java_thread, false, false); | |
| 3402 | |
| 304 | 3403 __ cmpptr(Address(java_thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD); |
| 0 | 3404 __ jcc(Assembler::equal, noException); |
| 3405 | |
| 3406 // Exception pending | |
|
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3407 RegisterSaver::restore_live_registers(masm, save_vectors); |
| 0 | 3408 |
| 3409 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry())); | |
| 3410 | |
| 3411 __ bind(noException); | |
| 3412 | |
| 3413 // Normal exit, register restoring and exit | |
|
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3414 RegisterSaver::restore_live_registers(masm, save_vectors); |
| 0 | 3415 |
| 3416 __ ret(0); | |
| 3417 | |
| 3418 // make sure all code is generated | |
| 3419 masm->flush(); | |
| 3420 | |
| 3421 // Fill-out other meta info | |
| 3422 return SafepointBlob::create(&buffer, oop_maps, frame_size_in_words); | |
| 3423 } | |
| 3424 | |
| 3425 // | |
| 3426 // generate_resolve_blob - call resolution (static/virtual/opt-virtual/ic-miss | |
| 3427 // | |
| 3428 // Generate a stub that calls into vm to find out the proper destination | |
| 3429 // of a java call. All the argument registers are live at this point | |
| 3430 // but since this is generic code we don't know what they are and the caller | |
| 3431 // must do any gc of the args. | |
| 3432 // | |
|
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3433 RuntimeStub* SharedRuntime::generate_resolve_blob(address destination, const char* name) { |
| 0 | 3434 assert (StubRoutines::forward_exception_entry() != NULL, "must be generated before"); |
| 3435 | |
| 3436 // allocate space for the code | |
| 3437 ResourceMark rm; | |
| 3438 | |
| 3439 CodeBuffer buffer(name, 1000, 512); | |
| 3440 MacroAssembler* masm = new MacroAssembler(&buffer); | |
| 3441 | |
| 3442 int frame_size_words; | |
| 3443 enum frame_layout { | |
| 3444 thread_off, | |
| 3445 extra_words }; | |
| 3446 | |
| 3447 OopMapSet *oop_maps = new OopMapSet(); | |
| 3448 OopMap* map = NULL; | |
| 3449 | |
| 3450 int start = __ offset(); | |
| 3451 | |
| 3452 map = RegisterSaver::save_live_registers(masm, extra_words, &frame_size_words); | |
| 3453 | |
| 3454 int frame_complete = __ offset(); | |
| 3455 | |
| 3456 const Register thread = rdi; | |
| 3457 __ get_thread(rdi); | |
| 3458 | |
| 304 | 3459 __ push(thread); |
| 0 | 3460 __ set_last_Java_frame(thread, noreg, rbp, NULL); |
| 3461 | |
| 3462 __ call(RuntimeAddress(destination)); | |
| 3463 | |
| 3464 | |
| 3465 // Set an oopmap for the call site. | |
| 3466 // We need this not only for callee-saved registers, but also for volatile | |
| 3467 // registers that the compiler might be keeping live across a safepoint. | |
| 3468 | |
| 3469 oop_maps->add_gc_map( __ offset() - start, map); | |
| 3470 | |
| 3471 // rax, contains the address we are going to jump to assuming no exception got installed | |
| 3472 | |
| 304 | 3473 __ addptr(rsp, wordSize); |
| 0 | 3474 |
| 3475 // clear last_Java_sp | |
| 3476 __ reset_last_Java_frame(thread, true, false); | |
| 3477 // check for pending exceptions | |
| 3478 Label pending; | |
| 304 | 3479 __ cmpptr(Address(thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD); |
| 0 | 3480 __ jcc(Assembler::notEqual, pending); |
| 3481 | |
|
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3482 // get the returned Method* |
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3483 __ get_vm_result_2(rbx, thread); |
| 304 | 3484 __ movptr(Address(rsp, RegisterSaver::rbx_offset() * wordSize), rbx); |
| 3485 | |
| 3486 __ movptr(Address(rsp, RegisterSaver::rax_offset() * wordSize), rax); | |
| 0 | 3487 |
| 3488 RegisterSaver::restore_live_registers(masm); | |
| 3489 | |
| 3490 // We are back the the original state on entry and ready to go. | |
| 3491 | |
| 3492 __ jmp(rax); | |
| 3493 | |
| 3494 // Pending exception after the safepoint | |
| 3495 | |
| 3496 __ bind(pending); | |
| 3497 | |
| 3498 RegisterSaver::restore_live_registers(masm); | |
| 3499 | |
| 3500 // exception pending => remove activation and forward to exception handler | |
| 3501 | |
| 3502 __ get_thread(thread); | |
|
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3503 __ movptr(Address(thread, JavaThread::vm_result_offset()), NULL_WORD); |
| 304 | 3504 __ movptr(rax, Address(thread, Thread::pending_exception_offset())); |
| 0 | 3505 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry())); |
| 3506 | |
| 3507 // ------------- | |
| 3508 // make sure all code is generated | |
| 3509 masm->flush(); | |
| 3510 | |
| 3511 // return the blob | |
| 3512 // frame_size_words or bytes?? | |
| 3513 return RuntimeStub::new_runtime_stub(name, &buffer, frame_complete, frame_size_words, oop_maps, true); | |
| 3514 } |