truffle: src/cpu/x86/vm/x86.ad annotate

annotate src/cpu/x86/vm/x86.ad @ 6646:c38f13903fdf

Merge with http://hg.openjdk.java.net/hsx/hsx25/hotspot/ just before the NPG (no perm gen) changeset

author	Doug Simon <doug.simon@oracle.com>
date	Mon, 29 Oct 2012 21:10:04 +0100
parents	006050192a5a
children	da91efe96a93

rev	line source
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1 //
4950 9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	2 // Copyright (c) 2011, 2012, Oracle and/or its affiliates. All rights reserved.
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	3 // DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	4 //
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	5 // This code is free software; you can redistribute it and/or modify it
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	6 // under the terms of the GNU General Public License version 2 only, as
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	7 // published by the Free Software Foundation.
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	8 //
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	9 // This code is distributed in the hope that it will be useful, but WITHOUT
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	10 // ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	11 // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	12 // version 2 for more details (a copy is included in the LICENSE file that
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	13 // accompanied this code).
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	14 //
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	15 // You should have received a copy of the GNU General Public License version
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	16 // 2 along with this work; if not, write to the Free Software Foundation,
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	17 // Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	18 //
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	19 // Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	20 // or visit www.oracle.com if you need additional information or have any
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	21 // questions.
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	22 //
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	23 //
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	24
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	25 // X86 Common Architecture Description File
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	26
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	27 //----------REGISTER DEFINITION BLOCK------------------------------------------
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	28 // This information is used by the matcher and the register allocator to
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	29 // describe individual registers and classes of registers within the target
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	30 // archtecture.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	31
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	32 register %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	33 //----------Architecture Description Register Definitions----------------------
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	34 // General Registers
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	35 // "reg_def" name ( register save type, C convention save type,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	36 // ideal register type, encoding );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	37 // Register Save Types:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	38 //
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	39 // NS = No-Save: The register allocator assumes that these registers
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	40 // can be used without saving upon entry to the method, &
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	41 // that they do not need to be saved at call sites.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	42 //
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	43 // SOC = Save-On-Call: The register allocator assumes that these registers
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	44 // can be used without saving upon entry to the method,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	45 // but that they must be saved at call sites.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	46 //
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	47 // SOE = Save-On-Entry: The register allocator assumes that these registers
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	48 // must be saved before using them upon entry to the
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	49 // method, but they do not need to be saved at call
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	50 // sites.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	51 //
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	52 // AS = Always-Save: The register allocator assumes that these registers
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	53 // must be saved before using them upon entry to the
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	54 // method, & that they must be saved at call sites.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	55 //
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	56 // Ideal Register Type is used to determine how to save & restore a
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	57 // register. Op_RegI will get spilled with LoadI/StoreI, Op_RegP will get
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	58 // spilled with LoadP/StoreP. If the register supports both, use Op_RegI.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	59 //
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	60 // The encoding number is the actual bit-pattern placed into the opcodes.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	61
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	62 // XMM registers. 256-bit registers or 8 words each, labeled (a)-h.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	63 // Word a in each register holds a Float, words ab hold a Double.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	64 // The whole registers are used in SSE4.2 version intrinsics,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	65 // array copy stubs and superword operations (see UseSSE42Intrinsics,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	66 // UseXMMForArrayCopy and UseSuperword flags).
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	67 // XMM8-XMM15 must be encoded with REX (VEX for UseAVX).
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	68 // Linux ABI: No register preserved across function calls
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	69 // XMM0-XMM7 might hold parameters
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	70 // Windows ABI: XMM6-XMM15 preserved across function calls
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	71 // XMM0-XMM3 might hold parameters
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	72
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	73 reg_def XMM0 ( SOC, SOC, Op_RegF, 0, xmm0->as_VMReg());
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	74 reg_def XMM0b( SOC, SOC, Op_RegF, 0, xmm0->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	75 reg_def XMM0c( SOC, SOC, Op_RegF, 0, xmm0->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	76 reg_def XMM0d( SOC, SOC, Op_RegF, 0, xmm0->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	77 reg_def XMM0e( SOC, SOC, Op_RegF, 0, xmm0->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	78 reg_def XMM0f( SOC, SOC, Op_RegF, 0, xmm0->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	79 reg_def XMM0g( SOC, SOC, Op_RegF, 0, xmm0->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	80 reg_def XMM0h( SOC, SOC, Op_RegF, 0, xmm0->as_VMReg()->next(7));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	81
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	82 reg_def XMM1 ( SOC, SOC, Op_RegF, 1, xmm1->as_VMReg());
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	83 reg_def XMM1b( SOC, SOC, Op_RegF, 1, xmm1->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	84 reg_def XMM1c( SOC, SOC, Op_RegF, 1, xmm1->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	85 reg_def XMM1d( SOC, SOC, Op_RegF, 1, xmm1->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	86 reg_def XMM1e( SOC, SOC, Op_RegF, 1, xmm1->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	87 reg_def XMM1f( SOC, SOC, Op_RegF, 1, xmm1->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	88 reg_def XMM1g( SOC, SOC, Op_RegF, 1, xmm1->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	89 reg_def XMM1h( SOC, SOC, Op_RegF, 1, xmm1->as_VMReg()->next(7));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	90
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	91 reg_def XMM2 ( SOC, SOC, Op_RegF, 2, xmm2->as_VMReg());
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	92 reg_def XMM2b( SOC, SOC, Op_RegF, 2, xmm2->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	93 reg_def XMM2c( SOC, SOC, Op_RegF, 2, xmm2->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	94 reg_def XMM2d( SOC, SOC, Op_RegF, 2, xmm2->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	95 reg_def XMM2e( SOC, SOC, Op_RegF, 2, xmm2->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	96 reg_def XMM2f( SOC, SOC, Op_RegF, 2, xmm2->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	97 reg_def XMM2g( SOC, SOC, Op_RegF, 2, xmm2->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	98 reg_def XMM2h( SOC, SOC, Op_RegF, 2, xmm2->as_VMReg()->next(7));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	99
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	100 reg_def XMM3 ( SOC, SOC, Op_RegF, 3, xmm3->as_VMReg());
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	101 reg_def XMM3b( SOC, SOC, Op_RegF, 3, xmm3->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	102 reg_def XMM3c( SOC, SOC, Op_RegF, 3, xmm3->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	103 reg_def XMM3d( SOC, SOC, Op_RegF, 3, xmm3->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	104 reg_def XMM3e( SOC, SOC, Op_RegF, 3, xmm3->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	105 reg_def XMM3f( SOC, SOC, Op_RegF, 3, xmm3->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	106 reg_def XMM3g( SOC, SOC, Op_RegF, 3, xmm3->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	107 reg_def XMM3h( SOC, SOC, Op_RegF, 3, xmm3->as_VMReg()->next(7));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	108
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	109 reg_def XMM4 ( SOC, SOC, Op_RegF, 4, xmm4->as_VMReg());
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	110 reg_def XMM4b( SOC, SOC, Op_RegF, 4, xmm4->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	111 reg_def XMM4c( SOC, SOC, Op_RegF, 4, xmm4->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	112 reg_def XMM4d( SOC, SOC, Op_RegF, 4, xmm4->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	113 reg_def XMM4e( SOC, SOC, Op_RegF, 4, xmm4->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	114 reg_def XMM4f( SOC, SOC, Op_RegF, 4, xmm4->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	115 reg_def XMM4g( SOC, SOC, Op_RegF, 4, xmm4->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	116 reg_def XMM4h( SOC, SOC, Op_RegF, 4, xmm4->as_VMReg()->next(7));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	117
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	118 reg_def XMM5 ( SOC, SOC, Op_RegF, 5, xmm5->as_VMReg());
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	119 reg_def XMM5b( SOC, SOC, Op_RegF, 5, xmm5->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	120 reg_def XMM5c( SOC, SOC, Op_RegF, 5, xmm5->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	121 reg_def XMM5d( SOC, SOC, Op_RegF, 5, xmm5->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	122 reg_def XMM5e( SOC, SOC, Op_RegF, 5, xmm5->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	123 reg_def XMM5f( SOC, SOC, Op_RegF, 5, xmm5->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	124 reg_def XMM5g( SOC, SOC, Op_RegF, 5, xmm5->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	125 reg_def XMM5h( SOC, SOC, Op_RegF, 5, xmm5->as_VMReg()->next(7));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	126
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	127 #ifdef _WIN64
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	128
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	129 reg_def XMM6 ( SOC, SOE, Op_RegF, 6, xmm6->as_VMReg());
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	130 reg_def XMM6b( SOC, SOE, Op_RegF, 6, xmm6->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	131 reg_def XMM6c( SOC, SOE, Op_RegF, 6, xmm6->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	132 reg_def XMM6d( SOC, SOE, Op_RegF, 6, xmm6->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	133 reg_def XMM6e( SOC, SOE, Op_RegF, 6, xmm6->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	134 reg_def XMM6f( SOC, SOE, Op_RegF, 6, xmm6->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	135 reg_def XMM6g( SOC, SOE, Op_RegF, 6, xmm6->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	136 reg_def XMM6h( SOC, SOE, Op_RegF, 6, xmm6->as_VMReg()->next(7));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	137
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	138 reg_def XMM7 ( SOC, SOE, Op_RegF, 7, xmm7->as_VMReg());
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	139 reg_def XMM7b( SOC, SOE, Op_RegF, 7, xmm7->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	140 reg_def XMM7c( SOC, SOE, Op_RegF, 7, xmm7->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	141 reg_def XMM7d( SOC, SOE, Op_RegF, 7, xmm7->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	142 reg_def XMM7e( SOC, SOE, Op_RegF, 7, xmm7->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	143 reg_def XMM7f( SOC, SOE, Op_RegF, 7, xmm7->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	144 reg_def XMM7g( SOC, SOE, Op_RegF, 7, xmm7->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	145 reg_def XMM7h( SOC, SOE, Op_RegF, 7, xmm7->as_VMReg()->next(7));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	146
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	147 reg_def XMM8 ( SOC, SOE, Op_RegF, 8, xmm8->as_VMReg());
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	148 reg_def XMM8b( SOC, SOE, Op_RegF, 8, xmm8->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	149 reg_def XMM8c( SOC, SOE, Op_RegF, 8, xmm8->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	150 reg_def XMM8d( SOC, SOE, Op_RegF, 8, xmm8->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	151 reg_def XMM8e( SOC, SOE, Op_RegF, 8, xmm8->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	152 reg_def XMM8f( SOC, SOE, Op_RegF, 8, xmm8->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	153 reg_def XMM8g( SOC, SOE, Op_RegF, 8, xmm8->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	154 reg_def XMM8h( SOC, SOE, Op_RegF, 8, xmm8->as_VMReg()->next(7));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	155
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	156 reg_def XMM9 ( SOC, SOE, Op_RegF, 9, xmm9->as_VMReg());
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	157 reg_def XMM9b( SOC, SOE, Op_RegF, 9, xmm9->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	158 reg_def XMM9c( SOC, SOE, Op_RegF, 9, xmm9->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	159 reg_def XMM9d( SOC, SOE, Op_RegF, 9, xmm9->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	160 reg_def XMM9e( SOC, SOE, Op_RegF, 9, xmm9->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	161 reg_def XMM9f( SOC, SOE, Op_RegF, 9, xmm9->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	162 reg_def XMM9g( SOC, SOE, Op_RegF, 9, xmm9->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	163 reg_def XMM9h( SOC, SOE, Op_RegF, 9, xmm9->as_VMReg()->next(7));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	164
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	165 reg_def XMM10 ( SOC, SOE, Op_RegF, 10, xmm10->as_VMReg());
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	166 reg_def XMM10b( SOC, SOE, Op_RegF, 10, xmm10->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	167 reg_def XMM10c( SOC, SOE, Op_RegF, 10, xmm10->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	168 reg_def XMM10d( SOC, SOE, Op_RegF, 10, xmm10->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	169 reg_def XMM10e( SOC, SOE, Op_RegF, 10, xmm10->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	170 reg_def XMM10f( SOC, SOE, Op_RegF, 10, xmm10->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	171 reg_def XMM10g( SOC, SOE, Op_RegF, 10, xmm10->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	172 reg_def XMM10h( SOC, SOE, Op_RegF, 10, xmm10->as_VMReg()->next(7));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	173
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	174 reg_def XMM11 ( SOC, SOE, Op_RegF, 11, xmm11->as_VMReg());
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	175 reg_def XMM11b( SOC, SOE, Op_RegF, 11, xmm11->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	176 reg_def XMM11c( SOC, SOE, Op_RegF, 11, xmm11->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	177 reg_def XMM11d( SOC, SOE, Op_RegF, 11, xmm11->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	178 reg_def XMM11e( SOC, SOE, Op_RegF, 11, xmm11->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	179 reg_def XMM11f( SOC, SOE, Op_RegF, 11, xmm11->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	180 reg_def XMM11g( SOC, SOE, Op_RegF, 11, xmm11->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	181 reg_def XMM11h( SOC, SOE, Op_RegF, 11, xmm11->as_VMReg()->next(7));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	182
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	183 reg_def XMM12 ( SOC, SOE, Op_RegF, 12, xmm12->as_VMReg());
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	184 reg_def XMM12b( SOC, SOE, Op_RegF, 12, xmm12->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	185 reg_def XMM12c( SOC, SOE, Op_RegF, 12, xmm12->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	186 reg_def XMM12d( SOC, SOE, Op_RegF, 12, xmm12->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	187 reg_def XMM12e( SOC, SOE, Op_RegF, 12, xmm12->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	188 reg_def XMM12f( SOC, SOE, Op_RegF, 12, xmm12->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	189 reg_def XMM12g( SOC, SOE, Op_RegF, 12, xmm12->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	190 reg_def XMM12h( SOC, SOE, Op_RegF, 12, xmm12->as_VMReg()->next(7));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	191
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	192 reg_def XMM13 ( SOC, SOE, Op_RegF, 13, xmm13->as_VMReg());
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	193 reg_def XMM13b( SOC, SOE, Op_RegF, 13, xmm13->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	194 reg_def XMM13c( SOC, SOE, Op_RegF, 13, xmm13->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	195 reg_def XMM13d( SOC, SOE, Op_RegF, 13, xmm13->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	196 reg_def XMM13e( SOC, SOE, Op_RegF, 13, xmm13->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	197 reg_def XMM13f( SOC, SOE, Op_RegF, 13, xmm13->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	198 reg_def XMM13g( SOC, SOE, Op_RegF, 13, xmm13->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	199 reg_def XMM13h( SOC, SOE, Op_RegF, 13, xmm13->as_VMReg()->next(7));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	200
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	201 reg_def XMM14 ( SOC, SOE, Op_RegF, 14, xmm14->as_VMReg());
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	202 reg_def XMM14b( SOC, SOE, Op_RegF, 14, xmm14->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	203 reg_def XMM14c( SOC, SOE, Op_RegF, 14, xmm14->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	204 reg_def XMM14d( SOC, SOE, Op_RegF, 14, xmm14->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	205 reg_def XMM14e( SOC, SOE, Op_RegF, 14, xmm14->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	206 reg_def XMM14f( SOC, SOE, Op_RegF, 14, xmm14->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	207 reg_def XMM14g( SOC, SOE, Op_RegF, 14, xmm14->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	208 reg_def XMM14h( SOC, SOE, Op_RegF, 14, xmm14->as_VMReg()->next(7));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	209
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	210 reg_def XMM15 ( SOC, SOE, Op_RegF, 15, xmm15->as_VMReg());
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	211 reg_def XMM15b( SOC, SOE, Op_RegF, 15, xmm15->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	212 reg_def XMM15c( SOC, SOE, Op_RegF, 15, xmm15->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	213 reg_def XMM15d( SOC, SOE, Op_RegF, 15, xmm15->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	214 reg_def XMM15e( SOC, SOE, Op_RegF, 15, xmm15->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	215 reg_def XMM15f( SOC, SOE, Op_RegF, 15, xmm15->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	216 reg_def XMM15g( SOC, SOE, Op_RegF, 15, xmm15->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	217 reg_def XMM15h( SOC, SOE, Op_RegF, 15, xmm15->as_VMReg()->next(7));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	218
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	219 #else // _WIN64
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	220
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	221 reg_def XMM6 ( SOC, SOC, Op_RegF, 6, xmm6->as_VMReg());
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	222 reg_def XMM6b( SOC, SOC, Op_RegF, 6, xmm6->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	223 reg_def XMM6c( SOC, SOC, Op_RegF, 6, xmm6->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	224 reg_def XMM6d( SOC, SOC, Op_RegF, 6, xmm6->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	225 reg_def XMM6e( SOC, SOC, Op_RegF, 6, xmm6->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	226 reg_def XMM6f( SOC, SOC, Op_RegF, 6, xmm6->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	227 reg_def XMM6g( SOC, SOC, Op_RegF, 6, xmm6->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	228 reg_def XMM6h( SOC, SOC, Op_RegF, 6, xmm6->as_VMReg()->next(7));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	229
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	230 reg_def XMM7 ( SOC, SOC, Op_RegF, 7, xmm7->as_VMReg());
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	231 reg_def XMM7b( SOC, SOC, Op_RegF, 7, xmm7->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	232 reg_def XMM7c( SOC, SOC, Op_RegF, 7, xmm7->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	233 reg_def XMM7d( SOC, SOC, Op_RegF, 7, xmm7->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	234 reg_def XMM7e( SOC, SOC, Op_RegF, 7, xmm7->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	235 reg_def XMM7f( SOC, SOC, Op_RegF, 7, xmm7->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	236 reg_def XMM7g( SOC, SOC, Op_RegF, 7, xmm7->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	237 reg_def XMM7h( SOC, SOC, Op_RegF, 7, xmm7->as_VMReg()->next(7));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	238
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	239 #ifdef _LP64
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	240
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	241 reg_def XMM8 ( SOC, SOC, Op_RegF, 8, xmm8->as_VMReg());
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	242 reg_def XMM8b( SOC, SOC, Op_RegF, 8, xmm8->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	243 reg_def XMM8c( SOC, SOC, Op_RegF, 8, xmm8->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	244 reg_def XMM8d( SOC, SOC, Op_RegF, 8, xmm8->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	245 reg_def XMM8e( SOC, SOC, Op_RegF, 8, xmm8->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	246 reg_def XMM8f( SOC, SOC, Op_RegF, 8, xmm8->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	247 reg_def XMM8g( SOC, SOC, Op_RegF, 8, xmm8->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	248 reg_def XMM8h( SOC, SOC, Op_RegF, 8, xmm8->as_VMReg()->next(7));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	249
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	250 reg_def XMM9 ( SOC, SOC, Op_RegF, 9, xmm9->as_VMReg());
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	251 reg_def XMM9b( SOC, SOC, Op_RegF, 9, xmm9->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	252 reg_def XMM9c( SOC, SOC, Op_RegF, 9, xmm9->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	253 reg_def XMM9d( SOC, SOC, Op_RegF, 9, xmm9->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	254 reg_def XMM9e( SOC, SOC, Op_RegF, 9, xmm9->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	255 reg_def XMM9f( SOC, SOC, Op_RegF, 9, xmm9->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	256 reg_def XMM9g( SOC, SOC, Op_RegF, 9, xmm9->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	257 reg_def XMM9h( SOC, SOC, Op_RegF, 9, xmm9->as_VMReg()->next(7));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	258
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	259 reg_def XMM10 ( SOC, SOC, Op_RegF, 10, xmm10->as_VMReg());
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	260 reg_def XMM10b( SOC, SOC, Op_RegF, 10, xmm10->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	261 reg_def XMM10c( SOC, SOC, Op_RegF, 10, xmm10->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	262 reg_def XMM10d( SOC, SOC, Op_RegF, 10, xmm10->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	263 reg_def XMM10e( SOC, SOC, Op_RegF, 10, xmm10->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	264 reg_def XMM10f( SOC, SOC, Op_RegF, 10, xmm10->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	265 reg_def XMM10g( SOC, SOC, Op_RegF, 10, xmm10->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	266 reg_def XMM10h( SOC, SOC, Op_RegF, 10, xmm10->as_VMReg()->next(7));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	267
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	268 reg_def XMM11 ( SOC, SOC, Op_RegF, 11, xmm11->as_VMReg());
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	269 reg_def XMM11b( SOC, SOC, Op_RegF, 11, xmm11->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	270 reg_def XMM11c( SOC, SOC, Op_RegF, 11, xmm11->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	271 reg_def XMM11d( SOC, SOC, Op_RegF, 11, xmm11->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	272 reg_def XMM11e( SOC, SOC, Op_RegF, 11, xmm11->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	273 reg_def XMM11f( SOC, SOC, Op_RegF, 11, xmm11->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	274 reg_def XMM11g( SOC, SOC, Op_RegF, 11, xmm11->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	275 reg_def XMM11h( SOC, SOC, Op_RegF, 11, xmm11->as_VMReg()->next(7));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	276
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	277 reg_def XMM12 ( SOC, SOC, Op_RegF, 12, xmm12->as_VMReg());
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	278 reg_def XMM12b( SOC, SOC, Op_RegF, 12, xmm12->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	279 reg_def XMM12c( SOC, SOC, Op_RegF, 12, xmm12->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	280 reg_def XMM12d( SOC, SOC, Op_RegF, 12, xmm12->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	281 reg_def XMM12e( SOC, SOC, Op_RegF, 12, xmm12->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	282 reg_def XMM12f( SOC, SOC, Op_RegF, 12, xmm12->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	283 reg_def XMM12g( SOC, SOC, Op_RegF, 12, xmm12->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	284 reg_def XMM12h( SOC, SOC, Op_RegF, 12, xmm12->as_VMReg()->next(7));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	285
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	286 reg_def XMM13 ( SOC, SOC, Op_RegF, 13, xmm13->as_VMReg());
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	287 reg_def XMM13b( SOC, SOC, Op_RegF, 13, xmm13->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	288 reg_def XMM13c( SOC, SOC, Op_RegF, 13, xmm13->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	289 reg_def XMM13d( SOC, SOC, Op_RegF, 13, xmm13->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	290 reg_def XMM13e( SOC, SOC, Op_RegF, 13, xmm13->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	291 reg_def XMM13f( SOC, SOC, Op_RegF, 13, xmm13->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	292 reg_def XMM13g( SOC, SOC, Op_RegF, 13, xmm13->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	293 reg_def XMM13h( SOC, SOC, Op_RegF, 13, xmm13->as_VMReg()->next(7));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	294
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	295 reg_def XMM14 ( SOC, SOC, Op_RegF, 14, xmm14->as_VMReg());
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	296 reg_def XMM14b( SOC, SOC, Op_RegF, 14, xmm14->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	297 reg_def XMM14c( SOC, SOC, Op_RegF, 14, xmm14->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	298 reg_def XMM14d( SOC, SOC, Op_RegF, 14, xmm14->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	299 reg_def XMM14e( SOC, SOC, Op_RegF, 14, xmm14->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	300 reg_def XMM14f( SOC, SOC, Op_RegF, 14, xmm14->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	301 reg_def XMM14g( SOC, SOC, Op_RegF, 14, xmm14->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	302 reg_def XMM14h( SOC, SOC, Op_RegF, 14, xmm14->as_VMReg()->next(7));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	303
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	304 reg_def XMM15 ( SOC, SOC, Op_RegF, 15, xmm15->as_VMReg());
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	305 reg_def XMM15b( SOC, SOC, Op_RegF, 15, xmm15->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	306 reg_def XMM15c( SOC, SOC, Op_RegF, 15, xmm15->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	307 reg_def XMM15d( SOC, SOC, Op_RegF, 15, xmm15->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	308 reg_def XMM15e( SOC, SOC, Op_RegF, 15, xmm15->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	309 reg_def XMM15f( SOC, SOC, Op_RegF, 15, xmm15->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	310 reg_def XMM15g( SOC, SOC, Op_RegF, 15, xmm15->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	311 reg_def XMM15h( SOC, SOC, Op_RegF, 15, xmm15->as_VMReg()->next(7));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	312
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	313 #endif // _LP64
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	314
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	315 #endif // _WIN64
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	316
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	317 #ifdef _LP64
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	318 reg_def RFLAGS(SOC, SOC, 0, 16, VMRegImpl::Bad());
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	319 #else
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	320 reg_def RFLAGS(SOC, SOC, 0, 8, VMRegImpl::Bad());
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	321 #endif // _LP64
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	322
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	323 alloc_class chunk1(XMM0, XMM0b, XMM0c, XMM0d, XMM0e, XMM0f, XMM0g, XMM0h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	324 XMM1, XMM1b, XMM1c, XMM1d, XMM1e, XMM1f, XMM1g, XMM1h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	325 XMM2, XMM2b, XMM2c, XMM2d, XMM2e, XMM2f, XMM2g, XMM2h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	326 XMM3, XMM3b, XMM3c, XMM3d, XMM3e, XMM3f, XMM3g, XMM3h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	327 XMM4, XMM4b, XMM4c, XMM4d, XMM4e, XMM4f, XMM4g, XMM4h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	328 XMM5, XMM5b, XMM5c, XMM5d, XMM5e, XMM5f, XMM5g, XMM5h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	329 XMM6, XMM6b, XMM6c, XMM6d, XMM6e, XMM6f, XMM6g, XMM6h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	330 XMM7, XMM7b, XMM7c, XMM7d, XMM7e, XMM7f, XMM7g, XMM7h
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	331 #ifdef _LP64
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	332 ,XMM8, XMM8b, XMM8c, XMM8d, XMM8e, XMM8f, XMM8g, XMM8h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	333 XMM9, XMM9b, XMM9c, XMM9d, XMM9e, XMM9f, XMM9g, XMM9h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	334 XMM10, XMM10b, XMM10c, XMM10d, XMM10e, XMM10f, XMM10g, XMM10h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	335 XMM11, XMM11b, XMM11c, XMM11d, XMM11e, XMM11f, XMM11g, XMM11h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	336 XMM12, XMM12b, XMM12c, XMM12d, XMM12e, XMM12f, XMM12g, XMM12h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	337 XMM13, XMM13b, XMM13c, XMM13d, XMM13e, XMM13f, XMM13g, XMM13h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	338 XMM14, XMM14b, XMM14c, XMM14d, XMM14e, XMM14f, XMM14g, XMM14h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	339 XMM15, XMM15b, XMM15c, XMM15d, XMM15e, XMM15f, XMM15g, XMM15h
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	340 #endif
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	341 );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	342
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	343 // flags allocation class should be last.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	344 alloc_class chunk2(RFLAGS);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	345
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	346 // Singleton class for condition codes
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	347 reg_class int_flags(RFLAGS);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	348
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	349 // Class for all float registers
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	350 reg_class float_reg(XMM0,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	351 XMM1,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	352 XMM2,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	353 XMM3,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	354 XMM4,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	355 XMM5,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	356 XMM6,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	357 XMM7
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	358 #ifdef _LP64
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	359 ,XMM8,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	360 XMM9,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	361 XMM10,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	362 XMM11,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	363 XMM12,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	364 XMM13,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	365 XMM14,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	366 XMM15
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	367 #endif
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	368 );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	369
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	370 // Class for all double registers
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	371 reg_class double_reg(XMM0, XMM0b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	372 XMM1, XMM1b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	373 XMM2, XMM2b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	374 XMM3, XMM3b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	375 XMM4, XMM4b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	376 XMM5, XMM5b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	377 XMM6, XMM6b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	378 XMM7, XMM7b
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	379 #ifdef _LP64
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	380 ,XMM8, XMM8b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	381 XMM9, XMM9b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	382 XMM10, XMM10b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	383 XMM11, XMM11b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	384 XMM12, XMM12b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	385 XMM13, XMM13b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	386 XMM14, XMM14b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	387 XMM15, XMM15b
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	388 #endif
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	389 );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	390
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	391 // Class for all 32bit vector registers
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	392 reg_class vectors_reg(XMM0,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	393 XMM1,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	394 XMM2,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	395 XMM3,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	396 XMM4,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	397 XMM5,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	398 XMM6,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	399 XMM7
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	400 #ifdef _LP64
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	401 ,XMM8,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	402 XMM9,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	403 XMM10,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	404 XMM11,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	405 XMM12,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	406 XMM13,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	407 XMM14,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	408 XMM15
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	409 #endif
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	410 );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	411
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	412 // Class for all 64bit vector registers
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	413 reg_class vectord_reg(XMM0, XMM0b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	414 XMM1, XMM1b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	415 XMM2, XMM2b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	416 XMM3, XMM3b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	417 XMM4, XMM4b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	418 XMM5, XMM5b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	419 XMM6, XMM6b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	420 XMM7, XMM7b
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	421 #ifdef _LP64
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	422 ,XMM8, XMM8b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	423 XMM9, XMM9b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	424 XMM10, XMM10b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	425 XMM11, XMM11b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	426 XMM12, XMM12b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	427 XMM13, XMM13b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	428 XMM14, XMM14b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	429 XMM15, XMM15b
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	430 #endif
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	431 );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	432
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	433 // Class for all 128bit vector registers
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	434 reg_class vectorx_reg(XMM0, XMM0b, XMM0c, XMM0d,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	435 XMM1, XMM1b, XMM1c, XMM1d,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	436 XMM2, XMM2b, XMM2c, XMM2d,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	437 XMM3, XMM3b, XMM3c, XMM3d,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	438 XMM4, XMM4b, XMM4c, XMM4d,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	439 XMM5, XMM5b, XMM5c, XMM5d,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	440 XMM6, XMM6b, XMM6c, XMM6d,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	441 XMM7, XMM7b, XMM7c, XMM7d
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	442 #ifdef _LP64
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	443 ,XMM8, XMM8b, XMM8c, XMM8d,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	444 XMM9, XMM9b, XMM9c, XMM9d,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	445 XMM10, XMM10b, XMM10c, XMM10d,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	446 XMM11, XMM11b, XMM11c, XMM11d,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	447 XMM12, XMM12b, XMM12c, XMM12d,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	448 XMM13, XMM13b, XMM13c, XMM13d,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	449 XMM14, XMM14b, XMM14c, XMM14d,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	450 XMM15, XMM15b, XMM15c, XMM15d
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	451 #endif
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	452 );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	453
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	454 // Class for all 256bit vector registers
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	455 reg_class vectory_reg(XMM0, XMM0b, XMM0c, XMM0d, XMM0e, XMM0f, XMM0g, XMM0h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	456 XMM1, XMM1b, XMM1c, XMM1d, XMM1e, XMM1f, XMM1g, XMM1h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	457 XMM2, XMM2b, XMM2c, XMM2d, XMM2e, XMM2f, XMM2g, XMM2h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	458 XMM3, XMM3b, XMM3c, XMM3d, XMM3e, XMM3f, XMM3g, XMM3h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	459 XMM4, XMM4b, XMM4c, XMM4d, XMM4e, XMM4f, XMM4g, XMM4h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	460 XMM5, XMM5b, XMM5c, XMM5d, XMM5e, XMM5f, XMM5g, XMM5h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	461 XMM6, XMM6b, XMM6c, XMM6d, XMM6e, XMM6f, XMM6g, XMM6h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	462 XMM7, XMM7b, XMM7c, XMM7d, XMM7e, XMM7f, XMM7g, XMM7h
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	463 #ifdef _LP64
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	464 ,XMM8, XMM8b, XMM8c, XMM8d, XMM8e, XMM8f, XMM8g, XMM8h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	465 XMM9, XMM9b, XMM9c, XMM9d, XMM9e, XMM9f, XMM9g, XMM9h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	466 XMM10, XMM10b, XMM10c, XMM10d, XMM10e, XMM10f, XMM10g, XMM10h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	467 XMM11, XMM11b, XMM11c, XMM11d, XMM11e, XMM11f, XMM11g, XMM11h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	468 XMM12, XMM12b, XMM12c, XMM12d, XMM12e, XMM12f, XMM12g, XMM12h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	469 XMM13, XMM13b, XMM13c, XMM13d, XMM13e, XMM13f, XMM13g, XMM13h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	470 XMM14, XMM14b, XMM14c, XMM14d, XMM14e, XMM14f, XMM14g, XMM14h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	471 XMM15, XMM15b, XMM15c, XMM15d, XMM15e, XMM15f, XMM15g, XMM15h
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	472 #endif
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	473 );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	474
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	475 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	476
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	477 source %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	478 // Float masks come from different places depending on platform.
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	479 #ifdef _LP64
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	480 static address float_signmask() { return StubRoutines::x86::float_sign_mask(); }
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	481 static address float_signflip() { return StubRoutines::x86::float_sign_flip(); }
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	482 static address double_signmask() { return StubRoutines::x86::double_sign_mask(); }
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	483 static address double_signflip() { return StubRoutines::x86::double_sign_flip(); }
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	484 #else
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	485 static address float_signmask() { return (address)float_signmask_pool; }
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	486 static address float_signflip() { return (address)float_signflip_pool; }
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	487 static address double_signmask() { return (address)double_signmask_pool; }
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	488 static address double_signflip() { return (address)double_signflip_pool; }
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	489 #endif
4950 9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	490
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	491 // Map Types to machine register types
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	492 const int Matcher::base2reg[Type::lastype] = {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	493 Node::NotAMachineReg,0,0, Op_RegI, Op_RegL, 0, Op_RegN,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	494 Node::NotAMachineReg, Node::NotAMachineReg, /* tuple, array */
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	495 Op_VecS, Op_VecD, Op_VecX, Op_VecY, /* Vectors */
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	496 Op_RegP, Op_RegP, Op_RegP, Op_RegP, Op_RegP, Op_RegP, /* the pointers */
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	497 0, 0/abio/,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	498 Op_RegP /* Return address /, 0, / the memories */
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	499 Op_RegF, Op_RegF, Op_RegF, Op_RegD, Op_RegD, Op_RegD,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	500 0 /bottom/
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	501 };
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	502
6614 006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	503 const bool Matcher::match_rule_supported(int opcode) {
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	504 if (!has_match_rule(opcode))
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	505 return false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	506
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	507 switch (opcode) {
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	508 case Op_PopCountI:
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	509 case Op_PopCountL:
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	510 if (!UsePopCountInstruction)
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	511 return false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	512 case Op_MulVI:
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	513 if ((UseSSE < 4) && (UseAVX < 1)) // only with SSE4_1 or AVX
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	514 return false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	515 break;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	516 }
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	517
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	518 return true; // Per default match rules are supported.
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	519 }
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	520
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	521 // Max vector size in bytes. 0 if not supported.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	522 const int Matcher::vector_width_in_bytes(BasicType bt) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	523 assert(is_java_primitive(bt), "only primitive type vectors");
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	524 if (UseSSE < 2) return 0;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	525 // SSE2 supports 128bit vectors for all types.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	526 // AVX2 supports 256bit vectors for all types.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	527 int size = (UseAVX > 1) ? 32 : 16;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	528 // AVX1 supports 256bit vectors only for FLOAT and DOUBLE.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	529 if (UseAVX > 0 && (bt == T_FLOAT \|\| bt == T_DOUBLE))
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	530 size = 32;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	531 // Use flag to limit vector size.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	532 size = MIN2(size,(int)MaxVectorSize);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	533 // Minimum 2 values in vector (or 4 for bytes).
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	534 switch (bt) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	535 case T_DOUBLE:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	536 case T_LONG:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	537 if (size < 16) return 0;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	538 case T_FLOAT:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	539 case T_INT:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	540 if (size < 8) return 0;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	541 case T_BOOLEAN:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	542 case T_BYTE:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	543 case T_CHAR:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	544 case T_SHORT:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	545 if (size < 4) return 0;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	546 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	547 default:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	548 ShouldNotReachHere();
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	549 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	550 return size;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	551 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	552
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	553 // Limits on vector size (number of elements) loaded into vector.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	554 const int Matcher::max_vector_size(const BasicType bt) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	555 return vector_width_in_bytes(bt)/type2aelembytes(bt);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	556 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	557 const int Matcher::min_vector_size(const BasicType bt) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	558 int max_size = max_vector_size(bt);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	559 // Min size which can be loaded into vector is 4 bytes.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	560 int size = (type2aelembytes(bt) == 1) ? 4 : 2;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	561 return MIN2(size,max_size);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	562 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	563
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	564 // Vector ideal reg corresponding to specidied size in bytes
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	565 const int Matcher::vector_ideal_reg(int size) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	566 assert(MaxVectorSize >= size, "");
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	567 switch(size) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	568 case 4: return Op_VecS;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	569 case 8: return Op_VecD;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	570 case 16: return Op_VecX;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	571 case 32: return Op_VecY;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	572 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	573 ShouldNotReachHere();
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	574 return 0;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	575 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	576
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	577 // x86 supports misaligned vectors store/load.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	578 const bool Matcher::misaligned_vectors_ok() {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	579 return !AlignVector; // can be changed by flag
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	580 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	581
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	582 // Helper methods for MachSpillCopyNode::implementation().
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	583 static int vec_mov_helper(CodeBuffer *cbuf, bool do_size, int src_lo, int dst_lo,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	584 int src_hi, int dst_hi, uint ireg, outputStream* st) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	585 // In 64-bit VM size calculation is very complex. Emitting instructions
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	586 // into scratch buffer is used to get size in 64-bit VM.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	587 LP64_ONLY( assert(!do_size, "this method calculates size only for 32-bit VM"); )
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	588 assert(ireg == Op_VecS \|\| // 32bit vector
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	589 (src_lo & 1) == 0 && (src_lo + 1) == src_hi &&
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	590 (dst_lo & 1) == 0 && (dst_lo + 1) == dst_hi,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	591 "no non-adjacent vector moves" );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	592 if (cbuf) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	593 MacroAssembler _masm(cbuf);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	594 int offset = __ offset();
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	595 switch (ireg) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	596 case Op_VecS: // copy whole register
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	597 case Op_VecD:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	598 case Op_VecX:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	599 __ movdqu(as_XMMRegister(Matcher::_regEncode[dst_lo]), as_XMMRegister(Matcher::_regEncode[src_lo]));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	600 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	601 case Op_VecY:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	602 __ vmovdqu(as_XMMRegister(Matcher::_regEncode[dst_lo]), as_XMMRegister(Matcher::_regEncode[src_lo]));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	603 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	604 default:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	605 ShouldNotReachHere();
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	606 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	607 int size = __ offset() - offset;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	608 #ifdef ASSERT
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	609 // VEX_2bytes prefix is used if UseAVX > 0, so it takes the same 2 bytes as SIMD prefix.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	610 assert(!do_size \|\| size == 4, "incorrect size calculattion");
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	611 #endif
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	612 return size;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	613 #ifndef PRODUCT
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	614 } else if (!do_size) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	615 switch (ireg) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	616 case Op_VecS:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	617 case Op_VecD:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	618 case Op_VecX:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	619 st->print("movdqu %s,%s\t# spill",Matcher::regName[dst_lo],Matcher::regName[src_lo]);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	620 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	621 case Op_VecY:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	622 st->print("vmovdqu %s,%s\t# spill",Matcher::regName[dst_lo],Matcher::regName[src_lo]);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	623 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	624 default:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	625 ShouldNotReachHere();
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	626 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	627 #endif
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	628 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	629 // VEX_2bytes prefix is used if UseAVX > 0, and it takes the same 2 bytes as SIMD prefix.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	630 return 4;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	631 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	632
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	633 static int vec_spill_helper(CodeBuffer *cbuf, bool do_size, bool is_load,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	634 int stack_offset, int reg, uint ireg, outputStream* st) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	635 // In 64-bit VM size calculation is very complex. Emitting instructions
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	636 // into scratch buffer is used to get size in 64-bit VM.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	637 LP64_ONLY( assert(!do_size, "this method calculates size only for 32-bit VM"); )
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	638 if (cbuf) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	639 MacroAssembler _masm(cbuf);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	640 int offset = __ offset();
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	641 if (is_load) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	642 switch (ireg) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	643 case Op_VecS:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	644 __ movdl(as_XMMRegister(Matcher::_regEncode[reg]), Address(rsp, stack_offset));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	645 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	646 case Op_VecD:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	647 __ movq(as_XMMRegister(Matcher::_regEncode[reg]), Address(rsp, stack_offset));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	648 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	649 case Op_VecX:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	650 __ movdqu(as_XMMRegister(Matcher::_regEncode[reg]), Address(rsp, stack_offset));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	651 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	652 case Op_VecY:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	653 __ vmovdqu(as_XMMRegister(Matcher::_regEncode[reg]), Address(rsp, stack_offset));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	654 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	655 default:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	656 ShouldNotReachHere();
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	657 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	658 } else { // store
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	659 switch (ireg) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	660 case Op_VecS:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	661 __ movdl(Address(rsp, stack_offset), as_XMMRegister(Matcher::_regEncode[reg]));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	662 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	663 case Op_VecD:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	664 __ movq(Address(rsp, stack_offset), as_XMMRegister(Matcher::_regEncode[reg]));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	665 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	666 case Op_VecX:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	667 __ movdqu(Address(rsp, stack_offset), as_XMMRegister(Matcher::_regEncode[reg]));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	668 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	669 case Op_VecY:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	670 __ vmovdqu(Address(rsp, stack_offset), as_XMMRegister(Matcher::_regEncode[reg]));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	671 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	672 default:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	673 ShouldNotReachHere();
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	674 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	675 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	676 int size = __ offset() - offset;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	677 #ifdef ASSERT
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	678 int offset_size = (stack_offset == 0) ? 0 : ((stack_offset < 0x80) ? 1 : 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	679 // VEX_2bytes prefix is used if UseAVX > 0, so it takes the same 2 bytes as SIMD prefix.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	680 assert(!do_size \|\| size == (5+offset_size), "incorrect size calculattion");
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	681 #endif
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	682 return size;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	683 #ifndef PRODUCT
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	684 } else if (!do_size) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	685 if (is_load) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	686 switch (ireg) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	687 case Op_VecS:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	688 st->print("movd %s,[rsp + %d]\t# spill", Matcher::regName[reg], stack_offset);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	689 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	690 case Op_VecD:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	691 st->print("movq %s,[rsp + %d]\t# spill", Matcher::regName[reg], stack_offset);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	692 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	693 case Op_VecX:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	694 st->print("movdqu %s,[rsp + %d]\t# spill", Matcher::regName[reg], stack_offset);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	695 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	696 case Op_VecY:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	697 st->print("vmovdqu %s,[rsp + %d]\t# spill", Matcher::regName[reg], stack_offset);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	698 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	699 default:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	700 ShouldNotReachHere();
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	701 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	702 } else { // store
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	703 switch (ireg) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	704 case Op_VecS:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	705 st->print("movd [rsp + %d],%s\t# spill", stack_offset, Matcher::regName[reg]);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	706 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	707 case Op_VecD:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	708 st->print("movq [rsp + %d],%s\t# spill", stack_offset, Matcher::regName[reg]);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	709 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	710 case Op_VecX:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	711 st->print("movdqu [rsp + %d],%s\t# spill", stack_offset, Matcher::regName[reg]);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	712 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	713 case Op_VecY:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	714 st->print("vmovdqu [rsp + %d],%s\t# spill", stack_offset, Matcher::regName[reg]);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	715 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	716 default:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	717 ShouldNotReachHere();
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	718 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	719 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	720 #endif
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	721 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	722 int offset_size = (stack_offset == 0) ? 0 : ((stack_offset < 0x80) ? 1 : 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	723 // VEX_2bytes prefix is used if UseAVX > 0, so it takes the same 2 bytes as SIMD prefix.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	724 return 5+offset_size;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	725 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	726
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	727 static inline jfloat replicate4_imm(int con, int width) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	728 // Load a constant of "width" (in bytes) and replicate it to fill 32bit.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	729 assert(width == 1 \|\| width == 2, "only byte or short types here");
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	730 int bit_width = width * 8;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	731 jint val = con;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	732 val &= (1 << bit_width) - 1; // mask off sign bits
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	733 while(bit_width < 32) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	734 val \|= (val << bit_width);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	735 bit_width <<= 1;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	736 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	737 jfloat fval = ((jfloat) &val); // coerce to float type
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	738 return fval;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	739 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	740
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	741 static inline jdouble replicate8_imm(int con, int width) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	742 // Load a constant of "width" (in bytes) and replicate it to fill 64bit.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	743 assert(width == 1 \|\| width == 2 \|\| width == 4, "only byte, short or int types here");
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	744 int bit_width = width * 8;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	745 jlong val = con;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	746 val &= (((jlong) 1) << bit_width) - 1; // mask off sign bits
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	747 while(bit_width < 64) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	748 val \|= (val << bit_width);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	749 bit_width <<= 1;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	750 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	751 jdouble dval = ((jdouble) &val); // coerce to double type
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	752 return dval;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	753 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	754
4950 9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	755 #ifndef PRODUCT
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	756 void MachNopNode::format(PhaseRegAlloc, outputStream st) const {
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	757 st->print("nop \t# %d bytes pad for loops and calls", _count);
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	758 }
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	759 #endif
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	760
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	761 void MachNopNode::emit(CodeBuffer &cbuf, PhaseRegAlloc*) const {
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	762 MacroAssembler _masm(&cbuf);
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	763 __ nop(_count);
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	764 }
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	765
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	766 uint MachNopNode::size(PhaseRegAlloc*) const {
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	767 return _count;
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	768 }
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	769
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	770 #ifndef PRODUCT
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	771 void MachBreakpointNode::format(PhaseRegAlloc, outputStream st) const {
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	772 st->print("# breakpoint");
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	773 }
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	774 #endif
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	775
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	776 void MachBreakpointNode::emit(CodeBuffer &cbuf, PhaseRegAlloc* ra_) const {
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	777 MacroAssembler _masm(&cbuf);
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	778 __ int3();
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	779 }
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	780
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	781 uint MachBreakpointNode::size(PhaseRegAlloc* ra_) const {
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	782 return MachNode::size(ra_);
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	783 }
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	784
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	785 %}
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	786
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	787 encode %{
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	788
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	789 enc_class preserve_SP %{
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	790 debug_only(int off0 = cbuf.insts_size());
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	791 MacroAssembler _masm(&cbuf);
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	792 // RBP is preserved across all calls, even compiled calls.
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	793 // Use it to preserve RSP in places where the callee might change the SP.
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	794 __ movptr(rbp_mh_SP_save, rsp);
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	795 debug_only(int off1 = cbuf.insts_size());
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	796 assert(off1 - off0 == preserve_SP_size(), "correct size prediction");
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	797 %}
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	798
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	799 enc_class restore_SP %{
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	800 MacroAssembler _masm(&cbuf);
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	801 __ movptr(rsp, rbp_mh_SP_save);
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	802 %}
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	803
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	804 enc_class call_epilog %{
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	805 if (VerifyStackAtCalls) {
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	806 // Check that stack depth is unchanged: find majik cookie on stack
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	807 int framesize = ra_->reg2offset_unchecked(OptoReg::add(ra_->_matcher._old_SP, -3*VMRegImpl::slots_per_word));
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	808 MacroAssembler _masm(&cbuf);
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	809 Label L;
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	810 __ cmpptr(Address(rsp, framesize), (int32_t)0xbadb100d);
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	811 __ jccb(Assembler::equal, L);
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	812 // Die if stack mismatch
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	813 __ int3();
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	814 __ bind(L);
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	815 }
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	816 %}
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	817
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	818 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	819
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	820
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	821 //----------OPERANDS-----------------------------------------------------------
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	822 // Operand definitions must precede instruction definitions for correct parsing
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	823 // in the ADLC because operands constitute user defined types which are used in
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	824 // instruction definitions.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	825
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	826 // Vectors
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	827 operand vecS() %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	828 constraint(ALLOC_IN_RC(vectors_reg));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	829 match(VecS);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	830
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	831 format %{ %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	832 interface(REG_INTER);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	833 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	834
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	835 operand vecD() %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	836 constraint(ALLOC_IN_RC(vectord_reg));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	837 match(VecD);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	838
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	839 format %{ %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	840 interface(REG_INTER);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	841 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	842
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	843 operand vecX() %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	844 constraint(ALLOC_IN_RC(vectorx_reg));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	845 match(VecX);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	846
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	847 format %{ %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	848 interface(REG_INTER);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	849 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	850
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	851 operand vecY() %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	852 constraint(ALLOC_IN_RC(vectory_reg));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	853 match(VecY);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	854
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	855 format %{ %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	856 interface(REG_INTER);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	857 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	858
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	859
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	860 // INSTRUCTIONS -- Platform independent definitions (same for 32- and 64-bit)
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	861
4950 9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	862 // ============================================================================
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	863
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	864 instruct ShouldNotReachHere() %{
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	865 match(Halt);
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	866 format %{ "int3\t# ShouldNotReachHere" %}
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	867 ins_encode %{
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	868 __ int3();
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	869 %}
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	870 ins_pipe(pipe_slow);
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	871 %}
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	872
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	873 // ============================================================================
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	874
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	875 instruct addF_reg(regF dst, regF src) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	876 predicate((UseSSE>=1) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	877 match(Set dst (AddF dst src));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	878
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	879 format %{ "addss $dst, $src" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	880 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	881 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	882 __ addss($dst$$XMMRegister, $src$$XMMRegister);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	883 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	884 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	885 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	886
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	887 instruct addF_mem(regF dst, memory src) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	888 predicate((UseSSE>=1) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	889 match(Set dst (AddF dst (LoadF src)));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	890
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	891 format %{ "addss $dst, $src" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	892 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	893 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	894 __ addss($dst$$XMMRegister, $src$$Address);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	895 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	896 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	897 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	898
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	899 instruct addF_imm(regF dst, immF con) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	900 predicate((UseSSE>=1) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	901 match(Set dst (AddF dst con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	902 format %{ "addss $dst, [$constantaddress]\t# load from constant table: float=$con" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	903 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	904 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	905 __ addss($dst$$XMMRegister, $constantaddress($con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	906 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	907 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	908 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	909
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	910 instruct addF_reg_reg(regF dst, regF src1, regF src2) %{
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	911 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	912 match(Set dst (AddF src1 src2));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	913
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	914 format %{ "vaddss $dst, $src1, $src2" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	915 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	916 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	917 __ vaddss($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	918 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	919 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	920 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	921
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	922 instruct addF_reg_mem(regF dst, regF src1, memory src2) %{
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	923 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	924 match(Set dst (AddF src1 (LoadF src2)));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	925
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	926 format %{ "vaddss $dst, $src1, $src2" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	927 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	928 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	929 __ vaddss($dst$$XMMRegister, $src1$$XMMRegister, $src2$$Address);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	930 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	931 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	932 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	933
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	934 instruct addF_reg_imm(regF dst, regF src, immF con) %{
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	935 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	936 match(Set dst (AddF src con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	937
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	938 format %{ "vaddss $dst, $src, [$constantaddress]\t# load from constant table: float=$con" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	939 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	940 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	941 __ vaddss($dst$$XMMRegister, $src$$XMMRegister, $constantaddress($con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	942 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	943 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	944 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	945
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	946 instruct addD_reg(regD dst, regD src) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	947 predicate((UseSSE>=2) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	948 match(Set dst (AddD dst src));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	949
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	950 format %{ "addsd $dst, $src" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	951 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	952 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	953 __ addsd($dst$$XMMRegister, $src$$XMMRegister);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	954 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	955 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	956 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	957
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	958 instruct addD_mem(regD dst, memory src) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	959 predicate((UseSSE>=2) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	960 match(Set dst (AddD dst (LoadD src)));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	961
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	962 format %{ "addsd $dst, $src" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	963 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	964 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	965 __ addsd($dst$$XMMRegister, $src$$Address);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	966 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	967 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	968 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	969
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	970 instruct addD_imm(regD dst, immD con) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	971 predicate((UseSSE>=2) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	972 match(Set dst (AddD dst con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	973 format %{ "addsd $dst, [$constantaddress]\t# load from constant table: double=$con" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	974 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	975 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	976 __ addsd($dst$$XMMRegister, $constantaddress($con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	977 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	978 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	979 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	980
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	981 instruct addD_reg_reg(regD dst, regD src1, regD src2) %{
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	982 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	983 match(Set dst (AddD src1 src2));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	984
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	985 format %{ "vaddsd $dst, $src1, $src2" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	986 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	987 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	988 __ vaddsd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	989 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	990 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	991 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	992
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	993 instruct addD_reg_mem(regD dst, regD src1, memory src2) %{
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	994 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	995 match(Set dst (AddD src1 (LoadD src2)));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	996
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	997 format %{ "vaddsd $dst, $src1, $src2" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	998 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	999 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1000 __ vaddsd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$Address);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1001 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1002 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1003 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1004
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1005 instruct addD_reg_imm(regD dst, regD src, immD con) %{
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1006 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1007 match(Set dst (AddD src con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1008
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1009 format %{ "vaddsd $dst, $src, [$constantaddress]\t# load from constant table: double=$con" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1010 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1011 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1012 __ vaddsd($dst$$XMMRegister, $src$$XMMRegister, $constantaddress($con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1013 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1014 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1015 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1016
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1017 instruct subF_reg(regF dst, regF src) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1018 predicate((UseSSE>=1) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1019 match(Set dst (SubF dst src));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1020
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1021 format %{ "subss $dst, $src" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1022 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1023 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1024 __ subss($dst$$XMMRegister, $src$$XMMRegister);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1025 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1026 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1027 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1028
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1029 instruct subF_mem(regF dst, memory src) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1030 predicate((UseSSE>=1) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1031 match(Set dst (SubF dst (LoadF src)));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1032
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1033 format %{ "subss $dst, $src" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1034 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1035 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1036 __ subss($dst$$XMMRegister, $src$$Address);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1037 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1038 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1039 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1040
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1041 instruct subF_imm(regF dst, immF con) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1042 predicate((UseSSE>=1) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1043 match(Set dst (SubF dst con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1044 format %{ "subss $dst, [$constantaddress]\t# load from constant table: float=$con" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1045 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1046 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1047 __ subss($dst$$XMMRegister, $constantaddress($con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1048 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1049 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1050 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1051
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1052 instruct subF_reg_reg(regF dst, regF src1, regF src2) %{
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1053 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1054 match(Set dst (SubF src1 src2));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1055
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1056 format %{ "vsubss $dst, $src1, $src2" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1057 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1058 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1059 __ vsubss($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1060 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1061 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1062 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1063
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1064 instruct subF_reg_mem(regF dst, regF src1, memory src2) %{
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1065 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1066 match(Set dst (SubF src1 (LoadF src2)));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1067
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1068 format %{ "vsubss $dst, $src1, $src2" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1069 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1070 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1071 __ vsubss($dst$$XMMRegister, $src1$$XMMRegister, $src2$$Address);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1072 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1073 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1074 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1075
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1076 instruct subF_reg_imm(regF dst, regF src, immF con) %{
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1077 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1078 match(Set dst (SubF src con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1079
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1080 format %{ "vsubss $dst, $src, [$constantaddress]\t# load from constant table: float=$con" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1081 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1082 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1083 __ vsubss($dst$$XMMRegister, $src$$XMMRegister, $constantaddress($con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1084 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1085 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1086 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1087
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1088 instruct subD_reg(regD dst, regD src) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1089 predicate((UseSSE>=2) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1090 match(Set dst (SubD dst src));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1091
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1092 format %{ "subsd $dst, $src" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1093 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1094 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1095 __ subsd($dst$$XMMRegister, $src$$XMMRegister);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1096 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1097 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1098 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1099
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1100 instruct subD_mem(regD dst, memory src) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1101 predicate((UseSSE>=2) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1102 match(Set dst (SubD dst (LoadD src)));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1103
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1104 format %{ "subsd $dst, $src" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1105 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1106 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1107 __ subsd($dst$$XMMRegister, $src$$Address);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1108 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1109 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1110 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1111
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1112 instruct subD_imm(regD dst, immD con) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1113 predicate((UseSSE>=2) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1114 match(Set dst (SubD dst con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1115 format %{ "subsd $dst, [$constantaddress]\t# load from constant table: double=$con" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1116 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1117 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1118 __ subsd($dst$$XMMRegister, $constantaddress($con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1119 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1120 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1121 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1122
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1123 instruct subD_reg_reg(regD dst, regD src1, regD src2) %{
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1124 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1125 match(Set dst (SubD src1 src2));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1126
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1127 format %{ "vsubsd $dst, $src1, $src2" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1128 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1129 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1130 __ vsubsd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1131 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1132 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1133 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1134
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1135 instruct subD_reg_mem(regD dst, regD src1, memory src2) %{
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1136 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1137 match(Set dst (SubD src1 (LoadD src2)));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1138
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1139 format %{ "vsubsd $dst, $src1, $src2" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1140 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1141 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1142 __ vsubsd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$Address);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1143 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1144 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1145 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1146
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1147 instruct subD_reg_imm(regD dst, regD src, immD con) %{
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1148 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1149 match(Set dst (SubD src con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1150
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1151 format %{ "vsubsd $dst, $src, [$constantaddress]\t# load from constant table: double=$con" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1152 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1153 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1154 __ vsubsd($dst$$XMMRegister, $src$$XMMRegister, $constantaddress($con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1155 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1156 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1157 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1158
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1159 instruct mulF_reg(regF dst, regF src) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1160 predicate((UseSSE>=1) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1161 match(Set dst (MulF dst src));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1162
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1163 format %{ "mulss $dst, $src" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1164 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1165 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1166 __ mulss($dst$$XMMRegister, $src$$XMMRegister);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1167 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1168 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1169 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1170
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1171 instruct mulF_mem(regF dst, memory src) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1172 predicate((UseSSE>=1) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1173 match(Set dst (MulF dst (LoadF src)));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1174
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1175 format %{ "mulss $dst, $src" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1176 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1177 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1178 __ mulss($dst$$XMMRegister, $src$$Address);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1179 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1180 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1181 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1182
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1183 instruct mulF_imm(regF dst, immF con) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1184 predicate((UseSSE>=1) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1185 match(Set dst (MulF dst con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1186 format %{ "mulss $dst, [$constantaddress]\t# load from constant table: float=$con" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1187 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1188 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1189 __ mulss($dst$$XMMRegister, $constantaddress($con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1190 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1191 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1192 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1193
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1194 instruct mulF_reg_reg(regF dst, regF src1, regF src2) %{
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1195 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1196 match(Set dst (MulF src1 src2));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1197
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1198 format %{ "vmulss $dst, $src1, $src2" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1199 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1200 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1201 __ vmulss($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1202 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1203 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1204 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1205
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1206 instruct mulF_reg_mem(regF dst, regF src1, memory src2) %{
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1207 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1208 match(Set dst (MulF src1 (LoadF src2)));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1209
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1210 format %{ "vmulss $dst, $src1, $src2" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1211 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1212 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1213 __ vmulss($dst$$XMMRegister, $src1$$XMMRegister, $src2$$Address);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1214 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1215 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1216 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1217
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1218 instruct mulF_reg_imm(regF dst, regF src, immF con) %{
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1219 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1220 match(Set dst (MulF src con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1221
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1222 format %{ "vmulss $dst, $src, [$constantaddress]\t# load from constant table: float=$con" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1223 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1224 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1225 __ vmulss($dst$$XMMRegister, $src$$XMMRegister, $constantaddress($con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1226 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1227 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1228 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1229
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1230 instruct mulD_reg(regD dst, regD src) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1231 predicate((UseSSE>=2) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1232 match(Set dst (MulD dst src));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1233
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1234 format %{ "mulsd $dst, $src" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1235 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1236 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1237 __ mulsd($dst$$XMMRegister, $src$$XMMRegister);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1238 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1239 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1240 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1241
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1242 instruct mulD_mem(regD dst, memory src) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1243 predicate((UseSSE>=2) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1244 match(Set dst (MulD dst (LoadD src)));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1245
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1246 format %{ "mulsd $dst, $src" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1247 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1248 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1249 __ mulsd($dst$$XMMRegister, $src$$Address);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1250 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1251 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1252 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1253
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1254 instruct mulD_imm(regD dst, immD con) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1255 predicate((UseSSE>=2) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1256 match(Set dst (MulD dst con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1257 format %{ "mulsd $dst, [$constantaddress]\t# load from constant table: double=$con" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1258 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1259 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1260 __ mulsd($dst$$XMMRegister, $constantaddress($con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1261 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1262 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1263 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1264
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1265 instruct mulD_reg_reg(regD dst, regD src1, regD src2) %{
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1266 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1267 match(Set dst (MulD src1 src2));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1268
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1269 format %{ "vmulsd $dst, $src1, $src2" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1270 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1271 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1272 __ vmulsd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1273 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1274 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1275 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1276
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1277 instruct mulD_reg_mem(regD dst, regD src1, memory src2) %{
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1278 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1279 match(Set dst (MulD src1 (LoadD src2)));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1280
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1281 format %{ "vmulsd $dst, $src1, $src2" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1282 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1283 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1284 __ vmulsd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$Address);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1285 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1286 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1287 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1288
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1289 instruct mulD_reg_imm(regD dst, regD src, immD con) %{
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1290 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1291 match(Set dst (MulD src con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1292
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1293 format %{ "vmulsd $dst, $src, [$constantaddress]\t# load from constant table: double=$con" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1294 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1295 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1296 __ vmulsd($dst$$XMMRegister, $src$$XMMRegister, $constantaddress($con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1297 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1298 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1299 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1300
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1301 instruct divF_reg(regF dst, regF src) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1302 predicate((UseSSE>=1) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1303 match(Set dst (DivF dst src));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1304
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1305 format %{ "divss $dst, $src" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1306 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1307 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1308 __ divss($dst$$XMMRegister, $src$$XMMRegister);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1309 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1310 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1311 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1312
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1313 instruct divF_mem(regF dst, memory src) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1314 predicate((UseSSE>=1) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1315 match(Set dst (DivF dst (LoadF src)));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1316
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1317 format %{ "divss $dst, $src" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1318 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1319 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1320 __ divss($dst$$XMMRegister, $src$$Address);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1321 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1322 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1323 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1324
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1325 instruct divF_imm(regF dst, immF con) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1326 predicate((UseSSE>=1) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1327 match(Set dst (DivF dst con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1328 format %{ "divss $dst, [$constantaddress]\t# load from constant table: float=$con" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1329 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1330 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1331 __ divss($dst$$XMMRegister, $constantaddress($con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1332 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1333 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1334 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1335
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1336 instruct divF_reg_reg(regF dst, regF src1, regF src2) %{
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1337 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1338 match(Set dst (DivF src1 src2));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1339
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1340 format %{ "vdivss $dst, $src1, $src2" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1341 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1342 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1343 __ vdivss($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1344 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1345 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1346 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1347
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1348 instruct divF_reg_mem(regF dst, regF src1, memory src2) %{
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1349 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1350 match(Set dst (DivF src1 (LoadF src2)));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1351
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1352 format %{ "vdivss $dst, $src1, $src2" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1353 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1354 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1355 __ vdivss($dst$$XMMRegister, $src1$$XMMRegister, $src2$$Address);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1356 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1357 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1358 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1359
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1360 instruct divF_reg_imm(regF dst, regF src, immF con) %{
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1361 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1362 match(Set dst (DivF src con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1363
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1364 format %{ "vdivss $dst, $src, [$constantaddress]\t# load from constant table: float=$con" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1365 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1366 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1367 __ vdivss($dst$$XMMRegister, $src$$XMMRegister, $constantaddress($con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1368 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1369 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1370 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1371
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1372 instruct divD_reg(regD dst, regD src) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1373 predicate((UseSSE>=2) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1374 match(Set dst (DivD dst src));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1375
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1376 format %{ "divsd $dst, $src" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1377 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1378 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1379 __ divsd($dst$$XMMRegister, $src$$XMMRegister);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1380 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1381 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1382 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1383
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1384 instruct divD_mem(regD dst, memory src) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1385 predicate((UseSSE>=2) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1386 match(Set dst (DivD dst (LoadD src)));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1387
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1388 format %{ "divsd $dst, $src" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1389 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1390 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1391 __ divsd($dst$$XMMRegister, $src$$Address);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1392 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1393 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1394 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1395
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1396 instruct divD_imm(regD dst, immD con) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1397 predicate((UseSSE>=2) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1398 match(Set dst (DivD dst con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1399 format %{ "divsd $dst, [$constantaddress]\t# load from constant table: double=$con" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1400 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1401 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1402 __ divsd($dst$$XMMRegister, $constantaddress($con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1403 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1404 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1405 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1406
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1407 instruct divD_reg_reg(regD dst, regD src1, regD src2) %{
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1408 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1409 match(Set dst (DivD src1 src2));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1410
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1411 format %{ "vdivsd $dst, $src1, $src2" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1412 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1413 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1414 __ vdivsd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1415 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1416 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1417 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1418
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1419 instruct divD_reg_mem(regD dst, regD src1, memory src2) %{
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1420 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1421 match(Set dst (DivD src1 (LoadD src2)));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1422
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1423 format %{ "vdivsd $dst, $src1, $src2" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1424 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1425 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1426 __ vdivsd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$Address);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1427 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1428 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1429 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1430
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1431 instruct divD_reg_imm(regD dst, regD src, immD con) %{
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1432 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1433 match(Set dst (DivD src con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1434
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1435 format %{ "vdivsd $dst, $src, [$constantaddress]\t# load from constant table: double=$con" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1436 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1437 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1438 __ vdivsd($dst$$XMMRegister, $src$$XMMRegister, $constantaddress($con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1439 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1440 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1441 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1442
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1443 instruct absF_reg(regF dst) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1444 predicate((UseSSE>=1) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1445 match(Set dst (AbsF dst));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1446 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1447 format %{ "andps $dst, [0x7fffffff]\t# abs float by sign masking" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1448 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1449 __ andps($dst$$XMMRegister, ExternalAddress(float_signmask()));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1450 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1451 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1452 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1453
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1454 instruct absF_reg_reg(regF dst, regF src) %{
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1455 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1456 match(Set dst (AbsF src));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1457 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1458 format %{ "vandps $dst, $src, [0x7fffffff]\t# abs float by sign masking" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1459 ins_encode %{
6614 006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	1460 bool vector256 = false;
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1461 __ vandps($dst$$XMMRegister, $src$$XMMRegister,
6614 006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	1462 ExternalAddress(float_signmask()), vector256);
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1463 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1464 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1465 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1466
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1467 instruct absD_reg(regD dst) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1468 predicate((UseSSE>=2) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1469 match(Set dst (AbsD dst));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1470 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1471 format %{ "andpd $dst, [0x7fffffffffffffff]\t"
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1472 "# abs double by sign masking" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1473 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1474 __ andpd($dst$$XMMRegister, ExternalAddress(double_signmask()));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1475 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1476 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1477 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1478
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1479 instruct absD_reg_reg(regD dst, regD src) %{
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1480 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1481 match(Set dst (AbsD src));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1482 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1483 format %{ "vandpd $dst, $src, [0x7fffffffffffffff]\t"
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1484 "# abs double by sign masking" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1485 ins_encode %{
6614 006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	1486 bool vector256 = false;
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1487 __ vandpd($dst$$XMMRegister, $src$$XMMRegister,
6614 006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	1488 ExternalAddress(double_signmask()), vector256);
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1489 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1490 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1491 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1492
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1493 instruct negF_reg(regF dst) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1494 predicate((UseSSE>=1) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1495 match(Set dst (NegF dst));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1496 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1497 format %{ "xorps $dst, [0x80000000]\t# neg float by sign flipping" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1498 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1499 __ xorps($dst$$XMMRegister, ExternalAddress(float_signflip()));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1500 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1501 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1502 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1503
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1504 instruct negF_reg_reg(regF dst, regF src) %{
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1505 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1506 match(Set dst (NegF src));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1507 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1508 format %{ "vxorps $dst, $src, [0x80000000]\t# neg float by sign flipping" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1509 ins_encode %{
6614 006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	1510 bool vector256 = false;
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1511 __ vxorps($dst$$XMMRegister, $src$$XMMRegister,
6614 006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	1512 ExternalAddress(float_signflip()), vector256);
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1513 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1514 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1515 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1516
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1517 instruct negD_reg(regD dst) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1518 predicate((UseSSE>=2) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1519 match(Set dst (NegD dst));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1520 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1521 format %{ "xorpd $dst, [0x8000000000000000]\t"
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1522 "# neg double by sign flipping" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1523 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1524 __ xorpd($dst$$XMMRegister, ExternalAddress(double_signflip()));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1525 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1526 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1527 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1528
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1529 instruct negD_reg_reg(regD dst, regD src) %{
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1530 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1531 match(Set dst (NegD src));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1532 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1533 format %{ "vxorpd $dst, $src, [0x8000000000000000]\t"
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1534 "# neg double by sign flipping" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1535 ins_encode %{
6614 006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	1536 bool vector256 = false;
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1537 __ vxorpd($dst$$XMMRegister, $src$$XMMRegister,
6614 006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	1538 ExternalAddress(double_signflip()), vector256);
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1539 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1540 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1541 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1542
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1543 instruct sqrtF_reg(regF dst, regF src) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1544 predicate(UseSSE>=1);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1545 match(Set dst (ConvD2F (SqrtD (ConvF2D src))));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1546
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1547 format %{ "sqrtss $dst, $src" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1548 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1549 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1550 __ sqrtss($dst$$XMMRegister, $src$$XMMRegister);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1551 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1552 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1553 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1554
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1555 instruct sqrtF_mem(regF dst, memory src) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1556 predicate(UseSSE>=1);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1557 match(Set dst (ConvD2F (SqrtD (ConvF2D (LoadF src)))));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1558
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1559 format %{ "sqrtss $dst, $src" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1560 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1561 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1562 __ sqrtss($dst$$XMMRegister, $src$$Address);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1563 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1564 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1565 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1566
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1567 instruct sqrtF_imm(regF dst, immF con) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1568 predicate(UseSSE>=1);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1569 match(Set dst (ConvD2F (SqrtD (ConvF2D con))));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1570 format %{ "sqrtss $dst, [$constantaddress]\t# load from constant table: float=$con" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1571 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1572 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1573 __ sqrtss($dst$$XMMRegister, $constantaddress($con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1574 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1575 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1576 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1577
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1578 instruct sqrtD_reg(regD dst, regD src) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1579 predicate(UseSSE>=2);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1580 match(Set dst (SqrtD src));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1581
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1582 format %{ "sqrtsd $dst, $src" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1583 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1584 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1585 __ sqrtsd($dst$$XMMRegister, $src$$XMMRegister);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1586 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1587 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1588 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1589
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1590 instruct sqrtD_mem(regD dst, memory src) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1591 predicate(UseSSE>=2);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1592 match(Set dst (SqrtD (LoadD src)));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1593
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1594 format %{ "sqrtsd $dst, $src" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1595 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1596 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1597 __ sqrtsd($dst$$XMMRegister, $src$$Address);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1598 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1599 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1600 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1601
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1602 instruct sqrtD_imm(regD dst, immD con) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1603 predicate(UseSSE>=2);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1604 match(Set dst (SqrtD con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1605 format %{ "sqrtsd $dst, [$constantaddress]\t# load from constant table: double=$con" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1606 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1607 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1608 __ sqrtsd($dst$$XMMRegister, $constantaddress($con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1609 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1610 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1611 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1612
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1613
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1614 // ====================VECTOR INSTRUCTIONS=====================================
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1615
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1616 // Load vectors (4 bytes long)
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1617 instruct loadV4(vecS dst, memory mem) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1618 predicate(n->as_LoadVector()->memory_size() == 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1619 match(Set dst (LoadVector mem));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1620 ins_cost(125);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1621 format %{ "movd $dst,$mem\t! load vector (4 bytes)" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1622 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1623 __ movdl($dst$$XMMRegister, $mem$$Address);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1624 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1625 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1626 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1627
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1628 // Load vectors (8 bytes long)
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1629 instruct loadV8(vecD dst, memory mem) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1630 predicate(n->as_LoadVector()->memory_size() == 8);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1631 match(Set dst (LoadVector mem));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1632 ins_cost(125);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1633 format %{ "movq $dst,$mem\t! load vector (8 bytes)" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1634 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1635 __ movq($dst$$XMMRegister, $mem$$Address);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1636 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1637 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1638 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1639
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1640 // Load vectors (16 bytes long)
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1641 instruct loadV16(vecX dst, memory mem) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1642 predicate(n->as_LoadVector()->memory_size() == 16);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1643 match(Set dst (LoadVector mem));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1644 ins_cost(125);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1645 format %{ "movdqu $dst,$mem\t! load vector (16 bytes)" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1646 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1647 __ movdqu($dst$$XMMRegister, $mem$$Address);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1648 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1649 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1650 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1651
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1652 // Load vectors (32 bytes long)
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1653 instruct loadV32(vecY dst, memory mem) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1654 predicate(n->as_LoadVector()->memory_size() == 32);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1655 match(Set dst (LoadVector mem));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1656 ins_cost(125);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1657 format %{ "vmovdqu $dst,$mem\t! load vector (32 bytes)" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1658 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1659 __ vmovdqu($dst$$XMMRegister, $mem$$Address);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1660 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1661 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1662 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1663
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1664 // Store vectors
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1665 instruct storeV4(memory mem, vecS src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1666 predicate(n->as_StoreVector()->memory_size() == 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1667 match(Set mem (StoreVector mem src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1668 ins_cost(145);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1669 format %{ "movd $mem,$src\t! store vector (4 bytes)" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1670 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1671 __ movdl($mem$$Address, $src$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1672 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1673 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1674 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1675
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1676 instruct storeV8(memory mem, vecD src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1677 predicate(n->as_StoreVector()->memory_size() == 8);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1678 match(Set mem (StoreVector mem src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1679 ins_cost(145);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1680 format %{ "movq $mem,$src\t! store vector (8 bytes)" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1681 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1682 __ movq($mem$$Address, $src$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1683 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1684 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1685 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1686
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1687 instruct storeV16(memory mem, vecX src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1688 predicate(n->as_StoreVector()->memory_size() == 16);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1689 match(Set mem (StoreVector mem src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1690 ins_cost(145);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1691 format %{ "movdqu $mem,$src\t! store vector (16 bytes)" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1692 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1693 __ movdqu($mem$$Address, $src$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1694 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1695 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1696 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1697
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1698 instruct storeV32(memory mem, vecY src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1699 predicate(n->as_StoreVector()->memory_size() == 32);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1700 match(Set mem (StoreVector mem src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1701 ins_cost(145);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1702 format %{ "vmovdqu $mem,$src\t! store vector (32 bytes)" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1703 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1704 __ vmovdqu($mem$$Address, $src$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1705 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1706 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1707 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1708
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1709 // Replicate byte scalar to be vector
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1710 instruct Repl4B(vecS dst, rRegI src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1711 predicate(n->as_Vector()->length() == 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1712 match(Set dst (ReplicateB src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1713 format %{ "movd $dst,$src\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1714 "punpcklbw $dst,$dst\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1715 "pshuflw $dst,$dst,0x00\t! replicate4B" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1716 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1717 __ movdl($dst$$XMMRegister, $src$$Register);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1718 __ punpcklbw($dst$$XMMRegister, $dst$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1719 __ pshuflw($dst$$XMMRegister, $dst$$XMMRegister, 0x00);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1720 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1721 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1722 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1723
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1724 instruct Repl8B(vecD dst, rRegI src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1725 predicate(n->as_Vector()->length() == 8);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1726 match(Set dst (ReplicateB src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1727 format %{ "movd $dst,$src\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1728 "punpcklbw $dst,$dst\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1729 "pshuflw $dst,$dst,0x00\t! replicate8B" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1730 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1731 __ movdl($dst$$XMMRegister, $src$$Register);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1732 __ punpcklbw($dst$$XMMRegister, $dst$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1733 __ pshuflw($dst$$XMMRegister, $dst$$XMMRegister, 0x00);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1734 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1735 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1736 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1737
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1738 instruct Repl16B(vecX dst, rRegI src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1739 predicate(n->as_Vector()->length() == 16);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1740 match(Set dst (ReplicateB src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1741 format %{ "movd $dst,$src\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1742 "punpcklbw $dst,$dst\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1743 "pshuflw $dst,$dst,0x00\n\t"
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1744 "punpcklqdq $dst,$dst\t! replicate16B" %}
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1745 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1746 __ movdl($dst$$XMMRegister, $src$$Register);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1747 __ punpcklbw($dst$$XMMRegister, $dst$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1748 __ pshuflw($dst$$XMMRegister, $dst$$XMMRegister, 0x00);
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1749 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister);
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1750 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1751 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1752 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1753
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1754 instruct Repl32B(vecY dst, rRegI src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1755 predicate(n->as_Vector()->length() == 32);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1756 match(Set dst (ReplicateB src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1757 format %{ "movd $dst,$src\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1758 "punpcklbw $dst,$dst\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1759 "pshuflw $dst,$dst,0x00\n\t"
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1760 "punpcklqdq $dst,$dst\n\t"
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1761 "vinserti128h $dst,$dst,$dst\t! replicate32B" %}
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1762 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1763 __ movdl($dst$$XMMRegister, $src$$Register);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1764 __ punpcklbw($dst$$XMMRegister, $dst$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1765 __ pshuflw($dst$$XMMRegister, $dst$$XMMRegister, 0x00);
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1766 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister);
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1767 __ vinserti128h($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister);
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1768 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1769 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1770 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1771
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1772 // Replicate byte scalar immediate to be vector by loading from const table.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1773 instruct Repl4B_imm(vecS dst, immI con) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1774 predicate(n->as_Vector()->length() == 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1775 match(Set dst (ReplicateB con));
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1776 format %{ "movdl $dst,[$constantaddress]\t! replicate4B($con)" %}
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1777 ins_encode %{
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1778 __ movdl($dst$$XMMRegister, $constantaddress(replicate4_imm($con$$constant, 1)));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1779 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1780 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1781 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1782
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1783 instruct Repl8B_imm(vecD dst, immI con) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1784 predicate(n->as_Vector()->length() == 8);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1785 match(Set dst (ReplicateB con));
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1786 format %{ "movq $dst,[$constantaddress]\t! replicate8B($con)" %}
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1787 ins_encode %{
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1788 __ movq($dst$$XMMRegister, $constantaddress(replicate8_imm($con$$constant, 1)));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1789 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1790 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1791 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1792
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1793 instruct Repl16B_imm(vecX dst, immI con) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1794 predicate(n->as_Vector()->length() == 16);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1795 match(Set dst (ReplicateB con));
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1796 format %{ "movq $dst,[$constantaddress]\n\t"
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1797 "punpcklqdq $dst,$dst\t! replicate16B($con)" %}
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1798 ins_encode %{
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1799 __ movq($dst$$XMMRegister, $constantaddress(replicate8_imm($con$$constant, 1)));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1800 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister);
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1801 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1802 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1803 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1804
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1805 instruct Repl32B_imm(vecY dst, immI con) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1806 predicate(n->as_Vector()->length() == 32);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1807 match(Set dst (ReplicateB con));
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1808 format %{ "movq $dst,[$constantaddress]\n\t"
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1809 "punpcklqdq $dst,$dst\n\t"
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1810 "vinserti128h $dst,$dst,$dst\t! lreplicate32B($con)" %}
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1811 ins_encode %{
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1812 __ movq($dst$$XMMRegister, $constantaddress(replicate8_imm($con$$constant, 1)));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1813 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister);
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1814 __ vinserti128h($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister);
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1815 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1816 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1817 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1818
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1819 // Replicate byte scalar zero to be vector
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1820 instruct Repl4B_zero(vecS dst, immI0 zero) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1821 predicate(n->as_Vector()->length() == 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1822 match(Set dst (ReplicateB zero));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1823 format %{ "pxor $dst,$dst\t! replicate4B zero" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1824 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1825 __ pxor($dst$$XMMRegister, $dst$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1826 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1827 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1828 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1829
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1830 instruct Repl8B_zero(vecD dst, immI0 zero) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1831 predicate(n->as_Vector()->length() == 8);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1832 match(Set dst (ReplicateB zero));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1833 format %{ "pxor $dst,$dst\t! replicate8B zero" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1834 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1835 __ pxor($dst$$XMMRegister, $dst$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1836 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1837 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1838 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1839
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1840 instruct Repl16B_zero(vecX dst, immI0 zero) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1841 predicate(n->as_Vector()->length() == 16);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1842 match(Set dst (ReplicateB zero));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1843 format %{ "pxor $dst,$dst\t! replicate16B zero" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1844 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1845 __ pxor($dst$$XMMRegister, $dst$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1846 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1847 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1848 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1849
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1850 instruct Repl32B_zero(vecY dst, immI0 zero) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1851 predicate(n->as_Vector()->length() == 32);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1852 match(Set dst (ReplicateB zero));
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1853 format %{ "vpxor $dst,$dst,$dst\t! replicate32B zero" %}
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1854 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1855 // Use vxorpd since AVX does not have vpxor for 256-bit (AVX2 will have it).
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1856 bool vector256 = true;
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1857 __ vpxor($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister, vector256);
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1858 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1859 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1860 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1861
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1862 // Replicate char/short (2 byte) scalar to be vector
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1863 instruct Repl2S(vecS dst, rRegI src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1864 predicate(n->as_Vector()->length() == 2);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1865 match(Set dst (ReplicateS src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1866 format %{ "movd $dst,$src\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1867 "pshuflw $dst,$dst,0x00\t! replicate2S" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1868 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1869 __ movdl($dst$$XMMRegister, $src$$Register);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1870 __ pshuflw($dst$$XMMRegister, $dst$$XMMRegister, 0x00);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1871 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1872 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1873 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1874
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1875 instruct Repl4S(vecD dst, rRegI src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1876 predicate(n->as_Vector()->length() == 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1877 match(Set dst (ReplicateS src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1878 format %{ "movd $dst,$src\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1879 "pshuflw $dst,$dst,0x00\t! replicate4S" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1880 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1881 __ movdl($dst$$XMMRegister, $src$$Register);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1882 __ pshuflw($dst$$XMMRegister, $dst$$XMMRegister, 0x00);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1883 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1884 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1885 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1886
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1887 instruct Repl8S(vecX dst, rRegI src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1888 predicate(n->as_Vector()->length() == 8);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1889 match(Set dst (ReplicateS src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1890 format %{ "movd $dst,$src\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1891 "pshuflw $dst,$dst,0x00\n\t"
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1892 "punpcklqdq $dst,$dst\t! replicate8S" %}
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1893 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1894 __ movdl($dst$$XMMRegister, $src$$Register);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1895 __ pshuflw($dst$$XMMRegister, $dst$$XMMRegister, 0x00);
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1896 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister);
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1897 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1898 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1899 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1900
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1901 instruct Repl16S(vecY dst, rRegI src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1902 predicate(n->as_Vector()->length() == 16);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1903 match(Set dst (ReplicateS src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1904 format %{ "movd $dst,$src\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1905 "pshuflw $dst,$dst,0x00\n\t"
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1906 "punpcklqdq $dst,$dst\n\t"
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1907 "vinserti128h $dst,$dst,$dst\t! replicate16S" %}
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1908 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1909 __ movdl($dst$$XMMRegister, $src$$Register);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1910 __ pshuflw($dst$$XMMRegister, $dst$$XMMRegister, 0x00);
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1911 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister);
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1912 __ vinserti128h($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister);
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1913 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1914 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1915 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1916
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1917 // Replicate char/short (2 byte) scalar immediate to be vector by loading from const table.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1918 instruct Repl2S_imm(vecS dst, immI con) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1919 predicate(n->as_Vector()->length() == 2);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1920 match(Set dst (ReplicateS con));
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1921 format %{ "movdl $dst,[$constantaddress]\t! replicate2S($con)" %}
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1922 ins_encode %{
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1923 __ movdl($dst$$XMMRegister, $constantaddress(replicate4_imm($con$$constant, 2)));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1924 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1925 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1926 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1927
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1928 instruct Repl4S_imm(vecD dst, immI con) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1929 predicate(n->as_Vector()->length() == 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1930 match(Set dst (ReplicateS con));
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1931 format %{ "movq $dst,[$constantaddress]\t! replicate4S($con)" %}
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1932 ins_encode %{
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1933 __ movq($dst$$XMMRegister, $constantaddress(replicate8_imm($con$$constant, 2)));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1934 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1935 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1936 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1937
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1938 instruct Repl8S_imm(vecX dst, immI con) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1939 predicate(n->as_Vector()->length() == 8);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1940 match(Set dst (ReplicateS con));
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1941 format %{ "movq $dst,[$constantaddress]\n\t"
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1942 "punpcklqdq $dst,$dst\t! replicate8S($con)" %}
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1943 ins_encode %{
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1944 __ movq($dst$$XMMRegister, $constantaddress(replicate8_imm($con$$constant, 2)));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1945 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister);
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1946 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1947 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1948 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1949
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1950 instruct Repl16S_imm(vecY dst, immI con) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1951 predicate(n->as_Vector()->length() == 16);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1952 match(Set dst (ReplicateS con));
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1953 format %{ "movq $dst,[$constantaddress]\n\t"
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1954 "punpcklqdq $dst,$dst\n\t"
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1955 "vinserti128h $dst,$dst,$dst\t! replicate16S($con)" %}
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1956 ins_encode %{
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1957 __ movq($dst$$XMMRegister, $constantaddress(replicate8_imm($con$$constant, 2)));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1958 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister);
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1959 __ vinserti128h($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister);
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1960 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1961 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1962 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1963
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1964 // Replicate char/short (2 byte) scalar zero to be vector
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1965 instruct Repl2S_zero(vecS dst, immI0 zero) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1966 predicate(n->as_Vector()->length() == 2);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1967 match(Set dst (ReplicateS zero));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1968 format %{ "pxor $dst,$dst\t! replicate2S zero" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1969 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1970 __ pxor($dst$$XMMRegister, $dst$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1971 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1972 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1973 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1974
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1975 instruct Repl4S_zero(vecD dst, immI0 zero) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1976 predicate(n->as_Vector()->length() == 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1977 match(Set dst (ReplicateS zero));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1978 format %{ "pxor $dst,$dst\t! replicate4S zero" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1979 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1980 __ pxor($dst$$XMMRegister, $dst$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1981 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1982 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1983 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1984
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1985 instruct Repl8S_zero(vecX dst, immI0 zero) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1986 predicate(n->as_Vector()->length() == 8);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1987 match(Set dst (ReplicateS zero));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1988 format %{ "pxor $dst,$dst\t! replicate8S zero" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1989 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1990 __ pxor($dst$$XMMRegister, $dst$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1991 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1992 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1993 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1994
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1995 instruct Repl16S_zero(vecY dst, immI0 zero) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1996 predicate(n->as_Vector()->length() == 16);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1997 match(Set dst (ReplicateS zero));
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1998 format %{ "vpxor $dst,$dst,$dst\t! replicate16S zero" %}
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1999 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2000 // Use vxorpd since AVX does not have vpxor for 256-bit (AVX2 will have it).
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2001 bool vector256 = true;
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2002 __ vpxor($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister, vector256);
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2003 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2004 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2005 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2006
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2007 // Replicate integer (4 byte) scalar to be vector
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2008 instruct Repl2I(vecD dst, rRegI src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2009 predicate(n->as_Vector()->length() == 2);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2010 match(Set dst (ReplicateI src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2011 format %{ "movd $dst,$src\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2012 "pshufd $dst,$dst,0x00\t! replicate2I" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2013 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2014 __ movdl($dst$$XMMRegister, $src$$Register);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2015 __ pshufd($dst$$XMMRegister, $dst$$XMMRegister, 0x00);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2016 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2017 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2018 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2019
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2020 instruct Repl4I(vecX dst, rRegI src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2021 predicate(n->as_Vector()->length() == 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2022 match(Set dst (ReplicateI src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2023 format %{ "movd $dst,$src\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2024 "pshufd $dst,$dst,0x00\t! replicate4I" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2025 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2026 __ movdl($dst$$XMMRegister, $src$$Register);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2027 __ pshufd($dst$$XMMRegister, $dst$$XMMRegister, 0x00);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2028 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2029 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2030 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2031
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2032 instruct Repl8I(vecY dst, rRegI src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2033 predicate(n->as_Vector()->length() == 8);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2034 match(Set dst (ReplicateI src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2035 format %{ "movd $dst,$src\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2036 "pshufd $dst,$dst,0x00\n\t"
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2037 "vinserti128h $dst,$dst,$dst\t! replicate8I" %}
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2038 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2039 __ movdl($dst$$XMMRegister, $src$$Register);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2040 __ pshufd($dst$$XMMRegister, $dst$$XMMRegister, 0x00);
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2041 __ vinserti128h($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister);
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2042 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2043 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2044 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2045
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2046 // Replicate integer (4 byte) scalar immediate to be vector by loading from const table.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2047 instruct Repl2I_imm(vecD dst, immI con) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2048 predicate(n->as_Vector()->length() == 2);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2049 match(Set dst (ReplicateI con));
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2050 format %{ "movq $dst,[$constantaddress]\t! replicate2I($con)" %}
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2051 ins_encode %{
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2052 __ movq($dst$$XMMRegister, $constantaddress(replicate8_imm($con$$constant, 4)));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2053 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2054 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2055 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2056
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2057 instruct Repl4I_imm(vecX dst, immI con) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2058 predicate(n->as_Vector()->length() == 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2059 match(Set dst (ReplicateI con));
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2060 format %{ "movq $dst,[$constantaddress]\t! replicate4I($con)\n\t"
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2061 "punpcklqdq $dst,$dst" %}
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2062 ins_encode %{
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2063 __ movq($dst$$XMMRegister, $constantaddress(replicate8_imm($con$$constant, 4)));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2064 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister);
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2065 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2066 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2067 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2068
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2069 instruct Repl8I_imm(vecY dst, immI con) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2070 predicate(n->as_Vector()->length() == 8);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2071 match(Set dst (ReplicateI con));
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2072 format %{ "movq $dst,[$constantaddress]\t! replicate8I($con)\n\t"
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2073 "punpcklqdq $dst,$dst\n\t"
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2074 "vinserti128h $dst,$dst,$dst" %}
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2075 ins_encode %{
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2076 __ movq($dst$$XMMRegister, $constantaddress(replicate8_imm($con$$constant, 4)));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2077 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister);
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2078 __ vinserti128h($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister);
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2079 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2080 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2081 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2082
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2083 // Integer could be loaded into xmm register directly from memory.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2084 instruct Repl2I_mem(vecD dst, memory mem) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2085 predicate(n->as_Vector()->length() == 2);
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2086 match(Set dst (ReplicateI (LoadI mem)));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2087 format %{ "movd $dst,$mem\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2088 "pshufd $dst,$dst,0x00\t! replicate2I" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2089 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2090 __ movdl($dst$$XMMRegister, $mem$$Address);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2091 __ pshufd($dst$$XMMRegister, $dst$$XMMRegister, 0x00);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2092 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2093 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2094 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2095
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2096 instruct Repl4I_mem(vecX dst, memory mem) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2097 predicate(n->as_Vector()->length() == 4);
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2098 match(Set dst (ReplicateI (LoadI mem)));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2099 format %{ "movd $dst,$mem\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2100 "pshufd $dst,$dst,0x00\t! replicate4I" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2101 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2102 __ movdl($dst$$XMMRegister, $mem$$Address);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2103 __ pshufd($dst$$XMMRegister, $dst$$XMMRegister, 0x00);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2104 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2105 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2106 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2107
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2108 instruct Repl8I_mem(vecY dst, memory mem) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2109 predicate(n->as_Vector()->length() == 8);
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2110 match(Set dst (ReplicateI (LoadI mem)));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2111 format %{ "movd $dst,$mem\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2112 "pshufd $dst,$dst,0x00\n\t"
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2113 "vinserti128h $dst,$dst,$dst\t! replicate8I" %}
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2114 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2115 __ movdl($dst$$XMMRegister, $mem$$Address);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2116 __ pshufd($dst$$XMMRegister, $dst$$XMMRegister, 0x00);
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2117 __ vinserti128h($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister);
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2118 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2119 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2120 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2121
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2122 // Replicate integer (4 byte) scalar zero to be vector
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2123 instruct Repl2I_zero(vecD dst, immI0 zero) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2124 predicate(n->as_Vector()->length() == 2);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2125 match(Set dst (ReplicateI zero));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2126 format %{ "pxor $dst,$dst\t! replicate2I" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2127 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2128 __ pxor($dst$$XMMRegister, $dst$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2129 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2130 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2131 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2132
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2133 instruct Repl4I_zero(vecX dst, immI0 zero) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2134 predicate(n->as_Vector()->length() == 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2135 match(Set dst (ReplicateI zero));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2136 format %{ "pxor $dst,$dst\t! replicate4I zero)" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2137 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2138 __ pxor($dst$$XMMRegister, $dst$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2139 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2140 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2141 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2142
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2143 instruct Repl8I_zero(vecY dst, immI0 zero) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2144 predicate(n->as_Vector()->length() == 8);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2145 match(Set dst (ReplicateI zero));
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2146 format %{ "vpxor $dst,$dst,$dst\t! replicate8I zero" %}
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2147 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2148 // Use vxorpd since AVX does not have vpxor for 256-bit (AVX2 will have it).
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2149 bool vector256 = true;
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2150 __ vpxor($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister, vector256);
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2151 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2152 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2153 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2154
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2155 // Replicate long (8 byte) scalar to be vector
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2156 #ifdef _LP64
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2157 instruct Repl2L(vecX dst, rRegL src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2158 predicate(n->as_Vector()->length() == 2);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2159 match(Set dst (ReplicateL src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2160 format %{ "movdq $dst,$src\n\t"
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2161 "punpcklqdq $dst,$dst\t! replicate2L" %}
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2162 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2163 __ movdq($dst$$XMMRegister, $src$$Register);
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2164 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister);
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2165 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2166 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2167 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2168
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2169 instruct Repl4L(vecY dst, rRegL src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2170 predicate(n->as_Vector()->length() == 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2171 match(Set dst (ReplicateL src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2172 format %{ "movdq $dst,$src\n\t"
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2173 "punpcklqdq $dst,$dst\n\t"
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2174 "vinserti128h $dst,$dst,$dst\t! replicate4L" %}
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2175 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2176 __ movdq($dst$$XMMRegister, $src$$Register);
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2177 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister);
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2178 __ vinserti128h($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister);
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2179 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2180 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2181 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2182 #else // _LP64
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2183 instruct Repl2L(vecX dst, eRegL src, regD tmp) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2184 predicate(n->as_Vector()->length() == 2);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2185 match(Set dst (ReplicateL src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2186 effect(TEMP dst, USE src, TEMP tmp);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2187 format %{ "movdl $dst,$src.lo\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2188 "movdl $tmp,$src.hi\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2189 "punpckldq $dst,$tmp\n\t"
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2190 "punpcklqdq $dst,$dst\t! replicate2L"%}
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2191 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2192 __ movdl($dst$$XMMRegister, $src$$Register);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2193 __ movdl($tmp$$XMMRegister, HIGH_FROM_LOW($src$$Register));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2194 __ punpckldq($dst$$XMMRegister, $tmp$$XMMRegister);
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2195 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister);
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2196 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2197 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2198 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2199
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2200 instruct Repl4L(vecY dst, eRegL src, regD tmp) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2201 predicate(n->as_Vector()->length() == 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2202 match(Set dst (ReplicateL src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2203 effect(TEMP dst, USE src, TEMP tmp);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2204 format %{ "movdl $dst,$src.lo\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2205 "movdl $tmp,$src.hi\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2206 "punpckldq $dst,$tmp\n\t"
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2207 "punpcklqdq $dst,$dst\n\t"
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2208 "vinserti128h $dst,$dst,$dst\t! replicate4L" %}
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2209 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2210 __ movdl($dst$$XMMRegister, $src$$Register);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2211 __ movdl($tmp$$XMMRegister, HIGH_FROM_LOW($src$$Register));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2212 __ punpckldq($dst$$XMMRegister, $tmp$$XMMRegister);
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2213 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister);
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2214 __ vinserti128h($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister);
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2215 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2216 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2217 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2218 #endif // _LP64
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2219
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2220 // Replicate long (8 byte) scalar immediate to be vector by loading from const table.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2221 instruct Repl2L_imm(vecX dst, immL con) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2222 predicate(n->as_Vector()->length() == 2);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2223 match(Set dst (ReplicateL con));
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2224 format %{ "movq $dst,[$constantaddress]\n\t"
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2225 "punpcklqdq $dst,$dst\t! replicate2L($con)" %}
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2226 ins_encode %{
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2227 __ movq($dst$$XMMRegister, $constantaddress($con));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2228 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister);
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2229 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2230 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2231 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2232
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2233 instruct Repl4L_imm(vecY dst, immL con) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2234 predicate(n->as_Vector()->length() == 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2235 match(Set dst (ReplicateL con));
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2236 format %{ "movq $dst,[$constantaddress]\n\t"
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2237 "punpcklqdq $dst,$dst\n\t"
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2238 "vinserti128h $dst,$dst,$dst\t! replicate4L($con)" %}
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2239 ins_encode %{
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2240 __ movq($dst$$XMMRegister, $constantaddress($con));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2241 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister);
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2242 __ vinserti128h($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister);
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2243 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2244 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2245 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2246
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2247 // Long could be loaded into xmm register directly from memory.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2248 instruct Repl2L_mem(vecX dst, memory mem) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2249 predicate(n->as_Vector()->length() == 2);
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2250 match(Set dst (ReplicateL (LoadL mem)));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2251 format %{ "movq $dst,$mem\n\t"
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2252 "punpcklqdq $dst,$dst\t! replicate2L" %}
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2253 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2254 __ movq($dst$$XMMRegister, $mem$$Address);
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2255 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister);
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2256 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2257 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2258 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2259
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2260 instruct Repl4L_mem(vecY dst, memory mem) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2261 predicate(n->as_Vector()->length() == 4);
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2262 match(Set dst (ReplicateL (LoadL mem)));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2263 format %{ "movq $dst,$mem\n\t"
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2264 "punpcklqdq $dst,$dst\n\t"
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2265 "vinserti128h $dst,$dst,$dst\t! replicate4L" %}
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2266 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2267 __ movq($dst$$XMMRegister, $mem$$Address);
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2268 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister);
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2269 __ vinserti128h($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister);
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2270 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2271 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2272 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2273
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2274 // Replicate long (8 byte) scalar zero to be vector
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2275 instruct Repl2L_zero(vecX dst, immL0 zero) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2276 predicate(n->as_Vector()->length() == 2);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2277 match(Set dst (ReplicateL zero));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2278 format %{ "pxor $dst,$dst\t! replicate2L zero" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2279 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2280 __ pxor($dst$$XMMRegister, $dst$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2281 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2282 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2283 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2284
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2285 instruct Repl4L_zero(vecY dst, immL0 zero) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2286 predicate(n->as_Vector()->length() == 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2287 match(Set dst (ReplicateL zero));
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2288 format %{ "vpxor $dst,$dst,$dst\t! replicate4L zero" %}
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2289 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2290 // Use vxorpd since AVX does not have vpxor for 256-bit (AVX2 will have it).
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2291 bool vector256 = true;
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2292 __ vpxor($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister, vector256);
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2293 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2294 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2295 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2296
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2297 // Replicate float (4 byte) scalar to be vector
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2298 instruct Repl2F(vecD dst, regF src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2299 predicate(n->as_Vector()->length() == 2);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2300 match(Set dst (ReplicateF src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2301 format %{ "pshufd $dst,$dst,0x00\t! replicate2F" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2302 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2303 __ pshufd($dst$$XMMRegister, $src$$XMMRegister, 0x00);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2304 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2305 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2306 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2307
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2308 instruct Repl4F(vecX dst, regF src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2309 predicate(n->as_Vector()->length() == 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2310 match(Set dst (ReplicateF src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2311 format %{ "pshufd $dst,$dst,0x00\t! replicate4F" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2312 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2313 __ pshufd($dst$$XMMRegister, $src$$XMMRegister, 0x00);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2314 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2315 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2316 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2317
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2318 instruct Repl8F(vecY dst, regF src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2319 predicate(n->as_Vector()->length() == 8);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2320 match(Set dst (ReplicateF src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2321 format %{ "pshufd $dst,$src,0x00\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2322 "vinsertf128h $dst,$dst,$dst\t! replicate8F" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2323 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2324 __ pshufd($dst$$XMMRegister, $src$$XMMRegister, 0x00);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2325 __ vinsertf128h($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2326 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2327 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2328 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2329
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2330 // Replicate float (4 byte) scalar zero to be vector
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2331 instruct Repl2F_zero(vecD dst, immF0 zero) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2332 predicate(n->as_Vector()->length() == 2);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2333 match(Set dst (ReplicateF zero));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2334 format %{ "xorps $dst,$dst\t! replicate2F zero" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2335 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2336 __ xorps($dst$$XMMRegister, $dst$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2337 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2338 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2339 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2340
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2341 instruct Repl4F_zero(vecX dst, immF0 zero) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2342 predicate(n->as_Vector()->length() == 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2343 match(Set dst (ReplicateF zero));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2344 format %{ "xorps $dst,$dst\t! replicate4F zero" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2345 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2346 __ xorps($dst$$XMMRegister, $dst$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2347 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2348 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2349 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2350
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2351 instruct Repl8F_zero(vecY dst, immF0 zero) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2352 predicate(n->as_Vector()->length() == 8);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2353 match(Set dst (ReplicateF zero));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2354 format %{ "vxorps $dst,$dst,$dst\t! replicate8F zero" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2355 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2356 bool vector256 = true;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2357 __ vxorps($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister, vector256);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2358 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2359 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2360 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2361
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2362 // Replicate double (8 bytes) scalar to be vector
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2363 instruct Repl2D(vecX dst, regD src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2364 predicate(n->as_Vector()->length() == 2);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2365 match(Set dst (ReplicateD src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2366 format %{ "pshufd $dst,$src,0x44\t! replicate2D" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2367 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2368 __ pshufd($dst$$XMMRegister, $src$$XMMRegister, 0x44);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2369 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2370 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2371 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2372
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2373 instruct Repl4D(vecY dst, regD src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2374 predicate(n->as_Vector()->length() == 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2375 match(Set dst (ReplicateD src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2376 format %{ "pshufd $dst,$src,0x44\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2377 "vinsertf128h $dst,$dst,$dst\t! replicate4D" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2378 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2379 __ pshufd($dst$$XMMRegister, $src$$XMMRegister, 0x44);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2380 __ vinsertf128h($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2381 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2382 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2383 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2384
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2385 // Replicate double (8 byte) scalar zero to be vector
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2386 instruct Repl2D_zero(vecX dst, immD0 zero) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2387 predicate(n->as_Vector()->length() == 2);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2388 match(Set dst (ReplicateD zero));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2389 format %{ "xorpd $dst,$dst\t! replicate2D zero" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2390 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2391 __ xorpd($dst$$XMMRegister, $dst$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2392 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2393 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2394 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2395
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2396 instruct Repl4D_zero(vecY dst, immD0 zero) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2397 predicate(n->as_Vector()->length() == 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2398 match(Set dst (ReplicateD zero));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2399 format %{ "vxorpd $dst,$dst,$dst,vect256\t! replicate4D zero" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2400 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2401 bool vector256 = true;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2402 __ vxorpd($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister, vector256);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2403 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2404 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2405 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2406
6614 006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2407 // ====================VECTOR ARITHMETIC=======================================
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2408
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2409 // --------------------------------- ADD --------------------------------------
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2410
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2411 // Bytes vector add
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2412 instruct vadd4B(vecS dst, vecS src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2413 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2414 match(Set dst (AddVB dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2415 format %{ "paddb $dst,$src\t! add packed4B" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2416 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2417 __ paddb($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2418 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2419 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2420 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2421
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2422 instruct vadd4B_reg(vecS dst, vecS src1, vecS src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2423 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2424 match(Set dst (AddVB src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2425 format %{ "vpaddb $dst,$src1,$src2\t! add packed4B" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2426 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2427 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2428 __ vpaddb($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2429 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2430 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2431 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2432
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2433 instruct vadd8B(vecD dst, vecD src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2434 predicate(n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2435 match(Set dst (AddVB dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2436 format %{ "paddb $dst,$src\t! add packed8B" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2437 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2438 __ paddb($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2439 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2440 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2441 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2442
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2443 instruct vadd8B_reg(vecD dst, vecD src1, vecD src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2444 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2445 match(Set dst (AddVB src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2446 format %{ "vpaddb $dst,$src1,$src2\t! add packed8B" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2447 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2448 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2449 __ vpaddb($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2450 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2451 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2452 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2453
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2454 instruct vadd16B(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2455 predicate(n->as_Vector()->length() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2456 match(Set dst (AddVB dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2457 format %{ "paddb $dst,$src\t! add packed16B" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2458 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2459 __ paddb($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2460 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2461 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2462 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2463
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2464 instruct vadd16B_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2465 predicate(UseAVX > 0 && n->as_Vector()->length() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2466 match(Set dst (AddVB src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2467 format %{ "vpaddb $dst,$src1,$src2\t! add packed16B" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2468 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2469 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2470 __ vpaddb($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2471 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2472 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2473 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2474
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2475 instruct vadd16B_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2476 predicate(UseAVX > 0 && n->as_Vector()->length() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2477 match(Set dst (AddVB src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2478 format %{ "vpaddb $dst,$src,$mem\t! add packed16B" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2479 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2480 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2481 __ vpaddb($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2482 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2483 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2484 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2485
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2486 instruct vadd32B_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2487 predicate(UseAVX > 1 && n->as_Vector()->length() == 32);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2488 match(Set dst (AddVB src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2489 format %{ "vpaddb $dst,$src1,$src2\t! add packed32B" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2490 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2491 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2492 __ vpaddb($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2493 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2494 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2495 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2496
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2497 instruct vadd32B_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2498 predicate(UseAVX > 1 && n->as_Vector()->length() == 32);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2499 match(Set dst (AddVB src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2500 format %{ "vpaddb $dst,$src,$mem\t! add packed32B" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2501 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2502 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2503 __ vpaddb($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2504 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2505 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2506 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2507
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2508 // Shorts/Chars vector add
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2509 instruct vadd2S(vecS dst, vecS src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2510 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2511 match(Set dst (AddVS dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2512 format %{ "paddw $dst,$src\t! add packed2S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2513 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2514 __ paddw($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2515 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2516 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2517 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2518
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2519 instruct vadd2S_reg(vecS dst, vecS src1, vecS src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2520 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2521 match(Set dst (AddVS src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2522 format %{ "vpaddw $dst,$src1,$src2\t! add packed2S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2523 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2524 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2525 __ vpaddw($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2526 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2527 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2528 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2529
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2530 instruct vadd4S(vecD dst, vecD src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2531 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2532 match(Set dst (AddVS dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2533 format %{ "paddw $dst,$src\t! add packed4S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2534 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2535 __ paddw($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2536 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2537 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2538 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2539
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2540 instruct vadd4S_reg(vecD dst, vecD src1, vecD src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2541 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2542 match(Set dst (AddVS src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2543 format %{ "vpaddw $dst,$src1,$src2\t! add packed4S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2544 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2545 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2546 __ vpaddw($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2547 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2548 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2549 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2550
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2551 instruct vadd8S(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2552 predicate(n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2553 match(Set dst (AddVS dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2554 format %{ "paddw $dst,$src\t! add packed8S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2555 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2556 __ paddw($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2557 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2558 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2559 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2560
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2561 instruct vadd8S_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2562 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2563 match(Set dst (AddVS src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2564 format %{ "vpaddw $dst,$src1,$src2\t! add packed8S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2565 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2566 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2567 __ vpaddw($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2568 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2569 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2570 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2571
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2572 instruct vadd8S_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2573 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2574 match(Set dst (AddVS src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2575 format %{ "vpaddw $dst,$src,$mem\t! add packed8S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2576 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2577 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2578 __ vpaddw($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2579 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2580 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2581 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2582
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2583 instruct vadd16S_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2584 predicate(UseAVX > 1 && n->as_Vector()->length() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2585 match(Set dst (AddVS src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2586 format %{ "vpaddw $dst,$src1,$src2\t! add packed16S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2587 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2588 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2589 __ vpaddw($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2590 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2591 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2592 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2593
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2594 instruct vadd16S_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2595 predicate(UseAVX > 1 && n->as_Vector()->length() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2596 match(Set dst (AddVS src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2597 format %{ "vpaddw $dst,$src,$mem\t! add packed16S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2598 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2599 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2600 __ vpaddw($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2601 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2602 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2603 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2604
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2605 // Integers vector add
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2606 instruct vadd2I(vecD dst, vecD src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2607 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2608 match(Set dst (AddVI dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2609 format %{ "paddd $dst,$src\t! add packed2I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2610 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2611 __ paddd($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2612 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2613 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2614 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2615
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2616 instruct vadd2I_reg(vecD dst, vecD src1, vecD src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2617 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2618 match(Set dst (AddVI src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2619 format %{ "vpaddd $dst,$src1,$src2\t! add packed2I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2620 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2621 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2622 __ vpaddd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2623 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2624 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2625 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2626
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2627 instruct vadd4I(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2628 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2629 match(Set dst (AddVI dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2630 format %{ "paddd $dst,$src\t! add packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2631 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2632 __ paddd($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2633 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2634 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2635 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2636
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2637 instruct vadd4I_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2638 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2639 match(Set dst (AddVI src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2640 format %{ "vpaddd $dst,$src1,$src2\t! add packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2641 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2642 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2643 __ vpaddd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2644 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2645 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2646 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2647
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2648 instruct vadd4I_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2649 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2650 match(Set dst (AddVI src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2651 format %{ "vpaddd $dst,$src,$mem\t! add packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2652 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2653 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2654 __ vpaddd($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2655 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2656 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2657 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2658
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2659 instruct vadd8I_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2660 predicate(UseAVX > 1 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2661 match(Set dst (AddVI src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2662 format %{ "vpaddd $dst,$src1,$src2\t! add packed8I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2663 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2664 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2665 __ vpaddd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2666 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2667 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2668 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2669
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2670 instruct vadd8I_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2671 predicate(UseAVX > 1 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2672 match(Set dst (AddVI src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2673 format %{ "vpaddd $dst,$src,$mem\t! add packed8I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2674 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2675 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2676 __ vpaddd($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2677 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2678 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2679 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2680
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2681 // Longs vector add
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2682 instruct vadd2L(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2683 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2684 match(Set dst (AddVL dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2685 format %{ "paddq $dst,$src\t! add packed2L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2686 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2687 __ paddq($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2688 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2689 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2690 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2691
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2692 instruct vadd2L_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2693 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2694 match(Set dst (AddVL src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2695 format %{ "vpaddq $dst,$src1,$src2\t! add packed2L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2696 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2697 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2698 __ vpaddq($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2699 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2700 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2701 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2702
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2703 instruct vadd2L_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2704 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2705 match(Set dst (AddVL src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2706 format %{ "vpaddq $dst,$src,$mem\t! add packed2L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2707 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2708 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2709 __ vpaddq($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2710 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2711 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2712 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2713
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2714 instruct vadd4L_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2715 predicate(UseAVX > 1 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2716 match(Set dst (AddVL src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2717 format %{ "vpaddq $dst,$src1,$src2\t! add packed4L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2718 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2719 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2720 __ vpaddq($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2721 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2722 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2723 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2724
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2725 instruct vadd4L_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2726 predicate(UseAVX > 1 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2727 match(Set dst (AddVL src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2728 format %{ "vpaddq $dst,$src,$mem\t! add packed4L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2729 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2730 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2731 __ vpaddq($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2732 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2733 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2734 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2735
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2736 // Floats vector add
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2737 instruct vadd2F(vecD dst, vecD src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2738 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2739 match(Set dst (AddVF dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2740 format %{ "addps $dst,$src\t! add packed2F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2741 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2742 __ addps($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2743 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2744 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2745 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2746
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2747 instruct vadd2F_reg(vecD dst, vecD src1, vecD src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2748 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2749 match(Set dst (AddVF src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2750 format %{ "vaddps $dst,$src1,$src2\t! add packed2F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2751 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2752 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2753 __ vaddps($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2754 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2755 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2756 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2757
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2758 instruct vadd4F(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2759 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2760 match(Set dst (AddVF dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2761 format %{ "addps $dst,$src\t! add packed4F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2762 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2763 __ addps($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2764 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2765 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2766 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2767
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2768 instruct vadd4F_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2769 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2770 match(Set dst (AddVF src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2771 format %{ "vaddps $dst,$src1,$src2\t! add packed4F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2772 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2773 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2774 __ vaddps($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2775 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2776 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2777 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2778
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2779 instruct vadd4F_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2780 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2781 match(Set dst (AddVF src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2782 format %{ "vaddps $dst,$src,$mem\t! add packed4F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2783 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2784 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2785 __ vaddps($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2786 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2787 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2788 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2789
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2790 instruct vadd8F_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2791 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2792 match(Set dst (AddVF src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2793 format %{ "vaddps $dst,$src1,$src2\t! add packed8F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2794 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2795 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2796 __ vaddps($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2797 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2798 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2799 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2800
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2801 instruct vadd8F_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2802 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2803 match(Set dst (AddVF src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2804 format %{ "vaddps $dst,$src,$mem\t! add packed8F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2805 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2806 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2807 __ vaddps($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2808 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2809 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2810 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2811
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2812 // Doubles vector add
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2813 instruct vadd2D(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2814 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2815 match(Set dst (AddVD dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2816 format %{ "addpd $dst,$src\t! add packed2D" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2817 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2818 __ addpd($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2819 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2820 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2821 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2822
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2823 instruct vadd2D_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2824 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2825 match(Set dst (AddVD src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2826 format %{ "vaddpd $dst,$src1,$src2\t! add packed2D" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2827 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2828 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2829 __ vaddpd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2830 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2831 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2832 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2833
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2834 instruct vadd2D_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2835 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2836 match(Set dst (AddVD src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2837 format %{ "vaddpd $dst,$src,$mem\t! add packed2D" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2838 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2839 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2840 __ vaddpd($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2841 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2842 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2843 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2844
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2845 instruct vadd4D_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2846 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2847 match(Set dst (AddVD src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2848 format %{ "vaddpd $dst,$src1,$src2\t! add packed4D" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2849 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2850 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2851 __ vaddpd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2852 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2853 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2854 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2855
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2856 instruct vadd4D_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2857 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2858 match(Set dst (AddVD src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2859 format %{ "vaddpd $dst,$src,$mem\t! add packed4D" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2860 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2861 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2862 __ vaddpd($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2863 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2864 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2865 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2866
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2867 // --------------------------------- SUB --------------------------------------
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2868
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2869 // Bytes vector sub
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2870 instruct vsub4B(vecS dst, vecS src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2871 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2872 match(Set dst (SubVB dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2873 format %{ "psubb $dst,$src\t! sub packed4B" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2874 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2875 __ psubb($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2876 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2877 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2878 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2879
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2880 instruct vsub4B_reg(vecS dst, vecS src1, vecS src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2881 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2882 match(Set dst (SubVB src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2883 format %{ "vpsubb $dst,$src1,$src2\t! sub packed4B" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2884 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2885 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2886 __ vpsubb($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2887 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2888 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2889 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2890
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2891 instruct vsub8B(vecD dst, vecD src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2892 predicate(n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2893 match(Set dst (SubVB dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2894 format %{ "psubb $dst,$src\t! sub packed8B" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2895 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2896 __ psubb($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2897 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2898 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2899 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2900
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2901 instruct vsub8B_reg(vecD dst, vecD src1, vecD src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2902 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2903 match(Set dst (SubVB src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2904 format %{ "vpsubb $dst,$src1,$src2\t! sub packed8B" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2905 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2906 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2907 __ vpsubb($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2908 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2909 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2910 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2911
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2912 instruct vsub16B(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2913 predicate(n->as_Vector()->length() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2914 match(Set dst (SubVB dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2915 format %{ "psubb $dst,$src\t! sub packed16B" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2916 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2917 __ psubb($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2918 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2919 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2920 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2921
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2922 instruct vsub16B_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2923 predicate(UseAVX > 0 && n->as_Vector()->length() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2924 match(Set dst (SubVB src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2925 format %{ "vpsubb $dst,$src1,$src2\t! sub packed16B" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2926 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2927 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2928 __ vpsubb($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2929 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2930 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2931 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2932
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2933 instruct vsub16B_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2934 predicate(UseAVX > 0 && n->as_Vector()->length() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2935 match(Set dst (SubVB src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2936 format %{ "vpsubb $dst,$src,$mem\t! sub packed16B" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2937 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2938 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2939 __ vpsubb($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2940 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2941 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2942 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2943
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2944 instruct vsub32B_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2945 predicate(UseAVX > 1 && n->as_Vector()->length() == 32);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2946 match(Set dst (SubVB src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2947 format %{ "vpsubb $dst,$src1,$src2\t! sub packed32B" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2948 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2949 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2950 __ vpsubb($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2951 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2952 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2953 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2954
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2955 instruct vsub32B_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2956 predicate(UseAVX > 1 && n->as_Vector()->length() == 32);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2957 match(Set dst (SubVB src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2958 format %{ "vpsubb $dst,$src,$mem\t! sub packed32B" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2959 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2960 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2961 __ vpsubb($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2962 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2963 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2964 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2965
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2966 // Shorts/Chars vector sub
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2967 instruct vsub2S(vecS dst, vecS src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2968 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2969 match(Set dst (SubVS dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2970 format %{ "psubw $dst,$src\t! sub packed2S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2971 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2972 __ psubw($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2973 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2974 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2975 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2976
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2977 instruct vsub2S_reg(vecS dst, vecS src1, vecS src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2978 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2979 match(Set dst (SubVS src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2980 format %{ "vpsubw $dst,$src1,$src2\t! sub packed2S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2981 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2982 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2983 __ vpsubw($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2984 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2985 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2986 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2987
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2988 instruct vsub4S(vecD dst, vecD src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2989 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2990 match(Set dst (SubVS dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2991 format %{ "psubw $dst,$src\t! sub packed4S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2992 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2993 __ psubw($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2994 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2995 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2996 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2997
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2998 instruct vsub4S_reg(vecD dst, vecD src1, vecD src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2999 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3000 match(Set dst (SubVS src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3001 format %{ "vpsubw $dst,$src1,$src2\t! sub packed4S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3002 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3003 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3004 __ vpsubw($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3005 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3006 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3007 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3008
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3009 instruct vsub8S(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3010 predicate(n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3011 match(Set dst (SubVS dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3012 format %{ "psubw $dst,$src\t! sub packed8S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3013 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3014 __ psubw($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3015 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3016 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3017 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3018
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3019 instruct vsub8S_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3020 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3021 match(Set dst (SubVS src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3022 format %{ "vpsubw $dst,$src1,$src2\t! sub packed8S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3023 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3024 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3025 __ vpsubw($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3026 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3027 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3028 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3029
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3030 instruct vsub8S_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3031 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3032 match(Set dst (SubVS src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3033 format %{ "vpsubw $dst,$src,$mem\t! sub packed8S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3034 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3035 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3036 __ vpsubw($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3037 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3038 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3039 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3040
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3041 instruct vsub16S_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3042 predicate(UseAVX > 1 && n->as_Vector()->length() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3043 match(Set dst (SubVS src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3044 format %{ "vpsubw $dst,$src1,$src2\t! sub packed16S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3045 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3046 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3047 __ vpsubw($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3048 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3049 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3050 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3051
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3052 instruct vsub16S_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3053 predicate(UseAVX > 1 && n->as_Vector()->length() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3054 match(Set dst (SubVS src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3055 format %{ "vpsubw $dst,$src,$mem\t! sub packed16S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3056 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3057 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3058 __ vpsubw($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3059 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3060 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3061 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3062
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3063 // Integers vector sub
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3064 instruct vsub2I(vecD dst, vecD src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3065 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3066 match(Set dst (SubVI dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3067 format %{ "psubd $dst,$src\t! sub packed2I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3068 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3069 __ psubd($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3070 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3071 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3072 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3073
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3074 instruct vsub2I_reg(vecD dst, vecD src1, vecD src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3075 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3076 match(Set dst (SubVI src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3077 format %{ "vpsubd $dst,$src1,$src2\t! sub packed2I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3078 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3079 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3080 __ vpsubd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3081 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3082 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3083 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3084
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3085 instruct vsub4I(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3086 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3087 match(Set dst (SubVI dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3088 format %{ "psubd $dst,$src\t! sub packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3089 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3090 __ psubd($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3091 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3092 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3093 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3094
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3095 instruct vsub4I_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3096 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3097 match(Set dst (SubVI src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3098 format %{ "vpsubd $dst,$src1,$src2\t! sub packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3099 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3100 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3101 __ vpsubd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3102 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3103 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3104 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3105
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3106 instruct vsub4I_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3107 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3108 match(Set dst (SubVI src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3109 format %{ "vpsubd $dst,$src,$mem\t! sub packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3110 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3111 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3112 __ vpsubd($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3113 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3114 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3115 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3116
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3117 instruct vsub8I_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3118 predicate(UseAVX > 1 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3119 match(Set dst (SubVI src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3120 format %{ "vpsubd $dst,$src1,$src2\t! sub packed8I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3121 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3122 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3123 __ vpsubd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3124 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3125 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3126 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3127
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3128 instruct vsub8I_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3129 predicate(UseAVX > 1 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3130 match(Set dst (SubVI src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3131 format %{ "vpsubd $dst,$src,$mem\t! sub packed8I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3132 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3133 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3134 __ vpsubd($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3135 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3136 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3137 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3138
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3139 // Longs vector sub
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3140 instruct vsub2L(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3141 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3142 match(Set dst (SubVL dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3143 format %{ "psubq $dst,$src\t! sub packed2L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3144 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3145 __ psubq($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3146 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3147 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3148 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3149
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3150 instruct vsub2L_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3151 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3152 match(Set dst (SubVL src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3153 format %{ "vpsubq $dst,$src1,$src2\t! sub packed2L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3154 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3155 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3156 __ vpsubq($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3157 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3158 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3159 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3160
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3161 instruct vsub2L_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3162 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3163 match(Set dst (SubVL src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3164 format %{ "vpsubq $dst,$src,$mem\t! sub packed2L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3165 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3166 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3167 __ vpsubq($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3168 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3169 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3170 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3171
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3172 instruct vsub4L_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3173 predicate(UseAVX > 1 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3174 match(Set dst (SubVL src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3175 format %{ "vpsubq $dst,$src1,$src2\t! sub packed4L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3176 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3177 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3178 __ vpsubq($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3179 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3180 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3181 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3182
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3183 instruct vsub4L_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3184 predicate(UseAVX > 1 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3185 match(Set dst (SubVL src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3186 format %{ "vpsubq $dst,$src,$mem\t! sub packed4L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3187 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3188 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3189 __ vpsubq($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3190 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3191 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3192 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3193
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3194 // Floats vector sub
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3195 instruct vsub2F(vecD dst, vecD src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3196 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3197 match(Set dst (SubVF dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3198 format %{ "subps $dst,$src\t! sub packed2F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3199 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3200 __ subps($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3201 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3202 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3203 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3204
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3205 instruct vsub2F_reg(vecD dst, vecD src1, vecD src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3206 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3207 match(Set dst (SubVF src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3208 format %{ "vsubps $dst,$src1,$src2\t! sub packed2F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3209 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3210 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3211 __ vsubps($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3212 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3213 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3214 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3215
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3216 instruct vsub4F(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3217 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3218 match(Set dst (SubVF dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3219 format %{ "subps $dst,$src\t! sub packed4F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3220 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3221 __ subps($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3222 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3223 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3224 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3225
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3226 instruct vsub4F_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3227 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3228 match(Set dst (SubVF src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3229 format %{ "vsubps $dst,$src1,$src2\t! sub packed4F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3230 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3231 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3232 __ vsubps($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3233 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3234 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3235 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3236
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3237 instruct vsub4F_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3238 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3239 match(Set dst (SubVF src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3240 format %{ "vsubps $dst,$src,$mem\t! sub packed4F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3241 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3242 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3243 __ vsubps($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3244 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3245 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3246 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3247
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3248 instruct vsub8F_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3249 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3250 match(Set dst (SubVF src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3251 format %{ "vsubps $dst,$src1,$src2\t! sub packed8F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3252 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3253 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3254 __ vsubps($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3255 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3256 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3257 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3258
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3259 instruct vsub8F_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3260 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3261 match(Set dst (SubVF src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3262 format %{ "vsubps $dst,$src,$mem\t! sub packed8F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3263 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3264 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3265 __ vsubps($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3266 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3267 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3268 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3269
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3270 // Doubles vector sub
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3271 instruct vsub2D(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3272 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3273 match(Set dst (SubVD dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3274 format %{ "subpd $dst,$src\t! sub packed2D" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3275 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3276 __ subpd($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3277 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3278 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3279 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3280
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3281 instruct vsub2D_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3282 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3283 match(Set dst (SubVD src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3284 format %{ "vsubpd $dst,$src1,$src2\t! sub packed2D" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3285 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3286 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3287 __ vsubpd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3288 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3289 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3290 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3291
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3292 instruct vsub2D_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3293 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3294 match(Set dst (SubVD src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3295 format %{ "vsubpd $dst,$src,$mem\t! sub packed2D" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3296 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3297 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3298 __ vsubpd($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3299 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3300 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3301 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3302
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3303 instruct vsub4D_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3304 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3305 match(Set dst (SubVD src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3306 format %{ "vsubpd $dst,$src1,$src2\t! sub packed4D" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3307 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3308 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3309 __ vsubpd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3310 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3311 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3312 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3313
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3314 instruct vsub4D_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3315 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3316 match(Set dst (SubVD src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3317 format %{ "vsubpd $dst,$src,$mem\t! sub packed4D" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3318 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3319 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3320 __ vsubpd($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3321 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3322 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3323 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3324
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3325 // --------------------------------- MUL --------------------------------------
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3326
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3327 // Shorts/Chars vector mul
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3328 instruct vmul2S(vecS dst, vecS src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3329 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3330 match(Set dst (MulVS dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3331 format %{ "pmullw $dst,$src\t! mul packed2S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3332 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3333 __ pmullw($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3334 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3335 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3336 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3337
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3338 instruct vmul2S_reg(vecS dst, vecS src1, vecS src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3339 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3340 match(Set dst (MulVS src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3341 format %{ "vpmullw $dst,$src1,$src2\t! mul packed2S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3342 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3343 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3344 __ vpmullw($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3345 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3346 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3347 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3348
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3349 instruct vmul4S(vecD dst, vecD src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3350 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3351 match(Set dst (MulVS dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3352 format %{ "pmullw $dst,$src\t! mul packed4S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3353 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3354 __ pmullw($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3355 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3356 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3357 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3358
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3359 instruct vmul4S_reg(vecD dst, vecD src1, vecD src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3360 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3361 match(Set dst (MulVS src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3362 format %{ "vpmullw $dst,$src1,$src2\t! mul packed4S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3363 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3364 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3365 __ vpmullw($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3366 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3367 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3368 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3369
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3370 instruct vmul8S(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3371 predicate(n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3372 match(Set dst (MulVS dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3373 format %{ "pmullw $dst,$src\t! mul packed8S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3374 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3375 __ pmullw($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3376 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3377 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3378 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3379
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3380 instruct vmul8S_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3381 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3382 match(Set dst (MulVS src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3383 format %{ "vpmullw $dst,$src1,$src2\t! mul packed8S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3384 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3385 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3386 __ vpmullw($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3387 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3388 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3389 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3390
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3391 instruct vmul8S_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3392 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3393 match(Set dst (MulVS src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3394 format %{ "vpmullw $dst,$src,$mem\t! mul packed8S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3395 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3396 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3397 __ vpmullw($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3398 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3399 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3400 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3401
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3402 instruct vmul16S_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3403 predicate(UseAVX > 1 && n->as_Vector()->length() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3404 match(Set dst (MulVS src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3405 format %{ "vpmullw $dst,$src1,$src2\t! mul packed16S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3406 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3407 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3408 __ vpmullw($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3409 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3410 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3411 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3412
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3413 instruct vmul16S_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3414 predicate(UseAVX > 1 && n->as_Vector()->length() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3415 match(Set dst (MulVS src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3416 format %{ "vpmullw $dst,$src,$mem\t! mul packed16S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3417 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3418 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3419 __ vpmullw($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3420 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3421 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3422 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3423
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3424 // Integers vector mul (sse4_1)
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3425 instruct vmul2I(vecD dst, vecD src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3426 predicate(UseSSE > 3 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3427 match(Set dst (MulVI dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3428 format %{ "pmulld $dst,$src\t! mul packed2I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3429 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3430 __ pmulld($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3431 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3432 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3433 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3434
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3435 instruct vmul2I_reg(vecD dst, vecD src1, vecD src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3436 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3437 match(Set dst (MulVI src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3438 format %{ "vpmulld $dst,$src1,$src2\t! mul packed2I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3439 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3440 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3441 __ vpmulld($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3442 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3443 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3444 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3445
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3446 instruct vmul4I(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3447 predicate(UseSSE > 3 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3448 match(Set dst (MulVI dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3449 format %{ "pmulld $dst,$src\t! mul packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3450 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3451 __ pmulld($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3452 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3453 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3454 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3455
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3456 instruct vmul4I_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3457 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3458 match(Set dst (MulVI src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3459 format %{ "vpmulld $dst,$src1,$src2\t! mul packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3460 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3461 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3462 __ vpmulld($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3463 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3464 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3465 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3466
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3467 instruct vmul4I_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3468 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3469 match(Set dst (MulVI src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3470 format %{ "vpmulld $dst,$src,$mem\t! mul packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3471 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3472 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3473 __ vpmulld($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3474 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3475 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3476 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3477
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3478 instruct vmul8I_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3479 predicate(UseAVX > 1 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3480 match(Set dst (MulVI src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3481 format %{ "vpmulld $dst,$src1,$src2\t! mul packed8I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3482 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3483 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3484 __ vpmulld($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3485 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3486 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3487 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3488
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3489 instruct vmul8I_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3490 predicate(UseAVX > 1 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3491 match(Set dst (MulVI src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3492 format %{ "vpmulld $dst,$src,$mem\t! mul packed8I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3493 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3494 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3495 __ vpmulld($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3496 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3497 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3498 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3499
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3500 // Floats vector mul
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3501 instruct vmul2F(vecD dst, vecD src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3502 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3503 match(Set dst (MulVF dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3504 format %{ "mulps $dst,$src\t! mul packed2F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3505 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3506 __ mulps($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3507 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3508 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3509 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3510
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3511 instruct vmul2F_reg(vecD dst, vecD src1, vecD src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3512 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3513 match(Set dst (MulVF src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3514 format %{ "vmulps $dst,$src1,$src2\t! mul packed2F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3515 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3516 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3517 __ vmulps($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3518 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3519 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3520 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3521
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3522 instruct vmul4F(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3523 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3524 match(Set dst (MulVF dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3525 format %{ "mulps $dst,$src\t! mul packed4F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3526 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3527 __ mulps($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3528 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3529 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3530 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3531
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3532 instruct vmul4F_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3533 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3534 match(Set dst (MulVF src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3535 format %{ "vmulps $dst,$src1,$src2\t! mul packed4F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3536 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3537 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3538 __ vmulps($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3539 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3540 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3541 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3542
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3543 instruct vmul4F_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3544 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3545 match(Set dst (MulVF src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3546 format %{ "vmulps $dst,$src,$mem\t! mul packed4F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3547 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3548 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3549 __ vmulps($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3550 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3551 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3552 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3553
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3554 instruct vmul8F_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3555 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3556 match(Set dst (MulVF src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3557 format %{ "vmulps $dst,$src1,$src2\t! mul packed8F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3558 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3559 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3560 __ vmulps($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3561 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3562 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3563 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3564
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3565 instruct vmul8F_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3566 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3567 match(Set dst (MulVF src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3568 format %{ "vmulps $dst,$src,$mem\t! mul packed8F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3569 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3570 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3571 __ vmulps($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3572 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3573 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3574 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3575
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3576 // Doubles vector mul
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3577 instruct vmul2D(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3578 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3579 match(Set dst (MulVD dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3580 format %{ "mulpd $dst,$src\t! mul packed2D" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3581 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3582 __ mulpd($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3583 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3584 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3585 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3586
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3587 instruct vmul2D_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3588 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3589 match(Set dst (MulVD src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3590 format %{ "vmulpd $dst,$src1,$src2\t! mul packed2D" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3591 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3592 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3593 __ vmulpd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3594 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3595 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3596 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3597
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3598 instruct vmul2D_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3599 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3600 match(Set dst (MulVD src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3601 format %{ "vmulpd $dst,$src,$mem\t! mul packed2D" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3602 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3603 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3604 __ vmulpd($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3605 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3606 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3607 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3608
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3609 instruct vmul4D_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3610 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3611 match(Set dst (MulVD src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3612 format %{ "vmulpd $dst,$src1,$src2\t! mul packed4D" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3613 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3614 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3615 __ vmulpd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3616 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3617 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3618 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3619
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3620 instruct vmul4D_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3621 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3622 match(Set dst (MulVD src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3623 format %{ "vmulpd $dst,$src,$mem\t! mul packed4D" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3624 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3625 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3626 __ vmulpd($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3627 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3628 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3629 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3630
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3631 // --------------------------------- DIV --------------------------------------
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3632
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3633 // Floats vector div
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3634 instruct vdiv2F(vecD dst, vecD src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3635 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3636 match(Set dst (DivVF dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3637 format %{ "divps $dst,$src\t! div packed2F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3638 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3639 __ divps($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3640 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3641 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3642 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3643
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3644 instruct vdiv2F_reg(vecD dst, vecD src1, vecD src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3645 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3646 match(Set dst (DivVF src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3647 format %{ "vdivps $dst,$src1,$src2\t! div packed2F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3648 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3649 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3650 __ vdivps($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3651 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3652 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3653 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3654
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3655 instruct vdiv4F(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3656 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3657 match(Set dst (DivVF dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3658 format %{ "divps $dst,$src\t! div packed4F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3659 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3660 __ divps($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3661 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3662 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3663 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3664
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3665 instruct vdiv4F_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3666 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3667 match(Set dst (DivVF src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3668 format %{ "vdivps $dst,$src1,$src2\t! div packed4F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3669 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3670 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3671 __ vdivps($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3672 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3673 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3674 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3675
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3676 instruct vdiv4F_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3677 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3678 match(Set dst (DivVF src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3679 format %{ "vdivps $dst,$src,$mem\t! div packed4F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3680 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3681 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3682 __ vdivps($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3683 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3684 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3685 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3686
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3687 instruct vdiv8F_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3688 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3689 match(Set dst (DivVF src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3690 format %{ "vdivps $dst,$src1,$src2\t! div packed8F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3691 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3692 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3693 __ vdivps($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3694 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3695 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3696 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3697
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3698 instruct vdiv8F_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3699 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3700 match(Set dst (DivVF src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3701 format %{ "vdivps $dst,$src,$mem\t! div packed8F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3702 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3703 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3704 __ vdivps($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3705 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3706 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3707 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3708
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3709 // Doubles vector div
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3710 instruct vdiv2D(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3711 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3712 match(Set dst (DivVD dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3713 format %{ "divpd $dst,$src\t! div packed2D" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3714 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3715 __ divpd($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3716 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3717 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3718 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3719
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3720 instruct vdiv2D_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3721 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3722 match(Set dst (DivVD src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3723 format %{ "vdivpd $dst,$src1,$src2\t! div packed2D" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3724 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3725 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3726 __ vdivpd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3727 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3728 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3729 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3730
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3731 instruct vdiv2D_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3732 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3733 match(Set dst (DivVD src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3734 format %{ "vdivpd $dst,$src,$mem\t! div packed2D" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3735 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3736 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3737 __ vdivpd($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3738 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3739 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3740 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3741
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3742 instruct vdiv4D_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3743 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3744 match(Set dst (DivVD src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3745 format %{ "vdivpd $dst,$src1,$src2\t! div packed4D" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3746 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3747 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3748 __ vdivpd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3749 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3750 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3751 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3752
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3753 instruct vdiv4D_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3754 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3755 match(Set dst (DivVD src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3756 format %{ "vdivpd $dst,$src,$mem\t! div packed4D" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3757 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3758 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3759 __ vdivpd($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3760 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3761 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3762 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3763
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3764 // ------------------------------ LeftShift -----------------------------------
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3765
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3766 // Shorts/Chars vector left shift
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3767 instruct vsll2S(vecS dst, regF shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3768 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3769 match(Set dst (LShiftVS dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3770 format %{ "psllw $dst,$shift\t! left shift packed2S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3771 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3772 __ psllw($dst$$XMMRegister, $shift$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3773 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3774 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3775 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3776
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3777 instruct vsll2S_imm(vecS dst, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3778 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3779 match(Set dst (LShiftVS dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3780 format %{ "psllw $dst,$shift\t! left shift packed2S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3781 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3782 __ psllw($dst$$XMMRegister, (int)$shift$$constant);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3783 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3784 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3785 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3786
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3787 instruct vsll2S_reg(vecS dst, vecS src, regF shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3788 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3789 match(Set dst (LShiftVS src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3790 format %{ "vpsllw $dst,$src,$shift\t! left shift packed2S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3791 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3792 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3793 __ vpsllw($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3794 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3795 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3796 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3797
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3798 instruct vsll2S_reg_imm(vecS dst, vecS src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3799 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3800 match(Set dst (LShiftVS src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3801 format %{ "vpsllw $dst,$src,$shift\t! left shift packed2S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3802 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3803 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3804 __ vpsllw($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3805 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3806 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3807 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3808
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3809 instruct vsll4S(vecD dst, regF shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3810 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3811 match(Set dst (LShiftVS dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3812 format %{ "psllw $dst,$shift\t! left shift packed4S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3813 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3814 __ psllw($dst$$XMMRegister, $shift$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3815 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3816 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3817 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3818
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3819 instruct vsll4S_imm(vecD dst, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3820 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3821 match(Set dst (LShiftVS dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3822 format %{ "psllw $dst,$shift\t! left shift packed4S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3823 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3824 __ psllw($dst$$XMMRegister, (int)$shift$$constant);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3825 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3826 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3827 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3828
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3829 instruct vsll4S_reg(vecD dst, vecD src, regF shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3830 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3831 match(Set dst (LShiftVS src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3832 format %{ "vpsllw $dst,$src,$shift\t! left shift packed4S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3833 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3834 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3835 __ vpsllw($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3836 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3837 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3838 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3839
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3840 instruct vsll4S_reg_imm(vecD dst, vecD src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3841 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3842 match(Set dst (LShiftVS src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3843 format %{ "vpsllw $dst,$src,$shift\t! left shift packed4S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3844 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3845 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3846 __ vpsllw($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3847 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3848 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3849 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3850
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3851 instruct vsll8S(vecX dst, regF shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3852 predicate(n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3853 match(Set dst (LShiftVS dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3854 format %{ "psllw $dst,$shift\t! left shift packed8S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3855 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3856 __ psllw($dst$$XMMRegister, $shift$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3857 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3858 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3859 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3860
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3861 instruct vsll8S_imm(vecX dst, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3862 predicate(n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3863 match(Set dst (LShiftVS dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3864 format %{ "psllw $dst,$shift\t! left shift packed8S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3865 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3866 __ psllw($dst$$XMMRegister, (int)$shift$$constant);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3867 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3868 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3869 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3870
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3871 instruct vsll8S_reg(vecX dst, vecX src, regF shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3872 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3873 match(Set dst (LShiftVS src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3874 format %{ "vpsllw $dst,$src,$shift\t! left shift packed8S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3875 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3876 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3877 __ vpsllw($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3878 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3879 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3880 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3881
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3882 instruct vsll8S_reg_imm(vecX dst, vecX src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3883 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3884 match(Set dst (LShiftVS src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3885 format %{ "vpsllw $dst,$src,$shift\t! left shift packed8S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3886 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3887 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3888 __ vpsllw($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3889 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3890 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3891 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3892
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3893 instruct vsll16S_reg(vecY dst, vecY src, regF shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3894 predicate(UseAVX > 1 && n->as_Vector()->length() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3895 match(Set dst (LShiftVS src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3896 format %{ "vpsllw $dst,$src,$shift\t! left shift packed16S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3897 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3898 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3899 __ vpsllw($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3900 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3901 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3902 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3903
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3904 instruct vsll16S_reg_imm(vecY dst, vecY src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3905 predicate(UseAVX > 1 && n->as_Vector()->length() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3906 match(Set dst (LShiftVS src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3907 format %{ "vpsllw $dst,$src,$shift\t! left shift packed16S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3908 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3909 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3910 __ vpsllw($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3911 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3912 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3913 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3914
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3915 // Integers vector left shift
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3916 instruct vsll2I(vecD dst, regF shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3917 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3918 match(Set dst (LShiftVI dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3919 format %{ "pslld $dst,$shift\t! left shift packed2I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3920 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3921 __ pslld($dst$$XMMRegister, $shift$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3922 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3923 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3924 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3925
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3926 instruct vsll2I_imm(vecD dst, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3927 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3928 match(Set dst (LShiftVI dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3929 format %{ "pslld $dst,$shift\t! left shift packed2I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3930 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3931 __ pslld($dst$$XMMRegister, (int)$shift$$constant);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3932 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3933 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3934 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3935
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3936 instruct vsll2I_reg(vecD dst, vecD src, regF shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3937 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3938 match(Set dst (LShiftVI src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3939 format %{ "vpslld $dst,$src,$shift\t! left shift packed2I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3940 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3941 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3942 __ vpslld($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3943 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3944 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3945 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3946
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3947 instruct vsll2I_reg_imm(vecD dst, vecD src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3948 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3949 match(Set dst (LShiftVI src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3950 format %{ "vpslld $dst,$src,$shift\t! left shift packed2I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3951 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3952 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3953 __ vpslld($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3954 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3955 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3956 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3957
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3958 instruct vsll4I(vecX dst, regF shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3959 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3960 match(Set dst (LShiftVI dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3961 format %{ "pslld $dst,$shift\t! left shift packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3962 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3963 __ pslld($dst$$XMMRegister, $shift$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3964 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3965 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3966 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3967
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3968 instruct vsll4I_imm(vecX dst, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3969 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3970 match(Set dst (LShiftVI dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3971 format %{ "pslld $dst,$shift\t! left shift packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3972 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3973 __ pslld($dst$$XMMRegister, (int)$shift$$constant);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3974 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3975 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3976 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3977
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3978 instruct vsll4I_reg(vecX dst, vecX src, regF shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3979 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3980 match(Set dst (LShiftVI src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3981 format %{ "vpslld $dst,$src,$shift\t! left shift packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3982 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3983 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3984 __ vpslld($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3985 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3986 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3987 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3988
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3989 instruct vsll4I_reg_imm(vecX dst, vecX src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3990 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3991 match(Set dst (LShiftVI src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3992 format %{ "vpslld $dst,$src,$shift\t! left shift packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3993 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3994 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3995 __ vpslld($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3996 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3997 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3998 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3999
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4000 instruct vsll8I_reg(vecY dst, vecY src, regF shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4001 predicate(UseAVX > 1 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4002 match(Set dst (LShiftVI src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4003 format %{ "vpslld $dst,$src,$shift\t! left shift packed8I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4004 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4005 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4006 __ vpslld($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4007 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4008 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4009 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4010
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4011 instruct vsll8I_reg_imm(vecY dst, vecY src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4012 predicate(UseAVX > 1 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4013 match(Set dst (LShiftVI src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4014 format %{ "vpslld $dst,$src,$shift\t! left shift packed8I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4015 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4016 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4017 __ vpslld($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4018 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4019 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4020 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4021
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4022 // Longs vector left shift
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4023 instruct vsll2L(vecX dst, regF shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4024 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4025 match(Set dst (LShiftVL dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4026 format %{ "psllq $dst,$shift\t! left shift packed2L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4027 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4028 __ psllq($dst$$XMMRegister, $shift$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4029 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4030 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4031 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4032
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4033 instruct vsll2L_imm(vecX dst, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4034 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4035 match(Set dst (LShiftVL dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4036 format %{ "psllq $dst,$shift\t! left shift packed2L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4037 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4038 __ psllq($dst$$XMMRegister, (int)$shift$$constant);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4039 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4040 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4041 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4042
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4043 instruct vsll2L_reg(vecX dst, vecX src, regF shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4044 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4045 match(Set dst (LShiftVL src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4046 format %{ "vpsllq $dst,$src,$shift\t! left shift packed2L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4047 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4048 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4049 __ vpsllq($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4050 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4051 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4052 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4053
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4054 instruct vsll2L_reg_imm(vecX dst, vecX src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4055 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4056 match(Set dst (LShiftVL src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4057 format %{ "vpsllq $dst,$src,$shift\t! left shift packed2L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4058 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4059 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4060 __ vpsllq($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4061 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4062 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4063 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4064
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4065 instruct vsll4L_reg(vecY dst, vecY src, regF shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4066 predicate(UseAVX > 1 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4067 match(Set dst (LShiftVL src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4068 format %{ "vpsllq $dst,$src,$shift\t! left shift packed4L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4069 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4070 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4071 __ vpsllq($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4072 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4073 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4074 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4075
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4076 instruct vsll4L_reg_imm(vecY dst, vecY src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4077 predicate(UseAVX > 1 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4078 match(Set dst (LShiftVL src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4079 format %{ "vpsllq $dst,$src,$shift\t! left shift packed4L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4080 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4081 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4082 __ vpsllq($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4083 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4084 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4085 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4086
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4087 // ----------------------- LogicalRightShift -----------------------------------
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4088
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4089 // Shorts/Chars vector logical right shift produces incorrect Java result
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4090 // for negative data because java code convert short value into int with
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4091 // sign extension before a shift.
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4092
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4093 // Integers vector logical right shift
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4094 instruct vsrl2I(vecD dst, regF shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4095 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4096 match(Set dst (URShiftVI dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4097 format %{ "psrld $dst,$shift\t! logical right shift packed2I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4098 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4099 __ psrld($dst$$XMMRegister, $shift$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4100 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4101 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4102 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4103
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4104 instruct vsrl2I_imm(vecD dst, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4105 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4106 match(Set dst (URShiftVI dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4107 format %{ "psrld $dst,$shift\t! logical right shift packed2I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4108 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4109 __ psrld($dst$$XMMRegister, (int)$shift$$constant);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4110 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4111 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4112 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4113
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4114 instruct vsrl2I_reg(vecD dst, vecD src, regF shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4115 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4116 match(Set dst (URShiftVI src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4117 format %{ "vpsrld $dst,$src,$shift\t! logical right shift packed2I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4118 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4119 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4120 __ vpsrld($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4121 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4122 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4123 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4124
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4125 instruct vsrl2I_reg_imm(vecD dst, vecD src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4126 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4127 match(Set dst (URShiftVI src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4128 format %{ "vpsrld $dst,$src,$shift\t! logical right shift packed2I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4129 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4130 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4131 __ vpsrld($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4132 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4133 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4134 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4135
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4136 instruct vsrl4I(vecX dst, regF shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4137 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4138 match(Set dst (URShiftVI dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4139 format %{ "psrld $dst,$shift\t! logical right shift packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4140 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4141 __ psrld($dst$$XMMRegister, $shift$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4142 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4143 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4144 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4145
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4146 instruct vsrl4I_imm(vecX dst, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4147 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4148 match(Set dst (URShiftVI dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4149 format %{ "psrld $dst,$shift\t! logical right shift packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4150 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4151 __ psrld($dst$$XMMRegister, (int)$shift$$constant);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4152 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4153 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4154 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4155
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4156 instruct vsrl4I_reg(vecX dst, vecX src, regF shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4157 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4158 match(Set dst (URShiftVI src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4159 format %{ "vpsrld $dst,$src,$shift\t! logical right shift packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4160 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4161 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4162 __ vpsrld($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4163 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4164 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4165 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4166
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4167 instruct vsrl4I_reg_imm(vecX dst, vecX src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4168 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4169 match(Set dst (URShiftVI src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4170 format %{ "vpsrld $dst,$src,$shift\t! logical right shift packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4171 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4172 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4173 __ vpsrld($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4174 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4175 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4176 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4177
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4178 instruct vsrl8I_reg(vecY dst, vecY src, regF shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4179 predicate(UseAVX > 1 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4180 match(Set dst (URShiftVI src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4181 format %{ "vpsrld $dst,$src,$shift\t! logical right shift packed8I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4182 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4183 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4184 __ vpsrld($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4185 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4186 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4187 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4188
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4189 instruct vsrl8I_reg_imm(vecY dst, vecY src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4190 predicate(UseAVX > 1 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4191 match(Set dst (URShiftVI src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4192 format %{ "vpsrld $dst,$src,$shift\t! logical right shift packed8I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4193 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4194 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4195 __ vpsrld($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4196 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4197 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4198 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4199
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4200 // Longs vector logical right shift
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4201 instruct vsrl2L(vecX dst, regF shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4202 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4203 match(Set dst (URShiftVL dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4204 format %{ "psrlq $dst,$shift\t! logical right shift packed2L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4205 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4206 __ psrlq($dst$$XMMRegister, $shift$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4207 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4208 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4209 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4210
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4211 instruct vsrl2L_imm(vecX dst, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4212 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4213 match(Set dst (URShiftVL dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4214 format %{ "psrlq $dst,$shift\t! logical right shift packed2L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4215 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4216 __ psrlq($dst$$XMMRegister, (int)$shift$$constant);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4217 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4218 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4219 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4220
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4221 instruct vsrl2L_reg(vecX dst, vecX src, regF shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4222 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4223 match(Set dst (URShiftVL src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4224 format %{ "vpsrlq $dst,$src,$shift\t! logical right shift packed2L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4225 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4226 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4227 __ vpsrlq($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4228 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4229 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4230 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4231
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4232 instruct vsrl2L_reg_imm(vecX dst, vecX src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4233 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4234 match(Set dst (URShiftVL src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4235 format %{ "vpsrlq $dst,$src,$shift\t! logical right shift packed2L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4236 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4237 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4238 __ vpsrlq($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4239 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4240 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4241 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4242
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4243 instruct vsrl4L_reg(vecY dst, vecY src, regF shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4244 predicate(UseAVX > 1 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4245 match(Set dst (URShiftVL src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4246 format %{ "vpsrlq $dst,$src,$shift\t! logical right shift packed4L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4247 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4248 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4249 __ vpsrlq($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4250 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4251 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4252 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4253
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4254 instruct vsrl4L_reg_imm(vecY dst, vecY src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4255 predicate(UseAVX > 1 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4256 match(Set dst (URShiftVL src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4257 format %{ "vpsrlq $dst,$src,$shift\t! logical right shift packed4L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4258 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4259 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4260 __ vpsrlq($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4261 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4262 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4263 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4264
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4265 // ------------------- ArithmeticRightShift -----------------------------------
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4266
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4267 // Shorts/Chars vector arithmetic right shift
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4268 instruct vsra2S(vecS dst, regF shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4269 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4270 match(Set dst (RShiftVS dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4271 format %{ "psraw $dst,$shift\t! arithmetic right shift packed2S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4272 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4273 __ psraw($dst$$XMMRegister, $shift$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4274 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4275 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4276 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4277
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4278 instruct vsra2S_imm(vecS dst, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4279 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4280 match(Set dst (RShiftVS dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4281 format %{ "psraw $dst,$shift\t! arithmetic right shift packed2S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4282 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4283 __ psraw($dst$$XMMRegister, (int)$shift$$constant);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4284 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4285 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4286 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4287
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4288 instruct vsra2S_reg(vecS dst, vecS src, regF shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4289 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4290 match(Set dst (RShiftVS src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4291 format %{ "vpsraw $dst,$src,$shift\t! arithmetic right shift packed2S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4292 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4293 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4294 __ vpsraw($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4295 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4296 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4297 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4298
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4299 instruct vsra2S_reg_imm(vecS dst, vecS src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4300 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4301 match(Set dst (RShiftVS src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4302 format %{ "vpsraw $dst,$src,$shift\t! arithmetic right shift packed2S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4303 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4304 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4305 __ vpsraw($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4306 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4307 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4308 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4309
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4310 instruct vsra4S(vecD dst, regF shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4311 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4312 match(Set dst (RShiftVS dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4313 format %{ "psraw $dst,$shift\t! arithmetic right shift packed4S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4314 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4315 __ psraw($dst$$XMMRegister, $shift$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4316 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4317 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4318 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4319
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4320 instruct vsra4S_imm(vecD dst, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4321 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4322 match(Set dst (RShiftVS dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4323 format %{ "psraw $dst,$shift\t! arithmetic right shift packed4S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4324 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4325 __ psraw($dst$$XMMRegister, (int)$shift$$constant);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4326 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4327 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4328 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4329
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4330 instruct vsra4S_reg(vecD dst, vecD src, regF shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4331 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4332 match(Set dst (RShiftVS src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4333 format %{ "vpsraw $dst,$src,$shift\t! arithmetic right shift packed4S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4334 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4335 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4336 __ vpsraw($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4337 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4338 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4339 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4340
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4341 instruct vsra4S_reg_imm(vecD dst, vecD src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4342 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4343 match(Set dst (RShiftVS src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4344 format %{ "vpsraw $dst,$src,$shift\t! arithmetic right shift packed4S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4345 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4346 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4347 __ vpsraw($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4348 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4349 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4350 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4351
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4352 instruct vsra8S(vecX dst, regF shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4353 predicate(n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4354 match(Set dst (RShiftVS dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4355 format %{ "psraw $dst,$shift\t! arithmetic right shift packed8S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4356 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4357 __ psraw($dst$$XMMRegister, $shift$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4358 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4359 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4360 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4361
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4362 instruct vsra8S_imm(vecX dst, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4363 predicate(n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4364 match(Set dst (RShiftVS dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4365 format %{ "psraw $dst,$shift\t! arithmetic right shift packed8S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4366 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4367 __ psraw($dst$$XMMRegister, (int)$shift$$constant);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4368 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4369 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4370 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4371
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4372 instruct vsra8S_reg(vecX dst, vecX src, regF shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4373 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4374 match(Set dst (RShiftVS src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4375 format %{ "vpsraw $dst,$src,$shift\t! arithmetic right shift packed8S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4376 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4377 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4378 __ vpsraw($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4379 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4380 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4381 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4382
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4383 instruct vsra8S_reg_imm(vecX dst, vecX src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4384 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4385 match(Set dst (RShiftVS src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4386 format %{ "vpsraw $dst,$src,$shift\t! arithmetic right shift packed8S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4387 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4388 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4389 __ vpsraw($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4390 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4391 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4392 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4393
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4394 instruct vsra16S_reg(vecY dst, vecY src, regF shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4395 predicate(UseAVX > 1 && n->as_Vector()->length() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4396 match(Set dst (RShiftVS src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4397 format %{ "vpsraw $dst,$src,$shift\t! arithmetic right shift packed16S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4398 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4399 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4400 __ vpsraw($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4401 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4402 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4403 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4404
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4405 instruct vsra16S_reg_imm(vecY dst, vecY src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4406 predicate(UseAVX > 1 && n->as_Vector()->length() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4407 match(Set dst (RShiftVS src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4408 format %{ "vpsraw $dst,$src,$shift\t! arithmetic right shift packed16S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4409 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4410 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4411 __ vpsraw($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4412 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4413 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4414 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4415
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4416 // Integers vector arithmetic right shift
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4417 instruct vsra2I(vecD dst, regF shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4418 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4419 match(Set dst (RShiftVI dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4420 format %{ "psrad $dst,$shift\t! arithmetic right shift packed2I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4421 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4422 __ psrad($dst$$XMMRegister, $shift$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4423 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4424 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4425 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4426
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4427 instruct vsra2I_imm(vecD dst, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4428 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4429 match(Set dst (RShiftVI dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4430 format %{ "psrad $dst,$shift\t! arithmetic right shift packed2I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4431 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4432 __ psrad($dst$$XMMRegister, (int)$shift$$constant);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4433 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4434 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4435 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4436
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4437 instruct vsra2I_reg(vecD dst, vecD src, regF shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4438 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4439 match(Set dst (RShiftVI src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4440 format %{ "vpsrad $dst,$src,$shift\t! arithmetic right shift packed2I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4441 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4442 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4443 __ vpsrad($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4444 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4445 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4446 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4447
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4448 instruct vsra2I_reg_imm(vecD dst, vecD src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4449 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4450 match(Set dst (RShiftVI src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4451 format %{ "vpsrad $dst,$src,$shift\t! arithmetic right shift packed2I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4452 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4453 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4454 __ vpsrad($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4455 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4456 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4457 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4458
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4459 instruct vsra4I(vecX dst, regF shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4460 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4461 match(Set dst (RShiftVI dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4462 format %{ "psrad $dst,$shift\t! arithmetic right shift packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4463 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4464 __ psrad($dst$$XMMRegister, $shift$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4465 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4466 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4467 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4468
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4469 instruct vsra4I_imm(vecX dst, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4470 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4471 match(Set dst (RShiftVI dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4472 format %{ "psrad $dst,$shift\t! arithmetic right shift packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4473 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4474 __ psrad($dst$$XMMRegister, (int)$shift$$constant);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4475 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4476 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4477 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4478
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4479 instruct vsra4I_reg(vecX dst, vecX src, regF shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4480 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4481 match(Set dst (RShiftVI src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4482 format %{ "vpsrad $dst,$src,$shift\t! arithmetic right shift packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4483 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4484 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4485 __ vpsrad($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4486 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4487 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4488 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4489
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4490 instruct vsra4I_reg_imm(vecX dst, vecX src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4491 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4492 match(Set dst (RShiftVI src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4493 format %{ "vpsrad $dst,$src,$shift\t! arithmetic right shift packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4494 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4495 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4496 __ vpsrad($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4497 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4498 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4499 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4500
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4501 instruct vsra8I_reg(vecY dst, vecY src, regF shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4502 predicate(UseAVX > 1 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4503 match(Set dst (RShiftVI src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4504 format %{ "vpsrad $dst,$src,$shift\t! arithmetic right shift packed8I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4505 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4506 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4507 __ vpsrad($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4508 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4509 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4510 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4511
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4512 instruct vsra8I_reg_imm(vecY dst, vecY src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4513 predicate(UseAVX > 1 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4514 match(Set dst (RShiftVI src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4515 format %{ "vpsrad $dst,$src,$shift\t! arithmetic right shift packed8I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4516 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4517 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4518 __ vpsrad($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4519 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4520 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4521 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4522
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4523 // There are no longs vector arithmetic right shift instructions.
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4524
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4525
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4526 // --------------------------------- AND --------------------------------------
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4527
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4528 instruct vand4B(vecS dst, vecS src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4529 predicate(n->as_Vector()->length_in_bytes() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4530 match(Set dst (AndV dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4531 format %{ "pand $dst,$src\t! and vectors (4 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4532 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4533 __ pand($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4534 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4535 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4536 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4537
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4538 instruct vand4B_reg(vecS dst, vecS src1, vecS src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4539 predicate(UseAVX > 0 && n->as_Vector()->length_in_bytes() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4540 match(Set dst (AndV src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4541 format %{ "vpand $dst,$src1,$src2\t! and vectors (4 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4542 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4543 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4544 __ vpand($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4545 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4546 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4547 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4548
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4549 instruct vand8B(vecD dst, vecD src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4550 predicate(n->as_Vector()->length_in_bytes() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4551 match(Set dst (AndV dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4552 format %{ "pand $dst,$src\t! and vectors (8 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4553 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4554 __ pand($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4555 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4556 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4557 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4558
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4559 instruct vand8B_reg(vecD dst, vecD src1, vecD src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4560 predicate(UseAVX > 0 && n->as_Vector()->length_in_bytes() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4561 match(Set dst (AndV src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4562 format %{ "vpand $dst,$src1,$src2\t! and vectors (8 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4563 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4564 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4565 __ vpand($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4566 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4567 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4568 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4569
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4570 instruct vand16B(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4571 predicate(n->as_Vector()->length_in_bytes() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4572 match(Set dst (AndV dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4573 format %{ "pand $dst,$src\t! and vectors (16 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4574 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4575 __ pand($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4576 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4577 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4578 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4579
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4580 instruct vand16B_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4581 predicate(UseAVX > 0 && n->as_Vector()->length_in_bytes() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4582 match(Set dst (AndV src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4583 format %{ "vpand $dst,$src1,$src2\t! and vectors (16 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4584 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4585 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4586 __ vpand($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4587 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4588 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4589 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4590
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4591 instruct vand16B_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4592 predicate(UseAVX > 0 && n->as_Vector()->length_in_bytes() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4593 match(Set dst (AndV src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4594 format %{ "vpand $dst,$src,$mem\t! and vectors (16 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4595 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4596 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4597 __ vpand($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4598 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4599 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4600 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4601
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4602 instruct vand32B_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4603 predicate(UseAVX > 1 && n->as_Vector()->length_in_bytes() == 32);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4604 match(Set dst (AndV src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4605 format %{ "vpand $dst,$src1,$src2\t! and vectors (32 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4606 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4607 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4608 __ vpand($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4609 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4610 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4611 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4612
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4613 instruct vand32B_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4614 predicate(UseAVX > 1 && n->as_Vector()->length_in_bytes() == 32);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4615 match(Set dst (AndV src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4616 format %{ "vpand $dst,$src,$mem\t! and vectors (32 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4617 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4618 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4619 __ vpand($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4620 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4621 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4622 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4623
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4624 // --------------------------------- OR ---------------------------------------
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4625
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4626 instruct vor4B(vecS dst, vecS src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4627 predicate(n->as_Vector()->length_in_bytes() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4628 match(Set dst (OrV dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4629 format %{ "por $dst,$src\t! or vectors (4 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4630 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4631 __ por($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4632 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4633 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4634 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4635
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4636 instruct vor4B_reg(vecS dst, vecS src1, vecS src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4637 predicate(UseAVX > 0 && n->as_Vector()->length_in_bytes() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4638 match(Set dst (OrV src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4639 format %{ "vpor $dst,$src1,$src2\t! or vectors (4 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4640 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4641 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4642 __ vpor($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4643 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4644 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4645 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4646
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4647 instruct vor8B(vecD dst, vecD src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4648 predicate(n->as_Vector()->length_in_bytes() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4649 match(Set dst (OrV dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4650 format %{ "por $dst,$src\t! or vectors (8 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4651 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4652 __ por($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4653 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4654 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4655 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4656
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4657 instruct vor8B_reg(vecD dst, vecD src1, vecD src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4658 predicate(UseAVX > 0 && n->as_Vector()->length_in_bytes() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4659 match(Set dst (OrV src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4660 format %{ "vpor $dst,$src1,$src2\t! or vectors (8 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4661 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4662 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4663 __ vpor($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4664 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4665 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4666 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4667
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4668 instruct vor16B(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4669 predicate(n->as_Vector()->length_in_bytes() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4670 match(Set dst (OrV dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4671 format %{ "por $dst,$src\t! or vectors (16 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4672 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4673 __ por($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4674 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4675 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4676 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4677
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4678 instruct vor16B_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4679 predicate(UseAVX > 0 && n->as_Vector()->length_in_bytes() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4680 match(Set dst (OrV src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4681 format %{ "vpor $dst,$src1,$src2\t! or vectors (16 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4682 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4683 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4684 __ vpor($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4685 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4686 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4687 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4688
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4689 instruct vor16B_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4690 predicate(UseAVX > 0 && n->as_Vector()->length_in_bytes() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4691 match(Set dst (OrV src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4692 format %{ "vpor $dst,$src,$mem\t! or vectors (16 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4693 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4694 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4695 __ vpor($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4696 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4697 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4698 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4699
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4700 instruct vor32B_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4701 predicate(UseAVX > 1 && n->as_Vector()->length_in_bytes() == 32);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4702 match(Set dst (OrV src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4703 format %{ "vpor $dst,$src1,$src2\t! or vectors (32 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4704 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4705 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4706 __ vpor($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4707 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4708 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4709 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4710
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4711 instruct vor32B_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4712 predicate(UseAVX > 1 && n->as_Vector()->length_in_bytes() == 32);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4713 match(Set dst (OrV src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4714 format %{ "vpor $dst,$src,$mem\t! or vectors (32 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4715 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4716 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4717 __ vpor($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4718 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4719 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4720 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4721
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4722 // --------------------------------- XOR --------------------------------------
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4723
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4724 instruct vxor4B(vecS dst, vecS src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4725 predicate(n->as_Vector()->length_in_bytes() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4726 match(Set dst (XorV dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4727 format %{ "pxor $dst,$src\t! xor vectors (4 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4728 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4729 __ pxor($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4730 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4731 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4732 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4733
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4734 instruct vxor4B_reg(vecS dst, vecS src1, vecS src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4735 predicate(UseAVX > 0 && n->as_Vector()->length_in_bytes() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4736 match(Set dst (XorV src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4737 format %{ "vpxor $dst,$src1,$src2\t! xor vectors (4 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4738 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4739 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4740 __ vpxor($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4741 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4742 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4743 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4744
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4745 instruct vxor8B(vecD dst, vecD src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4746 predicate(n->as_Vector()->length_in_bytes() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4747 match(Set dst (XorV dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4748 format %{ "pxor $dst,$src\t! xor vectors (8 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4749 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4750 __ pxor($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4751 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4752 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4753 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4754
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4755 instruct vxor8B_reg(vecD dst, vecD src1, vecD src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4756 predicate(UseAVX > 0 && n->as_Vector()->length_in_bytes() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4757 match(Set dst (XorV src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4758 format %{ "vpxor $dst,$src1,$src2\t! xor vectors (8 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4759 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4760 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4761 __ vpxor($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4762 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4763 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4764 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4765
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4766 instruct vxor16B(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4767 predicate(n->as_Vector()->length_in_bytes() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4768 match(Set dst (XorV dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4769 format %{ "pxor $dst,$src\t! xor vectors (16 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4770 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4771 __ pxor($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4772 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4773 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4774 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4775
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4776 instruct vxor16B_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4777 predicate(UseAVX > 0 && n->as_Vector()->length_in_bytes() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4778 match(Set dst (XorV src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4779 format %{ "vpxor $dst,$src1,$src2\t! xor vectors (16 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4780 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4781 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4782 __ vpxor($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4783 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4784 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4785 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4786
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4787 instruct vxor16B_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4788 predicate(UseAVX > 0 && n->as_Vector()->length_in_bytes() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4789 match(Set dst (XorV src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4790 format %{ "vpxor $dst,$src,$mem\t! xor vectors (16 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4791 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4792 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4793 __ vpxor($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4794 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4795 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4796 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4797
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4798 instruct vxor32B_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4799 predicate(UseAVX > 1 && n->as_Vector()->length_in_bytes() == 32);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4800 match(Set dst (XorV src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4801 format %{ "vpxor $dst,$src1,$src2\t! xor vectors (32 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4802 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4803 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4804 __ vpxor($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4805 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4806 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4807 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4808
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4809 instruct vxor32B_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4810 predicate(UseAVX > 1 && n->as_Vector()->length_in_bytes() == 32);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4811 match(Set dst (XorV src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4812 format %{ "vpxor $dst,$src,$mem\t! xor vectors (32 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4813 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4814 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4815 __ vpxor($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4816 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4817 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4818 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4819

Mercurial > hg > truffle

annotate src/cpu/x86/vm/x86.ad @ 6646:c38f13903fdf