Mercurial > hg > truffle
annotate graal/com.oracle.jvmci.sparc/src/com/oracle/jvmci/sparc/SPARC.java @ 21696:ca140f8c35be
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author | Thomas Wuerthinger <thomas.wuerthinger@oracle.com> |
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date | Wed, 03 Jun 2015 14:08:29 +0200 |
parents | 5024c80224c7 |
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rev | line source |
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1 /* |
15345 | 2 * Copyright (c) 2013, 2014, Oracle and/or its affiliates. All rights reserved. |
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3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
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4 * |
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5 * This code is free software; you can redistribute it and/or modify it |
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6 * under the terms of the GNU General Public License version 2 only, as |
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7 * published by the Free Software Foundation. |
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8 * |
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9 * This code is distributed in the hope that it will be useful, but WITHOUT |
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10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
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11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
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12 * version 2 for more details (a copy is included in the LICENSE file that |
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13 * accompanied this code). |
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14 * |
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15 * You should have received a copy of the GNU General Public License version |
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16 * 2 along with this work; if not, write to the Free Software Foundation, |
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17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. |
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18 * |
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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20 * or visit www.oracle.com if you need additional information or have any |
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21 * questions. |
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22 */ |
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23 package com.oracle.jvmci.sparc; |
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24 |
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25 import com.oracle.jvmci.code.Architecture; |
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26 import com.oracle.jvmci.code.Register; |
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27 import com.oracle.jvmci.code.TargetDescription; |
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28 import com.oracle.jvmci.meta.Kind; |
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29 import com.oracle.jvmci.meta.PlatformKind; |
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30 import static com.oracle.jvmci.code.MemoryBarriers.*; |
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31 |
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32 import java.nio.*; |
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33 import java.util.*; |
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34 |
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35 import com.oracle.jvmci.code.Register.RegisterCategory; |
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36 |
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37 /** |
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38 * Represents the SPARC architecture. |
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39 */ |
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40 public class SPARC extends Architecture { |
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41 |
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42 public static final RegisterCategory CPU = new RegisterCategory("CPU"); |
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43 |
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44 // General purpose registers |
15345 | 45 public static final Register r0 = new Register(0, 0, "g0", CPU); |
46 public static final Register r1 = new Register(1, 1, "g1", CPU); | |
47 public static final Register r2 = new Register(2, 2, "g2", CPU); | |
48 public static final Register r3 = new Register(3, 3, "g3", CPU); | |
49 public static final Register r4 = new Register(4, 4, "g4", CPU); | |
50 public static final Register r5 = new Register(5, 5, "g5", CPU); | |
51 public static final Register r6 = new Register(6, 6, "g6", CPU); | |
52 public static final Register r7 = new Register(7, 7, "g7", CPU); | |
53 | |
54 public static final Register r8 = new Register(8, 8, "o0", CPU); | |
55 public static final Register r9 = new Register(9, 9, "o1", CPU); | |
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56 public static final Register r10 = new Register(10, 10, "o2", CPU); |
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57 public static final Register r11 = new Register(11, 11, "o3", CPU); |
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58 public static final Register r12 = new Register(12, 12, "o4", CPU); |
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59 public static final Register r13 = new Register(13, 13, "o5", CPU); |
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60 public static final Register r14 = new Register(14, 14, "o6", CPU); |
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61 public static final Register r15 = new Register(15, 15, "o7", CPU); |
15345 | 62 |
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63 public static final Register r16 = new Register(16, 16, "l0", CPU); |
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64 public static final Register r17 = new Register(17, 17, "l1", CPU); |
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65 public static final Register r18 = new Register(18, 18, "l2", CPU); |
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66 public static final Register r19 = new Register(19, 19, "l3", CPU); |
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67 public static final Register r20 = new Register(20, 20, "l4", CPU); |
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68 public static final Register r21 = new Register(21, 21, "l5", CPU); |
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69 public static final Register r22 = new Register(22, 22, "l6", CPU); |
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70 public static final Register r23 = new Register(23, 23, "l7", CPU); |
15345 | 71 |
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72 public static final Register r24 = new Register(24, 24, "i0", CPU); |
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73 public static final Register r25 = new Register(25, 25, "i1", CPU); |
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74 public static final Register r26 = new Register(26, 26, "i2", CPU); |
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75 public static final Register r27 = new Register(27, 27, "i3", CPU); |
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76 public static final Register r28 = new Register(28, 28, "i4", CPU); |
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77 public static final Register r29 = new Register(29, 29, "i5", CPU); |
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78 public static final Register r30 = new Register(30, 30, "i6", CPU); |
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79 public static final Register r31 = new Register(31, 31, "i7", CPU); |
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80 |
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81 public static final Register g0 = r0; |
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82 public static final Register g1 = r1; |
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83 public static final Register g2 = r2; |
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84 public static final Register g3 = r3; |
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85 public static final Register g4 = r4; |
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86 public static final Register g5 = r5; |
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87 public static final Register g6 = r6; |
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88 public static final Register g7 = r7; |
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89 |
10459 | 90 public static final Register o0 = r8; |
91 public static final Register o1 = r9; | |
92 public static final Register o2 = r10; | |
93 public static final Register o3 = r11; | |
94 public static final Register o4 = r12; | |
95 public static final Register o5 = r13; | |
96 public static final Register o6 = r14; | |
97 public static final Register o7 = r15; | |
98 | |
99 public static final Register l0 = r16; | |
100 public static final Register l1 = r17; | |
101 public static final Register l2 = r18; | |
102 public static final Register l3 = r19; | |
103 public static final Register l4 = r20; | |
104 public static final Register l5 = r21; | |
105 public static final Register l6 = r22; | |
106 public static final Register l7 = r23; | |
107 | |
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108 public static final Register i0 = r24; |
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109 public static final Register i1 = r25; |
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110 public static final Register i2 = r26; |
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111 public static final Register i3 = r27; |
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112 public static final Register i4 = r28; |
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113 public static final Register i5 = r29; |
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114 public static final Register i6 = r30; |
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115 public static final Register i7 = r31; |
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116 |
10898 | 117 public static final Register sp = o6; |
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119 |
15345 | 120 // @formatter:off |
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121 public static final Register[] cpuRegisters = { |
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122 r0, r1, r2, r3, r4, r5, r6, r7, |
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123 r8, r9, r10, r11, r12, r13, r14, r15, |
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124 r16, r17, r18, r19, r20, r21, r22, r23, |
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125 r24, r25, r26, r27, r28, r29, r30, r31 |
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126 }; |
15345 | 127 // @formatter:on |
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128 |
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129 public static final RegisterCategory FPUs = new RegisterCategory("FPUs", cpuRegisters.length); |
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130 public static final RegisterCategory FPUd = new RegisterCategory("FPUd", cpuRegisters.length + 32); |
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131 |
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132 // Floating point registers |
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133 public static final Register f0 = new Register(32, 0, "f0", FPUs); |
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134 public static final Register f1 = new Register(33, 1, "f1", FPUs); |
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135 public static final Register f2 = new Register(34, 2, "f2", FPUs); |
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136 public static final Register f3 = new Register(35, 3, "f3", FPUs); |
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137 public static final Register f4 = new Register(36, 4, "f4", FPUs); |
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138 public static final Register f5 = new Register(37, 5, "f5", FPUs); |
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139 public static final Register f6 = new Register(38, 6, "f6", FPUs); |
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140 public static final Register f7 = new Register(39, 7, "f7", FPUs); |
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141 |
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142 public static final Register f8 = new Register(40, 8, "f8", FPUs); |
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143 public static final Register f9 = new Register(41, 9, "f9", FPUs); |
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144 public static final Register f10 = new Register(42, 10, "f10", FPUs); |
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145 public static final Register f11 = new Register(43, 11, "f11", FPUs); |
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146 public static final Register f12 = new Register(44, 12, "f12", FPUs); |
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147 public static final Register f13 = new Register(45, 13, "f13", FPUs); |
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148 public static final Register f14 = new Register(46, 14, "f14", FPUs); |
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149 public static final Register f15 = new Register(47, 15, "f15", FPUs); |
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150 |
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151 public static final Register f16 = new Register(48, 16, "f16", FPUs); |
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152 public static final Register f17 = new Register(49, 17, "f17", FPUs); |
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153 public static final Register f18 = new Register(50, 18, "f18", FPUs); |
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154 public static final Register f19 = new Register(51, 19, "f19", FPUs); |
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155 public static final Register f20 = new Register(52, 20, "f20", FPUs); |
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156 public static final Register f21 = new Register(53, 21, "f21", FPUs); |
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157 public static final Register f22 = new Register(54, 22, "f22", FPUs); |
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158 public static final Register f23 = new Register(55, 23, "f23", FPUs); |
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160 public static final Register f24 = new Register(56, 24, "f24", FPUs); |
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161 public static final Register f25 = new Register(57, 25, "f25", FPUs); |
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162 public static final Register f26 = new Register(58, 26, "f26", FPUs); |
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163 public static final Register f27 = new Register(59, 27, "f27", FPUs); |
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164 public static final Register f28 = new Register(60, 28, "f28", FPUs); |
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165 public static final Register f29 = new Register(61, 29, "f29", FPUs); |
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166 public static final Register f30 = new Register(62, 30, "f30", FPUs); |
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167 public static final Register f31 = new Register(63, 31, "f31", FPUs); |
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169 public static final Register d0 = new Register(32, getDoubleEncoding(0), "d0", FPUs); |
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170 public static final Register d2 = new Register(34, getDoubleEncoding(2), "d2", FPUs); |
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171 public static final Register d4 = new Register(36, getDoubleEncoding(4), "d4", FPUs); |
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172 public static final Register d6 = new Register(38, getDoubleEncoding(6), "d6", FPUs); |
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173 public static final Register d8 = new Register(40, getDoubleEncoding(8), "d8", FPUs); |
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174 public static final Register d10 = new Register(42, getDoubleEncoding(10), "d10", FPUs); |
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175 public static final Register d12 = new Register(44, getDoubleEncoding(12), "d12", FPUs); |
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176 public static final Register d14 = new Register(46, getDoubleEncoding(14), "d14", FPUs); |
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177 |
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178 public static final Register d16 = new Register(48, getDoubleEncoding(16), "d16", FPUs); |
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179 public static final Register d18 = new Register(50, getDoubleEncoding(18), "d18", FPUs); |
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180 public static final Register d20 = new Register(52, getDoubleEncoding(20), "d20", FPUs); |
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181 public static final Register d22 = new Register(54, getDoubleEncoding(22), "d22", FPUs); |
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182 public static final Register d24 = new Register(56, getDoubleEncoding(24), "d24", FPUs); |
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183 public static final Register d26 = new Register(58, getDoubleEncoding(26), "d26", FPUs); |
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184 public static final Register d28 = new Register(60, getDoubleEncoding(28), "d28", FPUs); |
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185 public static final Register d30 = new Register(62, getDoubleEncoding(28), "d28", FPUs); |
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187 public static final Register d32 = new Register(64, getDoubleEncoding(32), "d32", FPUd); |
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188 public static final Register d34 = new Register(65, getDoubleEncoding(34), "d34", FPUd); |
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189 public static final Register d36 = new Register(66, getDoubleEncoding(36), "d36", FPUd); |
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190 public static final Register d38 = new Register(67, getDoubleEncoding(38), "d38", FPUd); |
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191 public static final Register d40 = new Register(68, getDoubleEncoding(40), "d40", FPUd); |
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192 public static final Register d42 = new Register(69, getDoubleEncoding(42), "d42", FPUd); |
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193 public static final Register d44 = new Register(70, getDoubleEncoding(44), "d44", FPUd); |
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194 public static final Register d46 = new Register(71, getDoubleEncoding(46), "d46", FPUd); |
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195 |
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196 public static final Register d48 = new Register(72, getDoubleEncoding(48), "d48", FPUd); |
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197 public static final Register d50 = new Register(73, getDoubleEncoding(50), "d50", FPUd); |
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198 public static final Register d52 = new Register(74, getDoubleEncoding(52), "d52", FPUd); |
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199 public static final Register d54 = new Register(75, getDoubleEncoding(54), "d54", FPUd); |
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200 public static final Register d56 = new Register(76, getDoubleEncoding(56), "d56", FPUd); |
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201 public static final Register d58 = new Register(77, getDoubleEncoding(58), "d58", FPUd); |
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202 public static final Register d60 = new Register(78, getDoubleEncoding(60), "d60", FPUd); |
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203 public static final Register d62 = new Register(79, getDoubleEncoding(62), "d62", FPUd); |
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204 |
15345 | 205 // @formatter:off |
206 public static final Register[] fpuRegisters = { | |
207 f0, f1, f2, f3, f4, f5, f6, f7, | |
208 f8, f9, f10, f11, f12, f13, f14, f15, | |
209 f16, f17, f18, f19, f20, f21, f22, f23, | |
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210 f24, f25, f26, f27, f28, f29, f30, f31, |
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211 d32, d34, d36, d38, d40, d42, d44, d46, |
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212 d48, d50, d52, d54, d56, d58, d60, d62 |
15345 | 213 }; |
214 // @formatter:on | |
215 | |
216 // @formatter:off | |
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217 public static final Register[] allRegisters = { |
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218 // CPU |
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219 r0, r1, r2, r3, r4, r5, r6, r7, |
10898 | 220 r8, r9, r10, r11, r12, r13, r14, r15, |
221 r16, r17, r18, r19, r20, r21, r22, r23, | |
222 r24, r25, r26, r27, r28, r29, r30, r31, | |
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223 // FPU |
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224 f0, f1, f2, f3, f4, f5, f6, f7, |
15345 | 225 f8, f9, f10, f11, f12, f13, f14, f15, |
226 f16, f17, f18, f19, f20, f21, f22, f23, | |
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227 f24, f25, f26, f27, f28, f29, f30, f31, |
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228 d32, d34, d36, d38, d40, d42, d44, d46, |
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229 d48, d50, d52, d54, d56, d58, d60, d62 |
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230 }; |
15345 | 231 // @formatter:on |
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232 |
15345 | 233 /** |
234 * Stack bias for stack and frame pointer loads. | |
235 */ | |
236 public static final int STACK_BIAS = 0x7ff; | |
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237 /** |
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238 * In fact there are 64 single floating point registers, 32 of them could be accessed. TODO: |
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239 * Improve handling of these float registers |
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240 */ |
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241 public static final int FLOAT_REGISTER_COUNT = 64; |
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242 |
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243 /** |
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244 * Alignment for valid memory access. |
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245 */ |
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246 public static final int MEMORY_ACCESS_ALIGN = 4; |
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247 |
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248 public final Set<CPUFeature> features; |
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249 |
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250 public SPARC(Set<CPUFeature> features) { |
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251 super("SPARC", 8, ByteOrder.BIG_ENDIAN, false, allRegisters, LOAD_STORE | STORE_STORE, 1, r31.encoding + FLOAT_REGISTER_COUNT + 1, 8); |
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252 this.features = features; |
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253 } |
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254 |
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255 @Override |
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256 public boolean canStoreValue(RegisterCategory category, PlatformKind lirKind) { |
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257 if (!(lirKind instanceof Kind)) { |
10459 | 258 return false; |
259 } | |
260 | |
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261 Kind kind = (Kind) lirKind; |
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262 if (category.equals(CPU)) { |
10459 | 263 switch (kind) { |
264 case Boolean: | |
265 case Byte: | |
266 case Char: | |
267 case Short: | |
268 case Int: | |
269 case Long: | |
270 case Object: | |
271 return true; | |
272 } | |
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273 } else if (category.equals(FPUs) && kind.equals(Kind.Float)) { |
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274 return true; |
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275 } else if (category.equals(FPUd) && kind.equals(Kind.Double)) { |
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276 return true; |
10459 | 277 } |
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278 return false; |
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279 } |
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280 |
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281 @Override |
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282 public PlatformKind getLargestStorableKind(RegisterCategory category) { |
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283 if (category.equals(CPU)) { |
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284 return Kind.Long; |
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285 } else if (category.equals(FPUs)) { |
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286 return Kind.Double; |
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287 } else { |
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288 return Kind.Illegal; |
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289 } |
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290 } |
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291 |
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292 public static int spillSlotSize(TargetDescription td, PlatformKind kind) { |
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293 return Math.max(td.getSizeInBytes(kind), MEMORY_ACCESS_ALIGN); |
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294 } |
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295 |
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296 public static int getDoubleEncoding(int reg) { |
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297 assert reg < 64 && ((reg & 1) == 0); |
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298 // ignore v8 assertion for now |
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299 return (reg & 0x1e) | ((reg & 0x20) >> 5); |
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300 } |
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301 |
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302 public static boolean isCPURegister(Register r) { |
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303 return r.getRegisterCategory().equals(CPU); |
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304 } |
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305 |
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306 public static boolean isCPURegister(Register... regs) { |
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307 for (Register reg : regs) { |
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308 if (!isCPURegister(reg)) { |
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309 return false; |
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310 } |
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311 } |
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312 return true; |
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313 } |
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314 |
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315 public static boolean isSingleFloatRegister(Register r) { |
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316 return r.name.startsWith("f"); |
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317 } |
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318 |
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319 public static boolean isDoubleFloatRegister(Register r) { |
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320 return r.name.startsWith("d"); |
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321 } |
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322 |
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323 public Set<CPUFeature> getFeatures() { |
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324 return features; |
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325 } |
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326 |
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327 public boolean hasFeature(CPUFeature feature) { |
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328 return features.contains(feature); |
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329 } |
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330 |
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331 public enum CPUFeature { |
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332 VIS1, |
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333 VIS2, |
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334 VIS3, |
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335 CBCOND |
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336 } |
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337 } |