Mercurial > hg > truffle
annotate src/share/vm/opto/mulnode.cpp @ 17716:cdb71841f4bc
6498581: ThreadInterruptTest3 produces wrong output on Windows
Summary: There is race condition between os::interrupt and os::is_interrupted on Windows. In JVM_Sleep(Thread.sleep), check if thread gets interrupted, it may see interrupted but not really interrupted so cause spurious waking up (early return from sleep). Fix by checking if interrupt event really gets set thus prevent false return. For intrinsic of _isInterrupted, on Windows, go fastpath only on bit not set.
Reviewed-by: acorn, kvn
Contributed-by: david.holmes@oracle.com, yumin.qi@oracle.com
author | minqi |
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date | Wed, 26 Feb 2014 15:20:41 -0800 |
parents | 67f4c477c9ab |
children | 2113136690bc |
rev | line source |
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0 | 1 /* |
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2 * Copyright (c) 1997, 2012, Oracle and/or its affiliates. All rights reserved. |
0 | 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
4 * | |
5 * This code is free software; you can redistribute it and/or modify it | |
6 * under the terms of the GNU General Public License version 2 only, as | |
7 * published by the Free Software Foundation. | |
8 * | |
9 * This code is distributed in the hope that it will be useful, but WITHOUT | |
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
12 * version 2 for more details (a copy is included in the LICENSE file that | |
13 * accompanied this code). | |
14 * | |
15 * You should have received a copy of the GNU General Public License version | |
16 * 2 along with this work; if not, write to the Free Software Foundation, | |
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
18 * | |
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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20 * or visit www.oracle.com if you need additional information or have any |
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21 * questions. |
0 | 22 * |
23 */ | |
24 | |
1972 | 25 #include "precompiled.hpp" |
26 #include "memory/allocation.inline.hpp" | |
27 #include "opto/addnode.hpp" | |
28 #include "opto/connode.hpp" | |
29 #include "opto/memnode.hpp" | |
30 #include "opto/mulnode.hpp" | |
31 #include "opto/phaseX.hpp" | |
32 #include "opto/subnode.hpp" | |
0 | 33 |
1972 | 34 // Portions of code courtesy of Clifford Click |
0 | 35 |
36 | |
37 //============================================================================= | |
38 //------------------------------hash------------------------------------------- | |
39 // Hash function over MulNodes. Needs to be commutative; i.e., I swap | |
40 // (commute) inputs to MulNodes willy-nilly so the hash function must return | |
41 // the same value in the presence of edge swapping. | |
42 uint MulNode::hash() const { | |
43 return (uintptr_t)in(1) + (uintptr_t)in(2) + Opcode(); | |
44 } | |
45 | |
46 //------------------------------Identity--------------------------------------- | |
47 // Multiplying a one preserves the other argument | |
48 Node *MulNode::Identity( PhaseTransform *phase ) { | |
49 register const Type *one = mul_id(); // The multiplicative identity | |
50 if( phase->type( in(1) )->higher_equal( one ) ) return in(2); | |
51 if( phase->type( in(2) )->higher_equal( one ) ) return in(1); | |
52 | |
53 return this; | |
54 } | |
55 | |
56 //------------------------------Ideal------------------------------------------ | |
57 // We also canonicalize the Node, moving constants to the right input, | |
58 // and flatten expressions (so that 1+x+2 becomes x+3). | |
59 Node *MulNode::Ideal(PhaseGVN *phase, bool can_reshape) { | |
60 const Type *t1 = phase->type( in(1) ); | |
61 const Type *t2 = phase->type( in(2) ); | |
62 Node *progress = NULL; // Progress flag | |
63 // We are OK if right is a constant, or right is a load and | |
64 // left is a non-constant. | |
65 if( !(t2->singleton() || | |
66 (in(2)->is_Load() && !(t1->singleton() || in(1)->is_Load())) ) ) { | |
67 if( t1->singleton() || // Left input is a constant? | |
68 // Otherwise, sort inputs (commutativity) to help value numbering. | |
69 (in(1)->_idx > in(2)->_idx) ) { | |
70 swap_edges(1, 2); | |
71 const Type *t = t1; | |
72 t1 = t2; | |
73 t2 = t; | |
74 progress = this; // Made progress | |
75 } | |
76 } | |
77 | |
78 // If the right input is a constant, and the left input is a product of a | |
79 // constant, flatten the expression tree. | |
80 uint op = Opcode(); | |
81 if( t2->singleton() && // Right input is a constant? | |
82 op != Op_MulF && // Float & double cannot reassociate | |
83 op != Op_MulD ) { | |
84 if( t2 == Type::TOP ) return NULL; | |
85 Node *mul1 = in(1); | |
86 #ifdef ASSERT | |
87 // Check for dead loop | |
88 int op1 = mul1->Opcode(); | |
89 if( phase->eqv( mul1, this ) || phase->eqv( in(2), this ) || | |
90 ( op1 == mul_opcode() || op1 == add_opcode() ) && | |
91 ( phase->eqv( mul1->in(1), this ) || phase->eqv( mul1->in(2), this ) || | |
92 phase->eqv( mul1->in(1), mul1 ) || phase->eqv( mul1->in(2), mul1 ) ) ) | |
93 assert(false, "dead loop in MulNode::Ideal"); | |
94 #endif | |
95 | |
96 if( mul1->Opcode() == mul_opcode() ) { // Left input is a multiply? | |
97 // Mul of a constant? | |
98 const Type *t12 = phase->type( mul1->in(2) ); | |
99 if( t12->singleton() && t12 != Type::TOP) { // Left input is an add of a constant? | |
100 // Compute new constant; check for overflow | |
3842 | 101 const Type *tcon01 = ((MulNode*)mul1)->mul_ring(t2,t12); |
0 | 102 if( tcon01->singleton() ) { |
103 // The Mul of the flattened expression | |
104 set_req(1, mul1->in(1)); | |
105 set_req(2, phase->makecon( tcon01 )); | |
106 t2 = tcon01; | |
107 progress = this; // Made progress | |
108 } | |
109 } | |
110 } | |
111 // If the right input is a constant, and the left input is an add of a | |
112 // constant, flatten the tree: (X+con1)*con0 ==> X*con0 + con1*con0 | |
113 const Node *add1 = in(1); | |
114 if( add1->Opcode() == add_opcode() ) { // Left input is an add? | |
115 // Add of a constant? | |
116 const Type *t12 = phase->type( add1->in(2) ); | |
117 if( t12->singleton() && t12 != Type::TOP ) { // Left input is an add of a constant? | |
118 assert( add1->in(1) != add1, "dead loop in MulNode::Ideal" ); | |
119 // Compute new constant; check for overflow | |
120 const Type *tcon01 = mul_ring(t2,t12); | |
121 if( tcon01->singleton() ) { | |
122 | |
123 // Convert (X+con1)*con0 into X*con0 | |
124 Node *mul = clone(); // mul = ()*con0 | |
125 mul->set_req(1,add1->in(1)); // mul = X*con0 | |
126 mul = phase->transform(mul); | |
127 | |
128 Node *add2 = add1->clone(); | |
129 add2->set_req(1, mul); // X*con0 + con0*con1 | |
130 add2->set_req(2, phase->makecon(tcon01) ); | |
131 progress = add2; | |
132 } | |
133 } | |
134 } // End of is left input an add | |
135 } // End of is right input a Mul | |
136 | |
137 return progress; | |
138 } | |
139 | |
140 //------------------------------Value----------------------------------------- | |
141 const Type *MulNode::Value( PhaseTransform *phase ) const { | |
142 const Type *t1 = phase->type( in(1) ); | |
143 const Type *t2 = phase->type( in(2) ); | |
144 // Either input is TOP ==> the result is TOP | |
145 if( t1 == Type::TOP ) return Type::TOP; | |
146 if( t2 == Type::TOP ) return Type::TOP; | |
147 | |
148 // Either input is ZERO ==> the result is ZERO. | |
149 // Not valid for floats or doubles since +0.0 * -0.0 --> +0.0 | |
150 int op = Opcode(); | |
151 if( op == Op_MulI || op == Op_AndI || op == Op_MulL || op == Op_AndL ) { | |
152 const Type *zero = add_id(); // The multiplicative zero | |
153 if( t1->higher_equal( zero ) ) return zero; | |
154 if( t2->higher_equal( zero ) ) return zero; | |
155 } | |
156 | |
157 // Either input is BOTTOM ==> the result is the local BOTTOM | |
158 if( t1 == Type::BOTTOM || t2 == Type::BOTTOM ) | |
159 return bottom_type(); | |
160 | |
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161 #if defined(IA32) |
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162 // Can't trust native compilers to properly fold strict double |
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163 // multiplication with round-to-zero on this platform. |
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164 if (op == Op_MulD && phase->C->method()->is_strict()) { |
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165 return TypeD::DOUBLE; |
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166 } |
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167 #endif |
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168 |
0 | 169 return mul_ring(t1,t2); // Local flavor of type multiplication |
170 } | |
171 | |
172 | |
173 //============================================================================= | |
174 //------------------------------Ideal------------------------------------------ | |
175 // Check for power-of-2 multiply, then try the regular MulNode::Ideal | |
176 Node *MulINode::Ideal(PhaseGVN *phase, bool can_reshape) { | |
177 // Swap constant to right | |
178 jint con; | |
179 if ((con = in(1)->find_int_con(0)) != 0) { | |
180 swap_edges(1, 2); | |
181 // Finish rest of method to use info in 'con' | |
182 } else if ((con = in(2)->find_int_con(0)) == 0) { | |
183 return MulNode::Ideal(phase, can_reshape); | |
184 } | |
185 | |
186 // Now we have a constant Node on the right and the constant in con | |
187 if( con == 0 ) return NULL; // By zero is handled by Value call | |
188 if( con == 1 ) return NULL; // By one is handled by Identity call | |
189 | |
190 // Check for negative constant; if so negate the final result | |
191 bool sign_flip = false; | |
192 if( con < 0 ) { | |
193 con = -con; | |
194 sign_flip = true; | |
195 } | |
196 | |
197 // Get low bit; check for being the only bit | |
198 Node *res = NULL; | |
199 jint bit1 = con & -con; // Extract low bit | |
200 if( bit1 == con ) { // Found a power of 2? | |
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201 res = new (phase->C) LShiftINode( in(1), phase->intcon(log2_intptr(bit1)) ); |
0 | 202 } else { |
203 | |
204 // Check for constant with 2 bits set | |
205 jint bit2 = con-bit1; | |
206 bit2 = bit2 & -bit2; // Extract 2nd bit | |
207 if( bit2 + bit1 == con ) { // Found all bits in con? | |
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208 Node *n1 = phase->transform( new (phase->C) LShiftINode( in(1), phase->intcon(log2_intptr(bit1)) ) ); |
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209 Node *n2 = phase->transform( new (phase->C) LShiftINode( in(1), phase->intcon(log2_intptr(bit2)) ) ); |
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210 res = new (phase->C) AddINode( n2, n1 ); |
0 | 211 |
212 } else if (is_power_of_2(con+1)) { | |
213 // Sleezy: power-of-2 -1. Next time be generic. | |
214 jint temp = (jint) (con + 1); | |
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215 Node *n1 = phase->transform( new (phase->C) LShiftINode( in(1), phase->intcon(log2_intptr(temp)) ) ); |
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216 res = new (phase->C) SubINode( n1, in(1) ); |
0 | 217 } else { |
218 return MulNode::Ideal(phase, can_reshape); | |
219 } | |
220 } | |
221 | |
222 if( sign_flip ) { // Need to negate result? | |
223 res = phase->transform(res);// Transform, before making the zero con | |
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224 res = new (phase->C) SubINode(phase->intcon(0),res); |
0 | 225 } |
226 | |
227 return res; // Return final result | |
228 } | |
229 | |
230 //------------------------------mul_ring--------------------------------------- | |
231 // Compute the product type of two integer ranges into this node. | |
232 const Type *MulINode::mul_ring(const Type *t0, const Type *t1) const { | |
233 const TypeInt *r0 = t0->is_int(); // Handy access | |
234 const TypeInt *r1 = t1->is_int(); | |
235 | |
236 // Fetch endpoints of all ranges | |
237 int32 lo0 = r0->_lo; | |
238 double a = (double)lo0; | |
239 int32 hi0 = r0->_hi; | |
240 double b = (double)hi0; | |
241 int32 lo1 = r1->_lo; | |
242 double c = (double)lo1; | |
243 int32 hi1 = r1->_hi; | |
244 double d = (double)hi1; | |
245 | |
246 // Compute all endpoints & check for overflow | |
247 int32 A = lo0*lo1; | |
248 if( (double)A != a*c ) return TypeInt::INT; // Overflow? | |
249 int32 B = lo0*hi1; | |
250 if( (double)B != a*d ) return TypeInt::INT; // Overflow? | |
251 int32 C = hi0*lo1; | |
252 if( (double)C != b*c ) return TypeInt::INT; // Overflow? | |
253 int32 D = hi0*hi1; | |
254 if( (double)D != b*d ) return TypeInt::INT; // Overflow? | |
255 | |
256 if( A < B ) { lo0 = A; hi0 = B; } // Sort range endpoints | |
257 else { lo0 = B; hi0 = A; } | |
258 if( C < D ) { | |
259 if( C < lo0 ) lo0 = C; | |
260 if( D > hi0 ) hi0 = D; | |
261 } else { | |
262 if( D < lo0 ) lo0 = D; | |
263 if( C > hi0 ) hi0 = C; | |
264 } | |
265 return TypeInt::make(lo0, hi0, MAX2(r0->_widen,r1->_widen)); | |
266 } | |
267 | |
268 | |
269 //============================================================================= | |
270 //------------------------------Ideal------------------------------------------ | |
271 // Check for power-of-2 multiply, then try the regular MulNode::Ideal | |
272 Node *MulLNode::Ideal(PhaseGVN *phase, bool can_reshape) { | |
273 // Swap constant to right | |
274 jlong con; | |
275 if ((con = in(1)->find_long_con(0)) != 0) { | |
276 swap_edges(1, 2); | |
277 // Finish rest of method to use info in 'con' | |
278 } else if ((con = in(2)->find_long_con(0)) == 0) { | |
279 return MulNode::Ideal(phase, can_reshape); | |
280 } | |
281 | |
282 // Now we have a constant Node on the right and the constant in con | |
283 if( con == CONST64(0) ) return NULL; // By zero is handled by Value call | |
284 if( con == CONST64(1) ) return NULL; // By one is handled by Identity call | |
285 | |
286 // Check for negative constant; if so negate the final result | |
287 bool sign_flip = false; | |
288 if( con < 0 ) { | |
289 con = -con; | |
290 sign_flip = true; | |
291 } | |
292 | |
293 // Get low bit; check for being the only bit | |
294 Node *res = NULL; | |
295 jlong bit1 = con & -con; // Extract low bit | |
296 if( bit1 == con ) { // Found a power of 2? | |
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297 res = new (phase->C) LShiftLNode( in(1), phase->intcon(log2_long(bit1)) ); |
0 | 298 } else { |
299 | |
300 // Check for constant with 2 bits set | |
301 jlong bit2 = con-bit1; | |
302 bit2 = bit2 & -bit2; // Extract 2nd bit | |
303 if( bit2 + bit1 == con ) { // Found all bits in con? | |
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304 Node *n1 = phase->transform( new (phase->C) LShiftLNode( in(1), phase->intcon(log2_long(bit1)) ) ); |
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305 Node *n2 = phase->transform( new (phase->C) LShiftLNode( in(1), phase->intcon(log2_long(bit2)) ) ); |
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306 res = new (phase->C) AddLNode( n2, n1 ); |
0 | 307 |
308 } else if (is_power_of_2_long(con+1)) { | |
309 // Sleezy: power-of-2 -1. Next time be generic. | |
310 jlong temp = (jlong) (con + 1); | |
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311 Node *n1 = phase->transform( new (phase->C) LShiftLNode( in(1), phase->intcon(log2_long(temp)) ) ); |
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312 res = new (phase->C) SubLNode( n1, in(1) ); |
0 | 313 } else { |
314 return MulNode::Ideal(phase, can_reshape); | |
315 } | |
316 } | |
317 | |
318 if( sign_flip ) { // Need to negate result? | |
319 res = phase->transform(res);// Transform, before making the zero con | |
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320 res = new (phase->C) SubLNode(phase->longcon(0),res); |
0 | 321 } |
322 | |
323 return res; // Return final result | |
324 } | |
325 | |
326 //------------------------------mul_ring--------------------------------------- | |
327 // Compute the product type of two integer ranges into this node. | |
328 const Type *MulLNode::mul_ring(const Type *t0, const Type *t1) const { | |
329 const TypeLong *r0 = t0->is_long(); // Handy access | |
330 const TypeLong *r1 = t1->is_long(); | |
331 | |
332 // Fetch endpoints of all ranges | |
333 jlong lo0 = r0->_lo; | |
334 double a = (double)lo0; | |
335 jlong hi0 = r0->_hi; | |
336 double b = (double)hi0; | |
337 jlong lo1 = r1->_lo; | |
338 double c = (double)lo1; | |
339 jlong hi1 = r1->_hi; | |
340 double d = (double)hi1; | |
341 | |
342 // Compute all endpoints & check for overflow | |
343 jlong A = lo0*lo1; | |
344 if( (double)A != a*c ) return TypeLong::LONG; // Overflow? | |
345 jlong B = lo0*hi1; | |
346 if( (double)B != a*d ) return TypeLong::LONG; // Overflow? | |
347 jlong C = hi0*lo1; | |
348 if( (double)C != b*c ) return TypeLong::LONG; // Overflow? | |
349 jlong D = hi0*hi1; | |
350 if( (double)D != b*d ) return TypeLong::LONG; // Overflow? | |
351 | |
352 if( A < B ) { lo0 = A; hi0 = B; } // Sort range endpoints | |
353 else { lo0 = B; hi0 = A; } | |
354 if( C < D ) { | |
355 if( C < lo0 ) lo0 = C; | |
356 if( D > hi0 ) hi0 = D; | |
357 } else { | |
358 if( D < lo0 ) lo0 = D; | |
359 if( C > hi0 ) hi0 = C; | |
360 } | |
361 return TypeLong::make(lo0, hi0, MAX2(r0->_widen,r1->_widen)); | |
362 } | |
363 | |
364 //============================================================================= | |
365 //------------------------------mul_ring--------------------------------------- | |
366 // Compute the product type of two double ranges into this node. | |
367 const Type *MulFNode::mul_ring(const Type *t0, const Type *t1) const { | |
368 if( t0 == Type::FLOAT || t1 == Type::FLOAT ) return Type::FLOAT; | |
369 return TypeF::make( t0->getf() * t1->getf() ); | |
370 } | |
371 | |
372 //============================================================================= | |
373 //------------------------------mul_ring--------------------------------------- | |
374 // Compute the product type of two double ranges into this node. | |
375 const Type *MulDNode::mul_ring(const Type *t0, const Type *t1) const { | |
376 if( t0 == Type::DOUBLE || t1 == Type::DOUBLE ) return Type::DOUBLE; | |
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377 // We must be multiplying 2 double constants. |
0 | 378 return TypeD::make( t0->getd() * t1->getd() ); |
379 } | |
380 | |
381 //============================================================================= | |
145 | 382 //------------------------------Value------------------------------------------ |
383 const Type *MulHiLNode::Value( PhaseTransform *phase ) const { | |
384 // Either input is TOP ==> the result is TOP | |
385 const Type *t1 = phase->type( in(1) ); | |
386 const Type *t2 = phase->type( in(2) ); | |
387 if( t1 == Type::TOP ) return Type::TOP; | |
388 if( t2 == Type::TOP ) return Type::TOP; | |
389 | |
390 // Either input is BOTTOM ==> the result is the local BOTTOM | |
391 const Type *bot = bottom_type(); | |
392 if( (t1 == bot) || (t2 == bot) || | |
393 (t1 == Type::BOTTOM) || (t2 == Type::BOTTOM) ) | |
394 return bot; | |
395 | |
396 // It is not worth trying to constant fold this stuff! | |
397 return TypeLong::LONG; | |
398 } | |
399 | |
400 //============================================================================= | |
0 | 401 //------------------------------mul_ring--------------------------------------- |
402 // Supplied function returns the product of the inputs IN THE CURRENT RING. | |
403 // For the logical operations the ring's MUL is really a logical AND function. | |
404 // This also type-checks the inputs for sanity. Guaranteed never to | |
405 // be passed a TOP or BOTTOM type, these are filtered out by pre-check. | |
406 const Type *AndINode::mul_ring( const Type *t0, const Type *t1 ) const { | |
407 const TypeInt *r0 = t0->is_int(); // Handy access | |
408 const TypeInt *r1 = t1->is_int(); | |
409 int widen = MAX2(r0->_widen,r1->_widen); | |
410 | |
411 // If either input is a constant, might be able to trim cases | |
412 if( !r0->is_con() && !r1->is_con() ) | |
413 return TypeInt::INT; // No constants to be had | |
414 | |
415 // Both constants? Return bits | |
416 if( r0->is_con() && r1->is_con() ) | |
417 return TypeInt::make( r0->get_con() & r1->get_con() ); | |
418 | |
419 if( r0->is_con() && r0->get_con() > 0 ) | |
420 return TypeInt::make(0, r0->get_con(), widen); | |
421 | |
422 if( r1->is_con() && r1->get_con() > 0 ) | |
423 return TypeInt::make(0, r1->get_con(), widen); | |
424 | |
425 if( r0 == TypeInt::BOOL || r1 == TypeInt::BOOL ) { | |
426 return TypeInt::BOOL; | |
427 } | |
428 | |
429 return TypeInt::INT; // No constants to be had | |
430 } | |
431 | |
432 //------------------------------Identity--------------------------------------- | |
433 // Masking off the high bits of an unsigned load is not required | |
434 Node *AndINode::Identity( PhaseTransform *phase ) { | |
435 | |
436 // x & x => x | |
437 if (phase->eqv(in(1), in(2))) return in(1); | |
438 | |
824 | 439 Node* in1 = in(1); |
440 uint op = in1->Opcode(); | |
441 const TypeInt* t2 = phase->type(in(2))->isa_int(); | |
442 if (t2 && t2->is_con()) { | |
0 | 443 int con = t2->get_con(); |
444 // Masking off high bits which are always zero is useless. | |
445 const TypeInt* t1 = phase->type( in(1) )->isa_int(); | |
446 if (t1 != NULL && t1->_lo >= 0) { | |
824 | 447 jint t1_support = right_n_bits(1 + log2_intptr(t1->_hi)); |
0 | 448 if ((t1_support & con) == t1_support) |
824 | 449 return in1; |
0 | 450 } |
451 // Masking off the high bits of a unsigned-shift-right is not | |
452 // needed either. | |
824 | 453 if (op == Op_URShiftI) { |
454 const TypeInt* t12 = phase->type(in1->in(2))->isa_int(); | |
455 if (t12 && t12->is_con()) { // Shift is by a constant | |
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456 int shift = t12->get_con(); |
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457 shift &= BitsPerJavaInteger - 1; // semantics of Java shifts |
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458 int mask = max_juint >> shift; |
824 | 459 if ((mask & con) == mask) // If AND is useless, skip it |
460 return in1; | |
0 | 461 } |
462 } | |
463 } | |
464 return MulNode::Identity(phase); | |
465 } | |
466 | |
467 //------------------------------Ideal------------------------------------------ | |
468 Node *AndINode::Ideal(PhaseGVN *phase, bool can_reshape) { | |
469 // Special case constant AND mask | |
470 const TypeInt *t2 = phase->type( in(2) )->isa_int(); | |
471 if( !t2 || !t2->is_con() ) return MulNode::Ideal(phase, can_reshape); | |
472 const int mask = t2->get_con(); | |
473 Node *load = in(1); | |
474 uint lop = load->Opcode(); | |
475 | |
476 // Masking bits off of a Character? Hi bits are already zero. | |
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477 if( lop == Op_LoadUS && |
0 | 478 (mask & 0xFFFF0000) ) // Can we make a smaller mask? |
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479 return new (phase->C) AndINode(load,phase->intcon(mask&0xFFFF)); |
0 | 480 |
481 // Masking bits off of a Short? Loading a Character does some masking | |
6891 | 482 if (can_reshape && |
483 load->outcnt() == 1 && load->unique_out() == this) { | |
484 if (lop == Op_LoadS && (mask & 0xFFFF0000) == 0 ) { | |
485 Node *ldus = new (phase->C) LoadUSNode(load->in(MemNode::Control), | |
486 load->in(MemNode::Memory), | |
487 load->in(MemNode::Address), | |
488 load->adr_type()); | |
489 ldus = phase->transform(ldus); | |
490 return new (phase->C) AndINode(ldus, phase->intcon(mask & 0xFFFF)); | |
491 } | |
0 | 492 |
6891 | 493 // Masking sign bits off of a Byte? Do an unsigned byte load plus |
494 // an and. | |
495 if (lop == Op_LoadB && (mask & 0xFFFFFF00) == 0) { | |
496 Node* ldub = new (phase->C) LoadUBNode(load->in(MemNode::Control), | |
497 load->in(MemNode::Memory), | |
498 load->in(MemNode::Address), | |
499 load->adr_type()); | |
500 ldub = phase->transform(ldub); | |
501 return new (phase->C) AndINode(ldub, phase->intcon(mask)); | |
502 } | |
0 | 503 } |
504 | |
505 // Masking off sign bits? Dont make them! | |
506 if( lop == Op_RShiftI ) { | |
507 const TypeInt *t12 = phase->type(load->in(2))->isa_int(); | |
508 if( t12 && t12->is_con() ) { // Shift is by a constant | |
509 int shift = t12->get_con(); | |
510 shift &= BitsPerJavaInteger-1; // semantics of Java shifts | |
511 const int sign_bits_mask = ~right_n_bits(BitsPerJavaInteger - shift); | |
512 // If the AND'ing of the 2 masks has no bits, then only original shifted | |
513 // bits survive. NO sign-extension bits survive the maskings. | |
514 if( (sign_bits_mask & mask) == 0 ) { | |
515 // Use zero-fill shift instead | |
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516 Node *zshift = phase->transform(new (phase->C) URShiftINode(load->in(1),load->in(2))); |
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517 return new (phase->C) AndINode( zshift, in(2) ); |
0 | 518 } |
519 } | |
520 } | |
521 | |
522 // Check for 'negate/and-1', a pattern emitted when someone asks for | |
523 // 'mod 2'. Negate leaves the low order bit unchanged (think: complement | |
524 // plus 1) and the mask is of the low order bit. Skip the negate. | |
525 if( lop == Op_SubI && mask == 1 && load->in(1) && | |
526 phase->type(load->in(1)) == TypeInt::ZERO ) | |
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527 return new (phase->C) AndINode( load->in(2), in(2) ); |
0 | 528 |
529 return MulNode::Ideal(phase, can_reshape); | |
530 } | |
531 | |
532 //============================================================================= | |
533 //------------------------------mul_ring--------------------------------------- | |
534 // Supplied function returns the product of the inputs IN THE CURRENT RING. | |
535 // For the logical operations the ring's MUL is really a logical AND function. | |
536 // This also type-checks the inputs for sanity. Guaranteed never to | |
537 // be passed a TOP or BOTTOM type, these are filtered out by pre-check. | |
538 const Type *AndLNode::mul_ring( const Type *t0, const Type *t1 ) const { | |
539 const TypeLong *r0 = t0->is_long(); // Handy access | |
540 const TypeLong *r1 = t1->is_long(); | |
541 int widen = MAX2(r0->_widen,r1->_widen); | |
542 | |
543 // If either input is a constant, might be able to trim cases | |
544 if( !r0->is_con() && !r1->is_con() ) | |
545 return TypeLong::LONG; // No constants to be had | |
546 | |
547 // Both constants? Return bits | |
548 if( r0->is_con() && r1->is_con() ) | |
549 return TypeLong::make( r0->get_con() & r1->get_con() ); | |
550 | |
551 if( r0->is_con() && r0->get_con() > 0 ) | |
552 return TypeLong::make(CONST64(0), r0->get_con(), widen); | |
553 | |
554 if( r1->is_con() && r1->get_con() > 0 ) | |
555 return TypeLong::make(CONST64(0), r1->get_con(), widen); | |
556 | |
557 return TypeLong::LONG; // No constants to be had | |
558 } | |
559 | |
560 //------------------------------Identity--------------------------------------- | |
561 // Masking off the high bits of an unsigned load is not required | |
562 Node *AndLNode::Identity( PhaseTransform *phase ) { | |
563 | |
564 // x & x => x | |
565 if (phase->eqv(in(1), in(2))) return in(1); | |
566 | |
567 Node *usr = in(1); | |
568 const TypeLong *t2 = phase->type( in(2) )->isa_long(); | |
569 if( t2 && t2->is_con() ) { | |
570 jlong con = t2->get_con(); | |
571 // Masking off high bits which are always zero is useless. | |
572 const TypeLong* t1 = phase->type( in(1) )->isa_long(); | |
573 if (t1 != NULL && t1->_lo >= 0) { | |
574 jlong t1_support = ((jlong)1 << (1 + log2_long(t1->_hi))) - 1; | |
575 if ((t1_support & con) == t1_support) | |
576 return usr; | |
577 } | |
578 uint lop = usr->Opcode(); | |
579 // Masking off the high bits of a unsigned-shift-right is not | |
580 // needed either. | |
581 if( lop == Op_URShiftL ) { | |
582 const TypeInt *t12 = phase->type( usr->in(2) )->isa_int(); | |
559
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583 if( t12 && t12->is_con() ) { // Shift is by a constant |
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584 int shift = t12->get_con(); |
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585 shift &= BitsPerJavaLong - 1; // semantics of Java shifts |
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586 jlong mask = max_julong >> shift; |
0 | 587 if( (mask&con) == mask ) // If AND is useless, skip it |
588 return usr; | |
589 } | |
590 } | |
591 } | |
592 return MulNode::Identity(phase); | |
593 } | |
594 | |
595 //------------------------------Ideal------------------------------------------ | |
596 Node *AndLNode::Ideal(PhaseGVN *phase, bool can_reshape) { | |
597 // Special case constant AND mask | |
598 const TypeLong *t2 = phase->type( in(2) )->isa_long(); | |
599 if( !t2 || !t2->is_con() ) return MulNode::Ideal(phase, can_reshape); | |
600 const jlong mask = t2->get_con(); | |
601 | |
624 | 602 Node* in1 = in(1); |
603 uint op = in1->Opcode(); | |
604 | |
824 | 605 // Are we masking a long that was converted from an int with a mask |
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606 // that fits in 32-bits? Commute them and use an AndINode. Don't |
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607 // convert masks which would cause a sign extension of the integer |
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608 // value. This check includes UI2L masks (0x00000000FFFFFFFF) which |
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609 // would be optimized away later in Identity. |
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610 if (op == Op_ConvI2L && (mask & CONST64(0xFFFFFFFF80000000)) == 0) { |
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611 Node* andi = new (phase->C) AndINode(in1->in(1), phase->intcon(mask)); |
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612 andi = phase->transform(andi); |
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613 return new (phase->C) ConvI2LNode(andi); |
824 | 614 } |
615 | |
0 | 616 // Masking off sign bits? Dont make them! |
624 | 617 if (op == Op_RShiftL) { |
824 | 618 const TypeInt* t12 = phase->type(in1->in(2))->isa_int(); |
0 | 619 if( t12 && t12->is_con() ) { // Shift is by a constant |
620 int shift = t12->get_con(); | |
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621 shift &= BitsPerJavaLong - 1; // semantics of Java shifts |
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622 const jlong sign_bits_mask = ~(((jlong)CONST64(1) << (jlong)(BitsPerJavaLong - shift)) -1); |
0 | 623 // If the AND'ing of the 2 masks has no bits, then only original shifted |
624 // bits survive. NO sign-extension bits survive the maskings. | |
625 if( (sign_bits_mask & mask) == 0 ) { | |
626 // Use zero-fill shift instead | |
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627 Node *zshift = phase->transform(new (phase->C) URShiftLNode(in1->in(1), in1->in(2))); |
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628 return new (phase->C) AndLNode(zshift, in(2)); |
0 | 629 } |
630 } | |
631 } | |
632 | |
633 return MulNode::Ideal(phase, can_reshape); | |
634 } | |
635 | |
636 //============================================================================= | |
637 //------------------------------Identity--------------------------------------- | |
638 Node *LShiftINode::Identity( PhaseTransform *phase ) { | |
639 const TypeInt *ti = phase->type( in(2) )->isa_int(); // shift count is an int | |
640 return ( ti && ti->is_con() && ( ti->get_con() & ( BitsPerInt - 1 ) ) == 0 ) ? in(1) : this; | |
641 } | |
642 | |
643 //------------------------------Ideal------------------------------------------ | |
644 // If the right input is a constant, and the left input is an add of a | |
645 // constant, flatten the tree: (X+con1)<<con0 ==> X<<con0 + con1<<con0 | |
646 Node *LShiftINode::Ideal(PhaseGVN *phase, bool can_reshape) { | |
647 const Type *t = phase->type( in(2) ); | |
648 if( t == Type::TOP ) return NULL; // Right input is dead | |
649 const TypeInt *t2 = t->isa_int(); | |
650 if( !t2 || !t2->is_con() ) return NULL; // Right input is a constant | |
651 const int con = t2->get_con() & ( BitsPerInt - 1 ); // masked shift count | |
652 | |
653 if ( con == 0 ) return NULL; // let Identity() handle 0 shift count | |
654 | |
655 // Left input is an add of a constant? | |
656 Node *add1 = in(1); | |
657 int add1_op = add1->Opcode(); | |
658 if( add1_op == Op_AddI ) { // Left input is an add? | |
659 assert( add1 != add1->in(1), "dead loop in LShiftINode::Ideal" ); | |
660 const TypeInt *t12 = phase->type(add1->in(2))->isa_int(); | |
661 if( t12 && t12->is_con() ){ // Left input is an add of a con? | |
662 // Transform is legal, but check for profit. Avoid breaking 'i2s' | |
663 // and 'i2b' patterns which typically fold into 'StoreC/StoreB'. | |
664 if( con < 16 ) { | |
665 // Compute X << con0 | |
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666 Node *lsh = phase->transform( new (phase->C) LShiftINode( add1->in(1), in(2) ) ); |
0 | 667 // Compute X<<con0 + (con1<<con0) |
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668 return new (phase->C) AddINode( lsh, phase->intcon(t12->get_con() << con)); |
0 | 669 } |
670 } | |
671 } | |
672 | |
673 // Check for "(x>>c0)<<c0" which just masks off low bits | |
674 if( (add1_op == Op_RShiftI || add1_op == Op_URShiftI ) && | |
675 add1->in(2) == in(2) ) | |
676 // Convert to "(x & -(1<<c0))" | |
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677 return new (phase->C) AndINode(add1->in(1),phase->intcon( -(1<<con))); |
0 | 678 |
679 // Check for "((x>>c0) & Y)<<c0" which just masks off more low bits | |
680 if( add1_op == Op_AndI ) { | |
681 Node *add2 = add1->in(1); | |
682 int add2_op = add2->Opcode(); | |
683 if( (add2_op == Op_RShiftI || add2_op == Op_URShiftI ) && | |
684 add2->in(2) == in(2) ) { | |
685 // Convert to "(x & (Y<<c0))" | |
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686 Node *y_sh = phase->transform( new (phase->C) LShiftINode( add1->in(2), in(2) ) ); |
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687 return new (phase->C) AndINode( add2->in(1), y_sh ); |
0 | 688 } |
689 } | |
690 | |
691 // Check for ((x & ((1<<(32-c0))-1)) << c0) which ANDs off high bits | |
692 // before shifting them away. | |
693 const jint bits_mask = right_n_bits(BitsPerJavaInteger-con); | |
694 if( add1_op == Op_AndI && | |
695 phase->type(add1->in(2)) == TypeInt::make( bits_mask ) ) | |
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696 return new (phase->C) LShiftINode( add1->in(1), in(2) ); |
0 | 697 |
698 return NULL; | |
699 } | |
700 | |
701 //------------------------------Value------------------------------------------ | |
702 // A LShiftINode shifts its input2 left by input1 amount. | |
703 const Type *LShiftINode::Value( PhaseTransform *phase ) const { | |
704 const Type *t1 = phase->type( in(1) ); | |
705 const Type *t2 = phase->type( in(2) ); | |
706 // Either input is TOP ==> the result is TOP | |
707 if( t1 == Type::TOP ) return Type::TOP; | |
708 if( t2 == Type::TOP ) return Type::TOP; | |
709 | |
710 // Left input is ZERO ==> the result is ZERO. | |
711 if( t1 == TypeInt::ZERO ) return TypeInt::ZERO; | |
712 // Shift by zero does nothing | |
713 if( t2 == TypeInt::ZERO ) return t1; | |
714 | |
715 // Either input is BOTTOM ==> the result is BOTTOM | |
716 if( (t1 == TypeInt::INT) || (t2 == TypeInt::INT) || | |
717 (t1 == Type::BOTTOM) || (t2 == Type::BOTTOM) ) | |
718 return TypeInt::INT; | |
719 | |
720 const TypeInt *r1 = t1->is_int(); // Handy access | |
721 const TypeInt *r2 = t2->is_int(); // Handy access | |
722 | |
723 if (!r2->is_con()) | |
724 return TypeInt::INT; | |
725 | |
726 uint shift = r2->get_con(); | |
727 shift &= BitsPerJavaInteger-1; // semantics of Java shifts | |
728 // Shift by a multiple of 32 does nothing: | |
729 if (shift == 0) return t1; | |
730 | |
731 // If the shift is a constant, shift the bounds of the type, | |
732 // unless this could lead to an overflow. | |
733 if (!r1->is_con()) { | |
734 jint lo = r1->_lo, hi = r1->_hi; | |
735 if (((lo << shift) >> shift) == lo && | |
736 ((hi << shift) >> shift) == hi) { | |
737 // No overflow. The range shifts up cleanly. | |
738 return TypeInt::make((jint)lo << (jint)shift, | |
739 (jint)hi << (jint)shift, | |
740 MAX2(r1->_widen,r2->_widen)); | |
741 } | |
742 return TypeInt::INT; | |
743 } | |
744 | |
745 return TypeInt::make( (jint)r1->get_con() << (jint)shift ); | |
746 } | |
747 | |
748 //============================================================================= | |
749 //------------------------------Identity--------------------------------------- | |
750 Node *LShiftLNode::Identity( PhaseTransform *phase ) { | |
751 const TypeInt *ti = phase->type( in(2) )->isa_int(); // shift count is an int | |
752 return ( ti && ti->is_con() && ( ti->get_con() & ( BitsPerLong - 1 ) ) == 0 ) ? in(1) : this; | |
753 } | |
754 | |
755 //------------------------------Ideal------------------------------------------ | |
756 // If the right input is a constant, and the left input is an add of a | |
757 // constant, flatten the tree: (X+con1)<<con0 ==> X<<con0 + con1<<con0 | |
758 Node *LShiftLNode::Ideal(PhaseGVN *phase, bool can_reshape) { | |
759 const Type *t = phase->type( in(2) ); | |
760 if( t == Type::TOP ) return NULL; // Right input is dead | |
761 const TypeInt *t2 = t->isa_int(); | |
762 if( !t2 || !t2->is_con() ) return NULL; // Right input is a constant | |
763 const int con = t2->get_con() & ( BitsPerLong - 1 ); // masked shift count | |
764 | |
765 if ( con == 0 ) return NULL; // let Identity() handle 0 shift count | |
766 | |
767 // Left input is an add of a constant? | |
768 Node *add1 = in(1); | |
769 int add1_op = add1->Opcode(); | |
770 if( add1_op == Op_AddL ) { // Left input is an add? | |
771 // Avoid dead data cycles from dead loops | |
772 assert( add1 != add1->in(1), "dead loop in LShiftLNode::Ideal" ); | |
773 const TypeLong *t12 = phase->type(add1->in(2))->isa_long(); | |
774 if( t12 && t12->is_con() ){ // Left input is an add of a con? | |
775 // Compute X << con0 | |
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776 Node *lsh = phase->transform( new (phase->C) LShiftLNode( add1->in(1), in(2) ) ); |
0 | 777 // Compute X<<con0 + (con1<<con0) |
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778 return new (phase->C) AddLNode( lsh, phase->longcon(t12->get_con() << con)); |
0 | 779 } |
780 } | |
781 | |
782 // Check for "(x>>c0)<<c0" which just masks off low bits | |
783 if( (add1_op == Op_RShiftL || add1_op == Op_URShiftL ) && | |
784 add1->in(2) == in(2) ) | |
785 // Convert to "(x & -(1<<c0))" | |
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786 return new (phase->C) AndLNode(add1->in(1),phase->longcon( -(CONST64(1)<<con))); |
0 | 787 |
788 // Check for "((x>>c0) & Y)<<c0" which just masks off more low bits | |
789 if( add1_op == Op_AndL ) { | |
790 Node *add2 = add1->in(1); | |
791 int add2_op = add2->Opcode(); | |
792 if( (add2_op == Op_RShiftL || add2_op == Op_URShiftL ) && | |
793 add2->in(2) == in(2) ) { | |
794 // Convert to "(x & (Y<<c0))" | |
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795 Node *y_sh = phase->transform( new (phase->C) LShiftLNode( add1->in(2), in(2) ) ); |
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796 return new (phase->C) AndLNode( add2->in(1), y_sh ); |
0 | 797 } |
798 } | |
799 | |
800 // Check for ((x & ((CONST64(1)<<(64-c0))-1)) << c0) which ANDs off high bits | |
801 // before shifting them away. | |
559
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802 const jlong bits_mask = ((jlong)CONST64(1) << (jlong)(BitsPerJavaLong - con)) - CONST64(1); |
0 | 803 if( add1_op == Op_AndL && |
804 phase->type(add1->in(2)) == TypeLong::make( bits_mask ) ) | |
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805 return new (phase->C) LShiftLNode( add1->in(1), in(2) ); |
0 | 806 |
807 return NULL; | |
808 } | |
809 | |
810 //------------------------------Value------------------------------------------ | |
811 // A LShiftLNode shifts its input2 left by input1 amount. | |
812 const Type *LShiftLNode::Value( PhaseTransform *phase ) const { | |
813 const Type *t1 = phase->type( in(1) ); | |
814 const Type *t2 = phase->type( in(2) ); | |
815 // Either input is TOP ==> the result is TOP | |
816 if( t1 == Type::TOP ) return Type::TOP; | |
817 if( t2 == Type::TOP ) return Type::TOP; | |
818 | |
819 // Left input is ZERO ==> the result is ZERO. | |
820 if( t1 == TypeLong::ZERO ) return TypeLong::ZERO; | |
821 // Shift by zero does nothing | |
822 if( t2 == TypeInt::ZERO ) return t1; | |
823 | |
824 // Either input is BOTTOM ==> the result is BOTTOM | |
825 if( (t1 == TypeLong::LONG) || (t2 == TypeInt::INT) || | |
826 (t1 == Type::BOTTOM) || (t2 == Type::BOTTOM) ) | |
827 return TypeLong::LONG; | |
828 | |
829 const TypeLong *r1 = t1->is_long(); // Handy access | |
830 const TypeInt *r2 = t2->is_int(); // Handy access | |
831 | |
832 if (!r2->is_con()) | |
833 return TypeLong::LONG; | |
834 | |
835 uint shift = r2->get_con(); | |
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836 shift &= BitsPerJavaLong - 1; // semantics of Java shifts |
0 | 837 // Shift by a multiple of 64 does nothing: |
838 if (shift == 0) return t1; | |
839 | |
840 // If the shift is a constant, shift the bounds of the type, | |
841 // unless this could lead to an overflow. | |
842 if (!r1->is_con()) { | |
843 jlong lo = r1->_lo, hi = r1->_hi; | |
844 if (((lo << shift) >> shift) == lo && | |
845 ((hi << shift) >> shift) == hi) { | |
846 // No overflow. The range shifts up cleanly. | |
847 return TypeLong::make((jlong)lo << (jint)shift, | |
848 (jlong)hi << (jint)shift, | |
849 MAX2(r1->_widen,r2->_widen)); | |
850 } | |
851 return TypeLong::LONG; | |
852 } | |
853 | |
854 return TypeLong::make( (jlong)r1->get_con() << (jint)shift ); | |
855 } | |
856 | |
857 //============================================================================= | |
858 //------------------------------Identity--------------------------------------- | |
859 Node *RShiftINode::Identity( PhaseTransform *phase ) { | |
860 const TypeInt *t2 = phase->type(in(2))->isa_int(); | |
861 if( !t2 ) return this; | |
862 if ( t2->is_con() && ( t2->get_con() & ( BitsPerInt - 1 ) ) == 0 ) | |
863 return in(1); | |
864 | |
865 // Check for useless sign-masking | |
866 if( in(1)->Opcode() == Op_LShiftI && | |
867 in(1)->req() == 3 && | |
868 in(1)->in(2) == in(2) && | |
869 t2->is_con() ) { | |
870 uint shift = t2->get_con(); | |
871 shift &= BitsPerJavaInteger-1; // semantics of Java shifts | |
872 // Compute masks for which this shifting doesn't change | |
873 int lo = (-1 << (BitsPerJavaInteger - shift-1)); // FFFF8000 | |
874 int hi = ~lo; // 00007FFF | |
875 const TypeInt *t11 = phase->type(in(1)->in(1))->isa_int(); | |
876 if( !t11 ) return this; | |
877 // Does actual value fit inside of mask? | |
878 if( lo <= t11->_lo && t11->_hi <= hi ) | |
879 return in(1)->in(1); // Then shifting is a nop | |
880 } | |
881 | |
882 return this; | |
883 } | |
884 | |
885 //------------------------------Ideal------------------------------------------ | |
886 Node *RShiftINode::Ideal(PhaseGVN *phase, bool can_reshape) { | |
887 // Inputs may be TOP if they are dead. | |
888 const TypeInt *t1 = phase->type( in(1) )->isa_int(); | |
889 if( !t1 ) return NULL; // Left input is an integer | |
890 const TypeInt *t2 = phase->type( in(2) )->isa_int(); | |
891 if( !t2 || !t2->is_con() ) return NULL; // Right input is a constant | |
892 const TypeInt *t3; // type of in(1).in(2) | |
893 int shift = t2->get_con(); | |
894 shift &= BitsPerJavaInteger-1; // semantics of Java shifts | |
895 | |
896 if ( shift == 0 ) return NULL; // let Identity() handle 0 shift count | |
897 | |
898 // Check for (x & 0xFF000000) >> 24, whose mask can be made smaller. | |
899 // Such expressions arise normally from shift chains like (byte)(x >> 24). | |
900 const Node *mask = in(1); | |
901 if( mask->Opcode() == Op_AndI && | |
902 (t3 = phase->type(mask->in(2))->isa_int()) && | |
903 t3->is_con() ) { | |
904 Node *x = mask->in(1); | |
905 jint maskbits = t3->get_con(); | |
906 // Convert to "(x >> shift) & (mask >> shift)" | |
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907 Node *shr_nomask = phase->transform( new (phase->C) RShiftINode(mask->in(1), in(2)) ); |
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908 return new (phase->C) AndINode(shr_nomask, phase->intcon( maskbits >> shift)); |
0 | 909 } |
910 | |
911 // Check for "(short[i] <<16)>>16" which simply sign-extends | |
912 const Node *shl = in(1); | |
913 if( shl->Opcode() != Op_LShiftI ) return NULL; | |
914 | |
915 if( shift == 16 && | |
916 (t3 = phase->type(shl->in(2))->isa_int()) && | |
917 t3->is_con(16) ) { | |
918 Node *ld = shl->in(1); | |
919 if( ld->Opcode() == Op_LoadS ) { | |
920 // Sign extension is just useless here. Return a RShiftI of zero instead | |
921 // returning 'ld' directly. We cannot return an old Node directly as | |
922 // that is the job of 'Identity' calls and Identity calls only work on | |
923 // direct inputs ('ld' is an extra Node removed from 'this'). The | |
924 // combined optimization requires Identity only return direct inputs. | |
925 set_req(1, ld); | |
926 set_req(2, phase->intcon(0)); | |
927 return this; | |
928 } | |
6891 | 929 else if( can_reshape && |
930 ld->Opcode() == Op_LoadUS && | |
931 ld->outcnt() == 1 && ld->unique_out() == shl) | |
0 | 932 // Replace zero-extension-load with sign-extension-load |
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933 return new (phase->C) LoadSNode( ld->in(MemNode::Control), |
0 | 934 ld->in(MemNode::Memory), |
935 ld->in(MemNode::Address), | |
936 ld->adr_type()); | |
937 } | |
938 | |
939 // Check for "(byte[i] <<24)>>24" which simply sign-extends | |
940 if( shift == 24 && | |
941 (t3 = phase->type(shl->in(2))->isa_int()) && | |
942 t3->is_con(24) ) { | |
943 Node *ld = shl->in(1); | |
944 if( ld->Opcode() == Op_LoadB ) { | |
945 // Sign extension is just useless here | |
946 set_req(1, ld); | |
947 set_req(2, phase->intcon(0)); | |
948 return this; | |
949 } | |
950 } | |
951 | |
952 return NULL; | |
953 } | |
954 | |
955 //------------------------------Value------------------------------------------ | |
956 // A RShiftINode shifts its input2 right by input1 amount. | |
957 const Type *RShiftINode::Value( PhaseTransform *phase ) const { | |
958 const Type *t1 = phase->type( in(1) ); | |
959 const Type *t2 = phase->type( in(2) ); | |
960 // Either input is TOP ==> the result is TOP | |
961 if( t1 == Type::TOP ) return Type::TOP; | |
962 if( t2 == Type::TOP ) return Type::TOP; | |
963 | |
964 // Left input is ZERO ==> the result is ZERO. | |
965 if( t1 == TypeInt::ZERO ) return TypeInt::ZERO; | |
966 // Shift by zero does nothing | |
967 if( t2 == TypeInt::ZERO ) return t1; | |
968 | |
969 // Either input is BOTTOM ==> the result is BOTTOM | |
970 if (t1 == Type::BOTTOM || t2 == Type::BOTTOM) | |
971 return TypeInt::INT; | |
972 | |
973 if (t2 == TypeInt::INT) | |
974 return TypeInt::INT; | |
975 | |
976 const TypeInt *r1 = t1->is_int(); // Handy access | |
977 const TypeInt *r2 = t2->is_int(); // Handy access | |
978 | |
979 // If the shift is a constant, just shift the bounds of the type. | |
980 // For example, if the shift is 31, we just propagate sign bits. | |
981 if (r2->is_con()) { | |
982 uint shift = r2->get_con(); | |
983 shift &= BitsPerJavaInteger-1; // semantics of Java shifts | |
984 // Shift by a multiple of 32 does nothing: | |
985 if (shift == 0) return t1; | |
986 // Calculate reasonably aggressive bounds for the result. | |
987 // This is necessary if we are to correctly type things | |
988 // like (x<<24>>24) == ((byte)x). | |
989 jint lo = (jint)r1->_lo >> (jint)shift; | |
990 jint hi = (jint)r1->_hi >> (jint)shift; | |
991 assert(lo <= hi, "must have valid bounds"); | |
992 const TypeInt* ti = TypeInt::make(lo, hi, MAX2(r1->_widen,r2->_widen)); | |
993 #ifdef ASSERT | |
994 // Make sure we get the sign-capture idiom correct. | |
995 if (shift == BitsPerJavaInteger-1) { | |
996 if (r1->_lo >= 0) assert(ti == TypeInt::ZERO, ">>31 of + is 0"); | |
997 if (r1->_hi < 0) assert(ti == TypeInt::MINUS_1, ">>31 of - is -1"); | |
998 } | |
999 #endif | |
1000 return ti; | |
1001 } | |
1002 | |
1003 if( !r1->is_con() || !r2->is_con() ) | |
1004 return TypeInt::INT; | |
1005 | |
1006 // Signed shift right | |
1007 return TypeInt::make( r1->get_con() >> (r2->get_con()&31) ); | |
1008 } | |
1009 | |
1010 //============================================================================= | |
1011 //------------------------------Identity--------------------------------------- | |
1012 Node *RShiftLNode::Identity( PhaseTransform *phase ) { | |
1013 const TypeInt *ti = phase->type( in(2) )->isa_int(); // shift count is an int | |
1014 return ( ti && ti->is_con() && ( ti->get_con() & ( BitsPerLong - 1 ) ) == 0 ) ? in(1) : this; | |
1015 } | |
1016 | |
1017 //------------------------------Value------------------------------------------ | |
1018 // A RShiftLNode shifts its input2 right by input1 amount. | |
1019 const Type *RShiftLNode::Value( PhaseTransform *phase ) const { | |
1020 const Type *t1 = phase->type( in(1) ); | |
1021 const Type *t2 = phase->type( in(2) ); | |
1022 // Either input is TOP ==> the result is TOP | |
1023 if( t1 == Type::TOP ) return Type::TOP; | |
1024 if( t2 == Type::TOP ) return Type::TOP; | |
1025 | |
1026 // Left input is ZERO ==> the result is ZERO. | |
1027 if( t1 == TypeLong::ZERO ) return TypeLong::ZERO; | |
1028 // Shift by zero does nothing | |
1029 if( t2 == TypeInt::ZERO ) return t1; | |
1030 | |
1031 // Either input is BOTTOM ==> the result is BOTTOM | |
1032 if (t1 == Type::BOTTOM || t2 == Type::BOTTOM) | |
1033 return TypeLong::LONG; | |
1034 | |
1035 if (t2 == TypeInt::INT) | |
1036 return TypeLong::LONG; | |
1037 | |
1038 const TypeLong *r1 = t1->is_long(); // Handy access | |
1039 const TypeInt *r2 = t2->is_int (); // Handy access | |
1040 | |
1041 // If the shift is a constant, just shift the bounds of the type. | |
1042 // For example, if the shift is 63, we just propagate sign bits. | |
1043 if (r2->is_con()) { | |
1044 uint shift = r2->get_con(); | |
1045 shift &= (2*BitsPerJavaInteger)-1; // semantics of Java shifts | |
1046 // Shift by a multiple of 64 does nothing: | |
1047 if (shift == 0) return t1; | |
1048 // Calculate reasonably aggressive bounds for the result. | |
1049 // This is necessary if we are to correctly type things | |
1050 // like (x<<24>>24) == ((byte)x). | |
1051 jlong lo = (jlong)r1->_lo >> (jlong)shift; | |
1052 jlong hi = (jlong)r1->_hi >> (jlong)shift; | |
1053 assert(lo <= hi, "must have valid bounds"); | |
1054 const TypeLong* tl = TypeLong::make(lo, hi, MAX2(r1->_widen,r2->_widen)); | |
1055 #ifdef ASSERT | |
1056 // Make sure we get the sign-capture idiom correct. | |
1057 if (shift == (2*BitsPerJavaInteger)-1) { | |
1058 if (r1->_lo >= 0) assert(tl == TypeLong::ZERO, ">>63 of + is 0"); | |
1059 if (r1->_hi < 0) assert(tl == TypeLong::MINUS_1, ">>63 of - is -1"); | |
1060 } | |
1061 #endif | |
1062 return tl; | |
1063 } | |
1064 | |
1065 return TypeLong::LONG; // Give up | |
1066 } | |
1067 | |
1068 //============================================================================= | |
1069 //------------------------------Identity--------------------------------------- | |
1070 Node *URShiftINode::Identity( PhaseTransform *phase ) { | |
1071 const TypeInt *ti = phase->type( in(2) )->isa_int(); | |
1072 if ( ti && ti->is_con() && ( ti->get_con() & ( BitsPerInt - 1 ) ) == 0 ) return in(1); | |
1073 | |
1074 // Check for "((x << LogBytesPerWord) + (wordSize-1)) >> LogBytesPerWord" which is just "x". | |
1075 // Happens during new-array length computation. | |
1076 // Safe if 'x' is in the range [0..(max_int>>LogBytesPerWord)] | |
1077 Node *add = in(1); | |
1078 if( add->Opcode() == Op_AddI ) { | |
1079 const TypeInt *t2 = phase->type(add->in(2))->isa_int(); | |
1080 if( t2 && t2->is_con(wordSize - 1) && | |
1081 add->in(1)->Opcode() == Op_LShiftI ) { | |
1082 // Check that shift_counts are LogBytesPerWord | |
1083 Node *lshift_count = add->in(1)->in(2); | |
1084 const TypeInt *t_lshift_count = phase->type(lshift_count)->isa_int(); | |
1085 if( t_lshift_count && t_lshift_count->is_con(LogBytesPerWord) && | |
1086 t_lshift_count == phase->type(in(2)) ) { | |
1087 Node *x = add->in(1)->in(1); | |
1088 const TypeInt *t_x = phase->type(x)->isa_int(); | |
1089 if( t_x != NULL && 0 <= t_x->_lo && t_x->_hi <= (max_jint>>LogBytesPerWord) ) { | |
1090 return x; | |
1091 } | |
1092 } | |
1093 } | |
1094 } | |
1095 | |
1096 return (phase->type(in(2))->higher_equal(TypeInt::ZERO)) ? in(1) : this; | |
1097 } | |
1098 | |
1099 //------------------------------Ideal------------------------------------------ | |
1100 Node *URShiftINode::Ideal(PhaseGVN *phase, bool can_reshape) { | |
1101 const TypeInt *t2 = phase->type( in(2) )->isa_int(); | |
1102 if( !t2 || !t2->is_con() ) return NULL; // Right input is a constant | |
1103 const int con = t2->get_con() & 31; // Shift count is always masked | |
1104 if ( con == 0 ) return NULL; // let Identity() handle a 0 shift count | |
1105 // We'll be wanting the right-shift amount as a mask of that many bits | |
1106 const int mask = right_n_bits(BitsPerJavaInteger - con); | |
1107 | |
1108 int in1_op = in(1)->Opcode(); | |
1109 | |
1110 // Check for ((x>>>a)>>>b) and replace with (x>>>(a+b)) when a+b < 32 | |
1111 if( in1_op == Op_URShiftI ) { | |
1112 const TypeInt *t12 = phase->type( in(1)->in(2) )->isa_int(); | |
1113 if( t12 && t12->is_con() ) { // Right input is a constant | |
1114 assert( in(1) != in(1)->in(1), "dead loop in URShiftINode::Ideal" ); | |
1115 const int con2 = t12->get_con() & 31; // Shift count is always masked | |
1116 const int con3 = con+con2; | |
1117 if( con3 < 32 ) // Only merge shifts if total is < 32 | |
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1118 return new (phase->C) URShiftINode( in(1)->in(1), phase->intcon(con3) ); |
0 | 1119 } |
1120 } | |
1121 | |
1122 // Check for ((x << z) + Y) >>> z. Replace with x + con>>>z | |
1123 // The idiom for rounding to a power of 2 is "(Q+(2^z-1)) >>> z". | |
1124 // If Q is "X << z" the rounding is useless. Look for patterns like | |
1125 // ((X<<Z) + Y) >>> Z and replace with (X + Y>>>Z) & Z-mask. | |
1126 Node *add = in(1); | |
1127 if( in1_op == Op_AddI ) { | |
1128 Node *lshl = add->in(1); | |
1129 if( lshl->Opcode() == Op_LShiftI && | |
1130 phase->type(lshl->in(2)) == t2 ) { | |
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1131 Node *y_z = phase->transform( new (phase->C) URShiftINode(add->in(2),in(2)) ); |
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1132 Node *sum = phase->transform( new (phase->C) AddINode( lshl->in(1), y_z ) ); |
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1133 return new (phase->C) AndINode( sum, phase->intcon(mask) ); |
0 | 1134 } |
1135 } | |
1136 | |
1137 // Check for (x & mask) >>> z. Replace with (x >>> z) & (mask >>> z) | |
1138 // This shortens the mask. Also, if we are extracting a high byte and | |
1139 // storing it to a buffer, the mask will be removed completely. | |
1140 Node *andi = in(1); | |
1141 if( in1_op == Op_AndI ) { | |
1142 const TypeInt *t3 = phase->type( andi->in(2) )->isa_int(); | |
1143 if( t3 && t3->is_con() ) { // Right input is a constant | |
1144 jint mask2 = t3->get_con(); | |
1145 mask2 >>= con; // *signed* shift downward (high-order zeroes do not help) | |
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1146 Node *newshr = phase->transform( new (phase->C) URShiftINode(andi->in(1), in(2)) ); |
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1147 return new (phase->C) AndINode(newshr, phase->intcon(mask2)); |
0 | 1148 // The negative values are easier to materialize than positive ones. |
1149 // A typical case from address arithmetic is ((x & ~15) >> 4). | |
1150 // It's better to change that to ((x >> 4) & ~0) versus | |
1151 // ((x >> 4) & 0x0FFFFFFF). The difference is greatest in LP64. | |
1152 } | |
1153 } | |
1154 | |
1155 // Check for "(X << z ) >>> z" which simply zero-extends | |
1156 Node *shl = in(1); | |
1157 if( in1_op == Op_LShiftI && | |
1158 phase->type(shl->in(2)) == t2 ) | |
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1159 return new (phase->C) AndINode( shl->in(1), phase->intcon(mask) ); |
0 | 1160 |
1161 return NULL; | |
1162 } | |
1163 | |
1164 //------------------------------Value------------------------------------------ | |
1165 // A URShiftINode shifts its input2 right by input1 amount. | |
1166 const Type *URShiftINode::Value( PhaseTransform *phase ) const { | |
1167 // (This is a near clone of RShiftINode::Value.) | |
1168 const Type *t1 = phase->type( in(1) ); | |
1169 const Type *t2 = phase->type( in(2) ); | |
1170 // Either input is TOP ==> the result is TOP | |
1171 if( t1 == Type::TOP ) return Type::TOP; | |
1172 if( t2 == Type::TOP ) return Type::TOP; | |
1173 | |
1174 // Left input is ZERO ==> the result is ZERO. | |
1175 if( t1 == TypeInt::ZERO ) return TypeInt::ZERO; | |
1176 // Shift by zero does nothing | |
1177 if( t2 == TypeInt::ZERO ) return t1; | |
1178 | |
1179 // Either input is BOTTOM ==> the result is BOTTOM | |
1180 if (t1 == Type::BOTTOM || t2 == Type::BOTTOM) | |
1181 return TypeInt::INT; | |
1182 | |
1183 if (t2 == TypeInt::INT) | |
1184 return TypeInt::INT; | |
1185 | |
1186 const TypeInt *r1 = t1->is_int(); // Handy access | |
1187 const TypeInt *r2 = t2->is_int(); // Handy access | |
1188 | |
1189 if (r2->is_con()) { | |
1190 uint shift = r2->get_con(); | |
1191 shift &= BitsPerJavaInteger-1; // semantics of Java shifts | |
1192 // Shift by a multiple of 32 does nothing: | |
1193 if (shift == 0) return t1; | |
1194 // Calculate reasonably aggressive bounds for the result. | |
1195 jint lo = (juint)r1->_lo >> (juint)shift; | |
1196 jint hi = (juint)r1->_hi >> (juint)shift; | |
1197 if (r1->_hi >= 0 && r1->_lo < 0) { | |
1198 // If the type has both negative and positive values, | |
1199 // there are two separate sub-domains to worry about: | |
1200 // The positive half and the negative half. | |
1201 jint neg_lo = lo; | |
1202 jint neg_hi = (juint)-1 >> (juint)shift; | |
1203 jint pos_lo = (juint) 0 >> (juint)shift; | |
1204 jint pos_hi = hi; | |
1205 lo = MIN2(neg_lo, pos_lo); // == 0 | |
1206 hi = MAX2(neg_hi, pos_hi); // == -1 >>> shift; | |
1207 } | |
1208 assert(lo <= hi, "must have valid bounds"); | |
1209 const TypeInt* ti = TypeInt::make(lo, hi, MAX2(r1->_widen,r2->_widen)); | |
1210 #ifdef ASSERT | |
1211 // Make sure we get the sign-capture idiom correct. | |
1212 if (shift == BitsPerJavaInteger-1) { | |
1213 if (r1->_lo >= 0) assert(ti == TypeInt::ZERO, ">>>31 of + is 0"); | |
1214 if (r1->_hi < 0) assert(ti == TypeInt::ONE, ">>>31 of - is +1"); | |
1215 } | |
1216 #endif | |
1217 return ti; | |
1218 } | |
1219 | |
1220 // | |
1221 // Do not support shifted oops in info for GC | |
1222 // | |
1223 // else if( t1->base() == Type::InstPtr ) { | |
1224 // | |
1225 // const TypeInstPtr *o = t1->is_instptr(); | |
1226 // if( t1->singleton() ) | |
1227 // return TypeInt::make( ((uint32)o->const_oop() + o->_offset) >> shift ); | |
1228 // } | |
1229 // else if( t1->base() == Type::KlassPtr ) { | |
1230 // const TypeKlassPtr *o = t1->is_klassptr(); | |
1231 // if( t1->singleton() ) | |
1232 // return TypeInt::make( ((uint32)o->const_oop() + o->_offset) >> shift ); | |
1233 // } | |
1234 | |
1235 return TypeInt::INT; | |
1236 } | |
1237 | |
1238 //============================================================================= | |
1239 //------------------------------Identity--------------------------------------- | |
1240 Node *URShiftLNode::Identity( PhaseTransform *phase ) { | |
1241 const TypeInt *ti = phase->type( in(2) )->isa_int(); // shift count is an int | |
1242 return ( ti && ti->is_con() && ( ti->get_con() & ( BitsPerLong - 1 ) ) == 0 ) ? in(1) : this; | |
1243 } | |
1244 | |
1245 //------------------------------Ideal------------------------------------------ | |
1246 Node *URShiftLNode::Ideal(PhaseGVN *phase, bool can_reshape) { | |
1247 const TypeInt *t2 = phase->type( in(2) )->isa_int(); | |
1248 if( !t2 || !t2->is_con() ) return NULL; // Right input is a constant | |
1249 const int con = t2->get_con() & ( BitsPerLong - 1 ); // Shift count is always masked | |
1250 if ( con == 0 ) return NULL; // let Identity() handle a 0 shift count | |
1251 // note: mask computation below does not work for 0 shift count | |
1252 // We'll be wanting the right-shift amount as a mask of that many bits | |
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1253 const jlong mask = (((jlong)CONST64(1) << (jlong)(BitsPerJavaLong - con)) -1); |
0 | 1254 |
1255 // Check for ((x << z) + Y) >>> z. Replace with x + con>>>z | |
1256 // The idiom for rounding to a power of 2 is "(Q+(2^z-1)) >>> z". | |
1257 // If Q is "X << z" the rounding is useless. Look for patterns like | |
1258 // ((X<<Z) + Y) >>> Z and replace with (X + Y>>>Z) & Z-mask. | |
1259 Node *add = in(1); | |
1260 if( add->Opcode() == Op_AddL ) { | |
1261 Node *lshl = add->in(1); | |
1262 if( lshl->Opcode() == Op_LShiftL && | |
1263 phase->type(lshl->in(2)) == t2 ) { | |
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1264 Node *y_z = phase->transform( new (phase->C) URShiftLNode(add->in(2),in(2)) ); |
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1265 Node *sum = phase->transform( new (phase->C) AddLNode( lshl->in(1), y_z ) ); |
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1266 return new (phase->C) AndLNode( sum, phase->longcon(mask) ); |
0 | 1267 } |
1268 } | |
1269 | |
1270 // Check for (x & mask) >>> z. Replace with (x >>> z) & (mask >>> z) | |
1271 // This shortens the mask. Also, if we are extracting a high byte and | |
1272 // storing it to a buffer, the mask will be removed completely. | |
1273 Node *andi = in(1); | |
1274 if( andi->Opcode() == Op_AndL ) { | |
1275 const TypeLong *t3 = phase->type( andi->in(2) )->isa_long(); | |
1276 if( t3 && t3->is_con() ) { // Right input is a constant | |
1277 jlong mask2 = t3->get_con(); | |
1278 mask2 >>= con; // *signed* shift downward (high-order zeroes do not help) | |
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1279 Node *newshr = phase->transform( new (phase->C) URShiftLNode(andi->in(1), in(2)) ); |
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1280 return new (phase->C) AndLNode(newshr, phase->longcon(mask2)); |
0 | 1281 } |
1282 } | |
1283 | |
1284 // Check for "(X << z ) >>> z" which simply zero-extends | |
1285 Node *shl = in(1); | |
1286 if( shl->Opcode() == Op_LShiftL && | |
1287 phase->type(shl->in(2)) == t2 ) | |
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1288 return new (phase->C) AndLNode( shl->in(1), phase->longcon(mask) ); |
0 | 1289 |
1290 return NULL; | |
1291 } | |
1292 | |
1293 //------------------------------Value------------------------------------------ | |
1294 // A URShiftINode shifts its input2 right by input1 amount. | |
1295 const Type *URShiftLNode::Value( PhaseTransform *phase ) const { | |
1296 // (This is a near clone of RShiftLNode::Value.) | |
1297 const Type *t1 = phase->type( in(1) ); | |
1298 const Type *t2 = phase->type( in(2) ); | |
1299 // Either input is TOP ==> the result is TOP | |
1300 if( t1 == Type::TOP ) return Type::TOP; | |
1301 if( t2 == Type::TOP ) return Type::TOP; | |
1302 | |
1303 // Left input is ZERO ==> the result is ZERO. | |
1304 if( t1 == TypeLong::ZERO ) return TypeLong::ZERO; | |
1305 // Shift by zero does nothing | |
1306 if( t2 == TypeInt::ZERO ) return t1; | |
1307 | |
1308 // Either input is BOTTOM ==> the result is BOTTOM | |
1309 if (t1 == Type::BOTTOM || t2 == Type::BOTTOM) | |
1310 return TypeLong::LONG; | |
1311 | |
1312 if (t2 == TypeInt::INT) | |
1313 return TypeLong::LONG; | |
1314 | |
1315 const TypeLong *r1 = t1->is_long(); // Handy access | |
1316 const TypeInt *r2 = t2->is_int (); // Handy access | |
1317 | |
1318 if (r2->is_con()) { | |
1319 uint shift = r2->get_con(); | |
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1320 shift &= BitsPerJavaLong - 1; // semantics of Java shifts |
0 | 1321 // Shift by a multiple of 64 does nothing: |
1322 if (shift == 0) return t1; | |
1323 // Calculate reasonably aggressive bounds for the result. | |
1324 jlong lo = (julong)r1->_lo >> (juint)shift; | |
1325 jlong hi = (julong)r1->_hi >> (juint)shift; | |
1326 if (r1->_hi >= 0 && r1->_lo < 0) { | |
1327 // If the type has both negative and positive values, | |
1328 // there are two separate sub-domains to worry about: | |
1329 // The positive half and the negative half. | |
1330 jlong neg_lo = lo; | |
1331 jlong neg_hi = (julong)-1 >> (juint)shift; | |
1332 jlong pos_lo = (julong) 0 >> (juint)shift; | |
1333 jlong pos_hi = hi; | |
1334 //lo = MIN2(neg_lo, pos_lo); // == 0 | |
1335 lo = neg_lo < pos_lo ? neg_lo : pos_lo; | |
1336 //hi = MAX2(neg_hi, pos_hi); // == -1 >>> shift; | |
1337 hi = neg_hi > pos_hi ? neg_hi : pos_hi; | |
1338 } | |
1339 assert(lo <= hi, "must have valid bounds"); | |
1340 const TypeLong* tl = TypeLong::make(lo, hi, MAX2(r1->_widen,r2->_widen)); | |
1341 #ifdef ASSERT | |
1342 // Make sure we get the sign-capture idiom correct. | |
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1343 if (shift == BitsPerJavaLong - 1) { |
0 | 1344 if (r1->_lo >= 0) assert(tl == TypeLong::ZERO, ">>>63 of + is 0"); |
1345 if (r1->_hi < 0) assert(tl == TypeLong::ONE, ">>>63 of - is +1"); | |
1346 } | |
1347 #endif | |
1348 return tl; | |
1349 } | |
1350 | |
1351 return TypeLong::LONG; // Give up | |
1352 } |