annotate src/share/vm/opto/memnode.hpp @ 196:d1605aabd0a1 jdk7-b30

6719955: Update copyright year Summary: Update copyright year for files that have been modified in 2008 Reviewed-by: ohair, tbell
author xdono
date Wed, 02 Jul 2008 12:55:16 -0700
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1 /*
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2 * Copyright 1997-2008 Sun Microsystems, Inc. All Rights Reserved.
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3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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4 *
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5 * This code is free software; you can redistribute it and/or modify it
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6 * under the terms of the GNU General Public License version 2 only, as
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7 * published by the Free Software Foundation.
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8 *
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9 * This code is distributed in the hope that it will be useful, but WITHOUT
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10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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12 * version 2 for more details (a copy is included in the LICENSE file that
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13 * accompanied this code).
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14 *
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15 * You should have received a copy of the GNU General Public License version
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16 * 2 along with this work; if not, write to the Free Software Foundation,
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17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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18 *
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19 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
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20 * CA 95054 USA or visit www.sun.com if you need additional information or
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21 * have any questions.
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22 *
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23 */
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24
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25 // Portions of code courtesy of Clifford Click
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26
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27 class MultiNode;
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28 class PhaseCCP;
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29 class PhaseTransform;
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30
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31 //------------------------------MemNode----------------------------------------
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32 // Load or Store, possibly throwing a NULL pointer exception
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33 class MemNode : public Node {
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34 protected:
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35 #ifdef ASSERT
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36 const TypePtr* _adr_type; // What kind of memory is being addressed?
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37 #endif
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38 virtual uint size_of() const; // Size is bigger (ASSERT only)
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39 public:
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40 enum { Control, // When is it safe to do this load?
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41 Memory, // Chunk of memory is being loaded from
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42 Address, // Actually address, derived from base
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43 ValueIn, // Value to store
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44 OopStore // Preceeding oop store, only in StoreCM
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45 };
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46 protected:
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47 MemNode( Node *c0, Node *c1, Node *c2, const TypePtr* at )
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48 : Node(c0,c1,c2 ) {
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49 init_class_id(Class_Mem);
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50 debug_only(_adr_type=at; adr_type();)
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51 }
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52 MemNode( Node *c0, Node *c1, Node *c2, const TypePtr* at, Node *c3 )
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53 : Node(c0,c1,c2,c3) {
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54 init_class_id(Class_Mem);
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55 debug_only(_adr_type=at; adr_type();)
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56 }
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57 MemNode( Node *c0, Node *c1, Node *c2, const TypePtr* at, Node *c3, Node *c4)
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58 : Node(c0,c1,c2,c3,c4) {
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59 init_class_id(Class_Mem);
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60 debug_only(_adr_type=at; adr_type();)
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61 }
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62
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63 public:
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64 // Helpers for the optimizer. Documented in memnode.cpp.
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65 static bool detect_ptr_independence(Node* p1, AllocateNode* a1,
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66 Node* p2, AllocateNode* a2,
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67 PhaseTransform* phase);
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68 static bool adr_phi_is_loop_invariant(Node* adr_phi, Node* cast);
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69
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70 static Node *optimize_simple_memory_chain(Node *mchain, const TypePtr *t_adr, PhaseGVN *phase);
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71 static Node *optimize_memory_chain(Node *mchain, const TypePtr *t_adr, PhaseGVN *phase);
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72 // This one should probably be a phase-specific function:
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73 static bool all_controls_dominate(Node* dom, Node* sub);
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74
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75 // Find any cast-away of null-ness and keep its control.
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76 static Node *Ideal_common_DU_postCCP( PhaseCCP *ccp, Node* n, Node* adr );
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77 virtual Node *Ideal_DU_postCCP( PhaseCCP *ccp );
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78
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79 virtual const class TypePtr *adr_type() const; // returns bottom_type of address
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80
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81 // Shared code for Ideal methods:
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82 Node *Ideal_common(PhaseGVN *phase, bool can_reshape); // Return -1 for short-circuit NULL.
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83
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84 // Helper function for adr_type() implementations.
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85 static const TypePtr* calculate_adr_type(const Type* t, const TypePtr* cross_check = NULL);
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86
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87 // Raw access function, to allow copying of adr_type efficiently in
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88 // product builds and retain the debug info for debug builds.
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89 const TypePtr *raw_adr_type() const {
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90 #ifdef ASSERT
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91 return _adr_type;
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92 #else
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93 return 0;
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94 #endif
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95 }
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96
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97 // Map a load or store opcode to its corresponding store opcode.
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98 // (Return -1 if unknown.)
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99 virtual int store_Opcode() const { return -1; }
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100
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101 // What is the type of the value in memory? (T_VOID mean "unspecified".)
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102 virtual BasicType memory_type() const = 0;
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103 virtual int memory_size() const {
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104 #ifdef ASSERT
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105 return type2aelembytes(memory_type(), true);
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106 #else
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107 return type2aelembytes(memory_type());
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108 #endif
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109 }
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110
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111 // Search through memory states which precede this node (load or store).
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112 // Look for an exact match for the address, with no intervening
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113 // aliased stores.
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114 Node* find_previous_store(PhaseTransform* phase);
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115
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116 // Can this node (load or store) accurately see a stored value in
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117 // the given memory state? (The state may or may not be in(Memory).)
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118 Node* can_see_stored_value(Node* st, PhaseTransform* phase) const;
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119
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120 #ifndef PRODUCT
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121 static void dump_adr_type(const Node* mem, const TypePtr* adr_type, outputStream *st);
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122 virtual void dump_spec(outputStream *st) const;
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123 #endif
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124 };
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125
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126 //------------------------------LoadNode---------------------------------------
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127 // Load value; requires Memory and Address
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128 class LoadNode : public MemNode {
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129 protected:
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130 virtual uint cmp( const Node &n ) const;
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131 virtual uint size_of() const; // Size is bigger
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132 const Type* const _type; // What kind of value is loaded?
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133 public:
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134
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135 LoadNode( Node *c, Node *mem, Node *adr, const TypePtr* at, const Type *rt )
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136 : MemNode(c,mem,adr,at), _type(rt) {
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137 init_class_id(Class_Load);
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138 }
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139
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140 // Polymorphic factory method:
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141 static Node* make( PhaseGVN& gvn, Node *c, Node *mem, Node *adr,
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142 const TypePtr* at, const Type *rt, BasicType bt );
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143
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144 virtual uint hash() const; // Check the type
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145
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146 // Handle algebraic identities here. If we have an identity, return the Node
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147 // we are equivalent to. We look for Load of a Store.
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148 virtual Node *Identity( PhaseTransform *phase );
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149
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150 // If the load is from Field memory and the pointer is non-null, we can
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151 // zero out the control input.
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152 virtual Node *Ideal(PhaseGVN *phase, bool can_reshape);
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153
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154 // Split instance field load through Phi.
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155 Node* split_through_phi(PhaseGVN *phase);
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156
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157 // Recover original value from boxed values
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158 Node *eliminate_autobox(PhaseGVN *phase);
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159
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160 // Compute a new Type for this node. Basically we just do the pre-check,
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161 // then call the virtual add() to set the type.
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162 virtual const Type *Value( PhaseTransform *phase ) const;
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163
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164 // Common methods for LoadKlass and LoadNKlass nodes.
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165 const Type *klass_value_common( PhaseTransform *phase ) const;
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166 Node *klass_identity_common( PhaseTransform *phase );
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167
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168 virtual uint ideal_reg() const;
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169 virtual const Type *bottom_type() const;
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170 // Following method is copied from TypeNode:
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171 void set_type(const Type* t) {
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172 assert(t != NULL, "sanity");
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173 debug_only(uint check_hash = (VerifyHashTableKeys && _hash_lock) ? hash() : NO_HASH);
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174 *(const Type**)&_type = t; // cast away const-ness
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175 // If this node is in the hash table, make sure it doesn't need a rehash.
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176 assert(check_hash == NO_HASH || check_hash == hash(), "type change must preserve hash code");
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177 }
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178 const Type* type() const { assert(_type != NULL, "sanity"); return _type; };
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179
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180 // Do not match memory edge
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181 virtual uint match_edge(uint idx) const;
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182
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183 // Map a load opcode to its corresponding store opcode.
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184 virtual int store_Opcode() const = 0;
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185
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186 // Check if the load's memory input is a Phi node with the same control.
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187 bool is_instance_field_load_with_local_phi(Node* ctrl);
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188
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189 #ifndef PRODUCT
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190 virtual void dump_spec(outputStream *st) const;
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191 #endif
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192 protected:
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193 const Type* load_array_final_field(const TypeKlassPtr *tkls,
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194 ciKlass* klass) const;
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195 };
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196
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197 //------------------------------LoadBNode--------------------------------------
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198 // Load a byte (8bits signed) from memory
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199 class LoadBNode : public LoadNode {
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200 public:
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201 LoadBNode( Node *c, Node *mem, Node *adr, const TypePtr* at, const TypeInt *ti = TypeInt::BYTE )
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202 : LoadNode(c,mem,adr,at,ti) {}
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203 virtual int Opcode() const;
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204 virtual uint ideal_reg() const { return Op_RegI; }
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205 virtual Node *Ideal(PhaseGVN *phase, bool can_reshape);
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206 virtual int store_Opcode() const { return Op_StoreB; }
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207 virtual BasicType memory_type() const { return T_BYTE; }
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208 };
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209
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210 //------------------------------LoadCNode--------------------------------------
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211 // Load a char (16bits unsigned) from memory
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212 class LoadCNode : public LoadNode {
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213 public:
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214 LoadCNode( Node *c, Node *mem, Node *adr, const TypePtr* at, const TypeInt *ti = TypeInt::CHAR )
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215 : LoadNode(c,mem,adr,at,ti) {}
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216 virtual int Opcode() const;
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217 virtual uint ideal_reg() const { return Op_RegI; }
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218 virtual Node *Ideal(PhaseGVN *phase, bool can_reshape);
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219 virtual int store_Opcode() const { return Op_StoreC; }
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220 virtual BasicType memory_type() const { return T_CHAR; }
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221 };
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222
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223 //------------------------------LoadINode--------------------------------------
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224 // Load an integer from memory
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225 class LoadINode : public LoadNode {
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226 public:
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227 LoadINode( Node *c, Node *mem, Node *adr, const TypePtr* at, const TypeInt *ti = TypeInt::INT )
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228 : LoadNode(c,mem,adr,at,ti) {}
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229 virtual int Opcode() const;
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230 virtual uint ideal_reg() const { return Op_RegI; }
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231 virtual int store_Opcode() const { return Op_StoreI; }
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232 virtual BasicType memory_type() const { return T_INT; }
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233 };
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234
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235 //------------------------------LoadRangeNode----------------------------------
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236 // Load an array length from the array
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237 class LoadRangeNode : public LoadINode {
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238 public:
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239 LoadRangeNode( Node *c, Node *mem, Node *adr, const TypeInt *ti = TypeInt::POS )
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240 : LoadINode(c,mem,adr,TypeAryPtr::RANGE,ti) {}
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241 virtual int Opcode() const;
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242 virtual const Type *Value( PhaseTransform *phase ) const;
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243 virtual Node *Identity( PhaseTransform *phase );
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244 };
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245
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246 //------------------------------LoadLNode--------------------------------------
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247 // Load a long from memory
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248 class LoadLNode : public LoadNode {
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249 virtual uint hash() const { return LoadNode::hash() + _require_atomic_access; }
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250 virtual uint cmp( const Node &n ) const {
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251 return _require_atomic_access == ((LoadLNode&)n)._require_atomic_access
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252 && LoadNode::cmp(n);
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253 }
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254 virtual uint size_of() const { return sizeof(*this); }
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255 const bool _require_atomic_access; // is piecewise load forbidden?
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256
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257 public:
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258 LoadLNode( Node *c, Node *mem, Node *adr, const TypePtr* at,
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259 const TypeLong *tl = TypeLong::LONG,
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260 bool require_atomic_access = false )
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261 : LoadNode(c,mem,adr,at,tl)
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262 , _require_atomic_access(require_atomic_access)
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263 {}
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264 virtual int Opcode() const;
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265 virtual uint ideal_reg() const { return Op_RegL; }
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266 virtual int store_Opcode() const { return Op_StoreL; }
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267 virtual BasicType memory_type() const { return T_LONG; }
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268 bool require_atomic_access() { return _require_atomic_access; }
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269 static LoadLNode* make_atomic(Compile *C, Node* ctl, Node* mem, Node* adr, const TypePtr* adr_type, const Type* rt);
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270 #ifndef PRODUCT
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271 virtual void dump_spec(outputStream *st) const {
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272 LoadNode::dump_spec(st);
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273 if (_require_atomic_access) st->print(" Atomic!");
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274 }
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275 #endif
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276 };
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277
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278 //------------------------------LoadL_unalignedNode----------------------------
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279 // Load a long from unaligned memory
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280 class LoadL_unalignedNode : public LoadLNode {
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281 public:
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282 LoadL_unalignedNode( Node *c, Node *mem, Node *adr, const TypePtr* at )
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283 : LoadLNode(c,mem,adr,at) {}
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284 virtual int Opcode() const;
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285 };
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286
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287 //------------------------------LoadFNode--------------------------------------
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288 // Load a float (64 bits) from memory
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289 class LoadFNode : public LoadNode {
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290 public:
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291 LoadFNode( Node *c, Node *mem, Node *adr, const TypePtr* at, const Type *t = Type::FLOAT )
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292 : LoadNode(c,mem,adr,at,t) {}
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293 virtual int Opcode() const;
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294 virtual uint ideal_reg() const { return Op_RegF; }
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295 virtual int store_Opcode() const { return Op_StoreF; }
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296 virtual BasicType memory_type() const { return T_FLOAT; }
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297 };
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298
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299 //------------------------------LoadDNode--------------------------------------
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300 // Load a double (64 bits) from memory
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301 class LoadDNode : public LoadNode {
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302 public:
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303 LoadDNode( Node *c, Node *mem, Node *adr, const TypePtr* at, const Type *t = Type::DOUBLE )
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304 : LoadNode(c,mem,adr,at,t) {}
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305 virtual int Opcode() const;
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306 virtual uint ideal_reg() const { return Op_RegD; }
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307 virtual int store_Opcode() const { return Op_StoreD; }
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308 virtual BasicType memory_type() const { return T_DOUBLE; }
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309 };
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310
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311 //------------------------------LoadD_unalignedNode----------------------------
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312 // Load a double from unaligned memory
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313 class LoadD_unalignedNode : public LoadDNode {
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314 public:
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315 LoadD_unalignedNode( Node *c, Node *mem, Node *adr, const TypePtr* at )
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316 : LoadDNode(c,mem,adr,at) {}
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317 virtual int Opcode() const;
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318 };
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319
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320 //------------------------------LoadPNode--------------------------------------
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321 // Load a pointer from memory (either object or array)
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322 class LoadPNode : public LoadNode {
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323 public:
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324 LoadPNode( Node *c, Node *mem, Node *adr, const TypePtr *at, const TypePtr* t )
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325 : LoadNode(c,mem,adr,at,t) {}
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326 virtual int Opcode() const;
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327 virtual uint ideal_reg() const { return Op_RegP; }
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328 virtual int store_Opcode() const { return Op_StoreP; }
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329 virtual BasicType memory_type() const { return T_ADDRESS; }
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330 // depends_only_on_test is almost always true, and needs to be almost always
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331 // true to enable key hoisting & commoning optimizations. However, for the
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332 // special case of RawPtr loads from TLS top & end, the control edge carries
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333 // the dependence preventing hoisting past a Safepoint instead of the memory
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334 // edge. (An unfortunate consequence of having Safepoints not set Raw
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335 // Memory; itself an unfortunate consequence of having Nodes which produce
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336 // results (new raw memory state) inside of loops preventing all manner of
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337 // other optimizations). Basically, it's ugly but so is the alternative.
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338 // See comment in macro.cpp, around line 125 expand_allocate_common().
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339 virtual bool depends_only_on_test() const { return adr_type() != TypeRawPtr::BOTTOM; }
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340 };
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341
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342
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343 //------------------------------LoadNNode--------------------------------------
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344 // Load a narrow oop from memory (either object or array)
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345 class LoadNNode : public LoadNode {
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346 public:
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347 LoadNNode( Node *c, Node *mem, Node *adr, const TypePtr *at, const Type* t )
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348 : LoadNode(c,mem,adr,at,t) {}
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349 virtual int Opcode() const;
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350 virtual uint ideal_reg() const { return Op_RegN; }
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351 virtual int store_Opcode() const { return Op_StoreN; }
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352 virtual BasicType memory_type() const { return T_NARROWOOP; }
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353 // depends_only_on_test is almost always true, and needs to be almost always
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354 // true to enable key hoisting & commoning optimizations. However, for the
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355 // special case of RawPtr loads from TLS top & end, the control edge carries
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356 // the dependence preventing hoisting past a Safepoint instead of the memory
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357 // edge. (An unfortunate consequence of having Safepoints not set Raw
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358 // Memory; itself an unfortunate consequence of having Nodes which produce
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359 // results (new raw memory state) inside of loops preventing all manner of
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360 // other optimizations). Basically, it's ugly but so is the alternative.
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361 // See comment in macro.cpp, around line 125 expand_allocate_common().
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362 virtual bool depends_only_on_test() const { return adr_type() != TypeRawPtr::BOTTOM; }
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363 };
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364
0
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365 //------------------------------LoadKlassNode----------------------------------
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366 // Load a Klass from an object
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367 class LoadKlassNode : public LoadPNode {
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368 public:
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369 LoadKlassNode( Node *c, Node *mem, Node *adr, const TypePtr *at, const TypeKlassPtr *tk )
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370 : LoadPNode(c,mem,adr,at,tk) {}
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371 virtual int Opcode() const;
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372 virtual const Type *Value( PhaseTransform *phase ) const;
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373 virtual Node *Identity( PhaseTransform *phase );
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374 virtual bool depends_only_on_test() const { return true; }
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375
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376 // Polymorphic factory method:
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377 static Node* make( PhaseGVN& gvn, Node *mem, Node *adr, const TypePtr* at,
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378 const TypeKlassPtr *tk = TypeKlassPtr::OBJECT );
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379 };
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380
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381 //------------------------------LoadNKlassNode---------------------------------
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382 // Load a narrow Klass from an object.
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383 class LoadNKlassNode : public LoadNNode {
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384 public:
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385 LoadNKlassNode( Node *c, Node *mem, Node *adr, const TypePtr *at, const TypeNarrowOop *tk )
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386 : LoadNNode(c,mem,adr,at,tk) {}
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387 virtual int Opcode() const;
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388 virtual uint ideal_reg() const { return Op_RegN; }
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389 virtual int store_Opcode() const { return Op_StoreN; }
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390 virtual BasicType memory_type() const { return T_NARROWOOP; }
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391
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392 virtual const Type *Value( PhaseTransform *phase ) const;
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393 virtual Node *Identity( PhaseTransform *phase );
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394 virtual bool depends_only_on_test() const { return true; }
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395 };
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396
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397
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398 //------------------------------LoadSNode--------------------------------------
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399 // Load a short (16bits signed) from memory
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400 class LoadSNode : public LoadNode {
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401 public:
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402 LoadSNode( Node *c, Node *mem, Node *adr, const TypePtr* at, const TypeInt *ti = TypeInt::SHORT )
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403 : LoadNode(c,mem,adr,at,ti) {}
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404 virtual int Opcode() const;
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405 virtual uint ideal_reg() const { return Op_RegI; }
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406 virtual Node *Ideal(PhaseGVN *phase, bool can_reshape);
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407 virtual int store_Opcode() const { return Op_StoreC; }
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408 virtual BasicType memory_type() const { return T_SHORT; }
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409 };
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410
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411 //------------------------------StoreNode--------------------------------------
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412 // Store value; requires Store, Address and Value
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413 class StoreNode : public MemNode {
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414 protected:
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415 virtual uint cmp( const Node &n ) const;
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416 virtual bool depends_only_on_test() const { return false; }
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417
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418 Node *Ideal_masked_input (PhaseGVN *phase, uint mask);
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419 Node *Ideal_sign_extended_input(PhaseGVN *phase, int num_bits);
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420
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421 public:
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422 StoreNode( Node *c, Node *mem, Node *adr, const TypePtr* at, Node *val )
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423 : MemNode(c,mem,adr,at,val) {
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424 init_class_id(Class_Store);
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425 }
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426 StoreNode( Node *c, Node *mem, Node *adr, const TypePtr* at, Node *val, Node *oop_store )
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427 : MemNode(c,mem,adr,at,val,oop_store) {
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428 init_class_id(Class_Store);
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429 }
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430
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431 // Polymorphic factory method:
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432 static StoreNode* make( PhaseGVN& gvn, Node *c, Node *mem, Node *adr,
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433 const TypePtr* at, Node *val, BasicType bt );
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434
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435 virtual uint hash() const; // Check the type
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436
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437 // If the store is to Field memory and the pointer is non-null, we can
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438 // zero out the control input.
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439 virtual Node *Ideal(PhaseGVN *phase, bool can_reshape);
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440
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441 // Compute a new Type for this node. Basically we just do the pre-check,
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442 // then call the virtual add() to set the type.
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443 virtual const Type *Value( PhaseTransform *phase ) const;
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444
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445 // Check for identity function on memory (Load then Store at same address)
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446 virtual Node *Identity( PhaseTransform *phase );
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447
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448 // Do not match memory edge
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449 virtual uint match_edge(uint idx) const;
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450
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451 virtual const Type *bottom_type() const; // returns Type::MEMORY
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452
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453 // Map a store opcode to its corresponding own opcode, trivially.
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454 virtual int store_Opcode() const { return Opcode(); }
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455
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456 // have all possible loads of the value stored been optimized away?
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457 bool value_never_loaded(PhaseTransform *phase) const;
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458 };
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459
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460 //------------------------------StoreBNode-------------------------------------
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461 // Store byte to memory
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462 class StoreBNode : public StoreNode {
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463 public:
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464 StoreBNode( Node *c, Node *mem, Node *adr, const TypePtr* at, Node *val ) : StoreNode(c,mem,adr,at,val) {}
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465 virtual int Opcode() const;
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466 virtual Node *Ideal(PhaseGVN *phase, bool can_reshape);
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467 virtual BasicType memory_type() const { return T_BYTE; }
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468 };
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469
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470 //------------------------------StoreCNode-------------------------------------
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471 // Store char/short to memory
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472 class StoreCNode : public StoreNode {
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473 public:
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474 StoreCNode( Node *c, Node *mem, Node *adr, const TypePtr* at, Node *val ) : StoreNode(c,mem,adr,at,val) {}
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475 virtual int Opcode() const;
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476 virtual Node *Ideal(PhaseGVN *phase, bool can_reshape);
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477 virtual BasicType memory_type() const { return T_CHAR; }
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478 };
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479
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480 //------------------------------StoreINode-------------------------------------
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481 // Store int to memory
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482 class StoreINode : public StoreNode {
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483 public:
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484 StoreINode( Node *c, Node *mem, Node *adr, const TypePtr* at, Node *val ) : StoreNode(c,mem,adr,at,val) {}
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485 virtual int Opcode() const;
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486 virtual BasicType memory_type() const { return T_INT; }
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487 };
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488
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489 //------------------------------StoreLNode-------------------------------------
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490 // Store long to memory
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491 class StoreLNode : public StoreNode {
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492 virtual uint hash() const { return StoreNode::hash() + _require_atomic_access; }
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493 virtual uint cmp( const Node &n ) const {
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494 return _require_atomic_access == ((StoreLNode&)n)._require_atomic_access
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495 && StoreNode::cmp(n);
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496 }
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497 virtual uint size_of() const { return sizeof(*this); }
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498 const bool _require_atomic_access; // is piecewise store forbidden?
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499
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500 public:
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501 StoreLNode( Node *c, Node *mem, Node *adr, const TypePtr* at, Node *val,
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502 bool require_atomic_access = false )
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503 : StoreNode(c,mem,adr,at,val)
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504 , _require_atomic_access(require_atomic_access)
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505 {}
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506 virtual int Opcode() const;
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507 virtual BasicType memory_type() const { return T_LONG; }
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508 bool require_atomic_access() { return _require_atomic_access; }
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509 static StoreLNode* make_atomic(Compile *C, Node* ctl, Node* mem, Node* adr, const TypePtr* adr_type, Node* val);
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510 #ifndef PRODUCT
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511 virtual void dump_spec(outputStream *st) const {
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512 StoreNode::dump_spec(st);
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513 if (_require_atomic_access) st->print(" Atomic!");
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514 }
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515 #endif
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516 };
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517
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518 //------------------------------StoreFNode-------------------------------------
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519 // Store float to memory
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520 class StoreFNode : public StoreNode {
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521 public:
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522 StoreFNode( Node *c, Node *mem, Node *adr, const TypePtr* at, Node *val ) : StoreNode(c,mem,adr,at,val) {}
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523 virtual int Opcode() const;
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524 virtual BasicType memory_type() const { return T_FLOAT; }
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525 };
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526
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527 //------------------------------StoreDNode-------------------------------------
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528 // Store double to memory
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529 class StoreDNode : public StoreNode {
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530 public:
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531 StoreDNode( Node *c, Node *mem, Node *adr, const TypePtr* at, Node *val ) : StoreNode(c,mem,adr,at,val) {}
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532 virtual int Opcode() const;
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533 virtual BasicType memory_type() const { return T_DOUBLE; }
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534 };
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535
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536 //------------------------------StorePNode-------------------------------------
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537 // Store pointer to memory
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538 class StorePNode : public StoreNode {
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539 public:
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540 StorePNode( Node *c, Node *mem, Node *adr, const TypePtr* at, Node *val ) : StoreNode(c,mem,adr,at,val) {}
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541 virtual int Opcode() const;
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542 virtual BasicType memory_type() const { return T_ADDRESS; }
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543 };
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544
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545 //------------------------------StoreNNode-------------------------------------
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546 // Store narrow oop to memory
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547 class StoreNNode : public StoreNode {
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548 public:
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549 StoreNNode( Node *c, Node *mem, Node *adr, const TypePtr* at, Node *val ) : StoreNode(c,mem,adr,at,val) {}
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550 virtual int Opcode() const;
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551 virtual BasicType memory_type() const { return T_NARROWOOP; }
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552 };
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553
0
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554 //------------------------------StoreCMNode-----------------------------------
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555 // Store card-mark byte to memory for CM
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556 // The last StoreCM before a SafePoint must be preserved and occur after its "oop" store
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557 // Preceeding equivalent StoreCMs may be eliminated.
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558 class StoreCMNode : public StoreNode {
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559 public:
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560 StoreCMNode( Node *c, Node *mem, Node *adr, const TypePtr* at, Node *val, Node *oop_store ) : StoreNode(c,mem,adr,at,val,oop_store) {}
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561 virtual int Opcode() const;
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562 virtual Node *Identity( PhaseTransform *phase );
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563 virtual const Type *Value( PhaseTransform *phase ) const;
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564 virtual BasicType memory_type() const { return T_VOID; } // unspecific
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565 };
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566
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567 //------------------------------LoadPLockedNode---------------------------------
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568 // Load-locked a pointer from memory (either object or array).
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569 // On Sparc & Intel this is implemented as a normal pointer load.
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570 // On PowerPC and friends it's a real load-locked.
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571 class LoadPLockedNode : public LoadPNode {
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572 public:
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573 LoadPLockedNode( Node *c, Node *mem, Node *adr )
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574 : LoadPNode(c,mem,adr,TypeRawPtr::BOTTOM, TypeRawPtr::BOTTOM) {}
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575 virtual int Opcode() const;
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576 virtual int store_Opcode() const { return Op_StorePConditional; }
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577 virtual bool depends_only_on_test() const { return true; }
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578 };
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579
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580 //------------------------------LoadLLockedNode---------------------------------
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581 // Load-locked a pointer from memory (either object or array).
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582 // On Sparc & Intel this is implemented as a normal long load.
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583 class LoadLLockedNode : public LoadLNode {
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584 public:
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585 LoadLLockedNode( Node *c, Node *mem, Node *adr )
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586 : LoadLNode(c,mem,adr,TypeRawPtr::BOTTOM, TypeLong::LONG) {}
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587 virtual int Opcode() const;
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588 virtual int store_Opcode() const { return Op_StoreLConditional; }
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589 };
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590
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diff changeset
591 //------------------------------SCMemProjNode---------------------------------------
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592 // This class defines a projection of the memory state of a store conditional node.
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593 // These nodes return a value, but also update memory.
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594 class SCMemProjNode : public ProjNode {
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595 public:
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596 enum {SCMEMPROJCON = (uint)-2};
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597 SCMemProjNode( Node *src) : ProjNode( src, SCMEMPROJCON) { }
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598 virtual int Opcode() const;
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599 virtual bool is_CFG() const { return false; }
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600 virtual const Type *bottom_type() const {return Type::MEMORY;}
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601 virtual const TypePtr *adr_type() const { return in(0)->in(MemNode::Memory)->adr_type();}
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602 virtual uint ideal_reg() const { return 0;} // memory projections don't have a register
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603 virtual const Type *Value( PhaseTransform *phase ) const;
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604 #ifndef PRODUCT
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605 virtual void dump_spec(outputStream *st) const {};
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606 #endif
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607 };
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608
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609 //------------------------------LoadStoreNode---------------------------
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610 class LoadStoreNode : public Node {
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611 public:
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612 enum {
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613 ExpectedIn = MemNode::ValueIn+1 // One more input than MemNode
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614 };
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615 LoadStoreNode( Node *c, Node *mem, Node *adr, Node *val, Node *ex);
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616 virtual bool depends_only_on_test() const { return false; }
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617 virtual const Type *bottom_type() const { return TypeInt::BOOL; }
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618 virtual uint ideal_reg() const { return Op_RegI; }
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619 virtual uint match_edge(uint idx) const { return idx == MemNode::Address || idx == MemNode::ValueIn; }
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620 };
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621
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622 //------------------------------StorePConditionalNode---------------------------
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623 // Conditionally store pointer to memory, if no change since prior
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624 // load-locked. Sets flags for success or failure of the store.
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625 class StorePConditionalNode : public LoadStoreNode {
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626 public:
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627 StorePConditionalNode( Node *c, Node *mem, Node *adr, Node *val, Node *ll ) : LoadStoreNode(c, mem, adr, val, ll) { }
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628 virtual int Opcode() const;
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629 // Produces flags
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630 virtual uint ideal_reg() const { return Op_RegFlags; }
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631 };
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632
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633 //------------------------------StoreLConditionalNode---------------------------
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634 // Conditionally store long to memory, if no change since prior
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635 // load-locked. Sets flags for success or failure of the store.
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636 class StoreLConditionalNode : public LoadStoreNode {
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637 public:
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638 StoreLConditionalNode( Node *c, Node *mem, Node *adr, Node *val, Node *ll ) : LoadStoreNode(c, mem, adr, val, ll) { }
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639 virtual int Opcode() const;
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640 };
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641
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642
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643 //------------------------------CompareAndSwapLNode---------------------------
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644 class CompareAndSwapLNode : public LoadStoreNode {
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645 public:
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646 CompareAndSwapLNode( Node *c, Node *mem, Node *adr, Node *val, Node *ex) : LoadStoreNode(c, mem, adr, val, ex) { }
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647 virtual int Opcode() const;
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648 };
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649
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650
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651 //------------------------------CompareAndSwapINode---------------------------
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652 class CompareAndSwapINode : public LoadStoreNode {
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653 public:
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654 CompareAndSwapINode( Node *c, Node *mem, Node *adr, Node *val, Node *ex) : LoadStoreNode(c, mem, adr, val, ex) { }
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655 virtual int Opcode() const;
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656 };
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657
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658
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659 //------------------------------CompareAndSwapPNode---------------------------
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660 class CompareAndSwapPNode : public LoadStoreNode {
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661 public:
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662 CompareAndSwapPNode( Node *c, Node *mem, Node *adr, Node *val, Node *ex) : LoadStoreNode(c, mem, adr, val, ex) { }
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663 virtual int Opcode() const;
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diff changeset
664 };
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diff changeset
665
113
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666 //------------------------------CompareAndSwapNNode---------------------------
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diff changeset
667 class CompareAndSwapNNode : public LoadStoreNode {
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diff changeset
668 public:
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diff changeset
669 CompareAndSwapNNode( Node *c, Node *mem, Node *adr, Node *val, Node *ex) : LoadStoreNode(c, mem, adr, val, ex) { }
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diff changeset
670 virtual int Opcode() const;
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diff changeset
671 };
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diff changeset
672
0
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673 //------------------------------ClearArray-------------------------------------
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674 class ClearArrayNode: public Node {
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675 public:
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676 ClearArrayNode( Node *ctrl, Node *arymem, Node *word_cnt, Node *base ) : Node(ctrl,arymem,word_cnt,base) {}
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677 virtual int Opcode() const;
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diff changeset
678 virtual const Type *bottom_type() const { return Type::MEMORY; }
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diff changeset
679 // ClearArray modifies array elements, and so affects only the
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diff changeset
680 // array memory addressed by the bottom_type of its base address.
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681 virtual const class TypePtr *adr_type() const;
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diff changeset
682 virtual Node *Identity( PhaseTransform *phase );
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diff changeset
683 virtual Node *Ideal(PhaseGVN *phase, bool can_reshape);
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684 virtual uint match_edge(uint idx) const;
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685
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diff changeset
686 // Clear the given area of an object or array.
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diff changeset
687 // The start offset must always be aligned mod BytesPerInt.
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diff changeset
688 // The end offset must always be aligned mod BytesPerLong.
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parents:
diff changeset
689 // Return the new memory.
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diff changeset
690 static Node* clear_memory(Node* control, Node* mem, Node* dest,
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diff changeset
691 intptr_t start_offset,
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diff changeset
692 intptr_t end_offset,
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diff changeset
693 PhaseGVN* phase);
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diff changeset
694 static Node* clear_memory(Node* control, Node* mem, Node* dest,
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diff changeset
695 intptr_t start_offset,
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diff changeset
696 Node* end_offset,
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diff changeset
697 PhaseGVN* phase);
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diff changeset
698 static Node* clear_memory(Node* control, Node* mem, Node* dest,
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699 Node* start_offset,
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diff changeset
700 Node* end_offset,
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diff changeset
701 PhaseGVN* phase);
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diff changeset
702 };
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diff changeset
703
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704 //------------------------------StrComp-------------------------------------
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705 class StrCompNode: public Node {
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diff changeset
706 public:
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diff changeset
707 StrCompNode(Node *control,
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diff changeset
708 Node* char_array_mem,
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diff changeset
709 Node* value_mem,
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diff changeset
710 Node* count_mem,
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diff changeset
711 Node* offset_mem,
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diff changeset
712 Node* s1, Node* s2): Node(control,
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diff changeset
713 char_array_mem,
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diff changeset
714 value_mem,
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diff changeset
715 count_mem,
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diff changeset
716 offset_mem,
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diff changeset
717 s1, s2) {};
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diff changeset
718 virtual int Opcode() const;
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diff changeset
719 virtual bool depends_only_on_test() const { return false; }
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diff changeset
720 virtual const Type* bottom_type() const { return TypeInt::INT; }
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diff changeset
721 // a StrCompNode (conservatively) aliases with everything:
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diff changeset
722 virtual const TypePtr* adr_type() const { return TypePtr::BOTTOM; }
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diff changeset
723 virtual uint match_edge(uint idx) const;
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diff changeset
724 virtual uint ideal_reg() const { return Op_RegI; }
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diff changeset
725 virtual Node *Ideal(PhaseGVN *phase, bool can_reshape);
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diff changeset
726 };
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diff changeset
727
169
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diff changeset
728 //------------------------------AryEq---------------------------------------
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diff changeset
729 class AryEqNode: public Node {
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diff changeset
730 public:
9148c65abefc 6695049: (coll) Create an x86 intrinsic for Arrays.equals
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diff changeset
731 AryEqNode(Node *control, Node* s1, Node* s2): Node(control, s1, s2) {};
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diff changeset
732 virtual int Opcode() const;
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diff changeset
733 virtual bool depends_only_on_test() const { return false; }
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diff changeset
734 virtual const Type* bottom_type() const { return TypeInt::BOOL; }
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diff changeset
735 virtual const TypePtr* adr_type() const { return TypeAryPtr::CHARS; }
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diff changeset
736 virtual uint ideal_reg() const { return Op_RegI; }
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diff changeset
737 virtual Node *Ideal(PhaseGVN *phase, bool can_reshape);
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diff changeset
738 };
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diff changeset
739
0
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740 //------------------------------MemBar-----------------------------------------
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diff changeset
741 // There are different flavors of Memory Barriers to match the Java Memory
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diff changeset
742 // Model. Monitor-enter and volatile-load act as Aquires: no following ref
a61af66fc99e Initial load
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diff changeset
743 // can be moved to before them. We insert a MemBar-Acquire after a FastLock or
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diff changeset
744 // volatile-load. Monitor-exit and volatile-store act as Release: no
a61af66fc99e Initial load
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parents:
diff changeset
745 // preceeding ref can be moved to after them. We insert a MemBar-Release
a61af66fc99e Initial load
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diff changeset
746 // before a FastUnlock or volatile-store. All volatiles need to be
a61af66fc99e Initial load
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diff changeset
747 // serialized, so we follow all volatile-stores with a MemBar-Volatile to
a61af66fc99e Initial load
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diff changeset
748 // seperate it from any following volatile-load.
a61af66fc99e Initial load
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diff changeset
749 class MemBarNode: public MultiNode {
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diff changeset
750 virtual uint hash() const ; // { return NO_HASH; }
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diff changeset
751 virtual uint cmp( const Node &n ) const ; // Always fail, except on self
a61af66fc99e Initial load
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diff changeset
752
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diff changeset
753 virtual uint size_of() const { return sizeof(*this); }
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diff changeset
754 // Memory type this node is serializing. Usually either rawptr or bottom.
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diff changeset
755 const TypePtr* _adr_type;
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diff changeset
756
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diff changeset
757 public:
a61af66fc99e Initial load
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diff changeset
758 enum {
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diff changeset
759 Precedent = TypeFunc::Parms // optional edge to force precedence
a61af66fc99e Initial load
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diff changeset
760 };
a61af66fc99e Initial load
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diff changeset
761 MemBarNode(Compile* C, int alias_idx, Node* precedent);
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diff changeset
762 virtual int Opcode() const = 0;
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diff changeset
763 virtual const class TypePtr *adr_type() const { return _adr_type; }
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diff changeset
764 virtual const Type *Value( PhaseTransform *phase ) const;
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diff changeset
765 virtual Node *Ideal(PhaseGVN *phase, bool can_reshape);
a61af66fc99e Initial load
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diff changeset
766 virtual uint match_edge(uint idx) const { return 0; }
a61af66fc99e Initial load
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diff changeset
767 virtual const Type *bottom_type() const { return TypeTuple::MEMBAR; }
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diff changeset
768 virtual Node *match( const ProjNode *proj, const Matcher *m );
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diff changeset
769 // Factory method. Builds a wide or narrow membar.
a61af66fc99e Initial load
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diff changeset
770 // Optional 'precedent' becomes an extra edge if not null.
a61af66fc99e Initial load
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diff changeset
771 static MemBarNode* make(Compile* C, int opcode,
a61af66fc99e Initial load
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diff changeset
772 int alias_idx = Compile::AliasIdxBot,
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diff changeset
773 Node* precedent = NULL);
a61af66fc99e Initial load
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diff changeset
774 };
a61af66fc99e Initial load
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diff changeset
775
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diff changeset
776 // "Acquire" - no following ref can move before (but earlier refs can
a61af66fc99e Initial load
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diff changeset
777 // follow, like an early Load stalled in cache). Requires multi-cpu
a61af66fc99e Initial load
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diff changeset
778 // visibility. Inserted after a volatile load or FastLock.
a61af66fc99e Initial load
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diff changeset
779 class MemBarAcquireNode: public MemBarNode {
a61af66fc99e Initial load
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diff changeset
780 public:
a61af66fc99e Initial load
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diff changeset
781 MemBarAcquireNode(Compile* C, int alias_idx, Node* precedent)
a61af66fc99e Initial load
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diff changeset
782 : MemBarNode(C, alias_idx, precedent) {}
a61af66fc99e Initial load
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783 virtual int Opcode() const;
a61af66fc99e Initial load
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diff changeset
784 };
a61af66fc99e Initial load
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diff changeset
785
a61af66fc99e Initial load
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diff changeset
786 // "Release" - no earlier ref can move after (but later refs can move
a61af66fc99e Initial load
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diff changeset
787 // up, like a speculative pipelined cache-hitting Load). Requires
a61af66fc99e Initial load
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parents:
diff changeset
788 // multi-cpu visibility. Inserted before a volatile store or FastUnLock.
a61af66fc99e Initial load
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diff changeset
789 class MemBarReleaseNode: public MemBarNode {
a61af66fc99e Initial load
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diff changeset
790 public:
a61af66fc99e Initial load
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diff changeset
791 MemBarReleaseNode(Compile* C, int alias_idx, Node* precedent)
a61af66fc99e Initial load
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diff changeset
792 : MemBarNode(C, alias_idx, precedent) {}
a61af66fc99e Initial load
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793 virtual int Opcode() const;
a61af66fc99e Initial load
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diff changeset
794 };
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diff changeset
795
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diff changeset
796 // Ordering between a volatile store and a following volatile load.
a61af66fc99e Initial load
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parents:
diff changeset
797 // Requires multi-CPU visibility?
a61af66fc99e Initial load
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diff changeset
798 class MemBarVolatileNode: public MemBarNode {
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diff changeset
799 public:
a61af66fc99e Initial load
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diff changeset
800 MemBarVolatileNode(Compile* C, int alias_idx, Node* precedent)
a61af66fc99e Initial load
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diff changeset
801 : MemBarNode(C, alias_idx, precedent) {}
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parents:
diff changeset
802 virtual int Opcode() const;
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parents:
diff changeset
803 };
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parents:
diff changeset
804
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parents:
diff changeset
805 // Ordering within the same CPU. Used to order unsafe memory references
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parents:
diff changeset
806 // inside the compiler when we lack alias info. Not needed "outside" the
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parents:
diff changeset
807 // compiler because the CPU does all the ordering for us.
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parents:
diff changeset
808 class MemBarCPUOrderNode: public MemBarNode {
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parents:
diff changeset
809 public:
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parents:
diff changeset
810 MemBarCPUOrderNode(Compile* C, int alias_idx, Node* precedent)
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parents:
diff changeset
811 : MemBarNode(C, alias_idx, precedent) {}
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parents:
diff changeset
812 virtual int Opcode() const;
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parents:
diff changeset
813 virtual uint ideal_reg() const { return 0; } // not matched in the AD file
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parents:
diff changeset
814 };
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parents:
diff changeset
815
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parents:
diff changeset
816 // Isolation of object setup after an AllocateNode and before next safepoint.
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parents:
diff changeset
817 // (See comment in memnode.cpp near InitializeNode::InitializeNode for semantics.)
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parents:
diff changeset
818 class InitializeNode: public MemBarNode {
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parents:
diff changeset
819 friend class AllocateNode;
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parents:
diff changeset
820
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parents:
diff changeset
821 bool _is_complete;
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parents:
diff changeset
822
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parents:
diff changeset
823 public:
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parents:
diff changeset
824 enum {
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parents:
diff changeset
825 Control = TypeFunc::Control,
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parents:
diff changeset
826 Memory = TypeFunc::Memory, // MergeMem for states affected by this op
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parents:
diff changeset
827 RawAddress = TypeFunc::Parms+0, // the newly-allocated raw address
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parents:
diff changeset
828 RawStores = TypeFunc::Parms+1 // zero or more stores (or TOP)
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parents:
diff changeset
829 };
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parents:
diff changeset
830
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parents:
diff changeset
831 InitializeNode(Compile* C, int adr_type, Node* rawoop);
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parents:
diff changeset
832 virtual int Opcode() const;
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parents:
diff changeset
833 virtual uint size_of() const { return sizeof(*this); }
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parents:
diff changeset
834 virtual uint ideal_reg() const { return 0; } // not matched in the AD file
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parents:
diff changeset
835 virtual const RegMask &in_RegMask(uint) const; // mask for RawAddress
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diff changeset
836
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parents:
diff changeset
837 // Manage incoming memory edges via a MergeMem on in(Memory):
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parents:
diff changeset
838 Node* memory(uint alias_idx);
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parents:
diff changeset
839
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parents:
diff changeset
840 // The raw memory edge coming directly from the Allocation.
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parents:
diff changeset
841 // The contents of this memory are *always* all-zero-bits.
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parents:
diff changeset
842 Node* zero_memory() { return memory(Compile::AliasIdxRaw); }
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parents:
diff changeset
843
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parents:
diff changeset
844 // Return the corresponding allocation for this initialization (or null if none).
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parents:
diff changeset
845 // (Note: Both InitializeNode::allocation and AllocateNode::initialization
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parents:
diff changeset
846 // are defined in graphKit.cpp, which sets up the bidirectional relation.)
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parents:
diff changeset
847 AllocateNode* allocation();
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parents:
diff changeset
848
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parents:
diff changeset
849 // Anything other than zeroing in this init?
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parents:
diff changeset
850 bool is_non_zero();
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parents:
diff changeset
851
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parents:
diff changeset
852 // An InitializeNode must completed before macro expansion is done.
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parents:
diff changeset
853 // Completion requires that the AllocateNode must be followed by
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parents:
diff changeset
854 // initialization of the new memory to zero, then to any initializers.
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parents:
diff changeset
855 bool is_complete() { return _is_complete; }
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parents:
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856
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parents:
diff changeset
857 // Mark complete. (Must not yet be complete.)
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parents:
diff changeset
858 void set_complete(PhaseGVN* phase);
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parents:
diff changeset
859
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parents:
diff changeset
860 #ifdef ASSERT
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parents:
diff changeset
861 // ensure all non-degenerate stores are ordered and non-overlapping
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parents:
diff changeset
862 bool stores_are_sane(PhaseTransform* phase);
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parents:
diff changeset
863 #endif //ASSERT
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parents:
diff changeset
864
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parents:
diff changeset
865 // See if this store can be captured; return offset where it initializes.
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parents:
diff changeset
866 // Return 0 if the store cannot be moved (any sort of problem).
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parents:
diff changeset
867 intptr_t can_capture_store(StoreNode* st, PhaseTransform* phase);
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parents:
diff changeset
868
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parents:
diff changeset
869 // Capture another store; reformat it to write my internal raw memory.
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parents:
diff changeset
870 // Return the captured copy, else NULL if there is some sort of problem.
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parents:
diff changeset
871 Node* capture_store(StoreNode* st, intptr_t start, PhaseTransform* phase);
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parents:
diff changeset
872
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parents:
diff changeset
873 // Find captured store which corresponds to the range [start..start+size).
a61af66fc99e Initial load
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parents:
diff changeset
874 // Return my own memory projection (meaning the initial zero bits)
a61af66fc99e Initial load
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parents:
diff changeset
875 // if there is no such store. Return NULL if there is a problem.
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parents:
diff changeset
876 Node* find_captured_store(intptr_t start, int size_in_bytes, PhaseTransform* phase);
a61af66fc99e Initial load
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parents:
diff changeset
877
a61af66fc99e Initial load
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parents:
diff changeset
878 // Called when the associated AllocateNode is expanded into CFG.
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parents:
diff changeset
879 Node* complete_stores(Node* rawctl, Node* rawmem, Node* rawptr,
a61af66fc99e Initial load
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parents:
diff changeset
880 intptr_t header_size, Node* size_in_bytes,
a61af66fc99e Initial load
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parents:
diff changeset
881 PhaseGVN* phase);
a61af66fc99e Initial load
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parents:
diff changeset
882
a61af66fc99e Initial load
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parents:
diff changeset
883 private:
a61af66fc99e Initial load
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parents:
diff changeset
884 void remove_extra_zeroes();
a61af66fc99e Initial load
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parents:
diff changeset
885
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parents:
diff changeset
886 // Find out where a captured store should be placed (or already is placed).
a61af66fc99e Initial load
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parents:
diff changeset
887 int captured_store_insertion_point(intptr_t start, int size_in_bytes,
a61af66fc99e Initial load
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parents:
diff changeset
888 PhaseTransform* phase);
a61af66fc99e Initial load
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parents:
diff changeset
889
a61af66fc99e Initial load
duke
parents:
diff changeset
890 static intptr_t get_store_offset(Node* st, PhaseTransform* phase);
a61af66fc99e Initial load
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parents:
diff changeset
891
a61af66fc99e Initial load
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parents:
diff changeset
892 Node* make_raw_address(intptr_t offset, PhaseTransform* phase);
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parents:
diff changeset
893
a61af66fc99e Initial load
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parents:
diff changeset
894 bool detect_init_independence(Node* n, bool st_is_pinned, int& count);
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parents:
diff changeset
895
a61af66fc99e Initial load
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parents:
diff changeset
896 void coalesce_subword_stores(intptr_t header_size, Node* size_in_bytes,
a61af66fc99e Initial load
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parents:
diff changeset
897 PhaseGVN* phase);
a61af66fc99e Initial load
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parents:
diff changeset
898
a61af66fc99e Initial load
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parents:
diff changeset
899 intptr_t find_next_fullword_store(uint i, PhaseGVN* phase);
a61af66fc99e Initial load
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parents:
diff changeset
900 };
a61af66fc99e Initial load
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parents:
diff changeset
901
a61af66fc99e Initial load
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parents:
diff changeset
902 //------------------------------MergeMem---------------------------------------
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parents:
diff changeset
903 // (See comment in memnode.cpp near MergeMemNode::MergeMemNode for semantics.)
a61af66fc99e Initial load
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parents:
diff changeset
904 class MergeMemNode: public Node {
a61af66fc99e Initial load
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parents:
diff changeset
905 virtual uint hash() const ; // { return NO_HASH; }
a61af66fc99e Initial load
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parents:
diff changeset
906 virtual uint cmp( const Node &n ) const ; // Always fail, except on self
a61af66fc99e Initial load
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parents:
diff changeset
907 friend class MergeMemStream;
a61af66fc99e Initial load
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parents:
diff changeset
908 MergeMemNode(Node* def); // clients use MergeMemNode::make
a61af66fc99e Initial load
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parents:
diff changeset
909
a61af66fc99e Initial load
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parents:
diff changeset
910 public:
a61af66fc99e Initial load
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parents:
diff changeset
911 // If the input is a whole memory state, clone it with all its slices intact.
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parents:
diff changeset
912 // Otherwise, make a new memory state with just that base memory input.
a61af66fc99e Initial load
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parents:
diff changeset
913 // In either case, the result is a newly created MergeMem.
a61af66fc99e Initial load
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parents:
diff changeset
914 static MergeMemNode* make(Compile* C, Node* base_memory);
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parents:
diff changeset
915
a61af66fc99e Initial load
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parents:
diff changeset
916 virtual int Opcode() const;
a61af66fc99e Initial load
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parents:
diff changeset
917 virtual Node *Identity( PhaseTransform *phase );
a61af66fc99e Initial load
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parents:
diff changeset
918 virtual Node *Ideal(PhaseGVN *phase, bool can_reshape);
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parents:
diff changeset
919 virtual uint ideal_reg() const { return NotAMachineReg; }
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parents:
diff changeset
920 virtual uint match_edge(uint idx) const { return 0; }
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parents:
diff changeset
921 virtual const RegMask &out_RegMask() const;
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parents:
diff changeset
922 virtual const Type *bottom_type() const { return Type::MEMORY; }
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parents:
diff changeset
923 virtual const TypePtr *adr_type() const { return TypePtr::BOTTOM; }
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parents:
diff changeset
924 // sparse accessors
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parents:
diff changeset
925 // Fetch the previously stored "set_memory_at", or else the base memory.
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parents:
diff changeset
926 // (Caller should clone it if it is a phi-nest.)
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parents:
diff changeset
927 Node* memory_at(uint alias_idx) const;
a61af66fc99e Initial load
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parents:
diff changeset
928 // set the memory, regardless of its previous value
a61af66fc99e Initial load
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parents:
diff changeset
929 void set_memory_at(uint alias_idx, Node* n);
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parents:
diff changeset
930 // the "base" is the memory that provides the non-finite support
a61af66fc99e Initial load
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parents:
diff changeset
931 Node* base_memory() const { return in(Compile::AliasIdxBot); }
a61af66fc99e Initial load
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parents:
diff changeset
932 // warning: setting the base can implicitly set any of the other slices too
a61af66fc99e Initial load
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parents:
diff changeset
933 void set_base_memory(Node* def);
a61af66fc99e Initial load
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parents:
diff changeset
934 // sentinel value which denotes a copy of the base memory:
a61af66fc99e Initial load
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parents:
diff changeset
935 Node* empty_memory() const { return in(Compile::AliasIdxTop); }
a61af66fc99e Initial load
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parents:
diff changeset
936 static Node* make_empty_memory(); // where the sentinel comes from
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parents:
diff changeset
937 bool is_empty_memory(Node* n) const { assert((n == empty_memory()) == n->is_top(), "sanity"); return n->is_top(); }
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parents:
diff changeset
938 // hook for the iterator, to perform any necessary setup
a61af66fc99e Initial load
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parents:
diff changeset
939 void iteration_setup(const MergeMemNode* other = NULL);
a61af66fc99e Initial load
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parents:
diff changeset
940 // push sentinels until I am at least as long as the other (semantic no-op)
a61af66fc99e Initial load
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parents:
diff changeset
941 void grow_to_match(const MergeMemNode* other);
a61af66fc99e Initial load
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parents:
diff changeset
942 bool verify_sparse() const PRODUCT_RETURN0;
a61af66fc99e Initial load
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parents:
diff changeset
943 #ifndef PRODUCT
a61af66fc99e Initial load
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parents:
diff changeset
944 virtual void dump_spec(outputStream *st) const;
a61af66fc99e Initial load
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parents:
diff changeset
945 #endif
a61af66fc99e Initial load
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parents:
diff changeset
946 };
a61af66fc99e Initial load
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parents:
diff changeset
947
a61af66fc99e Initial load
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parents:
diff changeset
948 class MergeMemStream : public StackObj {
a61af66fc99e Initial load
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parents:
diff changeset
949 private:
a61af66fc99e Initial load
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parents:
diff changeset
950 MergeMemNode* _mm;
a61af66fc99e Initial load
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parents:
diff changeset
951 const MergeMemNode* _mm2; // optional second guy, contributes non-empty iterations
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parents:
diff changeset
952 Node* _mm_base; // loop-invariant base memory of _mm
a61af66fc99e Initial load
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parents:
diff changeset
953 int _idx;
a61af66fc99e Initial load
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parents:
diff changeset
954 int _cnt;
a61af66fc99e Initial load
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parents:
diff changeset
955 Node* _mem;
a61af66fc99e Initial load
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parents:
diff changeset
956 Node* _mem2;
a61af66fc99e Initial load
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parents:
diff changeset
957 int _cnt2;
a61af66fc99e Initial load
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parents:
diff changeset
958
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parents:
diff changeset
959 void init(MergeMemNode* mm, const MergeMemNode* mm2 = NULL) {
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parents:
diff changeset
960 // subsume_node will break sparseness at times, whenever a memory slice
a61af66fc99e Initial load
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parents:
diff changeset
961 // folds down to a copy of the base ("fat") memory. In such a case,
a61af66fc99e Initial load
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parents:
diff changeset
962 // the raw edge will update to base, although it should be top.
a61af66fc99e Initial load
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parents:
diff changeset
963 // This iterator will recognize either top or base_memory as an
a61af66fc99e Initial load
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parents:
diff changeset
964 // "empty" slice. See is_empty, is_empty2, and next below.
a61af66fc99e Initial load
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parents:
diff changeset
965 //
a61af66fc99e Initial load
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parents:
diff changeset
966 // The sparseness property is repaired in MergeMemNode::Ideal.
a61af66fc99e Initial load
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parents:
diff changeset
967 // As long as access to a MergeMem goes through this iterator
a61af66fc99e Initial load
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parents:
diff changeset
968 // or the memory_at accessor, flaws in the sparseness will
a61af66fc99e Initial load
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parents:
diff changeset
969 // never be observed.
a61af66fc99e Initial load
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parents:
diff changeset
970 //
a61af66fc99e Initial load
duke
parents:
diff changeset
971 // Also, iteration_setup repairs sparseness.
a61af66fc99e Initial load
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parents:
diff changeset
972 assert(mm->verify_sparse(), "please, no dups of base");
a61af66fc99e Initial load
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parents:
diff changeset
973 assert(mm2==NULL || mm2->verify_sparse(), "please, no dups of base");
a61af66fc99e Initial load
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parents:
diff changeset
974
a61af66fc99e Initial load
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parents:
diff changeset
975 _mm = mm;
a61af66fc99e Initial load
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parents:
diff changeset
976 _mm_base = mm->base_memory();
a61af66fc99e Initial load
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parents:
diff changeset
977 _mm2 = mm2;
a61af66fc99e Initial load
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parents:
diff changeset
978 _cnt = mm->req();
a61af66fc99e Initial load
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parents:
diff changeset
979 _idx = Compile::AliasIdxBot-1; // start at the base memory
a61af66fc99e Initial load
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parents:
diff changeset
980 _mem = NULL;
a61af66fc99e Initial load
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parents:
diff changeset
981 _mem2 = NULL;
a61af66fc99e Initial load
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parents:
diff changeset
982 }
a61af66fc99e Initial load
duke
parents:
diff changeset
983
a61af66fc99e Initial load
duke
parents:
diff changeset
984 #ifdef ASSERT
a61af66fc99e Initial load
duke
parents:
diff changeset
985 Node* check_memory() const {
a61af66fc99e Initial load
duke
parents:
diff changeset
986 if (at_base_memory())
a61af66fc99e Initial load
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parents:
diff changeset
987 return _mm->base_memory();
a61af66fc99e Initial load
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parents:
diff changeset
988 else if ((uint)_idx < _mm->req() && !_mm->in(_idx)->is_top())
a61af66fc99e Initial load
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parents:
diff changeset
989 return _mm->memory_at(_idx);
a61af66fc99e Initial load
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parents:
diff changeset
990 else
a61af66fc99e Initial load
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parents:
diff changeset
991 return _mm_base;
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parents:
diff changeset
992 }
a61af66fc99e Initial load
duke
parents:
diff changeset
993 Node* check_memory2() const {
a61af66fc99e Initial load
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parents:
diff changeset
994 return at_base_memory()? _mm2->base_memory(): _mm2->memory_at(_idx);
a61af66fc99e Initial load
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parents:
diff changeset
995 }
a61af66fc99e Initial load
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parents:
diff changeset
996 #endif
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parents:
diff changeset
997
a61af66fc99e Initial load
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parents:
diff changeset
998 static bool match_memory(Node* mem, const MergeMemNode* mm, int idx) PRODUCT_RETURN0;
a61af66fc99e Initial load
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parents:
diff changeset
999 void assert_synch() const {
a61af66fc99e Initial load
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parents:
diff changeset
1000 assert(!_mem || _idx >= _cnt || match_memory(_mem, _mm, _idx),
a61af66fc99e Initial load
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parents:
diff changeset
1001 "no side-effects except through the stream");
a61af66fc99e Initial load
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parents:
diff changeset
1002 }
a61af66fc99e Initial load
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parents:
diff changeset
1003
a61af66fc99e Initial load
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parents:
diff changeset
1004 public:
a61af66fc99e Initial load
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parents:
diff changeset
1005
a61af66fc99e Initial load
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parents:
diff changeset
1006 // expected usages:
a61af66fc99e Initial load
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parents:
diff changeset
1007 // for (MergeMemStream mms(mem->is_MergeMem()); next_non_empty(); ) { ... }
a61af66fc99e Initial load
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parents:
diff changeset
1008 // for (MergeMemStream mms(mem1, mem2); next_non_empty2(); ) { ... }
a61af66fc99e Initial load
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parents:
diff changeset
1009
a61af66fc99e Initial load
duke
parents:
diff changeset
1010 // iterate over one merge
a61af66fc99e Initial load
duke
parents:
diff changeset
1011 MergeMemStream(MergeMemNode* mm) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1012 mm->iteration_setup();
a61af66fc99e Initial load
duke
parents:
diff changeset
1013 init(mm);
a61af66fc99e Initial load
duke
parents:
diff changeset
1014 debug_only(_cnt2 = 999);
a61af66fc99e Initial load
duke
parents:
diff changeset
1015 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1016 // iterate in parallel over two merges
a61af66fc99e Initial load
duke
parents:
diff changeset
1017 // only iterates through non-empty elements of mm2
a61af66fc99e Initial load
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parents:
diff changeset
1018 MergeMemStream(MergeMemNode* mm, const MergeMemNode* mm2) {
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parents:
diff changeset
1019 assert(mm2, "second argument must be a MergeMem also");
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parents:
diff changeset
1020 ((MergeMemNode*)mm2)->iteration_setup(); // update hidden state
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parents:
diff changeset
1021 mm->iteration_setup(mm2);
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parents:
diff changeset
1022 init(mm, mm2);
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parents:
diff changeset
1023 _cnt2 = mm2->req();
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1024 }
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parents:
diff changeset
1025 #ifdef ASSERT
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parents:
diff changeset
1026 ~MergeMemStream() {
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parents:
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1027 assert_synch();
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parents:
diff changeset
1028 }
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parents:
diff changeset
1029 #endif
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parents:
diff changeset
1030
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parents:
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1031 MergeMemNode* all_memory() const {
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parents:
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1032 return _mm;
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parents:
diff changeset
1033 }
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parents:
diff changeset
1034 Node* base_memory() const {
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parents:
diff changeset
1035 assert(_mm_base == _mm->base_memory(), "no update to base memory, please");
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parents:
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1036 return _mm_base;
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parents:
diff changeset
1037 }
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parents:
diff changeset
1038 const MergeMemNode* all_memory2() const {
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parents:
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1039 assert(_mm2 != NULL, "");
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parents:
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1040 return _mm2;
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parents:
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1041 }
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parents:
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1042 bool at_base_memory() const {
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parents:
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1043 return _idx == Compile::AliasIdxBot;
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parents:
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1044 }
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parents:
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1045 int alias_idx() const {
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parents:
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1046 assert(_mem, "must call next 1st");
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parents:
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1047 return _idx;
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parents:
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1048 }
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parents:
diff changeset
1049
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parents:
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1050 const TypePtr* adr_type() const {
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parents:
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1051 return Compile::current()->get_adr_type(alias_idx());
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1052 }
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parents:
diff changeset
1053
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parents:
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1054 const TypePtr* adr_type(Compile* C) const {
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parents:
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1055 return C->get_adr_type(alias_idx());
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parents:
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1056 }
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parents:
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1057 bool is_empty() const {
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parents:
diff changeset
1058 assert(_mem, "must call next 1st");
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parents:
diff changeset
1059 assert(_mem->is_top() == (_mem==_mm->empty_memory()), "correct sentinel");
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parents:
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1060 return _mem->is_top();
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parents:
diff changeset
1061 }
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parents:
diff changeset
1062 bool is_empty2() const {
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parents:
diff changeset
1063 assert(_mem2, "must call next 1st");
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parents:
diff changeset
1064 assert(_mem2->is_top() == (_mem2==_mm2->empty_memory()), "correct sentinel");
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parents:
diff changeset
1065 return _mem2->is_top();
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parents:
diff changeset
1066 }
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parents:
diff changeset
1067 Node* memory() const {
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parents:
diff changeset
1068 assert(!is_empty(), "must not be empty");
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parents:
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1069 assert_synch();
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parents:
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1070 return _mem;
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parents:
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1071 }
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parents:
diff changeset
1072 // get the current memory, regardless of empty or non-empty status
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parents:
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1073 Node* force_memory() const {
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parents:
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1074 assert(!is_empty() || !at_base_memory(), "");
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parents:
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1075 // Use _mm_base to defend against updates to _mem->base_memory().
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parents:
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1076 Node *mem = _mem->is_top() ? _mm_base : _mem;
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parents:
diff changeset
1077 assert(mem == check_memory(), "");
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parents:
diff changeset
1078 return mem;
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parents:
diff changeset
1079 }
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parents:
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1080 Node* memory2() const {
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parents:
diff changeset
1081 assert(_mem2 == check_memory2(), "");
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parents:
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1082 return _mem2;
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parents:
diff changeset
1083 }
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parents:
diff changeset
1084 void set_memory(Node* mem) {
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parents:
diff changeset
1085 if (at_base_memory()) {
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parents:
diff changeset
1086 // Note that this does not change the invariant _mm_base.
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parents:
diff changeset
1087 _mm->set_base_memory(mem);
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parents:
diff changeset
1088 } else {
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parents:
diff changeset
1089 _mm->set_memory_at(_idx, mem);
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parents:
diff changeset
1090 }
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parents:
diff changeset
1091 _mem = mem;
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parents:
diff changeset
1092 assert_synch();
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parents:
diff changeset
1093 }
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parents:
diff changeset
1094
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parents:
diff changeset
1095 // Recover from a side effect to the MergeMemNode.
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parents:
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1096 void set_memory() {
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parents:
diff changeset
1097 _mem = _mm->in(_idx);
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parents:
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1098 }
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parents:
diff changeset
1099
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parents:
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1100 bool next() { return next(false); }
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parents:
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1101 bool next2() { return next(true); }
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parents:
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1102
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parents:
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1103 bool next_non_empty() { return next_non_empty(false); }
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parents:
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1104 bool next_non_empty2() { return next_non_empty(true); }
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parents:
diff changeset
1105 // next_non_empty2 can yield states where is_empty() is true
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parents:
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1106
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parents:
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1107 private:
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parents:
diff changeset
1108 // find the next item, which might be empty
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parents:
diff changeset
1109 bool next(bool have_mm2) {
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parents:
diff changeset
1110 assert((_mm2 != NULL) == have_mm2, "use other next");
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parents:
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1111 assert_synch();
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parents:
diff changeset
1112 if (++_idx < _cnt) {
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parents:
diff changeset
1113 // Note: This iterator allows _mm to be non-sparse.
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parents:
diff changeset
1114 // It behaves the same whether _mem is top or base_memory.
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parents:
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1115 _mem = _mm->in(_idx);
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parents:
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1116 if (have_mm2)
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parents:
diff changeset
1117 _mem2 = _mm2->in((_idx < _cnt2) ? _idx : Compile::AliasIdxTop);
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parents:
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1118 return true;
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parents:
diff changeset
1119 }
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parents:
diff changeset
1120 return false;
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parents:
diff changeset
1121 }
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parents:
diff changeset
1122
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parents:
diff changeset
1123 // find the next non-empty item
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parents:
diff changeset
1124 bool next_non_empty(bool have_mm2) {
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parents:
diff changeset
1125 while (next(have_mm2)) {
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parents:
diff changeset
1126 if (!is_empty()) {
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parents:
diff changeset
1127 // make sure _mem2 is filled in sensibly
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parents:
diff changeset
1128 if (have_mm2 && _mem2->is_top()) _mem2 = _mm2->base_memory();
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parents:
diff changeset
1129 return true;
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parents:
diff changeset
1130 } else if (have_mm2 && !is_empty2()) {
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parents:
diff changeset
1131 return true; // is_empty() == true
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parents:
diff changeset
1132 }
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parents:
diff changeset
1133 }
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parents:
diff changeset
1134 return false;
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parents:
diff changeset
1135 }
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parents:
diff changeset
1136 };
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parents:
diff changeset
1137
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parents:
diff changeset
1138 //------------------------------Prefetch---------------------------------------
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parents:
diff changeset
1139
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parents:
diff changeset
1140 // Non-faulting prefetch load. Prefetch for many reads.
a61af66fc99e Initial load
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parents:
diff changeset
1141 class PrefetchReadNode : public Node {
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parents:
diff changeset
1142 public:
a61af66fc99e Initial load
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parents:
diff changeset
1143 PrefetchReadNode(Node *abio, Node *adr) : Node(0,abio,adr) {}
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parents:
diff changeset
1144 virtual int Opcode() const;
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parents:
diff changeset
1145 virtual uint ideal_reg() const { return NotAMachineReg; }
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parents:
diff changeset
1146 virtual uint match_edge(uint idx) const { return idx==2; }
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parents:
diff changeset
1147 virtual const Type *bottom_type() const { return Type::ABIO; }
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parents:
diff changeset
1148 };
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parents:
diff changeset
1149
a61af66fc99e Initial load
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parents:
diff changeset
1150 // Non-faulting prefetch load. Prefetch for many reads & many writes.
a61af66fc99e Initial load
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parents:
diff changeset
1151 class PrefetchWriteNode : public Node {
a61af66fc99e Initial load
duke
parents:
diff changeset
1152 public:
a61af66fc99e Initial load
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parents:
diff changeset
1153 PrefetchWriteNode(Node *abio, Node *adr) : Node(0,abio,adr) {}
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parents:
diff changeset
1154 virtual int Opcode() const;
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parents:
diff changeset
1155 virtual uint ideal_reg() const { return NotAMachineReg; }
a61af66fc99e Initial load
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parents:
diff changeset
1156 virtual uint match_edge(uint idx) const { return idx==2; }
a61af66fc99e Initial load
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parents:
diff changeset
1157 virtual const Type *bottom_type() const { return Type::ABIO; }
a61af66fc99e Initial load
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parents:
diff changeset
1158 };