truffle: src/cpu/x86/vm/x86.ad annotate

annotate src/cpu/x86/vm/x86.ad @ 14518:d8041d695d19

Merged with jdk9/dev/hotspot changeset 3812c088b945

author	twisti
date	Tue, 11 Mar 2014 18:45:59 -0700
parents	00f5eff62d18
children	4ca6dc0799b6 a433eb716ce1

rev	line source
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1 //
4950 9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	2 // Copyright (c) 2011, 2012, Oracle and/or its affiliates. All rights reserved.
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	3 // DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	4 //
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	5 // This code is free software; you can redistribute it and/or modify it
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	6 // under the terms of the GNU General Public License version 2 only, as
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	7 // published by the Free Software Foundation.
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	8 //
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	9 // This code is distributed in the hope that it will be useful, but WITHOUT
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	10 // ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	11 // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	12 // version 2 for more details (a copy is included in the LICENSE file that
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	13 // accompanied this code).
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	14 //
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	15 // You should have received a copy of the GNU General Public License version
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	16 // 2 along with this work; if not, write to the Free Software Foundation,
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	17 // Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	18 //
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	19 // Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	20 // or visit www.oracle.com if you need additional information or have any
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	21 // questions.
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	22 //
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	23 //
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	24
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	25 // X86 Common Architecture Description File
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	26
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	27 //----------REGISTER DEFINITION BLOCK------------------------------------------
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	28 // This information is used by the matcher and the register allocator to
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	29 // describe individual registers and classes of registers within the target
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	30 // archtecture.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	31
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	32 register %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	33 //----------Architecture Description Register Definitions----------------------
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	34 // General Registers
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	35 // "reg_def" name ( register save type, C convention save type,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	36 // ideal register type, encoding );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	37 // Register Save Types:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	38 //
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	39 // NS = No-Save: The register allocator assumes that these registers
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	40 // can be used without saving upon entry to the method, &
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	41 // that they do not need to be saved at call sites.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	42 //
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	43 // SOC = Save-On-Call: The register allocator assumes that these registers
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	44 // can be used without saving upon entry to the method,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	45 // but that they must be saved at call sites.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	46 //
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	47 // SOE = Save-On-Entry: The register allocator assumes that these registers
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	48 // must be saved before using them upon entry to the
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	49 // method, but they do not need to be saved at call
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	50 // sites.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	51 //
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	52 // AS = Always-Save: The register allocator assumes that these registers
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	53 // must be saved before using them upon entry to the
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	54 // method, & that they must be saved at call sites.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	55 //
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	56 // Ideal Register Type is used to determine how to save & restore a
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	57 // register. Op_RegI will get spilled with LoadI/StoreI, Op_RegP will get
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	58 // spilled with LoadP/StoreP. If the register supports both, use Op_RegI.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	59 //
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	60 // The encoding number is the actual bit-pattern placed into the opcodes.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	61
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	62 // XMM registers. 256-bit registers or 8 words each, labeled (a)-h.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	63 // Word a in each register holds a Float, words ab hold a Double.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	64 // The whole registers are used in SSE4.2 version intrinsics,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	65 // array copy stubs and superword operations (see UseSSE42Intrinsics,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	66 // UseXMMForArrayCopy and UseSuperword flags).
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	67 // XMM8-XMM15 must be encoded with REX (VEX for UseAVX).
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	68 // Linux ABI: No register preserved across function calls
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	69 // XMM0-XMM7 might hold parameters
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	70 // Windows ABI: XMM6-XMM15 preserved across function calls
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	71 // XMM0-XMM3 might hold parameters
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	72
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	73 reg_def XMM0 ( SOC, SOC, Op_RegF, 0, xmm0->as_VMReg());
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	74 reg_def XMM0b( SOC, SOC, Op_RegF, 0, xmm0->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	75 reg_def XMM0c( SOC, SOC, Op_RegF, 0, xmm0->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	76 reg_def XMM0d( SOC, SOC, Op_RegF, 0, xmm0->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	77 reg_def XMM0e( SOC, SOC, Op_RegF, 0, xmm0->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	78 reg_def XMM0f( SOC, SOC, Op_RegF, 0, xmm0->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	79 reg_def XMM0g( SOC, SOC, Op_RegF, 0, xmm0->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	80 reg_def XMM0h( SOC, SOC, Op_RegF, 0, xmm0->as_VMReg()->next(7));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	81
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	82 reg_def XMM1 ( SOC, SOC, Op_RegF, 1, xmm1->as_VMReg());
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	83 reg_def XMM1b( SOC, SOC, Op_RegF, 1, xmm1->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	84 reg_def XMM1c( SOC, SOC, Op_RegF, 1, xmm1->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	85 reg_def XMM1d( SOC, SOC, Op_RegF, 1, xmm1->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	86 reg_def XMM1e( SOC, SOC, Op_RegF, 1, xmm1->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	87 reg_def XMM1f( SOC, SOC, Op_RegF, 1, xmm1->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	88 reg_def XMM1g( SOC, SOC, Op_RegF, 1, xmm1->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	89 reg_def XMM1h( SOC, SOC, Op_RegF, 1, xmm1->as_VMReg()->next(7));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	90
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	91 reg_def XMM2 ( SOC, SOC, Op_RegF, 2, xmm2->as_VMReg());
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	92 reg_def XMM2b( SOC, SOC, Op_RegF, 2, xmm2->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	93 reg_def XMM2c( SOC, SOC, Op_RegF, 2, xmm2->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	94 reg_def XMM2d( SOC, SOC, Op_RegF, 2, xmm2->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	95 reg_def XMM2e( SOC, SOC, Op_RegF, 2, xmm2->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	96 reg_def XMM2f( SOC, SOC, Op_RegF, 2, xmm2->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	97 reg_def XMM2g( SOC, SOC, Op_RegF, 2, xmm2->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	98 reg_def XMM2h( SOC, SOC, Op_RegF, 2, xmm2->as_VMReg()->next(7));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	99
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	100 reg_def XMM3 ( SOC, SOC, Op_RegF, 3, xmm3->as_VMReg());
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	101 reg_def XMM3b( SOC, SOC, Op_RegF, 3, xmm3->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	102 reg_def XMM3c( SOC, SOC, Op_RegF, 3, xmm3->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	103 reg_def XMM3d( SOC, SOC, Op_RegF, 3, xmm3->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	104 reg_def XMM3e( SOC, SOC, Op_RegF, 3, xmm3->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	105 reg_def XMM3f( SOC, SOC, Op_RegF, 3, xmm3->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	106 reg_def XMM3g( SOC, SOC, Op_RegF, 3, xmm3->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	107 reg_def XMM3h( SOC, SOC, Op_RegF, 3, xmm3->as_VMReg()->next(7));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	108
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	109 reg_def XMM4 ( SOC, SOC, Op_RegF, 4, xmm4->as_VMReg());
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	110 reg_def XMM4b( SOC, SOC, Op_RegF, 4, xmm4->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	111 reg_def XMM4c( SOC, SOC, Op_RegF, 4, xmm4->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	112 reg_def XMM4d( SOC, SOC, Op_RegF, 4, xmm4->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	113 reg_def XMM4e( SOC, SOC, Op_RegF, 4, xmm4->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	114 reg_def XMM4f( SOC, SOC, Op_RegF, 4, xmm4->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	115 reg_def XMM4g( SOC, SOC, Op_RegF, 4, xmm4->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	116 reg_def XMM4h( SOC, SOC, Op_RegF, 4, xmm4->as_VMReg()->next(7));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	117
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	118 reg_def XMM5 ( SOC, SOC, Op_RegF, 5, xmm5->as_VMReg());
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	119 reg_def XMM5b( SOC, SOC, Op_RegF, 5, xmm5->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	120 reg_def XMM5c( SOC, SOC, Op_RegF, 5, xmm5->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	121 reg_def XMM5d( SOC, SOC, Op_RegF, 5, xmm5->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	122 reg_def XMM5e( SOC, SOC, Op_RegF, 5, xmm5->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	123 reg_def XMM5f( SOC, SOC, Op_RegF, 5, xmm5->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	124 reg_def XMM5g( SOC, SOC, Op_RegF, 5, xmm5->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	125 reg_def XMM5h( SOC, SOC, Op_RegF, 5, xmm5->as_VMReg()->next(7));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	126
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	127 #ifdef _WIN64
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	128
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	129 reg_def XMM6 ( SOC, SOE, Op_RegF, 6, xmm6->as_VMReg());
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	130 reg_def XMM6b( SOC, SOE, Op_RegF, 6, xmm6->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	131 reg_def XMM6c( SOC, SOE, Op_RegF, 6, xmm6->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	132 reg_def XMM6d( SOC, SOE, Op_RegF, 6, xmm6->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	133 reg_def XMM6e( SOC, SOE, Op_RegF, 6, xmm6->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	134 reg_def XMM6f( SOC, SOE, Op_RegF, 6, xmm6->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	135 reg_def XMM6g( SOC, SOE, Op_RegF, 6, xmm6->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	136 reg_def XMM6h( SOC, SOE, Op_RegF, 6, xmm6->as_VMReg()->next(7));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	137
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	138 reg_def XMM7 ( SOC, SOE, Op_RegF, 7, xmm7->as_VMReg());
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	139 reg_def XMM7b( SOC, SOE, Op_RegF, 7, xmm7->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	140 reg_def XMM7c( SOC, SOE, Op_RegF, 7, xmm7->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	141 reg_def XMM7d( SOC, SOE, Op_RegF, 7, xmm7->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	142 reg_def XMM7e( SOC, SOE, Op_RegF, 7, xmm7->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	143 reg_def XMM7f( SOC, SOE, Op_RegF, 7, xmm7->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	144 reg_def XMM7g( SOC, SOE, Op_RegF, 7, xmm7->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	145 reg_def XMM7h( SOC, SOE, Op_RegF, 7, xmm7->as_VMReg()->next(7));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	146
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	147 reg_def XMM8 ( SOC, SOE, Op_RegF, 8, xmm8->as_VMReg());
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	148 reg_def XMM8b( SOC, SOE, Op_RegF, 8, xmm8->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	149 reg_def XMM8c( SOC, SOE, Op_RegF, 8, xmm8->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	150 reg_def XMM8d( SOC, SOE, Op_RegF, 8, xmm8->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	151 reg_def XMM8e( SOC, SOE, Op_RegF, 8, xmm8->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	152 reg_def XMM8f( SOC, SOE, Op_RegF, 8, xmm8->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	153 reg_def XMM8g( SOC, SOE, Op_RegF, 8, xmm8->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	154 reg_def XMM8h( SOC, SOE, Op_RegF, 8, xmm8->as_VMReg()->next(7));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	155
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	156 reg_def XMM9 ( SOC, SOE, Op_RegF, 9, xmm9->as_VMReg());
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	157 reg_def XMM9b( SOC, SOE, Op_RegF, 9, xmm9->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	158 reg_def XMM9c( SOC, SOE, Op_RegF, 9, xmm9->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	159 reg_def XMM9d( SOC, SOE, Op_RegF, 9, xmm9->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	160 reg_def XMM9e( SOC, SOE, Op_RegF, 9, xmm9->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	161 reg_def XMM9f( SOC, SOE, Op_RegF, 9, xmm9->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	162 reg_def XMM9g( SOC, SOE, Op_RegF, 9, xmm9->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	163 reg_def XMM9h( SOC, SOE, Op_RegF, 9, xmm9->as_VMReg()->next(7));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	164
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	165 reg_def XMM10 ( SOC, SOE, Op_RegF, 10, xmm10->as_VMReg());
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	166 reg_def XMM10b( SOC, SOE, Op_RegF, 10, xmm10->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	167 reg_def XMM10c( SOC, SOE, Op_RegF, 10, xmm10->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	168 reg_def XMM10d( SOC, SOE, Op_RegF, 10, xmm10->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	169 reg_def XMM10e( SOC, SOE, Op_RegF, 10, xmm10->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	170 reg_def XMM10f( SOC, SOE, Op_RegF, 10, xmm10->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	171 reg_def XMM10g( SOC, SOE, Op_RegF, 10, xmm10->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	172 reg_def XMM10h( SOC, SOE, Op_RegF, 10, xmm10->as_VMReg()->next(7));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	173
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	174 reg_def XMM11 ( SOC, SOE, Op_RegF, 11, xmm11->as_VMReg());
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	175 reg_def XMM11b( SOC, SOE, Op_RegF, 11, xmm11->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	176 reg_def XMM11c( SOC, SOE, Op_RegF, 11, xmm11->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	177 reg_def XMM11d( SOC, SOE, Op_RegF, 11, xmm11->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	178 reg_def XMM11e( SOC, SOE, Op_RegF, 11, xmm11->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	179 reg_def XMM11f( SOC, SOE, Op_RegF, 11, xmm11->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	180 reg_def XMM11g( SOC, SOE, Op_RegF, 11, xmm11->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	181 reg_def XMM11h( SOC, SOE, Op_RegF, 11, xmm11->as_VMReg()->next(7));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	182
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	183 reg_def XMM12 ( SOC, SOE, Op_RegF, 12, xmm12->as_VMReg());
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	184 reg_def XMM12b( SOC, SOE, Op_RegF, 12, xmm12->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	185 reg_def XMM12c( SOC, SOE, Op_RegF, 12, xmm12->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	186 reg_def XMM12d( SOC, SOE, Op_RegF, 12, xmm12->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	187 reg_def XMM12e( SOC, SOE, Op_RegF, 12, xmm12->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	188 reg_def XMM12f( SOC, SOE, Op_RegF, 12, xmm12->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	189 reg_def XMM12g( SOC, SOE, Op_RegF, 12, xmm12->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	190 reg_def XMM12h( SOC, SOE, Op_RegF, 12, xmm12->as_VMReg()->next(7));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	191
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	192 reg_def XMM13 ( SOC, SOE, Op_RegF, 13, xmm13->as_VMReg());
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	193 reg_def XMM13b( SOC, SOE, Op_RegF, 13, xmm13->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	194 reg_def XMM13c( SOC, SOE, Op_RegF, 13, xmm13->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	195 reg_def XMM13d( SOC, SOE, Op_RegF, 13, xmm13->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	196 reg_def XMM13e( SOC, SOE, Op_RegF, 13, xmm13->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	197 reg_def XMM13f( SOC, SOE, Op_RegF, 13, xmm13->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	198 reg_def XMM13g( SOC, SOE, Op_RegF, 13, xmm13->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	199 reg_def XMM13h( SOC, SOE, Op_RegF, 13, xmm13->as_VMReg()->next(7));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	200
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	201 reg_def XMM14 ( SOC, SOE, Op_RegF, 14, xmm14->as_VMReg());
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	202 reg_def XMM14b( SOC, SOE, Op_RegF, 14, xmm14->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	203 reg_def XMM14c( SOC, SOE, Op_RegF, 14, xmm14->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	204 reg_def XMM14d( SOC, SOE, Op_RegF, 14, xmm14->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	205 reg_def XMM14e( SOC, SOE, Op_RegF, 14, xmm14->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	206 reg_def XMM14f( SOC, SOE, Op_RegF, 14, xmm14->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	207 reg_def XMM14g( SOC, SOE, Op_RegF, 14, xmm14->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	208 reg_def XMM14h( SOC, SOE, Op_RegF, 14, xmm14->as_VMReg()->next(7));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	209
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	210 reg_def XMM15 ( SOC, SOE, Op_RegF, 15, xmm15->as_VMReg());
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	211 reg_def XMM15b( SOC, SOE, Op_RegF, 15, xmm15->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	212 reg_def XMM15c( SOC, SOE, Op_RegF, 15, xmm15->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	213 reg_def XMM15d( SOC, SOE, Op_RegF, 15, xmm15->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	214 reg_def XMM15e( SOC, SOE, Op_RegF, 15, xmm15->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	215 reg_def XMM15f( SOC, SOE, Op_RegF, 15, xmm15->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	216 reg_def XMM15g( SOC, SOE, Op_RegF, 15, xmm15->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	217 reg_def XMM15h( SOC, SOE, Op_RegF, 15, xmm15->as_VMReg()->next(7));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	218
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	219 #else // _WIN64
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	220
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	221 reg_def XMM6 ( SOC, SOC, Op_RegF, 6, xmm6->as_VMReg());
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	222 reg_def XMM6b( SOC, SOC, Op_RegF, 6, xmm6->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	223 reg_def XMM6c( SOC, SOC, Op_RegF, 6, xmm6->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	224 reg_def XMM6d( SOC, SOC, Op_RegF, 6, xmm6->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	225 reg_def XMM6e( SOC, SOC, Op_RegF, 6, xmm6->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	226 reg_def XMM6f( SOC, SOC, Op_RegF, 6, xmm6->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	227 reg_def XMM6g( SOC, SOC, Op_RegF, 6, xmm6->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	228 reg_def XMM6h( SOC, SOC, Op_RegF, 6, xmm6->as_VMReg()->next(7));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	229
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	230 reg_def XMM7 ( SOC, SOC, Op_RegF, 7, xmm7->as_VMReg());
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	231 reg_def XMM7b( SOC, SOC, Op_RegF, 7, xmm7->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	232 reg_def XMM7c( SOC, SOC, Op_RegF, 7, xmm7->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	233 reg_def XMM7d( SOC, SOC, Op_RegF, 7, xmm7->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	234 reg_def XMM7e( SOC, SOC, Op_RegF, 7, xmm7->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	235 reg_def XMM7f( SOC, SOC, Op_RegF, 7, xmm7->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	236 reg_def XMM7g( SOC, SOC, Op_RegF, 7, xmm7->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	237 reg_def XMM7h( SOC, SOC, Op_RegF, 7, xmm7->as_VMReg()->next(7));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	238
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	239 #ifdef _LP64
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	240
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	241 reg_def XMM8 ( SOC, SOC, Op_RegF, 8, xmm8->as_VMReg());
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	242 reg_def XMM8b( SOC, SOC, Op_RegF, 8, xmm8->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	243 reg_def XMM8c( SOC, SOC, Op_RegF, 8, xmm8->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	244 reg_def XMM8d( SOC, SOC, Op_RegF, 8, xmm8->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	245 reg_def XMM8e( SOC, SOC, Op_RegF, 8, xmm8->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	246 reg_def XMM8f( SOC, SOC, Op_RegF, 8, xmm8->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	247 reg_def XMM8g( SOC, SOC, Op_RegF, 8, xmm8->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	248 reg_def XMM8h( SOC, SOC, Op_RegF, 8, xmm8->as_VMReg()->next(7));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	249
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	250 reg_def XMM9 ( SOC, SOC, Op_RegF, 9, xmm9->as_VMReg());
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	251 reg_def XMM9b( SOC, SOC, Op_RegF, 9, xmm9->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	252 reg_def XMM9c( SOC, SOC, Op_RegF, 9, xmm9->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	253 reg_def XMM9d( SOC, SOC, Op_RegF, 9, xmm9->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	254 reg_def XMM9e( SOC, SOC, Op_RegF, 9, xmm9->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	255 reg_def XMM9f( SOC, SOC, Op_RegF, 9, xmm9->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	256 reg_def XMM9g( SOC, SOC, Op_RegF, 9, xmm9->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	257 reg_def XMM9h( SOC, SOC, Op_RegF, 9, xmm9->as_VMReg()->next(7));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	258
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	259 reg_def XMM10 ( SOC, SOC, Op_RegF, 10, xmm10->as_VMReg());
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	260 reg_def XMM10b( SOC, SOC, Op_RegF, 10, xmm10->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	261 reg_def XMM10c( SOC, SOC, Op_RegF, 10, xmm10->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	262 reg_def XMM10d( SOC, SOC, Op_RegF, 10, xmm10->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	263 reg_def XMM10e( SOC, SOC, Op_RegF, 10, xmm10->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	264 reg_def XMM10f( SOC, SOC, Op_RegF, 10, xmm10->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	265 reg_def XMM10g( SOC, SOC, Op_RegF, 10, xmm10->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	266 reg_def XMM10h( SOC, SOC, Op_RegF, 10, xmm10->as_VMReg()->next(7));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	267
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	268 reg_def XMM11 ( SOC, SOC, Op_RegF, 11, xmm11->as_VMReg());
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	269 reg_def XMM11b( SOC, SOC, Op_RegF, 11, xmm11->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	270 reg_def XMM11c( SOC, SOC, Op_RegF, 11, xmm11->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	271 reg_def XMM11d( SOC, SOC, Op_RegF, 11, xmm11->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	272 reg_def XMM11e( SOC, SOC, Op_RegF, 11, xmm11->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	273 reg_def XMM11f( SOC, SOC, Op_RegF, 11, xmm11->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	274 reg_def XMM11g( SOC, SOC, Op_RegF, 11, xmm11->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	275 reg_def XMM11h( SOC, SOC, Op_RegF, 11, xmm11->as_VMReg()->next(7));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	276
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	277 reg_def XMM12 ( SOC, SOC, Op_RegF, 12, xmm12->as_VMReg());
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	278 reg_def XMM12b( SOC, SOC, Op_RegF, 12, xmm12->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	279 reg_def XMM12c( SOC, SOC, Op_RegF, 12, xmm12->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	280 reg_def XMM12d( SOC, SOC, Op_RegF, 12, xmm12->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	281 reg_def XMM12e( SOC, SOC, Op_RegF, 12, xmm12->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	282 reg_def XMM12f( SOC, SOC, Op_RegF, 12, xmm12->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	283 reg_def XMM12g( SOC, SOC, Op_RegF, 12, xmm12->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	284 reg_def XMM12h( SOC, SOC, Op_RegF, 12, xmm12->as_VMReg()->next(7));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	285
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	286 reg_def XMM13 ( SOC, SOC, Op_RegF, 13, xmm13->as_VMReg());
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	287 reg_def XMM13b( SOC, SOC, Op_RegF, 13, xmm13->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	288 reg_def XMM13c( SOC, SOC, Op_RegF, 13, xmm13->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	289 reg_def XMM13d( SOC, SOC, Op_RegF, 13, xmm13->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	290 reg_def XMM13e( SOC, SOC, Op_RegF, 13, xmm13->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	291 reg_def XMM13f( SOC, SOC, Op_RegF, 13, xmm13->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	292 reg_def XMM13g( SOC, SOC, Op_RegF, 13, xmm13->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	293 reg_def XMM13h( SOC, SOC, Op_RegF, 13, xmm13->as_VMReg()->next(7));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	294
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	295 reg_def XMM14 ( SOC, SOC, Op_RegF, 14, xmm14->as_VMReg());
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	296 reg_def XMM14b( SOC, SOC, Op_RegF, 14, xmm14->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	297 reg_def XMM14c( SOC, SOC, Op_RegF, 14, xmm14->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	298 reg_def XMM14d( SOC, SOC, Op_RegF, 14, xmm14->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	299 reg_def XMM14e( SOC, SOC, Op_RegF, 14, xmm14->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	300 reg_def XMM14f( SOC, SOC, Op_RegF, 14, xmm14->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	301 reg_def XMM14g( SOC, SOC, Op_RegF, 14, xmm14->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	302 reg_def XMM14h( SOC, SOC, Op_RegF, 14, xmm14->as_VMReg()->next(7));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	303
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	304 reg_def XMM15 ( SOC, SOC, Op_RegF, 15, xmm15->as_VMReg());
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	305 reg_def XMM15b( SOC, SOC, Op_RegF, 15, xmm15->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	306 reg_def XMM15c( SOC, SOC, Op_RegF, 15, xmm15->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	307 reg_def XMM15d( SOC, SOC, Op_RegF, 15, xmm15->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	308 reg_def XMM15e( SOC, SOC, Op_RegF, 15, xmm15->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	309 reg_def XMM15f( SOC, SOC, Op_RegF, 15, xmm15->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	310 reg_def XMM15g( SOC, SOC, Op_RegF, 15, xmm15->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	311 reg_def XMM15h( SOC, SOC, Op_RegF, 15, xmm15->as_VMReg()->next(7));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	312
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	313 #endif // _LP64
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	314
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	315 #endif // _WIN64
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	316
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	317 #ifdef _LP64
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	318 reg_def RFLAGS(SOC, SOC, 0, 16, VMRegImpl::Bad());
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	319 #else
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	320 reg_def RFLAGS(SOC, SOC, 0, 8, VMRegImpl::Bad());
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	321 #endif // _LP64
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	322
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	323 alloc_class chunk1(XMM0, XMM0b, XMM0c, XMM0d, XMM0e, XMM0f, XMM0g, XMM0h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	324 XMM1, XMM1b, XMM1c, XMM1d, XMM1e, XMM1f, XMM1g, XMM1h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	325 XMM2, XMM2b, XMM2c, XMM2d, XMM2e, XMM2f, XMM2g, XMM2h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	326 XMM3, XMM3b, XMM3c, XMM3d, XMM3e, XMM3f, XMM3g, XMM3h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	327 XMM4, XMM4b, XMM4c, XMM4d, XMM4e, XMM4f, XMM4g, XMM4h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	328 XMM5, XMM5b, XMM5c, XMM5d, XMM5e, XMM5f, XMM5g, XMM5h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	329 XMM6, XMM6b, XMM6c, XMM6d, XMM6e, XMM6f, XMM6g, XMM6h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	330 XMM7, XMM7b, XMM7c, XMM7d, XMM7e, XMM7f, XMM7g, XMM7h
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	331 #ifdef _LP64
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	332 ,XMM8, XMM8b, XMM8c, XMM8d, XMM8e, XMM8f, XMM8g, XMM8h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	333 XMM9, XMM9b, XMM9c, XMM9d, XMM9e, XMM9f, XMM9g, XMM9h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	334 XMM10, XMM10b, XMM10c, XMM10d, XMM10e, XMM10f, XMM10g, XMM10h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	335 XMM11, XMM11b, XMM11c, XMM11d, XMM11e, XMM11f, XMM11g, XMM11h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	336 XMM12, XMM12b, XMM12c, XMM12d, XMM12e, XMM12f, XMM12g, XMM12h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	337 XMM13, XMM13b, XMM13c, XMM13d, XMM13e, XMM13f, XMM13g, XMM13h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	338 XMM14, XMM14b, XMM14c, XMM14d, XMM14e, XMM14f, XMM14g, XMM14h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	339 XMM15, XMM15b, XMM15c, XMM15d, XMM15e, XMM15f, XMM15g, XMM15h
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	340 #endif
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	341 );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	342
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	343 // flags allocation class should be last.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	344 alloc_class chunk2(RFLAGS);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	345
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	346 // Singleton class for condition codes
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	347 reg_class int_flags(RFLAGS);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	348
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	349 // Class for all float registers
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	350 reg_class float_reg(XMM0,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	351 XMM1,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	352 XMM2,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	353 XMM3,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	354 XMM4,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	355 XMM5,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	356 XMM6,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	357 XMM7
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	358 #ifdef _LP64
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	359 ,XMM8,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	360 XMM9,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	361 XMM10,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	362 XMM11,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	363 XMM12,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	364 XMM13,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	365 XMM14,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	366 XMM15
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	367 #endif
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	368 );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	369
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	370 // Class for all double registers
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	371 reg_class double_reg(XMM0, XMM0b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	372 XMM1, XMM1b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	373 XMM2, XMM2b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	374 XMM3, XMM3b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	375 XMM4, XMM4b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	376 XMM5, XMM5b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	377 XMM6, XMM6b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	378 XMM7, XMM7b
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	379 #ifdef _LP64
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	380 ,XMM8, XMM8b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	381 XMM9, XMM9b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	382 XMM10, XMM10b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	383 XMM11, XMM11b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	384 XMM12, XMM12b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	385 XMM13, XMM13b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	386 XMM14, XMM14b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	387 XMM15, XMM15b
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	388 #endif
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	389 );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	390
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	391 // Class for all 32bit vector registers
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	392 reg_class vectors_reg(XMM0,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	393 XMM1,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	394 XMM2,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	395 XMM3,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	396 XMM4,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	397 XMM5,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	398 XMM6,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	399 XMM7
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	400 #ifdef _LP64
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	401 ,XMM8,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	402 XMM9,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	403 XMM10,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	404 XMM11,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	405 XMM12,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	406 XMM13,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	407 XMM14,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	408 XMM15
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	409 #endif
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	410 );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	411
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	412 // Class for all 64bit vector registers
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	413 reg_class vectord_reg(XMM0, XMM0b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	414 XMM1, XMM1b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	415 XMM2, XMM2b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	416 XMM3, XMM3b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	417 XMM4, XMM4b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	418 XMM5, XMM5b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	419 XMM6, XMM6b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	420 XMM7, XMM7b
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	421 #ifdef _LP64
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	422 ,XMM8, XMM8b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	423 XMM9, XMM9b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	424 XMM10, XMM10b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	425 XMM11, XMM11b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	426 XMM12, XMM12b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	427 XMM13, XMM13b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	428 XMM14, XMM14b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	429 XMM15, XMM15b
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	430 #endif
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	431 );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	432
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	433 // Class for all 128bit vector registers
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	434 reg_class vectorx_reg(XMM0, XMM0b, XMM0c, XMM0d,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	435 XMM1, XMM1b, XMM1c, XMM1d,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	436 XMM2, XMM2b, XMM2c, XMM2d,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	437 XMM3, XMM3b, XMM3c, XMM3d,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	438 XMM4, XMM4b, XMM4c, XMM4d,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	439 XMM5, XMM5b, XMM5c, XMM5d,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	440 XMM6, XMM6b, XMM6c, XMM6d,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	441 XMM7, XMM7b, XMM7c, XMM7d
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	442 #ifdef _LP64
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	443 ,XMM8, XMM8b, XMM8c, XMM8d,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	444 XMM9, XMM9b, XMM9c, XMM9d,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	445 XMM10, XMM10b, XMM10c, XMM10d,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	446 XMM11, XMM11b, XMM11c, XMM11d,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	447 XMM12, XMM12b, XMM12c, XMM12d,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	448 XMM13, XMM13b, XMM13c, XMM13d,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	449 XMM14, XMM14b, XMM14c, XMM14d,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	450 XMM15, XMM15b, XMM15c, XMM15d
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	451 #endif
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	452 );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	453
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	454 // Class for all 256bit vector registers
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	455 reg_class vectory_reg(XMM0, XMM0b, XMM0c, XMM0d, XMM0e, XMM0f, XMM0g, XMM0h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	456 XMM1, XMM1b, XMM1c, XMM1d, XMM1e, XMM1f, XMM1g, XMM1h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	457 XMM2, XMM2b, XMM2c, XMM2d, XMM2e, XMM2f, XMM2g, XMM2h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	458 XMM3, XMM3b, XMM3c, XMM3d, XMM3e, XMM3f, XMM3g, XMM3h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	459 XMM4, XMM4b, XMM4c, XMM4d, XMM4e, XMM4f, XMM4g, XMM4h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	460 XMM5, XMM5b, XMM5c, XMM5d, XMM5e, XMM5f, XMM5g, XMM5h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	461 XMM6, XMM6b, XMM6c, XMM6d, XMM6e, XMM6f, XMM6g, XMM6h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	462 XMM7, XMM7b, XMM7c, XMM7d, XMM7e, XMM7f, XMM7g, XMM7h
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	463 #ifdef _LP64
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	464 ,XMM8, XMM8b, XMM8c, XMM8d, XMM8e, XMM8f, XMM8g, XMM8h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	465 XMM9, XMM9b, XMM9c, XMM9d, XMM9e, XMM9f, XMM9g, XMM9h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	466 XMM10, XMM10b, XMM10c, XMM10d, XMM10e, XMM10f, XMM10g, XMM10h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	467 XMM11, XMM11b, XMM11c, XMM11d, XMM11e, XMM11f, XMM11g, XMM11h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	468 XMM12, XMM12b, XMM12c, XMM12d, XMM12e, XMM12f, XMM12g, XMM12h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	469 XMM13, XMM13b, XMM13c, XMM13d, XMM13e, XMM13f, XMM13g, XMM13h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	470 XMM14, XMM14b, XMM14c, XMM14d, XMM14e, XMM14f, XMM14g, XMM14h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	471 XMM15, XMM15b, XMM15c, XMM15d, XMM15e, XMM15f, XMM15g, XMM15h
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	472 #endif
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	473 );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	474
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	475 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	476
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	477 source %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	478 // Float masks come from different places depending on platform.
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	479 #ifdef _LP64
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	480 static address float_signmask() { return StubRoutines::x86::float_sign_mask(); }
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	481 static address float_signflip() { return StubRoutines::x86::float_sign_flip(); }
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	482 static address double_signmask() { return StubRoutines::x86::double_sign_mask(); }
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	483 static address double_signflip() { return StubRoutines::x86::double_sign_flip(); }
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	484 #else
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	485 static address float_signmask() { return (address)float_signmask_pool; }
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	486 static address float_signflip() { return (address)float_signflip_pool; }
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	487 static address double_signmask() { return (address)double_signmask_pool; }
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	488 static address double_signflip() { return (address)double_signflip_pool; }
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	489 #endif
4950 9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	490
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	491
6614 006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	492 const bool Matcher::match_rule_supported(int opcode) {
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	493 if (!has_match_rule(opcode))
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	494 return false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	495
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	496 switch (opcode) {
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	497 case Op_PopCountI:
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	498 case Op_PopCountL:
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	499 if (!UsePopCountInstruction)
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	500 return false;
6792 137868b7aa6f 7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect kvn parents: 6725 diff changeset	501 break;
6614 006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	502 case Op_MulVI:
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	503 if ((UseSSE < 4) && (UseAVX < 1)) // only with SSE4_1 or AVX
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	504 return false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	505 break;
6795 7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement() roland parents: 6792 diff changeset	506 case Op_CompareAndSwapL:
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement() roland parents: 6792 diff changeset	507 #ifdef _LP64
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement() roland parents: 6792 diff changeset	508 case Op_CompareAndSwapP:
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement() roland parents: 6792 diff changeset	509 #endif
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement() roland parents: 6792 diff changeset	510 if (!VM_Version::supports_cx8())
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement() roland parents: 6792 diff changeset	511 return false;
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement() roland parents: 6792 diff changeset	512 break;
6614 006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	513 }
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	514
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	515 return true; // Per default match rules are supported.
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	516 }
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	517
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	518 // Max vector size in bytes. 0 if not supported.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	519 const int Matcher::vector_width_in_bytes(BasicType bt) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	520 assert(is_java_primitive(bt), "only primitive type vectors");
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	521 if (UseSSE < 2) return 0;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	522 // SSE2 supports 128bit vectors for all types.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	523 // AVX2 supports 256bit vectors for all types.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	524 int size = (UseAVX > 1) ? 32 : 16;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	525 // AVX1 supports 256bit vectors only for FLOAT and DOUBLE.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	526 if (UseAVX > 0 && (bt == T_FLOAT \|\| bt == T_DOUBLE))
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	527 size = 32;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	528 // Use flag to limit vector size.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	529 size = MIN2(size,(int)MaxVectorSize);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	530 // Minimum 2 values in vector (or 4 for bytes).
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	531 switch (bt) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	532 case T_DOUBLE:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	533 case T_LONG:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	534 if (size < 16) return 0;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	535 case T_FLOAT:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	536 case T_INT:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	537 if (size < 8) return 0;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	538 case T_BOOLEAN:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	539 case T_BYTE:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	540 case T_CHAR:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	541 case T_SHORT:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	542 if (size < 4) return 0;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	543 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	544 default:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	545 ShouldNotReachHere();
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	546 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	547 return size;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	548 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	549
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	550 // Limits on vector size (number of elements) loaded into vector.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	551 const int Matcher::max_vector_size(const BasicType bt) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	552 return vector_width_in_bytes(bt)/type2aelembytes(bt);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	553 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	554 const int Matcher::min_vector_size(const BasicType bt) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	555 int max_size = max_vector_size(bt);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	556 // Min size which can be loaded into vector is 4 bytes.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	557 int size = (type2aelembytes(bt) == 1) ? 4 : 2;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	558 return MIN2(size,max_size);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	559 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	560
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	561 // Vector ideal reg corresponding to specidied size in bytes
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	562 const int Matcher::vector_ideal_reg(int size) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	563 assert(MaxVectorSize >= size, "");
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	564 switch(size) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	565 case 4: return Op_VecS;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	566 case 8: return Op_VecD;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	567 case 16: return Op_VecX;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	568 case 32: return Op_VecY;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	569 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	570 ShouldNotReachHere();
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	571 return 0;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	572 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	573
6823 859c45fb8cea 7201026: add vector for shift count kvn parents: 6795 diff changeset	574 // Only lowest bits of xmm reg are used for vector shift count.
859c45fb8cea 7201026: add vector for shift count kvn parents: 6795 diff changeset	575 const int Matcher::vector_shift_count_ideal_reg(int size) {
859c45fb8cea 7201026: add vector for shift count kvn parents: 6795 diff changeset	576 return Op_VecS;
859c45fb8cea 7201026: add vector for shift count kvn parents: 6795 diff changeset	577 }
859c45fb8cea 7201026: add vector for shift count kvn parents: 6795 diff changeset	578
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	579 // x86 supports misaligned vectors store/load.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	580 const bool Matcher::misaligned_vectors_ok() {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	581 return !AlignVector; // can be changed by flag
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	582 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	583
14261 00f5eff62d18 8002074: Support for AES on SPARC kvn parents: 6893 diff changeset	584 // x86 AES instructions are compatible with SunJCE expanded
00f5eff62d18 8002074: Support for AES on SPARC kvn parents: 6893 diff changeset	585 // keys, hence we do not need to pass the original key to stubs
00f5eff62d18 8002074: Support for AES on SPARC kvn parents: 6893 diff changeset	586 const bool Matcher::pass_original_key_for_aes() {
00f5eff62d18 8002074: Support for AES on SPARC kvn parents: 6893 diff changeset	587 return false;
00f5eff62d18 8002074: Support for AES on SPARC kvn parents: 6893 diff changeset	588 }
00f5eff62d18 8002074: Support for AES on SPARC kvn parents: 6893 diff changeset	589
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	590 // Helper methods for MachSpillCopyNode::implementation().
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	591 static int vec_mov_helper(CodeBuffer *cbuf, bool do_size, int src_lo, int dst_lo,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	592 int src_hi, int dst_hi, uint ireg, outputStream* st) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	593 // In 64-bit VM size calculation is very complex. Emitting instructions
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	594 // into scratch buffer is used to get size in 64-bit VM.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	595 LP64_ONLY( assert(!do_size, "this method calculates size only for 32-bit VM"); )
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	596 assert(ireg == Op_VecS \|\| // 32bit vector
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	597 (src_lo & 1) == 0 && (src_lo + 1) == src_hi &&
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	598 (dst_lo & 1) == 0 && (dst_lo + 1) == dst_hi,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	599 "no non-adjacent vector moves" );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	600 if (cbuf) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	601 MacroAssembler _masm(cbuf);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	602 int offset = __ offset();
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	603 switch (ireg) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	604 case Op_VecS: // copy whole register
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	605 case Op_VecD:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	606 case Op_VecX:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	607 __ movdqu(as_XMMRegister(Matcher::_regEncode[dst_lo]), as_XMMRegister(Matcher::_regEncode[src_lo]));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	608 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	609 case Op_VecY:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	610 __ vmovdqu(as_XMMRegister(Matcher::_regEncode[dst_lo]), as_XMMRegister(Matcher::_regEncode[src_lo]));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	611 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	612 default:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	613 ShouldNotReachHere();
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	614 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	615 int size = __ offset() - offset;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	616 #ifdef ASSERT
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	617 // VEX_2bytes prefix is used if UseAVX > 0, so it takes the same 2 bytes as SIMD prefix.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	618 assert(!do_size \|\| size == 4, "incorrect size calculattion");
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	619 #endif
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	620 return size;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	621 #ifndef PRODUCT
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	622 } else if (!do_size) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	623 switch (ireg) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	624 case Op_VecS:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	625 case Op_VecD:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	626 case Op_VecX:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	627 st->print("movdqu %s,%s\t# spill",Matcher::regName[dst_lo],Matcher::regName[src_lo]);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	628 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	629 case Op_VecY:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	630 st->print("vmovdqu %s,%s\t# spill",Matcher::regName[dst_lo],Matcher::regName[src_lo]);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	631 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	632 default:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	633 ShouldNotReachHere();
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	634 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	635 #endif
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	636 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	637 // VEX_2bytes prefix is used if UseAVX > 0, and it takes the same 2 bytes as SIMD prefix.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	638 return 4;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	639 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	640
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	641 static int vec_spill_helper(CodeBuffer *cbuf, bool do_size, bool is_load,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	642 int stack_offset, int reg, uint ireg, outputStream* st) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	643 // In 64-bit VM size calculation is very complex. Emitting instructions
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	644 // into scratch buffer is used to get size in 64-bit VM.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	645 LP64_ONLY( assert(!do_size, "this method calculates size only for 32-bit VM"); )
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	646 if (cbuf) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	647 MacroAssembler _masm(cbuf);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	648 int offset = __ offset();
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	649 if (is_load) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	650 switch (ireg) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	651 case Op_VecS:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	652 __ movdl(as_XMMRegister(Matcher::_regEncode[reg]), Address(rsp, stack_offset));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	653 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	654 case Op_VecD:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	655 __ movq(as_XMMRegister(Matcher::_regEncode[reg]), Address(rsp, stack_offset));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	656 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	657 case Op_VecX:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	658 __ movdqu(as_XMMRegister(Matcher::_regEncode[reg]), Address(rsp, stack_offset));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	659 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	660 case Op_VecY:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	661 __ vmovdqu(as_XMMRegister(Matcher::_regEncode[reg]), Address(rsp, stack_offset));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	662 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	663 default:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	664 ShouldNotReachHere();
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	665 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	666 } else { // store
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	667 switch (ireg) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	668 case Op_VecS:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	669 __ movdl(Address(rsp, stack_offset), as_XMMRegister(Matcher::_regEncode[reg]));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	670 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	671 case Op_VecD:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	672 __ movq(Address(rsp, stack_offset), as_XMMRegister(Matcher::_regEncode[reg]));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	673 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	674 case Op_VecX:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	675 __ movdqu(Address(rsp, stack_offset), as_XMMRegister(Matcher::_regEncode[reg]));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	676 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	677 case Op_VecY:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	678 __ vmovdqu(Address(rsp, stack_offset), as_XMMRegister(Matcher::_regEncode[reg]));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	679 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	680 default:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	681 ShouldNotReachHere();
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	682 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	683 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	684 int size = __ offset() - offset;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	685 #ifdef ASSERT
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	686 int offset_size = (stack_offset == 0) ? 0 : ((stack_offset < 0x80) ? 1 : 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	687 // VEX_2bytes prefix is used if UseAVX > 0, so it takes the same 2 bytes as SIMD prefix.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	688 assert(!do_size \|\| size == (5+offset_size), "incorrect size calculattion");
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	689 #endif
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	690 return size;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	691 #ifndef PRODUCT
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	692 } else if (!do_size) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	693 if (is_load) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	694 switch (ireg) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	695 case Op_VecS:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	696 st->print("movd %s,[rsp + %d]\t# spill", Matcher::regName[reg], stack_offset);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	697 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	698 case Op_VecD:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	699 st->print("movq %s,[rsp + %d]\t# spill", Matcher::regName[reg], stack_offset);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	700 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	701 case Op_VecX:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	702 st->print("movdqu %s,[rsp + %d]\t# spill", Matcher::regName[reg], stack_offset);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	703 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	704 case Op_VecY:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	705 st->print("vmovdqu %s,[rsp + %d]\t# spill", Matcher::regName[reg], stack_offset);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	706 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	707 default:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	708 ShouldNotReachHere();
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	709 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	710 } else { // store
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	711 switch (ireg) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	712 case Op_VecS:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	713 st->print("movd [rsp + %d],%s\t# spill", stack_offset, Matcher::regName[reg]);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	714 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	715 case Op_VecD:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	716 st->print("movq [rsp + %d],%s\t# spill", stack_offset, Matcher::regName[reg]);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	717 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	718 case Op_VecX:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	719 st->print("movdqu [rsp + %d],%s\t# spill", stack_offset, Matcher::regName[reg]);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	720 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	721 case Op_VecY:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	722 st->print("vmovdqu [rsp + %d],%s\t# spill", stack_offset, Matcher::regName[reg]);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	723 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	724 default:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	725 ShouldNotReachHere();
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	726 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	727 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	728 #endif
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	729 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	730 int offset_size = (stack_offset == 0) ? 0 : ((stack_offset < 0x80) ? 1 : 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	731 // VEX_2bytes prefix is used if UseAVX > 0, so it takes the same 2 bytes as SIMD prefix.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	732 return 5+offset_size;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	733 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	734
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	735 static inline jfloat replicate4_imm(int con, int width) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	736 // Load a constant of "width" (in bytes) and replicate it to fill 32bit.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	737 assert(width == 1 \|\| width == 2, "only byte or short types here");
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	738 int bit_width = width * 8;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	739 jint val = con;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	740 val &= (1 << bit_width) - 1; // mask off sign bits
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	741 while(bit_width < 32) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	742 val \|= (val << bit_width);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	743 bit_width <<= 1;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	744 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	745 jfloat fval = ((jfloat) &val); // coerce to float type
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	746 return fval;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	747 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	748
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	749 static inline jdouble replicate8_imm(int con, int width) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	750 // Load a constant of "width" (in bytes) and replicate it to fill 64bit.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	751 assert(width == 1 \|\| width == 2 \|\| width == 4, "only byte, short or int types here");
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	752 int bit_width = width * 8;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	753 jlong val = con;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	754 val &= (((jlong) 1) << bit_width) - 1; // mask off sign bits
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	755 while(bit_width < 64) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	756 val \|= (val << bit_width);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	757 bit_width <<= 1;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	758 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	759 jdouble dval = ((jdouble) &val); // coerce to double type
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	760 return dval;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	761 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	762
4950 9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	763 #ifndef PRODUCT
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	764 void MachNopNode::format(PhaseRegAlloc, outputStream st) const {
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	765 st->print("nop \t# %d bytes pad for loops and calls", _count);
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	766 }
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	767 #endif
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	768
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	769 void MachNopNode::emit(CodeBuffer &cbuf, PhaseRegAlloc*) const {
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	770 MacroAssembler _masm(&cbuf);
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	771 __ nop(_count);
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	772 }
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	773
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	774 uint MachNopNode::size(PhaseRegAlloc*) const {
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	775 return _count;
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	776 }
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	777
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	778 #ifndef PRODUCT
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	779 void MachBreakpointNode::format(PhaseRegAlloc, outputStream st) const {
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	780 st->print("# breakpoint");
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	781 }
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	782 #endif
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	783
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	784 void MachBreakpointNode::emit(CodeBuffer &cbuf, PhaseRegAlloc* ra_) const {
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	785 MacroAssembler _masm(&cbuf);
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	786 __ int3();
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	787 }
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	788
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	789 uint MachBreakpointNode::size(PhaseRegAlloc* ra_) const {
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	790 return MachNode::size(ra_);
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	791 }
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	792
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	793 %}
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	794
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	795 encode %{
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	796
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	797 enc_class preserve_SP %{
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	798 debug_only(int off0 = cbuf.insts_size());
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	799 MacroAssembler _masm(&cbuf);
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	800 // RBP is preserved across all calls, even compiled calls.
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	801 // Use it to preserve RSP in places where the callee might change the SP.
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	802 __ movptr(rbp_mh_SP_save, rsp);
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	803 debug_only(int off1 = cbuf.insts_size());
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	804 assert(off1 - off0 == preserve_SP_size(), "correct size prediction");
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	805 %}
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	806
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	807 enc_class restore_SP %{
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	808 MacroAssembler _masm(&cbuf);
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	809 __ movptr(rsp, rbp_mh_SP_save);
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	810 %}
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	811
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	812 enc_class call_epilog %{
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	813 if (VerifyStackAtCalls) {
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	814 // Check that stack depth is unchanged: find majik cookie on stack
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	815 int framesize = ra_->reg2offset_unchecked(OptoReg::add(ra_->_matcher._old_SP, -3*VMRegImpl::slots_per_word));
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	816 MacroAssembler _masm(&cbuf);
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	817 Label L;
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	818 __ cmpptr(Address(rsp, framesize), (int32_t)0xbadb100d);
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	819 __ jccb(Assembler::equal, L);
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	820 // Die if stack mismatch
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	821 __ int3();
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	822 __ bind(L);
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	823 }
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	824 %}
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	825
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	826 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	827
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	828
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	829 //----------OPERANDS-----------------------------------------------------------
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	830 // Operand definitions must precede instruction definitions for correct parsing
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	831 // in the ADLC because operands constitute user defined types which are used in
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	832 // instruction definitions.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	833
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	834 // Vectors
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	835 operand vecS() %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	836 constraint(ALLOC_IN_RC(vectors_reg));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	837 match(VecS);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	838
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	839 format %{ %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	840 interface(REG_INTER);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	841 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	842
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	843 operand vecD() %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	844 constraint(ALLOC_IN_RC(vectord_reg));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	845 match(VecD);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	846
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	847 format %{ %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	848 interface(REG_INTER);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	849 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	850
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	851 operand vecX() %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	852 constraint(ALLOC_IN_RC(vectorx_reg));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	853 match(VecX);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	854
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	855 format %{ %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	856 interface(REG_INTER);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	857 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	858
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	859 operand vecY() %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	860 constraint(ALLOC_IN_RC(vectory_reg));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	861 match(VecY);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	862
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	863 format %{ %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	864 interface(REG_INTER);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	865 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	866
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	867
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	868 // INSTRUCTIONS -- Platform independent definitions (same for 32- and 64-bit)
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	869
4950 9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	870 // ============================================================================
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	871
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	872 instruct ShouldNotReachHere() %{
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	873 match(Halt);
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	874 format %{ "int3\t# ShouldNotReachHere" %}
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	875 ins_encode %{
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	876 __ int3();
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	877 %}
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	878 ins_pipe(pipe_slow);
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	879 %}
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	880
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	881 // ============================================================================
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	882
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	883 instruct addF_reg(regF dst, regF src) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	884 predicate((UseSSE>=1) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	885 match(Set dst (AddF dst src));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	886
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	887 format %{ "addss $dst, $src" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	888 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	889 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	890 __ addss($dst$$XMMRegister, $src$$XMMRegister);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	891 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	892 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	893 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	894
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	895 instruct addF_mem(regF dst, memory src) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	896 predicate((UseSSE>=1) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	897 match(Set dst (AddF dst (LoadF src)));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	898
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	899 format %{ "addss $dst, $src" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	900 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	901 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	902 __ addss($dst$$XMMRegister, $src$$Address);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	903 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	904 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	905 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	906
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	907 instruct addF_imm(regF dst, immF con) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	908 predicate((UseSSE>=1) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	909 match(Set dst (AddF dst con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	910 format %{ "addss $dst, [$constantaddress]\t# load from constant table: float=$con" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	911 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	912 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	913 __ addss($dst$$XMMRegister, $constantaddress($con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	914 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	915 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	916 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	917
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	918 instruct addF_reg_reg(regF dst, regF src1, regF src2) %{
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	919 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	920 match(Set dst (AddF src1 src2));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	921
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	922 format %{ "vaddss $dst, $src1, $src2" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	923 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	924 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	925 __ vaddss($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	926 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	927 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	928 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	929
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	930 instruct addF_reg_mem(regF dst, regF src1, memory src2) %{
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	931 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	932 match(Set dst (AddF src1 (LoadF src2)));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	933
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	934 format %{ "vaddss $dst, $src1, $src2" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	935 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	936 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	937 __ vaddss($dst$$XMMRegister, $src1$$XMMRegister, $src2$$Address);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	938 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	939 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	940 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	941
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	942 instruct addF_reg_imm(regF dst, regF src, immF con) %{
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	943 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	944 match(Set dst (AddF src con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	945
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	946 format %{ "vaddss $dst, $src, [$constantaddress]\t# load from constant table: float=$con" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	947 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	948 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	949 __ vaddss($dst$$XMMRegister, $src$$XMMRegister, $constantaddress($con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	950 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	951 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	952 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	953
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	954 instruct addD_reg(regD dst, regD src) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	955 predicate((UseSSE>=2) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	956 match(Set dst (AddD dst src));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	957
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	958 format %{ "addsd $dst, $src" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	959 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	960 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	961 __ addsd($dst$$XMMRegister, $src$$XMMRegister);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	962 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	963 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	964 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	965
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	966 instruct addD_mem(regD dst, memory src) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	967 predicate((UseSSE>=2) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	968 match(Set dst (AddD dst (LoadD src)));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	969
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	970 format %{ "addsd $dst, $src" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	971 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	972 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	973 __ addsd($dst$$XMMRegister, $src$$Address);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	974 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	975 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	976 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	977
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	978 instruct addD_imm(regD dst, immD con) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	979 predicate((UseSSE>=2) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	980 match(Set dst (AddD dst con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	981 format %{ "addsd $dst, [$constantaddress]\t# load from constant table: double=$con" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	982 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	983 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	984 __ addsd($dst$$XMMRegister, $constantaddress($con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	985 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	986 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	987 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	988
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	989 instruct addD_reg_reg(regD dst, regD src1, regD src2) %{
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	990 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	991 match(Set dst (AddD src1 src2));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	992
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	993 format %{ "vaddsd $dst, $src1, $src2" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	994 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	995 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	996 __ vaddsd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	997 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	998 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	999 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1000
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1001 instruct addD_reg_mem(regD dst, regD src1, memory src2) %{
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1002 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1003 match(Set dst (AddD src1 (LoadD src2)));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1004
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1005 format %{ "vaddsd $dst, $src1, $src2" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1006 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1007 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1008 __ vaddsd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$Address);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1009 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1010 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1011 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1012
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1013 instruct addD_reg_imm(regD dst, regD src, immD con) %{
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1014 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1015 match(Set dst (AddD src con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1016
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1017 format %{ "vaddsd $dst, $src, [$constantaddress]\t# load from constant table: double=$con" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1018 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1019 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1020 __ vaddsd($dst$$XMMRegister, $src$$XMMRegister, $constantaddress($con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1021 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1022 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1023 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1024
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1025 instruct subF_reg(regF dst, regF src) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1026 predicate((UseSSE>=1) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1027 match(Set dst (SubF dst src));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1028
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1029 format %{ "subss $dst, $src" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1030 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1031 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1032 __ subss($dst$$XMMRegister, $src$$XMMRegister);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1033 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1034 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1035 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1036
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1037 instruct subF_mem(regF dst, memory src) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1038 predicate((UseSSE>=1) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1039 match(Set dst (SubF dst (LoadF src)));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1040
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1041 format %{ "subss $dst, $src" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1042 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1043 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1044 __ subss($dst$$XMMRegister, $src$$Address);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1045 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1046 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1047 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1048
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1049 instruct subF_imm(regF dst, immF con) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1050 predicate((UseSSE>=1) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1051 match(Set dst (SubF dst con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1052 format %{ "subss $dst, [$constantaddress]\t# load from constant table: float=$con" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1053 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1054 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1055 __ subss($dst$$XMMRegister, $constantaddress($con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1056 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1057 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1058 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1059
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1060 instruct subF_reg_reg(regF dst, regF src1, regF src2) %{
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1061 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1062 match(Set dst (SubF src1 src2));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1063
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1064 format %{ "vsubss $dst, $src1, $src2" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1065 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1066 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1067 __ vsubss($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1068 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1069 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1070 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1071
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1072 instruct subF_reg_mem(regF dst, regF src1, memory src2) %{
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1073 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1074 match(Set dst (SubF src1 (LoadF src2)));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1075
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1076 format %{ "vsubss $dst, $src1, $src2" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1077 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1078 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1079 __ vsubss($dst$$XMMRegister, $src1$$XMMRegister, $src2$$Address);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1080 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1081 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1082 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1083
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1084 instruct subF_reg_imm(regF dst, regF src, immF con) %{
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1085 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1086 match(Set dst (SubF src con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1087
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1088 format %{ "vsubss $dst, $src, [$constantaddress]\t# load from constant table: float=$con" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1089 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1090 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1091 __ vsubss($dst$$XMMRegister, $src$$XMMRegister, $constantaddress($con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1092 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1093 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1094 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1095
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1096 instruct subD_reg(regD dst, regD src) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1097 predicate((UseSSE>=2) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1098 match(Set dst (SubD dst src));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1099
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1100 format %{ "subsd $dst, $src" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1101 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1102 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1103 __ subsd($dst$$XMMRegister, $src$$XMMRegister);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1104 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1105 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1106 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1107
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1108 instruct subD_mem(regD dst, memory src) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1109 predicate((UseSSE>=2) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1110 match(Set dst (SubD dst (LoadD src)));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1111
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1112 format %{ "subsd $dst, $src" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1113 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1114 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1115 __ subsd($dst$$XMMRegister, $src$$Address);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1116 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1117 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1118 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1119
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1120 instruct subD_imm(regD dst, immD con) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1121 predicate((UseSSE>=2) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1122 match(Set dst (SubD dst con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1123 format %{ "subsd $dst, [$constantaddress]\t# load from constant table: double=$con" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1124 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1125 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1126 __ subsd($dst$$XMMRegister, $constantaddress($con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1127 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1128 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1129 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1130
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1131 instruct subD_reg_reg(regD dst, regD src1, regD src2) %{
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1132 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1133 match(Set dst (SubD src1 src2));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1134
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1135 format %{ "vsubsd $dst, $src1, $src2" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1136 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1137 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1138 __ vsubsd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1139 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1140 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1141 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1142
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1143 instruct subD_reg_mem(regD dst, regD src1, memory src2) %{
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1144 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1145 match(Set dst (SubD src1 (LoadD src2)));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1146
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1147 format %{ "vsubsd $dst, $src1, $src2" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1148 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1149 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1150 __ vsubsd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$Address);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1151 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1152 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1153 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1154
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1155 instruct subD_reg_imm(regD dst, regD src, immD con) %{
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1156 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1157 match(Set dst (SubD src con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1158
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1159 format %{ "vsubsd $dst, $src, [$constantaddress]\t# load from constant table: double=$con" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1160 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1161 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1162 __ vsubsd($dst$$XMMRegister, $src$$XMMRegister, $constantaddress($con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1163 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1164 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1165 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1166
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1167 instruct mulF_reg(regF dst, regF src) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1168 predicate((UseSSE>=1) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1169 match(Set dst (MulF dst src));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1170
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1171 format %{ "mulss $dst, $src" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1172 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1173 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1174 __ mulss($dst$$XMMRegister, $src$$XMMRegister);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1175 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1176 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1177 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1178
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1179 instruct mulF_mem(regF dst, memory src) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1180 predicate((UseSSE>=1) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1181 match(Set dst (MulF dst (LoadF src)));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1182
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1183 format %{ "mulss $dst, $src" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1184 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1185 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1186 __ mulss($dst$$XMMRegister, $src$$Address);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1187 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1188 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1189 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1190
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1191 instruct mulF_imm(regF dst, immF con) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1192 predicate((UseSSE>=1) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1193 match(Set dst (MulF dst con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1194 format %{ "mulss $dst, [$constantaddress]\t# load from constant table: float=$con" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1195 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1196 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1197 __ mulss($dst$$XMMRegister, $constantaddress($con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1198 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1199 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1200 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1201
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1202 instruct mulF_reg_reg(regF dst, regF src1, regF src2) %{
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1203 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1204 match(Set dst (MulF src1 src2));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1205
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1206 format %{ "vmulss $dst, $src1, $src2" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1207 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1208 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1209 __ vmulss($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1210 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1211 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1212 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1213
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1214 instruct mulF_reg_mem(regF dst, regF src1, memory src2) %{
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1215 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1216 match(Set dst (MulF src1 (LoadF src2)));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1217
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1218 format %{ "vmulss $dst, $src1, $src2" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1219 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1220 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1221 __ vmulss($dst$$XMMRegister, $src1$$XMMRegister, $src2$$Address);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1222 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1223 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1224 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1225
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1226 instruct mulF_reg_imm(regF dst, regF src, immF con) %{
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1227 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1228 match(Set dst (MulF src con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1229
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1230 format %{ "vmulss $dst, $src, [$constantaddress]\t# load from constant table: float=$con" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1231 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1232 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1233 __ vmulss($dst$$XMMRegister, $src$$XMMRegister, $constantaddress($con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1234 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1235 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1236 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1237
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1238 instruct mulD_reg(regD dst, regD src) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1239 predicate((UseSSE>=2) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1240 match(Set dst (MulD dst src));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1241
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1242 format %{ "mulsd $dst, $src" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1243 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1244 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1245 __ mulsd($dst$$XMMRegister, $src$$XMMRegister);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1246 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1247 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1248 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1249
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1250 instruct mulD_mem(regD dst, memory src) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1251 predicate((UseSSE>=2) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1252 match(Set dst (MulD dst (LoadD src)));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1253
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1254 format %{ "mulsd $dst, $src" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1255 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1256 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1257 __ mulsd($dst$$XMMRegister, $src$$Address);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1258 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1259 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1260 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1261
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1262 instruct mulD_imm(regD dst, immD con) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1263 predicate((UseSSE>=2) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1264 match(Set dst (MulD dst con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1265 format %{ "mulsd $dst, [$constantaddress]\t# load from constant table: double=$con" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1266 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1267 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1268 __ mulsd($dst$$XMMRegister, $constantaddress($con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1269 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1270 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1271 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1272
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1273 instruct mulD_reg_reg(regD dst, regD src1, regD src2) %{
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1274 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1275 match(Set dst (MulD src1 src2));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1276
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1277 format %{ "vmulsd $dst, $src1, $src2" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1278 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1279 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1280 __ vmulsd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1281 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1282 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1283 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1284
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1285 instruct mulD_reg_mem(regD dst, regD src1, memory src2) %{
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1286 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1287 match(Set dst (MulD src1 (LoadD src2)));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1288
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1289 format %{ "vmulsd $dst, $src1, $src2" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1290 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1291 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1292 __ vmulsd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$Address);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1293 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1294 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1295 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1296
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1297 instruct mulD_reg_imm(regD dst, regD src, immD con) %{
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1298 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1299 match(Set dst (MulD src con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1300
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1301 format %{ "vmulsd $dst, $src, [$constantaddress]\t# load from constant table: double=$con" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1302 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1303 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1304 __ vmulsd($dst$$XMMRegister, $src$$XMMRegister, $constantaddress($con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1305 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1306 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1307 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1308
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1309 instruct divF_reg(regF dst, regF src) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1310 predicate((UseSSE>=1) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1311 match(Set dst (DivF dst src));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1312
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1313 format %{ "divss $dst, $src" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1314 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1315 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1316 __ divss($dst$$XMMRegister, $src$$XMMRegister);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1317 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1318 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1319 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1320
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1321 instruct divF_mem(regF dst, memory src) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1322 predicate((UseSSE>=1) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1323 match(Set dst (DivF dst (LoadF src)));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1324
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1325 format %{ "divss $dst, $src" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1326 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1327 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1328 __ divss($dst$$XMMRegister, $src$$Address);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1329 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1330 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1331 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1332
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1333 instruct divF_imm(regF dst, immF con) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1334 predicate((UseSSE>=1) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1335 match(Set dst (DivF dst con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1336 format %{ "divss $dst, [$constantaddress]\t# load from constant table: float=$con" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1337 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1338 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1339 __ divss($dst$$XMMRegister, $constantaddress($con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1340 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1341 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1342 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1343
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1344 instruct divF_reg_reg(regF dst, regF src1, regF src2) %{
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1345 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1346 match(Set dst (DivF src1 src2));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1347
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1348 format %{ "vdivss $dst, $src1, $src2" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1349 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1350 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1351 __ vdivss($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1352 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1353 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1354 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1355
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1356 instruct divF_reg_mem(regF dst, regF src1, memory src2) %{
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1357 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1358 match(Set dst (DivF src1 (LoadF src2)));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1359
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1360 format %{ "vdivss $dst, $src1, $src2" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1361 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1362 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1363 __ vdivss($dst$$XMMRegister, $src1$$XMMRegister, $src2$$Address);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1364 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1365 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1366 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1367
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1368 instruct divF_reg_imm(regF dst, regF src, immF con) %{
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1369 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1370 match(Set dst (DivF src con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1371
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1372 format %{ "vdivss $dst, $src, [$constantaddress]\t# load from constant table: float=$con" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1373 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1374 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1375 __ vdivss($dst$$XMMRegister, $src$$XMMRegister, $constantaddress($con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1376 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1377 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1378 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1379
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1380 instruct divD_reg(regD dst, regD src) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1381 predicate((UseSSE>=2) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1382 match(Set dst (DivD dst src));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1383
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1384 format %{ "divsd $dst, $src" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1385 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1386 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1387 __ divsd($dst$$XMMRegister, $src$$XMMRegister);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1388 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1389 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1390 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1391
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1392 instruct divD_mem(regD dst, memory src) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1393 predicate((UseSSE>=2) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1394 match(Set dst (DivD dst (LoadD src)));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1395
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1396 format %{ "divsd $dst, $src" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1397 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1398 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1399 __ divsd($dst$$XMMRegister, $src$$Address);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1400 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1401 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1402 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1403
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1404 instruct divD_imm(regD dst, immD con) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1405 predicate((UseSSE>=2) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1406 match(Set dst (DivD dst con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1407 format %{ "divsd $dst, [$constantaddress]\t# load from constant table: double=$con" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1408 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1409 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1410 __ divsd($dst$$XMMRegister, $constantaddress($con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1411 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1412 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1413 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1414
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1415 instruct divD_reg_reg(regD dst, regD src1, regD src2) %{
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1416 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1417 match(Set dst (DivD src1 src2));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1418
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1419 format %{ "vdivsd $dst, $src1, $src2" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1420 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1421 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1422 __ vdivsd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1423 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1424 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1425 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1426
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1427 instruct divD_reg_mem(regD dst, regD src1, memory src2) %{
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1428 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1429 match(Set dst (DivD src1 (LoadD src2)));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1430
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1431 format %{ "vdivsd $dst, $src1, $src2" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1432 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1433 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1434 __ vdivsd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$Address);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1435 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1436 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1437 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1438
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1439 instruct divD_reg_imm(regD dst, regD src, immD con) %{
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1440 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1441 match(Set dst (DivD src con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1442
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1443 format %{ "vdivsd $dst, $src, [$constantaddress]\t# load from constant table: double=$con" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1444 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1445 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1446 __ vdivsd($dst$$XMMRegister, $src$$XMMRegister, $constantaddress($con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1447 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1448 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1449 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1450
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1451 instruct absF_reg(regF dst) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1452 predicate((UseSSE>=1) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1453 match(Set dst (AbsF dst));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1454 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1455 format %{ "andps $dst, [0x7fffffff]\t# abs float by sign masking" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1456 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1457 __ andps($dst$$XMMRegister, ExternalAddress(float_signmask()));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1458 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1459 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1460 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1461
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1462 instruct absF_reg_reg(regF dst, regF src) %{
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1463 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1464 match(Set dst (AbsF src));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1465 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1466 format %{ "vandps $dst, $src, [0x7fffffff]\t# abs float by sign masking" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1467 ins_encode %{
6614 006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	1468 bool vector256 = false;
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1469 __ vandps($dst$$XMMRegister, $src$$XMMRegister,
6614 006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	1470 ExternalAddress(float_signmask()), vector256);
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1471 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1472 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1473 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1474
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1475 instruct absD_reg(regD dst) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1476 predicate((UseSSE>=2) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1477 match(Set dst (AbsD dst));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1478 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1479 format %{ "andpd $dst, [0x7fffffffffffffff]\t"
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1480 "# abs double by sign masking" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1481 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1482 __ andpd($dst$$XMMRegister, ExternalAddress(double_signmask()));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1483 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1484 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1485 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1486
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1487 instruct absD_reg_reg(regD dst, regD src) %{
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1488 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1489 match(Set dst (AbsD src));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1490 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1491 format %{ "vandpd $dst, $src, [0x7fffffffffffffff]\t"
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1492 "# abs double by sign masking" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1493 ins_encode %{
6614 006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	1494 bool vector256 = false;
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1495 __ vandpd($dst$$XMMRegister, $src$$XMMRegister,
6614 006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	1496 ExternalAddress(double_signmask()), vector256);
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1497 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1498 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1499 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1500
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1501 instruct negF_reg(regF dst) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1502 predicate((UseSSE>=1) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1503 match(Set dst (NegF dst));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1504 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1505 format %{ "xorps $dst, [0x80000000]\t# neg float by sign flipping" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1506 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1507 __ xorps($dst$$XMMRegister, ExternalAddress(float_signflip()));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1508 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1509 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1510 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1511
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1512 instruct negF_reg_reg(regF dst, regF src) %{
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1513 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1514 match(Set dst (NegF src));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1515 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1516 format %{ "vxorps $dst, $src, [0x80000000]\t# neg float by sign flipping" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1517 ins_encode %{
6614 006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	1518 bool vector256 = false;
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1519 __ vxorps($dst$$XMMRegister, $src$$XMMRegister,
6614 006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	1520 ExternalAddress(float_signflip()), vector256);
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1521 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1522 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1523 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1524
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1525 instruct negD_reg(regD dst) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1526 predicate((UseSSE>=2) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1527 match(Set dst (NegD dst));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1528 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1529 format %{ "xorpd $dst, [0x8000000000000000]\t"
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1530 "# neg double by sign flipping" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1531 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1532 __ xorpd($dst$$XMMRegister, ExternalAddress(double_signflip()));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1533 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1534 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1535 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1536
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1537 instruct negD_reg_reg(regD dst, regD src) %{
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1538 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1539 match(Set dst (NegD src));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1540 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1541 format %{ "vxorpd $dst, $src, [0x8000000000000000]\t"
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1542 "# neg double by sign flipping" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1543 ins_encode %{
6614 006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	1544 bool vector256 = false;
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1545 __ vxorpd($dst$$XMMRegister, $src$$XMMRegister,
6614 006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	1546 ExternalAddress(double_signflip()), vector256);
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1547 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1548 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1549 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1550
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1551 instruct sqrtF_reg(regF dst, regF src) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1552 predicate(UseSSE>=1);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1553 match(Set dst (ConvD2F (SqrtD (ConvF2D src))));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1554
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1555 format %{ "sqrtss $dst, $src" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1556 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1557 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1558 __ sqrtss($dst$$XMMRegister, $src$$XMMRegister);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1559 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1560 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1561 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1562
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1563 instruct sqrtF_mem(regF dst, memory src) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1564 predicate(UseSSE>=1);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1565 match(Set dst (ConvD2F (SqrtD (ConvF2D (LoadF src)))));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1566
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1567 format %{ "sqrtss $dst, $src" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1568 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1569 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1570 __ sqrtss($dst$$XMMRegister, $src$$Address);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1571 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1572 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1573 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1574
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1575 instruct sqrtF_imm(regF dst, immF con) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1576 predicate(UseSSE>=1);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1577 match(Set dst (ConvD2F (SqrtD (ConvF2D con))));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1578 format %{ "sqrtss $dst, [$constantaddress]\t# load from constant table: float=$con" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1579 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1580 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1581 __ sqrtss($dst$$XMMRegister, $constantaddress($con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1582 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1583 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1584 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1585
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1586 instruct sqrtD_reg(regD dst, regD src) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1587 predicate(UseSSE>=2);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1588 match(Set dst (SqrtD src));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1589
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1590 format %{ "sqrtsd $dst, $src" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1591 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1592 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1593 __ sqrtsd($dst$$XMMRegister, $src$$XMMRegister);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1594 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1595 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1596 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1597
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1598 instruct sqrtD_mem(regD dst, memory src) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1599 predicate(UseSSE>=2);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1600 match(Set dst (SqrtD (LoadD src)));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1601
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1602 format %{ "sqrtsd $dst, $src" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1603 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1604 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1605 __ sqrtsd($dst$$XMMRegister, $src$$Address);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1606 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1607 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1608 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1609
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1610 instruct sqrtD_imm(regD dst, immD con) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1611 predicate(UseSSE>=2);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1612 match(Set dst (SqrtD con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1613 format %{ "sqrtsd $dst, [$constantaddress]\t# load from constant table: double=$con" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1614 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1615 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1616 __ sqrtsd($dst$$XMMRegister, $constantaddress($con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1617 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1618 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1619 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1620
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1621
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1622 // ====================VECTOR INSTRUCTIONS=====================================
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1623
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1624 // Load vectors (4 bytes long)
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1625 instruct loadV4(vecS dst, memory mem) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1626 predicate(n->as_LoadVector()->memory_size() == 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1627 match(Set dst (LoadVector mem));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1628 ins_cost(125);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1629 format %{ "movd $dst,$mem\t! load vector (4 bytes)" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1630 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1631 __ movdl($dst$$XMMRegister, $mem$$Address);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1632 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1633 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1634 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1635
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1636 // Load vectors (8 bytes long)
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1637 instruct loadV8(vecD dst, memory mem) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1638 predicate(n->as_LoadVector()->memory_size() == 8);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1639 match(Set dst (LoadVector mem));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1640 ins_cost(125);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1641 format %{ "movq $dst,$mem\t! load vector (8 bytes)" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1642 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1643 __ movq($dst$$XMMRegister, $mem$$Address);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1644 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1645 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1646 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1647
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1648 // Load vectors (16 bytes long)
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1649 instruct loadV16(vecX dst, memory mem) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1650 predicate(n->as_LoadVector()->memory_size() == 16);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1651 match(Set dst (LoadVector mem));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1652 ins_cost(125);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1653 format %{ "movdqu $dst,$mem\t! load vector (16 bytes)" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1654 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1655 __ movdqu($dst$$XMMRegister, $mem$$Address);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1656 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1657 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1658 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1659
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1660 // Load vectors (32 bytes long)
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1661 instruct loadV32(vecY dst, memory mem) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1662 predicate(n->as_LoadVector()->memory_size() == 32);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1663 match(Set dst (LoadVector mem));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1664 ins_cost(125);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1665 format %{ "vmovdqu $dst,$mem\t! load vector (32 bytes)" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1666 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1667 __ vmovdqu($dst$$XMMRegister, $mem$$Address);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1668 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1669 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1670 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1671
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1672 // Store vectors
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1673 instruct storeV4(memory mem, vecS src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1674 predicate(n->as_StoreVector()->memory_size() == 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1675 match(Set mem (StoreVector mem src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1676 ins_cost(145);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1677 format %{ "movd $mem,$src\t! store vector (4 bytes)" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1678 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1679 __ movdl($mem$$Address, $src$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1680 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1681 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1682 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1683
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1684 instruct storeV8(memory mem, vecD src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1685 predicate(n->as_StoreVector()->memory_size() == 8);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1686 match(Set mem (StoreVector mem src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1687 ins_cost(145);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1688 format %{ "movq $mem,$src\t! store vector (8 bytes)" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1689 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1690 __ movq($mem$$Address, $src$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1691 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1692 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1693 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1694
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1695 instruct storeV16(memory mem, vecX src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1696 predicate(n->as_StoreVector()->memory_size() == 16);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1697 match(Set mem (StoreVector mem src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1698 ins_cost(145);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1699 format %{ "movdqu $mem,$src\t! store vector (16 bytes)" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1700 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1701 __ movdqu($mem$$Address, $src$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1702 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1703 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1704 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1705
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1706 instruct storeV32(memory mem, vecY src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1707 predicate(n->as_StoreVector()->memory_size() == 32);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1708 match(Set mem (StoreVector mem src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1709 ins_cost(145);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1710 format %{ "vmovdqu $mem,$src\t! store vector (32 bytes)" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1711 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1712 __ vmovdqu($mem$$Address, $src$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1713 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1714 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1715 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1716
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1717 // Replicate byte scalar to be vector
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1718 instruct Repl4B(vecS dst, rRegI src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1719 predicate(n->as_Vector()->length() == 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1720 match(Set dst (ReplicateB src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1721 format %{ "movd $dst,$src\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1722 "punpcklbw $dst,$dst\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1723 "pshuflw $dst,$dst,0x00\t! replicate4B" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1724 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1725 __ movdl($dst$$XMMRegister, $src$$Register);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1726 __ punpcklbw($dst$$XMMRegister, $dst$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1727 __ pshuflw($dst$$XMMRegister, $dst$$XMMRegister, 0x00);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1728 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1729 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1730 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1731
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1732 instruct Repl8B(vecD dst, rRegI src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1733 predicate(n->as_Vector()->length() == 8);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1734 match(Set dst (ReplicateB src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1735 format %{ "movd $dst,$src\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1736 "punpcklbw $dst,$dst\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1737 "pshuflw $dst,$dst,0x00\t! replicate8B" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1738 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1739 __ movdl($dst$$XMMRegister, $src$$Register);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1740 __ punpcklbw($dst$$XMMRegister, $dst$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1741 __ pshuflw($dst$$XMMRegister, $dst$$XMMRegister, 0x00);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1742 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1743 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1744 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1745
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1746 instruct Repl16B(vecX dst, rRegI src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1747 predicate(n->as_Vector()->length() == 16);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1748 match(Set dst (ReplicateB src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1749 format %{ "movd $dst,$src\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1750 "punpcklbw $dst,$dst\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1751 "pshuflw $dst,$dst,0x00\n\t"
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1752 "punpcklqdq $dst,$dst\t! replicate16B" %}
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1753 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1754 __ movdl($dst$$XMMRegister, $src$$Register);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1755 __ punpcklbw($dst$$XMMRegister, $dst$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1756 __ pshuflw($dst$$XMMRegister, $dst$$XMMRegister, 0x00);
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1757 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister);
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1758 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1759 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1760 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1761
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1762 instruct Repl32B(vecY dst, rRegI src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1763 predicate(n->as_Vector()->length() == 32);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1764 match(Set dst (ReplicateB src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1765 format %{ "movd $dst,$src\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1766 "punpcklbw $dst,$dst\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1767 "pshuflw $dst,$dst,0x00\n\t"
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1768 "punpcklqdq $dst,$dst\n\t"
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1769 "vinserti128h $dst,$dst,$dst\t! replicate32B" %}
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1770 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1771 __ movdl($dst$$XMMRegister, $src$$Register);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1772 __ punpcklbw($dst$$XMMRegister, $dst$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1773 __ pshuflw($dst$$XMMRegister, $dst$$XMMRegister, 0x00);
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1774 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister);
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1775 __ vinserti128h($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister);
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1776 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1777 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1778 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1779
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1780 // Replicate byte scalar immediate to be vector by loading from const table.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1781 instruct Repl4B_imm(vecS dst, immI con) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1782 predicate(n->as_Vector()->length() == 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1783 match(Set dst (ReplicateB con));
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1784 format %{ "movdl $dst,[$constantaddress]\t! replicate4B($con)" %}
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1785 ins_encode %{
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1786 __ movdl($dst$$XMMRegister, $constantaddress(replicate4_imm($con$$constant, 1)));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1787 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1788 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1789 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1790
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1791 instruct Repl8B_imm(vecD dst, immI con) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1792 predicate(n->as_Vector()->length() == 8);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1793 match(Set dst (ReplicateB con));
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1794 format %{ "movq $dst,[$constantaddress]\t! replicate8B($con)" %}
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1795 ins_encode %{
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1796 __ movq($dst$$XMMRegister, $constantaddress(replicate8_imm($con$$constant, 1)));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1797 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1798 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1799 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1800
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1801 instruct Repl16B_imm(vecX dst, immI con) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1802 predicate(n->as_Vector()->length() == 16);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1803 match(Set dst (ReplicateB con));
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1804 format %{ "movq $dst,[$constantaddress]\n\t"
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1805 "punpcklqdq $dst,$dst\t! replicate16B($con)" %}
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1806 ins_encode %{
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1807 __ movq($dst$$XMMRegister, $constantaddress(replicate8_imm($con$$constant, 1)));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1808 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister);
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1809 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1810 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1811 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1812
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1813 instruct Repl32B_imm(vecY dst, immI con) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1814 predicate(n->as_Vector()->length() == 32);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1815 match(Set dst (ReplicateB con));
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1816 format %{ "movq $dst,[$constantaddress]\n\t"
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1817 "punpcklqdq $dst,$dst\n\t"
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1818 "vinserti128h $dst,$dst,$dst\t! lreplicate32B($con)" %}
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1819 ins_encode %{
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1820 __ movq($dst$$XMMRegister, $constantaddress(replicate8_imm($con$$constant, 1)));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1821 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister);
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1822 __ vinserti128h($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister);
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1823 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1824 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1825 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1826
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1827 // Replicate byte scalar zero to be vector
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1828 instruct Repl4B_zero(vecS dst, immI0 zero) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1829 predicate(n->as_Vector()->length() == 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1830 match(Set dst (ReplicateB zero));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1831 format %{ "pxor $dst,$dst\t! replicate4B zero" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1832 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1833 __ pxor($dst$$XMMRegister, $dst$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1834 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1835 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1836 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1837
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1838 instruct Repl8B_zero(vecD dst, immI0 zero) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1839 predicate(n->as_Vector()->length() == 8);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1840 match(Set dst (ReplicateB zero));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1841 format %{ "pxor $dst,$dst\t! replicate8B zero" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1842 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1843 __ pxor($dst$$XMMRegister, $dst$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1844 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1845 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1846 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1847
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1848 instruct Repl16B_zero(vecX dst, immI0 zero) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1849 predicate(n->as_Vector()->length() == 16);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1850 match(Set dst (ReplicateB zero));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1851 format %{ "pxor $dst,$dst\t! replicate16B zero" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1852 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1853 __ pxor($dst$$XMMRegister, $dst$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1854 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1855 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1856 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1857
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1858 instruct Repl32B_zero(vecY dst, immI0 zero) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1859 predicate(n->as_Vector()->length() == 32);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1860 match(Set dst (ReplicateB zero));
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1861 format %{ "vpxor $dst,$dst,$dst\t! replicate32B zero" %}
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1862 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1863 // Use vxorpd since AVX does not have vpxor for 256-bit (AVX2 will have it).
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1864 bool vector256 = true;
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1865 __ vpxor($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister, vector256);
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1866 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1867 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1868 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1869
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1870 // Replicate char/short (2 byte) scalar to be vector
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1871 instruct Repl2S(vecS dst, rRegI src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1872 predicate(n->as_Vector()->length() == 2);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1873 match(Set dst (ReplicateS src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1874 format %{ "movd $dst,$src\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1875 "pshuflw $dst,$dst,0x00\t! replicate2S" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1876 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1877 __ movdl($dst$$XMMRegister, $src$$Register);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1878 __ pshuflw($dst$$XMMRegister, $dst$$XMMRegister, 0x00);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1879 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1880 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1881 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1882
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1883 instruct Repl4S(vecD dst, rRegI src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1884 predicate(n->as_Vector()->length() == 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1885 match(Set dst (ReplicateS src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1886 format %{ "movd $dst,$src\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1887 "pshuflw $dst,$dst,0x00\t! replicate4S" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1888 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1889 __ movdl($dst$$XMMRegister, $src$$Register);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1890 __ pshuflw($dst$$XMMRegister, $dst$$XMMRegister, 0x00);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1891 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1892 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1893 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1894
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1895 instruct Repl8S(vecX dst, rRegI src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1896 predicate(n->as_Vector()->length() == 8);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1897 match(Set dst (ReplicateS src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1898 format %{ "movd $dst,$src\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1899 "pshuflw $dst,$dst,0x00\n\t"
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1900 "punpcklqdq $dst,$dst\t! replicate8S" %}
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1901 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1902 __ movdl($dst$$XMMRegister, $src$$Register);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1903 __ pshuflw($dst$$XMMRegister, $dst$$XMMRegister, 0x00);
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1904 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister);
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1905 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1906 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1907 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1908
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1909 instruct Repl16S(vecY dst, rRegI src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1910 predicate(n->as_Vector()->length() == 16);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1911 match(Set dst (ReplicateS src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1912 format %{ "movd $dst,$src\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1913 "pshuflw $dst,$dst,0x00\n\t"
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1914 "punpcklqdq $dst,$dst\n\t"
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1915 "vinserti128h $dst,$dst,$dst\t! replicate16S" %}
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1916 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1917 __ movdl($dst$$XMMRegister, $src$$Register);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1918 __ pshuflw($dst$$XMMRegister, $dst$$XMMRegister, 0x00);
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1919 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister);
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1920 __ vinserti128h($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister);
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1921 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1922 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1923 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1924
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1925 // Replicate char/short (2 byte) scalar immediate to be vector by loading from const table.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1926 instruct Repl2S_imm(vecS dst, immI con) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1927 predicate(n->as_Vector()->length() == 2);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1928 match(Set dst (ReplicateS con));
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1929 format %{ "movdl $dst,[$constantaddress]\t! replicate2S($con)" %}
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1930 ins_encode %{
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1931 __ movdl($dst$$XMMRegister, $constantaddress(replicate4_imm($con$$constant, 2)));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1932 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1933 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1934 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1935
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1936 instruct Repl4S_imm(vecD dst, immI con) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1937 predicate(n->as_Vector()->length() == 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1938 match(Set dst (ReplicateS con));
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1939 format %{ "movq $dst,[$constantaddress]\t! replicate4S($con)" %}
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1940 ins_encode %{
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1941 __ movq($dst$$XMMRegister, $constantaddress(replicate8_imm($con$$constant, 2)));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1942 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1943 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1944 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1945
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1946 instruct Repl8S_imm(vecX dst, immI con) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1947 predicate(n->as_Vector()->length() == 8);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1948 match(Set dst (ReplicateS con));
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1949 format %{ "movq $dst,[$constantaddress]\n\t"
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1950 "punpcklqdq $dst,$dst\t! replicate8S($con)" %}
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1951 ins_encode %{
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1952 __ movq($dst$$XMMRegister, $constantaddress(replicate8_imm($con$$constant, 2)));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1953 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister);
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1954 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1955 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1956 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1957
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1958 instruct Repl16S_imm(vecY dst, immI con) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1959 predicate(n->as_Vector()->length() == 16);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1960 match(Set dst (ReplicateS con));
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1961 format %{ "movq $dst,[$constantaddress]\n\t"
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1962 "punpcklqdq $dst,$dst\n\t"
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1963 "vinserti128h $dst,$dst,$dst\t! replicate16S($con)" %}
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1964 ins_encode %{
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1965 __ movq($dst$$XMMRegister, $constantaddress(replicate8_imm($con$$constant, 2)));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1966 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister);
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1967 __ vinserti128h($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister);
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1968 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1969 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1970 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1971
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1972 // Replicate char/short (2 byte) scalar zero to be vector
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1973 instruct Repl2S_zero(vecS dst, immI0 zero) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1974 predicate(n->as_Vector()->length() == 2);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1975 match(Set dst (ReplicateS zero));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1976 format %{ "pxor $dst,$dst\t! replicate2S zero" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1977 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1978 __ pxor($dst$$XMMRegister, $dst$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1979 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1980 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1981 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1982
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1983 instruct Repl4S_zero(vecD dst, immI0 zero) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1984 predicate(n->as_Vector()->length() == 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1985 match(Set dst (ReplicateS zero));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1986 format %{ "pxor $dst,$dst\t! replicate4S zero" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1987 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1988 __ pxor($dst$$XMMRegister, $dst$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1989 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1990 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1991 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1992
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1993 instruct Repl8S_zero(vecX dst, immI0 zero) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1994 predicate(n->as_Vector()->length() == 8);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1995 match(Set dst (ReplicateS zero));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1996 format %{ "pxor $dst,$dst\t! replicate8S zero" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1997 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1998 __ pxor($dst$$XMMRegister, $dst$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1999 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2000 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2001 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2002
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2003 instruct Repl16S_zero(vecY dst, immI0 zero) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2004 predicate(n->as_Vector()->length() == 16);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2005 match(Set dst (ReplicateS zero));
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2006 format %{ "vpxor $dst,$dst,$dst\t! replicate16S zero" %}
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2007 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2008 // Use vxorpd since AVX does not have vpxor for 256-bit (AVX2 will have it).
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2009 bool vector256 = true;
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2010 __ vpxor($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister, vector256);
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2011 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2012 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2013 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2014
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2015 // Replicate integer (4 byte) scalar to be vector
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2016 instruct Repl2I(vecD dst, rRegI src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2017 predicate(n->as_Vector()->length() == 2);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2018 match(Set dst (ReplicateI src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2019 format %{ "movd $dst,$src\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2020 "pshufd $dst,$dst,0x00\t! replicate2I" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2021 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2022 __ movdl($dst$$XMMRegister, $src$$Register);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2023 __ pshufd($dst$$XMMRegister, $dst$$XMMRegister, 0x00);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2024 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2025 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2026 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2027
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2028 instruct Repl4I(vecX dst, rRegI src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2029 predicate(n->as_Vector()->length() == 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2030 match(Set dst (ReplicateI src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2031 format %{ "movd $dst,$src\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2032 "pshufd $dst,$dst,0x00\t! replicate4I" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2033 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2034 __ movdl($dst$$XMMRegister, $src$$Register);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2035 __ pshufd($dst$$XMMRegister, $dst$$XMMRegister, 0x00);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2036 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2037 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2038 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2039
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2040 instruct Repl8I(vecY dst, rRegI src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2041 predicate(n->as_Vector()->length() == 8);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2042 match(Set dst (ReplicateI src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2043 format %{ "movd $dst,$src\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2044 "pshufd $dst,$dst,0x00\n\t"
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2045 "vinserti128h $dst,$dst,$dst\t! replicate8I" %}
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2046 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2047 __ movdl($dst$$XMMRegister, $src$$Register);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2048 __ pshufd($dst$$XMMRegister, $dst$$XMMRegister, 0x00);
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2049 __ vinserti128h($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister);
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2050 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2051 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2052 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2053
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2054 // Replicate integer (4 byte) scalar immediate to be vector by loading from const table.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2055 instruct Repl2I_imm(vecD dst, immI con) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2056 predicate(n->as_Vector()->length() == 2);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2057 match(Set dst (ReplicateI con));
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2058 format %{ "movq $dst,[$constantaddress]\t! replicate2I($con)" %}
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2059 ins_encode %{
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2060 __ movq($dst$$XMMRegister, $constantaddress(replicate8_imm($con$$constant, 4)));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2061 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2062 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2063 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2064
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2065 instruct Repl4I_imm(vecX dst, immI con) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2066 predicate(n->as_Vector()->length() == 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2067 match(Set dst (ReplicateI con));
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2068 format %{ "movq $dst,[$constantaddress]\t! replicate4I($con)\n\t"
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2069 "punpcklqdq $dst,$dst" %}
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2070 ins_encode %{
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2071 __ movq($dst$$XMMRegister, $constantaddress(replicate8_imm($con$$constant, 4)));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2072 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister);
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2073 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2074 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2075 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2076
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2077 instruct Repl8I_imm(vecY dst, immI con) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2078 predicate(n->as_Vector()->length() == 8);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2079 match(Set dst (ReplicateI con));
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2080 format %{ "movq $dst,[$constantaddress]\t! replicate8I($con)\n\t"
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2081 "punpcklqdq $dst,$dst\n\t"
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2082 "vinserti128h $dst,$dst,$dst" %}
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2083 ins_encode %{
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2084 __ movq($dst$$XMMRegister, $constantaddress(replicate8_imm($con$$constant, 4)));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2085 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister);
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2086 __ vinserti128h($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister);
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2087 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2088 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2089 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2090
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2091 // Integer could be loaded into xmm register directly from memory.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2092 instruct Repl2I_mem(vecD dst, memory mem) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2093 predicate(n->as_Vector()->length() == 2);
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2094 match(Set dst (ReplicateI (LoadI mem)));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2095 format %{ "movd $dst,$mem\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2096 "pshufd $dst,$dst,0x00\t! replicate2I" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2097 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2098 __ movdl($dst$$XMMRegister, $mem$$Address);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2099 __ pshufd($dst$$XMMRegister, $dst$$XMMRegister, 0x00);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2100 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2101 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2102 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2103
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2104 instruct Repl4I_mem(vecX dst, memory mem) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2105 predicate(n->as_Vector()->length() == 4);
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2106 match(Set dst (ReplicateI (LoadI mem)));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2107 format %{ "movd $dst,$mem\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2108 "pshufd $dst,$dst,0x00\t! replicate4I" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2109 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2110 __ movdl($dst$$XMMRegister, $mem$$Address);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2111 __ pshufd($dst$$XMMRegister, $dst$$XMMRegister, 0x00);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2112 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2113 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2114 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2115
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2116 instruct Repl8I_mem(vecY dst, memory mem) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2117 predicate(n->as_Vector()->length() == 8);
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2118 match(Set dst (ReplicateI (LoadI mem)));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2119 format %{ "movd $dst,$mem\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2120 "pshufd $dst,$dst,0x00\n\t"
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2121 "vinserti128h $dst,$dst,$dst\t! replicate8I" %}
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2122 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2123 __ movdl($dst$$XMMRegister, $mem$$Address);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2124 __ pshufd($dst$$XMMRegister, $dst$$XMMRegister, 0x00);
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2125 __ vinserti128h($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister);
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2126 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2127 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2128 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2129
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2130 // Replicate integer (4 byte) scalar zero to be vector
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2131 instruct Repl2I_zero(vecD dst, immI0 zero) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2132 predicate(n->as_Vector()->length() == 2);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2133 match(Set dst (ReplicateI zero));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2134 format %{ "pxor $dst,$dst\t! replicate2I" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2135 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2136 __ pxor($dst$$XMMRegister, $dst$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2137 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2138 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2139 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2140
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2141 instruct Repl4I_zero(vecX dst, immI0 zero) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2142 predicate(n->as_Vector()->length() == 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2143 match(Set dst (ReplicateI zero));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2144 format %{ "pxor $dst,$dst\t! replicate4I zero)" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2145 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2146 __ pxor($dst$$XMMRegister, $dst$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2147 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2148 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2149 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2150
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2151 instruct Repl8I_zero(vecY dst, immI0 zero) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2152 predicate(n->as_Vector()->length() == 8);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2153 match(Set dst (ReplicateI zero));
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2154 format %{ "vpxor $dst,$dst,$dst\t! replicate8I zero" %}
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2155 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2156 // Use vxorpd since AVX does not have vpxor for 256-bit (AVX2 will have it).
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2157 bool vector256 = true;
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2158 __ vpxor($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister, vector256);
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2159 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2160 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2161 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2162
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2163 // Replicate long (8 byte) scalar to be vector
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2164 #ifdef _LP64
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2165 instruct Repl2L(vecX dst, rRegL src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2166 predicate(n->as_Vector()->length() == 2);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2167 match(Set dst (ReplicateL src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2168 format %{ "movdq $dst,$src\n\t"
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2169 "punpcklqdq $dst,$dst\t! replicate2L" %}
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2170 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2171 __ movdq($dst$$XMMRegister, $src$$Register);
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2172 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister);
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2173 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2174 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2175 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2176
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2177 instruct Repl4L(vecY dst, rRegL src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2178 predicate(n->as_Vector()->length() == 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2179 match(Set dst (ReplicateL src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2180 format %{ "movdq $dst,$src\n\t"
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2181 "punpcklqdq $dst,$dst\n\t"
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2182 "vinserti128h $dst,$dst,$dst\t! replicate4L" %}
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2183 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2184 __ movdq($dst$$XMMRegister, $src$$Register);
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2185 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister);
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2186 __ vinserti128h($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister);
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2187 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2188 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2189 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2190 #else // _LP64
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2191 instruct Repl2L(vecX dst, eRegL src, regD tmp) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2192 predicate(n->as_Vector()->length() == 2);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2193 match(Set dst (ReplicateL src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2194 effect(TEMP dst, USE src, TEMP tmp);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2195 format %{ "movdl $dst,$src.lo\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2196 "movdl $tmp,$src.hi\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2197 "punpckldq $dst,$tmp\n\t"
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2198 "punpcklqdq $dst,$dst\t! replicate2L"%}
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2199 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2200 __ movdl($dst$$XMMRegister, $src$$Register);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2201 __ movdl($tmp$$XMMRegister, HIGH_FROM_LOW($src$$Register));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2202 __ punpckldq($dst$$XMMRegister, $tmp$$XMMRegister);
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2203 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister);
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2204 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2205 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2206 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2207
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2208 instruct Repl4L(vecY dst, eRegL src, regD tmp) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2209 predicate(n->as_Vector()->length() == 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2210 match(Set dst (ReplicateL src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2211 effect(TEMP dst, USE src, TEMP tmp);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2212 format %{ "movdl $dst,$src.lo\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2213 "movdl $tmp,$src.hi\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2214 "punpckldq $dst,$tmp\n\t"
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2215 "punpcklqdq $dst,$dst\n\t"
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2216 "vinserti128h $dst,$dst,$dst\t! replicate4L" %}
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2217 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2218 __ movdl($dst$$XMMRegister, $src$$Register);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2219 __ movdl($tmp$$XMMRegister, HIGH_FROM_LOW($src$$Register));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2220 __ punpckldq($dst$$XMMRegister, $tmp$$XMMRegister);
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2221 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister);
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2222 __ vinserti128h($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister);
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2223 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2224 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2225 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2226 #endif // _LP64
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2227
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2228 // Replicate long (8 byte) scalar immediate to be vector by loading from const table.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2229 instruct Repl2L_imm(vecX dst, immL con) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2230 predicate(n->as_Vector()->length() == 2);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2231 match(Set dst (ReplicateL con));
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2232 format %{ "movq $dst,[$constantaddress]\n\t"
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2233 "punpcklqdq $dst,$dst\t! replicate2L($con)" %}
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2234 ins_encode %{
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2235 __ movq($dst$$XMMRegister, $constantaddress($con));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2236 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister);
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2237 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2238 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2239 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2240
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2241 instruct Repl4L_imm(vecY dst, immL con) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2242 predicate(n->as_Vector()->length() == 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2243 match(Set dst (ReplicateL con));
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2244 format %{ "movq $dst,[$constantaddress]\n\t"
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2245 "punpcklqdq $dst,$dst\n\t"
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2246 "vinserti128h $dst,$dst,$dst\t! replicate4L($con)" %}
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2247 ins_encode %{
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2248 __ movq($dst$$XMMRegister, $constantaddress($con));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2249 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister);
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2250 __ vinserti128h($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister);
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2251 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2252 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2253 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2254
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2255 // Long could be loaded into xmm register directly from memory.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2256 instruct Repl2L_mem(vecX dst, memory mem) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2257 predicate(n->as_Vector()->length() == 2);
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2258 match(Set dst (ReplicateL (LoadL mem)));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2259 format %{ "movq $dst,$mem\n\t"
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2260 "punpcklqdq $dst,$dst\t! replicate2L" %}
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2261 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2262 __ movq($dst$$XMMRegister, $mem$$Address);
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2263 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister);
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2264 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2265 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2266 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2267
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2268 instruct Repl4L_mem(vecY dst, memory mem) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2269 predicate(n->as_Vector()->length() == 4);
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2270 match(Set dst (ReplicateL (LoadL mem)));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2271 format %{ "movq $dst,$mem\n\t"
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2272 "punpcklqdq $dst,$dst\n\t"
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2273 "vinserti128h $dst,$dst,$dst\t! replicate4L" %}
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2274 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2275 __ movq($dst$$XMMRegister, $mem$$Address);
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2276 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister);
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2277 __ vinserti128h($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister);
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2278 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2279 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2280 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2281
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2282 // Replicate long (8 byte) scalar zero to be vector
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2283 instruct Repl2L_zero(vecX dst, immL0 zero) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2284 predicate(n->as_Vector()->length() == 2);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2285 match(Set dst (ReplicateL zero));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2286 format %{ "pxor $dst,$dst\t! replicate2L zero" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2287 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2288 __ pxor($dst$$XMMRegister, $dst$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2289 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2290 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2291 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2292
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2293 instruct Repl4L_zero(vecY dst, immL0 zero) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2294 predicate(n->as_Vector()->length() == 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2295 match(Set dst (ReplicateL zero));
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2296 format %{ "vpxor $dst,$dst,$dst\t! replicate4L zero" %}
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2297 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2298 // Use vxorpd since AVX does not have vpxor for 256-bit (AVX2 will have it).
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2299 bool vector256 = true;
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2300 __ vpxor($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister, vector256);
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2301 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2302 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2303 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2304
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2305 // Replicate float (4 byte) scalar to be vector
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2306 instruct Repl2F(vecD dst, regF src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2307 predicate(n->as_Vector()->length() == 2);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2308 match(Set dst (ReplicateF src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2309 format %{ "pshufd $dst,$dst,0x00\t! replicate2F" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2310 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2311 __ pshufd($dst$$XMMRegister, $src$$XMMRegister, 0x00);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2312 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2313 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2314 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2315
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2316 instruct Repl4F(vecX dst, regF src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2317 predicate(n->as_Vector()->length() == 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2318 match(Set dst (ReplicateF src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2319 format %{ "pshufd $dst,$dst,0x00\t! replicate4F" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2320 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2321 __ pshufd($dst$$XMMRegister, $src$$XMMRegister, 0x00);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2322 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2323 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2324 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2325
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2326 instruct Repl8F(vecY dst, regF src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2327 predicate(n->as_Vector()->length() == 8);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2328 match(Set dst (ReplicateF src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2329 format %{ "pshufd $dst,$src,0x00\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2330 "vinsertf128h $dst,$dst,$dst\t! replicate8F" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2331 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2332 __ pshufd($dst$$XMMRegister, $src$$XMMRegister, 0x00);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2333 __ vinsertf128h($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2334 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2335 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2336 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2337
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2338 // Replicate float (4 byte) scalar zero to be vector
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2339 instruct Repl2F_zero(vecD dst, immF0 zero) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2340 predicate(n->as_Vector()->length() == 2);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2341 match(Set dst (ReplicateF zero));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2342 format %{ "xorps $dst,$dst\t! replicate2F zero" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2343 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2344 __ xorps($dst$$XMMRegister, $dst$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2345 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2346 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2347 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2348
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2349 instruct Repl4F_zero(vecX dst, immF0 zero) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2350 predicate(n->as_Vector()->length() == 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2351 match(Set dst (ReplicateF zero));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2352 format %{ "xorps $dst,$dst\t! replicate4F zero" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2353 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2354 __ xorps($dst$$XMMRegister, $dst$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2355 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2356 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2357 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2358
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2359 instruct Repl8F_zero(vecY dst, immF0 zero) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2360 predicate(n->as_Vector()->length() == 8);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2361 match(Set dst (ReplicateF zero));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2362 format %{ "vxorps $dst,$dst,$dst\t! replicate8F zero" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2363 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2364 bool vector256 = true;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2365 __ vxorps($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister, vector256);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2366 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2367 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2368 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2369
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2370 // Replicate double (8 bytes) scalar to be vector
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2371 instruct Repl2D(vecX dst, regD src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2372 predicate(n->as_Vector()->length() == 2);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2373 match(Set dst (ReplicateD src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2374 format %{ "pshufd $dst,$src,0x44\t! replicate2D" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2375 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2376 __ pshufd($dst$$XMMRegister, $src$$XMMRegister, 0x44);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2377 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2378 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2379 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2380
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2381 instruct Repl4D(vecY dst, regD src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2382 predicate(n->as_Vector()->length() == 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2383 match(Set dst (ReplicateD src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2384 format %{ "pshufd $dst,$src,0x44\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2385 "vinsertf128h $dst,$dst,$dst\t! replicate4D" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2386 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2387 __ pshufd($dst$$XMMRegister, $src$$XMMRegister, 0x44);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2388 __ vinsertf128h($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2389 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2390 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2391 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2392
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2393 // Replicate double (8 byte) scalar zero to be vector
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2394 instruct Repl2D_zero(vecX dst, immD0 zero) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2395 predicate(n->as_Vector()->length() == 2);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2396 match(Set dst (ReplicateD zero));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2397 format %{ "xorpd $dst,$dst\t! replicate2D zero" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2398 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2399 __ xorpd($dst$$XMMRegister, $dst$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2400 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2401 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2402 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2403
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2404 instruct Repl4D_zero(vecY dst, immD0 zero) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2405 predicate(n->as_Vector()->length() == 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2406 match(Set dst (ReplicateD zero));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2407 format %{ "vxorpd $dst,$dst,$dst,vect256\t! replicate4D zero" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2408 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2409 bool vector256 = true;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2410 __ vxorpd($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister, vector256);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2411 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2412 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2413 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2414
6614 006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2415 // ====================VECTOR ARITHMETIC=======================================
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2416
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2417 // --------------------------------- ADD --------------------------------------
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2418
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2419 // Bytes vector add
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2420 instruct vadd4B(vecS dst, vecS src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2421 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2422 match(Set dst (AddVB dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2423 format %{ "paddb $dst,$src\t! add packed4B" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2424 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2425 __ paddb($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2426 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2427 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2428 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2429
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2430 instruct vadd4B_reg(vecS dst, vecS src1, vecS src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2431 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2432 match(Set dst (AddVB src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2433 format %{ "vpaddb $dst,$src1,$src2\t! add packed4B" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2434 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2435 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2436 __ vpaddb($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2437 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2438 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2439 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2440
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2441 instruct vadd8B(vecD dst, vecD src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2442 predicate(n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2443 match(Set dst (AddVB dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2444 format %{ "paddb $dst,$src\t! add packed8B" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2445 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2446 __ paddb($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2447 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2448 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2449 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2450
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2451 instruct vadd8B_reg(vecD dst, vecD src1, vecD src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2452 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2453 match(Set dst (AddVB src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2454 format %{ "vpaddb $dst,$src1,$src2\t! add packed8B" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2455 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2456 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2457 __ vpaddb($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2458 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2459 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2460 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2461
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2462 instruct vadd16B(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2463 predicate(n->as_Vector()->length() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2464 match(Set dst (AddVB dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2465 format %{ "paddb $dst,$src\t! add packed16B" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2466 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2467 __ paddb($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2468 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2469 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2470 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2471
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2472 instruct vadd16B_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2473 predicate(UseAVX > 0 && n->as_Vector()->length() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2474 match(Set dst (AddVB src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2475 format %{ "vpaddb $dst,$src1,$src2\t! add packed16B" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2476 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2477 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2478 __ vpaddb($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2479 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2480 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2481 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2482
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2483 instruct vadd16B_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2484 predicate(UseAVX > 0 && n->as_Vector()->length() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2485 match(Set dst (AddVB src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2486 format %{ "vpaddb $dst,$src,$mem\t! add packed16B" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2487 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2488 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2489 __ vpaddb($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2490 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2491 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2492 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2493
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2494 instruct vadd32B_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2495 predicate(UseAVX > 1 && n->as_Vector()->length() == 32);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2496 match(Set dst (AddVB src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2497 format %{ "vpaddb $dst,$src1,$src2\t! add packed32B" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2498 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2499 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2500 __ vpaddb($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2501 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2502 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2503 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2504
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2505 instruct vadd32B_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2506 predicate(UseAVX > 1 && n->as_Vector()->length() == 32);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2507 match(Set dst (AddVB src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2508 format %{ "vpaddb $dst,$src,$mem\t! add packed32B" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2509 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2510 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2511 __ vpaddb($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2512 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2513 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2514 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2515
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2516 // Shorts/Chars vector add
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2517 instruct vadd2S(vecS dst, vecS src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2518 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2519 match(Set dst (AddVS dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2520 format %{ "paddw $dst,$src\t! add packed2S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2521 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2522 __ paddw($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2523 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2524 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2525 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2526
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2527 instruct vadd2S_reg(vecS dst, vecS src1, vecS src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2528 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2529 match(Set dst (AddVS src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2530 format %{ "vpaddw $dst,$src1,$src2\t! add packed2S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2531 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2532 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2533 __ vpaddw($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2534 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2535 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2536 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2537
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2538 instruct vadd4S(vecD dst, vecD src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2539 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2540 match(Set dst (AddVS dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2541 format %{ "paddw $dst,$src\t! add packed4S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2542 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2543 __ paddw($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2544 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2545 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2546 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2547
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2548 instruct vadd4S_reg(vecD dst, vecD src1, vecD src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2549 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2550 match(Set dst (AddVS src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2551 format %{ "vpaddw $dst,$src1,$src2\t! add packed4S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2552 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2553 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2554 __ vpaddw($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2555 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2556 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2557 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2558
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2559 instruct vadd8S(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2560 predicate(n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2561 match(Set dst (AddVS dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2562 format %{ "paddw $dst,$src\t! add packed8S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2563 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2564 __ paddw($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2565 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2566 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2567 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2568
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2569 instruct vadd8S_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2570 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2571 match(Set dst (AddVS src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2572 format %{ "vpaddw $dst,$src1,$src2\t! add packed8S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2573 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2574 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2575 __ vpaddw($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2576 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2577 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2578 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2579
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2580 instruct vadd8S_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2581 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2582 match(Set dst (AddVS src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2583 format %{ "vpaddw $dst,$src,$mem\t! add packed8S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2584 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2585 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2586 __ vpaddw($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2587 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2588 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2589 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2590
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2591 instruct vadd16S_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2592 predicate(UseAVX > 1 && n->as_Vector()->length() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2593 match(Set dst (AddVS src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2594 format %{ "vpaddw $dst,$src1,$src2\t! add packed16S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2595 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2596 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2597 __ vpaddw($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2598 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2599 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2600 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2601
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2602 instruct vadd16S_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2603 predicate(UseAVX > 1 && n->as_Vector()->length() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2604 match(Set dst (AddVS src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2605 format %{ "vpaddw $dst,$src,$mem\t! add packed16S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2606 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2607 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2608 __ vpaddw($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2609 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2610 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2611 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2612
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2613 // Integers vector add
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2614 instruct vadd2I(vecD dst, vecD src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2615 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2616 match(Set dst (AddVI dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2617 format %{ "paddd $dst,$src\t! add packed2I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2618 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2619 __ paddd($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2620 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2621 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2622 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2623
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2624 instruct vadd2I_reg(vecD dst, vecD src1, vecD src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2625 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2626 match(Set dst (AddVI src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2627 format %{ "vpaddd $dst,$src1,$src2\t! add packed2I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2628 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2629 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2630 __ vpaddd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2631 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2632 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2633 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2634
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2635 instruct vadd4I(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2636 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2637 match(Set dst (AddVI dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2638 format %{ "paddd $dst,$src\t! add packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2639 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2640 __ paddd($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2641 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2642 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2643 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2644
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2645 instruct vadd4I_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2646 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2647 match(Set dst (AddVI src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2648 format %{ "vpaddd $dst,$src1,$src2\t! add packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2649 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2650 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2651 __ vpaddd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2652 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2653 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2654 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2655
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2656 instruct vadd4I_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2657 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2658 match(Set dst (AddVI src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2659 format %{ "vpaddd $dst,$src,$mem\t! add packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2660 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2661 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2662 __ vpaddd($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2663 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2664 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2665 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2666
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2667 instruct vadd8I_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2668 predicate(UseAVX > 1 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2669 match(Set dst (AddVI src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2670 format %{ "vpaddd $dst,$src1,$src2\t! add packed8I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2671 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2672 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2673 __ vpaddd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2674 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2675 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2676 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2677
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2678 instruct vadd8I_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2679 predicate(UseAVX > 1 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2680 match(Set dst (AddVI src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2681 format %{ "vpaddd $dst,$src,$mem\t! add packed8I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2682 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2683 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2684 __ vpaddd($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2685 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2686 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2687 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2688
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2689 // Longs vector add
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2690 instruct vadd2L(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2691 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2692 match(Set dst (AddVL dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2693 format %{ "paddq $dst,$src\t! add packed2L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2694 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2695 __ paddq($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2696 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2697 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2698 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2699
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2700 instruct vadd2L_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2701 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2702 match(Set dst (AddVL src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2703 format %{ "vpaddq $dst,$src1,$src2\t! add packed2L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2704 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2705 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2706 __ vpaddq($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2707 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2708 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2709 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2710
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2711 instruct vadd2L_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2712 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2713 match(Set dst (AddVL src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2714 format %{ "vpaddq $dst,$src,$mem\t! add packed2L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2715 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2716 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2717 __ vpaddq($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2718 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2719 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2720 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2721
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2722 instruct vadd4L_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2723 predicate(UseAVX > 1 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2724 match(Set dst (AddVL src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2725 format %{ "vpaddq $dst,$src1,$src2\t! add packed4L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2726 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2727 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2728 __ vpaddq($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2729 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2730 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2731 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2732
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2733 instruct vadd4L_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2734 predicate(UseAVX > 1 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2735 match(Set dst (AddVL src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2736 format %{ "vpaddq $dst,$src,$mem\t! add packed4L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2737 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2738 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2739 __ vpaddq($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2740 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2741 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2742 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2743
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2744 // Floats vector add
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2745 instruct vadd2F(vecD dst, vecD src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2746 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2747 match(Set dst (AddVF dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2748 format %{ "addps $dst,$src\t! add packed2F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2749 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2750 __ addps($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2751 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2752 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2753 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2754
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2755 instruct vadd2F_reg(vecD dst, vecD src1, vecD src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2756 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2757 match(Set dst (AddVF src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2758 format %{ "vaddps $dst,$src1,$src2\t! add packed2F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2759 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2760 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2761 __ vaddps($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2762 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2763 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2764 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2765
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2766 instruct vadd4F(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2767 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2768 match(Set dst (AddVF dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2769 format %{ "addps $dst,$src\t! add packed4F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2770 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2771 __ addps($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2772 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2773 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2774 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2775
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2776 instruct vadd4F_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2777 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2778 match(Set dst (AddVF src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2779 format %{ "vaddps $dst,$src1,$src2\t! add packed4F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2780 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2781 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2782 __ vaddps($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2783 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2784 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2785 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2786
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2787 instruct vadd4F_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2788 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2789 match(Set dst (AddVF src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2790 format %{ "vaddps $dst,$src,$mem\t! add packed4F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2791 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2792 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2793 __ vaddps($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2794 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2795 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2796 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2797
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2798 instruct vadd8F_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2799 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2800 match(Set dst (AddVF src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2801 format %{ "vaddps $dst,$src1,$src2\t! add packed8F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2802 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2803 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2804 __ vaddps($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2805 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2806 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2807 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2808
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2809 instruct vadd8F_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2810 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2811 match(Set dst (AddVF src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2812 format %{ "vaddps $dst,$src,$mem\t! add packed8F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2813 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2814 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2815 __ vaddps($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2816 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2817 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2818 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2819
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2820 // Doubles vector add
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2821 instruct vadd2D(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2822 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2823 match(Set dst (AddVD dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2824 format %{ "addpd $dst,$src\t! add packed2D" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2825 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2826 __ addpd($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2827 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2828 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2829 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2830
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2831 instruct vadd2D_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2832 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2833 match(Set dst (AddVD src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2834 format %{ "vaddpd $dst,$src1,$src2\t! add packed2D" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2835 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2836 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2837 __ vaddpd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2838 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2839 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2840 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2841
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2842 instruct vadd2D_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2843 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2844 match(Set dst (AddVD src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2845 format %{ "vaddpd $dst,$src,$mem\t! add packed2D" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2846 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2847 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2848 __ vaddpd($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2849 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2850 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2851 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2852
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2853 instruct vadd4D_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2854 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2855 match(Set dst (AddVD src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2856 format %{ "vaddpd $dst,$src1,$src2\t! add packed4D" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2857 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2858 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2859 __ vaddpd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2860 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2861 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2862 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2863
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2864 instruct vadd4D_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2865 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2866 match(Set dst (AddVD src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2867 format %{ "vaddpd $dst,$src,$mem\t! add packed4D" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2868 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2869 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2870 __ vaddpd($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2871 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2872 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2873 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2874
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2875 // --------------------------------- SUB --------------------------------------
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2876
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2877 // Bytes vector sub
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2878 instruct vsub4B(vecS dst, vecS src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2879 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2880 match(Set dst (SubVB dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2881 format %{ "psubb $dst,$src\t! sub packed4B" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2882 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2883 __ psubb($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2884 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2885 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2886 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2887
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2888 instruct vsub4B_reg(vecS dst, vecS src1, vecS src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2889 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2890 match(Set dst (SubVB src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2891 format %{ "vpsubb $dst,$src1,$src2\t! sub packed4B" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2892 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2893 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2894 __ vpsubb($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2895 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2896 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2897 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2898
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2899 instruct vsub8B(vecD dst, vecD src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2900 predicate(n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2901 match(Set dst (SubVB dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2902 format %{ "psubb $dst,$src\t! sub packed8B" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2903 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2904 __ psubb($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2905 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2906 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2907 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2908
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2909 instruct vsub8B_reg(vecD dst, vecD src1, vecD src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2910 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2911 match(Set dst (SubVB src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2912 format %{ "vpsubb $dst,$src1,$src2\t! sub packed8B" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2913 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2914 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2915 __ vpsubb($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2916 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2917 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2918 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2919
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2920 instruct vsub16B(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2921 predicate(n->as_Vector()->length() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2922 match(Set dst (SubVB dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2923 format %{ "psubb $dst,$src\t! sub packed16B" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2924 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2925 __ psubb($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2926 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2927 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2928 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2929
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2930 instruct vsub16B_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2931 predicate(UseAVX > 0 && n->as_Vector()->length() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2932 match(Set dst (SubVB src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2933 format %{ "vpsubb $dst,$src1,$src2\t! sub packed16B" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2934 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2935 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2936 __ vpsubb($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2937 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2938 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2939 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2940
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2941 instruct vsub16B_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2942 predicate(UseAVX > 0 && n->as_Vector()->length() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2943 match(Set dst (SubVB src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2944 format %{ "vpsubb $dst,$src,$mem\t! sub packed16B" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2945 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2946 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2947 __ vpsubb($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2948 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2949 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2950 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2951
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2952 instruct vsub32B_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2953 predicate(UseAVX > 1 && n->as_Vector()->length() == 32);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2954 match(Set dst (SubVB src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2955 format %{ "vpsubb $dst,$src1,$src2\t! sub packed32B" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2956 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2957 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2958 __ vpsubb($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2959 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2960 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2961 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2962
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2963 instruct vsub32B_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2964 predicate(UseAVX > 1 && n->as_Vector()->length() == 32);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2965 match(Set dst (SubVB src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2966 format %{ "vpsubb $dst,$src,$mem\t! sub packed32B" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2967 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2968 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2969 __ vpsubb($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2970 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2971 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2972 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2973
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2974 // Shorts/Chars vector sub
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2975 instruct vsub2S(vecS dst, vecS src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2976 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2977 match(Set dst (SubVS dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2978 format %{ "psubw $dst,$src\t! sub packed2S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2979 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2980 __ psubw($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2981 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2982 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2983 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2984
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2985 instruct vsub2S_reg(vecS dst, vecS src1, vecS src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2986 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2987 match(Set dst (SubVS src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2988 format %{ "vpsubw $dst,$src1,$src2\t! sub packed2S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2989 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2990 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2991 __ vpsubw($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2992 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2993 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2994 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2995
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2996 instruct vsub4S(vecD dst, vecD src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2997 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2998 match(Set dst (SubVS dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2999 format %{ "psubw $dst,$src\t! sub packed4S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3000 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3001 __ psubw($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3002 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3003 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3004 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3005
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3006 instruct vsub4S_reg(vecD dst, vecD src1, vecD src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3007 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3008 match(Set dst (SubVS src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3009 format %{ "vpsubw $dst,$src1,$src2\t! sub packed4S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3010 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3011 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3012 __ vpsubw($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3013 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3014 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3015 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3016
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3017 instruct vsub8S(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3018 predicate(n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3019 match(Set dst (SubVS dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3020 format %{ "psubw $dst,$src\t! sub packed8S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3021 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3022 __ psubw($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3023 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3024 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3025 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3026
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3027 instruct vsub8S_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3028 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3029 match(Set dst (SubVS src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3030 format %{ "vpsubw $dst,$src1,$src2\t! sub packed8S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3031 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3032 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3033 __ vpsubw($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3034 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3035 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3036 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3037
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3038 instruct vsub8S_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3039 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3040 match(Set dst (SubVS src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3041 format %{ "vpsubw $dst,$src,$mem\t! sub packed8S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3042 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3043 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3044 __ vpsubw($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3045 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3046 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3047 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3048
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3049 instruct vsub16S_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3050 predicate(UseAVX > 1 && n->as_Vector()->length() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3051 match(Set dst (SubVS src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3052 format %{ "vpsubw $dst,$src1,$src2\t! sub packed16S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3053 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3054 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3055 __ vpsubw($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3056 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3057 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3058 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3059
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3060 instruct vsub16S_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3061 predicate(UseAVX > 1 && n->as_Vector()->length() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3062 match(Set dst (SubVS src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3063 format %{ "vpsubw $dst,$src,$mem\t! sub packed16S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3064 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3065 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3066 __ vpsubw($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3067 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3068 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3069 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3070
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3071 // Integers vector sub
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3072 instruct vsub2I(vecD dst, vecD src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3073 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3074 match(Set dst (SubVI dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3075 format %{ "psubd $dst,$src\t! sub packed2I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3076 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3077 __ psubd($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3078 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3079 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3080 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3081
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3082 instruct vsub2I_reg(vecD dst, vecD src1, vecD src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3083 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3084 match(Set dst (SubVI src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3085 format %{ "vpsubd $dst,$src1,$src2\t! sub packed2I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3086 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3087 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3088 __ vpsubd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3089 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3090 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3091 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3092
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3093 instruct vsub4I(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3094 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3095 match(Set dst (SubVI dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3096 format %{ "psubd $dst,$src\t! sub packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3097 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3098 __ psubd($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3099 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3100 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3101 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3102
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3103 instruct vsub4I_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3104 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3105 match(Set dst (SubVI src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3106 format %{ "vpsubd $dst,$src1,$src2\t! sub packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3107 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3108 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3109 __ vpsubd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3110 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3111 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3112 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3113
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3114 instruct vsub4I_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3115 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3116 match(Set dst (SubVI src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3117 format %{ "vpsubd $dst,$src,$mem\t! sub packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3118 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3119 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3120 __ vpsubd($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3121 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3122 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3123 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3124
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3125 instruct vsub8I_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3126 predicate(UseAVX > 1 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3127 match(Set dst (SubVI src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3128 format %{ "vpsubd $dst,$src1,$src2\t! sub packed8I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3129 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3130 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3131 __ vpsubd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3132 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3133 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3134 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3135
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3136 instruct vsub8I_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3137 predicate(UseAVX > 1 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3138 match(Set dst (SubVI src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3139 format %{ "vpsubd $dst,$src,$mem\t! sub packed8I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3140 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3141 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3142 __ vpsubd($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3143 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3144 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3145 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3146
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3147 // Longs vector sub
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3148 instruct vsub2L(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3149 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3150 match(Set dst (SubVL dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3151 format %{ "psubq $dst,$src\t! sub packed2L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3152 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3153 __ psubq($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3154 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3155 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3156 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3157
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3158 instruct vsub2L_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3159 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3160 match(Set dst (SubVL src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3161 format %{ "vpsubq $dst,$src1,$src2\t! sub packed2L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3162 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3163 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3164 __ vpsubq($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3165 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3166 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3167 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3168
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3169 instruct vsub2L_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3170 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3171 match(Set dst (SubVL src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3172 format %{ "vpsubq $dst,$src,$mem\t! sub packed2L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3173 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3174 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3175 __ vpsubq($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3176 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3177 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3178 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3179
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3180 instruct vsub4L_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3181 predicate(UseAVX > 1 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3182 match(Set dst (SubVL src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3183 format %{ "vpsubq $dst,$src1,$src2\t! sub packed4L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3184 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3185 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3186 __ vpsubq($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3187 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3188 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3189 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3190
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3191 instruct vsub4L_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3192 predicate(UseAVX > 1 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3193 match(Set dst (SubVL src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3194 format %{ "vpsubq $dst,$src,$mem\t! sub packed4L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3195 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3196 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3197 __ vpsubq($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3198 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3199 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3200 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3201
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3202 // Floats vector sub
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3203 instruct vsub2F(vecD dst, vecD src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3204 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3205 match(Set dst (SubVF dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3206 format %{ "subps $dst,$src\t! sub packed2F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3207 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3208 __ subps($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3209 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3210 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3211 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3212
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3213 instruct vsub2F_reg(vecD dst, vecD src1, vecD src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3214 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3215 match(Set dst (SubVF src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3216 format %{ "vsubps $dst,$src1,$src2\t! sub packed2F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3217 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3218 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3219 __ vsubps($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3220 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3221 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3222 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3223
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3224 instruct vsub4F(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3225 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3226 match(Set dst (SubVF dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3227 format %{ "subps $dst,$src\t! sub packed4F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3228 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3229 __ subps($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3230 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3231 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3232 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3233
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3234 instruct vsub4F_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3235 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3236 match(Set dst (SubVF src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3237 format %{ "vsubps $dst,$src1,$src2\t! sub packed4F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3238 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3239 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3240 __ vsubps($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3241 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3242 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3243 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3244
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3245 instruct vsub4F_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3246 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3247 match(Set dst (SubVF src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3248 format %{ "vsubps $dst,$src,$mem\t! sub packed4F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3249 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3250 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3251 __ vsubps($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3252 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3253 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3254 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3255
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3256 instruct vsub8F_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3257 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3258 match(Set dst (SubVF src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3259 format %{ "vsubps $dst,$src1,$src2\t! sub packed8F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3260 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3261 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3262 __ vsubps($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3263 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3264 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3265 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3266
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3267 instruct vsub8F_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3268 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3269 match(Set dst (SubVF src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3270 format %{ "vsubps $dst,$src,$mem\t! sub packed8F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3271 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3272 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3273 __ vsubps($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3274 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3275 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3276 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3277
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3278 // Doubles vector sub
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3279 instruct vsub2D(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3280 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3281 match(Set dst (SubVD dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3282 format %{ "subpd $dst,$src\t! sub packed2D" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3283 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3284 __ subpd($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3285 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3286 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3287 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3288
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3289 instruct vsub2D_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3290 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3291 match(Set dst (SubVD src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3292 format %{ "vsubpd $dst,$src1,$src2\t! sub packed2D" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3293 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3294 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3295 __ vsubpd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3296 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3297 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3298 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3299
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3300 instruct vsub2D_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3301 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3302 match(Set dst (SubVD src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3303 format %{ "vsubpd $dst,$src,$mem\t! sub packed2D" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3304 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3305 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3306 __ vsubpd($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3307 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3308 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3309 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3310
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3311 instruct vsub4D_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3312 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3313 match(Set dst (SubVD src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3314 format %{ "vsubpd $dst,$src1,$src2\t! sub packed4D" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3315 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3316 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3317 __ vsubpd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3318 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3319 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3320 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3321
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3322 instruct vsub4D_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3323 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3324 match(Set dst (SubVD src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3325 format %{ "vsubpd $dst,$src,$mem\t! sub packed4D" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3326 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3327 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3328 __ vsubpd($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3329 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3330 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3331 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3332
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3333 // --------------------------------- MUL --------------------------------------
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3334
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3335 // Shorts/Chars vector mul
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3336 instruct vmul2S(vecS dst, vecS src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3337 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3338 match(Set dst (MulVS dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3339 format %{ "pmullw $dst,$src\t! mul packed2S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3340 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3341 __ pmullw($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3342 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3343 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3344 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3345
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3346 instruct vmul2S_reg(vecS dst, vecS src1, vecS src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3347 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3348 match(Set dst (MulVS src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3349 format %{ "vpmullw $dst,$src1,$src2\t! mul packed2S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3350 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3351 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3352 __ vpmullw($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3353 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3354 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3355 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3356
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3357 instruct vmul4S(vecD dst, vecD src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3358 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3359 match(Set dst (MulVS dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3360 format %{ "pmullw $dst,$src\t! mul packed4S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3361 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3362 __ pmullw($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3363 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3364 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3365 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3366
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3367 instruct vmul4S_reg(vecD dst, vecD src1, vecD src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3368 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3369 match(Set dst (MulVS src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3370 format %{ "vpmullw $dst,$src1,$src2\t! mul packed4S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3371 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3372 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3373 __ vpmullw($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3374 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3375 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3376 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3377
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3378 instruct vmul8S(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3379 predicate(n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3380 match(Set dst (MulVS dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3381 format %{ "pmullw $dst,$src\t! mul packed8S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3382 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3383 __ pmullw($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3384 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3385 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3386 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3387
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3388 instruct vmul8S_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3389 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3390 match(Set dst (MulVS src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3391 format %{ "vpmullw $dst,$src1,$src2\t! mul packed8S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3392 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3393 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3394 __ vpmullw($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3395 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3396 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3397 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3398
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3399 instruct vmul8S_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3400 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3401 match(Set dst (MulVS src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3402 format %{ "vpmullw $dst,$src,$mem\t! mul packed8S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3403 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3404 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3405 __ vpmullw($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3406 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3407 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3408 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3409
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3410 instruct vmul16S_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3411 predicate(UseAVX > 1 && n->as_Vector()->length() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3412 match(Set dst (MulVS src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3413 format %{ "vpmullw $dst,$src1,$src2\t! mul packed16S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3414 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3415 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3416 __ vpmullw($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3417 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3418 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3419 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3420
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3421 instruct vmul16S_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3422 predicate(UseAVX > 1 && n->as_Vector()->length() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3423 match(Set dst (MulVS src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3424 format %{ "vpmullw $dst,$src,$mem\t! mul packed16S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3425 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3426 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3427 __ vpmullw($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3428 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3429 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3430 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3431
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3432 // Integers vector mul (sse4_1)
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3433 instruct vmul2I(vecD dst, vecD src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3434 predicate(UseSSE > 3 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3435 match(Set dst (MulVI dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3436 format %{ "pmulld $dst,$src\t! mul packed2I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3437 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3438 __ pmulld($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3439 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3440 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3441 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3442
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3443 instruct vmul2I_reg(vecD dst, vecD src1, vecD src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3444 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3445 match(Set dst (MulVI src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3446 format %{ "vpmulld $dst,$src1,$src2\t! mul packed2I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3447 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3448 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3449 __ vpmulld($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3450 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3451 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3452 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3453
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3454 instruct vmul4I(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3455 predicate(UseSSE > 3 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3456 match(Set dst (MulVI dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3457 format %{ "pmulld $dst,$src\t! mul packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3458 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3459 __ pmulld($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3460 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3461 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3462 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3463
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3464 instruct vmul4I_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3465 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3466 match(Set dst (MulVI src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3467 format %{ "vpmulld $dst,$src1,$src2\t! mul packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3468 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3469 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3470 __ vpmulld($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3471 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3472 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3473 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3474
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3475 instruct vmul4I_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3476 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3477 match(Set dst (MulVI src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3478 format %{ "vpmulld $dst,$src,$mem\t! mul packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3479 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3480 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3481 __ vpmulld($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3482 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3483 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3484 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3485
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3486 instruct vmul8I_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3487 predicate(UseAVX > 1 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3488 match(Set dst (MulVI src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3489 format %{ "vpmulld $dst,$src1,$src2\t! mul packed8I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3490 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3491 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3492 __ vpmulld($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3493 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3494 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3495 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3496
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3497 instruct vmul8I_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3498 predicate(UseAVX > 1 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3499 match(Set dst (MulVI src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3500 format %{ "vpmulld $dst,$src,$mem\t! mul packed8I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3501 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3502 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3503 __ vpmulld($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3504 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3505 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3506 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3507
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3508 // Floats vector mul
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3509 instruct vmul2F(vecD dst, vecD src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3510 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3511 match(Set dst (MulVF dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3512 format %{ "mulps $dst,$src\t! mul packed2F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3513 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3514 __ mulps($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3515 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3516 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3517 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3518
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3519 instruct vmul2F_reg(vecD dst, vecD src1, vecD src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3520 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3521 match(Set dst (MulVF src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3522 format %{ "vmulps $dst,$src1,$src2\t! mul packed2F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3523 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3524 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3525 __ vmulps($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3526 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3527 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3528 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3529
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3530 instruct vmul4F(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3531 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3532 match(Set dst (MulVF dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3533 format %{ "mulps $dst,$src\t! mul packed4F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3534 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3535 __ mulps($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3536 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3537 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3538 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3539
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3540 instruct vmul4F_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3541 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3542 match(Set dst (MulVF src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3543 format %{ "vmulps $dst,$src1,$src2\t! mul packed4F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3544 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3545 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3546 __ vmulps($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3547 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3548 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3549 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3550
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3551 instruct vmul4F_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3552 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3553 match(Set dst (MulVF src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3554 format %{ "vmulps $dst,$src,$mem\t! mul packed4F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3555 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3556 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3557 __ vmulps($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3558 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3559 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3560 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3561
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3562 instruct vmul8F_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3563 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3564 match(Set dst (MulVF src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3565 format %{ "vmulps $dst,$src1,$src2\t! mul packed8F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3566 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3567 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3568 __ vmulps($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3569 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3570 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3571 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3572
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3573 instruct vmul8F_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3574 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3575 match(Set dst (MulVF src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3576 format %{ "vmulps $dst,$src,$mem\t! mul packed8F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3577 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3578 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3579 __ vmulps($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3580 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3581 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3582 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3583
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3584 // Doubles vector mul
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3585 instruct vmul2D(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3586 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3587 match(Set dst (MulVD dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3588 format %{ "mulpd $dst,$src\t! mul packed2D" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3589 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3590 __ mulpd($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3591 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3592 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3593 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3594
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3595 instruct vmul2D_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3596 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3597 match(Set dst (MulVD src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3598 format %{ "vmulpd $dst,$src1,$src2\t! mul packed2D" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3599 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3600 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3601 __ vmulpd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3602 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3603 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3604 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3605
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3606 instruct vmul2D_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3607 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3608 match(Set dst (MulVD src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3609 format %{ "vmulpd $dst,$src,$mem\t! mul packed2D" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3610 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3611 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3612 __ vmulpd($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3613 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3614 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3615 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3616
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3617 instruct vmul4D_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3618 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3619 match(Set dst (MulVD src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3620 format %{ "vmulpd $dst,$src1,$src2\t! mul packed4D" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3621 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3622 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3623 __ vmulpd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3624 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3625 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3626 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3627
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3628 instruct vmul4D_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3629 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3630 match(Set dst (MulVD src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3631 format %{ "vmulpd $dst,$src,$mem\t! mul packed4D" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3632 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3633 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3634 __ vmulpd($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3635 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3636 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3637 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3638
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3639 // --------------------------------- DIV --------------------------------------
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3640
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3641 // Floats vector div
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3642 instruct vdiv2F(vecD dst, vecD src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3643 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3644 match(Set dst (DivVF dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3645 format %{ "divps $dst,$src\t! div packed2F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3646 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3647 __ divps($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3648 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3649 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3650 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3651
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3652 instruct vdiv2F_reg(vecD dst, vecD src1, vecD src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3653 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3654 match(Set dst (DivVF src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3655 format %{ "vdivps $dst,$src1,$src2\t! div packed2F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3656 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3657 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3658 __ vdivps($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3659 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3660 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3661 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3662
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3663 instruct vdiv4F(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3664 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3665 match(Set dst (DivVF dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3666 format %{ "divps $dst,$src\t! div packed4F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3667 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3668 __ divps($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3669 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3670 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3671 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3672
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3673 instruct vdiv4F_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3674 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3675 match(Set dst (DivVF src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3676 format %{ "vdivps $dst,$src1,$src2\t! div packed4F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3677 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3678 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3679 __ vdivps($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3680 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3681 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3682 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3683
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3684 instruct vdiv4F_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3685 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3686 match(Set dst (DivVF src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3687 format %{ "vdivps $dst,$src,$mem\t! div packed4F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3688 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3689 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3690 __ vdivps($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3691 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3692 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3693 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3694
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3695 instruct vdiv8F_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3696 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3697 match(Set dst (DivVF src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3698 format %{ "vdivps $dst,$src1,$src2\t! div packed8F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3699 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3700 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3701 __ vdivps($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3702 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3703 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3704 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3705
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3706 instruct vdiv8F_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3707 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3708 match(Set dst (DivVF src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3709 format %{ "vdivps $dst,$src,$mem\t! div packed8F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3710 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3711 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3712 __ vdivps($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3713 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3714 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3715 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3716
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3717 // Doubles vector div
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3718 instruct vdiv2D(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3719 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3720 match(Set dst (DivVD dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3721 format %{ "divpd $dst,$src\t! div packed2D" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3722 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3723 __ divpd($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3724 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3725 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3726 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3727
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3728 instruct vdiv2D_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3729 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3730 match(Set dst (DivVD src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3731 format %{ "vdivpd $dst,$src1,$src2\t! div packed2D" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3732 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3733 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3734 __ vdivpd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3735 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3736 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3737 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3738
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3739 instruct vdiv2D_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3740 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3741 match(Set dst (DivVD src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3742 format %{ "vdivpd $dst,$src,$mem\t! div packed2D" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3743 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3744 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3745 __ vdivpd($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3746 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3747 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3748 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3749
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3750 instruct vdiv4D_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3751 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3752 match(Set dst (DivVD src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3753 format %{ "vdivpd $dst,$src1,$src2\t! div packed4D" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3754 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3755 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3756 __ vdivpd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3757 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3758 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3759 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3760
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3761 instruct vdiv4D_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3762 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3763 match(Set dst (DivVD src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3764 format %{ "vdivpd $dst,$src,$mem\t! div packed4D" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3765 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3766 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3767 __ vdivpd($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3768 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3769 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3770 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3771
6823 859c45fb8cea 7201026: add vector for shift count kvn parents: 6795 diff changeset	3772 // ------------------------------ Shift ---------------------------------------
859c45fb8cea 7201026: add vector for shift count kvn parents: 6795 diff changeset	3773
859c45fb8cea 7201026: add vector for shift count kvn parents: 6795 diff changeset	3774 // Left and right shift count vectors are the same on x86
859c45fb8cea 7201026: add vector for shift count kvn parents: 6795 diff changeset	3775 // (only lowest bits of xmm reg are used for count).
859c45fb8cea 7201026: add vector for shift count kvn parents: 6795 diff changeset	3776 instruct vshiftcnt(vecS dst, rRegI cnt) %{
859c45fb8cea 7201026: add vector for shift count kvn parents: 6795 diff changeset	3777 match(Set dst (LShiftCntV cnt));
859c45fb8cea 7201026: add vector for shift count kvn parents: 6795 diff changeset	3778 match(Set dst (RShiftCntV cnt));
859c45fb8cea 7201026: add vector for shift count kvn parents: 6795 diff changeset	3779 format %{ "movd $dst,$cnt\t! load shift count" %}
859c45fb8cea 7201026: add vector for shift count kvn parents: 6795 diff changeset	3780 ins_encode %{
859c45fb8cea 7201026: add vector for shift count kvn parents: 6795 diff changeset	3781 __ movdl($dst$$XMMRegister, $cnt$$Register);
859c45fb8cea 7201026: add vector for shift count kvn parents: 6795 diff changeset	3782 %}
859c45fb8cea 7201026: add vector for shift count kvn parents: 6795 diff changeset	3783 ins_pipe( pipe_slow );
859c45fb8cea 7201026: add vector for shift count kvn parents: 6795 diff changeset	3784 %}
859c45fb8cea 7201026: add vector for shift count kvn parents: 6795 diff changeset	3785
6614 006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3786 // ------------------------------ LeftShift -----------------------------------
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3787
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3788 // Shorts/Chars vector left shift
6823 859c45fb8cea 7201026: add vector for shift count kvn parents: 6795 diff changeset	3789 instruct vsll2S(vecS dst, vecS shift) %{
6614 006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3790 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3791 match(Set dst (LShiftVS dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3792 format %{ "psllw $dst,$shift\t! left shift packed2S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3793 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3794 __ psllw($dst$$XMMRegister, $shift$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3795 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3796 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3797 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3798
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3799 instruct vsll2S_imm(vecS dst, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3800 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3801 match(Set dst (LShiftVS dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3802 format %{ "psllw $dst,$shift\t! left shift packed2S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3803 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3804 __ psllw($dst$$XMMRegister, (int)$shift$$constant);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3805 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3806 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3807 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3808
6823 859c45fb8cea 7201026: add vector for shift count kvn parents: 6795 diff changeset	3809 instruct vsll2S_reg(vecS dst, vecS src, vecS shift) %{
6614 006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3810 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3811 match(Set dst (LShiftVS src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3812 format %{ "vpsllw $dst,$src,$shift\t! left shift packed2S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3813 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3814 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3815 __ vpsllw($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3816 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3817 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3818 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3819
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3820 instruct vsll2S_reg_imm(vecS dst, vecS src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3821 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3822 match(Set dst (LShiftVS src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3823 format %{ "vpsllw $dst,$src,$shift\t! left shift packed2S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3824 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3825 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3826 __ vpsllw($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3827 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3828 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3829 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3830
6823 859c45fb8cea 7201026: add vector for shift count kvn parents: 6795 diff changeset	3831 instruct vsll4S(vecD dst, vecS shift) %{
6614 006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3832 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3833 match(Set dst (LShiftVS dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3834 format %{ "psllw $dst,$shift\t! left shift packed4S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3835 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3836 __ psllw($dst$$XMMRegister, $shift$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3837 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3838 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3839 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3840
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3841 instruct vsll4S_imm(vecD dst, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3842 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3843 match(Set dst (LShiftVS dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3844 format %{ "psllw $dst,$shift\t! left shift packed4S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3845 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3846 __ psllw($dst$$XMMRegister, (int)$shift$$constant);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3847 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3848 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3849 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3850
6823 859c45fb8cea 7201026: add vector for shift count kvn parents: 6795 diff changeset	3851 instruct vsll4S_reg(vecD dst, vecD src, vecS shift) %{
6614 006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3852 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3853 match(Set dst (LShiftVS src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3854 format %{ "vpsllw $dst,$src,$shift\t! left shift packed4S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3855 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3856 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3857 __ vpsllw($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3858 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3859 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3860 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3861
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3862 instruct vsll4S_reg_imm(vecD dst, vecD src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3863 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3864 match(Set dst (LShiftVS src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3865 format %{ "vpsllw $dst,$src,$shift\t! left shift packed4S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3866 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3867 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3868 __ vpsllw($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3869 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3870 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3871 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3872
6823 859c45fb8cea 7201026: add vector for shift count kvn parents: 6795 diff changeset	3873 instruct vsll8S(vecX dst, vecS shift) %{
6614 006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3874 predicate(n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3875 match(Set dst (LShiftVS dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3876 format %{ "psllw $dst,$shift\t! left shift packed8S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3877 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3878 __ psllw($dst$$XMMRegister, $shift$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3879 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3880 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3881 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3882
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3883 instruct vsll8S_imm(vecX dst, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3884 predicate(n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3885 match(Set dst (LShiftVS dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3886 format %{ "psllw $dst,$shift\t! left shift packed8S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3887 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3888 __ psllw($dst$$XMMRegister, (int)$shift$$constant);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3889 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3890 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3891 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3892
6823 859c45fb8cea 7201026: add vector for shift count kvn parents: 6795 diff changeset	3893 instruct vsll8S_reg(vecX dst, vecX src, vecS shift) %{
6614 006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3894 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3895 match(Set dst (LShiftVS src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3896 format %{ "vpsllw $dst,$src,$shift\t! left shift packed8S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3897 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3898 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3899 __ vpsllw($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3900 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3901 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3902 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3903
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3904 instruct vsll8S_reg_imm(vecX dst, vecX src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3905 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3906 match(Set dst (LShiftVS src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3907 format %{ "vpsllw $dst,$src,$shift\t! left shift packed8S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3908 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3909 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3910 __ vpsllw($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3911 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3912 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3913 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3914
6823 859c45fb8cea 7201026: add vector for shift count kvn parents: 6795 diff changeset	3915 instruct vsll16S_reg(vecY dst, vecY src, vecS shift) %{
6614 006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3916 predicate(UseAVX > 1 && n->as_Vector()->length() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3917 match(Set dst (LShiftVS src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3918 format %{ "vpsllw $dst,$src,$shift\t! left shift packed16S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3919 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3920 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3921 __ vpsllw($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3922 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3923 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3924 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3925
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3926 instruct vsll16S_reg_imm(vecY dst, vecY src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3927 predicate(UseAVX > 1 && n->as_Vector()->length() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3928 match(Set dst (LShiftVS src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3929 format %{ "vpsllw $dst,$src,$shift\t! left shift packed16S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3930 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3931 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3932 __ vpsllw($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3933 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3934 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3935 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3936
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3937 // Integers vector left shift
6823 859c45fb8cea 7201026: add vector for shift count kvn parents: 6795 diff changeset	3938 instruct vsll2I(vecD dst, vecS shift) %{
6614 006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3939 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3940 match(Set dst (LShiftVI dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3941 format %{ "pslld $dst,$shift\t! left shift packed2I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3942 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3943 __ pslld($dst$$XMMRegister, $shift$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3944 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3945 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3946 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3947
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3948 instruct vsll2I_imm(vecD dst, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3949 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3950 match(Set dst (LShiftVI dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3951 format %{ "pslld $dst,$shift\t! left shift packed2I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3952 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3953 __ pslld($dst$$XMMRegister, (int)$shift$$constant);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3954 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3955 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3956 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3957
6823 859c45fb8cea 7201026: add vector for shift count kvn parents: 6795 diff changeset	3958 instruct vsll2I_reg(vecD dst, vecD src, vecS shift) %{
6614 006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3959 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3960 match(Set dst (LShiftVI src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3961 format %{ "vpslld $dst,$src,$shift\t! left shift packed2I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3962 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3963 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3964 __ vpslld($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3965 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3966 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3967 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3968
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3969 instruct vsll2I_reg_imm(vecD dst, vecD src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3970 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3971 match(Set dst (LShiftVI src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3972 format %{ "vpslld $dst,$src,$shift\t! left shift packed2I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3973 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3974 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3975 __ vpslld($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3976 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3977 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3978 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3979
6823 859c45fb8cea 7201026: add vector for shift count kvn parents: 6795 diff changeset	3980 instruct vsll4I(vecX dst, vecS shift) %{
6614 006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3981 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3982 match(Set dst (LShiftVI dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3983 format %{ "pslld $dst,$shift\t! left shift packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3984 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3985 __ pslld($dst$$XMMRegister, $shift$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3986 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3987 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3988 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3989
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3990 instruct vsll4I_imm(vecX dst, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3991 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3992 match(Set dst (LShiftVI dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3993 format %{ "pslld $dst,$shift\t! left shift packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3994 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3995 __ pslld($dst$$XMMRegister, (int)$shift$$constant);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3996 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3997 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3998 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3999
6823 859c45fb8cea 7201026: add vector for shift count kvn parents: 6795 diff changeset	4000 instruct vsll4I_reg(vecX dst, vecX src, vecS shift) %{
6614 006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4001 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4002 match(Set dst (LShiftVI src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4003 format %{ "vpslld $dst,$src,$shift\t! left shift packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4004 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4005 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4006 __ vpslld($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4007 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4008 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4009 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4010
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4011 instruct vsll4I_reg_imm(vecX dst, vecX src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4012 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4013 match(Set dst (LShiftVI src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4014 format %{ "vpslld $dst,$src,$shift\t! left shift packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4015 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4016 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4017 __ vpslld($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4018 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4019 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4020 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4021
6823 859c45fb8cea 7201026: add vector for shift count kvn parents: 6795 diff changeset	4022 instruct vsll8I_reg(vecY dst, vecY src, vecS shift) %{
6614 006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4023 predicate(UseAVX > 1 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4024 match(Set dst (LShiftVI src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4025 format %{ "vpslld $dst,$src,$shift\t! left shift packed8I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4026 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4027 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4028 __ vpslld($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4029 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4030 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4031 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4032
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4033 instruct vsll8I_reg_imm(vecY dst, vecY src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4034 predicate(UseAVX > 1 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4035 match(Set dst (LShiftVI src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4036 format %{ "vpslld $dst,$src,$shift\t! left shift packed8I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4037 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4038 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4039 __ vpslld($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4040 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4041 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4042 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4043
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4044 // Longs vector left shift
6823 859c45fb8cea 7201026: add vector for shift count kvn parents: 6795 diff changeset	4045 instruct vsll2L(vecX dst, vecS shift) %{
6614 006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4046 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4047 match(Set dst (LShiftVL dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4048 format %{ "psllq $dst,$shift\t! left shift packed2L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4049 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4050 __ psllq($dst$$XMMRegister, $shift$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4051 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4052 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4053 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4054
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4055 instruct vsll2L_imm(vecX dst, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4056 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4057 match(Set dst (LShiftVL dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4058 format %{ "psllq $dst,$shift\t! left shift packed2L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4059 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4060 __ psllq($dst$$XMMRegister, (int)$shift$$constant);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4061 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4062 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4063 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4064
6823 859c45fb8cea 7201026: add vector for shift count kvn parents: 6795 diff changeset	4065 instruct vsll2L_reg(vecX dst, vecX src, vecS shift) %{
6614 006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4066 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4067 match(Set dst (LShiftVL src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4068 format %{ "vpsllq $dst,$src,$shift\t! left shift packed2L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4069 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4070 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4071 __ vpsllq($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4072 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4073 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4074 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4075
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4076 instruct vsll2L_reg_imm(vecX dst, vecX src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4077 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4078 match(Set dst (LShiftVL src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4079 format %{ "vpsllq $dst,$src,$shift\t! left shift packed2L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4080 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4081 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4082 __ vpsllq($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4083 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4084 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4085 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4086
6823 859c45fb8cea 7201026: add vector for shift count kvn parents: 6795 diff changeset	4087 instruct vsll4L_reg(vecY dst, vecY src, vecS shift) %{
6614 006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4088 predicate(UseAVX > 1 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4089 match(Set dst (LShiftVL src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4090 format %{ "vpsllq $dst,$src,$shift\t! left shift packed4L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4091 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4092 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4093 __ vpsllq($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4094 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4095 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4096 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4097
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4098 instruct vsll4L_reg_imm(vecY dst, vecY src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4099 predicate(UseAVX > 1 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4100 match(Set dst (LShiftVL src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4101 format %{ "vpsllq $dst,$src,$shift\t! left shift packed4L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4102 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4103 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4104 __ vpsllq($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4105 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4106 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4107 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4108
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4109 // ----------------------- LogicalRightShift -----------------------------------
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4110
6893 b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4111 // Shorts vector logical right shift produces incorrect Java result
6614 006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4112 // for negative data because java code convert short value into int with
6893 b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4113 // sign extension before a shift. But char vectors are fine since chars are
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4114 // unsigned values.
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4115
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4116 instruct vsrl2S(vecS dst, vecS shift) %{
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4117 predicate(n->as_Vector()->length() == 2);
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4118 match(Set dst (URShiftVS dst shift));
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4119 format %{ "psrlw $dst,$shift\t! logical right shift packed2S" %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4120 ins_encode %{
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4121 __ psrlw($dst$$XMMRegister, $shift$$XMMRegister);
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4122 %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4123 ins_pipe( pipe_slow );
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4124 %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4125
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4126 instruct vsrl2S_imm(vecS dst, immI8 shift) %{
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4127 predicate(n->as_Vector()->length() == 2);
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4128 match(Set dst (URShiftVS dst shift));
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4129 format %{ "psrlw $dst,$shift\t! logical right shift packed2S" %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4130 ins_encode %{
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4131 __ psrlw($dst$$XMMRegister, (int)$shift$$constant);
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4132 %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4133 ins_pipe( pipe_slow );
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4134 %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4135
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4136 instruct vsrl2S_reg(vecS dst, vecS src, vecS shift) %{
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4137 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4138 match(Set dst (URShiftVS src shift));
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4139 format %{ "vpsrlw $dst,$src,$shift\t! logical right shift packed2S" %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4140 ins_encode %{
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4141 bool vector256 = false;
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4142 __ vpsrlw($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4143 %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4144 ins_pipe( pipe_slow );
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4145 %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4146
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4147 instruct vsrl2S_reg_imm(vecS dst, vecS src, immI8 shift) %{
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4148 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4149 match(Set dst (URShiftVS src shift));
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4150 format %{ "vpsrlw $dst,$src,$shift\t! logical right shift packed2S" %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4151 ins_encode %{
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4152 bool vector256 = false;
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4153 __ vpsrlw($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4154 %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4155 ins_pipe( pipe_slow );
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4156 %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4157
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4158 instruct vsrl4S(vecD dst, vecS shift) %{
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4159 predicate(n->as_Vector()->length() == 4);
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4160 match(Set dst (URShiftVS dst shift));
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4161 format %{ "psrlw $dst,$shift\t! logical right shift packed4S" %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4162 ins_encode %{
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4163 __ psrlw($dst$$XMMRegister, $shift$$XMMRegister);
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4164 %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4165 ins_pipe( pipe_slow );
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4166 %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4167
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4168 instruct vsrl4S_imm(vecD dst, immI8 shift) %{
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4169 predicate(n->as_Vector()->length() == 4);
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4170 match(Set dst (URShiftVS dst shift));
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4171 format %{ "psrlw $dst,$shift\t! logical right shift packed4S" %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4172 ins_encode %{
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4173 __ psrlw($dst$$XMMRegister, (int)$shift$$constant);
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4174 %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4175 ins_pipe( pipe_slow );
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4176 %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4177
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4178 instruct vsrl4S_reg(vecD dst, vecD src, vecS shift) %{
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4179 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4180 match(Set dst (URShiftVS src shift));
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4181 format %{ "vpsrlw $dst,$src,$shift\t! logical right shift packed4S" %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4182 ins_encode %{
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4183 bool vector256 = false;
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4184 __ vpsrlw($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4185 %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4186 ins_pipe( pipe_slow );
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4187 %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4188
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4189 instruct vsrl4S_reg_imm(vecD dst, vecD src, immI8 shift) %{
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4190 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4191 match(Set dst (URShiftVS src shift));
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4192 format %{ "vpsrlw $dst,$src,$shift\t! logical right shift packed4S" %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4193 ins_encode %{
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4194 bool vector256 = false;
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4195 __ vpsrlw($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4196 %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4197 ins_pipe( pipe_slow );
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4198 %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4199
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4200 instruct vsrl8S(vecX dst, vecS shift) %{
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4201 predicate(n->as_Vector()->length() == 8);
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4202 match(Set dst (URShiftVS dst shift));
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4203 format %{ "psrlw $dst,$shift\t! logical right shift packed8S" %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4204 ins_encode %{
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4205 __ psrlw($dst$$XMMRegister, $shift$$XMMRegister);
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4206 %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4207 ins_pipe( pipe_slow );
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4208 %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4209
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4210 instruct vsrl8S_imm(vecX dst, immI8 shift) %{
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4211 predicate(n->as_Vector()->length() == 8);
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4212 match(Set dst (URShiftVS dst shift));
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4213 format %{ "psrlw $dst,$shift\t! logical right shift packed8S" %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4214 ins_encode %{
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4215 __ psrlw($dst$$XMMRegister, (int)$shift$$constant);
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4216 %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4217 ins_pipe( pipe_slow );
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4218 %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4219
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4220 instruct vsrl8S_reg(vecX dst, vecX src, vecS shift) %{
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4221 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4222 match(Set dst (URShiftVS src shift));
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4223 format %{ "vpsrlw $dst,$src,$shift\t! logical right shift packed8S" %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4224 ins_encode %{
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4225 bool vector256 = false;
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4226 __ vpsrlw($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4227 %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4228 ins_pipe( pipe_slow );
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4229 %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4230
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4231 instruct vsrl8S_reg_imm(vecX dst, vecX src, immI8 shift) %{
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4232 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4233 match(Set dst (URShiftVS src shift));
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4234 format %{ "vpsrlw $dst,$src,$shift\t! logical right shift packed8S" %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4235 ins_encode %{
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4236 bool vector256 = false;
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4237 __ vpsrlw($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4238 %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4239 ins_pipe( pipe_slow );
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4240 %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4241
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4242 instruct vsrl16S_reg(vecY dst, vecY src, vecS shift) %{
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4243 predicate(UseAVX > 1 && n->as_Vector()->length() == 16);
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4244 match(Set dst (URShiftVS src shift));
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4245 format %{ "vpsrlw $dst,$src,$shift\t! logical right shift packed16S" %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4246 ins_encode %{
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4247 bool vector256 = true;
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4248 __ vpsrlw($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4249 %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4250 ins_pipe( pipe_slow );
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4251 %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4252
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4253 instruct vsrl16S_reg_imm(vecY dst, vecY src, immI8 shift) %{
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4254 predicate(UseAVX > 1 && n->as_Vector()->length() == 16);
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4255 match(Set dst (URShiftVS src shift));
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4256 format %{ "vpsrlw $dst,$src,$shift\t! logical right shift packed16S" %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4257 ins_encode %{
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4258 bool vector256 = true;
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4259 __ vpsrlw($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4260 %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4261 ins_pipe( pipe_slow );
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton kvn parents: 6823 diff changeset	4262 %}
6614 006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4263
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4264 // Integers vector logical right shift
6823 859c45fb8cea 7201026: add vector for shift count kvn parents: 6795 diff changeset	4265 instruct vsrl2I(vecD dst, vecS shift) %{
6614 006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4266 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4267 match(Set dst (URShiftVI dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4268 format %{ "psrld $dst,$shift\t! logical right shift packed2I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4269 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4270 __ psrld($dst$$XMMRegister, $shift$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4271 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4272 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4273 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4274
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4275 instruct vsrl2I_imm(vecD dst, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4276 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4277 match(Set dst (URShiftVI dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4278 format %{ "psrld $dst,$shift\t! logical right shift packed2I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4279 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4280 __ psrld($dst$$XMMRegister, (int)$shift$$constant);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4281 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4282 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4283 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4284
6823 859c45fb8cea 7201026: add vector for shift count kvn parents: 6795 diff changeset	4285 instruct vsrl2I_reg(vecD dst, vecD src, vecS shift) %{
6614 006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4286 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4287 match(Set dst (URShiftVI src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4288 format %{ "vpsrld $dst,$src,$shift\t! logical right shift packed2I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4289 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4290 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4291 __ vpsrld($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4292 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4293 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4294 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4295
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4296 instruct vsrl2I_reg_imm(vecD dst, vecD src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4297 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4298 match(Set dst (URShiftVI src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4299 format %{ "vpsrld $dst,$src,$shift\t! logical right shift packed2I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4300 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4301 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4302 __ vpsrld($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4303 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4304 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4305 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4306
6823 859c45fb8cea 7201026: add vector for shift count kvn parents: 6795 diff changeset	4307 instruct vsrl4I(vecX dst, vecS shift) %{
6614 006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4308 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4309 match(Set dst (URShiftVI dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4310 format %{ "psrld $dst,$shift\t! logical right shift packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4311 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4312 __ psrld($dst$$XMMRegister, $shift$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4313 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4314 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4315 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4316
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4317 instruct vsrl4I_imm(vecX dst, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4318 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4319 match(Set dst (URShiftVI dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4320 format %{ "psrld $dst,$shift\t! logical right shift packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4321 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4322 __ psrld($dst$$XMMRegister, (int)$shift$$constant);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4323 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4324 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4325 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4326
6823 859c45fb8cea 7201026: add vector for shift count kvn parents: 6795 diff changeset	4327 instruct vsrl4I_reg(vecX dst, vecX src, vecS shift) %{
6614 006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4328 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4329 match(Set dst (URShiftVI src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4330 format %{ "vpsrld $dst,$src,$shift\t! logical right shift packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4331 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4332 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4333 __ vpsrld($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4334 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4335 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4336 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4337
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4338 instruct vsrl4I_reg_imm(vecX dst, vecX src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4339 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4340 match(Set dst (URShiftVI src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4341 format %{ "vpsrld $dst,$src,$shift\t! logical right shift packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4342 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4343 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4344 __ vpsrld($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4345 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4346 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4347 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4348
6823 859c45fb8cea 7201026: add vector for shift count kvn parents: 6795 diff changeset	4349 instruct vsrl8I_reg(vecY dst, vecY src, vecS shift) %{
6614 006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4350 predicate(UseAVX > 1 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4351 match(Set dst (URShiftVI src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4352 format %{ "vpsrld $dst,$src,$shift\t! logical right shift packed8I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4353 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4354 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4355 __ vpsrld($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4356 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4357 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4358 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4359
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4360 instruct vsrl8I_reg_imm(vecY dst, vecY src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4361 predicate(UseAVX > 1 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4362 match(Set dst (URShiftVI src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4363 format %{ "vpsrld $dst,$src,$shift\t! logical right shift packed8I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4364 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4365 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4366 __ vpsrld($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4367 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4368 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4369 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4370
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4371 // Longs vector logical right shift
6823 859c45fb8cea 7201026: add vector for shift count kvn parents: 6795 diff changeset	4372 instruct vsrl2L(vecX dst, vecS shift) %{
6614 006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4373 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4374 match(Set dst (URShiftVL dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4375 format %{ "psrlq $dst,$shift\t! logical right shift packed2L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4376 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4377 __ psrlq($dst$$XMMRegister, $shift$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4378 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4379 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4380 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4381
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4382 instruct vsrl2L_imm(vecX dst, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4383 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4384 match(Set dst (URShiftVL dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4385 format %{ "psrlq $dst,$shift\t! logical right shift packed2L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4386 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4387 __ psrlq($dst$$XMMRegister, (int)$shift$$constant);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4388 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4389 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4390 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4391
6823 859c45fb8cea 7201026: add vector for shift count kvn parents: 6795 diff changeset	4392 instruct vsrl2L_reg(vecX dst, vecX src, vecS shift) %{
6614 006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4393 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4394 match(Set dst (URShiftVL src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4395 format %{ "vpsrlq $dst,$src,$shift\t! logical right shift packed2L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4396 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4397 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4398 __ vpsrlq($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4399 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4400 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4401 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4402
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4403 instruct vsrl2L_reg_imm(vecX dst, vecX src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4404 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4405 match(Set dst (URShiftVL src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4406 format %{ "vpsrlq $dst,$src,$shift\t! logical right shift packed2L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4407 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4408 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4409 __ vpsrlq($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4410 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4411 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4412 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4413
6823 859c45fb8cea 7201026: add vector for shift count kvn parents: 6795 diff changeset	4414 instruct vsrl4L_reg(vecY dst, vecY src, vecS shift) %{
6614 006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4415 predicate(UseAVX > 1 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4416 match(Set dst (URShiftVL src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4417 format %{ "vpsrlq $dst,$src,$shift\t! logical right shift packed4L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4418 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4419 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4420 __ vpsrlq($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4421 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4422 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4423 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4424
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4425 instruct vsrl4L_reg_imm(vecY dst, vecY src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4426 predicate(UseAVX > 1 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4427 match(Set dst (URShiftVL src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4428 format %{ "vpsrlq $dst,$src,$shift\t! logical right shift packed4L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4429 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4430 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4431 __ vpsrlq($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4432 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4433 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4434 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4435
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4436 // ------------------- ArithmeticRightShift -----------------------------------
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4437
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4438 // Shorts/Chars vector arithmetic right shift
6823 859c45fb8cea 7201026: add vector for shift count kvn parents: 6795 diff changeset	4439 instruct vsra2S(vecS dst, vecS shift) %{
6614 006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4440 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4441 match(Set dst (RShiftVS dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4442 format %{ "psraw $dst,$shift\t! arithmetic right shift packed2S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4443 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4444 __ psraw($dst$$XMMRegister, $shift$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4445 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4446 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4447 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4448
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4449 instruct vsra2S_imm(vecS dst, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4450 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4451 match(Set dst (RShiftVS dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4452 format %{ "psraw $dst,$shift\t! arithmetic right shift packed2S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4453 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4454 __ psraw($dst$$XMMRegister, (int)$shift$$constant);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4455 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4456 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4457 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4458
6823 859c45fb8cea 7201026: add vector for shift count kvn parents: 6795 diff changeset	4459 instruct vsra2S_reg(vecS dst, vecS src, vecS shift) %{
6614 006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4460 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4461 match(Set dst (RShiftVS src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4462 format %{ "vpsraw $dst,$src,$shift\t! arithmetic right shift packed2S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4463 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4464 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4465 __ vpsraw($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4466 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4467 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4468 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4469
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4470 instruct vsra2S_reg_imm(vecS dst, vecS src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4471 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4472 match(Set dst (RShiftVS src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4473 format %{ "vpsraw $dst,$src,$shift\t! arithmetic right shift packed2S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4474 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4475 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4476 __ vpsraw($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4477 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4478 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4479 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4480
6823 859c45fb8cea 7201026: add vector for shift count kvn parents: 6795 diff changeset	4481 instruct vsra4S(vecD dst, vecS shift) %{
6614 006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4482 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4483 match(Set dst (RShiftVS dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4484 format %{ "psraw $dst,$shift\t! arithmetic right shift packed4S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4485 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4486 __ psraw($dst$$XMMRegister, $shift$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4487 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4488 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4489 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4490
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4491 instruct vsra4S_imm(vecD dst, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4492 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4493 match(Set dst (RShiftVS dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4494 format %{ "psraw $dst,$shift\t! arithmetic right shift packed4S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4495 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4496 __ psraw($dst$$XMMRegister, (int)$shift$$constant);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4497 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4498 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4499 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4500
6823 859c45fb8cea 7201026: add vector for shift count kvn parents: 6795 diff changeset	4501 instruct vsra4S_reg(vecD dst, vecD src, vecS shift) %{
6614 006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4502 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4503 match(Set dst (RShiftVS src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4504 format %{ "vpsraw $dst,$src,$shift\t! arithmetic right shift packed4S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4505 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4506 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4507 __ vpsraw($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4508 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4509 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4510 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4511
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4512 instruct vsra4S_reg_imm(vecD dst, vecD src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4513 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4514 match(Set dst (RShiftVS src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4515 format %{ "vpsraw $dst,$src,$shift\t! arithmetic right shift packed4S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4516 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4517 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4518 __ vpsraw($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4519 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4520 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4521 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4522
6823 859c45fb8cea 7201026: add vector for shift count kvn parents: 6795 diff changeset	4523 instruct vsra8S(vecX dst, vecS shift) %{
6614 006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4524 predicate(n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4525 match(Set dst (RShiftVS dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4526 format %{ "psraw $dst,$shift\t! arithmetic right shift packed8S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4527 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4528 __ psraw($dst$$XMMRegister, $shift$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4529 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4530 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4531 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4532
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4533 instruct vsra8S_imm(vecX dst, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4534 predicate(n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4535 match(Set dst (RShiftVS dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4536 format %{ "psraw $dst,$shift\t! arithmetic right shift packed8S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4537 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4538 __ psraw($dst$$XMMRegister, (int)$shift$$constant);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4539 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4540 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4541 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4542
6823 859c45fb8cea 7201026: add vector for shift count kvn parents: 6795 diff changeset	4543 instruct vsra8S_reg(vecX dst, vecX src, vecS shift) %{
6614 006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4544 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4545 match(Set dst (RShiftVS src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4546 format %{ "vpsraw $dst,$src,$shift\t! arithmetic right shift packed8S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4547 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4548 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4549 __ vpsraw($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4550 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4551 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4552 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4553
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4554 instruct vsra8S_reg_imm(vecX dst, vecX src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4555 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4556 match(Set dst (RShiftVS src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4557 format %{ "vpsraw $dst,$src,$shift\t! arithmetic right shift packed8S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4558 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4559 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4560 __ vpsraw($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4561 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4562 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4563 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4564
6823 859c45fb8cea 7201026: add vector for shift count kvn parents: 6795 diff changeset	4565 instruct vsra16S_reg(vecY dst, vecY src, vecS shift) %{
6614 006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4566 predicate(UseAVX > 1 && n->as_Vector()->length() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4567 match(Set dst (RShiftVS src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4568 format %{ "vpsraw $dst,$src,$shift\t! arithmetic right shift packed16S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4569 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4570 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4571 __ vpsraw($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4572 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4573 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4574 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4575
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4576 instruct vsra16S_reg_imm(vecY dst, vecY src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4577 predicate(UseAVX > 1 && n->as_Vector()->length() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4578 match(Set dst (RShiftVS src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4579 format %{ "vpsraw $dst,$src,$shift\t! arithmetic right shift packed16S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4580 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4581 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4582 __ vpsraw($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4583 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4584 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4585 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4586
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4587 // Integers vector arithmetic right shift
6823 859c45fb8cea 7201026: add vector for shift count kvn parents: 6795 diff changeset	4588 instruct vsra2I(vecD dst, vecS shift) %{
6614 006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4589 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4590 match(Set dst (RShiftVI dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4591 format %{ "psrad $dst,$shift\t! arithmetic right shift packed2I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4592 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4593 __ psrad($dst$$XMMRegister, $shift$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4594 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4595 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4596 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4597
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4598 instruct vsra2I_imm(vecD dst, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4599 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4600 match(Set dst (RShiftVI dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4601 format %{ "psrad $dst,$shift\t! arithmetic right shift packed2I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4602 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4603 __ psrad($dst$$XMMRegister, (int)$shift$$constant);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4604 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4605 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4606 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4607
6823 859c45fb8cea 7201026: add vector for shift count kvn parents: 6795 diff changeset	4608 instruct vsra2I_reg(vecD dst, vecD src, vecS shift) %{
6614 006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4609 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4610 match(Set dst (RShiftVI src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4611 format %{ "vpsrad $dst,$src,$shift\t! arithmetic right shift packed2I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4612 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4613 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4614 __ vpsrad($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4615 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4616 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4617 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4618
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4619 instruct vsra2I_reg_imm(vecD dst, vecD src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4620 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4621 match(Set dst (RShiftVI src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4622 format %{ "vpsrad $dst,$src,$shift\t! arithmetic right shift packed2I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4623 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4624 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4625 __ vpsrad($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4626 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4627 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4628 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4629
6823 859c45fb8cea 7201026: add vector for shift count kvn parents: 6795 diff changeset	4630 instruct vsra4I(vecX dst, vecS shift) %{
6614 006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4631 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4632 match(Set dst (RShiftVI dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4633 format %{ "psrad $dst,$shift\t! arithmetic right shift packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4634 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4635 __ psrad($dst$$XMMRegister, $shift$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4636 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4637 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4638 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4639
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4640 instruct vsra4I_imm(vecX dst, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4641 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4642 match(Set dst (RShiftVI dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4643 format %{ "psrad $dst,$shift\t! arithmetic right shift packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4644 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4645 __ psrad($dst$$XMMRegister, (int)$shift$$constant);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4646 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4647 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4648 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4649
6823 859c45fb8cea 7201026: add vector for shift count kvn parents: 6795 diff changeset	4650 instruct vsra4I_reg(vecX dst, vecX src, vecS shift) %{
6614 006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4651 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4652 match(Set dst (RShiftVI src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4653 format %{ "vpsrad $dst,$src,$shift\t! arithmetic right shift packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4654 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4655 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4656 __ vpsrad($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4657 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4658 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4659 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4660
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4661 instruct vsra4I_reg_imm(vecX dst, vecX src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4662 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4663 match(Set dst (RShiftVI src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4664 format %{ "vpsrad $dst,$src,$shift\t! arithmetic right shift packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4665 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4666 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4667 __ vpsrad($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4668 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4669 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4670 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4671
6823 859c45fb8cea 7201026: add vector for shift count kvn parents: 6795 diff changeset	4672 instruct vsra8I_reg(vecY dst, vecY src, vecS shift) %{
6614 006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4673 predicate(UseAVX > 1 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4674 match(Set dst (RShiftVI src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4675 format %{ "vpsrad $dst,$src,$shift\t! arithmetic right shift packed8I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4676 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4677 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4678 __ vpsrad($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4679 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4680 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4681 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4682
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4683 instruct vsra8I_reg_imm(vecY dst, vecY src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4684 predicate(UseAVX > 1 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4685 match(Set dst (RShiftVI src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4686 format %{ "vpsrad $dst,$src,$shift\t! arithmetic right shift packed8I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4687 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4688 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4689 __ vpsrad($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4690 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4691 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4692 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4693
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4694 // There are no longs vector arithmetic right shift instructions.
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4695
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4696
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4697 // --------------------------------- AND --------------------------------------
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4698
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4699 instruct vand4B(vecS dst, vecS src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4700 predicate(n->as_Vector()->length_in_bytes() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4701 match(Set dst (AndV dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4702 format %{ "pand $dst,$src\t! and vectors (4 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4703 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4704 __ pand($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4705 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4706 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4707 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4708
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4709 instruct vand4B_reg(vecS dst, vecS src1, vecS src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4710 predicate(UseAVX > 0 && n->as_Vector()->length_in_bytes() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4711 match(Set dst (AndV src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4712 format %{ "vpand $dst,$src1,$src2\t! and vectors (4 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4713 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4714 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4715 __ vpand($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4716 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4717 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4718 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4719
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4720 instruct vand8B(vecD dst, vecD src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4721 predicate(n->as_Vector()->length_in_bytes() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4722 match(Set dst (AndV dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4723 format %{ "pand $dst,$src\t! and vectors (8 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4724 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4725 __ pand($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4726 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4727 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4728 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4729
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4730 instruct vand8B_reg(vecD dst, vecD src1, vecD src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4731 predicate(UseAVX > 0 && n->as_Vector()->length_in_bytes() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4732 match(Set dst (AndV src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4733 format %{ "vpand $dst,$src1,$src2\t! and vectors (8 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4734 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4735 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4736 __ vpand($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4737 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4738 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4739 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4740
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4741 instruct vand16B(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4742 predicate(n->as_Vector()->length_in_bytes() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4743 match(Set dst (AndV dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4744 format %{ "pand $dst,$src\t! and vectors (16 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4745 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4746 __ pand($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4747 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4748 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4749 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4750
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4751 instruct vand16B_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4752 predicate(UseAVX > 0 && n->as_Vector()->length_in_bytes() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4753 match(Set dst (AndV src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4754 format %{ "vpand $dst,$src1,$src2\t! and vectors (16 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4755 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4756 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4757 __ vpand($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4758 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4759 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4760 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4761
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4762 instruct vand16B_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4763 predicate(UseAVX > 0 && n->as_Vector()->length_in_bytes() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4764 match(Set dst (AndV src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4765 format %{ "vpand $dst,$src,$mem\t! and vectors (16 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4766 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4767 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4768 __ vpand($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4769 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4770 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4771 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4772
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4773 instruct vand32B_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4774 predicate(UseAVX > 1 && n->as_Vector()->length_in_bytes() == 32);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4775 match(Set dst (AndV src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4776 format %{ "vpand $dst,$src1,$src2\t! and vectors (32 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4777 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4778 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4779 __ vpand($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4780 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4781 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4782 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4783
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4784 instruct vand32B_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4785 predicate(UseAVX > 1 && n->as_Vector()->length_in_bytes() == 32);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4786 match(Set dst (AndV src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4787 format %{ "vpand $dst,$src,$mem\t! and vectors (32 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4788 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4789 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4790 __ vpand($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4791 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4792 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4793 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4794
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4795 // --------------------------------- OR ---------------------------------------
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4796
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4797 instruct vor4B(vecS dst, vecS src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4798 predicate(n->as_Vector()->length_in_bytes() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4799 match(Set dst (OrV dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4800 format %{ "por $dst,$src\t! or vectors (4 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4801 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4802 __ por($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4803 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4804 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4805 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4806
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4807 instruct vor4B_reg(vecS dst, vecS src1, vecS src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4808 predicate(UseAVX > 0 && n->as_Vector()->length_in_bytes() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4809 match(Set dst (OrV src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4810 format %{ "vpor $dst,$src1,$src2\t! or vectors (4 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4811 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4812 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4813 __ vpor($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4814 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4815 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4816 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4817
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4818 instruct vor8B(vecD dst, vecD src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4819 predicate(n->as_Vector()->length_in_bytes() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4820 match(Set dst (OrV dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4821 format %{ "por $dst,$src\t! or vectors (8 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4822 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4823 __ por($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4824 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4825 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4826 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4827
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4828 instruct vor8B_reg(vecD dst, vecD src1, vecD src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4829 predicate(UseAVX > 0 && n->as_Vector()->length_in_bytes() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4830 match(Set dst (OrV src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4831 format %{ "vpor $dst,$src1,$src2\t! or vectors (8 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4832 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4833 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4834 __ vpor($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4835 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4836 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4837 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4838
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4839 instruct vor16B(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4840 predicate(n->as_Vector()->length_in_bytes() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4841 match(Set dst (OrV dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4842 format %{ "por $dst,$src\t! or vectors (16 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4843 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4844 __ por($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4845 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4846 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4847 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4848
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4849 instruct vor16B_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4850 predicate(UseAVX > 0 && n->as_Vector()->length_in_bytes() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4851 match(Set dst (OrV src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4852 format %{ "vpor $dst,$src1,$src2\t! or vectors (16 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4853 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4854 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4855 __ vpor($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4856 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4857 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4858 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4859
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4860 instruct vor16B_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4861 predicate(UseAVX > 0 && n->as_Vector()->length_in_bytes() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4862 match(Set dst (OrV src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4863 format %{ "vpor $dst,$src,$mem\t! or vectors (16 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4864 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4865 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4866 __ vpor($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4867 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4868 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4869 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4870
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4871 instruct vor32B_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4872 predicate(UseAVX > 1 && n->as_Vector()->length_in_bytes() == 32);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4873 match(Set dst (OrV src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4874 format %{ "vpor $dst,$src1,$src2\t! or vectors (32 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4875 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4876 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4877 __ vpor($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4878 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4879 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4880 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4881
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4882 instruct vor32B_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4883 predicate(UseAVX > 1 && n->as_Vector()->length_in_bytes() == 32);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4884 match(Set dst (OrV src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4885 format %{ "vpor $dst,$src,$mem\t! or vectors (32 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4886 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4887 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4888 __ vpor($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4889 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4890 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4891 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4892
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4893 // --------------------------------- XOR --------------------------------------
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4894
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4895 instruct vxor4B(vecS dst, vecS src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4896 predicate(n->as_Vector()->length_in_bytes() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4897 match(Set dst (XorV dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4898 format %{ "pxor $dst,$src\t! xor vectors (4 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4899 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4900 __ pxor($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4901 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4902 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4903 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4904
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4905 instruct vxor4B_reg(vecS dst, vecS src1, vecS src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4906 predicate(UseAVX > 0 && n->as_Vector()->length_in_bytes() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4907 match(Set dst (XorV src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4908 format %{ "vpxor $dst,$src1,$src2\t! xor vectors (4 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4909 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4910 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4911 __ vpxor($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4912 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4913 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4914 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4915
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4916 instruct vxor8B(vecD dst, vecD src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4917 predicate(n->as_Vector()->length_in_bytes() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4918 match(Set dst (XorV dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4919 format %{ "pxor $dst,$src\t! xor vectors (8 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4920 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4921 __ pxor($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4922 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4923 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4924 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4925
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4926 instruct vxor8B_reg(vecD dst, vecD src1, vecD src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4927 predicate(UseAVX > 0 && n->as_Vector()->length_in_bytes() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4928 match(Set dst (XorV src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4929 format %{ "vpxor $dst,$src1,$src2\t! xor vectors (8 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4930 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4931 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4932 __ vpxor($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4933 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4934 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4935 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4936
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4937 instruct vxor16B(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4938 predicate(n->as_Vector()->length_in_bytes() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4939 match(Set dst (XorV dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4940 format %{ "pxor $dst,$src\t! xor vectors (16 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4941 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4942 __ pxor($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4943 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4944 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4945 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4946
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4947 instruct vxor16B_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4948 predicate(UseAVX > 0 && n->as_Vector()->length_in_bytes() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4949 match(Set dst (XorV src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4950 format %{ "vpxor $dst,$src1,$src2\t! xor vectors (16 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4951 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4952 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4953 __ vpxor($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4954 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4955 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4956 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4957
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4958 instruct vxor16B_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4959 predicate(UseAVX > 0 && n->as_Vector()->length_in_bytes() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4960 match(Set dst (XorV src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4961 format %{ "vpxor $dst,$src,$mem\t! xor vectors (16 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4962 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4963 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4964 __ vpxor($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4965 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4966 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4967 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4968
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4969 instruct vxor32B_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4970 predicate(UseAVX > 1 && n->as_Vector()->length_in_bytes() == 32);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4971 match(Set dst (XorV src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4972 format %{ "vpxor $dst,$src1,$src2\t! xor vectors (32 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4973 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4974 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4975 __ vpxor($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4976 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4977 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4978 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4979
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4980 instruct vxor32B_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4981 predicate(UseAVX > 1 && n->as_Vector()->length_in_bytes() == 32);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4982 match(Set dst (XorV src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4983 format %{ "vpxor $dst,$src,$mem\t! xor vectors (32 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4984 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4985 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4986 __ vpxor($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4987 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4988 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4989 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4990

Mercurial > hg > truffle

annotate src/cpu/x86/vm/x86.ad @ 14518:d8041d695d19