Mercurial > hg > truffle
annotate src/share/vm/c1/c1_LIR.cpp @ 6725:da91efe96a93
6964458: Reimplement class meta-data storage to use native memory
Summary: Remove PermGen, allocate meta-data in metaspace linked to class loaders, rewrite GC walking, rewrite and rename metadata to be C++ classes
Reviewed-by: jmasa, stefank, never, coleenp, kvn, brutisso, mgerdin, dholmes, jrose, twisti, roland
Contributed-by: jmasa <jon.masamitsu@oracle.com>, stefank <stefan.karlsson@oracle.com>, mgerdin <mikael.gerdin@oracle.com>, never <tom.rodriguez@oracle.com>
author | coleenp |
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date | Sat, 01 Sep 2012 13:25:18 -0400 |
parents | 6759698e3140 |
children | 8a02ca5e5576 |
rev | line source |
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0 | 1 /* |
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2 * Copyright (c) 2000, 2012, Oracle and/or its affiliates. All rights reserved. |
0 | 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
4 * | |
5 * This code is free software; you can redistribute it and/or modify it | |
6 * under the terms of the GNU General Public License version 2 only, as | |
7 * published by the Free Software Foundation. | |
8 * | |
9 * This code is distributed in the hope that it will be useful, but WITHOUT | |
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
12 * version 2 for more details (a copy is included in the LICENSE file that | |
13 * accompanied this code). | |
14 * | |
15 * You should have received a copy of the GNU General Public License version | |
16 * 2 along with this work; if not, write to the Free Software Foundation, | |
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
18 * | |
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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20 * or visit www.oracle.com if you need additional information or have any |
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21 * questions. |
0 | 22 * |
23 */ | |
24 | |
1972 | 25 #include "precompiled.hpp" |
26 #include "c1/c1_InstructionPrinter.hpp" | |
27 #include "c1/c1_LIR.hpp" | |
28 #include "c1/c1_LIRAssembler.hpp" | |
29 #include "c1/c1_ValueStack.hpp" | |
30 #include "ci/ciInstance.hpp" | |
31 #include "runtime/sharedRuntime.hpp" | |
0 | 32 |
33 Register LIR_OprDesc::as_register() const { | |
34 return FrameMap::cpu_rnr2reg(cpu_regnr()); | |
35 } | |
36 | |
37 Register LIR_OprDesc::as_register_lo() const { | |
38 return FrameMap::cpu_rnr2reg(cpu_regnrLo()); | |
39 } | |
40 | |
41 Register LIR_OprDesc::as_register_hi() const { | |
42 return FrameMap::cpu_rnr2reg(cpu_regnrHi()); | |
43 } | |
44 | |
304 | 45 #if defined(X86) |
0 | 46 |
47 XMMRegister LIR_OprDesc::as_xmm_float_reg() const { | |
48 return FrameMap::nr2xmmreg(xmm_regnr()); | |
49 } | |
50 | |
51 XMMRegister LIR_OprDesc::as_xmm_double_reg() const { | |
52 assert(xmm_regnrLo() == xmm_regnrHi(), "assumed in calculation"); | |
53 return FrameMap::nr2xmmreg(xmm_regnrLo()); | |
54 } | |
55 | |
304 | 56 #endif // X86 |
0 | 57 |
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58 #if defined(SPARC) || defined(PPC) |
0 | 59 |
60 FloatRegister LIR_OprDesc::as_float_reg() const { | |
61 return FrameMap::nr2floatreg(fpu_regnr()); | |
62 } | |
63 | |
64 FloatRegister LIR_OprDesc::as_double_reg() const { | |
65 return FrameMap::nr2floatreg(fpu_regnrHi()); | |
66 } | |
67 | |
68 #endif | |
69 | |
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70 #ifdef ARM |
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71 |
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72 FloatRegister LIR_OprDesc::as_float_reg() const { |
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73 return as_FloatRegister(fpu_regnr()); |
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74 } |
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75 |
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76 FloatRegister LIR_OprDesc::as_double_reg() const { |
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77 return as_FloatRegister(fpu_regnrLo()); |
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78 } |
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79 |
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80 #endif |
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81 |
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82 |
0 | 83 LIR_Opr LIR_OprFact::illegalOpr = LIR_OprFact::illegal(); |
84 | |
85 LIR_Opr LIR_OprFact::value_type(ValueType* type) { | |
86 ValueTag tag = type->tag(); | |
87 switch (tag) { | |
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88 case metaDataTag : { |
0 | 89 ClassConstant* c = type->as_ClassConstant(); |
90 if (c != NULL && !c->value()->is_loaded()) { | |
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91 return LIR_OprFact::metadataConst(NULL); |
0 | 92 } else { |
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93 return LIR_OprFact::metadataConst(c->value()->constant_encoding()); |
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94 } |
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95 } |
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96 case objectTag : { |
0 | 97 return LIR_OprFact::oopConst(type->as_ObjectType()->encoding()); |
98 } | |
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99 case addressTag: return LIR_OprFact::addressConst(type->as_AddressConstant()->value()); |
0 | 100 case intTag : return LIR_OprFact::intConst(type->as_IntConstant()->value()); |
101 case floatTag : return LIR_OprFact::floatConst(type->as_FloatConstant()->value()); | |
102 case longTag : return LIR_OprFact::longConst(type->as_LongConstant()->value()); | |
103 case doubleTag : return LIR_OprFact::doubleConst(type->as_DoubleConstant()->value()); | |
304 | 104 default: ShouldNotReachHere(); return LIR_OprFact::intConst(-1); |
0 | 105 } |
106 } | |
107 | |
108 | |
109 LIR_Opr LIR_OprFact::dummy_value_type(ValueType* type) { | |
110 switch (type->tag()) { | |
111 case objectTag: return LIR_OprFact::oopConst(NULL); | |
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112 case addressTag:return LIR_OprFact::addressConst(0); |
0 | 113 case intTag: return LIR_OprFact::intConst(0); |
114 case floatTag: return LIR_OprFact::floatConst(0.0); | |
115 case longTag: return LIR_OprFact::longConst(0); | |
116 case doubleTag: return LIR_OprFact::doubleConst(0.0); | |
304 | 117 default: ShouldNotReachHere(); return LIR_OprFact::intConst(-1); |
0 | 118 } |
119 return illegalOpr; | |
120 } | |
121 | |
122 | |
123 | |
124 //--------------------------------------------------- | |
125 | |
126 | |
127 LIR_Address::Scale LIR_Address::scale(BasicType type) { | |
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128 int elem_size = type2aelembytes(type); |
0 | 129 switch (elem_size) { |
130 case 1: return LIR_Address::times_1; | |
131 case 2: return LIR_Address::times_2; | |
132 case 4: return LIR_Address::times_4; | |
133 case 8: return LIR_Address::times_8; | |
134 } | |
135 ShouldNotReachHere(); | |
136 return LIR_Address::times_1; | |
137 } | |
138 | |
139 | |
140 #ifndef PRODUCT | |
141 void LIR_Address::verify() const { | |
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142 #if defined(SPARC) || defined(PPC) |
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143 assert(scale() == times_1, "Scaled addressing mode not available on SPARC/PPC and should not be used"); |
0 | 144 assert(disp() == 0 || index()->is_illegal(), "can't have both"); |
145 #endif | |
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146 #ifdef ARM |
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147 assert(disp() == 0 || index()->is_illegal(), "can't have both"); |
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148 // Note: offsets higher than 4096 must not be rejected here. They can |
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149 // be handled by the back-end or will be rejected if not. |
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150 #endif |
0 | 151 #ifdef _LP64 |
152 assert(base()->is_cpu_register(), "wrong base operand"); | |
153 assert(index()->is_illegal() || index()->is_double_cpu(), "wrong index operand"); | |
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154 assert(base()->type() == T_OBJECT || base()->type() == T_LONG || base()->type() == T_METADATA, |
0 | 155 "wrong type for addresses"); |
156 #else | |
157 assert(base()->is_single_cpu(), "wrong base operand"); | |
158 assert(index()->is_illegal() || index()->is_single_cpu(), "wrong index operand"); | |
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159 assert(base()->type() == T_OBJECT || base()->type() == T_INT || base()->type() == T_METADATA, |
0 | 160 "wrong type for addresses"); |
161 #endif | |
162 } | |
163 #endif | |
164 | |
165 | |
166 //--------------------------------------------------- | |
167 | |
168 char LIR_OprDesc::type_char(BasicType t) { | |
169 switch (t) { | |
170 case T_ARRAY: | |
171 t = T_OBJECT; | |
172 case T_BOOLEAN: | |
173 case T_CHAR: | |
174 case T_FLOAT: | |
175 case T_DOUBLE: | |
176 case T_BYTE: | |
177 case T_SHORT: | |
178 case T_INT: | |
179 case T_LONG: | |
180 case T_OBJECT: | |
181 case T_ADDRESS: | |
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182 case T_METADATA: |
0 | 183 case T_VOID: |
184 return ::type2char(t); | |
185 | |
186 case T_ILLEGAL: | |
187 return '?'; | |
188 | |
189 default: | |
190 ShouldNotReachHere(); | |
304 | 191 return '?'; |
0 | 192 } |
193 } | |
194 | |
195 #ifndef PRODUCT | |
196 void LIR_OprDesc::validate_type() const { | |
197 | |
198 #ifdef ASSERT | |
199 if (!is_pointer() && !is_illegal()) { | |
200 switch (as_BasicType(type_field())) { | |
201 case T_LONG: | |
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202 assert((kind_field() == cpu_register || kind_field() == stack_value) && |
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203 size_field() == double_size, "must match"); |
0 | 204 break; |
205 case T_FLOAT: | |
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206 // FP return values can be also in CPU registers on ARM and PPC (softfp ABI) |
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207 assert((kind_field() == fpu_register || kind_field() == stack_value |
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208 ARM_ONLY(|| kind_field() == cpu_register) |
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209 PPC_ONLY(|| kind_field() == cpu_register) ) && |
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210 size_field() == single_size, "must match"); |
0 | 211 break; |
212 case T_DOUBLE: | |
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213 // FP return values can be also in CPU registers on ARM and PPC (softfp ABI) |
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214 assert((kind_field() == fpu_register || kind_field() == stack_value |
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215 ARM_ONLY(|| kind_field() == cpu_register) |
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216 PPC_ONLY(|| kind_field() == cpu_register) ) && |
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217 size_field() == double_size, "must match"); |
0 | 218 break; |
219 case T_BOOLEAN: | |
220 case T_CHAR: | |
221 case T_BYTE: | |
222 case T_SHORT: | |
223 case T_INT: | |
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224 case T_ADDRESS: |
0 | 225 case T_OBJECT: |
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226 case T_METADATA: |
0 | 227 case T_ARRAY: |
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228 assert((kind_field() == cpu_register || kind_field() == stack_value) && |
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229 size_field() == single_size, "must match"); |
0 | 230 break; |
231 | |
232 case T_ILLEGAL: | |
233 // XXX TKR also means unknown right now | |
234 // assert(is_illegal(), "must match"); | |
235 break; | |
236 | |
237 default: | |
238 ShouldNotReachHere(); | |
239 } | |
240 } | |
241 #endif | |
242 | |
243 } | |
244 #endif // PRODUCT | |
245 | |
246 | |
247 bool LIR_OprDesc::is_oop() const { | |
248 if (is_pointer()) { | |
249 return pointer()->is_oop_pointer(); | |
250 } else { | |
251 OprType t= type_field(); | |
252 assert(t != unknown_type, "not set"); | |
253 return t == object_type; | |
254 } | |
255 } | |
256 | |
257 | |
258 | |
259 void LIR_Op2::verify() const { | |
260 #ifdef ASSERT | |
261 switch (code()) { | |
262 case lir_cmove: | |
263 break; | |
264 | |
265 default: | |
266 assert(!result_opr()->is_register() || !result_opr()->is_oop_register(), | |
267 "can't produce oops from arith"); | |
268 } | |
269 | |
270 if (TwoOperandLIRForm) { | |
271 switch (code()) { | |
272 case lir_add: | |
273 case lir_sub: | |
274 case lir_mul: | |
275 case lir_mul_strictfp: | |
276 case lir_div: | |
277 case lir_div_strictfp: | |
278 case lir_rem: | |
279 case lir_logic_and: | |
280 case lir_logic_or: | |
281 case lir_logic_xor: | |
282 case lir_shl: | |
283 case lir_shr: | |
284 assert(in_opr1() == result_opr(), "opr1 and result must match"); | |
285 assert(in_opr1()->is_valid() && in_opr2()->is_valid(), "must be valid"); | |
286 break; | |
287 | |
288 // special handling for lir_ushr because of write barriers | |
289 case lir_ushr: | |
290 assert(in_opr1() == result_opr() || in_opr2()->is_constant(), "opr1 and result must match or shift count is constant"); | |
291 assert(in_opr1()->is_valid() && in_opr2()->is_valid(), "must be valid"); | |
292 break; | |
293 | |
294 } | |
295 } | |
296 #endif | |
297 } | |
298 | |
299 | |
300 LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block) | |
301 : LIR_Op(lir_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL) | |
302 , _cond(cond) | |
303 , _type(type) | |
304 , _label(block->label()) | |
305 , _block(block) | |
306 , _ublock(NULL) | |
307 , _stub(NULL) { | |
308 } | |
309 | |
310 LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BasicType type, CodeStub* stub) : | |
311 LIR_Op(lir_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL) | |
312 , _cond(cond) | |
313 , _type(type) | |
314 , _label(stub->entry()) | |
315 , _block(NULL) | |
316 , _ublock(NULL) | |
317 , _stub(stub) { | |
318 } | |
319 | |
320 LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block, BlockBegin* ublock) | |
321 : LIR_Op(lir_cond_float_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL) | |
322 , _cond(cond) | |
323 , _type(type) | |
324 , _label(block->label()) | |
325 , _block(block) | |
326 , _ublock(ublock) | |
327 , _stub(NULL) | |
328 { | |
329 } | |
330 | |
331 void LIR_OpBranch::change_block(BlockBegin* b) { | |
332 assert(_block != NULL, "must have old block"); | |
333 assert(_block->label() == label(), "must be equal"); | |
334 | |
335 _block = b; | |
336 _label = b->label(); | |
337 } | |
338 | |
339 void LIR_OpBranch::change_ublock(BlockBegin* b) { | |
340 assert(_ublock != NULL, "must have old block"); | |
341 _ublock = b; | |
342 } | |
343 | |
344 void LIR_OpBranch::negate_cond() { | |
345 switch (_cond) { | |
346 case lir_cond_equal: _cond = lir_cond_notEqual; break; | |
347 case lir_cond_notEqual: _cond = lir_cond_equal; break; | |
348 case lir_cond_less: _cond = lir_cond_greaterEqual; break; | |
349 case lir_cond_lessEqual: _cond = lir_cond_greater; break; | |
350 case lir_cond_greaterEqual: _cond = lir_cond_less; break; | |
351 case lir_cond_greater: _cond = lir_cond_lessEqual; break; | |
352 default: ShouldNotReachHere(); | |
353 } | |
354 } | |
355 | |
356 | |
357 LIR_OpTypeCheck::LIR_OpTypeCheck(LIR_Code code, LIR_Opr result, LIR_Opr object, ciKlass* klass, | |
358 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, | |
359 bool fast_check, CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, | |
1783 | 360 CodeStub* stub) |
361 | |
0 | 362 : LIR_Op(code, result, NULL) |
363 , _object(object) | |
364 , _array(LIR_OprFact::illegalOpr) | |
365 , _klass(klass) | |
366 , _tmp1(tmp1) | |
367 , _tmp2(tmp2) | |
368 , _tmp3(tmp3) | |
369 , _fast_check(fast_check) | |
370 , _stub(stub) | |
371 , _info_for_patch(info_for_patch) | |
372 , _info_for_exception(info_for_exception) | |
1783 | 373 , _profiled_method(NULL) |
374 , _profiled_bci(-1) | |
375 , _should_profile(false) | |
376 { | |
0 | 377 if (code == lir_checkcast) { |
378 assert(info_for_exception != NULL, "checkcast throws exceptions"); | |
379 } else if (code == lir_instanceof) { | |
380 assert(info_for_exception == NULL, "instanceof throws no exceptions"); | |
381 } else { | |
382 ShouldNotReachHere(); | |
383 } | |
384 } | |
385 | |
386 | |
387 | |
1783 | 388 LIR_OpTypeCheck::LIR_OpTypeCheck(LIR_Code code, LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, CodeEmitInfo* info_for_exception) |
0 | 389 : LIR_Op(code, LIR_OprFact::illegalOpr, NULL) |
390 , _object(object) | |
391 , _array(array) | |
392 , _klass(NULL) | |
393 , _tmp1(tmp1) | |
394 , _tmp2(tmp2) | |
395 , _tmp3(tmp3) | |
396 , _fast_check(false) | |
397 , _stub(NULL) | |
398 , _info_for_patch(NULL) | |
399 , _info_for_exception(info_for_exception) | |
1783 | 400 , _profiled_method(NULL) |
401 , _profiled_bci(-1) | |
402 , _should_profile(false) | |
403 { | |
0 | 404 if (code == lir_store_check) { |
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405 _stub = new ArrayStoreExceptionStub(object, info_for_exception); |
0 | 406 assert(info_for_exception != NULL, "store_check throws exceptions"); |
407 } else { | |
408 ShouldNotReachHere(); | |
409 } | |
410 } | |
411 | |
412 | |
413 LIR_OpArrayCopy::LIR_OpArrayCopy(LIR_Opr src, LIR_Opr src_pos, LIR_Opr dst, LIR_Opr dst_pos, LIR_Opr length, | |
414 LIR_Opr tmp, ciArrayKlass* expected_type, int flags, CodeEmitInfo* info) | |
415 : LIR_Op(lir_arraycopy, LIR_OprFact::illegalOpr, info) | |
416 , _tmp(tmp) | |
417 , _src(src) | |
418 , _src_pos(src_pos) | |
419 , _dst(dst) | |
420 , _dst_pos(dst_pos) | |
421 , _flags(flags) | |
422 , _expected_type(expected_type) | |
423 , _length(length) { | |
424 _stub = new ArrayCopyStub(this); | |
425 } | |
426 | |
427 | |
428 //-------------------verify-------------------------- | |
429 | |
430 void LIR_Op1::verify() const { | |
431 switch(code()) { | |
432 case lir_move: | |
433 assert(in_opr()->is_valid() && result_opr()->is_valid(), "must be"); | |
434 break; | |
435 case lir_null_check: | |
436 assert(in_opr()->is_register(), "must be"); | |
437 break; | |
438 case lir_return: | |
439 assert(in_opr()->is_register() || in_opr()->is_illegal(), "must be"); | |
440 break; | |
441 } | |
442 } | |
443 | |
444 void LIR_OpRTCall::verify() const { | |
445 assert(strcmp(Runtime1::name_for_address(addr()), "<unknown function>") != 0, "unknown function"); | |
446 } | |
447 | |
448 //-------------------visits-------------------------- | |
449 | |
450 // complete rework of LIR instruction visitor. | |
451 // The virtual calls for each instruction type is replaced by a big | |
452 // switch that adds the operands for each instruction | |
453 | |
454 void LIR_OpVisitState::visit(LIR_Op* op) { | |
455 // copy information from the LIR_Op | |
456 reset(); | |
457 set_op(op); | |
458 | |
459 switch (op->code()) { | |
460 | |
461 // LIR_Op0 | |
462 case lir_word_align: // result and info always invalid | |
463 case lir_backwardbranch_target: // result and info always invalid | |
464 case lir_build_frame: // result and info always invalid | |
465 case lir_fpop_raw: // result and info always invalid | |
466 case lir_24bit_FPU: // result and info always invalid | |
467 case lir_reset_FPU: // result and info always invalid | |
468 case lir_breakpoint: // result and info always invalid | |
469 case lir_membar: // result and info always invalid | |
470 case lir_membar_acquire: // result and info always invalid | |
471 case lir_membar_release: // result and info always invalid | |
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472 case lir_membar_loadload: // result and info always invalid |
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473 case lir_membar_storestore: // result and info always invalid |
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474 case lir_membar_loadstore: // result and info always invalid |
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475 case lir_membar_storeload: // result and info always invalid |
0 | 476 { |
477 assert(op->as_Op0() != NULL, "must be"); | |
478 assert(op->_info == NULL, "info not used by this instruction"); | |
479 assert(op->_result->is_illegal(), "not used"); | |
480 break; | |
481 } | |
482 | |
483 case lir_nop: // may have info, result always invalid | |
484 case lir_std_entry: // may have result, info always invalid | |
485 case lir_osr_entry: // may have result, info always invalid | |
486 case lir_get_thread: // may have result, info always invalid | |
487 { | |
488 assert(op->as_Op0() != NULL, "must be"); | |
489 if (op->_info != NULL) do_info(op->_info); | |
490 if (op->_result->is_valid()) do_output(op->_result); | |
491 break; | |
492 } | |
493 | |
494 | |
495 // LIR_OpLabel | |
496 case lir_label: // result and info always invalid | |
497 { | |
498 assert(op->as_OpLabel() != NULL, "must be"); | |
499 assert(op->_info == NULL, "info not used by this instruction"); | |
500 assert(op->_result->is_illegal(), "not used"); | |
501 break; | |
502 } | |
503 | |
504 | |
505 // LIR_Op1 | |
506 case lir_fxch: // input always valid, result and info always invalid | |
507 case lir_fld: // input always valid, result and info always invalid | |
508 case lir_ffree: // input always valid, result and info always invalid | |
509 case lir_push: // input always valid, result and info always invalid | |
510 case lir_pop: // input always valid, result and info always invalid | |
511 case lir_return: // input always valid, result and info always invalid | |
512 case lir_leal: // input and result always valid, info always invalid | |
513 case lir_neg: // input and result always valid, info always invalid | |
514 case lir_monaddr: // input and result always valid, info always invalid | |
515 case lir_null_check: // input and info always valid, result always invalid | |
516 case lir_move: // input and result always valid, may have info | |
1783 | 517 case lir_pack64: // input and result always valid |
518 case lir_unpack64: // input and result always valid | |
0 | 519 case lir_prefetchr: // input always valid, result and info always invalid |
520 case lir_prefetchw: // input always valid, result and info always invalid | |
521 { | |
522 assert(op->as_Op1() != NULL, "must be"); | |
523 LIR_Op1* op1 = (LIR_Op1*)op; | |
524 | |
525 if (op1->_info) do_info(op1->_info); | |
526 if (op1->_opr->is_valid()) do_input(op1->_opr); | |
527 if (op1->_result->is_valid()) do_output(op1->_result); | |
528 | |
529 break; | |
530 } | |
531 | |
532 case lir_safepoint: | |
533 { | |
534 assert(op->as_Op1() != NULL, "must be"); | |
535 LIR_Op1* op1 = (LIR_Op1*)op; | |
536 | |
537 assert(op1->_info != NULL, ""); do_info(op1->_info); | |
538 if (op1->_opr->is_valid()) do_temp(op1->_opr); // safepoints on SPARC need temporary register | |
539 assert(op1->_result->is_illegal(), "safepoint does not produce value"); | |
540 | |
541 break; | |
542 } | |
543 | |
544 // LIR_OpConvert; | |
545 case lir_convert: // input and result always valid, info always invalid | |
546 { | |
547 assert(op->as_OpConvert() != NULL, "must be"); | |
548 LIR_OpConvert* opConvert = (LIR_OpConvert*)op; | |
549 | |
550 assert(opConvert->_info == NULL, "must be"); | |
551 if (opConvert->_opr->is_valid()) do_input(opConvert->_opr); | |
552 if (opConvert->_result->is_valid()) do_output(opConvert->_result); | |
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553 #ifdef PPC |
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554 if (opConvert->_tmp1->is_valid()) do_temp(opConvert->_tmp1); |
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555 if (opConvert->_tmp2->is_valid()) do_temp(opConvert->_tmp2); |
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556 #endif |
0 | 557 do_stub(opConvert->_stub); |
558 | |
559 break; | |
560 } | |
561 | |
562 // LIR_OpBranch; | |
563 case lir_branch: // may have info, input and result register always invalid | |
564 case lir_cond_float_branch: // may have info, input and result register always invalid | |
565 { | |
566 assert(op->as_OpBranch() != NULL, "must be"); | |
567 LIR_OpBranch* opBranch = (LIR_OpBranch*)op; | |
568 | |
569 if (opBranch->_info != NULL) do_info(opBranch->_info); | |
570 assert(opBranch->_result->is_illegal(), "not used"); | |
571 if (opBranch->_stub != NULL) opBranch->stub()->visit(this); | |
572 | |
573 break; | |
574 } | |
575 | |
576 | |
577 // LIR_OpAllocObj | |
578 case lir_alloc_object: | |
579 { | |
580 assert(op->as_OpAllocObj() != NULL, "must be"); | |
581 LIR_OpAllocObj* opAllocObj = (LIR_OpAllocObj*)op; | |
582 | |
583 if (opAllocObj->_info) do_info(opAllocObj->_info); | |
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584 if (opAllocObj->_opr->is_valid()) { do_input(opAllocObj->_opr); |
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585 do_temp(opAllocObj->_opr); |
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586 } |
0 | 587 if (opAllocObj->_tmp1->is_valid()) do_temp(opAllocObj->_tmp1); |
588 if (opAllocObj->_tmp2->is_valid()) do_temp(opAllocObj->_tmp2); | |
589 if (opAllocObj->_tmp3->is_valid()) do_temp(opAllocObj->_tmp3); | |
590 if (opAllocObj->_tmp4->is_valid()) do_temp(opAllocObj->_tmp4); | |
591 if (opAllocObj->_result->is_valid()) do_output(opAllocObj->_result); | |
592 do_stub(opAllocObj->_stub); | |
593 break; | |
594 } | |
595 | |
596 | |
597 // LIR_OpRoundFP; | |
598 case lir_roundfp: { | |
599 assert(op->as_OpRoundFP() != NULL, "must be"); | |
600 LIR_OpRoundFP* opRoundFP = (LIR_OpRoundFP*)op; | |
601 | |
602 assert(op->_info == NULL, "info not used by this instruction"); | |
603 assert(opRoundFP->_tmp->is_illegal(), "not used"); | |
604 do_input(opRoundFP->_opr); | |
605 do_output(opRoundFP->_result); | |
606 | |
607 break; | |
608 } | |
609 | |
610 | |
611 // LIR_Op2 | |
612 case lir_cmp: | |
613 case lir_cmp_l2i: | |
614 case lir_ucmp_fd2i: | |
615 case lir_cmp_fd2i: | |
616 case lir_add: | |
617 case lir_sub: | |
618 case lir_mul: | |
619 case lir_div: | |
620 case lir_rem: | |
621 case lir_sqrt: | |
622 case lir_abs: | |
623 case lir_logic_and: | |
624 case lir_logic_or: | |
625 case lir_logic_xor: | |
626 case lir_shl: | |
627 case lir_shr: | |
628 case lir_ushr: | |
629 { | |
630 assert(op->as_Op2() != NULL, "must be"); | |
631 LIR_Op2* op2 = (LIR_Op2*)op; | |
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632 assert(op2->_tmp2->is_illegal() && op2->_tmp3->is_illegal() && |
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633 op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used"); |
0 | 634 |
635 if (op2->_info) do_info(op2->_info); | |
636 if (op2->_opr1->is_valid()) do_input(op2->_opr1); | |
637 if (op2->_opr2->is_valid()) do_input(op2->_opr2); | |
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638 if (op2->_tmp1->is_valid()) do_temp(op2->_tmp1); |
0 | 639 if (op2->_result->is_valid()) do_output(op2->_result); |
640 | |
641 break; | |
642 } | |
643 | |
644 // special handling for cmove: right input operand must not be equal | |
645 // to the result operand, otherwise the backend fails | |
646 case lir_cmove: | |
647 { | |
648 assert(op->as_Op2() != NULL, "must be"); | |
649 LIR_Op2* op2 = (LIR_Op2*)op; | |
650 | |
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651 assert(op2->_info == NULL && op2->_tmp1->is_illegal() && op2->_tmp2->is_illegal() && |
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652 op2->_tmp3->is_illegal() && op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used"); |
0 | 653 assert(op2->_opr1->is_valid() && op2->_opr2->is_valid() && op2->_result->is_valid(), "used"); |
654 | |
655 do_input(op2->_opr1); | |
656 do_input(op2->_opr2); | |
657 do_temp(op2->_opr2); | |
658 do_output(op2->_result); | |
659 | |
660 break; | |
661 } | |
662 | |
663 // vspecial handling for strict operations: register input operands | |
664 // as temp to guarantee that they do not overlap with other | |
665 // registers | |
666 case lir_mul_strictfp: | |
667 case lir_div_strictfp: | |
668 { | |
669 assert(op->as_Op2() != NULL, "must be"); | |
670 LIR_Op2* op2 = (LIR_Op2*)op; | |
671 | |
672 assert(op2->_info == NULL, "not used"); | |
673 assert(op2->_opr1->is_valid(), "used"); | |
674 assert(op2->_opr2->is_valid(), "used"); | |
675 assert(op2->_result->is_valid(), "used"); | |
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676 assert(op2->_tmp2->is_illegal() && op2->_tmp3->is_illegal() && |
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677 op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used"); |
0 | 678 |
679 do_input(op2->_opr1); do_temp(op2->_opr1); | |
680 do_input(op2->_opr2); do_temp(op2->_opr2); | |
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681 if (op2->_tmp1->is_valid()) do_temp(op2->_tmp1); |
0 | 682 do_output(op2->_result); |
683 | |
684 break; | |
685 } | |
686 | |
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687 case lir_throw: { |
0 | 688 assert(op->as_Op2() != NULL, "must be"); |
689 LIR_Op2* op2 = (LIR_Op2*)op; | |
690 | |
691 if (op2->_info) do_info(op2->_info); | |
692 if (op2->_opr1->is_valid()) do_temp(op2->_opr1); | |
693 if (op2->_opr2->is_valid()) do_input(op2->_opr2); // exception object is input parameter | |
694 assert(op2->_result->is_illegal(), "no result"); | |
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695 assert(op2->_tmp2->is_illegal() && op2->_tmp3->is_illegal() && |
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696 op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used"); |
0 | 697 |
698 break; | |
699 } | |
700 | |
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701 case lir_unwind: { |
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702 assert(op->as_Op1() != NULL, "must be"); |
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703 LIR_Op1* op1 = (LIR_Op1*)op; |
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704 |
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705 assert(op1->_info == NULL, "no info"); |
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706 assert(op1->_opr->is_valid(), "exception oop"); do_input(op1->_opr); |
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707 assert(op1->_result->is_illegal(), "no result"); |
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708 |
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709 break; |
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710 } |
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711 |
0 | 712 |
713 case lir_tan: | |
714 case lir_sin: | |
953
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715 case lir_cos: |
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716 case lir_log: |
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717 case lir_log10: |
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718 case lir_exp: { |
0 | 719 assert(op->as_Op2() != NULL, "must be"); |
720 LIR_Op2* op2 = (LIR_Op2*)op; | |
721 | |
953
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722 // On x86 tan/sin/cos need two temporary fpu stack slots and |
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723 // log/log10 need one so handle opr2 and tmp as temp inputs. |
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724 // Register input operand as temp to guarantee that it doesn't |
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725 // overlap with the input. |
0 | 726 assert(op2->_info == NULL, "not used"); |
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727 assert(op2->_tmp5->is_illegal(), "not used"); |
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728 assert(op2->_tmp2->is_valid() == (op->code() == lir_exp), "not used"); |
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729 assert(op2->_tmp3->is_valid() == (op->code() == lir_exp), "not used"); |
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730 assert(op2->_tmp4->is_valid() == (op->code() == lir_exp), "not used"); |
0 | 731 assert(op2->_opr1->is_valid(), "used"); |
732 do_input(op2->_opr1); do_temp(op2->_opr1); | |
733 | |
734 if (op2->_opr2->is_valid()) do_temp(op2->_opr2); | |
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735 if (op2->_tmp1->is_valid()) do_temp(op2->_tmp1); |
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736 if (op2->_tmp2->is_valid()) do_temp(op2->_tmp2); |
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737 if (op2->_tmp3->is_valid()) do_temp(op2->_tmp3); |
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738 if (op2->_tmp4->is_valid()) do_temp(op2->_tmp4); |
0 | 739 if (op2->_result->is_valid()) do_output(op2->_result); |
740 | |
741 break; | |
742 } | |
743 | |
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744 case lir_pow: { |
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745 assert(op->as_Op2() != NULL, "must be"); |
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746 LIR_Op2* op2 = (LIR_Op2*)op; |
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747 |
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748 // On x86 pow needs two temporary fpu stack slots: tmp1 and |
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749 // tmp2. Register input operands as temps to guarantee that it |
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750 // doesn't overlap with the temporary slots. |
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751 assert(op2->_info == NULL, "not used"); |
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752 assert(op2->_opr1->is_valid() && op2->_opr2->is_valid(), "used"); |
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753 assert(op2->_tmp1->is_valid() && op2->_tmp2->is_valid() && op2->_tmp3->is_valid() |
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754 && op2->_tmp4->is_valid() && op2->_tmp5->is_valid(), "used"); |
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755 assert(op2->_result->is_valid(), "used"); |
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756 |
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757 do_input(op2->_opr1); do_temp(op2->_opr1); |
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758 do_input(op2->_opr2); do_temp(op2->_opr2); |
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759 do_temp(op2->_tmp1); |
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760 do_temp(op2->_tmp2); |
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761 do_temp(op2->_tmp3); |
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762 do_temp(op2->_tmp4); |
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763 do_temp(op2->_tmp5); |
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764 do_output(op2->_result); |
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765 |
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766 break; |
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767 } |
0 | 768 |
769 // LIR_Op3 | |
770 case lir_idiv: | |
771 case lir_irem: { | |
772 assert(op->as_Op3() != NULL, "must be"); | |
773 LIR_Op3* op3= (LIR_Op3*)op; | |
774 | |
775 if (op3->_info) do_info(op3->_info); | |
776 if (op3->_opr1->is_valid()) do_input(op3->_opr1); | |
777 | |
778 // second operand is input and temp, so ensure that second operand | |
779 // and third operand get not the same register | |
780 if (op3->_opr2->is_valid()) do_input(op3->_opr2); | |
781 if (op3->_opr2->is_valid()) do_temp(op3->_opr2); | |
782 if (op3->_opr3->is_valid()) do_temp(op3->_opr3); | |
783 | |
784 if (op3->_result->is_valid()) do_output(op3->_result); | |
785 | |
786 break; | |
787 } | |
788 | |
789 | |
790 // LIR_OpJavaCall | |
791 case lir_static_call: | |
792 case lir_optvirtual_call: | |
793 case lir_icvirtual_call: | |
1295 | 794 case lir_virtual_call: |
795 case lir_dynamic_call: { | |
796 LIR_OpJavaCall* opJavaCall = op->as_OpJavaCall(); | |
797 assert(opJavaCall != NULL, "must be"); | |
0 | 798 |
799 if (opJavaCall->_receiver->is_valid()) do_input(opJavaCall->_receiver); | |
800 | |
801 // only visit register parameters | |
802 int n = opJavaCall->_arguments->length(); | |
803 for (int i = 0; i < n; i++) { | |
804 if (!opJavaCall->_arguments->at(i)->is_pointer()) { | |
805 do_input(*opJavaCall->_arguments->adr_at(i)); | |
806 } | |
807 } | |
808 | |
809 if (opJavaCall->_info) do_info(opJavaCall->_info); | |
1564 | 810 if (opJavaCall->is_method_handle_invoke()) { |
811 opJavaCall->_method_handle_invoke_SP_save_opr = FrameMap::method_handle_invoke_SP_save_opr(); | |
812 do_temp(opJavaCall->_method_handle_invoke_SP_save_opr); | |
813 } | |
0 | 814 do_call(); |
815 if (opJavaCall->_result->is_valid()) do_output(opJavaCall->_result); | |
816 | |
817 break; | |
818 } | |
819 | |
820 | |
821 // LIR_OpRTCall | |
822 case lir_rtcall: { | |
823 assert(op->as_OpRTCall() != NULL, "must be"); | |
824 LIR_OpRTCall* opRTCall = (LIR_OpRTCall*)op; | |
825 | |
826 // only visit register parameters | |
827 int n = opRTCall->_arguments->length(); | |
828 for (int i = 0; i < n; i++) { | |
829 if (!opRTCall->_arguments->at(i)->is_pointer()) { | |
830 do_input(*opRTCall->_arguments->adr_at(i)); | |
831 } | |
832 } | |
833 if (opRTCall->_info) do_info(opRTCall->_info); | |
834 if (opRTCall->_tmp->is_valid()) do_temp(opRTCall->_tmp); | |
835 do_call(); | |
836 if (opRTCall->_result->is_valid()) do_output(opRTCall->_result); | |
837 | |
838 break; | |
839 } | |
840 | |
841 | |
842 // LIR_OpArrayCopy | |
843 case lir_arraycopy: { | |
844 assert(op->as_OpArrayCopy() != NULL, "must be"); | |
845 LIR_OpArrayCopy* opArrayCopy = (LIR_OpArrayCopy*)op; | |
846 | |
847 assert(opArrayCopy->_result->is_illegal(), "unused"); | |
848 assert(opArrayCopy->_src->is_valid(), "used"); do_input(opArrayCopy->_src); do_temp(opArrayCopy->_src); | |
849 assert(opArrayCopy->_src_pos->is_valid(), "used"); do_input(opArrayCopy->_src_pos); do_temp(opArrayCopy->_src_pos); | |
850 assert(opArrayCopy->_dst->is_valid(), "used"); do_input(opArrayCopy->_dst); do_temp(opArrayCopy->_dst); | |
851 assert(opArrayCopy->_dst_pos->is_valid(), "used"); do_input(opArrayCopy->_dst_pos); do_temp(opArrayCopy->_dst_pos); | |
852 assert(opArrayCopy->_length->is_valid(), "used"); do_input(opArrayCopy->_length); do_temp(opArrayCopy->_length); | |
853 assert(opArrayCopy->_tmp->is_valid(), "used"); do_temp(opArrayCopy->_tmp); | |
854 if (opArrayCopy->_info) do_info(opArrayCopy->_info); | |
855 | |
856 // the implementation of arraycopy always has a call into the runtime | |
857 do_call(); | |
858 | |
859 break; | |
860 } | |
861 | |
862 | |
863 // LIR_OpLock | |
864 case lir_lock: | |
865 case lir_unlock: { | |
866 assert(op->as_OpLock() != NULL, "must be"); | |
867 LIR_OpLock* opLock = (LIR_OpLock*)op; | |
868 | |
869 if (opLock->_info) do_info(opLock->_info); | |
870 | |
871 // TODO: check if these operands really have to be temp | |
872 // (or if input is sufficient). This may have influence on the oop map! | |
873 assert(opLock->_lock->is_valid(), "used"); do_temp(opLock->_lock); | |
874 assert(opLock->_hdr->is_valid(), "used"); do_temp(opLock->_hdr); | |
875 assert(opLock->_obj->is_valid(), "used"); do_temp(opLock->_obj); | |
876 | |
877 if (opLock->_scratch->is_valid()) do_temp(opLock->_scratch); | |
878 assert(opLock->_result->is_illegal(), "unused"); | |
879 | |
880 do_stub(opLock->_stub); | |
881 | |
882 break; | |
883 } | |
884 | |
885 | |
886 // LIR_OpDelay | |
887 case lir_delay_slot: { | |
888 assert(op->as_OpDelay() != NULL, "must be"); | |
889 LIR_OpDelay* opDelay = (LIR_OpDelay*)op; | |
890 | |
891 visit(opDelay->delay_op()); | |
892 break; | |
893 } | |
894 | |
895 // LIR_OpTypeCheck | |
896 case lir_instanceof: | |
897 case lir_checkcast: | |
898 case lir_store_check: { | |
899 assert(op->as_OpTypeCheck() != NULL, "must be"); | |
900 LIR_OpTypeCheck* opTypeCheck = (LIR_OpTypeCheck*)op; | |
901 | |
902 if (opTypeCheck->_info_for_exception) do_info(opTypeCheck->_info_for_exception); | |
903 if (opTypeCheck->_info_for_patch) do_info(opTypeCheck->_info_for_patch); | |
904 if (opTypeCheck->_object->is_valid()) do_input(opTypeCheck->_object); | |
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905 if (op->code() == lir_store_check && opTypeCheck->_object->is_valid()) { |
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906 do_temp(opTypeCheck->_object); |
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907 } |
0 | 908 if (opTypeCheck->_array->is_valid()) do_input(opTypeCheck->_array); |
909 if (opTypeCheck->_tmp1->is_valid()) do_temp(opTypeCheck->_tmp1); | |
910 if (opTypeCheck->_tmp2->is_valid()) do_temp(opTypeCheck->_tmp2); | |
911 if (opTypeCheck->_tmp3->is_valid()) do_temp(opTypeCheck->_tmp3); | |
912 if (opTypeCheck->_result->is_valid()) do_output(opTypeCheck->_result); | |
913 do_stub(opTypeCheck->_stub); | |
914 break; | |
915 } | |
916 | |
917 // LIR_OpCompareAndSwap | |
918 case lir_cas_long: | |
919 case lir_cas_obj: | |
920 case lir_cas_int: { | |
921 assert(op->as_OpCompareAndSwap() != NULL, "must be"); | |
922 LIR_OpCompareAndSwap* opCompareAndSwap = (LIR_OpCompareAndSwap*)op; | |
923 | |
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924 assert(opCompareAndSwap->_addr->is_valid(), "used"); |
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925 assert(opCompareAndSwap->_cmp_value->is_valid(), "used"); |
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926 assert(opCompareAndSwap->_new_value->is_valid(), "used"); |
0 | 927 if (opCompareAndSwap->_info) do_info(opCompareAndSwap->_info); |
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928 do_input(opCompareAndSwap->_addr); |
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929 do_temp(opCompareAndSwap->_addr); |
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930 do_input(opCompareAndSwap->_cmp_value); |
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931 do_temp(opCompareAndSwap->_cmp_value); |
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932 do_input(opCompareAndSwap->_new_value); |
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933 do_temp(opCompareAndSwap->_new_value); |
0 | 934 if (opCompareAndSwap->_tmp1->is_valid()) do_temp(opCompareAndSwap->_tmp1); |
935 if (opCompareAndSwap->_tmp2->is_valid()) do_temp(opCompareAndSwap->_tmp2); | |
936 if (opCompareAndSwap->_result->is_valid()) do_output(opCompareAndSwap->_result); | |
937 | |
938 break; | |
939 } | |
940 | |
941 | |
942 // LIR_OpAllocArray; | |
943 case lir_alloc_array: { | |
944 assert(op->as_OpAllocArray() != NULL, "must be"); | |
945 LIR_OpAllocArray* opAllocArray = (LIR_OpAllocArray*)op; | |
946 | |
947 if (opAllocArray->_info) do_info(opAllocArray->_info); | |
948 if (opAllocArray->_klass->is_valid()) do_input(opAllocArray->_klass); do_temp(opAllocArray->_klass); | |
949 if (opAllocArray->_len->is_valid()) do_input(opAllocArray->_len); do_temp(opAllocArray->_len); | |
950 if (opAllocArray->_tmp1->is_valid()) do_temp(opAllocArray->_tmp1); | |
951 if (opAllocArray->_tmp2->is_valid()) do_temp(opAllocArray->_tmp2); | |
952 if (opAllocArray->_tmp3->is_valid()) do_temp(opAllocArray->_tmp3); | |
953 if (opAllocArray->_tmp4->is_valid()) do_temp(opAllocArray->_tmp4); | |
954 if (opAllocArray->_result->is_valid()) do_output(opAllocArray->_result); | |
955 do_stub(opAllocArray->_stub); | |
956 break; | |
957 } | |
958 | |
959 // LIR_OpProfileCall: | |
960 case lir_profile_call: { | |
961 assert(op->as_OpProfileCall() != NULL, "must be"); | |
962 LIR_OpProfileCall* opProfileCall = (LIR_OpProfileCall*)op; | |
963 | |
964 if (opProfileCall->_recv->is_valid()) do_temp(opProfileCall->_recv); | |
965 assert(opProfileCall->_mdo->is_valid(), "used"); do_temp(opProfileCall->_mdo); | |
966 assert(opProfileCall->_tmp1->is_valid(), "used"); do_temp(opProfileCall->_tmp1); | |
967 break; | |
968 } | |
969 default: | |
970 ShouldNotReachHere(); | |
971 } | |
972 } | |
973 | |
974 | |
975 void LIR_OpVisitState::do_stub(CodeStub* stub) { | |
976 if (stub != NULL) { | |
977 stub->visit(this); | |
978 } | |
979 } | |
980 | |
981 XHandlers* LIR_OpVisitState::all_xhandler() { | |
982 XHandlers* result = NULL; | |
983 | |
984 int i; | |
985 for (i = 0; i < info_count(); i++) { | |
986 if (info_at(i)->exception_handlers() != NULL) { | |
987 result = info_at(i)->exception_handlers(); | |
988 break; | |
989 } | |
990 } | |
991 | |
992 #ifdef ASSERT | |
993 for (i = 0; i < info_count(); i++) { | |
994 assert(info_at(i)->exception_handlers() == NULL || | |
995 info_at(i)->exception_handlers() == result, | |
996 "only one xhandler list allowed per LIR-operation"); | |
997 } | |
998 #endif | |
999 | |
1000 if (result != NULL) { | |
1001 return result; | |
1002 } else { | |
1003 return new XHandlers(); | |
1004 } | |
1005 | |
1006 return result; | |
1007 } | |
1008 | |
1009 | |
1010 #ifdef ASSERT | |
1011 bool LIR_OpVisitState::no_operands(LIR_Op* op) { | |
1012 visit(op); | |
1013 | |
1014 return opr_count(inputMode) == 0 && | |
1015 opr_count(outputMode) == 0 && | |
1016 opr_count(tempMode) == 0 && | |
1017 info_count() == 0 && | |
1018 !has_call() && | |
1019 !has_slow_case(); | |
1020 } | |
1021 #endif | |
1022 | |
1023 //--------------------------------------------------- | |
1024 | |
1025 | |
1026 void LIR_OpJavaCall::emit_code(LIR_Assembler* masm) { | |
1027 masm->emit_call(this); | |
1028 } | |
1029 | |
1030 void LIR_OpRTCall::emit_code(LIR_Assembler* masm) { | |
1031 masm->emit_rtcall(this); | |
1032 } | |
1033 | |
1034 void LIR_OpLabel::emit_code(LIR_Assembler* masm) { | |
1035 masm->emit_opLabel(this); | |
1036 } | |
1037 | |
1038 void LIR_OpArrayCopy::emit_code(LIR_Assembler* masm) { | |
1039 masm->emit_arraycopy(this); | |
1040 masm->emit_code_stub(stub()); | |
1041 } | |
1042 | |
1043 void LIR_Op0::emit_code(LIR_Assembler* masm) { | |
1044 masm->emit_op0(this); | |
1045 } | |
1046 | |
1047 void LIR_Op1::emit_code(LIR_Assembler* masm) { | |
1048 masm->emit_op1(this); | |
1049 } | |
1050 | |
1051 void LIR_OpAllocObj::emit_code(LIR_Assembler* masm) { | |
1052 masm->emit_alloc_obj(this); | |
1053 masm->emit_code_stub(stub()); | |
1054 } | |
1055 | |
1056 void LIR_OpBranch::emit_code(LIR_Assembler* masm) { | |
1057 masm->emit_opBranch(this); | |
1058 if (stub()) { | |
1059 masm->emit_code_stub(stub()); | |
1060 } | |
1061 } | |
1062 | |
1063 void LIR_OpConvert::emit_code(LIR_Assembler* masm) { | |
1064 masm->emit_opConvert(this); | |
1065 if (stub() != NULL) { | |
1066 masm->emit_code_stub(stub()); | |
1067 } | |
1068 } | |
1069 | |
1070 void LIR_Op2::emit_code(LIR_Assembler* masm) { | |
1071 masm->emit_op2(this); | |
1072 } | |
1073 | |
1074 void LIR_OpAllocArray::emit_code(LIR_Assembler* masm) { | |
1075 masm->emit_alloc_array(this); | |
1076 masm->emit_code_stub(stub()); | |
1077 } | |
1078 | |
1079 void LIR_OpTypeCheck::emit_code(LIR_Assembler* masm) { | |
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1080 masm->emit_opTypeCheck(this); |
0 | 1081 if (stub()) { |
1082 masm->emit_code_stub(stub()); | |
1083 } | |
1084 } | |
1085 | |
1086 void LIR_OpCompareAndSwap::emit_code(LIR_Assembler* masm) { | |
1087 masm->emit_compare_and_swap(this); | |
1088 } | |
1089 | |
1090 void LIR_Op3::emit_code(LIR_Assembler* masm) { | |
1091 masm->emit_op3(this); | |
1092 } | |
1093 | |
1094 void LIR_OpLock::emit_code(LIR_Assembler* masm) { | |
1095 masm->emit_lock(this); | |
1096 if (stub()) { | |
1097 masm->emit_code_stub(stub()); | |
1098 } | |
1099 } | |
1100 | |
1101 | |
1102 void LIR_OpDelay::emit_code(LIR_Assembler* masm) { | |
1103 masm->emit_delay(this); | |
1104 } | |
1105 | |
1106 void LIR_OpProfileCall::emit_code(LIR_Assembler* masm) { | |
1107 masm->emit_profile_call(this); | |
1108 } | |
1109 | |
1110 // LIR_List | |
1111 LIR_List::LIR_List(Compilation* compilation, BlockBegin* block) | |
1112 : _operations(8) | |
1113 , _compilation(compilation) | |
1114 #ifndef PRODUCT | |
1115 , _block(block) | |
1116 #endif | |
1117 #ifdef ASSERT | |
1118 , _file(NULL) | |
1119 , _line(0) | |
1120 #endif | |
1121 { } | |
1122 | |
1123 | |
1124 #ifdef ASSERT | |
1125 void LIR_List::set_file_and_line(const char * file, int line) { | |
1126 const char * f = strrchr(file, '/'); | |
1127 if (f == NULL) f = strrchr(file, '\\'); | |
1128 if (f == NULL) { | |
1129 f = file; | |
1130 } else { | |
1131 f++; | |
1132 } | |
1133 _file = f; | |
1134 _line = line; | |
1135 } | |
1136 #endif | |
1137 | |
1138 | |
1139 void LIR_List::append(LIR_InsertionBuffer* buffer) { | |
1140 assert(this == buffer->lir_list(), "wrong lir list"); | |
1141 const int n = _operations.length(); | |
1142 | |
1143 if (buffer->number_of_ops() > 0) { | |
1144 // increase size of instructions list | |
1145 _operations.at_grow(n + buffer->number_of_ops() - 1, NULL); | |
1146 // insert ops from buffer into instructions list | |
1147 int op_index = buffer->number_of_ops() - 1; | |
1148 int ip_index = buffer->number_of_insertion_points() - 1; | |
1149 int from_index = n - 1; | |
1150 int to_index = _operations.length() - 1; | |
1151 for (; ip_index >= 0; ip_index --) { | |
1152 int index = buffer->index_at(ip_index); | |
1153 // make room after insertion point | |
1154 while (index < from_index) { | |
1155 _operations.at_put(to_index --, _operations.at(from_index --)); | |
1156 } | |
1157 // insert ops from buffer | |
1158 for (int i = buffer->count_at(ip_index); i > 0; i --) { | |
1159 _operations.at_put(to_index --, buffer->op_at(op_index --)); | |
1160 } | |
1161 } | |
1162 } | |
1163 | |
1164 buffer->finish(); | |
1165 } | |
1166 | |
1167 | |
1168 void LIR_List::oop2reg_patch(jobject o, LIR_Opr reg, CodeEmitInfo* info) { | |
1169 append(new LIR_Op1(lir_move, LIR_OprFact::oopConst(o), reg, T_OBJECT, lir_patch_normal, info)); | |
1170 } | |
1171 | |
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1172 void LIR_List::klass2reg_patch(Metadata* o, LIR_Opr reg, CodeEmitInfo* info) { |
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1173 append(new LIR_Op1(lir_move, LIR_OprFact::metadataConst(o), reg, T_METADATA, lir_patch_normal, info)); |
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1174 } |
0 | 1175 |
1176 void LIR_List::load(LIR_Address* addr, LIR_Opr src, CodeEmitInfo* info, LIR_PatchCode patch_code) { | |
1177 append(new LIR_Op1( | |
1178 lir_move, | |
1179 LIR_OprFact::address(addr), | |
1180 src, | |
1181 addr->type(), | |
1182 patch_code, | |
1183 info)); | |
1184 } | |
1185 | |
1186 | |
1187 void LIR_List::volatile_load_mem_reg(LIR_Address* address, LIR_Opr dst, CodeEmitInfo* info, LIR_PatchCode patch_code) { | |
1188 append(new LIR_Op1( | |
1189 lir_move, | |
1190 LIR_OprFact::address(address), | |
1191 dst, | |
1192 address->type(), | |
1193 patch_code, | |
1194 info, lir_move_volatile)); | |
1195 } | |
1196 | |
1197 void LIR_List::volatile_load_unsafe_reg(LIR_Opr base, LIR_Opr offset, LIR_Opr dst, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) { | |
1198 append(new LIR_Op1( | |
1199 lir_move, | |
1200 LIR_OprFact::address(new LIR_Address(base, offset, type)), | |
1201 dst, | |
1202 type, | |
1203 patch_code, | |
1204 info, lir_move_volatile)); | |
1205 } | |
1206 | |
1207 | |
1208 void LIR_List::prefetch(LIR_Address* addr, bool is_store) { | |
1209 append(new LIR_Op1( | |
1210 is_store ? lir_prefetchw : lir_prefetchr, | |
1211 LIR_OprFact::address(addr))); | |
1212 } | |
1213 | |
1214 | |
1215 void LIR_List::store_mem_int(jint v, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) { | |
1216 append(new LIR_Op1( | |
1217 lir_move, | |
1218 LIR_OprFact::intConst(v), | |
1219 LIR_OprFact::address(new LIR_Address(base, offset_in_bytes, type)), | |
1220 type, | |
1221 patch_code, | |
1222 info)); | |
1223 } | |
1224 | |
1225 | |
1226 void LIR_List::store_mem_oop(jobject o, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) { | |
1227 append(new LIR_Op1( | |
1228 lir_move, | |
1229 LIR_OprFact::oopConst(o), | |
1230 LIR_OprFact::address(new LIR_Address(base, offset_in_bytes, type)), | |
1231 type, | |
1232 patch_code, | |
1233 info)); | |
1234 } | |
1235 | |
1236 | |
1237 void LIR_List::store(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info, LIR_PatchCode patch_code) { | |
1238 append(new LIR_Op1( | |
1239 lir_move, | |
1240 src, | |
1241 LIR_OprFact::address(addr), | |
1242 addr->type(), | |
1243 patch_code, | |
1244 info)); | |
1245 } | |
1246 | |
1247 | |
1248 void LIR_List::volatile_store_mem_reg(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info, LIR_PatchCode patch_code) { | |
1249 append(new LIR_Op1( | |
1250 lir_move, | |
1251 src, | |
1252 LIR_OprFact::address(addr), | |
1253 addr->type(), | |
1254 patch_code, | |
1255 info, | |
1256 lir_move_volatile)); | |
1257 } | |
1258 | |
1259 void LIR_List::volatile_store_unsafe_reg(LIR_Opr src, LIR_Opr base, LIR_Opr offset, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) { | |
1260 append(new LIR_Op1( | |
1261 lir_move, | |
1262 src, | |
1263 LIR_OprFact::address(new LIR_Address(base, offset, type)), | |
1264 type, | |
1265 patch_code, | |
1266 info, lir_move_volatile)); | |
1267 } | |
1268 | |
1269 | |
1270 void LIR_List::idiv(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) { | |
1271 append(new LIR_Op3( | |
1272 lir_idiv, | |
1273 left, | |
1274 right, | |
1275 tmp, | |
1276 res, | |
1277 info)); | |
1278 } | |
1279 | |
1280 | |
1281 void LIR_List::idiv(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) { | |
1282 append(new LIR_Op3( | |
1283 lir_idiv, | |
1284 left, | |
1285 LIR_OprFact::intConst(right), | |
1286 tmp, | |
1287 res, | |
1288 info)); | |
1289 } | |
1290 | |
1291 | |
1292 void LIR_List::irem(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) { | |
1293 append(new LIR_Op3( | |
1294 lir_irem, | |
1295 left, | |
1296 right, | |
1297 tmp, | |
1298 res, | |
1299 info)); | |
1300 } | |
1301 | |
1302 | |
1303 void LIR_List::irem(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) { | |
1304 append(new LIR_Op3( | |
1305 lir_irem, | |
1306 left, | |
1307 LIR_OprFact::intConst(right), | |
1308 tmp, | |
1309 res, | |
1310 info)); | |
1311 } | |
1312 | |
1313 | |
1314 void LIR_List::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) { | |
1315 append(new LIR_Op2( | |
1316 lir_cmp, | |
1317 condition, | |
1318 LIR_OprFact::address(new LIR_Address(base, disp, T_INT)), | |
1319 LIR_OprFact::intConst(c), | |
1320 info)); | |
1321 } | |
1322 | |
1323 | |
1324 void LIR_List::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Address* addr, CodeEmitInfo* info) { | |
1325 append(new LIR_Op2( | |
1326 lir_cmp, | |
1327 condition, | |
1328 reg, | |
1329 LIR_OprFact::address(addr), | |
1330 info)); | |
1331 } | |
1332 | |
1333 void LIR_List::allocate_object(LIR_Opr dst, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, | |
1334 int header_size, int object_size, LIR_Opr klass, bool init_check, CodeStub* stub) { | |
1335 append(new LIR_OpAllocObj( | |
1336 klass, | |
1337 dst, | |
1338 t1, | |
1339 t2, | |
1340 t3, | |
1341 t4, | |
1342 header_size, | |
1343 object_size, | |
1344 init_check, | |
1345 stub)); | |
1346 } | |
1347 | |
1348 void LIR_List::allocate_array(LIR_Opr dst, LIR_Opr len, LIR_Opr t1,LIR_Opr t2, LIR_Opr t3,LIR_Opr t4, BasicType type, LIR_Opr klass, CodeStub* stub) { | |
1349 append(new LIR_OpAllocArray( | |
1350 klass, | |
1351 len, | |
1352 dst, | |
1353 t1, | |
1354 t2, | |
1355 t3, | |
1356 t4, | |
1357 type, | |
1358 stub)); | |
1359 } | |
1360 | |
1361 void LIR_List::shift_left(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) { | |
1362 append(new LIR_Op2( | |
1363 lir_shl, | |
1364 value, | |
1365 count, | |
1366 dst, | |
1367 tmp)); | |
1368 } | |
1369 | |
1370 void LIR_List::shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) { | |
1371 append(new LIR_Op2( | |
1372 lir_shr, | |
1373 value, | |
1374 count, | |
1375 dst, | |
1376 tmp)); | |
1377 } | |
1378 | |
1379 | |
1380 void LIR_List::unsigned_shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) { | |
1381 append(new LIR_Op2( | |
1382 lir_ushr, | |
1383 value, | |
1384 count, | |
1385 dst, | |
1386 tmp)); | |
1387 } | |
1388 | |
1389 void LIR_List::fcmp2int(LIR_Opr left, LIR_Opr right, LIR_Opr dst, bool is_unordered_less) { | |
1390 append(new LIR_Op2(is_unordered_less ? lir_ucmp_fd2i : lir_cmp_fd2i, | |
1391 left, | |
1392 right, | |
1393 dst)); | |
1394 } | |
1395 | |
1396 void LIR_List::lock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub, CodeEmitInfo* info) { | |
1397 append(new LIR_OpLock( | |
1398 lir_lock, | |
1399 hdr, | |
1400 obj, | |
1401 lock, | |
1402 scratch, | |
1403 stub, | |
1404 info)); | |
1405 } | |
1406 | |
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1407 void LIR_List::unlock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub) { |
0 | 1408 append(new LIR_OpLock( |
1409 lir_unlock, | |
1410 hdr, | |
1411 obj, | |
1412 lock, | |
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1413 scratch, |
0 | 1414 stub, |
1415 NULL)); | |
1416 } | |
1417 | |
1418 | |
1419 void check_LIR() { | |
1420 // cannot do the proper checking as PRODUCT and other modes return different results | |
1421 // guarantee(sizeof(LIR_OprDesc) == wordSize, "may not have a v-table"); | |
1422 } | |
1423 | |
1424 | |
1425 | |
1426 void LIR_List::checkcast (LIR_Opr result, LIR_Opr object, ciKlass* klass, | |
1427 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check, | |
1428 CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, CodeStub* stub, | |
1429 ciMethod* profiled_method, int profiled_bci) { | |
1783 | 1430 LIR_OpTypeCheck* c = new LIR_OpTypeCheck(lir_checkcast, result, object, klass, |
1431 tmp1, tmp2, tmp3, fast_check, info_for_exception, info_for_patch, stub); | |
1432 if (profiled_method != NULL) { | |
1433 c->set_profiled_method(profiled_method); | |
1434 c->set_profiled_bci(profiled_bci); | |
1435 c->set_should_profile(true); | |
1436 } | |
1437 append(c); | |
0 | 1438 } |
1439 | |
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1440 void LIR_List::instanceof(LIR_Opr result, LIR_Opr object, ciKlass* klass, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check, CodeEmitInfo* info_for_patch, ciMethod* profiled_method, int profiled_bci) { |
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1441 LIR_OpTypeCheck* c = new LIR_OpTypeCheck(lir_instanceof, result, object, klass, tmp1, tmp2, tmp3, fast_check, NULL, info_for_patch, NULL); |
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1442 if (profiled_method != NULL) { |
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1443 c->set_profiled_method(profiled_method); |
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1444 c->set_profiled_bci(profiled_bci); |
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1445 c->set_should_profile(true); |
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1446 } |
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1447 append(c); |
0 | 1448 } |
1449 | |
1450 | |
3957 | 1451 void LIR_List::store_check(LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, |
1452 CodeEmitInfo* info_for_exception, ciMethod* profiled_method, int profiled_bci) { | |
1453 LIR_OpTypeCheck* c = new LIR_OpTypeCheck(lir_store_check, object, array, tmp1, tmp2, tmp3, info_for_exception); | |
1454 if (profiled_method != NULL) { | |
1455 c->set_profiled_method(profiled_method); | |
1456 c->set_profiled_bci(profiled_bci); | |
1457 c->set_should_profile(true); | |
1458 } | |
1459 append(c); | |
0 | 1460 } |
1461 | |
1462 | |
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1463 void LIR_List::cas_long(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, |
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1464 LIR_Opr t1, LIR_Opr t2, LIR_Opr result) { |
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1465 append(new LIR_OpCompareAndSwap(lir_cas_long, addr, cmp_value, new_value, t1, t2, result)); |
0 | 1466 } |
1467 | |
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1468 void LIR_List::cas_obj(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, |
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1469 LIR_Opr t1, LIR_Opr t2, LIR_Opr result) { |
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1470 append(new LIR_OpCompareAndSwap(lir_cas_obj, addr, cmp_value, new_value, t1, t2, result)); |
0 | 1471 } |
1472 | |
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1473 void LIR_List::cas_int(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, |
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1474 LIR_Opr t1, LIR_Opr t2, LIR_Opr result) { |
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1475 append(new LIR_OpCompareAndSwap(lir_cas_int, addr, cmp_value, new_value, t1, t2, result)); |
0 | 1476 } |
1477 | |
1478 | |
1479 #ifdef PRODUCT | |
1480 | |
1481 void print_LIR(BlockList* blocks) { | |
1482 } | |
1483 | |
1484 #else | |
1485 // LIR_OprDesc | |
1486 void LIR_OprDesc::print() const { | |
1487 print(tty); | |
1488 } | |
1489 | |
1490 void LIR_OprDesc::print(outputStream* out) const { | |
1491 if (is_illegal()) { | |
1492 return; | |
1493 } | |
1494 | |
1495 out->print("["); | |
1496 if (is_pointer()) { | |
1497 pointer()->print_value_on(out); | |
1498 } else if (is_single_stack()) { | |
1499 out->print("stack:%d", single_stack_ix()); | |
1500 } else if (is_double_stack()) { | |
1501 out->print("dbl_stack:%d",double_stack_ix()); | |
1502 } else if (is_virtual()) { | |
1503 out->print("R%d", vreg_number()); | |
1504 } else if (is_single_cpu()) { | |
1505 out->print(as_register()->name()); | |
1506 } else if (is_double_cpu()) { | |
1507 out->print(as_register_hi()->name()); | |
1508 out->print(as_register_lo()->name()); | |
304 | 1509 #if defined(X86) |
0 | 1510 } else if (is_single_xmm()) { |
1511 out->print(as_xmm_float_reg()->name()); | |
1512 } else if (is_double_xmm()) { | |
1513 out->print(as_xmm_double_reg()->name()); | |
1514 } else if (is_single_fpu()) { | |
1515 out->print("fpu%d", fpu_regnr()); | |
1516 } else if (is_double_fpu()) { | |
1517 out->print("fpu%d", fpu_regnrLo()); | |
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1518 #elif defined(ARM) |
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1519 } else if (is_single_fpu()) { |
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1520 out->print("s%d", fpu_regnr()); |
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1521 } else if (is_double_fpu()) { |
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1522 out->print("d%d", fpu_regnrLo() >> 1); |
0 | 1523 #else |
1524 } else if (is_single_fpu()) { | |
1525 out->print(as_float_reg()->name()); | |
1526 } else if (is_double_fpu()) { | |
1527 out->print(as_double_reg()->name()); | |
1528 #endif | |
1529 | |
1530 } else if (is_illegal()) { | |
1531 out->print("-"); | |
1532 } else { | |
1533 out->print("Unknown Operand"); | |
1534 } | |
1535 if (!is_illegal()) { | |
1536 out->print("|%c", type_char()); | |
1537 } | |
1538 if (is_register() && is_last_use()) { | |
1539 out->print("(last_use)"); | |
1540 } | |
1541 out->print("]"); | |
1542 } | |
1543 | |
1544 | |
1545 // LIR_Address | |
1546 void LIR_Const::print_value_on(outputStream* out) const { | |
1547 switch (type()) { | |
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1548 case T_ADDRESS:out->print("address:%d",as_jint()); break; |
0 | 1549 case T_INT: out->print("int:%d", as_jint()); break; |
1550 case T_LONG: out->print("lng:%lld", as_jlong()); break; | |
1551 case T_FLOAT: out->print("flt:%f", as_jfloat()); break; | |
1552 case T_DOUBLE: out->print("dbl:%f", as_jdouble()); break; | |
1553 case T_OBJECT: out->print("obj:0x%x", as_jobject()); break; | |
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1554 case T_METADATA: out->print("metadata:0x%x", as_metadata());break; |
0 | 1555 default: out->print("%3d:0x%x",type(), as_jdouble()); break; |
1556 } | |
1557 } | |
1558 | |
1559 // LIR_Address | |
1560 void LIR_Address::print_value_on(outputStream* out) const { | |
1561 out->print("Base:"); _base->print(out); | |
1562 if (!_index->is_illegal()) { | |
1563 out->print(" Index:"); _index->print(out); | |
1564 switch (scale()) { | |
1565 case times_1: break; | |
1566 case times_2: out->print(" * 2"); break; | |
1567 case times_4: out->print(" * 4"); break; | |
1568 case times_8: out->print(" * 8"); break; | |
1569 } | |
1570 } | |
1571 out->print(" Disp: %d", _disp); | |
1572 } | |
1573 | |
1574 // debug output of block header without InstructionPrinter | |
1575 // (because phi functions are not necessary for LIR) | |
1576 static void print_block(BlockBegin* x) { | |
1577 // print block id | |
1578 BlockEnd* end = x->end(); | |
1579 tty->print("B%d ", x->block_id()); | |
1580 | |
1581 // print flags | |
1582 if (x->is_set(BlockBegin::std_entry_flag)) tty->print("std "); | |
1583 if (x->is_set(BlockBegin::osr_entry_flag)) tty->print("osr "); | |
1584 if (x->is_set(BlockBegin::exception_entry_flag)) tty->print("ex "); | |
1585 if (x->is_set(BlockBegin::subroutine_entry_flag)) tty->print("jsr "); | |
1586 if (x->is_set(BlockBegin::backward_branch_target_flag)) tty->print("bb "); | |
1587 if (x->is_set(BlockBegin::linear_scan_loop_header_flag)) tty->print("lh "); | |
1588 if (x->is_set(BlockBegin::linear_scan_loop_end_flag)) tty->print("le "); | |
1589 | |
1590 // print block bci range | |
1819 | 1591 tty->print("[%d, %d] ", x->bci(), (end == NULL ? -1 : end->printable_bci())); |
0 | 1592 |
1593 // print predecessors and successors | |
1594 if (x->number_of_preds() > 0) { | |
1595 tty->print("preds: "); | |
1596 for (int i = 0; i < x->number_of_preds(); i ++) { | |
1597 tty->print("B%d ", x->pred_at(i)->block_id()); | |
1598 } | |
1599 } | |
1600 | |
1601 if (x->number_of_sux() > 0) { | |
1602 tty->print("sux: "); | |
1603 for (int i = 0; i < x->number_of_sux(); i ++) { | |
1604 tty->print("B%d ", x->sux_at(i)->block_id()); | |
1605 } | |
1606 } | |
1607 | |
1608 // print exception handlers | |
1609 if (x->number_of_exception_handlers() > 0) { | |
1610 tty->print("xhandler: "); | |
1611 for (int i = 0; i < x->number_of_exception_handlers(); i++) { | |
1612 tty->print("B%d ", x->exception_handler_at(i)->block_id()); | |
1613 } | |
1614 } | |
1615 | |
1616 tty->cr(); | |
1617 } | |
1618 | |
1619 void print_LIR(BlockList* blocks) { | |
1620 tty->print_cr("LIR:"); | |
1621 int i; | |
1622 for (i = 0; i < blocks->length(); i++) { | |
1623 BlockBegin* bb = blocks->at(i); | |
1624 print_block(bb); | |
1625 tty->print("__id_Instruction___________________________________________"); tty->cr(); | |
1626 bb->lir()->print_instructions(); | |
1627 } | |
1628 } | |
1629 | |
1630 void LIR_List::print_instructions() { | |
1631 for (int i = 0; i < _operations.length(); i++) { | |
1632 _operations.at(i)->print(); tty->cr(); | |
1633 } | |
1634 tty->cr(); | |
1635 } | |
1636 | |
1637 // LIR_Ops printing routines | |
1638 // LIR_Op | |
1639 void LIR_Op::print_on(outputStream* out) const { | |
1640 if (id() != -1 || PrintCFGToFile) { | |
1641 out->print("%4d ", id()); | |
1642 } else { | |
1643 out->print(" "); | |
1644 } | |
1645 out->print(name()); out->print(" "); | |
1646 print_instr(out); | |
1819 | 1647 if (info() != NULL) out->print(" [bci:%d]", info()->stack()->bci()); |
0 | 1648 #ifdef ASSERT |
1649 if (Verbose && _file != NULL) { | |
1650 out->print(" (%s:%d)", _file, _line); | |
1651 } | |
1652 #endif | |
1653 } | |
1654 | |
1655 const char * LIR_Op::name() const { | |
1656 const char* s = NULL; | |
1657 switch(code()) { | |
1658 // LIR_Op0 | |
1659 case lir_membar: s = "membar"; break; | |
1660 case lir_membar_acquire: s = "membar_acquire"; break; | |
1661 case lir_membar_release: s = "membar_release"; break; | |
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1662 case lir_membar_loadload: s = "membar_loadload"; break; |
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1663 case lir_membar_storestore: s = "membar_storestore"; break; |
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1664 case lir_membar_loadstore: s = "membar_loadstore"; break; |
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1665 case lir_membar_storeload: s = "membar_storeload"; break; |
0 | 1666 case lir_word_align: s = "word_align"; break; |
1667 case lir_label: s = "label"; break; | |
1668 case lir_nop: s = "nop"; break; | |
1669 case lir_backwardbranch_target: s = "backbranch"; break; | |
1670 case lir_std_entry: s = "std_entry"; break; | |
1671 case lir_osr_entry: s = "osr_entry"; break; | |
1672 case lir_build_frame: s = "build_frm"; break; | |
1673 case lir_fpop_raw: s = "fpop_raw"; break; | |
1674 case lir_24bit_FPU: s = "24bit_FPU"; break; | |
1675 case lir_reset_FPU: s = "reset_FPU"; break; | |
1676 case lir_breakpoint: s = "breakpoint"; break; | |
1677 case lir_get_thread: s = "get_thread"; break; | |
1678 // LIR_Op1 | |
1679 case lir_fxch: s = "fxch"; break; | |
1680 case lir_fld: s = "fld"; break; | |
1681 case lir_ffree: s = "ffree"; break; | |
1682 case lir_push: s = "push"; break; | |
1683 case lir_pop: s = "pop"; break; | |
1684 case lir_null_check: s = "null_check"; break; | |
1685 case lir_return: s = "return"; break; | |
1686 case lir_safepoint: s = "safepoint"; break; | |
1687 case lir_neg: s = "neg"; break; | |
1688 case lir_leal: s = "leal"; break; | |
1689 case lir_branch: s = "branch"; break; | |
1690 case lir_cond_float_branch: s = "flt_cond_br"; break; | |
1691 case lir_move: s = "move"; break; | |
1692 case lir_roundfp: s = "roundfp"; break; | |
1693 case lir_rtcall: s = "rtcall"; break; | |
1694 case lir_throw: s = "throw"; break; | |
1695 case lir_unwind: s = "unwind"; break; | |
1696 case lir_convert: s = "convert"; break; | |
1697 case lir_alloc_object: s = "alloc_obj"; break; | |
1698 case lir_monaddr: s = "mon_addr"; break; | |
1783 | 1699 case lir_pack64: s = "pack64"; break; |
1700 case lir_unpack64: s = "unpack64"; break; | |
0 | 1701 // LIR_Op2 |
1702 case lir_cmp: s = "cmp"; break; | |
1703 case lir_cmp_l2i: s = "cmp_l2i"; break; | |
1704 case lir_ucmp_fd2i: s = "ucomp_fd2i"; break; | |
1705 case lir_cmp_fd2i: s = "comp_fd2i"; break; | |
1706 case lir_cmove: s = "cmove"; break; | |
1707 case lir_add: s = "add"; break; | |
1708 case lir_sub: s = "sub"; break; | |
1709 case lir_mul: s = "mul"; break; | |
1710 case lir_mul_strictfp: s = "mul_strictfp"; break; | |
1711 case lir_div: s = "div"; break; | |
1712 case lir_div_strictfp: s = "div_strictfp"; break; | |
1713 case lir_rem: s = "rem"; break; | |
1714 case lir_abs: s = "abs"; break; | |
1715 case lir_sqrt: s = "sqrt"; break; | |
1716 case lir_sin: s = "sin"; break; | |
1717 case lir_cos: s = "cos"; break; | |
1718 case lir_tan: s = "tan"; break; | |
1719 case lir_log: s = "log"; break; | |
1720 case lir_log10: s = "log10"; break; | |
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1721 case lir_exp: s = "exp"; break; |
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1722 case lir_pow: s = "pow"; break; |
0 | 1723 case lir_logic_and: s = "logic_and"; break; |
1724 case lir_logic_or: s = "logic_or"; break; | |
1725 case lir_logic_xor: s = "logic_xor"; break; | |
1726 case lir_shl: s = "shift_left"; break; | |
1727 case lir_shr: s = "shift_right"; break; | |
1728 case lir_ushr: s = "ushift_right"; break; | |
1729 case lir_alloc_array: s = "alloc_array"; break; | |
1730 // LIR_Op3 | |
1731 case lir_idiv: s = "idiv"; break; | |
1732 case lir_irem: s = "irem"; break; | |
1733 // LIR_OpJavaCall | |
1734 case lir_static_call: s = "static"; break; | |
1735 case lir_optvirtual_call: s = "optvirtual"; break; | |
1736 case lir_icvirtual_call: s = "icvirtual"; break; | |
1737 case lir_virtual_call: s = "virtual"; break; | |
1295 | 1738 case lir_dynamic_call: s = "dynamic"; break; |
0 | 1739 // LIR_OpArrayCopy |
1740 case lir_arraycopy: s = "arraycopy"; break; | |
1741 // LIR_OpLock | |
1742 case lir_lock: s = "lock"; break; | |
1743 case lir_unlock: s = "unlock"; break; | |
1744 // LIR_OpDelay | |
1745 case lir_delay_slot: s = "delay"; break; | |
1746 // LIR_OpTypeCheck | |
1747 case lir_instanceof: s = "instanceof"; break; | |
1748 case lir_checkcast: s = "checkcast"; break; | |
1749 case lir_store_check: s = "store_check"; break; | |
1750 // LIR_OpCompareAndSwap | |
1751 case lir_cas_long: s = "cas_long"; break; | |
1752 case lir_cas_obj: s = "cas_obj"; break; | |
1753 case lir_cas_int: s = "cas_int"; break; | |
1754 // LIR_OpProfileCall | |
1755 case lir_profile_call: s = "profile_call"; break; | |
1756 case lir_none: ShouldNotReachHere();break; | |
1757 default: s = "illegal_op"; break; | |
1758 } | |
1759 return s; | |
1760 } | |
1761 | |
1762 // LIR_OpJavaCall | |
1763 void LIR_OpJavaCall::print_instr(outputStream* out) const { | |
1764 out->print("call: "); | |
1765 out->print("[addr: 0x%x]", address()); | |
1766 if (receiver()->is_valid()) { | |
1767 out->print(" [recv: "); receiver()->print(out); out->print("]"); | |
1768 } | |
1769 if (result_opr()->is_valid()) { | |
1770 out->print(" [result: "); result_opr()->print(out); out->print("]"); | |
1771 } | |
1772 } | |
1773 | |
1774 // LIR_OpLabel | |
1775 void LIR_OpLabel::print_instr(outputStream* out) const { | |
1776 out->print("[label:0x%x]", _label); | |
1777 } | |
1778 | |
1779 // LIR_OpArrayCopy | |
1780 void LIR_OpArrayCopy::print_instr(outputStream* out) const { | |
1781 src()->print(out); out->print(" "); | |
1782 src_pos()->print(out); out->print(" "); | |
1783 dst()->print(out); out->print(" "); | |
1784 dst_pos()->print(out); out->print(" "); | |
1785 length()->print(out); out->print(" "); | |
1786 tmp()->print(out); out->print(" "); | |
1787 } | |
1788 | |
1789 // LIR_OpCompareAndSwap | |
1790 void LIR_OpCompareAndSwap::print_instr(outputStream* out) const { | |
1791 addr()->print(out); out->print(" "); | |
1792 cmp_value()->print(out); out->print(" "); | |
1793 new_value()->print(out); out->print(" "); | |
1794 tmp1()->print(out); out->print(" "); | |
1795 tmp2()->print(out); out->print(" "); | |
1796 | |
1797 } | |
1798 | |
1799 // LIR_Op0 | |
1800 void LIR_Op0::print_instr(outputStream* out) const { | |
1801 result_opr()->print(out); | |
1802 } | |
1803 | |
1804 // LIR_Op1 | |
1805 const char * LIR_Op1::name() const { | |
1806 if (code() == lir_move) { | |
1807 switch (move_kind()) { | |
1808 case lir_move_normal: | |
1809 return "move"; | |
1810 case lir_move_unaligned: | |
1811 return "unaligned move"; | |
1812 case lir_move_volatile: | |
1813 return "volatile_move"; | |
2002 | 1814 case lir_move_wide: |
1815 return "wide_move"; | |
0 | 1816 default: |
1817 ShouldNotReachHere(); | |
1818 return "illegal_op"; | |
1819 } | |
1820 } else { | |
1821 return LIR_Op::name(); | |
1822 } | |
1823 } | |
1824 | |
1825 | |
1826 void LIR_Op1::print_instr(outputStream* out) const { | |
1827 _opr->print(out); out->print(" "); | |
1828 result_opr()->print(out); out->print(" "); | |
1829 print_patch_code(out, patch_code()); | |
1830 } | |
1831 | |
1832 | |
1833 // LIR_Op1 | |
1834 void LIR_OpRTCall::print_instr(outputStream* out) const { | |
1835 intx a = (intx)addr(); | |
1836 out->print(Runtime1::name_for_address(addr())); | |
1837 out->print(" "); | |
1838 tmp()->print(out); | |
1839 } | |
1840 | |
1841 void LIR_Op1::print_patch_code(outputStream* out, LIR_PatchCode code) { | |
1842 switch(code) { | |
1843 case lir_patch_none: break; | |
1844 case lir_patch_low: out->print("[patch_low]"); break; | |
1845 case lir_patch_high: out->print("[patch_high]"); break; | |
1846 case lir_patch_normal: out->print("[patch_normal]"); break; | |
1847 default: ShouldNotReachHere(); | |
1848 } | |
1849 } | |
1850 | |
1851 // LIR_OpBranch | |
1852 void LIR_OpBranch::print_instr(outputStream* out) const { | |
1853 print_condition(out, cond()); out->print(" "); | |
1854 if (block() != NULL) { | |
1855 out->print("[B%d] ", block()->block_id()); | |
1856 } else if (stub() != NULL) { | |
1857 out->print("["); | |
1858 stub()->print_name(out); | |
1859 out->print(": 0x%x]", stub()); | |
1819 | 1860 if (stub()->info() != NULL) out->print(" [bci:%d]", stub()->info()->stack()->bci()); |
0 | 1861 } else { |
1862 out->print("[label:0x%x] ", label()); | |
1863 } | |
1864 if (ublock() != NULL) { | |
1865 out->print("unordered: [B%d] ", ublock()->block_id()); | |
1866 } | |
1867 } | |
1868 | |
1869 void LIR_Op::print_condition(outputStream* out, LIR_Condition cond) { | |
1870 switch(cond) { | |
1871 case lir_cond_equal: out->print("[EQ]"); break; | |
1872 case lir_cond_notEqual: out->print("[NE]"); break; | |
1873 case lir_cond_less: out->print("[LT]"); break; | |
1874 case lir_cond_lessEqual: out->print("[LE]"); break; | |
1875 case lir_cond_greaterEqual: out->print("[GE]"); break; | |
1876 case lir_cond_greater: out->print("[GT]"); break; | |
1877 case lir_cond_belowEqual: out->print("[BE]"); break; | |
1878 case lir_cond_aboveEqual: out->print("[AE]"); break; | |
1879 case lir_cond_always: out->print("[AL]"); break; | |
1880 default: out->print("[%d]",cond); break; | |
1881 } | |
1882 } | |
1883 | |
1884 // LIR_OpConvert | |
1885 void LIR_OpConvert::print_instr(outputStream* out) const { | |
1886 print_bytecode(out, bytecode()); | |
1887 in_opr()->print(out); out->print(" "); | |
1888 result_opr()->print(out); out->print(" "); | |
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1890 if(tmp1()->is_valid()) { |
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1891 tmp1()->print(out); out->print(" "); |
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1892 tmp2()->print(out); out->print(" "); |
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1893 } |
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1894 #endif |
0 | 1895 } |
1896 | |
1897 void LIR_OpConvert::print_bytecode(outputStream* out, Bytecodes::Code code) { | |
1898 switch(code) { | |
1899 case Bytecodes::_d2f: out->print("[d2f] "); break; | |
1900 case Bytecodes::_d2i: out->print("[d2i] "); break; | |
1901 case Bytecodes::_d2l: out->print("[d2l] "); break; | |
1902 case Bytecodes::_f2d: out->print("[f2d] "); break; | |
1903 case Bytecodes::_f2i: out->print("[f2i] "); break; | |
1904 case Bytecodes::_f2l: out->print("[f2l] "); break; | |
1905 case Bytecodes::_i2b: out->print("[i2b] "); break; | |
1906 case Bytecodes::_i2c: out->print("[i2c] "); break; | |
1907 case Bytecodes::_i2d: out->print("[i2d] "); break; | |
1908 case Bytecodes::_i2f: out->print("[i2f] "); break; | |
1909 case Bytecodes::_i2l: out->print("[i2l] "); break; | |
1910 case Bytecodes::_i2s: out->print("[i2s] "); break; | |
1911 case Bytecodes::_l2i: out->print("[l2i] "); break; | |
1912 case Bytecodes::_l2f: out->print("[l2f] "); break; | |
1913 case Bytecodes::_l2d: out->print("[l2d] "); break; | |
1914 default: | |
1915 out->print("[?%d]",code); | |
1916 break; | |
1917 } | |
1918 } | |
1919 | |
1920 void LIR_OpAllocObj::print_instr(outputStream* out) const { | |
1921 klass()->print(out); out->print(" "); | |
1922 obj()->print(out); out->print(" "); | |
1923 tmp1()->print(out); out->print(" "); | |
1924 tmp2()->print(out); out->print(" "); | |
1925 tmp3()->print(out); out->print(" "); | |
1926 tmp4()->print(out); out->print(" "); | |
1927 out->print("[hdr:%d]", header_size()); out->print(" "); | |
1928 out->print("[obj:%d]", object_size()); out->print(" "); | |
1929 out->print("[lbl:0x%x]", stub()->entry()); | |
1930 } | |
1931 | |
1932 void LIR_OpRoundFP::print_instr(outputStream* out) const { | |
1933 _opr->print(out); out->print(" "); | |
1934 tmp()->print(out); out->print(" "); | |
1935 result_opr()->print(out); out->print(" "); | |
1936 } | |
1937 | |
1938 // LIR_Op2 | |
1939 void LIR_Op2::print_instr(outputStream* out) const { | |
1940 if (code() == lir_cmove) { | |
1941 print_condition(out, condition()); out->print(" "); | |
1942 } | |
1943 in_opr1()->print(out); out->print(" "); | |
1944 in_opr2()->print(out); out->print(" "); | |
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1945 if (tmp1_opr()->is_valid()) { tmp1_opr()->print(out); out->print(" "); } |
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1946 if (tmp2_opr()->is_valid()) { tmp2_opr()->print(out); out->print(" "); } |
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1947 if (tmp3_opr()->is_valid()) { tmp3_opr()->print(out); out->print(" "); } |
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1948 if (tmp4_opr()->is_valid()) { tmp4_opr()->print(out); out->print(" "); } |
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1949 if (tmp5_opr()->is_valid()) { tmp5_opr()->print(out); out->print(" "); } |
0 | 1950 result_opr()->print(out); |
1951 } | |
1952 | |
1953 void LIR_OpAllocArray::print_instr(outputStream* out) const { | |
1954 klass()->print(out); out->print(" "); | |
1955 len()->print(out); out->print(" "); | |
1956 obj()->print(out); out->print(" "); | |
1957 tmp1()->print(out); out->print(" "); | |
1958 tmp2()->print(out); out->print(" "); | |
1959 tmp3()->print(out); out->print(" "); | |
1960 tmp4()->print(out); out->print(" "); | |
1961 out->print("[type:0x%x]", type()); out->print(" "); | |
1962 out->print("[label:0x%x]", stub()->entry()); | |
1963 } | |
1964 | |
1965 | |
1966 void LIR_OpTypeCheck::print_instr(outputStream* out) const { | |
1967 object()->print(out); out->print(" "); | |
1968 if (code() == lir_store_check) { | |
1969 array()->print(out); out->print(" "); | |
1970 } | |
1971 if (code() != lir_store_check) { | |
1972 klass()->print_name_on(out); out->print(" "); | |
1973 if (fast_check()) out->print("fast_check "); | |
1974 } | |
1975 tmp1()->print(out); out->print(" "); | |
1976 tmp2()->print(out); out->print(" "); | |
1977 tmp3()->print(out); out->print(" "); | |
1978 result_opr()->print(out); out->print(" "); | |
1819 | 1979 if (info_for_exception() != NULL) out->print(" [bci:%d]", info_for_exception()->stack()->bci()); |
0 | 1980 } |
1981 | |
1982 | |
1983 // LIR_Op3 | |
1984 void LIR_Op3::print_instr(outputStream* out) const { | |
1985 in_opr1()->print(out); out->print(" "); | |
1986 in_opr2()->print(out); out->print(" "); | |
1987 in_opr3()->print(out); out->print(" "); | |
1988 result_opr()->print(out); | |
1989 } | |
1990 | |
1991 | |
1992 void LIR_OpLock::print_instr(outputStream* out) const { | |
1993 hdr_opr()->print(out); out->print(" "); | |
1994 obj_opr()->print(out); out->print(" "); | |
1995 lock_opr()->print(out); out->print(" "); | |
1996 if (_scratch->is_valid()) { | |
1997 _scratch->print(out); out->print(" "); | |
1998 } | |
1999 out->print("[lbl:0x%x]", stub()->entry()); | |
2000 } | |
2001 | |
2002 | |
2003 void LIR_OpDelay::print_instr(outputStream* out) const { | |
2004 _op->print_on(out); | |
2005 } | |
2006 | |
2007 | |
2008 // LIR_OpProfileCall | |
2009 void LIR_OpProfileCall::print_instr(outputStream* out) const { | |
2010 profiled_method()->name()->print_symbol_on(out); | |
2011 out->print("."); | |
2012 profiled_method()->holder()->name()->print_symbol_on(out); | |
2013 out->print(" @ %d ", profiled_bci()); | |
2014 mdo()->print(out); out->print(" "); | |
2015 recv()->print(out); out->print(" "); | |
2016 tmp1()->print(out); out->print(" "); | |
2017 } | |
2018 | |
2019 #endif // PRODUCT | |
2020 | |
2021 // Implementation of LIR_InsertionBuffer | |
2022 | |
2023 void LIR_InsertionBuffer::append(int index, LIR_Op* op) { | |
2024 assert(_index_and_count.length() % 2 == 0, "must have a count for each index"); | |
2025 | |
2026 int i = number_of_insertion_points() - 1; | |
2027 if (i < 0 || index_at(i) < index) { | |
2028 append_new(index, 1); | |
2029 } else { | |
2030 assert(index_at(i) == index, "can append LIR_Ops in ascending order only"); | |
2031 assert(count_at(i) > 0, "check"); | |
2032 set_count_at(i, count_at(i) + 1); | |
2033 } | |
2034 _ops.push(op); | |
2035 | |
2036 DEBUG_ONLY(verify()); | |
2037 } | |
2038 | |
2039 #ifdef ASSERT | |
2040 void LIR_InsertionBuffer::verify() { | |
2041 int sum = 0; | |
2042 int prev_idx = -1; | |
2043 | |
2044 for (int i = 0; i < number_of_insertion_points(); i++) { | |
2045 assert(prev_idx < index_at(i), "index must be ordered ascending"); | |
2046 sum += count_at(i); | |
2047 } | |
2048 assert(sum == number_of_ops(), "wrong total sum"); | |
2049 } | |
2050 #endif |