Mercurial > hg > truffle
annotate src/cpu/sparc/vm/vm_version_sparc.cpp @ 13423:eae426d683f6
8029190: VM_Version::determine_features() asserts on Fujitsu Sparc64 CPUs
Summary: fix code to allow testing on Fujitsu Sparc64 CPUs
Reviewed-by: kvn
| author | simonis |
|---|---|
| date | Mon, 02 Dec 2013 11:12:32 +0100 |
| parents | 46c544b8fbfc |
| children | de6a9e811145 |
| rev | line source |
|---|---|
| 0 | 1 /* |
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2 * Copyright (c) 1997, 2012, Oracle and/or its affiliates. All rights reserved. |
| 0 | 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
| 4 * | |
| 5 * This code is free software; you can redistribute it and/or modify it | |
| 6 * under the terms of the GNU General Public License version 2 only, as | |
| 7 * published by the Free Software Foundation. | |
| 8 * | |
| 9 * This code is distributed in the hope that it will be useful, but WITHOUT | |
| 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
| 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
| 12 * version 2 for more details (a copy is included in the LICENSE file that | |
| 13 * accompanied this code). | |
| 14 * | |
| 15 * You should have received a copy of the GNU General Public License version | |
| 16 * 2 along with this work; if not, write to the Free Software Foundation, | |
| 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
| 18 * | |
|
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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20 * or visit www.oracle.com if you need additional information or have any |
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21 * questions. |
| 0 | 22 * |
| 23 */ | |
| 24 | |
| 1972 | 25 #include "precompiled.hpp" |
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26 #include "asm/macroAssembler.inline.hpp" |
| 1972 | 27 #include "memory/resourceArea.hpp" |
| 28 #include "runtime/java.hpp" | |
| 29 #include "runtime/stubCodeGenerator.hpp" | |
| 30 #include "vm_version_sparc.hpp" | |
| 31 #ifdef TARGET_OS_FAMILY_linux | |
| 32 # include "os_linux.inline.hpp" | |
| 33 #endif | |
| 34 #ifdef TARGET_OS_FAMILY_solaris | |
| 35 # include "os_solaris.inline.hpp" | |
| 36 #endif | |
| 0 | 37 |
| 38 int VM_Version::_features = VM_Version::unknown_m; | |
| 39 const char* VM_Version::_features_str = ""; | |
| 40 | |
| 41 void VM_Version::initialize() { | |
| 42 _features = determine_features(); | |
| 43 PrefetchCopyIntervalInBytes = prefetch_copy_interval_in_bytes(); | |
| 44 PrefetchScanIntervalInBytes = prefetch_scan_interval_in_bytes(); | |
| 45 PrefetchFieldsAhead = prefetch_fields_ahead(); | |
| 46 | |
| 3854 | 47 assert(0 <= AllocatePrefetchInstr && AllocatePrefetchInstr <= 1, "invalid value"); |
| 48 if( AllocatePrefetchInstr < 0 ) AllocatePrefetchInstr = 0; | |
| 49 if( AllocatePrefetchInstr > 1 ) AllocatePrefetchInstr = 0; | |
| 50 | |
| 0 | 51 // Allocation prefetch settings |
| 3854 | 52 intx cache_line_size = prefetch_data_size(); |
| 0 | 53 if( cache_line_size > AllocatePrefetchStepSize ) |
| 54 AllocatePrefetchStepSize = cache_line_size; | |
| 3854 | 55 |
| 56 assert(AllocatePrefetchLines > 0, "invalid value"); | |
| 57 if( AllocatePrefetchLines < 1 ) // set valid value in product VM | |
| 58 AllocatePrefetchLines = 3; | |
| 59 assert(AllocateInstancePrefetchLines > 0, "invalid value"); | |
| 60 if( AllocateInstancePrefetchLines < 1 ) // set valid value in product VM | |
| 61 AllocateInstancePrefetchLines = 1; | |
| 0 | 62 |
| 63 AllocatePrefetchDistance = allocate_prefetch_distance(); | |
| 64 AllocatePrefetchStyle = allocate_prefetch_style(); | |
| 65 | |
| 3854 | 66 assert((AllocatePrefetchDistance % AllocatePrefetchStepSize) == 0 && |
| 67 (AllocatePrefetchDistance > 0), "invalid value"); | |
| 68 if ((AllocatePrefetchDistance % AllocatePrefetchStepSize) != 0 || | |
| 69 (AllocatePrefetchDistance <= 0)) { | |
| 70 AllocatePrefetchDistance = AllocatePrefetchStepSize; | |
| 71 } | |
| 0 | 72 |
| 3839 | 73 if (AllocatePrefetchStyle == 3 && !has_blk_init()) { |
| 74 warning("BIS instructions are not available on this CPU"); | |
| 75 FLAG_SET_DEFAULT(AllocatePrefetchStyle, 1); | |
| 76 } | |
| 77 | |
| 10997 | 78 guarantee(VM_Version::has_v9(), "only SPARC v9 is supported"); |
| 79 | |
| 80 assert(ArraycopySrcPrefetchDistance < 4096, "invalid value"); | |
| 81 if (ArraycopySrcPrefetchDistance >= 4096) | |
| 82 ArraycopySrcPrefetchDistance = 4064; | |
| 83 assert(ArraycopyDstPrefetchDistance < 4096, "invalid value"); | |
| 84 if (ArraycopyDstPrefetchDistance >= 4096) | |
| 85 ArraycopyDstPrefetchDistance = 4064; | |
| 3903 | 86 |
| 0 | 87 UseSSE = 0; // Only on x86 and x64 |
| 88 | |
| 3854 | 89 _supports_cx8 = has_v9(); |
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90 _supports_atomic_getset4 = true; // swap instruction |
| 0 | 91 |
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92 // There are Fujitsu Sparc64 CPUs which support blk_init as well so |
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93 // we have to take this check out of the 'is_niagara()' block below. |
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94 if (has_blk_init()) { |
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95 // When using CMS or G1, we cannot use memset() in BOT updates |
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96 // because the sun4v/CMT version in libc_psr uses BIS which |
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97 // exposes "phantom zeros" to concurrent readers. See 6948537. |
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98 if (FLAG_IS_DEFAULT(UseMemSetInBOT) && (UseConcMarkSweepGC || UseG1GC)) { |
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99 FLAG_SET_DEFAULT(UseMemSetInBOT, false); |
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100 } |
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101 // Issue a stern warning if the user has explicitly set |
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102 // UseMemSetInBOT (it is known to cause issues), but allow |
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103 // use for experimentation and debugging. |
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104 if (UseConcMarkSweepGC || UseG1GC) { |
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105 if (UseMemSetInBOT) { |
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106 assert(!FLAG_IS_DEFAULT(UseMemSetInBOT), "Error"); |
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107 warning("Experimental flag -XX:+UseMemSetInBOT is known to cause instability" |
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108 " on sun4v; please understand that you are using at your own risk!"); |
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109 } |
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110 } |
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111 } |
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112 |
| 2080 | 113 if (is_niagara()) { |
| 0 | 114 // Indirect branch is the same cost as direct |
| 115 if (FLAG_IS_DEFAULT(UseInlineCaches)) { | |
| 675 | 116 FLAG_SET_DEFAULT(UseInlineCaches, false); |
| 0 | 117 } |
| 2080 | 118 // Align loops on a single instruction boundary. |
| 119 if (FLAG_IS_DEFAULT(OptoLoopAlignment)) { | |
| 120 FLAG_SET_DEFAULT(OptoLoopAlignment, 4); | |
| 121 } | |
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122 #ifdef _LP64 |
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123 // 32-bit oops don't make sense for the 64-bit VM on sparc |
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124 // since the 32-bit VM has the same registers and smaller objects. |
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125 Universe::set_narrow_oop_shift(LogMinObjAlignmentInBytes); |
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126 Universe::set_narrow_klass_shift(LogKlassAlignmentInBytes); |
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127 #endif // _LP64 |
| 0 | 128 #ifdef COMPILER2 |
| 129 // Indirect branch is the same cost as direct | |
| 130 if (FLAG_IS_DEFAULT(UseJumpTables)) { | |
| 675 | 131 FLAG_SET_DEFAULT(UseJumpTables, true); |
| 0 | 132 } |
| 133 // Single-issue, so entry and loop tops are | |
| 134 // aligned on a single instruction boundary | |
| 135 if (FLAG_IS_DEFAULT(InteriorEntryAlignment)) { | |
| 675 | 136 FLAG_SET_DEFAULT(InteriorEntryAlignment, 4); |
| 0 | 137 } |
| 2080 | 138 if (is_niagara_plus()) { |
| 3854 | 139 if (has_blk_init() && UseTLAB && |
| 140 FLAG_IS_DEFAULT(AllocatePrefetchInstr)) { | |
| 141 // Use BIS instruction for TLAB allocation prefetch. | |
| 142 FLAG_SET_ERGO(intx, AllocatePrefetchInstr, 1); | |
| 143 if (FLAG_IS_DEFAULT(AllocatePrefetchStyle)) { | |
| 144 FLAG_SET_ERGO(intx, AllocatePrefetchStyle, 3); | |
| 145 } | |
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146 if (FLAG_IS_DEFAULT(AllocatePrefetchDistance)) { |
| 3854 | 147 // Use smaller prefetch distance with BIS |
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148 FLAG_SET_DEFAULT(AllocatePrefetchDistance, 64); |
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149 } |
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150 } |
| 3854 | 151 if (is_T4()) { |
| 152 // Double number of prefetched cache lines on T4 | |
| 153 // since L2 cache line size is smaller (32 bytes). | |
| 154 if (FLAG_IS_DEFAULT(AllocatePrefetchLines)) { | |
| 155 FLAG_SET_ERGO(intx, AllocatePrefetchLines, AllocatePrefetchLines*2); | |
| 156 } | |
| 157 if (FLAG_IS_DEFAULT(AllocateInstancePrefetchLines)) { | |
| 158 FLAG_SET_ERGO(intx, AllocateInstancePrefetchLines, AllocateInstancePrefetchLines*2); | |
| 159 } | |
| 160 } | |
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161 if (AllocatePrefetchStyle != 3 && FLAG_IS_DEFAULT(AllocatePrefetchDistance)) { |
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162 // Use different prefetch distance without BIS |
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163 FLAG_SET_DEFAULT(AllocatePrefetchDistance, 256); |
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164 } |
| 3854 | 165 if (AllocatePrefetchInstr == 1) { |
| 166 // Need a space at the end of TLAB for BIS since it | |
| 167 // will fault when accessing memory outside of heap. | |
| 168 | |
| 169 // +1 for rounding up to next cache line, +1 to be safe | |
| 170 int lines = AllocatePrefetchLines + 2; | |
| 171 int step_size = AllocatePrefetchStepSize; | |
| 172 int distance = AllocatePrefetchDistance; | |
| 173 _reserve_for_allocation_prefetch = (distance + step_size*lines)/(int)HeapWordSize; | |
| 174 } | |
| 0 | 175 } |
| 176 #endif | |
| 177 } | |
| 178 | |
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179 // Use hardware population count instruction if available. |
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180 if (has_hardware_popc()) { |
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181 if (FLAG_IS_DEFAULT(UsePopCountInstruction)) { |
| 675 | 182 FLAG_SET_DEFAULT(UsePopCountInstruction, true); |
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183 } |
| 3839 | 184 } else if (UsePopCountInstruction) { |
| 185 warning("POPC instruction is not available on this CPU"); | |
| 186 FLAG_SET_DEFAULT(UsePopCountInstruction, false); | |
| 187 } | |
| 188 | |
| 189 // T4 and newer Sparc cpus have new compare and branch instruction. | |
| 190 if (has_cbcond()) { | |
| 191 if (FLAG_IS_DEFAULT(UseCBCond)) { | |
| 192 FLAG_SET_DEFAULT(UseCBCond, true); | |
| 193 } | |
| 194 } else if (UseCBCond) { | |
| 195 warning("CBCOND instruction is not available on this CPU"); | |
| 196 FLAG_SET_DEFAULT(UseCBCond, false); | |
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197 } |
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198 |
| 3892 | 199 assert(BlockZeroingLowLimit > 0, "invalid value"); |
| 200 if (has_block_zeroing()) { | |
| 201 if (FLAG_IS_DEFAULT(UseBlockZeroing)) { | |
| 202 FLAG_SET_DEFAULT(UseBlockZeroing, true); | |
| 203 } | |
| 204 } else if (UseBlockZeroing) { | |
| 205 warning("BIS zeroing instructions are not available on this CPU"); | |
| 206 FLAG_SET_DEFAULT(UseBlockZeroing, false); | |
| 207 } | |
| 208 | |
| 3903 | 209 assert(BlockCopyLowLimit > 0, "invalid value"); |
| 210 if (has_block_zeroing()) { // has_blk_init() && is_T4(): core's local L2 cache | |
| 211 if (FLAG_IS_DEFAULT(UseBlockCopy)) { | |
| 212 FLAG_SET_DEFAULT(UseBlockCopy, true); | |
| 213 } | |
| 214 } else if (UseBlockCopy) { | |
| 215 warning("BIS instructions are not available or expensive on this CPU"); | |
| 216 FLAG_SET_DEFAULT(UseBlockCopy, false); | |
| 217 } | |
| 218 | |
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219 #ifdef COMPILER2 |
| 3839 | 220 // T4 and newer Sparc cpus have fast RDPC. |
| 221 if (has_fast_rdpc() && FLAG_IS_DEFAULT(UseRDPCForConstantTableBase)) { | |
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222 FLAG_SET_DEFAULT(UseRDPCForConstantTableBase, true); |
| 3839 | 223 } |
| 224 | |
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225 // Currently not supported anywhere. |
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226 FLAG_SET_DEFAULT(UseFPUForSpilling, false); |
| 3851 | 227 |
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228 MaxVectorSize = 8; |
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229 |
| 3851 | 230 assert((InteriorEntryAlignment % relocInfo::addr_unit()) == 0, "alignment is not a multiple of NOP size"); |
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231 #endif |
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232 |
| 3851 | 233 assert((CodeEntryAlignment % relocInfo::addr_unit()) == 0, "alignment is not a multiple of NOP size"); |
| 234 assert((OptoLoopAlignment % relocInfo::addr_unit()) == 0, "alignment is not a multiple of NOP size"); | |
| 235 | |
| 0 | 236 char buf[512]; |
| 3839 | 237 jio_snprintf(buf, sizeof(buf), "%s%s%s%s%s%s%s%s%s%s%s%s%s%s", |
| 238 (has_v9() ? ", v9" : (has_v8() ? ", v8" : "")), | |
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239 (has_hardware_popc() ? ", popc" : ""), |
| 3839 | 240 (has_vis1() ? ", vis1" : ""), |
| 241 (has_vis2() ? ", vis2" : ""), | |
| 242 (has_vis3() ? ", vis3" : ""), | |
| 243 (has_blk_init() ? ", blk_init" : ""), | |
| 244 (has_cbcond() ? ", cbcond" : ""), | |
| 245 (is_ultra3() ? ", ultra3" : ""), | |
| 246 (is_sun4v() ? ", sun4v" : ""), | |
| 247 (is_niagara_plus() ? ", niagara_plus" : (is_niagara() ? ", niagara" : "")), | |
| 248 (is_sparc64() ? ", sparc64" : ""), | |
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249 (!has_hardware_mul32() ? ", no-mul32" : ""), |
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250 (!has_hardware_div32() ? ", no-div32" : ""), |
| 0 | 251 (!has_hardware_fsmuld() ? ", no-fsmuld" : "")); |
| 252 | |
| 253 // buf is started with ", " or is empty | |
| 254 _features_str = strdup(strlen(buf) > 2 ? buf + 2 : buf); | |
| 255 | |
| 3804 | 256 // UseVIS is set to the smallest of what hardware supports and what |
| 257 // the command line requires. I.e., you cannot set UseVIS to 3 on | |
| 258 // older UltraSparc which do not support it. | |
| 259 if (UseVIS > 3) UseVIS=3; | |
| 260 if (UseVIS < 0) UseVIS=0; | |
| 261 if (!has_vis3()) // Drop to 2 if no VIS3 support | |
| 262 UseVIS = MIN2((intx)2,UseVIS); | |
| 263 if (!has_vis2()) // Drop to 1 if no VIS2 support | |
| 264 UseVIS = MIN2((intx)1,UseVIS); | |
| 265 if (!has_vis1()) // Drop to 0 if no VIS1 support | |
| 266 UseVIS = 0; | |
| 267 | |
| 7587 | 268 if (FLAG_IS_DEFAULT(ContendedPaddingWidth) && |
| 269 (cache_line_size > ContendedPaddingWidth)) | |
| 270 ContendedPaddingWidth = cache_line_size; | |
| 271 | |
| 0 | 272 #ifndef PRODUCT |
| 273 if (PrintMiscellaneous && Verbose) { | |
| 3854 | 274 tty->print("Allocation"); |
| 0 | 275 if (AllocatePrefetchStyle <= 0) { |
| 3854 | 276 tty->print_cr(": no prefetching"); |
| 0 | 277 } else { |
| 3854 | 278 tty->print(" prefetching: "); |
| 279 if (AllocatePrefetchInstr == 0) { | |
| 280 tty->print("PREFETCH"); | |
| 281 } else if (AllocatePrefetchInstr == 1) { | |
| 282 tty->print("BIS"); | |
| 283 } | |
| 0 | 284 if (AllocatePrefetchLines > 1) { |
| 3854 | 285 tty->print_cr(" at distance %d, %d lines of %d bytes", AllocatePrefetchDistance, AllocatePrefetchLines, AllocatePrefetchStepSize); |
| 0 | 286 } else { |
| 3854 | 287 tty->print_cr(" at distance %d, one line of %d bytes", AllocatePrefetchDistance, AllocatePrefetchStepSize); |
| 0 | 288 } |
| 289 } | |
| 290 if (PrefetchCopyIntervalInBytes > 0) { | |
| 291 tty->print_cr("PrefetchCopyIntervalInBytes %d", PrefetchCopyIntervalInBytes); | |
| 292 } | |
| 293 if (PrefetchScanIntervalInBytes > 0) { | |
| 294 tty->print_cr("PrefetchScanIntervalInBytes %d", PrefetchScanIntervalInBytes); | |
| 295 } | |
| 296 if (PrefetchFieldsAhead > 0) { | |
| 297 tty->print_cr("PrefetchFieldsAhead %d", PrefetchFieldsAhead); | |
| 298 } | |
| 7587 | 299 if (ContendedPaddingWidth > 0) { |
| 300 tty->print_cr("ContendedPaddingWidth %d", ContendedPaddingWidth); | |
| 301 } | |
| 0 | 302 } |
| 303 #endif // PRODUCT | |
| 304 } | |
| 305 | |
| 306 void VM_Version::print_features() { | |
| 307 tty->print_cr("Version:%s", cpu_features()); | |
| 308 } | |
| 309 | |
| 310 int VM_Version::determine_features() { | |
| 311 if (UseV8InstrsOnly) { | |
| 312 NOT_PRODUCT(if (PrintMiscellaneous && Verbose) tty->print_cr("Version is Forced-V8");) | |
| 313 return generic_v8_m; | |
| 314 } | |
| 315 | |
| 316 int features = platform_features(unknown_m); // platform_features() is os_arch specific | |
| 317 | |
| 318 if (features == unknown_m) { | |
| 319 features = generic_v9_m; | |
| 320 warning("Cannot recognize SPARC version. Default to V9"); | |
| 321 } | |
| 322 | |
| 2080 | 323 assert(is_T_family(features) == is_niagara(features), "Niagara should be T series"); |
| 324 if (UseNiagaraInstrs) { // Force code generation for Niagara | |
| 325 if (is_T_family(features)) { | |
| 0 | 326 // Happy to accomodate... |
| 327 } else { | |
| 328 NOT_PRODUCT(if (PrintMiscellaneous && Verbose) tty->print_cr("Version is Forced-Niagara");) | |
| 2080 | 329 features |= T_family_m; |
| 0 | 330 } |
| 331 } else { | |
| 2080 | 332 if (is_T_family(features) && !FLAG_IS_DEFAULT(UseNiagaraInstrs)) { |
| 0 | 333 NOT_PRODUCT(if (PrintMiscellaneous && Verbose) tty->print_cr("Version is Forced-Not-Niagara");) |
| 2080 | 334 features &= ~(T_family_m | T1_model_m); |
| 0 | 335 } else { |
| 336 // Happy to accomodate... | |
| 337 } | |
| 338 } | |
| 339 | |
| 340 return features; | |
| 341 } | |
| 342 | |
| 343 static int saved_features = 0; | |
| 344 | |
| 345 void VM_Version::allow_all() { | |
| 346 saved_features = _features; | |
| 347 _features = all_features_m; | |
| 348 } | |
| 349 | |
| 350 void VM_Version::revert() { | |
| 351 _features = saved_features; | |
| 352 } | |
|
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353 |
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354 unsigned int VM_Version::calc_parallel_worker_threads() { |
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355 unsigned int result; |
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356 if (is_M_series()) { |
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357 // for now, use same gc thread calculation for M-series as for niagara-plus |
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358 // in future, we may want to tweak parameters for nof_parallel_worker_thread |
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359 result = nof_parallel_worker_threads(5, 16, 8); |
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360 } else if (is_niagara_plus()) { |
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361 result = nof_parallel_worker_threads(5, 16, 8); |
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362 } else { |
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363 result = nof_parallel_worker_threads(5, 8, 8); |
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364 } |
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365 return result; |
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366 } |