Mercurial > hg > truffle
annotate src/cpu/sparc/vm/stubGenerator_sparc.cpp @ 7204:f0c2369fda5a
8003250: SPARC: move MacroAssembler into separate file
Reviewed-by: jrose, kvn
| author | twisti |
|---|---|
| date | Thu, 06 Dec 2012 09:57:41 -0800 |
| parents | d8ce2825b193 |
| children | d2f8c38e543d |
| rev | line source |
|---|---|
| 0 | 1 /* |
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2 * Copyright (c) 1997, 2012, Oracle and/or its affiliates. All rights reserved. |
| 0 | 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
| 4 * | |
| 5 * This code is free software; you can redistribute it and/or modify it | |
| 6 * under the terms of the GNU General Public License version 2 only, as | |
| 7 * published by the Free Software Foundation. | |
| 8 * | |
| 9 * This code is distributed in the hope that it will be useful, but WITHOUT | |
| 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
| 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
| 12 * version 2 for more details (a copy is included in the LICENSE file that | |
| 13 * accompanied this code). | |
| 14 * | |
| 15 * You should have received a copy of the GNU General Public License version | |
| 16 * 2 along with this work; if not, write to the Free Software Foundation, | |
| 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
| 18 * | |
|
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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20 * or visit www.oracle.com if you need additional information or have any |
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21 * questions. |
| 0 | 22 * |
| 23 */ | |
| 24 | |
| 1972 | 25 #include "precompiled.hpp" |
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26 #include "asm/macroAssembler.inline.hpp" |
| 1972 | 27 #include "interpreter/interpreter.hpp" |
| 28 #include "nativeInst_sparc.hpp" | |
| 29 #include "oops/instanceOop.hpp" | |
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30 #include "oops/method.hpp" |
| 1972 | 31 #include "oops/objArrayKlass.hpp" |
| 32 #include "oops/oop.inline.hpp" | |
| 33 #include "prims/methodHandles.hpp" | |
| 34 #include "runtime/frame.inline.hpp" | |
| 35 #include "runtime/handles.inline.hpp" | |
| 36 #include "runtime/sharedRuntime.hpp" | |
| 37 #include "runtime/stubCodeGenerator.hpp" | |
| 38 #include "runtime/stubRoutines.hpp" | |
| 39 #include "utilities/top.hpp" | |
| 40 #ifdef TARGET_OS_FAMILY_linux | |
| 41 # include "thread_linux.inline.hpp" | |
| 42 #endif | |
| 43 #ifdef TARGET_OS_FAMILY_solaris | |
| 44 # include "thread_solaris.inline.hpp" | |
| 45 #endif | |
| 46 #ifdef COMPILER2 | |
| 47 #include "opto/runtime.hpp" | |
| 48 #endif | |
| 0 | 49 |
| 50 // Declaration and definition of StubGenerator (no .hpp file). | |
| 51 // For a more detailed description of the stub routine structure | |
| 52 // see the comment in stubRoutines.hpp. | |
| 53 | |
| 54 #define __ _masm-> | |
| 55 | |
| 56 #ifdef PRODUCT | |
| 57 #define BLOCK_COMMENT(str) /* nothing */ | |
| 58 #else | |
| 59 #define BLOCK_COMMENT(str) __ block_comment(str) | |
| 60 #endif | |
| 61 | |
| 62 #define BIND(label) bind(label); BLOCK_COMMENT(#label ":") | |
| 63 | |
| 64 // Note: The register L7 is used as L7_thread_cache, and may not be used | |
| 65 // any other way within this module. | |
| 66 | |
| 67 | |
| 68 static const Register& Lstub_temp = L2; | |
| 69 | |
| 70 // ------------------------------------------------------------------------------------------------------------------------- | |
| 71 // Stub Code definitions | |
| 72 | |
| 73 static address handle_unsafe_access() { | |
| 74 JavaThread* thread = JavaThread::current(); | |
| 75 address pc = thread->saved_exception_pc(); | |
| 76 address npc = thread->saved_exception_npc(); | |
| 77 // pc is the instruction which we must emulate | |
| 78 // doing a no-op is fine: return garbage from the load | |
| 79 | |
| 80 // request an async exception | |
| 81 thread->set_pending_unsafe_access_error(); | |
| 82 | |
| 83 // return address of next instruction to execute | |
| 84 return npc; | |
| 85 } | |
| 86 | |
| 87 class StubGenerator: public StubCodeGenerator { | |
| 88 private: | |
| 89 | |
| 90 #ifdef PRODUCT | |
| 91 #define inc_counter_np(a,b,c) (0) | |
| 92 #else | |
| 93 #define inc_counter_np(counter, t1, t2) \ | |
| 94 BLOCK_COMMENT("inc_counter " #counter); \ | |
| 727 | 95 __ inc_counter(&counter, t1, t2); |
| 0 | 96 #endif |
| 97 | |
| 98 //---------------------------------------------------------------------------------------------------- | |
| 99 // Call stubs are used to call Java from C | |
| 100 | |
| 101 address generate_call_stub(address& return_pc) { | |
| 102 StubCodeMark mark(this, "StubRoutines", "call_stub"); | |
| 103 address start = __ pc(); | |
| 104 | |
| 105 // Incoming arguments: | |
| 106 // | |
| 107 // o0 : call wrapper address | |
| 108 // o1 : result (address) | |
| 109 // o2 : result type | |
| 110 // o3 : method | |
| 111 // o4 : (interpreter) entry point | |
| 112 // o5 : parameters (address) | |
| 113 // [sp + 0x5c]: parameter size (in words) | |
| 114 // [sp + 0x60]: thread | |
| 115 // | |
| 116 // +---------------+ <--- sp + 0 | |
| 117 // | | | |
| 118 // . reg save area . | |
| 119 // | | | |
| 120 // +---------------+ <--- sp + 0x40 | |
| 121 // | | | |
| 122 // . extra 7 slots . | |
| 123 // | | | |
| 124 // +---------------+ <--- sp + 0x5c | |
| 125 // | param. size | | |
| 126 // +---------------+ <--- sp + 0x60 | |
| 127 // | thread | | |
| 128 // +---------------+ | |
| 129 // | | | |
| 130 | |
| 131 // note: if the link argument position changes, adjust | |
| 132 // the code in frame::entry_frame_call_wrapper() | |
| 133 | |
| 134 const Argument link = Argument(0, false); // used only for GC | |
| 135 const Argument result = Argument(1, false); | |
| 136 const Argument result_type = Argument(2, false); | |
| 137 const Argument method = Argument(3, false); | |
| 138 const Argument entry_point = Argument(4, false); | |
| 139 const Argument parameters = Argument(5, false); | |
| 140 const Argument parameter_size = Argument(6, false); | |
| 141 const Argument thread = Argument(7, false); | |
| 142 | |
| 143 // setup thread register | |
| 144 __ ld_ptr(thread.as_address(), G2_thread); | |
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145 __ reinit_heapbase(); |
| 0 | 146 |
| 147 #ifdef ASSERT | |
| 148 // make sure we have no pending exceptions | |
| 149 { const Register t = G3_scratch; | |
| 150 Label L; | |
| 151 __ ld_ptr(G2_thread, in_bytes(Thread::pending_exception_offset()), t); | |
| 3839 | 152 __ br_null_short(t, Assembler::pt, L); |
| 0 | 153 __ stop("StubRoutines::call_stub: entered with pending exception"); |
| 154 __ bind(L); | |
| 155 } | |
| 156 #endif | |
| 157 | |
| 158 // create activation frame & allocate space for parameters | |
| 159 { const Register t = G3_scratch; | |
| 160 __ ld_ptr(parameter_size.as_address(), t); // get parameter size (in words) | |
| 161 __ add(t, frame::memory_parameter_word_sp_offset, t); // add space for save area (in words) | |
| 162 __ round_to(t, WordsPerLong); // make sure it is multiple of 2 (in words) | |
| 1506 | 163 __ sll(t, Interpreter::logStackElementSize, t); // compute number of bytes |
| 0 | 164 __ neg(t); // negate so it can be used with save |
| 165 __ save(SP, t, SP); // setup new frame | |
| 166 } | |
| 167 | |
| 168 // +---------------+ <--- sp + 0 | |
| 169 // | | | |
| 170 // . reg save area . | |
| 171 // | | | |
| 172 // +---------------+ <--- sp + 0x40 | |
| 173 // | | | |
| 174 // . extra 7 slots . | |
| 175 // | | | |
| 176 // +---------------+ <--- sp + 0x5c | |
| 177 // | empty slot | (only if parameter size is even) | |
| 178 // +---------------+ | |
| 179 // | | | |
| 180 // . parameters . | |
| 181 // | | | |
| 182 // +---------------+ <--- fp + 0 | |
| 183 // | | | |
| 184 // . reg save area . | |
| 185 // | | | |
| 186 // +---------------+ <--- fp + 0x40 | |
| 187 // | | | |
| 188 // . extra 7 slots . | |
| 189 // | | | |
| 190 // +---------------+ <--- fp + 0x5c | |
| 191 // | param. size | | |
| 192 // +---------------+ <--- fp + 0x60 | |
| 193 // | thread | | |
| 194 // +---------------+ | |
| 195 // | | | |
| 196 | |
| 197 // pass parameters if any | |
| 198 BLOCK_COMMENT("pass parameters if any"); | |
| 199 { const Register src = parameters.as_in().as_register(); | |
| 200 const Register dst = Lentry_args; | |
| 201 const Register tmp = G3_scratch; | |
| 202 const Register cnt = G4_scratch; | |
| 203 | |
| 204 // test if any parameters & setup of Lentry_args | |
| 205 Label exit; | |
| 206 __ ld_ptr(parameter_size.as_in().as_address(), cnt); // parameter counter | |
| 207 __ add( FP, STACK_BIAS, dst ); | |
| 3839 | 208 __ cmp_zero_and_br(Assembler::zero, cnt, exit); |
| 0 | 209 __ delayed()->sub(dst, BytesPerWord, dst); // setup Lentry_args |
| 210 | |
| 211 // copy parameters if any | |
| 212 Label loop; | |
| 213 __ BIND(loop); | |
| 214 // Store parameter value | |
| 215 __ ld_ptr(src, 0, tmp); | |
| 216 __ add(src, BytesPerWord, src); | |
| 1506 | 217 __ st_ptr(tmp, dst, 0); |
| 0 | 218 __ deccc(cnt); |
| 219 __ br(Assembler::greater, false, Assembler::pt, loop); | |
| 1506 | 220 __ delayed()->sub(dst, Interpreter::stackElementSize, dst); |
| 0 | 221 |
| 222 // done | |
| 223 __ BIND(exit); | |
| 224 } | |
| 225 | |
| 226 // setup parameters, method & call Java function | |
| 227 #ifdef ASSERT | |
| 228 // layout_activation_impl checks it's notion of saved SP against | |
| 229 // this register, so if this changes update it as well. | |
| 230 const Register saved_SP = Lscratch; | |
| 231 __ mov(SP, saved_SP); // keep track of SP before call | |
| 232 #endif | |
| 233 | |
| 234 // setup parameters | |
| 235 const Register t = G3_scratch; | |
| 236 __ ld_ptr(parameter_size.as_in().as_address(), t); // get parameter size (in words) | |
| 1506 | 237 __ sll(t, Interpreter::logStackElementSize, t); // compute number of bytes |
| 0 | 238 __ sub(FP, t, Gargs); // setup parameter pointer |
| 239 #ifdef _LP64 | |
| 240 __ add( Gargs, STACK_BIAS, Gargs ); // Account for LP64 stack bias | |
| 241 #endif | |
| 242 __ mov(SP, O5_savedSP); | |
| 243 | |
| 244 | |
| 245 // do the call | |
| 246 // | |
| 247 // the following register must be setup: | |
| 248 // | |
| 249 // G2_thread | |
| 250 // G5_method | |
| 251 // Gargs | |
| 252 BLOCK_COMMENT("call Java function"); | |
| 253 __ jmpl(entry_point.as_in().as_register(), G0, O7); | |
| 254 __ delayed()->mov(method.as_in().as_register(), G5_method); // setup method | |
| 255 | |
| 256 BLOCK_COMMENT("call_stub_return_address:"); | |
| 257 return_pc = __ pc(); | |
| 258 | |
| 259 // The callee, if it wasn't interpreted, can return with SP changed so | |
| 260 // we can no longer assert of change of SP. | |
| 261 | |
| 262 // store result depending on type | |
| 263 // (everything that is not T_OBJECT, T_LONG, T_FLOAT, or T_DOUBLE | |
| 264 // is treated as T_INT) | |
| 265 { const Register addr = result .as_in().as_register(); | |
| 266 const Register type = result_type.as_in().as_register(); | |
| 267 Label is_long, is_float, is_double, is_object, exit; | |
| 268 __ cmp(type, T_OBJECT); __ br(Assembler::equal, false, Assembler::pn, is_object); | |
| 269 __ delayed()->cmp(type, T_FLOAT); __ br(Assembler::equal, false, Assembler::pn, is_float); | |
| 270 __ delayed()->cmp(type, T_DOUBLE); __ br(Assembler::equal, false, Assembler::pn, is_double); | |
| 271 __ delayed()->cmp(type, T_LONG); __ br(Assembler::equal, false, Assembler::pn, is_long); | |
| 272 __ delayed()->nop(); | |
| 273 | |
| 274 // store int result | |
| 275 __ st(O0, addr, G0); | |
| 276 | |
| 277 __ BIND(exit); | |
| 278 __ ret(); | |
| 279 __ delayed()->restore(); | |
| 280 | |
| 281 __ BIND(is_object); | |
| 3839 | 282 __ ba(exit); |
| 0 | 283 __ delayed()->st_ptr(O0, addr, G0); |
| 284 | |
| 285 __ BIND(is_float); | |
| 3839 | 286 __ ba(exit); |
| 0 | 287 __ delayed()->stf(FloatRegisterImpl::S, F0, addr, G0); |
| 288 | |
| 289 __ BIND(is_double); | |
| 3839 | 290 __ ba(exit); |
| 0 | 291 __ delayed()->stf(FloatRegisterImpl::D, F0, addr, G0); |
| 292 | |
| 293 __ BIND(is_long); | |
| 294 #ifdef _LP64 | |
| 3839 | 295 __ ba(exit); |
| 0 | 296 __ delayed()->st_long(O0, addr, G0); // store entire long |
| 297 #else | |
| 298 #if defined(COMPILER2) | |
| 299 // All return values are where we want them, except for Longs. C2 returns | |
| 300 // longs in G1 in the 32-bit build whereas the interpreter wants them in O0/O1. | |
| 301 // Since the interpreter will return longs in G1 and O0/O1 in the 32bit | |
| 302 // build we simply always use G1. | |
| 303 // Note: I tried to make c2 return longs in O0/O1 and G1 so we wouldn't have to | |
| 304 // do this here. Unfortunately if we did a rethrow we'd see an machepilog node | |
| 305 // first which would move g1 -> O0/O1 and destroy the exception we were throwing. | |
| 306 | |
| 3839 | 307 __ ba(exit); |
| 0 | 308 __ delayed()->stx(G1, addr, G0); // store entire long |
| 309 #else | |
| 310 __ st(O1, addr, BytesPerInt); | |
| 3839 | 311 __ ba(exit); |
| 0 | 312 __ delayed()->st(O0, addr, G0); |
| 313 #endif /* COMPILER2 */ | |
| 314 #endif /* _LP64 */ | |
| 315 } | |
| 316 return start; | |
| 317 } | |
| 318 | |
| 319 | |
| 320 //---------------------------------------------------------------------------------------------------- | |
| 321 // Return point for a Java call if there's an exception thrown in Java code. | |
| 322 // The exception is caught and transformed into a pending exception stored in | |
| 323 // JavaThread that can be tested from within the VM. | |
| 324 // | |
| 325 // Oexception: exception oop | |
| 326 | |
| 327 address generate_catch_exception() { | |
| 328 StubCodeMark mark(this, "StubRoutines", "catch_exception"); | |
| 329 | |
| 330 address start = __ pc(); | |
| 331 // verify that thread corresponds | |
| 332 __ verify_thread(); | |
| 333 | |
| 334 const Register& temp_reg = Gtemp; | |
| 727 | 335 Address pending_exception_addr (G2_thread, Thread::pending_exception_offset()); |
| 336 Address exception_file_offset_addr(G2_thread, Thread::exception_file_offset ()); | |
| 337 Address exception_line_offset_addr(G2_thread, Thread::exception_line_offset ()); | |
| 0 | 338 |
| 339 // set pending exception | |
| 340 __ verify_oop(Oexception); | |
| 341 __ st_ptr(Oexception, pending_exception_addr); | |
| 342 __ set((intptr_t)__FILE__, temp_reg); | |
| 343 __ st_ptr(temp_reg, exception_file_offset_addr); | |
| 344 __ set((intptr_t)__LINE__, temp_reg); | |
| 345 __ st(temp_reg, exception_line_offset_addr); | |
| 346 | |
| 347 // complete return to VM | |
| 348 assert(StubRoutines::_call_stub_return_address != NULL, "must have been generated before"); | |
| 349 | |
| 727 | 350 AddressLiteral stub_ret(StubRoutines::_call_stub_return_address); |
| 351 __ jump_to(stub_ret, temp_reg); | |
| 0 | 352 __ delayed()->nop(); |
| 353 | |
| 354 return start; | |
| 355 } | |
| 356 | |
| 357 | |
| 358 //---------------------------------------------------------------------------------------------------- | |
| 359 // Continuation point for runtime calls returning with a pending exception | |
| 360 // The pending exception check happened in the runtime or native call stub | |
| 361 // The pending exception in Thread is converted into a Java-level exception | |
| 362 // | |
| 363 // Contract with Java-level exception handler: O0 = exception | |
| 364 // O1 = throwing pc | |
| 365 | |
| 366 address generate_forward_exception() { | |
| 367 StubCodeMark mark(this, "StubRoutines", "forward_exception"); | |
| 368 address start = __ pc(); | |
| 369 | |
| 370 // Upon entry, O7 has the return address returning into Java | |
| 371 // (interpreted or compiled) code; i.e. the return address | |
| 372 // becomes the throwing pc. | |
| 373 | |
| 374 const Register& handler_reg = Gtemp; | |
| 375 | |
| 727 | 376 Address exception_addr(G2_thread, Thread::pending_exception_offset()); |
| 0 | 377 |
| 378 #ifdef ASSERT | |
| 379 // make sure that this code is only executed if there is a pending exception | |
| 380 { Label L; | |
| 381 __ ld_ptr(exception_addr, Gtemp); | |
| 3839 | 382 __ br_notnull_short(Gtemp, Assembler::pt, L); |
| 0 | 383 __ stop("StubRoutines::forward exception: no pending exception (1)"); |
| 384 __ bind(L); | |
| 385 } | |
| 386 #endif | |
| 387 | |
| 388 // compute exception handler into handler_reg | |
| 389 __ get_thread(); | |
| 390 __ ld_ptr(exception_addr, Oexception); | |
| 391 __ verify_oop(Oexception); | |
| 392 __ save_frame(0); // compensates for compiler weakness | |
| 393 __ add(O7->after_save(), frame::pc_return_offset, Lscratch); // save the issuing PC | |
| 394 BLOCK_COMMENT("call exception_handler_for_return_address"); | |
| 1295 | 395 __ call_VM_leaf(L7_thread_cache, CAST_FROM_FN_PTR(address, SharedRuntime::exception_handler_for_return_address), G2_thread, Lscratch); |
| 0 | 396 __ mov(O0, handler_reg); |
| 397 __ restore(); // compensates for compiler weakness | |
| 398 | |
| 399 __ ld_ptr(exception_addr, Oexception); | |
| 400 __ add(O7, frame::pc_return_offset, Oissuing_pc); // save the issuing PC | |
| 401 | |
| 402 #ifdef ASSERT | |
| 403 // make sure exception is set | |
| 404 { Label L; | |
| 3839 | 405 __ br_notnull_short(Oexception, Assembler::pt, L); |
| 0 | 406 __ stop("StubRoutines::forward exception: no pending exception (2)"); |
| 407 __ bind(L); | |
| 408 } | |
| 409 #endif | |
| 410 // jump to exception handler | |
| 411 __ jmp(handler_reg, 0); | |
| 412 // clear pending exception | |
| 413 __ delayed()->st_ptr(G0, exception_addr); | |
| 414 | |
| 415 return start; | |
| 416 } | |
| 417 | |
| 418 | |
| 419 //------------------------------------------------------------------------------------------------------------------------ | |
| 420 // Continuation point for throwing of implicit exceptions that are not handled in | |
| 421 // the current activation. Fabricates an exception oop and initiates normal | |
| 422 // exception dispatching in this frame. Only callee-saved registers are preserved | |
| 423 // (through the normal register window / RegisterMap handling). | |
| 424 // If the compiler needs all registers to be preserved between the fault | |
| 425 // point and the exception handler then it must assume responsibility for that in | |
| 426 // AbstractCompiler::continuation_for_implicit_null_exception or | |
| 427 // continuation_for_implicit_division_by_zero_exception. All other implicit | |
| 428 // exceptions (e.g., NullPointerException or AbstractMethodError on entry) are | |
| 429 // either at call sites or otherwise assume that stack unwinding will be initiated, | |
| 430 // so caller saved registers were assumed volatile in the compiler. | |
| 431 | |
| 432 // Note that we generate only this stub into a RuntimeStub, because it needs to be | |
| 433 // properly traversed and ignored during GC, so we change the meaning of the "__" | |
| 434 // macro within this method. | |
| 435 #undef __ | |
| 436 #define __ masm-> | |
| 437 | |
| 3937 | 438 address generate_throw_exception(const char* name, address runtime_entry, |
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439 Register arg1 = noreg, Register arg2 = noreg) { |
| 0 | 440 #ifdef ASSERT |
| 441 int insts_size = VerifyThread ? 1 * K : 600; | |
| 442 #else | |
| 443 int insts_size = VerifyThread ? 1 * K : 256; | |
| 444 #endif /* ASSERT */ | |
| 445 int locs_size = 32; | |
| 446 | |
| 447 CodeBuffer code(name, insts_size, locs_size); | |
| 448 MacroAssembler* masm = new MacroAssembler(&code); | |
| 449 | |
| 450 __ verify_thread(); | |
| 451 | |
| 452 // This is an inlined and slightly modified version of call_VM | |
| 453 // which has the ability to fetch the return PC out of thread-local storage | |
| 454 __ assert_not_delayed(); | |
| 455 | |
| 456 // Note that we always push a frame because on the SPARC | |
| 457 // architecture, for all of our implicit exception kinds at call | |
| 458 // sites, the implicit exception is taken before the callee frame | |
| 459 // is pushed. | |
| 460 __ save_frame(0); | |
| 461 | |
| 462 int frame_complete = __ offset(); | |
| 463 | |
| 464 // Note that we always have a runtime stub frame on the top of stack by this point | |
| 465 Register last_java_sp = SP; | |
| 466 // 64-bit last_java_sp is biased! | |
| 467 __ set_last_Java_frame(last_java_sp, G0); | |
| 468 if (VerifyThread) __ mov(G2_thread, O0); // about to be smashed; pass early | |
| 469 __ save_thread(noreg); | |
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470 if (arg1 != noreg) { |
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471 assert(arg2 != O1, "clobbered"); |
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472 __ mov(arg1, O1); |
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473 } |
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474 if (arg2 != noreg) { |
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475 __ mov(arg2, O2); |
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476 } |
| 0 | 477 // do the call |
| 478 BLOCK_COMMENT("call runtime_entry"); | |
| 479 __ call(runtime_entry, relocInfo::runtime_call_type); | |
| 480 if (!VerifyThread) | |
| 481 __ delayed()->mov(G2_thread, O0); // pass thread as first argument | |
| 482 else | |
| 483 __ delayed()->nop(); // (thread already passed) | |
| 484 __ restore_thread(noreg); | |
| 485 __ reset_last_Java_frame(); | |
| 486 | |
| 487 // check for pending exceptions. use Gtemp as scratch register. | |
| 488 #ifdef ASSERT | |
| 489 Label L; | |
| 490 | |
| 727 | 491 Address exception_addr(G2_thread, Thread::pending_exception_offset()); |
| 0 | 492 Register scratch_reg = Gtemp; |
| 493 __ ld_ptr(exception_addr, scratch_reg); | |
| 3839 | 494 __ br_notnull_short(scratch_reg, Assembler::pt, L); |
| 0 | 495 __ should_not_reach_here(); |
| 496 __ bind(L); | |
| 497 #endif // ASSERT | |
| 498 BLOCK_COMMENT("call forward_exception_entry"); | |
| 499 __ call(StubRoutines::forward_exception_entry(), relocInfo::runtime_call_type); | |
| 500 // we use O7 linkage so that forward_exception_entry has the issuing PC | |
| 501 __ delayed()->restore(); | |
| 502 | |
| 503 RuntimeStub* stub = RuntimeStub::new_runtime_stub(name, &code, frame_complete, masm->total_frame_size_in_bytes(0), NULL, false); | |
| 504 return stub->entry_point(); | |
| 505 } | |
| 506 | |
| 507 #undef __ | |
| 508 #define __ _masm-> | |
| 509 | |
| 510 | |
| 511 // Generate a routine that sets all the registers so we | |
| 512 // can tell if the stop routine prints them correctly. | |
| 513 address generate_test_stop() { | |
| 514 StubCodeMark mark(this, "StubRoutines", "test_stop"); | |
| 515 address start = __ pc(); | |
| 516 | |
| 517 int i; | |
| 518 | |
| 519 __ save_frame(0); | |
| 520 | |
| 521 static jfloat zero = 0.0, one = 1.0; | |
| 522 | |
| 523 // put addr in L0, then load through L0 to F0 | |
| 524 __ set((intptr_t)&zero, L0); __ ldf( FloatRegisterImpl::S, L0, 0, F0); | |
| 525 __ set((intptr_t)&one, L0); __ ldf( FloatRegisterImpl::S, L0, 0, F1); // 1.0 to F1 | |
| 526 | |
| 527 // use add to put 2..18 in F2..F18 | |
| 528 for ( i = 2; i <= 18; ++i ) { | |
| 529 __ fadd( FloatRegisterImpl::S, F1, as_FloatRegister(i-1), as_FloatRegister(i)); | |
| 530 } | |
| 531 | |
| 532 // Now put double 2 in F16, double 18 in F18 | |
| 533 __ ftof( FloatRegisterImpl::S, FloatRegisterImpl::D, F2, F16 ); | |
| 534 __ ftof( FloatRegisterImpl::S, FloatRegisterImpl::D, F18, F18 ); | |
| 535 | |
| 536 // use add to put 20..32 in F20..F32 | |
| 537 for (i = 20; i < 32; i += 2) { | |
| 538 __ fadd( FloatRegisterImpl::D, F16, as_FloatRegister(i-2), as_FloatRegister(i)); | |
| 539 } | |
| 540 | |
| 541 // put 0..7 in i's, 8..15 in l's, 16..23 in o's, 24..31 in g's | |
| 542 for ( i = 0; i < 8; ++i ) { | |
| 543 if (i < 6) { | |
| 544 __ set( i, as_iRegister(i)); | |
| 545 __ set(16 + i, as_oRegister(i)); | |
| 546 __ set(24 + i, as_gRegister(i)); | |
| 547 } | |
| 548 __ set( 8 + i, as_lRegister(i)); | |
| 549 } | |
| 550 | |
| 551 __ stop("testing stop"); | |
| 552 | |
| 553 | |
| 554 __ ret(); | |
| 555 __ delayed()->restore(); | |
| 556 | |
| 557 return start; | |
| 558 } | |
| 559 | |
| 560 | |
| 561 address generate_stop_subroutine() { | |
| 562 StubCodeMark mark(this, "StubRoutines", "stop_subroutine"); | |
| 563 address start = __ pc(); | |
| 564 | |
| 565 __ stop_subroutine(); | |
| 566 | |
| 567 return start; | |
| 568 } | |
| 569 | |
| 570 address generate_flush_callers_register_windows() { | |
| 571 StubCodeMark mark(this, "StubRoutines", "flush_callers_register_windows"); | |
| 572 address start = __ pc(); | |
| 573 | |
| 574 __ flush_windows(); | |
| 575 __ retl(false); | |
| 576 __ delayed()->add( FP, STACK_BIAS, O0 ); | |
| 577 // The returned value must be a stack pointer whose register save area | |
| 578 // is flushed, and will stay flushed while the caller executes. | |
| 579 | |
| 580 return start; | |
| 581 } | |
| 582 | |
| 583 // Helper functions for v8 atomic operations. | |
| 584 // | |
| 585 void get_v8_oop_lock_ptr(Register lock_ptr_reg, Register mark_oop_reg, Register scratch_reg) { | |
| 586 if (mark_oop_reg == noreg) { | |
| 587 address lock_ptr = (address)StubRoutines::Sparc::atomic_memory_operation_lock_addr(); | |
| 588 __ set((intptr_t)lock_ptr, lock_ptr_reg); | |
| 589 } else { | |
| 590 assert(scratch_reg != noreg, "just checking"); | |
| 591 address lock_ptr = (address)StubRoutines::Sparc::_v8_oop_lock_cache; | |
| 592 __ set((intptr_t)lock_ptr, lock_ptr_reg); | |
| 593 __ and3(mark_oop_reg, StubRoutines::Sparc::v8_oop_lock_mask_in_place, scratch_reg); | |
| 594 __ add(lock_ptr_reg, scratch_reg, lock_ptr_reg); | |
| 595 } | |
| 596 } | |
| 597 | |
| 598 void generate_v8_lock_prologue(Register lock_reg, Register lock_ptr_reg, Register yield_reg, Label& retry, Label& dontyield, Register mark_oop_reg = noreg, Register scratch_reg = noreg) { | |
| 599 | |
| 600 get_v8_oop_lock_ptr(lock_ptr_reg, mark_oop_reg, scratch_reg); | |
| 601 __ set(StubRoutines::Sparc::locked, lock_reg); | |
| 602 // Initialize yield counter | |
| 603 __ mov(G0,yield_reg); | |
| 604 | |
| 605 __ BIND(retry); | |
| 3839 | 606 __ cmp_and_br_short(yield_reg, V8AtomicOperationUnderLockSpinCount, Assembler::less, Assembler::pt, dontyield); |
| 0 | 607 |
| 608 // This code can only be called from inside the VM, this | |
| 609 // stub is only invoked from Atomic::add(). We do not | |
| 610 // want to use call_VM, because _last_java_sp and such | |
| 611 // must already be set. | |
| 612 // | |
| 613 // Save the regs and make space for a C call | |
| 614 __ save(SP, -96, SP); | |
| 615 __ save_all_globals_into_locals(); | |
| 616 BLOCK_COMMENT("call os::naked_sleep"); | |
| 617 __ call(CAST_FROM_FN_PTR(address, os::naked_sleep)); | |
| 618 __ delayed()->nop(); | |
| 619 __ restore_globals_from_locals(); | |
| 620 __ restore(); | |
| 621 // reset the counter | |
| 622 __ mov(G0,yield_reg); | |
| 623 | |
| 624 __ BIND(dontyield); | |
| 625 | |
| 626 // try to get lock | |
| 627 __ swap(lock_ptr_reg, 0, lock_reg); | |
| 628 | |
| 629 // did we get the lock? | |
| 630 __ cmp(lock_reg, StubRoutines::Sparc::unlocked); | |
| 631 __ br(Assembler::notEqual, true, Assembler::pn, retry); | |
| 632 __ delayed()->add(yield_reg,1,yield_reg); | |
| 633 | |
| 634 // yes, got lock. do the operation here. | |
| 635 } | |
| 636 | |
| 637 void generate_v8_lock_epilogue(Register lock_reg, Register lock_ptr_reg, Register yield_reg, Label& retry, Label& dontyield, Register mark_oop_reg = noreg, Register scratch_reg = noreg) { | |
| 638 __ st(lock_reg, lock_ptr_reg, 0); // unlock | |
| 639 } | |
| 640 | |
| 641 // Support for jint Atomic::xchg(jint exchange_value, volatile jint* dest). | |
| 642 // | |
| 643 // Arguments : | |
| 644 // | |
| 645 // exchange_value: O0 | |
| 646 // dest: O1 | |
| 647 // | |
| 648 // Results: | |
| 649 // | |
| 650 // O0: the value previously stored in dest | |
| 651 // | |
| 652 address generate_atomic_xchg() { | |
| 653 StubCodeMark mark(this, "StubRoutines", "atomic_xchg"); | |
| 654 address start = __ pc(); | |
| 655 | |
| 656 if (UseCASForSwap) { | |
| 657 // Use CAS instead of swap, just in case the MP hardware | |
| 658 // prefers to work with just one kind of synch. instruction. | |
| 659 Label retry; | |
| 660 __ BIND(retry); | |
| 661 __ mov(O0, O3); // scratch copy of exchange value | |
| 662 __ ld(O1, 0, O2); // observe the previous value | |
| 663 // try to replace O2 with O3 | |
| 664 __ cas_under_lock(O1, O2, O3, | |
| 665 (address)StubRoutines::Sparc::atomic_memory_operation_lock_addr(),false); | |
| 3839 | 666 __ cmp_and_br_short(O2, O3, Assembler::notEqual, Assembler::pn, retry); |
| 0 | 667 |
| 668 __ retl(false); | |
| 669 __ delayed()->mov(O2, O0); // report previous value to caller | |
| 670 | |
| 671 } else { | |
| 672 if (VM_Version::v9_instructions_work()) { | |
| 673 __ retl(false); | |
| 674 __ delayed()->swap(O1, 0, O0); | |
| 675 } else { | |
| 676 const Register& lock_reg = O2; | |
| 677 const Register& lock_ptr_reg = O3; | |
| 678 const Register& yield_reg = O4; | |
| 679 | |
| 680 Label retry; | |
| 681 Label dontyield; | |
| 682 | |
| 683 generate_v8_lock_prologue(lock_reg, lock_ptr_reg, yield_reg, retry, dontyield); | |
| 684 // got the lock, do the swap | |
| 685 __ swap(O1, 0, O0); | |
| 686 | |
| 687 generate_v8_lock_epilogue(lock_reg, lock_ptr_reg, yield_reg, retry, dontyield); | |
| 688 __ retl(false); | |
| 689 __ delayed()->nop(); | |
| 690 } | |
| 691 } | |
| 692 | |
| 693 return start; | |
| 694 } | |
| 695 | |
| 696 | |
| 697 // Support for jint Atomic::cmpxchg(jint exchange_value, volatile jint* dest, jint compare_value) | |
| 698 // | |
| 699 // Arguments : | |
| 700 // | |
| 701 // exchange_value: O0 | |
| 702 // dest: O1 | |
| 703 // compare_value: O2 | |
| 704 // | |
| 705 // Results: | |
| 706 // | |
| 707 // O0: the value previously stored in dest | |
| 708 // | |
| 709 // Overwrites (v8): O3,O4,O5 | |
| 710 // | |
| 711 address generate_atomic_cmpxchg() { | |
| 712 StubCodeMark mark(this, "StubRoutines", "atomic_cmpxchg"); | |
| 713 address start = __ pc(); | |
| 714 | |
| 715 // cmpxchg(dest, compare_value, exchange_value) | |
| 716 __ cas_under_lock(O1, O2, O0, | |
| 717 (address)StubRoutines::Sparc::atomic_memory_operation_lock_addr(),false); | |
| 718 __ retl(false); | |
| 719 __ delayed()->nop(); | |
| 720 | |
| 721 return start; | |
| 722 } | |
| 723 | |
| 724 // Support for jlong Atomic::cmpxchg(jlong exchange_value, volatile jlong *dest, jlong compare_value) | |
| 725 // | |
| 726 // Arguments : | |
| 727 // | |
| 728 // exchange_value: O1:O0 | |
| 729 // dest: O2 | |
| 730 // compare_value: O4:O3 | |
| 731 // | |
| 732 // Results: | |
| 733 // | |
| 734 // O1:O0: the value previously stored in dest | |
| 735 // | |
| 736 // This only works on V9, on V8 we don't generate any | |
| 737 // code and just return NULL. | |
| 738 // | |
| 739 // Overwrites: G1,G2,G3 | |
| 740 // | |
| 741 address generate_atomic_cmpxchg_long() { | |
| 742 StubCodeMark mark(this, "StubRoutines", "atomic_cmpxchg_long"); | |
| 743 address start = __ pc(); | |
| 744 | |
| 745 if (!VM_Version::supports_cx8()) | |
| 746 return NULL;; | |
| 747 __ sllx(O0, 32, O0); | |
| 748 __ srl(O1, 0, O1); | |
| 749 __ or3(O0,O1,O0); // O0 holds 64-bit value from compare_value | |
| 750 __ sllx(O3, 32, O3); | |
| 751 __ srl(O4, 0, O4); | |
| 752 __ or3(O3,O4,O3); // O3 holds 64-bit value from exchange_value | |
| 753 __ casx(O2, O3, O0); | |
| 754 __ srl(O0, 0, O1); // unpacked return value in O1:O0 | |
| 755 __ retl(false); | |
| 756 __ delayed()->srlx(O0, 32, O0); | |
| 757 | |
| 758 return start; | |
| 759 } | |
| 760 | |
| 761 | |
| 762 // Support for jint Atomic::add(jint add_value, volatile jint* dest). | |
| 763 // | |
| 764 // Arguments : | |
| 765 // | |
| 766 // add_value: O0 (e.g., +1 or -1) | |
| 767 // dest: O1 | |
| 768 // | |
| 769 // Results: | |
| 770 // | |
| 771 // O0: the new value stored in dest | |
| 772 // | |
| 773 // Overwrites (v9): O3 | |
| 774 // Overwrites (v8): O3,O4,O5 | |
| 775 // | |
| 776 address generate_atomic_add() { | |
| 777 StubCodeMark mark(this, "StubRoutines", "atomic_add"); | |
| 778 address start = __ pc(); | |
| 779 __ BIND(_atomic_add_stub); | |
| 780 | |
| 781 if (VM_Version::v9_instructions_work()) { | |
| 782 Label(retry); | |
| 783 __ BIND(retry); | |
| 784 | |
| 785 __ lduw(O1, 0, O2); | |
| 3839 | 786 __ add(O0, O2, O3); |
| 787 __ cas(O1, O2, O3); | |
| 788 __ cmp_and_br_short(O2, O3, Assembler::notEqual, Assembler::pn, retry); | |
| 0 | 789 __ retl(false); |
| 790 __ delayed()->add(O0, O2, O0); // note that cas made O2==O3 | |
| 791 } else { | |
| 792 const Register& lock_reg = O2; | |
| 793 const Register& lock_ptr_reg = O3; | |
| 794 const Register& value_reg = O4; | |
| 795 const Register& yield_reg = O5; | |
| 796 | |
| 797 Label(retry); | |
| 798 Label(dontyield); | |
| 799 | |
| 800 generate_v8_lock_prologue(lock_reg, lock_ptr_reg, yield_reg, retry, dontyield); | |
| 801 // got lock, do the increment | |
| 802 __ ld(O1, 0, value_reg); | |
| 803 __ add(O0, value_reg, value_reg); | |
| 804 __ st(value_reg, O1, 0); | |
| 805 | |
| 806 // %%% only for RMO and PSO | |
| 807 __ membar(Assembler::StoreStore); | |
| 808 | |
| 809 generate_v8_lock_epilogue(lock_reg, lock_ptr_reg, yield_reg, retry, dontyield); | |
| 810 | |
| 811 __ retl(false); | |
| 812 __ delayed()->mov(value_reg, O0); | |
| 813 } | |
| 814 | |
| 815 return start; | |
| 816 } | |
| 817 Label _atomic_add_stub; // called from other stubs | |
| 818 | |
| 819 | |
| 820 //------------------------------------------------------------------------------------------------------------------------ | |
| 821 // The following routine generates a subroutine to throw an asynchronous | |
| 822 // UnknownError when an unsafe access gets a fault that could not be | |
| 823 // reasonably prevented by the programmer. (Example: SIGBUS/OBJERR.) | |
| 824 // | |
| 825 // Arguments : | |
| 826 // | |
| 827 // trapping PC: O7 | |
| 828 // | |
| 829 // Results: | |
| 830 // posts an asynchronous exception, skips the trapping instruction | |
| 831 // | |
| 832 | |
| 833 address generate_handler_for_unsafe_access() { | |
| 834 StubCodeMark mark(this, "StubRoutines", "handler_for_unsafe_access"); | |
| 835 address start = __ pc(); | |
| 836 | |
| 837 const int preserve_register_words = (64 * 2); | |
| 727 | 838 Address preserve_addr(FP, (-preserve_register_words * wordSize) + STACK_BIAS); |
| 0 | 839 |
| 840 Register Lthread = L7_thread_cache; | |
| 841 int i; | |
| 842 | |
| 843 __ save_frame(0); | |
| 844 __ mov(G1, L1); | |
| 845 __ mov(G2, L2); | |
| 846 __ mov(G3, L3); | |
| 847 __ mov(G4, L4); | |
| 848 __ mov(G5, L5); | |
| 849 for (i = 0; i < (VM_Version::v9_instructions_work() ? 64 : 32); i += 2) { | |
| 850 __ stf(FloatRegisterImpl::D, as_FloatRegister(i), preserve_addr, i * wordSize); | |
| 851 } | |
| 852 | |
| 853 address entry_point = CAST_FROM_FN_PTR(address, handle_unsafe_access); | |
| 854 BLOCK_COMMENT("call handle_unsafe_access"); | |
| 855 __ call(entry_point, relocInfo::runtime_call_type); | |
| 856 __ delayed()->nop(); | |
| 857 | |
| 858 __ mov(L1, G1); | |
| 859 __ mov(L2, G2); | |
| 860 __ mov(L3, G3); | |
| 861 __ mov(L4, G4); | |
| 862 __ mov(L5, G5); | |
| 863 for (i = 0; i < (VM_Version::v9_instructions_work() ? 64 : 32); i += 2) { | |
| 864 __ ldf(FloatRegisterImpl::D, preserve_addr, as_FloatRegister(i), i * wordSize); | |
| 865 } | |
| 866 | |
| 867 __ verify_thread(); | |
| 868 | |
| 869 __ jmp(O0, 0); | |
| 870 __ delayed()->restore(); | |
| 871 | |
| 872 return start; | |
| 873 } | |
| 874 | |
| 875 | |
| 876 // Support for uint StubRoutine::Sparc::partial_subtype_check( Klass sub, Klass super ); | |
| 877 // Arguments : | |
| 878 // | |
| 879 // ret : O0, returned | |
| 880 // icc/xcc: set as O0 (depending on wordSize) | |
| 881 // sub : O1, argument, not changed | |
| 882 // super: O2, argument, not changed | |
| 883 // raddr: O7, blown by call | |
| 884 address generate_partial_subtype_check() { | |
|
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885 __ align(CodeEntryAlignment); |
| 0 | 886 StubCodeMark mark(this, "StubRoutines", "partial_subtype_check"); |
| 887 address start = __ pc(); | |
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888 Label miss; |
| 0 | 889 |
| 890 #if defined(COMPILER2) && !defined(_LP64) | |
| 891 // Do not use a 'save' because it blows the 64-bit O registers. | |
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892 __ add(SP,-4*wordSize,SP); // Make space for 4 temps (stack must be 2 words aligned) |
| 0 | 893 __ st_ptr(L0,SP,(frame::register_save_words+0)*wordSize); |
| 894 __ st_ptr(L1,SP,(frame::register_save_words+1)*wordSize); | |
| 895 __ st_ptr(L2,SP,(frame::register_save_words+2)*wordSize); | |
| 896 __ st_ptr(L3,SP,(frame::register_save_words+3)*wordSize); | |
| 897 Register Rret = O0; | |
| 898 Register Rsub = O1; | |
| 899 Register Rsuper = O2; | |
| 900 #else | |
| 901 __ save_frame(0); | |
| 902 Register Rret = I0; | |
| 903 Register Rsub = I1; | |
| 904 Register Rsuper = I2; | |
| 905 #endif | |
| 906 | |
| 907 Register L0_ary_len = L0; | |
| 908 Register L1_ary_ptr = L1; | |
| 909 Register L2_super = L2; | |
| 910 Register L3_index = L3; | |
| 911 | |
|
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912 __ check_klass_subtype_slow_path(Rsub, Rsuper, |
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913 L0, L1, L2, L3, |
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914 NULL, &miss); |
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915 |
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916 // Match falls through here. |
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917 __ addcc(G0,0,Rret); // set Z flags, Z result |
| 0 | 918 |
| 919 #if defined(COMPILER2) && !defined(_LP64) | |
| 920 __ ld_ptr(SP,(frame::register_save_words+0)*wordSize,L0); | |
| 921 __ ld_ptr(SP,(frame::register_save_words+1)*wordSize,L1); | |
| 922 __ ld_ptr(SP,(frame::register_save_words+2)*wordSize,L2); | |
| 923 __ ld_ptr(SP,(frame::register_save_words+3)*wordSize,L3); | |
| 924 __ retl(); // Result in Rret is zero; flags set to Z | |
| 925 __ delayed()->add(SP,4*wordSize,SP); | |
| 926 #else | |
| 927 __ ret(); // Result in Rret is zero; flags set to Z | |
| 928 __ delayed()->restore(); | |
| 929 #endif | |
| 930 | |
| 931 __ BIND(miss); | |
| 932 __ addcc(G0,1,Rret); // set NZ flags, NZ result | |
| 933 | |
| 934 #if defined(COMPILER2) && !defined(_LP64) | |
| 935 __ ld_ptr(SP,(frame::register_save_words+0)*wordSize,L0); | |
| 936 __ ld_ptr(SP,(frame::register_save_words+1)*wordSize,L1); | |
| 937 __ ld_ptr(SP,(frame::register_save_words+2)*wordSize,L2); | |
| 938 __ ld_ptr(SP,(frame::register_save_words+3)*wordSize,L3); | |
| 939 __ retl(); // Result in Rret is != 0; flags set to NZ | |
| 940 __ delayed()->add(SP,4*wordSize,SP); | |
| 941 #else | |
| 942 __ ret(); // Result in Rret is != 0; flags set to NZ | |
| 943 __ delayed()->restore(); | |
| 944 #endif | |
| 945 | |
| 946 return start; | |
| 947 } | |
| 948 | |
| 949 | |
| 950 // Called from MacroAssembler::verify_oop | |
| 951 // | |
| 952 address generate_verify_oop_subroutine() { | |
| 953 StubCodeMark mark(this, "StubRoutines", "verify_oop_stub"); | |
| 954 | |
| 955 address start = __ pc(); | |
| 956 | |
| 957 __ verify_oop_subroutine(); | |
| 958 | |
| 959 return start; | |
| 960 } | |
| 961 | |
| 962 | |
| 963 // | |
| 964 // Verify that a register contains clean 32-bits positive value | |
| 965 // (high 32-bits are 0) so it could be used in 64-bits shifts (sllx, srax). | |
| 966 // | |
| 967 // Input: | |
| 968 // Rint - 32-bits value | |
| 969 // Rtmp - scratch | |
| 970 // | |
| 971 void assert_clean_int(Register Rint, Register Rtmp) { | |
| 972 #if defined(ASSERT) && defined(_LP64) | |
| 973 __ signx(Rint, Rtmp); | |
| 974 __ cmp(Rint, Rtmp); | |
| 975 __ breakpoint_trap(Assembler::notEqual, Assembler::xcc); | |
| 976 #endif | |
| 977 } | |
| 978 | |
| 979 // | |
| 980 // Generate overlap test for array copy stubs | |
| 981 // | |
| 982 // Input: | |
| 983 // O0 - array1 | |
| 984 // O1 - array2 | |
| 985 // O2 - element count | |
| 986 // | |
| 987 // Kills temps: O3, O4 | |
| 988 // | |
| 989 void array_overlap_test(address no_overlap_target, int log2_elem_size) { | |
| 990 assert(no_overlap_target != NULL, "must be generated"); | |
| 991 array_overlap_test(no_overlap_target, NULL, log2_elem_size); | |
| 992 } | |
| 993 void array_overlap_test(Label& L_no_overlap, int log2_elem_size) { | |
| 994 array_overlap_test(NULL, &L_no_overlap, log2_elem_size); | |
| 995 } | |
| 996 void array_overlap_test(address no_overlap_target, Label* NOLp, int log2_elem_size) { | |
| 997 const Register from = O0; | |
| 998 const Register to = O1; | |
| 999 const Register count = O2; | |
| 1000 const Register to_from = O3; // to - from | |
| 1001 const Register byte_count = O4; // count << log2_elem_size | |
| 1002 | |
| 1003 __ subcc(to, from, to_from); | |
| 1004 __ sll_ptr(count, log2_elem_size, byte_count); | |
| 1005 if (NOLp == NULL) | |
| 1006 __ brx(Assembler::lessEqualUnsigned, false, Assembler::pt, no_overlap_target); | |
| 1007 else | |
| 1008 __ brx(Assembler::lessEqualUnsigned, false, Assembler::pt, (*NOLp)); | |
| 1009 __ delayed()->cmp(to_from, byte_count); | |
| 1010 if (NOLp == NULL) | |
|
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1011 __ brx(Assembler::greaterEqualUnsigned, false, Assembler::pt, no_overlap_target); |
| 0 | 1012 else |
|
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1013 __ brx(Assembler::greaterEqualUnsigned, false, Assembler::pt, (*NOLp)); |
| 0 | 1014 __ delayed()->nop(); |
| 1015 } | |
| 1016 | |
| 1017 // | |
| 1018 // Generate pre-write barrier for array. | |
| 1019 // | |
| 1020 // Input: | |
| 1021 // addr - register containing starting address | |
| 1022 // count - register containing element count | |
| 1023 // tmp - scratch register | |
| 1024 // | |
| 1025 // The input registers are overwritten. | |
| 1026 // | |
| 2324 | 1027 void gen_write_ref_array_pre_barrier(Register addr, Register count, bool dest_uninitialized) { |
| 0 | 1028 BarrierSet* bs = Universe::heap()->barrier_set(); |
| 2324 | 1029 switch (bs->kind()) { |
| 1030 case BarrierSet::G1SATBCT: | |
| 1031 case BarrierSet::G1SATBCTLogging: | |
| 1032 // With G1, don't generate the call if we statically know that the target in uninitialized | |
| 1033 if (!dest_uninitialized) { | |
| 1034 __ save_frame(0); | |
| 1035 // Save the necessary global regs... will be used after. | |
| 1036 if (addr->is_global()) { | |
| 1037 __ mov(addr, L0); | |
| 1038 } | |
| 1039 if (count->is_global()) { | |
| 1040 __ mov(count, L1); | |
| 1041 } | |
| 1042 __ mov(addr->after_save(), O0); | |
| 1043 // Get the count into O1 | |
| 1044 __ call(CAST_FROM_FN_PTR(address, BarrierSet::static_write_ref_array_pre)); | |
| 1045 __ delayed()->mov(count->after_save(), O1); | |
| 1046 if (addr->is_global()) { | |
| 1047 __ mov(L0, addr); | |
| 1048 } | |
| 1049 if (count->is_global()) { | |
| 1050 __ mov(L1, count); | |
| 1051 } | |
| 1052 __ restore(); | |
| 1053 } | |
| 1054 break; | |
| 1055 case BarrierSet::CardTableModRef: | |
| 1056 case BarrierSet::CardTableExtension: | |
| 1057 case BarrierSet::ModRef: | |
| 1058 break; | |
| 1059 default: | |
| 1060 ShouldNotReachHere(); | |
| 0 | 1061 } |
| 1062 } | |
| 1063 // | |
| 1064 // Generate post-write barrier for array. | |
| 1065 // | |
| 1066 // Input: | |
| 1067 // addr - register containing starting address | |
| 1068 // count - register containing element count | |
| 1069 // tmp - scratch register | |
| 1070 // | |
| 1071 // The input registers are overwritten. | |
| 1072 // | |
| 1073 void gen_write_ref_array_post_barrier(Register addr, Register count, | |
| 2324 | 1074 Register tmp) { |
| 0 | 1075 BarrierSet* bs = Universe::heap()->barrier_set(); |
| 1076 | |
| 1077 switch (bs->kind()) { | |
| 1078 case BarrierSet::G1SATBCT: | |
| 1079 case BarrierSet::G1SATBCTLogging: | |
| 1080 { | |
| 1081 // Get some new fresh output registers. | |
| 1082 __ save_frame(0); | |
|
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1083 __ mov(addr->after_save(), O0); |
| 0 | 1084 __ call(CAST_FROM_FN_PTR(address, BarrierSet::static_write_ref_array_post)); |
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1085 __ delayed()->mov(count->after_save(), O1); |
| 0 | 1086 __ restore(); |
| 1087 } | |
| 1088 break; | |
| 1089 case BarrierSet::CardTableModRef: | |
| 1090 case BarrierSet::CardTableExtension: | |
| 1091 { | |
| 1092 CardTableModRefBS* ct = (CardTableModRefBS*)bs; | |
| 1093 assert(sizeof(*ct->byte_map_base) == sizeof(jbyte), "adjust this code"); | |
| 1094 assert_different_registers(addr, count, tmp); | |
| 1095 | |
| 1096 Label L_loop; | |
| 1097 | |
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1098 __ sll_ptr(count, LogBytesPerHeapOop, count); |
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1099 __ sub(count, BytesPerHeapOop, count); |
| 0 | 1100 __ add(count, addr, count); |
| 1101 // Use two shifts to clear out those low order two bits! (Cannot opt. into 1.) | |
| 1102 __ srl_ptr(addr, CardTableModRefBS::card_shift, addr); | |
| 1103 __ srl_ptr(count, CardTableModRefBS::card_shift, count); | |
| 1104 __ sub(count, addr, count); | |
| 727 | 1105 AddressLiteral rs(ct->byte_map_base); |
| 1106 __ set(rs, tmp); | |
| 0 | 1107 __ BIND(L_loop); |
| 727 | 1108 __ stb(G0, tmp, addr); |
| 0 | 1109 __ subcc(count, 1, count); |
| 1110 __ brx(Assembler::greaterEqual, false, Assembler::pt, L_loop); | |
| 1111 __ delayed()->add(addr, 1, addr); | |
| 727 | 1112 } |
| 0 | 1113 break; |
| 1114 case BarrierSet::ModRef: | |
| 1115 break; | |
| 727 | 1116 default: |
| 0 | 1117 ShouldNotReachHere(); |
| 1118 } | |
| 1119 } | |
| 1120 | |
| 3903 | 1121 // |
| 1122 // Generate main code for disjoint arraycopy | |
| 1123 // | |
| 1124 typedef void (StubGenerator::*CopyLoopFunc)(Register from, Register to, Register count, int count_dec, | |
| 1125 Label& L_loop, bool use_prefetch, bool use_bis); | |
| 1126 | |
| 1127 void disjoint_copy_core(Register from, Register to, Register count, int log2_elem_size, | |
| 1128 int iter_size, CopyLoopFunc copy_loop_func) { | |
| 1129 Label L_copy; | |
| 1130 | |
| 1131 assert(log2_elem_size <= 3, "the following code should be changed"); | |
| 1132 int count_dec = 16>>log2_elem_size; | |
| 1133 | |
| 1134 int prefetch_dist = MAX2(ArraycopySrcPrefetchDistance, ArraycopyDstPrefetchDistance); | |
| 1135 assert(prefetch_dist < 4096, "invalid value"); | |
| 1136 prefetch_dist = (prefetch_dist + (iter_size-1)) & (-iter_size); // round up to one iteration copy size | |
| 1137 int prefetch_count = (prefetch_dist >> log2_elem_size); // elements count | |
| 1138 | |
| 1139 if (UseBlockCopy) { | |
| 1140 Label L_block_copy, L_block_copy_prefetch, L_skip_block_copy; | |
| 1141 | |
| 1142 // 64 bytes tail + bytes copied in one loop iteration | |
| 1143 int tail_size = 64 + iter_size; | |
| 1144 int block_copy_count = (MAX2(tail_size, (int)BlockCopyLowLimit)) >> log2_elem_size; | |
| 1145 // Use BIS copy only for big arrays since it requires membar. | |
| 1146 __ set(block_copy_count, O4); | |
| 1147 __ cmp_and_br_short(count, O4, Assembler::lessUnsigned, Assembler::pt, L_skip_block_copy); | |
| 1148 // This code is for disjoint source and destination: | |
| 1149 // to <= from || to >= from+count | |
| 1150 // but BIS will stomp over 'from' if (to > from-tail_size && to <= from) | |
| 1151 __ sub(from, to, O4); | |
| 1152 __ srax(O4, 4, O4); // divide by 16 since following short branch have only 5 bits for imm. | |
| 1153 __ cmp_and_br_short(O4, (tail_size>>4), Assembler::lessEqualUnsigned, Assembler::pn, L_skip_block_copy); | |
| 1154 | |
| 1155 __ wrasi(G0, Assembler::ASI_ST_BLKINIT_PRIMARY); | |
| 1156 // BIS should not be used to copy tail (64 bytes+iter_size) | |
| 1157 // to avoid zeroing of following values. | |
| 1158 __ sub(count, (tail_size>>log2_elem_size), count); // count is still positive >= 0 | |
| 1159 | |
| 1160 if (prefetch_count > 0) { // rounded up to one iteration count | |
| 1161 // Do prefetching only if copy size is bigger | |
| 1162 // than prefetch distance. | |
| 1163 __ set(prefetch_count, O4); | |
| 1164 __ cmp_and_brx_short(count, O4, Assembler::less, Assembler::pt, L_block_copy); | |
| 1165 __ sub(count, prefetch_count, count); | |
| 1166 | |
| 1167 (this->*copy_loop_func)(from, to, count, count_dec, L_block_copy_prefetch, true, true); | |
| 1168 __ add(count, prefetch_count, count); // restore count | |
| 1169 | |
| 1170 } // prefetch_count > 0 | |
| 1171 | |
| 1172 (this->*copy_loop_func)(from, to, count, count_dec, L_block_copy, false, true); | |
| 1173 __ add(count, (tail_size>>log2_elem_size), count); // restore count | |
| 1174 | |
| 1175 __ wrasi(G0, Assembler::ASI_PRIMARY_NOFAULT); | |
| 1176 // BIS needs membar. | |
| 1177 __ membar(Assembler::StoreLoad); | |
| 1178 // Copy tail | |
| 1179 __ ba_short(L_copy); | |
| 1180 | |
| 1181 __ BIND(L_skip_block_copy); | |
| 1182 } // UseBlockCopy | |
| 1183 | |
| 1184 if (prefetch_count > 0) { // rounded up to one iteration count | |
| 1185 // Do prefetching only if copy size is bigger | |
| 1186 // than prefetch distance. | |
| 1187 __ set(prefetch_count, O4); | |
| 1188 __ cmp_and_brx_short(count, O4, Assembler::lessUnsigned, Assembler::pt, L_copy); | |
| 1189 __ sub(count, prefetch_count, count); | |
| 1190 | |
| 1191 Label L_copy_prefetch; | |
| 1192 (this->*copy_loop_func)(from, to, count, count_dec, L_copy_prefetch, true, false); | |
| 1193 __ add(count, prefetch_count, count); // restore count | |
| 1194 | |
| 1195 } // prefetch_count > 0 | |
| 1196 | |
| 1197 (this->*copy_loop_func)(from, to, count, count_dec, L_copy, false, false); | |
| 1198 } | |
| 1199 | |
| 1200 | |
| 1201 | |
| 1202 // | |
| 1203 // Helper methods for copy_16_bytes_forward_with_shift() | |
| 1204 // | |
| 1205 void copy_16_bytes_shift_loop(Register from, Register to, Register count, int count_dec, | |
| 1206 Label& L_loop, bool use_prefetch, bool use_bis) { | |
| 1207 | |
| 1208 const Register left_shift = G1; // left shift bit counter | |
| 1209 const Register right_shift = G5; // right shift bit counter | |
| 1210 | |
| 1211 __ align(OptoLoopAlignment); | |
| 1212 __ BIND(L_loop); | |
| 1213 if (use_prefetch) { | |
| 1214 if (ArraycopySrcPrefetchDistance > 0) { | |
| 1215 __ prefetch(from, ArraycopySrcPrefetchDistance, Assembler::severalReads); | |
| 1216 } | |
| 1217 if (ArraycopyDstPrefetchDistance > 0) { | |
| 1218 __ prefetch(to, ArraycopyDstPrefetchDistance, Assembler::severalWritesAndPossiblyReads); | |
| 1219 } | |
| 1220 } | |
| 1221 __ ldx(from, 0, O4); | |
| 1222 __ ldx(from, 8, G4); | |
| 1223 __ inc(to, 16); | |
| 1224 __ inc(from, 16); | |
| 1225 __ deccc(count, count_dec); // Can we do next iteration after this one? | |
| 1226 __ srlx(O4, right_shift, G3); | |
| 1227 __ bset(G3, O3); | |
| 1228 __ sllx(O4, left_shift, O4); | |
| 1229 __ srlx(G4, right_shift, G3); | |
| 1230 __ bset(G3, O4); | |
| 1231 if (use_bis) { | |
| 1232 __ stxa(O3, to, -16); | |
| 1233 __ stxa(O4, to, -8); | |
| 1234 } else { | |
| 1235 __ stx(O3, to, -16); | |
| 1236 __ stx(O4, to, -8); | |
| 1237 } | |
| 1238 __ brx(Assembler::greaterEqual, false, Assembler::pt, L_loop); | |
| 1239 __ delayed()->sllx(G4, left_shift, O3); | |
| 1240 } | |
| 0 | 1241 |
| 1242 // Copy big chunks forward with shift | |
| 1243 // | |
| 1244 // Inputs: | |
| 1245 // from - source arrays | |
| 1246 // to - destination array aligned to 8-bytes | |
| 1247 // count - elements count to copy >= the count equivalent to 16 bytes | |
| 1248 // count_dec - elements count's decrement equivalent to 16 bytes | |
| 1249 // L_copy_bytes - copy exit label | |
| 1250 // | |
| 1251 void copy_16_bytes_forward_with_shift(Register from, Register to, | |
| 3903 | 1252 Register count, int log2_elem_size, Label& L_copy_bytes) { |
| 1253 Label L_aligned_copy, L_copy_last_bytes; | |
| 1254 assert(log2_elem_size <= 3, "the following code should be changed"); | |
| 1255 int count_dec = 16>>log2_elem_size; | |
| 0 | 1256 |
| 1257 // if both arrays have the same alignment mod 8, do 8 bytes aligned copy | |
| 3903 | 1258 __ andcc(from, 7, G1); // misaligned bytes |
| 1259 __ br(Assembler::zero, false, Assembler::pt, L_aligned_copy); | |
| 1260 __ delayed()->nop(); | |
| 0 | 1261 |
| 1262 const Register left_shift = G1; // left shift bit counter | |
| 1263 const Register right_shift = G5; // right shift bit counter | |
| 1264 | |
| 3903 | 1265 __ sll(G1, LogBitsPerByte, left_shift); |
| 1266 __ mov(64, right_shift); | |
| 1267 __ sub(right_shift, left_shift, right_shift); | |
| 0 | 1268 |
| 1269 // | |
| 1270 // Load 2 aligned 8-bytes chunks and use one from previous iteration | |
| 1271 // to form 2 aligned 8-bytes chunks to store. | |
| 1272 // | |
| 3903 | 1273 __ dec(count, count_dec); // Pre-decrement 'count' |
| 1274 __ andn(from, 7, from); // Align address | |
| 1275 __ ldx(from, 0, O3); | |
| 1276 __ inc(from, 8); | |
| 1277 __ sllx(O3, left_shift, O3); | |
| 1278 | |
| 1279 disjoint_copy_core(from, to, count, log2_elem_size, 16, copy_16_bytes_shift_loop); | |
| 1280 | |
| 1281 __ inccc(count, count_dec>>1 ); // + 8 bytes | |
| 1282 __ brx(Assembler::negative, true, Assembler::pn, L_copy_last_bytes); | |
| 1283 __ delayed()->inc(count, count_dec>>1); // restore 'count' | |
| 1284 | |
| 1285 // copy 8 bytes, part of them already loaded in O3 | |
| 1286 __ ldx(from, 0, O4); | |
| 1287 __ inc(to, 8); | |
| 1288 __ inc(from, 8); | |
| 1289 __ srlx(O4, right_shift, G3); | |
| 1290 __ bset(O3, G3); | |
| 1291 __ stx(G3, to, -8); | |
| 0 | 1292 |
| 1293 __ BIND(L_copy_last_bytes); | |
| 3903 | 1294 __ srl(right_shift, LogBitsPerByte, right_shift); // misaligned bytes |
| 1295 __ br(Assembler::always, false, Assembler::pt, L_copy_bytes); | |
| 1296 __ delayed()->sub(from, right_shift, from); // restore address | |
| 0 | 1297 |
| 1298 __ BIND(L_aligned_copy); | |
| 1299 } | |
| 1300 | |
| 1301 // Copy big chunks backward with shift | |
| 1302 // | |
| 1303 // Inputs: | |
| 1304 // end_from - source arrays end address | |
| 1305 // end_to - destination array end address aligned to 8-bytes | |
| 1306 // count - elements count to copy >= the count equivalent to 16 bytes | |
| 1307 // count_dec - elements count's decrement equivalent to 16 bytes | |
| 1308 // L_aligned_copy - aligned copy exit label | |
| 1309 // L_copy_bytes - copy exit label | |
| 1310 // | |
| 1311 void copy_16_bytes_backward_with_shift(Register end_from, Register end_to, | |
| 1312 Register count, int count_dec, | |
| 1313 Label& L_aligned_copy, Label& L_copy_bytes) { | |
| 1314 Label L_loop, L_copy_last_bytes; | |
| 1315 | |
| 1316 // if both arrays have the same alignment mod 8, do 8 bytes aligned copy | |
| 1317 __ andcc(end_from, 7, G1); // misaligned bytes | |
| 1318 __ br(Assembler::zero, false, Assembler::pt, L_aligned_copy); | |
| 1319 __ delayed()->deccc(count, count_dec); // Pre-decrement 'count' | |
| 1320 | |
| 1321 const Register left_shift = G1; // left shift bit counter | |
| 1322 const Register right_shift = G5; // right shift bit counter | |
| 1323 | |
| 1324 __ sll(G1, LogBitsPerByte, left_shift); | |
| 1325 __ mov(64, right_shift); | |
| 1326 __ sub(right_shift, left_shift, right_shift); | |
| 1327 | |
| 1328 // | |
| 1329 // Load 2 aligned 8-bytes chunks and use one from previous iteration | |
| 1330 // to form 2 aligned 8-bytes chunks to store. | |
| 1331 // | |
| 1332 __ andn(end_from, 7, end_from); // Align address | |
| 1333 __ ldx(end_from, 0, O3); | |
| 1365 | 1334 __ align(OptoLoopAlignment); |
| 0 | 1335 __ BIND(L_loop); |
| 1336 __ ldx(end_from, -8, O4); | |
| 1337 __ deccc(count, count_dec); // Can we do next iteration after this one? | |
| 1338 __ ldx(end_from, -16, G4); | |
| 1339 __ dec(end_to, 16); | |
| 1340 __ dec(end_from, 16); | |
| 1341 __ srlx(O3, right_shift, O3); | |
| 1342 __ sllx(O4, left_shift, G3); | |
| 1343 __ bset(G3, O3); | |
| 1344 __ stx(O3, end_to, 8); | |
| 1345 __ srlx(O4, right_shift, O4); | |
| 1346 __ sllx(G4, left_shift, G3); | |
| 1347 __ bset(G3, O4); | |
| 1348 __ stx(O4, end_to, 0); | |
| 1349 __ brx(Assembler::greaterEqual, false, Assembler::pt, L_loop); | |
| 1350 __ delayed()->mov(G4, O3); | |
| 1351 | |
| 1352 __ inccc(count, count_dec>>1 ); // + 8 bytes | |
| 1353 __ brx(Assembler::negative, true, Assembler::pn, L_copy_last_bytes); | |
| 1354 __ delayed()->inc(count, count_dec>>1); // restore 'count' | |
| 1355 | |
| 1356 // copy 8 bytes, part of them already loaded in O3 | |
| 1357 __ ldx(end_from, -8, O4); | |
| 1358 __ dec(end_to, 8); | |
| 1359 __ dec(end_from, 8); | |
| 1360 __ srlx(O3, right_shift, O3); | |
| 1361 __ sllx(O4, left_shift, G3); | |
| 1362 __ bset(O3, G3); | |
| 1363 __ stx(G3, end_to, 0); | |
| 1364 | |
| 1365 __ BIND(L_copy_last_bytes); | |
| 1366 __ srl(left_shift, LogBitsPerByte, left_shift); // misaligned bytes | |
| 1367 __ br(Assembler::always, false, Assembler::pt, L_copy_bytes); | |
| 1368 __ delayed()->add(end_from, left_shift, end_from); // restore address | |
| 1369 } | |
| 1370 | |
| 1371 // | |
| 1372 // Generate stub for disjoint byte copy. If "aligned" is true, the | |
| 1373 // "from" and "to" addresses are assumed to be heapword aligned. | |
| 1374 // | |
| 1375 // Arguments for generated stub: | |
| 1376 // from: O0 | |
| 1377 // to: O1 | |
| 1378 // count: O2 treated as signed | |
| 1379 // | |
|
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1380 address generate_disjoint_byte_copy(bool aligned, address *entry, const char *name) { |
| 0 | 1381 __ align(CodeEntryAlignment); |
| 1382 StubCodeMark mark(this, "StubRoutines", name); | |
| 1383 address start = __ pc(); | |
| 1384 | |
| 1385 Label L_skip_alignment, L_align; | |
| 1386 Label L_copy_byte, L_copy_byte_loop, L_exit; | |
| 1387 | |
| 1388 const Register from = O0; // source array address | |
| 1389 const Register to = O1; // destination array address | |
| 1390 const Register count = O2; // elements count | |
| 1391 const Register offset = O5; // offset from start of arrays | |
| 1392 // O3, O4, G3, G4 are used as temp registers | |
| 1393 | |
| 1394 assert_clean_int(count, O3); // Make sure 'count' is clean int. | |
| 1395 | |
|
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1396 if (entry != NULL) { |
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1397 *entry = __ pc(); |
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1398 // caller can pass a 64-bit byte count here (from Unsafe.copyMemory) |
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1399 BLOCK_COMMENT("Entry:"); |
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1400 } |
| 0 | 1401 |
| 1402 // for short arrays, just do single element copy | |
| 1403 __ cmp(count, 23); // 16 + 7 | |
| 1404 __ brx(Assembler::less, false, Assembler::pn, L_copy_byte); | |
| 1405 __ delayed()->mov(G0, offset); | |
| 1406 | |
| 1407 if (aligned) { | |
| 1408 // 'aligned' == true when it is known statically during compilation | |
| 1409 // of this arraycopy call site that both 'from' and 'to' addresses | |
| 1410 // are HeapWordSize aligned (see LibraryCallKit::basictype2arraycopy()). | |
| 1411 // | |
| 1412 // Aligned arrays have 4 bytes alignment in 32-bits VM | |
| 1413 // and 8 bytes - in 64-bits VM. So we do it only for 32-bits VM | |
| 1414 // | |
| 1415 #ifndef _LP64 | |
| 1416 // copy a 4-bytes word if necessary to align 'to' to 8 bytes | |
| 1417 __ andcc(to, 7, G0); | |
| 1418 __ br(Assembler::zero, false, Assembler::pn, L_skip_alignment); | |
| 1419 __ delayed()->ld(from, 0, O3); | |
| 1420 __ inc(from, 4); | |
| 1421 __ inc(to, 4); | |
| 1422 __ dec(count, 4); | |
| 1423 __ st(O3, to, -4); | |
| 1424 __ BIND(L_skip_alignment); | |
| 1425 #endif | |
| 1426 } else { | |
| 1427 // copy bytes to align 'to' on 8 byte boundary | |
| 1428 __ andcc(to, 7, G1); // misaligned bytes | |
| 1429 __ br(Assembler::zero, false, Assembler::pt, L_skip_alignment); | |
| 1430 __ delayed()->neg(G1); | |
| 1431 __ inc(G1, 8); // bytes need to copy to next 8-bytes alignment | |
| 1432 __ sub(count, G1, count); | |
| 1433 __ BIND(L_align); | |
| 1434 __ ldub(from, 0, O3); | |
| 1435 __ deccc(G1); | |
| 1436 __ inc(from); | |
| 1437 __ stb(O3, to, 0); | |
| 1438 __ br(Assembler::notZero, false, Assembler::pt, L_align); | |
| 1439 __ delayed()->inc(to); | |
| 1440 __ BIND(L_skip_alignment); | |
| 1441 } | |
| 1442 #ifdef _LP64 | |
| 1443 if (!aligned) | |
| 1444 #endif | |
| 1445 { | |
| 1446 // Copy with shift 16 bytes per iteration if arrays do not have | |
| 1447 // the same alignment mod 8, otherwise fall through to the next | |
| 1448 // code for aligned copy. | |
| 1449 // The compare above (count >= 23) guarantes 'count' >= 16 bytes. | |
| 1450 // Also jump over aligned copy after the copy with shift completed. | |
| 1451 | |
| 3903 | 1452 copy_16_bytes_forward_with_shift(from, to, count, 0, L_copy_byte); |
| 0 | 1453 } |
| 1454 | |
| 1455 // Both array are 8 bytes aligned, copy 16 bytes at a time | |
| 1456 __ and3(count, 7, G4); // Save count | |
| 1457 __ srl(count, 3, count); | |
| 1458 generate_disjoint_long_copy_core(aligned); | |
| 1459 __ mov(G4, count); // Restore count | |
| 1460 | |
| 1461 // copy tailing bytes | |
| 1462 __ BIND(L_copy_byte); | |
| 3839 | 1463 __ cmp_and_br_short(count, 0, Assembler::equal, Assembler::pt, L_exit); |
| 1365 | 1464 __ align(OptoLoopAlignment); |
| 0 | 1465 __ BIND(L_copy_byte_loop); |
| 1466 __ ldub(from, offset, O3); | |
| 1467 __ deccc(count); | |
| 1468 __ stb(O3, to, offset); | |
| 1469 __ brx(Assembler::notZero, false, Assembler::pt, L_copy_byte_loop); | |
| 1470 __ delayed()->inc(offset); | |
| 1471 | |
| 1472 __ BIND(L_exit); | |
| 1473 // O3, O4 are used as temp registers | |
| 1474 inc_counter_np(SharedRuntime::_jbyte_array_copy_ctr, O3, O4); | |
| 1475 __ retl(); | |
| 1476 __ delayed()->mov(G0, O0); // return 0 | |
| 1477 return start; | |
| 1478 } | |
| 1479 | |
| 1480 // | |
| 1481 // Generate stub for conjoint byte copy. If "aligned" is true, the | |
| 1482 // "from" and "to" addresses are assumed to be heapword aligned. | |
| 1483 // | |
| 1484 // Arguments for generated stub: | |
| 1485 // from: O0 | |
| 1486 // to: O1 | |
| 1487 // count: O2 treated as signed | |
| 1488 // | |
|
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1489 address generate_conjoint_byte_copy(bool aligned, address nooverlap_target, |
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1490 address *entry, const char *name) { |
| 0 | 1491 // Do reverse copy. |
| 1492 | |
| 1493 __ align(CodeEntryAlignment); | |
| 1494 StubCodeMark mark(this, "StubRoutines", name); | |
| 1495 address start = __ pc(); | |
| 1496 | |
| 1497 Label L_skip_alignment, L_align, L_aligned_copy; | |
| 1498 Label L_copy_byte, L_copy_byte_loop, L_exit; | |
| 1499 | |
| 1500 const Register from = O0; // source array address | |
| 1501 const Register to = O1; // destination array address | |
| 1502 const Register count = O2; // elements count | |
| 1503 const Register end_from = from; // source array end address | |
| 1504 const Register end_to = to; // destination array end address | |
| 1505 | |
| 1506 assert_clean_int(count, O3); // Make sure 'count' is clean int. | |
| 1507 | |
|
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1508 if (entry != NULL) { |
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1509 *entry = __ pc(); |
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1510 // caller can pass a 64-bit byte count here (from Unsafe.copyMemory) |
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1511 BLOCK_COMMENT("Entry:"); |
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1512 } |
| 0 | 1513 |
| 1514 array_overlap_test(nooverlap_target, 0); | |
| 1515 | |
| 1516 __ add(to, count, end_to); // offset after last copied element | |
| 1517 | |
| 1518 // for short arrays, just do single element copy | |
| 1519 __ cmp(count, 23); // 16 + 7 | |
| 1520 __ brx(Assembler::less, false, Assembler::pn, L_copy_byte); | |
| 1521 __ delayed()->add(from, count, end_from); | |
| 1522 | |
| 1523 { | |
| 1524 // Align end of arrays since they could be not aligned even | |
| 1525 // when arrays itself are aligned. | |
| 1526 | |
| 1527 // copy bytes to align 'end_to' on 8 byte boundary | |
| 1528 __ andcc(end_to, 7, G1); // misaligned bytes | |
| 1529 __ br(Assembler::zero, false, Assembler::pt, L_skip_alignment); | |
| 1530 __ delayed()->nop(); | |
| 1531 __ sub(count, G1, count); | |
| 1532 __ BIND(L_align); | |
| 1533 __ dec(end_from); | |
| 1534 __ dec(end_to); | |
| 1535 __ ldub(end_from, 0, O3); | |
| 1536 __ deccc(G1); | |
| 1537 __ brx(Assembler::notZero, false, Assembler::pt, L_align); | |
| 1538 __ delayed()->stb(O3, end_to, 0); | |
| 1539 __ BIND(L_skip_alignment); | |
| 1540 } | |
| 1541 #ifdef _LP64 | |
| 1542 if (aligned) { | |
| 1543 // Both arrays are aligned to 8-bytes in 64-bits VM. | |
| 1544 // The 'count' is decremented in copy_16_bytes_backward_with_shift() | |
| 1545 // in unaligned case. | |
| 1546 __ dec(count, 16); | |
| 1547 } else | |
| 1548 #endif | |
| 1549 { | |
| 1550 // Copy with shift 16 bytes per iteration if arrays do not have | |
| 1551 // the same alignment mod 8, otherwise jump to the next | |
| 1552 // code for aligned copy (and substracting 16 from 'count' before jump). | |
| 1553 // The compare above (count >= 11) guarantes 'count' >= 16 bytes. | |
| 1554 // Also jump over aligned copy after the copy with shift completed. | |
| 1555 | |
| 1556 copy_16_bytes_backward_with_shift(end_from, end_to, count, 16, | |
| 1557 L_aligned_copy, L_copy_byte); | |
| 1558 } | |
| 1559 // copy 4 elements (16 bytes) at a time | |
| 1365 | 1560 __ align(OptoLoopAlignment); |
| 0 | 1561 __ BIND(L_aligned_copy); |
| 1562 __ dec(end_from, 16); | |
| 1563 __ ldx(end_from, 8, O3); | |
| 1564 __ ldx(end_from, 0, O4); | |
| 1565 __ dec(end_to, 16); | |
| 1566 __ deccc(count, 16); | |
| 1567 __ stx(O3, end_to, 8); | |
| 1568 __ brx(Assembler::greaterEqual, false, Assembler::pt, L_aligned_copy); | |
| 1569 __ delayed()->stx(O4, end_to, 0); | |
| 1570 __ inc(count, 16); | |
| 1571 | |
| 1572 // copy 1 element (2 bytes) at a time | |
| 1573 __ BIND(L_copy_byte); | |
| 3839 | 1574 __ cmp_and_br_short(count, 0, Assembler::equal, Assembler::pt, L_exit); |
| 1365 | 1575 __ align(OptoLoopAlignment); |
| 0 | 1576 __ BIND(L_copy_byte_loop); |
| 1577 __ dec(end_from); | |
| 1578 __ dec(end_to); | |
| 1579 __ ldub(end_from, 0, O4); | |
| 1580 __ deccc(count); | |
| 1581 __ brx(Assembler::greater, false, Assembler::pt, L_copy_byte_loop); | |
| 1582 __ delayed()->stb(O4, end_to, 0); | |
| 1583 | |
| 1584 __ BIND(L_exit); | |
| 1585 // O3, O4 are used as temp registers | |
| 1586 inc_counter_np(SharedRuntime::_jbyte_array_copy_ctr, O3, O4); | |
| 1587 __ retl(); | |
| 1588 __ delayed()->mov(G0, O0); // return 0 | |
| 1589 return start; | |
| 1590 } | |
| 1591 | |
| 1592 // | |
| 1593 // Generate stub for disjoint short copy. If "aligned" is true, the | |
| 1594 // "from" and "to" addresses are assumed to be heapword aligned. | |
| 1595 // | |
| 1596 // Arguments for generated stub: | |
| 1597 // from: O0 | |
| 1598 // to: O1 | |
| 1599 // count: O2 treated as signed | |
| 1600 // | |
|
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1601 address generate_disjoint_short_copy(bool aligned, address *entry, const char * name) { |
| 0 | 1602 __ align(CodeEntryAlignment); |
| 1603 StubCodeMark mark(this, "StubRoutines", name); | |
| 1604 address start = __ pc(); | |
| 1605 | |
| 1606 Label L_skip_alignment, L_skip_alignment2; | |
| 1607 Label L_copy_2_bytes, L_copy_2_bytes_loop, L_exit; | |
| 1608 | |
| 1609 const Register from = O0; // source array address | |
| 1610 const Register to = O1; // destination array address | |
| 1611 const Register count = O2; // elements count | |
| 1612 const Register offset = O5; // offset from start of arrays | |
| 1613 // O3, O4, G3, G4 are used as temp registers | |
| 1614 | |
| 1615 assert_clean_int(count, O3); // Make sure 'count' is clean int. | |
| 1616 | |
|
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1617 if (entry != NULL) { |
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1618 *entry = __ pc(); |
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1619 // caller can pass a 64-bit byte count here (from Unsafe.copyMemory) |
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1620 BLOCK_COMMENT("Entry:"); |
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1621 } |
| 0 | 1622 |
| 1623 // for short arrays, just do single element copy | |
| 1624 __ cmp(count, 11); // 8 + 3 (22 bytes) | |
| 1625 __ brx(Assembler::less, false, Assembler::pn, L_copy_2_bytes); | |
| 1626 __ delayed()->mov(G0, offset); | |
| 1627 | |
| 1628 if (aligned) { | |
| 1629 // 'aligned' == true when it is known statically during compilation | |
| 1630 // of this arraycopy call site that both 'from' and 'to' addresses | |
| 1631 // are HeapWordSize aligned (see LibraryCallKit::basictype2arraycopy()). | |
| 1632 // | |
| 1633 // Aligned arrays have 4 bytes alignment in 32-bits VM | |
| 1634 // and 8 bytes - in 64-bits VM. | |
| 1635 // | |
| 1636 #ifndef _LP64 | |
| 1637 // copy a 2-elements word if necessary to align 'to' to 8 bytes | |
| 1638 __ andcc(to, 7, G0); | |
| 1639 __ br(Assembler::zero, false, Assembler::pt, L_skip_alignment); | |
| 1640 __ delayed()->ld(from, 0, O3); | |
| 1641 __ inc(from, 4); | |
| 1642 __ inc(to, 4); | |
| 1643 __ dec(count, 2); | |
| 1644 __ st(O3, to, -4); | |
| 1645 __ BIND(L_skip_alignment); | |
| 1646 #endif | |
| 1647 } else { | |
| 1648 // copy 1 element if necessary to align 'to' on an 4 bytes | |
| 1649 __ andcc(to, 3, G0); | |
| 1650 __ br(Assembler::zero, false, Assembler::pt, L_skip_alignment); | |
| 1651 __ delayed()->lduh(from, 0, O3); | |
| 1652 __ inc(from, 2); | |
| 1653 __ inc(to, 2); | |
| 1654 __ dec(count); | |
| 1655 __ sth(O3, to, -2); | |
| 1656 __ BIND(L_skip_alignment); | |
| 1657 | |
| 1658 // copy 2 elements to align 'to' on an 8 byte boundary | |
| 1659 __ andcc(to, 7, G0); | |
| 1660 __ br(Assembler::zero, false, Assembler::pn, L_skip_alignment2); | |
| 1661 __ delayed()->lduh(from, 0, O3); | |
| 1662 __ dec(count, 2); | |
| 1663 __ lduh(from, 2, O4); | |
| 1664 __ inc(from, 4); | |
| 1665 __ inc(to, 4); | |
| 1666 __ sth(O3, to, -4); | |
| 1667 __ sth(O4, to, -2); | |
| 1668 __ BIND(L_skip_alignment2); | |
| 1669 } | |
| 1670 #ifdef _LP64 | |
| 1671 if (!aligned) | |
| 1672 #endif | |
| 1673 { | |
| 1674 // Copy with shift 16 bytes per iteration if arrays do not have | |
| 1675 // the same alignment mod 8, otherwise fall through to the next | |
| 1676 // code for aligned copy. | |
| 1677 // The compare above (count >= 11) guarantes 'count' >= 16 bytes. | |
| 1678 // Also jump over aligned copy after the copy with shift completed. | |
| 1679 | |
| 3903 | 1680 copy_16_bytes_forward_with_shift(from, to, count, 1, L_copy_2_bytes); |
| 0 | 1681 } |
| 1682 | |
| 1683 // Both array are 8 bytes aligned, copy 16 bytes at a time | |
| 1684 __ and3(count, 3, G4); // Save | |
| 1685 __ srl(count, 2, count); | |
| 1686 generate_disjoint_long_copy_core(aligned); | |
| 1687 __ mov(G4, count); // restore | |
| 1688 | |
| 1689 // copy 1 element at a time | |
| 1690 __ BIND(L_copy_2_bytes); | |
| 3839 | 1691 __ cmp_and_br_short(count, 0, Assembler::equal, Assembler::pt, L_exit); |
| 1365 | 1692 __ align(OptoLoopAlignment); |
| 0 | 1693 __ BIND(L_copy_2_bytes_loop); |
| 1694 __ lduh(from, offset, O3); | |
| 1695 __ deccc(count); | |
| 1696 __ sth(O3, to, offset); | |
| 1697 __ brx(Assembler::notZero, false, Assembler::pt, L_copy_2_bytes_loop); | |
| 1698 __ delayed()->inc(offset, 2); | |
| 1699 | |
| 1700 __ BIND(L_exit); | |
| 1701 // O3, O4 are used as temp registers | |
| 1702 inc_counter_np(SharedRuntime::_jshort_array_copy_ctr, O3, O4); | |
| 1703 __ retl(); | |
| 1704 __ delayed()->mov(G0, O0); // return 0 | |
| 1705 return start; | |
| 1706 } | |
| 1707 | |
| 1708 // | |
| 1763 | 1709 // Generate stub for disjoint short fill. If "aligned" is true, the |
| 1710 // "to" address is assumed to be heapword aligned. | |
| 1711 // | |
| 1712 // Arguments for generated stub: | |
| 1713 // to: O0 | |
| 1714 // value: O1 | |
| 1715 // count: O2 treated as signed | |
| 1716 // | |
| 1717 address generate_fill(BasicType t, bool aligned, const char* name) { | |
| 1718 __ align(CodeEntryAlignment); | |
| 1719 StubCodeMark mark(this, "StubRoutines", name); | |
| 1720 address start = __ pc(); | |
| 1721 | |
| 1722 const Register to = O0; // source array address | |
| 1723 const Register value = O1; // fill value | |
| 1724 const Register count = O2; // elements count | |
| 1725 // O3 is used as a temp register | |
| 1726 | |
| 1727 assert_clean_int(count, O3); // Make sure 'count' is clean int. | |
| 1728 | |
| 1729 Label L_exit, L_skip_align1, L_skip_align2, L_fill_byte; | |
| 1794 | 1730 Label L_fill_2_bytes, L_fill_elements, L_fill_32_bytes; |
| 1763 | 1731 |
| 1732 int shift = -1; | |
| 1733 switch (t) { | |
| 1734 case T_BYTE: | |
| 1735 shift = 2; | |
| 1736 break; | |
| 1737 case T_SHORT: | |
| 1738 shift = 1; | |
| 1739 break; | |
| 1740 case T_INT: | |
| 1741 shift = 0; | |
| 1742 break; | |
| 1743 default: ShouldNotReachHere(); | |
| 1744 } | |
| 1745 | |
| 1746 BLOCK_COMMENT("Entry:"); | |
| 1747 | |
| 1748 if (t == T_BYTE) { | |
| 1749 // Zero extend value | |
| 1750 __ and3(value, 0xff, value); | |
| 1751 __ sllx(value, 8, O3); | |
| 1752 __ or3(value, O3, value); | |
| 1753 } | |
| 1754 if (t == T_SHORT) { | |
| 1755 // Zero extend value | |
| 1794 | 1756 __ sllx(value, 48, value); |
| 1757 __ srlx(value, 48, value); | |
| 1763 | 1758 } |
| 1759 if (t == T_BYTE || t == T_SHORT) { | |
| 1760 __ sllx(value, 16, O3); | |
| 1761 __ or3(value, O3, value); | |
| 1762 } | |
| 1763 | |
| 1764 __ cmp(count, 2<<shift); // Short arrays (< 8 bytes) fill by element | |
| 1794 | 1765 __ brx(Assembler::lessUnsigned, false, Assembler::pn, L_fill_elements); // use unsigned cmp |
| 1766 __ delayed()->andcc(count, 1, G0); | |
| 1763 | 1767 |
| 1768 if (!aligned && (t == T_BYTE || t == T_SHORT)) { | |
| 1769 // align source address at 4 bytes address boundary | |
| 1770 if (t == T_BYTE) { | |
| 1771 // One byte misalignment happens only for byte arrays | |
| 1772 __ andcc(to, 1, G0); | |
| 1773 __ br(Assembler::zero, false, Assembler::pt, L_skip_align1); | |
| 1774 __ delayed()->nop(); | |
| 1775 __ stb(value, to, 0); | |
| 1776 __ inc(to, 1); | |
| 1777 __ dec(count, 1); | |
| 1778 __ BIND(L_skip_align1); | |
| 1779 } | |
| 1780 // Two bytes misalignment happens only for byte and short (char) arrays | |
| 1781 __ andcc(to, 2, G0); | |
| 1782 __ br(Assembler::zero, false, Assembler::pt, L_skip_align2); | |
| 1783 __ delayed()->nop(); | |
| 1784 __ sth(value, to, 0); | |
| 1785 __ inc(to, 2); | |
| 1786 __ dec(count, 1 << (shift - 1)); | |
| 1787 __ BIND(L_skip_align2); | |
| 1788 } | |
| 1789 #ifdef _LP64 | |
| 1790 if (!aligned) { | |
| 1791 #endif | |
| 1792 // align to 8 bytes, we know we are 4 byte aligned to start | |
| 1793 __ andcc(to, 7, G0); | |
| 1794 __ br(Assembler::zero, false, Assembler::pt, L_fill_32_bytes); | |
| 1795 __ delayed()->nop(); | |
| 1796 __ stw(value, to, 0); | |
| 1797 __ inc(to, 4); | |
| 1798 __ dec(count, 1 << shift); | |
| 1799 __ BIND(L_fill_32_bytes); | |
| 1800 #ifdef _LP64 | |
| 1801 } | |
| 1802 #endif | |
| 1803 | |
| 1804 if (t == T_INT) { | |
| 1805 // Zero extend value | |
| 1806 __ srl(value, 0, value); | |
| 1807 } | |
| 1808 if (t == T_BYTE || t == T_SHORT || t == T_INT) { | |
| 1809 __ sllx(value, 32, O3); | |
| 1810 __ or3(value, O3, value); | |
| 1811 } | |
| 1812 | |
| 1782 | 1813 Label L_check_fill_8_bytes; |
| 1814 // Fill 32-byte chunks | |
| 1815 __ subcc(count, 8 << shift, count); | |
| 1816 __ brx(Assembler::less, false, Assembler::pt, L_check_fill_8_bytes); | |
| 1817 __ delayed()->nop(); | |
| 1818 | |
| 1794 | 1819 Label L_fill_32_bytes_loop, L_fill_4_bytes; |
| 1763 | 1820 __ align(16); |
| 1821 __ BIND(L_fill_32_bytes_loop); | |
| 1822 | |
| 1823 __ stx(value, to, 0); | |
| 1824 __ stx(value, to, 8); | |
| 1825 __ stx(value, to, 16); | |
| 1826 __ stx(value, to, 24); | |
| 1827 | |
| 1828 __ subcc(count, 8 << shift, count); | |
| 1829 __ brx(Assembler::greaterEqual, false, Assembler::pt, L_fill_32_bytes_loop); | |
| 1830 __ delayed()->add(to, 32, to); | |
| 1831 | |
| 1832 __ BIND(L_check_fill_8_bytes); | |
| 1833 __ addcc(count, 8 << shift, count); | |
| 1834 __ brx(Assembler::zero, false, Assembler::pn, L_exit); | |
| 1835 __ delayed()->subcc(count, 1 << (shift + 1), count); | |
| 1836 __ brx(Assembler::less, false, Assembler::pn, L_fill_4_bytes); | |
| 1837 __ delayed()->andcc(count, 1<<shift, G0); | |
| 1838 | |
| 1839 // | |
| 1840 // length is too short, just fill 8 bytes at a time | |
| 1841 // | |
| 1842 Label L_fill_8_bytes_loop; | |
| 1843 __ BIND(L_fill_8_bytes_loop); | |
| 1844 __ stx(value, to, 0); | |
| 1845 __ subcc(count, 1 << (shift + 1), count); | |
| 1846 __ brx(Assembler::greaterEqual, false, Assembler::pn, L_fill_8_bytes_loop); | |
| 1847 __ delayed()->add(to, 8, to); | |
| 1848 | |
| 1849 // fill trailing 4 bytes | |
| 1850 __ andcc(count, 1<<shift, G0); // in delay slot of branches | |
| 1794 | 1851 if (t == T_INT) { |
| 1852 __ BIND(L_fill_elements); | |
| 1853 } | |
| 1763 | 1854 __ BIND(L_fill_4_bytes); |
| 1855 __ brx(Assembler::zero, false, Assembler::pt, L_fill_2_bytes); | |
| 1856 if (t == T_BYTE || t == T_SHORT) { | |
| 1857 __ delayed()->andcc(count, 1<<(shift-1), G0); | |
| 1858 } else { | |
| 1859 __ delayed()->nop(); | |
| 1860 } | |
| 1861 __ stw(value, to, 0); | |
| 1862 if (t == T_BYTE || t == T_SHORT) { | |
| 1863 __ inc(to, 4); | |
| 1864 // fill trailing 2 bytes | |
| 1865 __ andcc(count, 1<<(shift-1), G0); // in delay slot of branches | |
| 1866 __ BIND(L_fill_2_bytes); | |
| 1867 __ brx(Assembler::zero, false, Assembler::pt, L_fill_byte); | |
| 1868 __ delayed()->andcc(count, 1, count); | |
| 1869 __ sth(value, to, 0); | |
| 1870 if (t == T_BYTE) { | |
| 1871 __ inc(to, 2); | |
| 1872 // fill trailing byte | |
| 1873 __ andcc(count, 1, count); // in delay slot of branches | |
| 1874 __ BIND(L_fill_byte); | |
| 1875 __ brx(Assembler::zero, false, Assembler::pt, L_exit); | |
| 1876 __ delayed()->nop(); | |
| 1877 __ stb(value, to, 0); | |
| 1878 } else { | |
| 1879 __ BIND(L_fill_byte); | |
| 1880 } | |
| 1881 } else { | |
| 1882 __ BIND(L_fill_2_bytes); | |
| 1883 } | |
| 1884 __ BIND(L_exit); | |
| 1885 __ retl(); | |
| 1794 | 1886 __ delayed()->nop(); |
| 1887 | |
| 1888 // Handle copies less than 8 bytes. Int is handled elsewhere. | |
| 1889 if (t == T_BYTE) { | |
| 1890 __ BIND(L_fill_elements); | |
| 1891 Label L_fill_2, L_fill_4; | |
| 1892 // in delay slot __ andcc(count, 1, G0); | |
| 1893 __ brx(Assembler::zero, false, Assembler::pt, L_fill_2); | |
| 1894 __ delayed()->andcc(count, 2, G0); | |
| 1895 __ stb(value, to, 0); | |
| 1896 __ inc(to, 1); | |
| 1897 __ BIND(L_fill_2); | |
| 1898 __ brx(Assembler::zero, false, Assembler::pt, L_fill_4); | |
| 1899 __ delayed()->andcc(count, 4, G0); | |
| 1900 __ stb(value, to, 0); | |
| 1901 __ stb(value, to, 1); | |
| 1902 __ inc(to, 2); | |
| 1903 __ BIND(L_fill_4); | |
| 1904 __ brx(Assembler::zero, false, Assembler::pt, L_exit); | |
| 1905 __ delayed()->nop(); | |
| 1906 __ stb(value, to, 0); | |
| 1907 __ stb(value, to, 1); | |
| 1908 __ stb(value, to, 2); | |
| 1909 __ retl(); | |
| 1910 __ delayed()->stb(value, to, 3); | |
| 1911 } | |
| 1912 | |
| 1913 if (t == T_SHORT) { | |
| 1914 Label L_fill_2; | |
| 1915 __ BIND(L_fill_elements); | |
| 1916 // in delay slot __ andcc(count, 1, G0); | |
| 1917 __ brx(Assembler::zero, false, Assembler::pt, L_fill_2); | |
| 1918 __ delayed()->andcc(count, 2, G0); | |
| 1919 __ sth(value, to, 0); | |
| 1920 __ inc(to, 2); | |
| 1921 __ BIND(L_fill_2); | |
| 1922 __ brx(Assembler::zero, false, Assembler::pt, L_exit); | |
| 1923 __ delayed()->nop(); | |
| 1924 __ sth(value, to, 0); | |
| 1925 __ retl(); | |
| 1926 __ delayed()->sth(value, to, 2); | |
| 1927 } | |
| 1763 | 1928 return start; |
| 1929 } | |
| 1930 | |
| 1931 // | |
| 0 | 1932 // Generate stub for conjoint short copy. If "aligned" is true, the |
| 1933 // "from" and "to" addresses are assumed to be heapword aligned. | |
| 1934 // | |
| 1935 // Arguments for generated stub: | |
| 1936 // from: O0 | |
| 1937 // to: O1 | |
| 1938 // count: O2 treated as signed | |
| 1939 // | |
|
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1940 address generate_conjoint_short_copy(bool aligned, address nooverlap_target, |
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1941 address *entry, const char *name) { |
| 0 | 1942 // Do reverse copy. |
| 1943 | |
| 1944 __ align(CodeEntryAlignment); | |
| 1945 StubCodeMark mark(this, "StubRoutines", name); | |
| 1946 address start = __ pc(); | |
| 1947 | |
| 1948 Label L_skip_alignment, L_skip_alignment2, L_aligned_copy; | |
| 1949 Label L_copy_2_bytes, L_copy_2_bytes_loop, L_exit; | |
| 1950 | |
| 1951 const Register from = O0; // source array address | |
| 1952 const Register to = O1; // destination array address | |
| 1953 const Register count = O2; // elements count | |
| 1954 const Register end_from = from; // source array end address | |
| 1955 const Register end_to = to; // destination array end address | |
| 1956 | |
| 1957 const Register byte_count = O3; // bytes count to copy | |
| 1958 | |
| 1959 assert_clean_int(count, O3); // Make sure 'count' is clean int. | |
| 1960 | |
|
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1961 if (entry != NULL) { |
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1962 *entry = __ pc(); |
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1963 // caller can pass a 64-bit byte count here (from Unsafe.copyMemory) |
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1964 BLOCK_COMMENT("Entry:"); |
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1965 } |
| 0 | 1966 |
| 1967 array_overlap_test(nooverlap_target, 1); | |
| 1968 | |
| 1969 __ sllx(count, LogBytesPerShort, byte_count); | |
| 1970 __ add(to, byte_count, end_to); // offset after last copied element | |
| 1971 | |
| 1972 // for short arrays, just do single element copy | |
| 1973 __ cmp(count, 11); // 8 + 3 (22 bytes) | |
| 1974 __ brx(Assembler::less, false, Assembler::pn, L_copy_2_bytes); | |
| 1975 __ delayed()->add(from, byte_count, end_from); | |
| 1976 | |
| 1977 { | |
| 1978 // Align end of arrays since they could be not aligned even | |
| 1979 // when arrays itself are aligned. | |
| 1980 | |
| 1981 // copy 1 element if necessary to align 'end_to' on an 4 bytes | |
| 1982 __ andcc(end_to, 3, G0); | |
| 1983 __ br(Assembler::zero, false, Assembler::pt, L_skip_alignment); | |
| 1984 __ delayed()->lduh(end_from, -2, O3); | |
| 1985 __ dec(end_from, 2); | |
| 1986 __ dec(end_to, 2); | |
| 1987 __ dec(count); | |
| 1988 __ sth(O3, end_to, 0); | |
| 1989 __ BIND(L_skip_alignment); | |
| 1990 | |
| 1991 // copy 2 elements to align 'end_to' on an 8 byte boundary | |
| 1992 __ andcc(end_to, 7, G0); | |
| 1993 __ br(Assembler::zero, false, Assembler::pn, L_skip_alignment2); | |
| 1994 __ delayed()->lduh(end_from, -2, O3); | |
| 1995 __ dec(count, 2); | |
| 1996 __ lduh(end_from, -4, O4); | |
| 1997 __ dec(end_from, 4); | |
| 1998 __ dec(end_to, 4); | |
| 1999 __ sth(O3, end_to, 2); | |
| 2000 __ sth(O4, end_to, 0); | |
| 2001 __ BIND(L_skip_alignment2); | |
| 2002 } | |
| 2003 #ifdef _LP64 | |
| 2004 if (aligned) { | |
| 2005 // Both arrays are aligned to 8-bytes in 64-bits VM. | |
| 2006 // The 'count' is decremented in copy_16_bytes_backward_with_shift() | |
| 2007 // in unaligned case. | |
| 2008 __ dec(count, 8); | |
| 2009 } else | |
| 2010 #endif | |
| 2011 { | |
| 2012 // Copy with shift 16 bytes per iteration if arrays do not have | |
| 2013 // the same alignment mod 8, otherwise jump to the next | |
| 2014 // code for aligned copy (and substracting 8 from 'count' before jump). | |
| 2015 // The compare above (count >= 11) guarantes 'count' >= 16 bytes. | |
| 2016 // Also jump over aligned copy after the copy with shift completed. | |
| 2017 | |
| 2018 copy_16_bytes_backward_with_shift(end_from, end_to, count, 8, | |
| 2019 L_aligned_copy, L_copy_2_bytes); | |
| 2020 } | |
| 2021 // copy 4 elements (16 bytes) at a time | |
| 1365 | 2022 __ align(OptoLoopAlignment); |
| 0 | 2023 __ BIND(L_aligned_copy); |
| 2024 __ dec(end_from, 16); | |
| 2025 __ ldx(end_from, 8, O3); | |
| 2026 __ ldx(end_from, 0, O4); | |
| 2027 __ dec(end_to, 16); | |
| 2028 __ deccc(count, 8); | |
| 2029 __ stx(O3, end_to, 8); | |
| 2030 __ brx(Assembler::greaterEqual, false, Assembler::pt, L_aligned_copy); | |
| 2031 __ delayed()->stx(O4, end_to, 0); | |
| 2032 __ inc(count, 8); | |
| 2033 | |
| 2034 // copy 1 element (2 bytes) at a time | |
| 2035 __ BIND(L_copy_2_bytes); | |
| 3839 | 2036 __ cmp_and_br_short(count, 0, Assembler::equal, Assembler::pt, L_exit); |
| 0 | 2037 __ BIND(L_copy_2_bytes_loop); |
| 2038 __ dec(end_from, 2); | |
| 2039 __ dec(end_to, 2); | |
| 2040 __ lduh(end_from, 0, O4); | |
| 2041 __ deccc(count); | |
| 2042 __ brx(Assembler::greater, false, Assembler::pt, L_copy_2_bytes_loop); | |
| 2043 __ delayed()->sth(O4, end_to, 0); | |
| 2044 | |
| 2045 __ BIND(L_exit); | |
| 2046 // O3, O4 are used as temp registers | |
| 2047 inc_counter_np(SharedRuntime::_jshort_array_copy_ctr, O3, O4); | |
| 2048 __ retl(); | |
| 2049 __ delayed()->mov(G0, O0); // return 0 | |
| 2050 return start; | |
| 2051 } | |
| 2052 | |
| 2053 // | |
| 3903 | 2054 // Helper methods for generate_disjoint_int_copy_core() |
| 2055 // | |
| 2056 void copy_16_bytes_loop(Register from, Register to, Register count, int count_dec, | |
| 2057 Label& L_loop, bool use_prefetch, bool use_bis) { | |
| 2058 | |
| 2059 __ align(OptoLoopAlignment); | |
| 2060 __ BIND(L_loop); | |
| 2061 if (use_prefetch) { | |
| 2062 if (ArraycopySrcPrefetchDistance > 0) { | |
| 2063 __ prefetch(from, ArraycopySrcPrefetchDistance, Assembler::severalReads); | |
| 2064 } | |
| 2065 if (ArraycopyDstPrefetchDistance > 0) { | |
| 2066 __ prefetch(to, ArraycopyDstPrefetchDistance, Assembler::severalWritesAndPossiblyReads); | |
| 2067 } | |
| 2068 } | |
| 2069 __ ldx(from, 4, O4); | |
| 2070 __ ldx(from, 12, G4); | |
| 2071 __ inc(to, 16); | |
| 2072 __ inc(from, 16); | |
| 2073 __ deccc(count, 4); // Can we do next iteration after this one? | |
| 2074 | |
| 2075 __ srlx(O4, 32, G3); | |
| 2076 __ bset(G3, O3); | |
| 2077 __ sllx(O4, 32, O4); | |
| 2078 __ srlx(G4, 32, G3); | |
| 2079 __ bset(G3, O4); | |
| 2080 if (use_bis) { | |
| 2081 __ stxa(O3, to, -16); | |
| 2082 __ stxa(O4, to, -8); | |
| 2083 } else { | |
| 2084 __ stx(O3, to, -16); | |
| 2085 __ stx(O4, to, -8); | |
| 2086 } | |
| 2087 __ brx(Assembler::greaterEqual, false, Assembler::pt, L_loop); | |
| 2088 __ delayed()->sllx(G4, 32, O3); | |
| 2089 | |
| 2090 } | |
| 2091 | |
| 2092 // | |
| 0 | 2093 // Generate core code for disjoint int copy (and oop copy on 32-bit). |
| 2094 // If "aligned" is true, the "from" and "to" addresses are assumed | |
| 2095 // to be heapword aligned. | |
| 2096 // | |
| 2097 // Arguments: | |
| 2098 // from: O0 | |
| 2099 // to: O1 | |
| 2100 // count: O2 treated as signed | |
| 2101 // | |
| 2102 void generate_disjoint_int_copy_core(bool aligned) { | |
| 2103 | |
| 2104 Label L_skip_alignment, L_aligned_copy; | |
| 3903 | 2105 Label L_copy_4_bytes, L_copy_4_bytes_loop, L_exit; |
| 0 | 2106 |
| 2107 const Register from = O0; // source array address | |
| 2108 const Register to = O1; // destination array address | |
| 2109 const Register count = O2; // elements count | |
| 2110 const Register offset = O5; // offset from start of arrays | |
| 2111 // O3, O4, G3, G4 are used as temp registers | |
| 2112 | |
| 2113 // 'aligned' == true when it is known statically during compilation | |
| 2114 // of this arraycopy call site that both 'from' and 'to' addresses | |
| 2115 // are HeapWordSize aligned (see LibraryCallKit::basictype2arraycopy()). | |
| 2116 // | |
| 2117 // Aligned arrays have 4 bytes alignment in 32-bits VM | |
| 2118 // and 8 bytes - in 64-bits VM. | |
| 2119 // | |
| 2120 #ifdef _LP64 | |
| 2121 if (!aligned) | |
| 2122 #endif | |
| 2123 { | |
| 2124 // The next check could be put under 'ifndef' since the code in | |
| 2125 // generate_disjoint_long_copy_core() has own checks and set 'offset'. | |
| 2126 | |
| 2127 // for short arrays, just do single element copy | |
| 2128 __ cmp(count, 5); // 4 + 1 (20 bytes) | |
| 2129 __ brx(Assembler::lessEqual, false, Assembler::pn, L_copy_4_bytes); | |
| 2130 __ delayed()->mov(G0, offset); | |
| 2131 | |
| 2132 // copy 1 element to align 'to' on an 8 byte boundary | |
| 2133 __ andcc(to, 7, G0); | |
| 2134 __ br(Assembler::zero, false, Assembler::pt, L_skip_alignment); | |
| 2135 __ delayed()->ld(from, 0, O3); | |
| 2136 __ inc(from, 4); | |
| 2137 __ inc(to, 4); | |
| 2138 __ dec(count); | |
| 2139 __ st(O3, to, -4); | |
| 2140 __ BIND(L_skip_alignment); | |
| 2141 | |
| 2142 // if arrays have same alignment mod 8, do 4 elements copy | |
| 2143 __ andcc(from, 7, G0); | |
| 2144 __ br(Assembler::zero, false, Assembler::pt, L_aligned_copy); | |
| 2145 __ delayed()->ld(from, 0, O3); | |
| 2146 | |
| 2147 // | |
| 2148 // Load 2 aligned 8-bytes chunks and use one from previous iteration | |
| 2149 // to form 2 aligned 8-bytes chunks to store. | |
| 2150 // | |
| 2151 // copy_16_bytes_forward_with_shift() is not used here since this | |
| 2152 // code is more optimal. | |
| 2153 | |
| 2154 // copy with shift 4 elements (16 bytes) at a time | |
| 2155 __ dec(count, 4); // The cmp at the beginning guaranty count >= 4 | |
| 3903 | 2156 __ sllx(O3, 32, O3); |
| 2157 | |
| 2158 disjoint_copy_core(from, to, count, 2, 16, copy_16_bytes_loop); | |
| 0 | 2159 |
| 2160 __ br(Assembler::always, false, Assembler::pt, L_copy_4_bytes); | |
| 2161 __ delayed()->inc(count, 4); // restore 'count' | |
| 2162 | |
| 2163 __ BIND(L_aligned_copy); | |
| 3903 | 2164 } // !aligned |
| 2165 | |
| 0 | 2166 // copy 4 elements (16 bytes) at a time |
| 2167 __ and3(count, 1, G4); // Save | |
| 2168 __ srl(count, 1, count); | |
| 2169 generate_disjoint_long_copy_core(aligned); | |
| 2170 __ mov(G4, count); // Restore | |
| 2171 | |
| 2172 // copy 1 element at a time | |
| 2173 __ BIND(L_copy_4_bytes); | |
| 3839 | 2174 __ cmp_and_br_short(count, 0, Assembler::equal, Assembler::pt, L_exit); |
| 0 | 2175 __ BIND(L_copy_4_bytes_loop); |
| 2176 __ ld(from, offset, O3); | |
| 2177 __ deccc(count); | |
| 2178 __ st(O3, to, offset); | |
| 2179 __ brx(Assembler::notZero, false, Assembler::pt, L_copy_4_bytes_loop); | |
| 2180 __ delayed()->inc(offset, 4); | |
| 2181 __ BIND(L_exit); | |
| 2182 } | |
| 2183 | |
| 2184 // | |
| 2185 // Generate stub for disjoint int copy. If "aligned" is true, the | |
| 2186 // "from" and "to" addresses are assumed to be heapword aligned. | |
| 2187 // | |
| 2188 // Arguments for generated stub: | |
| 2189 // from: O0 | |
| 2190 // to: O1 | |
| 2191 // count: O2 treated as signed | |
| 2192 // | |
|
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2193 address generate_disjoint_int_copy(bool aligned, address *entry, const char *name) { |
| 0 | 2194 __ align(CodeEntryAlignment); |
| 2195 StubCodeMark mark(this, "StubRoutines", name); | |
| 2196 address start = __ pc(); | |
| 2197 | |
| 2198 const Register count = O2; | |
| 2199 assert_clean_int(count, O3); // Make sure 'count' is clean int. | |
| 2200 | |
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2201 if (entry != NULL) { |
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2202 *entry = __ pc(); |
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2203 // caller can pass a 64-bit byte count here (from Unsafe.copyMemory) |
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2204 BLOCK_COMMENT("Entry:"); |
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2205 } |
| 0 | 2206 |
| 2207 generate_disjoint_int_copy_core(aligned); | |
| 2208 | |
| 2209 // O3, O4 are used as temp registers | |
| 2210 inc_counter_np(SharedRuntime::_jint_array_copy_ctr, O3, O4); | |
| 2211 __ retl(); | |
| 2212 __ delayed()->mov(G0, O0); // return 0 | |
| 2213 return start; | |
| 2214 } | |
| 2215 | |
| 2216 // | |
| 2217 // Generate core code for conjoint int copy (and oop copy on 32-bit). | |
| 2218 // If "aligned" is true, the "from" and "to" addresses are assumed | |
| 2219 // to be heapword aligned. | |
| 2220 // | |
| 2221 // Arguments: | |
| 2222 // from: O0 | |
| 2223 // to: O1 | |
| 2224 // count: O2 treated as signed | |
| 2225 // | |
| 2226 void generate_conjoint_int_copy_core(bool aligned) { | |
| 2227 // Do reverse copy. | |
| 2228 | |
| 2229 Label L_skip_alignment, L_aligned_copy; | |
| 2230 Label L_copy_16_bytes, L_copy_4_bytes, L_copy_4_bytes_loop, L_exit; | |
| 2231 | |
| 2232 const Register from = O0; // source array address | |
| 2233 const Register to = O1; // destination array address | |
| 2234 const Register count = O2; // elements count | |
| 2235 const Register end_from = from; // source array end address | |
| 2236 const Register end_to = to; // destination array end address | |
| 2237 // O3, O4, O5, G3 are used as temp registers | |
| 2238 | |
| 2239 const Register byte_count = O3; // bytes count to copy | |
| 2240 | |
| 2241 __ sllx(count, LogBytesPerInt, byte_count); | |
| 2242 __ add(to, byte_count, end_to); // offset after last copied element | |
| 2243 | |
| 2244 __ cmp(count, 5); // for short arrays, just do single element copy | |
| 2245 __ brx(Assembler::lessEqual, false, Assembler::pn, L_copy_4_bytes); | |
| 2246 __ delayed()->add(from, byte_count, end_from); | |
| 2247 | |
| 2248 // copy 1 element to align 'to' on an 8 byte boundary | |
| 2249 __ andcc(end_to, 7, G0); | |
| 2250 __ br(Assembler::zero, false, Assembler::pt, L_skip_alignment); | |
| 2251 __ delayed()->nop(); | |
| 2252 __ dec(count); | |
| 2253 __ dec(end_from, 4); | |
| 2254 __ dec(end_to, 4); | |
| 2255 __ ld(end_from, 0, O4); | |
| 2256 __ st(O4, end_to, 0); | |
| 2257 __ BIND(L_skip_alignment); | |
| 2258 | |
| 2259 // Check if 'end_from' and 'end_to' has the same alignment. | |
| 2260 __ andcc(end_from, 7, G0); | |
| 2261 __ br(Assembler::zero, false, Assembler::pt, L_aligned_copy); | |
| 2262 __ delayed()->dec(count, 4); // The cmp at the start guaranty cnt >= 4 | |
| 2263 | |
| 2264 // copy with shift 4 elements (16 bytes) at a time | |
| 2265 // | |
| 2266 // Load 2 aligned 8-bytes chunks and use one from previous iteration | |
| 2267 // to form 2 aligned 8-bytes chunks to store. | |
| 2268 // | |
| 2269 __ ldx(end_from, -4, O3); | |
| 1365 | 2270 __ align(OptoLoopAlignment); |
| 0 | 2271 __ BIND(L_copy_16_bytes); |
| 2272 __ ldx(end_from, -12, O4); | |
| 2273 __ deccc(count, 4); | |
| 2274 __ ldx(end_from, -20, O5); | |
| 2275 __ dec(end_to, 16); | |
| 2276 __ dec(end_from, 16); | |
| 2277 __ srlx(O3, 32, O3); | |
| 2278 __ sllx(O4, 32, G3); | |
| 2279 __ bset(G3, O3); | |
| 2280 __ stx(O3, end_to, 8); | |
| 2281 __ srlx(O4, 32, O4); | |
| 2282 __ sllx(O5, 32, G3); | |
| 2283 __ bset(O4, G3); | |
| 2284 __ stx(G3, end_to, 0); | |
| 2285 __ brx(Assembler::greaterEqual, false, Assembler::pt, L_copy_16_bytes); | |
| 2286 __ delayed()->mov(O5, O3); | |
| 2287 | |
| 2288 __ br(Assembler::always, false, Assembler::pt, L_copy_4_bytes); | |
| 2289 __ delayed()->inc(count, 4); | |
| 2290 | |
| 2291 // copy 4 elements (16 bytes) at a time | |
| 1365 | 2292 __ align(OptoLoopAlignment); |
| 0 | 2293 __ BIND(L_aligned_copy); |
| 2294 __ dec(end_from, 16); | |
| 2295 __ ldx(end_from, 8, O3); | |
| 2296 __ ldx(end_from, 0, O4); | |
| 2297 __ dec(end_to, 16); | |
| 2298 __ deccc(count, 4); | |
| 2299 __ stx(O3, end_to, 8); | |
| 2300 __ brx(Assembler::greaterEqual, false, Assembler::pt, L_aligned_copy); | |
| 2301 __ delayed()->stx(O4, end_to, 0); | |
| 2302 __ inc(count, 4); | |
| 2303 | |
| 2304 // copy 1 element (4 bytes) at a time | |
| 2305 __ BIND(L_copy_4_bytes); | |
| 3839 | 2306 __ cmp_and_br_short(count, 0, Assembler::equal, Assembler::pt, L_exit); |
| 0 | 2307 __ BIND(L_copy_4_bytes_loop); |
| 2308 __ dec(end_from, 4); | |
| 2309 __ dec(end_to, 4); | |
| 2310 __ ld(end_from, 0, O4); | |
| 2311 __ deccc(count); | |
| 2312 __ brx(Assembler::greater, false, Assembler::pt, L_copy_4_bytes_loop); | |
| 2313 __ delayed()->st(O4, end_to, 0); | |
| 2314 __ BIND(L_exit); | |
| 2315 } | |
| 2316 | |
| 2317 // | |
| 2318 // Generate stub for conjoint int copy. If "aligned" is true, the | |
| 2319 // "from" and "to" addresses are assumed to be heapword aligned. | |
| 2320 // | |
| 2321 // Arguments for generated stub: | |
| 2322 // from: O0 | |
| 2323 // to: O1 | |
| 2324 // count: O2 treated as signed | |
| 2325 // | |
|
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2326 address generate_conjoint_int_copy(bool aligned, address nooverlap_target, |
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2327 address *entry, const char *name) { |
| 0 | 2328 __ align(CodeEntryAlignment); |
| 2329 StubCodeMark mark(this, "StubRoutines", name); | |
| 2330 address start = __ pc(); | |
| 2331 | |
| 2332 assert_clean_int(O2, O3); // Make sure 'count' is clean int. | |
| 2333 | |
|
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2334 if (entry != NULL) { |
|
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2335 *entry = __ pc(); |
|
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2336 // caller can pass a 64-bit byte count here (from Unsafe.copyMemory) |
|
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2337 BLOCK_COMMENT("Entry:"); |
|
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|
2338 } |
| 0 | 2339 |
| 2340 array_overlap_test(nooverlap_target, 2); | |
| 2341 | |
| 2342 generate_conjoint_int_copy_core(aligned); | |
| 2343 | |
| 2344 // O3, O4 are used as temp registers | |
| 2345 inc_counter_np(SharedRuntime::_jint_array_copy_ctr, O3, O4); | |
| 2346 __ retl(); | |
| 2347 __ delayed()->mov(G0, O0); // return 0 | |
| 2348 return start; | |
| 2349 } | |
| 2350 | |
| 2351 // | |
| 3903 | 2352 // Helper methods for generate_disjoint_long_copy_core() |
| 2353 // | |
| 2354 void copy_64_bytes_loop(Register from, Register to, Register count, int count_dec, | |
| 2355 Label& L_loop, bool use_prefetch, bool use_bis) { | |
| 2356 __ align(OptoLoopAlignment); | |
| 2357 __ BIND(L_loop); | |
| 2358 for (int off = 0; off < 64; off += 16) { | |
| 2359 if (use_prefetch && (off & 31) == 0) { | |
| 2360 if (ArraycopySrcPrefetchDistance > 0) { | |
|
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2361 __ prefetch(from, ArraycopySrcPrefetchDistance+off, Assembler::severalReads); |
| 3903 | 2362 } |
| 2363 if (ArraycopyDstPrefetchDistance > 0) { | |
|
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2364 __ prefetch(to, ArraycopyDstPrefetchDistance+off, Assembler::severalWritesAndPossiblyReads); |
| 3903 | 2365 } |
| 2366 } | |
| 2367 __ ldx(from, off+0, O4); | |
| 2368 __ ldx(from, off+8, O5); | |
| 2369 if (use_bis) { | |
| 2370 __ stxa(O4, to, off+0); | |
| 2371 __ stxa(O5, to, off+8); | |
| 2372 } else { | |
| 2373 __ stx(O4, to, off+0); | |
| 2374 __ stx(O5, to, off+8); | |
| 2375 } | |
| 2376 } | |
| 2377 __ deccc(count, 8); | |
| 2378 __ inc(from, 64); | |
| 2379 __ brx(Assembler::greaterEqual, false, Assembler::pt, L_loop); | |
| 2380 __ delayed()->inc(to, 64); | |
| 2381 } | |
| 2382 | |
| 2383 // | |
| 0 | 2384 // Generate core code for disjoint long copy (and oop copy on 64-bit). |
| 2385 // "aligned" is ignored, because we must make the stronger | |
| 2386 // assumption that both addresses are always 64-bit aligned. | |
| 2387 // | |
| 2388 // Arguments: | |
| 2389 // from: O0 | |
| 2390 // to: O1 | |
| 2391 // count: O2 treated as signed | |
| 2392 // | |
|
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2393 // count -= 2; |
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2394 // if ( count >= 0 ) { // >= 2 elements |
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2395 // if ( count > 6) { // >= 8 elements |
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2396 // count -= 6; // original count - 8 |
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2397 // do { |
|
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2398 // copy_8_elements; |
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2399 // count -= 8; |
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2400 // } while ( count >= 0 ); |
|
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2401 // count += 6; |
|
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2402 // } |
|
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2403 // if ( count >= 0 ) { // >= 2 elements |
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2404 // do { |
|
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2405 // copy_2_elements; |
|
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2406 // } while ( (count=count-2) >= 0 ); |
|
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2407 // } |
|
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2408 // } |
|
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2409 // count += 2; |
|
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2410 // if ( count != 0 ) { // 1 element left |
|
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2411 // copy_1_element; |
|
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2412 // } |
|
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2413 // |
| 0 | 2414 void generate_disjoint_long_copy_core(bool aligned) { |
| 2415 Label L_copy_8_bytes, L_copy_16_bytes, L_exit; | |
| 2416 const Register from = O0; // source array address | |
| 2417 const Register to = O1; // destination array address | |
| 2418 const Register count = O2; // elements count | |
| 2419 const Register offset0 = O4; // element offset | |
| 2420 const Register offset8 = O5; // next element offset | |
| 2421 | |
| 3903 | 2422 __ deccc(count, 2); |
| 2423 __ mov(G0, offset0); // offset from start of arrays (0) | |
| 2424 __ brx(Assembler::negative, false, Assembler::pn, L_copy_8_bytes ); | |
| 2425 __ delayed()->add(offset0, 8, offset8); | |
|
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2426 |
|
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2427 // Copy by 64 bytes chunks |
| 3903 | 2428 |
|
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2429 const Register from64 = O3; // source address |
|
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2430 const Register to64 = G3; // destination address |
| 3903 | 2431 __ subcc(count, 6, O3); |
| 2432 __ brx(Assembler::negative, false, Assembler::pt, L_copy_16_bytes ); | |
| 2433 __ delayed()->mov(to, to64); | |
| 2434 // Now we can use O4(offset0), O5(offset8) as temps | |
| 2435 __ mov(O3, count); | |
| 2436 // count >= 0 (original count - 8) | |
| 2437 __ mov(from, from64); | |
| 2438 | |
| 2439 disjoint_copy_core(from64, to64, count, 3, 64, copy_64_bytes_loop); | |
|
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2440 |
|
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2441 // Restore O4(offset0), O5(offset8) |
|
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2442 __ sub(from64, from, offset0); |
| 3903 | 2443 __ inccc(count, 6); // restore count |
|
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2444 __ brx(Assembler::negative, false, Assembler::pn, L_copy_8_bytes ); |
|
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2445 __ delayed()->add(offset0, 8, offset8); |
|
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|
2446 |
|
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|
2447 // Copy by 16 bytes chunks |
| 1365 | 2448 __ align(OptoLoopAlignment); |
| 0 | 2449 __ BIND(L_copy_16_bytes); |
| 2450 __ ldx(from, offset0, O3); | |
| 2451 __ ldx(from, offset8, G3); | |
| 2452 __ deccc(count, 2); | |
| 2453 __ stx(O3, to, offset0); | |
| 2454 __ inc(offset0, 16); | |
| 2455 __ stx(G3, to, offset8); | |
| 2456 __ brx(Assembler::greaterEqual, false, Assembler::pt, L_copy_16_bytes); | |
| 2457 __ delayed()->inc(offset8, 16); | |
| 2458 | |
|
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|
2459 // Copy last 8 bytes |
| 0 | 2460 __ BIND(L_copy_8_bytes); |
| 2461 __ inccc(count, 2); | |
| 2462 __ brx(Assembler::zero, true, Assembler::pn, L_exit ); | |
| 2463 __ delayed()->mov(offset0, offset8); // Set O5 used by other stubs | |
| 2464 __ ldx(from, offset0, O3); | |
| 2465 __ stx(O3, to, offset0); | |
| 2466 __ BIND(L_exit); | |
| 2467 } | |
| 2468 | |
| 2469 // | |
| 2470 // Generate stub for disjoint long copy. | |
| 2471 // "aligned" is ignored, because we must make the stronger | |
| 2472 // assumption that both addresses are always 64-bit aligned. | |
| 2473 // | |
| 2474 // Arguments for generated stub: | |
| 2475 // from: O0 | |
| 2476 // to: O1 | |
| 2477 // count: O2 treated as signed | |
| 2478 // | |
|
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|
2479 address generate_disjoint_long_copy(bool aligned, address *entry, const char *name) { |
| 0 | 2480 __ align(CodeEntryAlignment); |
| 2481 StubCodeMark mark(this, "StubRoutines", name); | |
| 2482 address start = __ pc(); | |
| 2483 | |
| 2484 assert_clean_int(O2, O3); // Make sure 'count' is clean int. | |
| 2485 | |
|
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2486 if (entry != NULL) { |
|
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|
2487 *entry = __ pc(); |
|
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|
2488 // caller can pass a 64-bit byte count here (from Unsafe.copyMemory) |
|
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|
2489 BLOCK_COMMENT("Entry:"); |
|
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|
2490 } |
| 0 | 2491 |
| 2492 generate_disjoint_long_copy_core(aligned); | |
| 2493 | |
| 2494 // O3, O4 are used as temp registers | |
| 2495 inc_counter_np(SharedRuntime::_jlong_array_copy_ctr, O3, O4); | |
| 2496 __ retl(); | |
| 2497 __ delayed()->mov(G0, O0); // return 0 | |
| 2498 return start; | |
| 2499 } | |
| 2500 | |
| 2501 // | |
| 2502 // Generate core code for conjoint long copy (and oop copy on 64-bit). | |
| 2503 // "aligned" is ignored, because we must make the stronger | |
| 2504 // assumption that both addresses are always 64-bit aligned. | |
| 2505 // | |
| 2506 // Arguments: | |
| 2507 // from: O0 | |
| 2508 // to: O1 | |
| 2509 // count: O2 treated as signed | |
| 2510 // | |
| 2511 void generate_conjoint_long_copy_core(bool aligned) { | |
| 2512 // Do reverse copy. | |
| 2513 Label L_copy_8_bytes, L_copy_16_bytes, L_exit; | |
| 2514 const Register from = O0; // source array address | |
| 2515 const Register to = O1; // destination array address | |
| 2516 const Register count = O2; // elements count | |
| 2517 const Register offset8 = O4; // element offset | |
| 2518 const Register offset0 = O5; // previous element offset | |
| 2519 | |
| 2520 __ subcc(count, 1, count); | |
| 2521 __ brx(Assembler::lessEqual, false, Assembler::pn, L_copy_8_bytes ); | |
| 2522 __ delayed()->sllx(count, LogBytesPerLong, offset8); | |
| 2523 __ sub(offset8, 8, offset0); | |
| 1365 | 2524 __ align(OptoLoopAlignment); |
| 0 | 2525 __ BIND(L_copy_16_bytes); |
| 2526 __ ldx(from, offset8, O2); | |
| 2527 __ ldx(from, offset0, O3); | |
| 2528 __ stx(O2, to, offset8); | |
| 2529 __ deccc(offset8, 16); // use offset8 as counter | |
| 2530 __ stx(O3, to, offset0); | |
| 2531 __ brx(Assembler::greater, false, Assembler::pt, L_copy_16_bytes); | |
| 2532 __ delayed()->dec(offset0, 16); | |
| 2533 | |
| 2534 __ BIND(L_copy_8_bytes); | |
| 2535 __ brx(Assembler::negative, false, Assembler::pn, L_exit ); | |
| 2536 __ delayed()->nop(); | |
| 2537 __ ldx(from, 0, O3); | |
| 2538 __ stx(O3, to, 0); | |
| 2539 __ BIND(L_exit); | |
| 2540 } | |
| 2541 | |
| 2542 // Generate stub for conjoint long copy. | |
| 2543 // "aligned" is ignored, because we must make the stronger | |
| 2544 // assumption that both addresses are always 64-bit aligned. | |
| 2545 // | |
| 2546 // Arguments for generated stub: | |
| 2547 // from: O0 | |
| 2548 // to: O1 | |
| 2549 // count: O2 treated as signed | |
| 2550 // | |
|
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2551 address generate_conjoint_long_copy(bool aligned, address nooverlap_target, |
|
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2552 address *entry, const char *name) { |
| 0 | 2553 __ align(CodeEntryAlignment); |
| 2554 StubCodeMark mark(this, "StubRoutines", name); | |
| 2555 address start = __ pc(); | |
| 2556 | |
| 2324 | 2557 assert(aligned, "Should always be aligned"); |
| 0 | 2558 |
| 2559 assert_clean_int(O2, O3); // Make sure 'count' is clean int. | |
| 2560 | |
|
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2561 if (entry != NULL) { |
|
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2562 *entry = __ pc(); |
|
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|
2563 // caller can pass a 64-bit byte count here (from Unsafe.copyMemory) |
|
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2564 BLOCK_COMMENT("Entry:"); |
|
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|
2565 } |
| 0 | 2566 |
| 2567 array_overlap_test(nooverlap_target, 3); | |
| 2568 | |
| 2569 generate_conjoint_long_copy_core(aligned); | |
| 2570 | |
| 2571 // O3, O4 are used as temp registers | |
| 2572 inc_counter_np(SharedRuntime::_jlong_array_copy_ctr, O3, O4); | |
| 2573 __ retl(); | |
| 2574 __ delayed()->mov(G0, O0); // return 0 | |
| 2575 return start; | |
| 2576 } | |
| 2577 | |
| 2578 // Generate stub for disjoint oop copy. If "aligned" is true, the | |
| 2579 // "from" and "to" addresses are assumed to be heapword aligned. | |
| 2580 // | |
| 2581 // Arguments for generated stub: | |
| 2582 // from: O0 | |
| 2583 // to: O1 | |
| 2584 // count: O2 treated as signed | |
| 2585 // | |
| 2324 | 2586 address generate_disjoint_oop_copy(bool aligned, address *entry, const char *name, |
| 2587 bool dest_uninitialized = false) { | |
| 0 | 2588 |
| 2589 const Register from = O0; // source array address | |
| 2590 const Register to = O1; // destination array address | |
| 2591 const Register count = O2; // elements count | |
| 2592 | |
| 2593 __ align(CodeEntryAlignment); | |
| 2594 StubCodeMark mark(this, "StubRoutines", name); | |
| 2595 address start = __ pc(); | |
| 2596 | |
| 2597 assert_clean_int(count, O3); // Make sure 'count' is clean int. | |
| 2598 | |
|
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2599 if (entry != NULL) { |
|
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|
2600 *entry = __ pc(); |
|
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|
2601 // caller can pass a 64-bit byte count here |
|
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|
2602 BLOCK_COMMENT("Entry:"); |
|
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|
2603 } |
| 0 | 2604 |
| 2605 // save arguments for barrier generation | |
| 2606 __ mov(to, G1); | |
| 2607 __ mov(count, G5); | |
| 2324 | 2608 gen_write_ref_array_pre_barrier(G1, G5, dest_uninitialized); |
| 0 | 2609 #ifdef _LP64 |
|
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2610 assert_clean_int(count, O3); // Make sure 'count' is clean int. |
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2611 if (UseCompressedOops) { |
|
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2612 generate_disjoint_int_copy_core(aligned); |
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|
2613 } else { |
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2614 generate_disjoint_long_copy_core(aligned); |
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2615 } |
| 0 | 2616 #else |
| 2617 generate_disjoint_int_copy_core(aligned); | |
| 2618 #endif | |
| 2619 // O0 is used as temp register | |
| 2620 gen_write_ref_array_post_barrier(G1, G5, O0); | |
| 2621 | |
| 2622 // O3, O4 are used as temp registers | |
| 2623 inc_counter_np(SharedRuntime::_oop_array_copy_ctr, O3, O4); | |
| 2624 __ retl(); | |
| 2625 __ delayed()->mov(G0, O0); // return 0 | |
| 2626 return start; | |
| 2627 } | |
| 2628 | |
| 2629 // Generate stub for conjoint oop copy. If "aligned" is true, the | |
| 2630 // "from" and "to" addresses are assumed to be heapword aligned. | |
| 2631 // | |
| 2632 // Arguments for generated stub: | |
| 2633 // from: O0 | |
| 2634 // to: O1 | |
| 2635 // count: O2 treated as signed | |
| 2636 // | |
|
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|
2637 address generate_conjoint_oop_copy(bool aligned, address nooverlap_target, |
| 2324 | 2638 address *entry, const char *name, |
| 2639 bool dest_uninitialized = false) { | |
| 0 | 2640 |
| 2641 const Register from = O0; // source array address | |
| 2642 const Register to = O1; // destination array address | |
| 2643 const Register count = O2; // elements count | |
| 2644 | |
| 2645 __ align(CodeEntryAlignment); | |
| 2646 StubCodeMark mark(this, "StubRoutines", name); | |
| 2647 address start = __ pc(); | |
| 2648 | |
| 2649 assert_clean_int(count, O3); // Make sure 'count' is clean int. | |
| 2650 | |
|
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2651 if (entry != NULL) { |
|
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|
2652 *entry = __ pc(); |
|
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2653 // caller can pass a 64-bit byte count here |
|
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|
2654 BLOCK_COMMENT("Entry:"); |
|
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|
2655 } |
|
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|
2656 |
|
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|
2657 array_overlap_test(nooverlap_target, LogBytesPerHeapOop); |
| 0 | 2658 |
| 2659 // save arguments for barrier generation | |
| 2660 __ mov(to, G1); | |
| 2661 __ mov(count, G5); | |
| 2324 | 2662 gen_write_ref_array_pre_barrier(G1, G5, dest_uninitialized); |
| 0 | 2663 |
| 2664 #ifdef _LP64 | |
|
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2665 if (UseCompressedOops) { |
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2666 generate_conjoint_int_copy_core(aligned); |
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2667 } else { |
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2668 generate_conjoint_long_copy_core(aligned); |
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2669 } |
| 0 | 2670 #else |
| 2671 generate_conjoint_int_copy_core(aligned); | |
| 2672 #endif | |
| 2673 | |
| 2674 // O0 is used as temp register | |
| 2675 gen_write_ref_array_post_barrier(G1, G5, O0); | |
| 2676 | |
| 2677 // O3, O4 are used as temp registers | |
| 2678 inc_counter_np(SharedRuntime::_oop_array_copy_ctr, O3, O4); | |
| 2679 __ retl(); | |
| 2680 __ delayed()->mov(G0, O0); // return 0 | |
| 2681 return start; | |
| 2682 } | |
| 2683 | |
| 2684 | |
| 2685 // Helper for generating a dynamic type check. | |
| 2686 // Smashes only the given temp registers. | |
| 2687 void generate_type_check(Register sub_klass, | |
| 2688 Register super_check_offset, | |
| 2689 Register super_klass, | |
| 2690 Register temp, | |
|
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2691 Label& L_success) { |
| 0 | 2692 assert_different_registers(sub_klass, super_check_offset, super_klass, temp); |
| 2693 | |
| 2694 BLOCK_COMMENT("type_check:"); | |
| 2695 | |
|
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2696 Label L_miss, L_pop_to_miss; |
| 0 | 2697 |
| 2698 assert_clean_int(super_check_offset, temp); | |
| 2699 | |
|
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2700 __ check_klass_subtype_fast_path(sub_klass, super_klass, temp, noreg, |
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2701 &L_success, &L_miss, NULL, |
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2702 super_check_offset); |
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2703 |
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2704 BLOCK_COMMENT("type_check_slow_path:"); |
| 0 | 2705 __ save_frame(0); |
|
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2706 __ check_klass_subtype_slow_path(sub_klass->after_save(), |
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2707 super_klass->after_save(), |
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2708 L0, L1, L2, L4, |
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2709 NULL, &L_pop_to_miss); |
| 3839 | 2710 __ ba(L_success); |
|
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2711 __ delayed()->restore(); |
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2712 |
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2713 __ bind(L_pop_to_miss); |
| 0 | 2714 __ restore(); |
| 2715 | |
| 2716 // Fall through on failure! | |
| 2717 __ BIND(L_miss); | |
| 2718 } | |
| 2719 | |
| 2720 | |
| 2721 // Generate stub for checked oop copy. | |
| 2722 // | |
| 2723 // Arguments for generated stub: | |
| 2724 // from: O0 | |
| 2725 // to: O1 | |
| 2726 // count: O2 treated as signed | |
| 2727 // ckoff: O3 (super_check_offset) | |
| 2728 // ckval: O4 (super_klass) | |
| 2729 // ret: O0 zero for success; (-1^K) where K is partial transfer count | |
| 2730 // | |
| 2324 | 2731 address generate_checkcast_copy(const char *name, address *entry, bool dest_uninitialized = false) { |
| 0 | 2732 |
| 2733 const Register O0_from = O0; // source array address | |
| 2734 const Register O1_to = O1; // destination array address | |
| 2735 const Register O2_count = O2; // elements count | |
| 2736 const Register O3_ckoff = O3; // super_check_offset | |
| 2737 const Register O4_ckval = O4; // super_klass | |
| 2738 | |
| 2739 const Register O5_offset = O5; // loop var, with stride wordSize | |
| 2740 const Register G1_remain = G1; // loop var, with stride -1 | |
| 2741 const Register G3_oop = G3; // actual oop copied | |
| 2742 const Register G4_klass = G4; // oop._klass | |
| 2743 const Register G5_super = G5; // oop._klass._primary_supers[ckval] | |
| 2744 | |
| 2745 __ align(CodeEntryAlignment); | |
| 2746 StubCodeMark mark(this, "StubRoutines", name); | |
| 2747 address start = __ pc(); | |
| 2748 | |
| 2749 #ifdef ASSERT | |
|
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2750 // We sometimes save a frame (see generate_type_check below). |
| 0 | 2751 // If this will cause trouble, let's fail now instead of later. |
| 2752 __ save_frame(0); | |
| 2753 __ restore(); | |
| 2754 #endif | |
| 2755 | |
|
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|
2756 assert_clean_int(O2_count, G1); // Make sure 'count' is clean int. |
|
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2757 |
| 0 | 2758 #ifdef ASSERT |
| 2759 // caller guarantees that the arrays really are different | |
| 2760 // otherwise, we would have to make conjoint checks | |
| 2761 { Label L; | |
| 2762 __ mov(O3, G1); // spill: overlap test smashes O3 | |
| 2763 __ mov(O4, G4); // spill: overlap test smashes O4 | |
|
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2764 array_overlap_test(L, LogBytesPerHeapOop); |
| 0 | 2765 __ stop("checkcast_copy within a single array"); |
| 2766 __ bind(L); | |
| 2767 __ mov(G1, O3); | |
| 2768 __ mov(G4, O4); | |
| 2769 } | |
| 2770 #endif //ASSERT | |
| 2771 | |
|
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2772 if (entry != NULL) { |
|
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|
2773 *entry = __ pc(); |
|
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2774 // caller can pass a 64-bit byte count here (from generic stub) |
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2775 BLOCK_COMMENT("Entry:"); |
|
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|
2776 } |
| 2324 | 2777 gen_write_ref_array_pre_barrier(O1_to, O2_count, dest_uninitialized); |
| 0 | 2778 |
| 2779 Label load_element, store_element, do_card_marks, fail, done; | |
| 2780 __ addcc(O2_count, 0, G1_remain); // initialize loop index, and test it | |
| 2781 __ brx(Assembler::notZero, false, Assembler::pt, load_element); | |
| 2782 __ delayed()->mov(G0, O5_offset); // offset from start of arrays | |
| 2783 | |
| 2784 // Empty array: Nothing to do. | |
| 2785 inc_counter_np(SharedRuntime::_checkcast_array_copy_ctr, O3, O4); | |
| 2786 __ retl(); | |
| 2787 __ delayed()->set(0, O0); // return 0 on (trivial) success | |
| 2788 | |
| 2789 // ======== begin loop ======== | |
| 2790 // (Loop is rotated; its entry is load_element.) | |
| 2791 // Loop variables: | |
| 2792 // (O5 = 0; ; O5 += wordSize) --- offset from src, dest arrays | |
| 2793 // (O2 = len; O2 != 0; O2--) --- number of oops *remaining* | |
| 2794 // G3, G4, G5 --- current oop, oop.klass, oop.klass.super | |
| 1365 | 2795 __ align(OptoLoopAlignment); |
| 0 | 2796 |
|
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2797 __ BIND(store_element); |
|
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2798 __ deccc(G1_remain); // decrement the count |
|
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2799 __ store_heap_oop(G3_oop, O1_to, O5_offset); // store the oop |
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2800 __ inc(O5_offset, heapOopSize); // step to next offset |
| 0 | 2801 __ brx(Assembler::zero, true, Assembler::pt, do_card_marks); |
| 2802 __ delayed()->set(0, O0); // return -1 on success | |
| 2803 | |
| 2804 // ======== loop entry is here ======== | |
|
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2805 __ BIND(load_element); |
|
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2806 __ load_heap_oop(O0_from, O5_offset, G3_oop); // load the oop |
| 3839 | 2807 __ br_null_short(G3_oop, Assembler::pt, store_element); |
| 0 | 2808 |
|
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2809 __ load_klass(G3_oop, G4_klass); // query the object klass |
| 0 | 2810 |
| 2811 generate_type_check(G4_klass, O3_ckoff, O4_ckval, G5_super, | |
| 2812 // branch to this on success: | |
|
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|
2813 store_element); |
| 0 | 2814 // ======== end loop ======== |
| 2815 | |
| 2816 // It was a real error; we must depend on the caller to finish the job. | |
| 2817 // Register G1 has number of *remaining* oops, O2 number of *total* oops. | |
| 2818 // Emit GC store barriers for the oops we have copied (O2 minus G1), | |
| 2819 // and report their number to the caller. | |
|
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|
2820 __ BIND(fail); |
| 0 | 2821 __ subcc(O2_count, G1_remain, O2_count); |
| 2822 __ brx(Assembler::zero, false, Assembler::pt, done); | |
| 2823 __ delayed()->not1(O2_count, O0); // report (-1^K) to caller | |
| 2824 | |
|
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|
2825 __ BIND(do_card_marks); |
| 0 | 2826 gen_write_ref_array_post_barrier(O1_to, O2_count, O3); // store check on O1[0..O2] |
| 2827 | |
|
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2828 __ BIND(done); |
| 0 | 2829 inc_counter_np(SharedRuntime::_checkcast_array_copy_ctr, O3, O4); |
| 2830 __ retl(); | |
| 2831 __ delayed()->nop(); // return value in 00 | |
| 2832 | |
| 2833 return start; | |
| 2834 } | |
| 2835 | |
| 2836 | |
| 2837 // Generate 'unsafe' array copy stub | |
| 2838 // Though just as safe as the other stubs, it takes an unscaled | |
| 2839 // size_t argument instead of an element count. | |
| 2840 // | |
| 2841 // Arguments for generated stub: | |
| 2842 // from: O0 | |
| 2843 // to: O1 | |
| 2844 // count: O2 byte count, treated as ssize_t, can be zero | |
| 2845 // | |
| 2846 // Examines the alignment of the operands and dispatches | |
| 2847 // to a long, int, short, or byte copy loop. | |
| 2848 // | |
|
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2849 address generate_unsafe_copy(const char* name, |
|
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2850 address byte_copy_entry, |
|
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2851 address short_copy_entry, |
|
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2852 address int_copy_entry, |
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|
2853 address long_copy_entry) { |
| 0 | 2854 |
| 2855 const Register O0_from = O0; // source array address | |
| 2856 const Register O1_to = O1; // destination array address | |
| 2857 const Register O2_count = O2; // elements count | |
| 2858 | |
| 2859 const Register G1_bits = G1; // test copy of low bits | |
| 2860 | |
| 2861 __ align(CodeEntryAlignment); | |
| 2862 StubCodeMark mark(this, "StubRoutines", name); | |
| 2863 address start = __ pc(); | |
| 2864 | |
| 2865 // bump this on entry, not on exit: | |
| 2866 inc_counter_np(SharedRuntime::_unsafe_array_copy_ctr, G1, G3); | |
| 2867 | |
| 2868 __ or3(O0_from, O1_to, G1_bits); | |
| 2869 __ or3(O2_count, G1_bits, G1_bits); | |
| 2870 | |
| 2871 __ btst(BytesPerLong-1, G1_bits); | |
| 2872 __ br(Assembler::zero, true, Assembler::pt, | |
| 2873 long_copy_entry, relocInfo::runtime_call_type); | |
| 2874 // scale the count on the way out: | |
| 2875 __ delayed()->srax(O2_count, LogBytesPerLong, O2_count); | |
| 2876 | |
| 2877 __ btst(BytesPerInt-1, G1_bits); | |
| 2878 __ br(Assembler::zero, true, Assembler::pt, | |
| 2879 int_copy_entry, relocInfo::runtime_call_type); | |
| 2880 // scale the count on the way out: | |
| 2881 __ delayed()->srax(O2_count, LogBytesPerInt, O2_count); | |
| 2882 | |
| 2883 __ btst(BytesPerShort-1, G1_bits); | |
| 2884 __ br(Assembler::zero, true, Assembler::pt, | |
| 2885 short_copy_entry, relocInfo::runtime_call_type); | |
| 2886 // scale the count on the way out: | |
| 2887 __ delayed()->srax(O2_count, LogBytesPerShort, O2_count); | |
| 2888 | |
| 2889 __ br(Assembler::always, false, Assembler::pt, | |
| 2890 byte_copy_entry, relocInfo::runtime_call_type); | |
| 2891 __ delayed()->nop(); | |
| 2892 | |
| 2893 return start; | |
| 2894 } | |
| 2895 | |
| 2896 | |
| 2897 // Perform range checks on the proposed arraycopy. | |
| 2898 // Kills the two temps, but nothing else. | |
| 2899 // Also, clean the sign bits of src_pos and dst_pos. | |
| 2900 void arraycopy_range_checks(Register src, // source array oop (O0) | |
| 2901 Register src_pos, // source position (O1) | |
| 2902 Register dst, // destination array oo (O2) | |
| 2903 Register dst_pos, // destination position (O3) | |
| 2904 Register length, // length of copy (O4) | |
| 2905 Register temp1, Register temp2, | |
| 2906 Label& L_failed) { | |
| 2907 BLOCK_COMMENT("arraycopy_range_checks:"); | |
| 2908 | |
| 2909 // if (src_pos + length > arrayOop(src)->length() ) FAIL; | |
| 2910 | |
| 2911 const Register array_length = temp1; // scratch | |
| 2912 const Register end_pos = temp2; // scratch | |
| 2913 | |
| 2914 // Note: This next instruction may be in the delay slot of a branch: | |
| 2915 __ add(length, src_pos, end_pos); // src_pos + length | |
| 2916 __ lduw(src, arrayOopDesc::length_offset_in_bytes(), array_length); | |
| 2917 __ cmp(end_pos, array_length); | |
| 2918 __ br(Assembler::greater, false, Assembler::pn, L_failed); | |
| 2919 | |
| 2920 // if (dst_pos + length > arrayOop(dst)->length() ) FAIL; | |
| 2921 __ delayed()->add(length, dst_pos, end_pos); // dst_pos + length | |
| 2922 __ lduw(dst, arrayOopDesc::length_offset_in_bytes(), array_length); | |
| 2923 __ cmp(end_pos, array_length); | |
| 2924 __ br(Assembler::greater, false, Assembler::pn, L_failed); | |
| 2925 | |
| 2926 // Have to clean up high 32-bits of 'src_pos' and 'dst_pos'. | |
| 2927 // Move with sign extension can be used since they are positive. | |
| 2928 __ delayed()->signx(src_pos, src_pos); | |
| 2929 __ signx(dst_pos, dst_pos); | |
| 2930 | |
| 2931 BLOCK_COMMENT("arraycopy_range_checks done"); | |
| 2932 } | |
| 2933 | |
| 2934 | |
| 2935 // | |
| 2936 // Generate generic array copy stubs | |
| 2937 // | |
| 2938 // Input: | |
| 2939 // O0 - src oop | |
| 2940 // O1 - src_pos | |
| 2941 // O2 - dst oop | |
| 2942 // O3 - dst_pos | |
| 2943 // O4 - element count | |
| 2944 // | |
| 2945 // Output: | |
| 2946 // O0 == 0 - success | |
| 2947 // O0 == -1 - need to call System.arraycopy | |
| 2948 // | |
|
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2949 address generate_generic_copy(const char *name, |
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2950 address entry_jbyte_arraycopy, |
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2951 address entry_jshort_arraycopy, |
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2952 address entry_jint_arraycopy, |
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|
2953 address entry_oop_arraycopy, |
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2954 address entry_jlong_arraycopy, |
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|
2955 address entry_checkcast_arraycopy) { |
| 0 | 2956 Label L_failed, L_objArray; |
| 2957 | |
| 2958 // Input registers | |
| 2959 const Register src = O0; // source array oop | |
| 2960 const Register src_pos = O1; // source position | |
| 2961 const Register dst = O2; // destination array oop | |
| 2962 const Register dst_pos = O3; // destination position | |
| 2963 const Register length = O4; // elements count | |
| 2964 | |
| 2965 // registers used as temp | |
| 2966 const Register G3_src_klass = G3; // source array klass | |
| 2967 const Register G4_dst_klass = G4; // destination array klass | |
| 2968 const Register G5_lh = G5; // layout handler | |
| 2969 const Register O5_temp = O5; | |
| 2970 | |
| 2971 __ align(CodeEntryAlignment); | |
| 2972 StubCodeMark mark(this, "StubRoutines", name); | |
| 2973 address start = __ pc(); | |
| 2974 | |
| 2975 // bump this on entry, not on exit: | |
| 2976 inc_counter_np(SharedRuntime::_generic_array_copy_ctr, G1, G3); | |
| 2977 | |
| 2978 // In principle, the int arguments could be dirty. | |
| 2979 //assert_clean_int(src_pos, G1); | |
| 2980 //assert_clean_int(dst_pos, G1); | |
| 2981 //assert_clean_int(length, G1); | |
| 2982 | |
| 2983 //----------------------------------------------------------------------- | |
| 2984 // Assembler stubs will be used for this call to arraycopy | |
| 2985 // if the following conditions are met: | |
| 2986 // | |
| 2987 // (1) src and dst must not be null. | |
| 2988 // (2) src_pos must not be negative. | |
| 2989 // (3) dst_pos must not be negative. | |
| 2990 // (4) length must not be negative. | |
| 2991 // (5) src klass and dst klass should be the same and not NULL. | |
| 2992 // (6) src and dst should be arrays. | |
| 2993 // (7) src_pos + length must not exceed length of src. | |
| 2994 // (8) dst_pos + length must not exceed length of dst. | |
| 2995 BLOCK_COMMENT("arraycopy initial argument checks"); | |
| 2996 | |
| 2997 // if (src == NULL) return -1; | |
| 2998 __ br_null(src, false, Assembler::pn, L_failed); | |
| 2999 | |
| 3000 // if (src_pos < 0) return -1; | |
| 3001 __ delayed()->tst(src_pos); | |
| 3002 __ br(Assembler::negative, false, Assembler::pn, L_failed); | |
| 3003 __ delayed()->nop(); | |
| 3004 | |
| 3005 // if (dst == NULL) return -1; | |
| 3006 __ br_null(dst, false, Assembler::pn, L_failed); | |
| 3007 | |
| 3008 // if (dst_pos < 0) return -1; | |
| 3009 __ delayed()->tst(dst_pos); | |
| 3010 __ br(Assembler::negative, false, Assembler::pn, L_failed); | |
| 3011 | |
| 3012 // if (length < 0) return -1; | |
| 3013 __ delayed()->tst(length); | |
| 3014 __ br(Assembler::negative, false, Assembler::pn, L_failed); | |
| 3015 | |
| 3016 BLOCK_COMMENT("arraycopy argument klass checks"); | |
| 3017 // get src->klass() | |
|
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3018 if (UseCompressedKlassPointers) { |
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3019 __ delayed()->nop(); // ??? not good |
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3020 __ load_klass(src, G3_src_klass); |
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3021 } else { |
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3022 __ delayed()->ld_ptr(src, oopDesc::klass_offset_in_bytes(), G3_src_klass); |
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3023 } |
| 0 | 3024 |
| 3025 #ifdef ASSERT | |
| 3026 // assert(src->klass() != NULL); | |
| 3027 BLOCK_COMMENT("assert klasses not null"); | |
| 3028 { Label L_a, L_b; | |
| 3839 | 3029 __ br_notnull_short(G3_src_klass, Assembler::pt, L_b); // it is broken if klass is NULL |
| 0 | 3030 __ bind(L_a); |
| 3031 __ stop("broken null klass"); | |
| 3032 __ bind(L_b); | |
|
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3033 __ load_klass(dst, G4_dst_klass); |
| 0 | 3034 __ br_null(G4_dst_klass, false, Assembler::pn, L_a); // this would be broken also |
| 3035 __ delayed()->mov(G0, G4_dst_klass); // scribble the temp | |
| 3036 BLOCK_COMMENT("assert done"); | |
| 3037 } | |
| 3038 #endif | |
| 3039 | |
| 3040 // Load layout helper | |
| 3041 // | |
| 3042 // |array_tag| | header_size | element_type | |log2_element_size| | |
| 3043 // 32 30 24 16 8 2 0 | |
| 3044 // | |
| 3045 // array_tag: typeArray = 0x3, objArray = 0x2, non-array = 0x0 | |
| 3046 // | |
| 3047 | |
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3048 int lh_offset = in_bytes(Klass::layout_helper_offset()); |
| 0 | 3049 |
| 3050 // Load 32-bits signed value. Use br() instruction with it to check icc. | |
| 3051 __ lduw(G3_src_klass, lh_offset, G5_lh); | |
| 3052 | |
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3053 if (UseCompressedKlassPointers) { |
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3054 __ load_klass(dst, G4_dst_klass); |
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3055 } |
| 0 | 3056 // Handle objArrays completely differently... |
| 3057 juint objArray_lh = Klass::array_layout_helper(T_OBJECT); | |
| 3058 __ set(objArray_lh, O5_temp); | |
| 3059 __ cmp(G5_lh, O5_temp); | |
| 3060 __ br(Assembler::equal, false, Assembler::pt, L_objArray); | |
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3061 if (UseCompressedKlassPointers) { |
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3062 __ delayed()->nop(); |
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3063 } else { |
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3064 __ delayed()->ld_ptr(dst, oopDesc::klass_offset_in_bytes(), G4_dst_klass); |
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3065 } |
| 0 | 3066 |
| 3067 // if (src->klass() != dst->klass()) return -1; | |
| 3839 | 3068 __ cmp_and_brx_short(G3_src_klass, G4_dst_klass, Assembler::notEqual, Assembler::pn, L_failed); |
| 0 | 3069 |
| 3070 // if (!src->is_Array()) return -1; | |
| 3071 __ cmp(G5_lh, Klass::_lh_neutral_value); // < 0 | |
| 3072 __ br(Assembler::greaterEqual, false, Assembler::pn, L_failed); | |
| 3073 | |
| 3074 // At this point, it is known to be a typeArray (array_tag 0x3). | |
| 3075 #ifdef ASSERT | |
| 3076 __ delayed()->nop(); | |
| 3077 { Label L; | |
| 3078 jint lh_prim_tag_in_place = (Klass::_lh_array_tag_type_value << Klass::_lh_array_tag_shift); | |
| 3079 __ set(lh_prim_tag_in_place, O5_temp); | |
| 3080 __ cmp(G5_lh, O5_temp); | |
| 3081 __ br(Assembler::greaterEqual, false, Assembler::pt, L); | |
| 3082 __ delayed()->nop(); | |
| 3083 __ stop("must be a primitive array"); | |
| 3084 __ bind(L); | |
| 3085 } | |
| 3086 #else | |
| 3087 __ delayed(); // match next insn to prev branch | |
| 3088 #endif | |
| 3089 | |
| 3090 arraycopy_range_checks(src, src_pos, dst, dst_pos, length, | |
| 3091 O5_temp, G4_dst_klass, L_failed); | |
| 3092 | |
|
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3093 // TypeArrayKlass |
| 0 | 3094 // |
| 3095 // src_addr = (src + array_header_in_bytes()) + (src_pos << log2elemsize); | |
| 3096 // dst_addr = (dst + array_header_in_bytes()) + (dst_pos << log2elemsize); | |
| 3097 // | |
| 3098 | |
| 3099 const Register G4_offset = G4_dst_klass; // array offset | |
| 3100 const Register G3_elsize = G3_src_klass; // log2 element size | |
| 3101 | |
| 3102 __ srl(G5_lh, Klass::_lh_header_size_shift, G4_offset); | |
| 3103 __ and3(G4_offset, Klass::_lh_header_size_mask, G4_offset); // array_offset | |
| 3104 __ add(src, G4_offset, src); // src array offset | |
| 3105 __ add(dst, G4_offset, dst); // dst array offset | |
| 3106 __ and3(G5_lh, Klass::_lh_log2_element_size_mask, G3_elsize); // log2 element size | |
| 3107 | |
| 3108 // next registers should be set before the jump to corresponding stub | |
| 3109 const Register from = O0; // source array address | |
| 3110 const Register to = O1; // destination array address | |
| 3111 const Register count = O2; // elements count | |
| 3112 | |
| 3113 // 'from', 'to', 'count' registers should be set in this order | |
| 3114 // since they are the same as 'src', 'src_pos', 'dst'. | |
| 3115 | |
| 3116 BLOCK_COMMENT("scale indexes to element size"); | |
| 3117 __ sll_ptr(src_pos, G3_elsize, src_pos); | |
| 3118 __ sll_ptr(dst_pos, G3_elsize, dst_pos); | |
| 3119 __ add(src, src_pos, from); // src_addr | |
| 3120 __ add(dst, dst_pos, to); // dst_addr | |
| 3121 | |
| 3122 BLOCK_COMMENT("choose copy loop based on element size"); | |
| 3123 __ cmp(G3_elsize, 0); | |
|
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3124 __ br(Assembler::equal, true, Assembler::pt, entry_jbyte_arraycopy); |
| 0 | 3125 __ delayed()->signx(length, count); // length |
| 3126 | |
| 3127 __ cmp(G3_elsize, LogBytesPerShort); | |
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3128 __ br(Assembler::equal, true, Assembler::pt, entry_jshort_arraycopy); |
| 0 | 3129 __ delayed()->signx(length, count); // length |
| 3130 | |
| 3131 __ cmp(G3_elsize, LogBytesPerInt); | |
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3132 __ br(Assembler::equal, true, Assembler::pt, entry_jint_arraycopy); |
| 0 | 3133 __ delayed()->signx(length, count); // length |
| 3134 #ifdef ASSERT | |
| 3135 { Label L; | |
| 3839 | 3136 __ cmp_and_br_short(G3_elsize, LogBytesPerLong, Assembler::equal, Assembler::pt, L); |
| 0 | 3137 __ stop("must be long copy, but elsize is wrong"); |
| 3138 __ bind(L); | |
| 3139 } | |
| 3140 #endif | |
|
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3141 __ br(Assembler::always, false, Assembler::pt, entry_jlong_arraycopy); |
| 0 | 3142 __ delayed()->signx(length, count); // length |
| 3143 | |
|
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3144 // ObjArrayKlass |
| 0 | 3145 __ BIND(L_objArray); |
| 3146 // live at this point: G3_src_klass, G4_dst_klass, src[_pos], dst[_pos], length | |
| 3147 | |
| 3148 Label L_plain_copy, L_checkcast_copy; | |
| 3149 // test array classes for subtyping | |
| 3150 __ cmp(G3_src_klass, G4_dst_klass); // usual case is exact equality | |
| 3151 __ brx(Assembler::notEqual, true, Assembler::pn, L_checkcast_copy); | |
| 3152 __ delayed()->lduw(G4_dst_klass, lh_offset, O5_temp); // hoisted from below | |
| 3153 | |
| 3154 // Identically typed arrays can be copied without element-wise checks. | |
| 3155 arraycopy_range_checks(src, src_pos, dst, dst_pos, length, | |
| 3156 O5_temp, G5_lh, L_failed); | |
| 3157 | |
| 3158 __ add(src, arrayOopDesc::base_offset_in_bytes(T_OBJECT), src); //src offset | |
| 3159 __ add(dst, arrayOopDesc::base_offset_in_bytes(T_OBJECT), dst); //dst offset | |
|
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3160 __ sll_ptr(src_pos, LogBytesPerHeapOop, src_pos); |
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3161 __ sll_ptr(dst_pos, LogBytesPerHeapOop, dst_pos); |
| 0 | 3162 __ add(src, src_pos, from); // src_addr |
| 3163 __ add(dst, dst_pos, to); // dst_addr | |
| 3164 __ BIND(L_plain_copy); | |
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3165 __ br(Assembler::always, false, Assembler::pt, entry_oop_arraycopy); |
| 0 | 3166 __ delayed()->signx(length, count); // length |
| 3167 | |
| 3168 __ BIND(L_checkcast_copy); | |
| 3169 // live at this point: G3_src_klass, G4_dst_klass | |
| 3170 { | |
| 3171 // Before looking at dst.length, make sure dst is also an objArray. | |
| 3172 // lduw(G4_dst_klass, lh_offset, O5_temp); // hoisted to delay slot | |
| 3173 __ cmp(G5_lh, O5_temp); | |
| 3174 __ br(Assembler::notEqual, false, Assembler::pn, L_failed); | |
| 3175 | |
| 3176 // It is safe to examine both src.length and dst.length. | |
| 3177 __ delayed(); // match next insn to prev branch | |
| 3178 arraycopy_range_checks(src, src_pos, dst, dst_pos, length, | |
| 3179 O5_temp, G5_lh, L_failed); | |
| 3180 | |
| 3181 // Marshal the base address arguments now, freeing registers. | |
| 3182 __ add(src, arrayOopDesc::base_offset_in_bytes(T_OBJECT), src); //src offset | |
| 3183 __ add(dst, arrayOopDesc::base_offset_in_bytes(T_OBJECT), dst); //dst offset | |
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3184 __ sll_ptr(src_pos, LogBytesPerHeapOop, src_pos); |
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3185 __ sll_ptr(dst_pos, LogBytesPerHeapOop, dst_pos); |
| 0 | 3186 __ add(src, src_pos, from); // src_addr |
| 3187 __ add(dst, dst_pos, to); // dst_addr | |
| 3188 __ signx(length, count); // length (reloaded) | |
| 3189 | |
| 3190 Register sco_temp = O3; // this register is free now | |
| 3191 assert_different_registers(from, to, count, sco_temp, | |
| 3192 G4_dst_klass, G3_src_klass); | |
| 3193 | |
| 3194 // Generate the type check. | |
|
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3195 int sco_offset = in_bytes(Klass::super_check_offset_offset()); |
| 0 | 3196 __ lduw(G4_dst_klass, sco_offset, sco_temp); |
| 3197 generate_type_check(G3_src_klass, sco_temp, G4_dst_klass, | |
| 3198 O5_temp, L_plain_copy); | |
| 3199 | |
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3200 // Fetch destination element klass from the ObjArrayKlass header. |
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3201 int ek_offset = in_bytes(ObjArrayKlass::element_klass_offset()); |
| 0 | 3202 |
| 3203 // the checkcast_copy loop needs two extra arguments: | |
| 3204 __ ld_ptr(G4_dst_klass, ek_offset, O4); // dest elem klass | |
| 3205 // lduw(O4, sco_offset, O3); // sco of elem klass | |
| 3206 | |
|
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3207 __ br(Assembler::always, false, Assembler::pt, entry_checkcast_arraycopy); |
| 0 | 3208 __ delayed()->lduw(O4, sco_offset, O3); |
| 3209 } | |
| 3210 | |
| 3211 __ BIND(L_failed); | |
| 3212 __ retl(); | |
| 3213 __ delayed()->sub(G0, 1, O0); // return -1 | |
| 3214 return start; | |
| 3215 } | |
| 3216 | |
| 3892 | 3217 // |
| 3218 // Generate stub for heap zeroing. | |
| 3219 // "to" address is aligned to jlong (8 bytes). | |
| 3220 // | |
| 3221 // Arguments for generated stub: | |
| 3222 // to: O0 | |
| 3223 // count: O1 treated as signed (count of HeapWord) | |
| 3224 // count could be 0 | |
| 3225 // | |
| 3226 address generate_zero_aligned_words(const char* name) { | |
| 3227 __ align(CodeEntryAlignment); | |
| 3228 StubCodeMark mark(this, "StubRoutines", name); | |
| 3229 address start = __ pc(); | |
| 3230 | |
| 3231 const Register to = O0; // source array address | |
| 3232 const Register count = O1; // HeapWords count | |
| 3233 const Register temp = O2; // scratch | |
| 3234 | |
| 3235 Label Ldone; | |
| 3236 __ sllx(count, LogHeapWordSize, count); // to bytes count | |
| 3237 // Use BIS for zeroing | |
| 3238 __ bis_zeroing(to, count, temp, Ldone); | |
| 3239 __ bind(Ldone); | |
| 3240 __ retl(); | |
| 3241 __ delayed()->nop(); | |
| 3242 return start; | |
| 3243 } | |
| 3244 | |
| 0 | 3245 void generate_arraycopy_stubs() { |
|
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3246 address entry; |
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3247 address entry_jbyte_arraycopy; |
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3248 address entry_jshort_arraycopy; |
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3249 address entry_jint_arraycopy; |
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3250 address entry_oop_arraycopy; |
|
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3251 address entry_jlong_arraycopy; |
|
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3252 address entry_checkcast_arraycopy; |
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3253 |
| 2324 | 3254 //*** jbyte |
| 3255 // Always need aligned and unaligned versions | |
| 3256 StubRoutines::_jbyte_disjoint_arraycopy = generate_disjoint_byte_copy(false, &entry, | |
| 3257 "jbyte_disjoint_arraycopy"); | |
| 3258 StubRoutines::_jbyte_arraycopy = generate_conjoint_byte_copy(false, entry, | |
| 3259 &entry_jbyte_arraycopy, | |
| 3260 "jbyte_arraycopy"); | |
| 3261 StubRoutines::_arrayof_jbyte_disjoint_arraycopy = generate_disjoint_byte_copy(true, &entry, | |
| 3262 "arrayof_jbyte_disjoint_arraycopy"); | |
| 3263 StubRoutines::_arrayof_jbyte_arraycopy = generate_conjoint_byte_copy(true, entry, NULL, | |
| 3264 "arrayof_jbyte_arraycopy"); | |
| 3265 | |
| 3266 //*** jshort | |
| 3267 // Always need aligned and unaligned versions | |
| 3268 StubRoutines::_jshort_disjoint_arraycopy = generate_disjoint_short_copy(false, &entry, | |
| 3269 "jshort_disjoint_arraycopy"); | |
| 3270 StubRoutines::_jshort_arraycopy = generate_conjoint_short_copy(false, entry, | |
| 3271 &entry_jshort_arraycopy, | |
| 3272 "jshort_arraycopy"); | |
|
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3273 StubRoutines::_arrayof_jshort_disjoint_arraycopy = generate_disjoint_short_copy(true, &entry, |
|
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3274 "arrayof_jshort_disjoint_arraycopy"); |
|
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3275 StubRoutines::_arrayof_jshort_arraycopy = generate_conjoint_short_copy(true, entry, NULL, |
|
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3276 "arrayof_jshort_arraycopy"); |
|
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3277 |
| 2324 | 3278 //*** jint |
| 3279 // Aligned versions | |
| 3280 StubRoutines::_arrayof_jint_disjoint_arraycopy = generate_disjoint_int_copy(true, &entry, | |
| 3281 "arrayof_jint_disjoint_arraycopy"); | |
| 3282 StubRoutines::_arrayof_jint_arraycopy = generate_conjoint_int_copy(true, entry, &entry_jint_arraycopy, | |
| 3283 "arrayof_jint_arraycopy"); | |
| 0 | 3284 #ifdef _LP64 |
| 2324 | 3285 // In 64 bit we need both aligned and unaligned versions of jint arraycopy. |
| 3286 // entry_jint_arraycopy always points to the unaligned version (notice that we overwrite it). | |
| 3287 StubRoutines::_jint_disjoint_arraycopy = generate_disjoint_int_copy(false, &entry, | |
| 3288 "jint_disjoint_arraycopy"); | |
| 3289 StubRoutines::_jint_arraycopy = generate_conjoint_int_copy(false, entry, | |
| 3290 &entry_jint_arraycopy, | |
| 3291 "jint_arraycopy"); | |
| 3292 #else | |
| 3293 // In 32 bit jints are always HeapWordSize aligned, so always use the aligned version | |
| 3294 // (in fact in 32bit we always have a pre-loop part even in the aligned version, | |
| 3295 // because it uses 64-bit loads/stores, so the aligned flag is actually ignored). | |
| 3296 StubRoutines::_jint_disjoint_arraycopy = StubRoutines::_arrayof_jint_disjoint_arraycopy; | |
| 3297 StubRoutines::_jint_arraycopy = StubRoutines::_arrayof_jint_arraycopy; | |
| 0 | 3298 #endif |
|
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3299 |
| 2324 | 3300 |
| 3301 //*** jlong | |
| 3302 // It is always aligned | |
| 3303 StubRoutines::_arrayof_jlong_disjoint_arraycopy = generate_disjoint_long_copy(true, &entry, | |
| 3304 "arrayof_jlong_disjoint_arraycopy"); | |
| 3305 StubRoutines::_arrayof_jlong_arraycopy = generate_conjoint_long_copy(true, entry, &entry_jlong_arraycopy, | |
| 3306 "arrayof_jlong_arraycopy"); | |
| 3307 StubRoutines::_jlong_disjoint_arraycopy = StubRoutines::_arrayof_jlong_disjoint_arraycopy; | |
| 3308 StubRoutines::_jlong_arraycopy = StubRoutines::_arrayof_jlong_arraycopy; | |
| 3309 | |
| 3310 | |
| 3311 //*** oops | |
| 3312 // Aligned versions | |
| 3313 StubRoutines::_arrayof_oop_disjoint_arraycopy = generate_disjoint_oop_copy(true, &entry, | |
| 3314 "arrayof_oop_disjoint_arraycopy"); | |
| 3315 StubRoutines::_arrayof_oop_arraycopy = generate_conjoint_oop_copy(true, entry, &entry_oop_arraycopy, | |
| 3316 "arrayof_oop_arraycopy"); | |
| 3317 // Aligned versions without pre-barriers | |
| 3318 StubRoutines::_arrayof_oop_disjoint_arraycopy_uninit = generate_disjoint_oop_copy(true, &entry, | |
| 3319 "arrayof_oop_disjoint_arraycopy_uninit", | |
| 3320 /*dest_uninitialized*/true); | |
| 3321 StubRoutines::_arrayof_oop_arraycopy_uninit = generate_conjoint_oop_copy(true, entry, NULL, | |
| 3322 "arrayof_oop_arraycopy_uninit", | |
| 3323 /*dest_uninitialized*/true); | |
| 3324 #ifdef _LP64 | |
| 3325 if (UseCompressedOops) { | |
| 3326 // With compressed oops we need unaligned versions, notice that we overwrite entry_oop_arraycopy. | |
| 3327 StubRoutines::_oop_disjoint_arraycopy = generate_disjoint_oop_copy(false, &entry, | |
| 3328 "oop_disjoint_arraycopy"); | |
| 3329 StubRoutines::_oop_arraycopy = generate_conjoint_oop_copy(false, entry, &entry_oop_arraycopy, | |
| 3330 "oop_arraycopy"); | |
| 3331 // Unaligned versions without pre-barriers | |
| 3332 StubRoutines::_oop_disjoint_arraycopy_uninit = generate_disjoint_oop_copy(false, &entry, | |
| 3333 "oop_disjoint_arraycopy_uninit", | |
| 3334 /*dest_uninitialized*/true); | |
| 3335 StubRoutines::_oop_arraycopy_uninit = generate_conjoint_oop_copy(false, entry, NULL, | |
| 3336 "oop_arraycopy_uninit", | |
| 3337 /*dest_uninitialized*/true); | |
| 3338 } else | |
| 3339 #endif | |
| 3340 { | |
| 3341 // oop arraycopy is always aligned on 32bit and 64bit without compressed oops | |
| 3342 StubRoutines::_oop_disjoint_arraycopy = StubRoutines::_arrayof_oop_disjoint_arraycopy; | |
| 3343 StubRoutines::_oop_arraycopy = StubRoutines::_arrayof_oop_arraycopy; | |
| 3344 StubRoutines::_oop_disjoint_arraycopy_uninit = StubRoutines::_arrayof_oop_disjoint_arraycopy_uninit; | |
| 3345 StubRoutines::_oop_arraycopy_uninit = StubRoutines::_arrayof_oop_arraycopy_uninit; | |
| 3346 } | |
| 3347 | |
| 3348 StubRoutines::_checkcast_arraycopy = generate_checkcast_copy("checkcast_arraycopy", &entry_checkcast_arraycopy); | |
| 3349 StubRoutines::_checkcast_arraycopy_uninit = generate_checkcast_copy("checkcast_arraycopy_uninit", NULL, | |
| 3350 /*dest_uninitialized*/true); | |
| 3351 | |
|
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3352 StubRoutines::_unsafe_arraycopy = generate_unsafe_copy("unsafe_arraycopy", |
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|
3353 entry_jbyte_arraycopy, |
|
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|
3354 entry_jshort_arraycopy, |
|
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|
3355 entry_jint_arraycopy, |
|
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|
3356 entry_jlong_arraycopy); |
|
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|
3357 StubRoutines::_generic_arraycopy = generate_generic_copy("generic_arraycopy", |
|
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|
3358 entry_jbyte_arraycopy, |
|
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|
3359 entry_jshort_arraycopy, |
|
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|
3360 entry_jint_arraycopy, |
|
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|
3361 entry_oop_arraycopy, |
|
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|
3362 entry_jlong_arraycopy, |
|
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|
3363 entry_checkcast_arraycopy); |
| 1763 | 3364 |
| 3365 StubRoutines::_jbyte_fill = generate_fill(T_BYTE, false, "jbyte_fill"); | |
| 3366 StubRoutines::_jshort_fill = generate_fill(T_SHORT, false, "jshort_fill"); | |
| 3367 StubRoutines::_jint_fill = generate_fill(T_INT, false, "jint_fill"); | |
| 3368 StubRoutines::_arrayof_jbyte_fill = generate_fill(T_BYTE, true, "arrayof_jbyte_fill"); | |
| 3369 StubRoutines::_arrayof_jshort_fill = generate_fill(T_SHORT, true, "arrayof_jshort_fill"); | |
| 3370 StubRoutines::_arrayof_jint_fill = generate_fill(T_INT, true, "arrayof_jint_fill"); | |
| 3892 | 3371 |
| 3372 if (UseBlockZeroing) { | |
| 3373 StubRoutines::_zero_aligned_words = generate_zero_aligned_words("zero_aligned_words"); | |
| 3374 } | |
| 0 | 3375 } |
| 3376 | |
| 3377 void generate_initial() { | |
| 3378 // Generates all stubs and initializes the entry points | |
| 3379 | |
| 3380 //------------------------------------------------------------------------------------------------------------------------ | |
| 3381 // entry points that exist in all platforms | |
| 3382 // Note: This is code that could be shared among different platforms - however the benefit seems to be smaller than | |
| 3383 // the disadvantage of having a much more complicated generator structure. See also comment in stubRoutines.hpp. | |
| 3384 StubRoutines::_forward_exception_entry = generate_forward_exception(); | |
| 3385 | |
| 3386 StubRoutines::_call_stub_entry = generate_call_stub(StubRoutines::_call_stub_return_address); | |
| 3387 StubRoutines::_catch_exception_entry = generate_catch_exception(); | |
| 3388 | |
| 3389 //------------------------------------------------------------------------------------------------------------------------ | |
| 3390 // entry points that are platform specific | |
| 3391 StubRoutines::Sparc::_test_stop_entry = generate_test_stop(); | |
| 3392 | |
| 3393 StubRoutines::Sparc::_stop_subroutine_entry = generate_stop_subroutine(); | |
| 3394 StubRoutines::Sparc::_flush_callers_register_windows_entry = generate_flush_callers_register_windows(); | |
| 3395 | |
| 3396 #if !defined(COMPILER2) && !defined(_LP64) | |
| 3397 StubRoutines::_atomic_xchg_entry = generate_atomic_xchg(); | |
| 3398 StubRoutines::_atomic_cmpxchg_entry = generate_atomic_cmpxchg(); | |
| 3399 StubRoutines::_atomic_add_entry = generate_atomic_add(); | |
| 3400 StubRoutines::_atomic_xchg_ptr_entry = StubRoutines::_atomic_xchg_entry; | |
| 3401 StubRoutines::_atomic_cmpxchg_ptr_entry = StubRoutines::_atomic_cmpxchg_entry; | |
| 3402 StubRoutines::_atomic_cmpxchg_long_entry = generate_atomic_cmpxchg_long(); | |
| 3403 StubRoutines::_atomic_add_ptr_entry = StubRoutines::_atomic_add_entry; | |
| 3404 #endif // COMPILER2 !=> _LP64 | |
|
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3405 |
| 4743 | 3406 // Build this early so it's available for the interpreter. |
| 3407 StubRoutines::_throw_StackOverflowError_entry = generate_throw_exception("StackOverflowError throw_exception", CAST_FROM_FN_PTR(address, SharedRuntime::throw_StackOverflowError)); | |
| 0 | 3408 } |
| 3409 | |
| 3410 | |
| 3411 void generate_all() { | |
| 3412 // Generates all stubs and initializes the entry points | |
| 3413 | |
|
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3414 // Generate partial_subtype_check first here since its code depends on |
|
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3415 // UseZeroBaseCompressedOops which is defined after heap initialization. |
|
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3416 StubRoutines::Sparc::_partial_subtype_check = generate_partial_subtype_check(); |
| 0 | 3417 // These entry points require SharedInfo::stack0 to be set up in non-core builds |
| 3937 | 3418 StubRoutines::_throw_AbstractMethodError_entry = generate_throw_exception("AbstractMethodError throw_exception", CAST_FROM_FN_PTR(address, SharedRuntime::throw_AbstractMethodError)); |
| 3419 StubRoutines::_throw_IncompatibleClassChangeError_entry= generate_throw_exception("IncompatibleClassChangeError throw_exception", CAST_FROM_FN_PTR(address, SharedRuntime::throw_IncompatibleClassChangeError)); | |
| 3420 StubRoutines::_throw_NullPointerException_at_call_entry= generate_throw_exception("NullPointerException at call throw_exception", CAST_FROM_FN_PTR(address, SharedRuntime::throw_NullPointerException_at_call)); | |
| 0 | 3421 |
| 3422 StubRoutines::_handler_for_unsafe_access_entry = | |
| 3423 generate_handler_for_unsafe_access(); | |
| 3424 | |
| 3425 // support for verify_oop (must happen after universe_init) | |
| 3426 StubRoutines::_verify_oop_subroutine_entry = generate_verify_oop_subroutine(); | |
| 3427 | |
| 3428 // arraycopy stubs used by compilers | |
| 3429 generate_arraycopy_stubs(); | |
|
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3430 |
|
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3431 // Don't initialize the platform math functions since sparc |
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|
3432 // doesn't have intrinsics for these operations. |
| 0 | 3433 } |
| 3434 | |
| 3435 | |
| 3436 public: | |
| 3437 StubGenerator(CodeBuffer* code, bool all) : StubCodeGenerator(code) { | |
| 3438 // replace the standard masm with a special one: | |
| 3439 _masm = new MacroAssembler(code); | |
| 3440 | |
| 3441 _stub_count = !all ? 0x100 : 0x200; | |
| 3442 if (all) { | |
| 3443 generate_all(); | |
| 3444 } else { | |
| 3445 generate_initial(); | |
| 3446 } | |
| 3447 | |
| 3448 // make sure this stub is available for all local calls | |
| 3449 if (_atomic_add_stub.is_unbound()) { | |
| 3450 // generate a second time, if necessary | |
| 3451 (void) generate_atomic_add(); | |
| 3452 } | |
| 3453 } | |
| 3454 | |
| 3455 | |
| 3456 private: | |
| 3457 int _stub_count; | |
| 3458 void stub_prolog(StubCodeDesc* cdesc) { | |
| 3459 # ifdef ASSERT | |
| 3460 // put extra information in the stub code, to make it more readable | |
| 3461 #ifdef _LP64 | |
| 3462 // Write the high part of the address | |
| 3463 // [RGV] Check if there is a dependency on the size of this prolog | |
| 3464 __ emit_data((intptr_t)cdesc >> 32, relocInfo::none); | |
| 3465 #endif | |
| 3466 __ emit_data((intptr_t)cdesc, relocInfo::none); | |
| 3467 __ emit_data(++_stub_count, relocInfo::none); | |
| 3468 # endif | |
| 3469 align(true); | |
| 3470 } | |
| 3471 | |
| 3472 void align(bool at_header = false) { | |
| 3473 // %%%%% move this constant somewhere else | |
| 3474 // UltraSPARC cache line size is 8 instructions: | |
| 3475 const unsigned int icache_line_size = 32; | |
| 3476 const unsigned int icache_half_line_size = 16; | |
| 3477 | |
| 3478 if (at_header) { | |
| 3479 while ((intptr_t)(__ pc()) % icache_line_size != 0) { | |
| 3480 __ emit_data(0, relocInfo::none); | |
| 3481 } | |
| 3482 } else { | |
| 3483 while ((intptr_t)(__ pc()) % icache_half_line_size != 0) { | |
| 3484 __ nop(); | |
| 3485 } | |
| 3486 } | |
| 3487 } | |
| 3488 | |
| 3489 }; // end class declaration | |
| 3490 | |
| 3491 void StubGenerator_generate(CodeBuffer* code, bool all) { | |
| 3492 StubGenerator g(code, all); | |
| 3493 } |