Mercurial > hg > truffle
annotate src/cpu/x86/vm/c1_LIRGenerator_x86.cpp @ 3978:f0ecbe78fc7b
7092238: G1: Uninitialized field gc_efficiency in G1PrintRegionLivenessInfo output
Reviewed-by: jcoomes, johnc
author | tonyp |
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date | Thu, 22 Sep 2011 07:18:51 -0400 |
parents | e1162778c1c8 |
children | 5cceda753a4a |
rev | line source |
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0 | 1 /* |
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2 * Copyright (c) 2005, 2011, Oracle and/or its affiliates. All rights reserved. |
0 | 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
4 * | |
5 * This code is free software; you can redistribute it and/or modify it | |
6 * under the terms of the GNU General Public License version 2 only, as | |
7 * published by the Free Software Foundation. | |
8 * | |
9 * This code is distributed in the hope that it will be useful, but WITHOUT | |
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
12 * version 2 for more details (a copy is included in the LICENSE file that | |
13 * accompanied this code). | |
14 * | |
15 * You should have received a copy of the GNU General Public License version | |
16 * 2 along with this work; if not, write to the Free Software Foundation, | |
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
18 * | |
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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20 * or visit www.oracle.com if you need additional information or have any |
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21 * questions. |
0 | 22 * |
23 */ | |
24 | |
1972 | 25 #include "precompiled.hpp" |
26 #include "c1/c1_Compilation.hpp" | |
27 #include "c1/c1_FrameMap.hpp" | |
28 #include "c1/c1_Instruction.hpp" | |
29 #include "c1/c1_LIRAssembler.hpp" | |
30 #include "c1/c1_LIRGenerator.hpp" | |
31 #include "c1/c1_Runtime1.hpp" | |
32 #include "c1/c1_ValueStack.hpp" | |
33 #include "ci/ciArray.hpp" | |
34 #include "ci/ciObjArrayKlass.hpp" | |
35 #include "ci/ciTypeArrayKlass.hpp" | |
36 #include "runtime/sharedRuntime.hpp" | |
37 #include "runtime/stubRoutines.hpp" | |
38 #include "vmreg_x86.inline.hpp" | |
0 | 39 |
40 #ifdef ASSERT | |
41 #define __ gen()->lir(__FILE__, __LINE__)-> | |
42 #else | |
43 #define __ gen()->lir()-> | |
44 #endif | |
45 | |
46 // Item will be loaded into a byte register; Intel only | |
47 void LIRItem::load_byte_item() { | |
48 load_item(); | |
49 LIR_Opr res = result(); | |
50 | |
51 if (!res->is_virtual() || !_gen->is_vreg_flag_set(res, LIRGenerator::byte_reg)) { | |
52 // make sure that it is a byte register | |
53 assert(!value()->type()->is_float() && !value()->type()->is_double(), | |
54 "can't load floats in byte register"); | |
55 LIR_Opr reg = _gen->rlock_byte(T_BYTE); | |
56 __ move(res, reg); | |
57 | |
58 _result = reg; | |
59 } | |
60 } | |
61 | |
62 | |
63 void LIRItem::load_nonconstant() { | |
64 LIR_Opr r = value()->operand(); | |
65 if (r->is_constant()) { | |
66 _result = r; | |
67 } else { | |
68 load_item(); | |
69 } | |
70 } | |
71 | |
72 //-------------------------------------------------------------- | |
73 // LIRGenerator | |
74 //-------------------------------------------------------------- | |
75 | |
76 | |
77 LIR_Opr LIRGenerator::exceptionOopOpr() { return FrameMap::rax_oop_opr; } | |
78 LIR_Opr LIRGenerator::exceptionPcOpr() { return FrameMap::rdx_opr; } | |
79 LIR_Opr LIRGenerator::divInOpr() { return FrameMap::rax_opr; } | |
80 LIR_Opr LIRGenerator::divOutOpr() { return FrameMap::rax_opr; } | |
81 LIR_Opr LIRGenerator::remOutOpr() { return FrameMap::rdx_opr; } | |
82 LIR_Opr LIRGenerator::shiftCountOpr() { return FrameMap::rcx_opr; } | |
83 LIR_Opr LIRGenerator::syncTempOpr() { return FrameMap::rax_opr; } | |
84 LIR_Opr LIRGenerator::getThreadTemp() { return LIR_OprFact::illegalOpr; } | |
85 | |
86 | |
87 LIR_Opr LIRGenerator::result_register_for(ValueType* type, bool callee) { | |
88 LIR_Opr opr; | |
89 switch (type->tag()) { | |
90 case intTag: opr = FrameMap::rax_opr; break; | |
91 case objectTag: opr = FrameMap::rax_oop_opr; break; | |
304 | 92 case longTag: opr = FrameMap::long0_opr; break; |
0 | 93 case floatTag: opr = UseSSE >= 1 ? FrameMap::xmm0_float_opr : FrameMap::fpu0_float_opr; break; |
94 case doubleTag: opr = UseSSE >= 2 ? FrameMap::xmm0_double_opr : FrameMap::fpu0_double_opr; break; | |
95 | |
96 case addressTag: | |
97 default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr; | |
98 } | |
99 | |
100 assert(opr->type_field() == as_OprType(as_BasicType(type)), "type mismatch"); | |
101 return opr; | |
102 } | |
103 | |
104 | |
105 LIR_Opr LIRGenerator::rlock_byte(BasicType type) { | |
106 LIR_Opr reg = new_register(T_INT); | |
107 set_vreg_flag(reg, LIRGenerator::byte_reg); | |
108 return reg; | |
109 } | |
110 | |
111 | |
112 //--------- loading items into registers -------------------------------- | |
113 | |
114 | |
115 // i486 instructions can inline constants | |
116 bool LIRGenerator::can_store_as_constant(Value v, BasicType type) const { | |
117 if (type == T_SHORT || type == T_CHAR) { | |
118 // there is no immediate move of word values in asembler_i486.?pp | |
119 return false; | |
120 } | |
121 Constant* c = v->as_Constant(); | |
1819 | 122 if (c && c->state_before() == NULL) { |
0 | 123 // constants of any type can be stored directly, except for |
124 // unloaded object constants. | |
125 return true; | |
126 } | |
127 return false; | |
128 } | |
129 | |
130 | |
131 bool LIRGenerator::can_inline_as_constant(Value v) const { | |
304 | 132 if (v->type()->tag() == longTag) return false; |
0 | 133 return v->type()->tag() != objectTag || |
134 (v->type()->is_constant() && v->type()->as_ObjectType()->constant_value()->is_null_object()); | |
135 } | |
136 | |
137 | |
138 bool LIRGenerator::can_inline_as_constant(LIR_Const* c) const { | |
304 | 139 if (c->type() == T_LONG) return false; |
0 | 140 return c->type() != T_OBJECT || c->as_jobject() == NULL; |
141 } | |
142 | |
143 | |
144 LIR_Opr LIRGenerator::safepoint_poll_register() { | |
145 return LIR_OprFact::illegalOpr; | |
146 } | |
147 | |
148 | |
149 LIR_Address* LIRGenerator::generate_address(LIR_Opr base, LIR_Opr index, | |
150 int shift, int disp, BasicType type) { | |
151 assert(base->is_register(), "must be"); | |
152 if (index->is_constant()) { | |
153 return new LIR_Address(base, | |
154 (index->as_constant_ptr()->as_jint() << shift) + disp, | |
155 type); | |
156 } else { | |
157 return new LIR_Address(base, index, (LIR_Address::Scale)shift, disp, type); | |
158 } | |
159 } | |
160 | |
161 | |
162 LIR_Address* LIRGenerator::emit_array_address(LIR_Opr array_opr, LIR_Opr index_opr, | |
163 BasicType type, bool needs_card_mark) { | |
164 int offset_in_bytes = arrayOopDesc::base_offset_in_bytes(type); | |
165 | |
166 LIR_Address* addr; | |
167 if (index_opr->is_constant()) { | |
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168 int elem_size = type2aelembytes(type); |
0 | 169 addr = new LIR_Address(array_opr, |
170 offset_in_bytes + index_opr->as_jint() * elem_size, type); | |
171 } else { | |
304 | 172 #ifdef _LP64 |
173 if (index_opr->type() == T_INT) { | |
174 LIR_Opr tmp = new_register(T_LONG); | |
175 __ convert(Bytecodes::_i2l, index_opr, tmp); | |
176 index_opr = tmp; | |
177 } | |
178 #endif // _LP64 | |
0 | 179 addr = new LIR_Address(array_opr, |
180 index_opr, | |
181 LIR_Address::scale(type), | |
182 offset_in_bytes, type); | |
183 } | |
184 if (needs_card_mark) { | |
185 // This store will need a precise card mark, so go ahead and | |
186 // compute the full adddres instead of computing once for the | |
187 // store and again for the card mark. | |
304 | 188 LIR_Opr tmp = new_pointer_register(); |
0 | 189 __ leal(LIR_OprFact::address(addr), tmp); |
1572 | 190 return new LIR_Address(tmp, type); |
0 | 191 } else { |
192 return addr; | |
193 } | |
194 } | |
195 | |
196 | |
1783 | 197 LIR_Opr LIRGenerator::load_immediate(int x, BasicType type) { |
198 LIR_Opr r; | |
199 if (type == T_LONG) { | |
200 r = LIR_OprFact::longConst(x); | |
201 } else if (type == T_INT) { | |
202 r = LIR_OprFact::intConst(x); | |
203 } else { | |
204 ShouldNotReachHere(); | |
205 } | |
206 return r; | |
207 } | |
208 | |
209 void LIRGenerator::increment_counter(address counter, BasicType type, int step) { | |
304 | 210 LIR_Opr pointer = new_pointer_register(); |
211 __ move(LIR_OprFact::intptrConst(counter), pointer); | |
1783 | 212 LIR_Address* addr = new LIR_Address(pointer, type); |
0 | 213 increment_counter(addr, step); |
214 } | |
215 | |
216 | |
217 void LIRGenerator::increment_counter(LIR_Address* addr, int step) { | |
218 __ add((LIR_Opr)addr, LIR_OprFact::intConst(step), (LIR_Opr)addr); | |
219 } | |
220 | |
221 void LIRGenerator::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) { | |
222 __ cmp_mem_int(condition, base, disp, c, info); | |
223 } | |
224 | |
225 | |
226 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, int disp, BasicType type, CodeEmitInfo* info) { | |
227 __ cmp_reg_mem(condition, reg, new LIR_Address(base, disp, type), info); | |
228 } | |
229 | |
230 | |
231 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, LIR_Opr disp, BasicType type, CodeEmitInfo* info) { | |
232 __ cmp_reg_mem(condition, reg, new LIR_Address(base, disp, type), info); | |
233 } | |
234 | |
235 | |
236 bool LIRGenerator::strength_reduce_multiply(LIR_Opr left, int c, LIR_Opr result, LIR_Opr tmp) { | |
237 if (tmp->is_valid()) { | |
238 if (is_power_of_2(c + 1)) { | |
239 __ move(left, tmp); | |
240 __ shift_left(left, log2_intptr(c + 1), left); | |
241 __ sub(left, tmp, result); | |
242 return true; | |
243 } else if (is_power_of_2(c - 1)) { | |
244 __ move(left, tmp); | |
245 __ shift_left(left, log2_intptr(c - 1), left); | |
246 __ add(left, tmp, result); | |
247 return true; | |
248 } | |
249 } | |
250 return false; | |
251 } | |
252 | |
253 | |
254 void LIRGenerator::store_stack_parameter (LIR_Opr item, ByteSize offset_from_sp) { | |
255 BasicType type = item->type(); | |
256 __ store(item, new LIR_Address(FrameMap::rsp_opr, in_bytes(offset_from_sp), type)); | |
257 } | |
258 | |
259 //---------------------------------------------------------------------- | |
260 // visitor functions | |
261 //---------------------------------------------------------------------- | |
262 | |
263 | |
264 void LIRGenerator::do_StoreIndexed(StoreIndexed* x) { | |
1819 | 265 assert(x->is_pinned(),""); |
0 | 266 bool needs_range_check = true; |
267 bool use_length = x->length() != NULL; | |
268 bool obj_store = x->elt_type() == T_ARRAY || x->elt_type() == T_OBJECT; | |
269 bool needs_store_check = obj_store && (x->value()->as_Constant() == NULL || | |
270 !get_jobject_constant(x->value())->is_null_object()); | |
271 | |
272 LIRItem array(x->array(), this); | |
273 LIRItem index(x->index(), this); | |
274 LIRItem value(x->value(), this); | |
275 LIRItem length(this); | |
276 | |
277 array.load_item(); | |
278 index.load_nonconstant(); | |
279 | |
280 if (use_length) { | |
281 needs_range_check = x->compute_needs_range_check(); | |
282 if (needs_range_check) { | |
283 length.set_instruction(x->length()); | |
284 length.load_item(); | |
285 } | |
286 } | |
287 if (needs_store_check) { | |
288 value.load_item(); | |
289 } else { | |
290 value.load_for_store(x->elt_type()); | |
291 } | |
292 | |
293 set_no_result(x); | |
294 | |
295 // the CodeEmitInfo must be duplicated for each different | |
296 // LIR-instruction because spilling can occur anywhere between two | |
297 // instructions and so the debug information must be different | |
298 CodeEmitInfo* range_check_info = state_for(x); | |
299 CodeEmitInfo* null_check_info = NULL; | |
300 if (x->needs_null_check()) { | |
301 null_check_info = new CodeEmitInfo(range_check_info); | |
302 } | |
303 | |
304 // emit array address setup early so it schedules better | |
305 LIR_Address* array_addr = emit_array_address(array.result(), index.result(), x->elt_type(), obj_store); | |
306 | |
307 if (GenerateRangeChecks && needs_range_check) { | |
308 if (use_length) { | |
309 __ cmp(lir_cond_belowEqual, length.result(), index.result()); | |
310 __ branch(lir_cond_belowEqual, T_INT, new RangeCheckStub(range_check_info, index.result())); | |
311 } else { | |
312 array_range_check(array.result(), index.result(), null_check_info, range_check_info); | |
313 // range_check also does the null check | |
314 null_check_info = NULL; | |
315 } | |
316 } | |
317 | |
318 if (GenerateArrayStoreCheck && needs_store_check) { | |
319 LIR_Opr tmp1 = new_register(objectType); | |
320 LIR_Opr tmp2 = new_register(objectType); | |
321 LIR_Opr tmp3 = new_register(objectType); | |
322 | |
323 CodeEmitInfo* store_check_info = new CodeEmitInfo(range_check_info); | |
324 __ store_check(value.result(), array.result(), tmp1, tmp2, tmp3, store_check_info); | |
325 } | |
326 | |
327 if (obj_store) { | |
342
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328 // Needs GC write barriers. |
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329 pre_barrier(LIR_OprFact::address(array_addr), LIR_OprFact::illegalOpr /* pre_val */, |
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330 true /* do_load */, false /* patch */, NULL); |
0 | 331 __ move(value.result(), array_addr, null_check_info); |
332 // Seems to be a precise | |
333 post_barrier(LIR_OprFact::address(array_addr), value.result()); | |
334 } else { | |
335 __ move(value.result(), array_addr, null_check_info); | |
336 } | |
337 } | |
338 | |
339 | |
340 void LIRGenerator::do_MonitorEnter(MonitorEnter* x) { | |
1819 | 341 assert(x->is_pinned(),""); |
0 | 342 LIRItem obj(x->obj(), this); |
343 obj.load_item(); | |
344 | |
345 set_no_result(x); | |
346 | |
347 // "lock" stores the address of the monitor stack slot, so this is not an oop | |
348 LIR_Opr lock = new_register(T_INT); | |
349 // Need a scratch register for biased locking on x86 | |
350 LIR_Opr scratch = LIR_OprFact::illegalOpr; | |
351 if (UseBiasedLocking) { | |
352 scratch = new_register(T_INT); | |
353 } | |
354 | |
355 CodeEmitInfo* info_for_exception = NULL; | |
356 if (x->needs_null_check()) { | |
1819 | 357 info_for_exception = state_for(x); |
0 | 358 } |
359 // this CodeEmitInfo must not have the xhandlers because here the | |
360 // object is already locked (xhandlers expect object to be unlocked) | |
361 CodeEmitInfo* info = state_for(x, x->state(), true); | |
362 monitor_enter(obj.result(), lock, syncTempOpr(), scratch, | |
363 x->monitor_no(), info_for_exception, info); | |
364 } | |
365 | |
366 | |
367 void LIRGenerator::do_MonitorExit(MonitorExit* x) { | |
1819 | 368 assert(x->is_pinned(),""); |
0 | 369 |
370 LIRItem obj(x->obj(), this); | |
371 obj.dont_load_item(); | |
372 | |
373 LIR_Opr lock = new_register(T_INT); | |
374 LIR_Opr obj_temp = new_register(T_INT); | |
375 set_no_result(x); | |
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376 monitor_exit(obj_temp, lock, syncTempOpr(), LIR_OprFact::illegalOpr, x->monitor_no()); |
0 | 377 } |
378 | |
379 | |
380 // _ineg, _lneg, _fneg, _dneg | |
381 void LIRGenerator::do_NegateOp(NegateOp* x) { | |
382 LIRItem value(x->x(), this); | |
383 value.set_destroys_register(); | |
384 value.load_item(); | |
385 LIR_Opr reg = rlock(x); | |
386 __ negate(value.result(), reg); | |
387 | |
388 set_result(x, round_item(reg)); | |
389 } | |
390 | |
391 | |
392 // for _fadd, _fmul, _fsub, _fdiv, _frem | |
393 // _dadd, _dmul, _dsub, _ddiv, _drem | |
394 void LIRGenerator::do_ArithmeticOp_FPU(ArithmeticOp* x) { | |
395 LIRItem left(x->x(), this); | |
396 LIRItem right(x->y(), this); | |
397 LIRItem* left_arg = &left; | |
398 LIRItem* right_arg = &right; | |
399 assert(!left.is_stack() || !right.is_stack(), "can't both be memory operands"); | |
400 bool must_load_both = (x->op() == Bytecodes::_frem || x->op() == Bytecodes::_drem); | |
401 if (left.is_register() || x->x()->type()->is_constant() || must_load_both) { | |
402 left.load_item(); | |
403 } else { | |
404 left.dont_load_item(); | |
405 } | |
406 | |
407 // do not load right operand if it is a constant. only 0 and 1 are | |
408 // loaded because there are special instructions for loading them | |
409 // without memory access (not needed for SSE2 instructions) | |
410 bool must_load_right = false; | |
411 if (right.is_constant()) { | |
412 LIR_Const* c = right.result()->as_constant_ptr(); | |
413 assert(c != NULL, "invalid constant"); | |
414 assert(c->type() == T_FLOAT || c->type() == T_DOUBLE, "invalid type"); | |
415 | |
416 if (c->type() == T_FLOAT) { | |
417 must_load_right = UseSSE < 1 && (c->is_one_float() || c->is_zero_float()); | |
418 } else { | |
419 must_load_right = UseSSE < 2 && (c->is_one_double() || c->is_zero_double()); | |
420 } | |
421 } | |
422 | |
423 if (must_load_both) { | |
424 // frem and drem destroy also right operand, so move it to a new register | |
425 right.set_destroys_register(); | |
426 right.load_item(); | |
427 } else if (right.is_register() || must_load_right) { | |
428 right.load_item(); | |
429 } else { | |
430 right.dont_load_item(); | |
431 } | |
432 LIR_Opr reg = rlock(x); | |
433 LIR_Opr tmp = LIR_OprFact::illegalOpr; | |
434 if (x->is_strictfp() && (x->op() == Bytecodes::_dmul || x->op() == Bytecodes::_ddiv)) { | |
435 tmp = new_register(T_DOUBLE); | |
436 } | |
437 | |
438 if ((UseSSE >= 1 && x->op() == Bytecodes::_frem) || (UseSSE >= 2 && x->op() == Bytecodes::_drem)) { | |
439 // special handling for frem and drem: no SSE instruction, so must use FPU with temporary fpu stack slots | |
440 LIR_Opr fpu0, fpu1; | |
441 if (x->op() == Bytecodes::_frem) { | |
442 fpu0 = LIR_OprFact::single_fpu(0); | |
443 fpu1 = LIR_OprFact::single_fpu(1); | |
444 } else { | |
445 fpu0 = LIR_OprFact::double_fpu(0); | |
446 fpu1 = LIR_OprFact::double_fpu(1); | |
447 } | |
448 __ move(right.result(), fpu1); // order of left and right operand is important! | |
449 __ move(left.result(), fpu0); | |
450 __ rem (fpu0, fpu1, fpu0); | |
451 __ move(fpu0, reg); | |
452 | |
453 } else { | |
454 arithmetic_op_fpu(x->op(), reg, left.result(), right.result(), x->is_strictfp(), tmp); | |
455 } | |
456 | |
457 set_result(x, round_item(reg)); | |
458 } | |
459 | |
460 | |
461 // for _ladd, _lmul, _lsub, _ldiv, _lrem | |
462 void LIRGenerator::do_ArithmeticOp_Long(ArithmeticOp* x) { | |
463 if (x->op() == Bytecodes::_ldiv || x->op() == Bytecodes::_lrem ) { | |
464 // long division is implemented as a direct call into the runtime | |
465 LIRItem left(x->x(), this); | |
466 LIRItem right(x->y(), this); | |
467 | |
468 // the check for division by zero destroys the right operand | |
469 right.set_destroys_register(); | |
470 | |
471 BasicTypeList signature(2); | |
472 signature.append(T_LONG); | |
473 signature.append(T_LONG); | |
474 CallingConvention* cc = frame_map()->c_calling_convention(&signature); | |
475 | |
476 // check for division by zero (destroys registers of right operand!) | |
477 CodeEmitInfo* info = state_for(x); | |
478 | |
479 const LIR_Opr result_reg = result_register_for(x->type()); | |
480 left.load_item_force(cc->at(1)); | |
481 right.load_item(); | |
482 | |
483 __ move(right.result(), cc->at(0)); | |
484 | |
485 __ cmp(lir_cond_equal, right.result(), LIR_OprFact::longConst(0)); | |
486 __ branch(lir_cond_equal, T_LONG, new DivByZeroStub(info)); | |
487 | |
488 address entry; | |
489 switch (x->op()) { | |
490 case Bytecodes::_lrem: | |
491 entry = CAST_FROM_FN_PTR(address, SharedRuntime::lrem); | |
492 break; // check if dividend is 0 is done elsewhere | |
493 case Bytecodes::_ldiv: | |
494 entry = CAST_FROM_FN_PTR(address, SharedRuntime::ldiv); | |
495 break; // check if dividend is 0 is done elsewhere | |
496 case Bytecodes::_lmul: | |
497 entry = CAST_FROM_FN_PTR(address, SharedRuntime::lmul); | |
498 break; | |
499 default: | |
500 ShouldNotReachHere(); | |
501 } | |
502 | |
503 LIR_Opr result = rlock_result(x); | |
504 __ call_runtime_leaf(entry, getThreadTemp(), result_reg, cc->args()); | |
505 __ move(result_reg, result); | |
506 } else if (x->op() == Bytecodes::_lmul) { | |
507 // missing test if instr is commutative and if we should swap | |
508 LIRItem left(x->x(), this); | |
509 LIRItem right(x->y(), this); | |
510 | |
511 // right register is destroyed by the long mul, so it must be | |
512 // copied to a new register. | |
513 right.set_destroys_register(); | |
514 | |
515 left.load_item(); | |
516 right.load_item(); | |
517 | |
304 | 518 LIR_Opr reg = FrameMap::long0_opr; |
0 | 519 arithmetic_op_long(x->op(), reg, left.result(), right.result(), NULL); |
520 LIR_Opr result = rlock_result(x); | |
521 __ move(reg, result); | |
522 } else { | |
523 // missing test if instr is commutative and if we should swap | |
524 LIRItem left(x->x(), this); | |
525 LIRItem right(x->y(), this); | |
526 | |
527 left.load_item(); | |
605 | 528 // don't load constants to save register |
0 | 529 right.load_nonconstant(); |
530 rlock_result(x); | |
531 arithmetic_op_long(x->op(), x->operand(), left.result(), right.result(), NULL); | |
532 } | |
533 } | |
534 | |
535 | |
536 | |
537 // for: _iadd, _imul, _isub, _idiv, _irem | |
538 void LIRGenerator::do_ArithmeticOp_Int(ArithmeticOp* x) { | |
539 if (x->op() == Bytecodes::_idiv || x->op() == Bytecodes::_irem) { | |
540 // The requirements for division and modulo | |
541 // input : rax,: dividend min_int | |
542 // reg: divisor (may not be rax,/rdx) -1 | |
543 // | |
544 // output: rax,: quotient (= rax, idiv reg) min_int | |
545 // rdx: remainder (= rax, irem reg) 0 | |
546 | |
547 // rax, and rdx will be destroyed | |
548 | |
549 // Note: does this invalidate the spec ??? | |
550 LIRItem right(x->y(), this); | |
551 LIRItem left(x->x() , this); // visit left second, so that the is_register test is valid | |
552 | |
553 // call state_for before load_item_force because state_for may | |
554 // force the evaluation of other instructions that are needed for | |
555 // correct debug info. Otherwise the live range of the fix | |
556 // register might be too long. | |
557 CodeEmitInfo* info = state_for(x); | |
558 | |
559 left.load_item_force(divInOpr()); | |
560 | |
561 right.load_item(); | |
562 | |
563 LIR_Opr result = rlock_result(x); | |
564 LIR_Opr result_reg; | |
565 if (x->op() == Bytecodes::_idiv) { | |
566 result_reg = divOutOpr(); | |
567 } else { | |
568 result_reg = remOutOpr(); | |
569 } | |
570 | |
571 if (!ImplicitDiv0Checks) { | |
572 __ cmp(lir_cond_equal, right.result(), LIR_OprFact::intConst(0)); | |
573 __ branch(lir_cond_equal, T_INT, new DivByZeroStub(info)); | |
574 } | |
575 LIR_Opr tmp = FrameMap::rdx_opr; // idiv and irem use rdx in their implementation | |
576 if (x->op() == Bytecodes::_irem) { | |
577 __ irem(left.result(), right.result(), result_reg, tmp, info); | |
578 } else if (x->op() == Bytecodes::_idiv) { | |
579 __ idiv(left.result(), right.result(), result_reg, tmp, info); | |
580 } else { | |
581 ShouldNotReachHere(); | |
582 } | |
583 | |
584 __ move(result_reg, result); | |
585 } else { | |
586 // missing test if instr is commutative and if we should swap | |
587 LIRItem left(x->x(), this); | |
588 LIRItem right(x->y(), this); | |
589 LIRItem* left_arg = &left; | |
590 LIRItem* right_arg = &right; | |
591 if (x->is_commutative() && left.is_stack() && right.is_register()) { | |
592 // swap them if left is real stack (or cached) and right is real register(not cached) | |
593 left_arg = &right; | |
594 right_arg = &left; | |
595 } | |
596 | |
597 left_arg->load_item(); | |
598 | |
599 // do not need to load right, as we can handle stack and constants | |
600 if (x->op() == Bytecodes::_imul ) { | |
601 // check if we can use shift instead | |
602 bool use_constant = false; | |
603 bool use_tmp = false; | |
604 if (right_arg->is_constant()) { | |
605 int iconst = right_arg->get_jint_constant(); | |
606 if (iconst > 0) { | |
607 if (is_power_of_2(iconst)) { | |
608 use_constant = true; | |
609 } else if (is_power_of_2(iconst - 1) || is_power_of_2(iconst + 1)) { | |
610 use_constant = true; | |
611 use_tmp = true; | |
612 } | |
613 } | |
614 } | |
615 if (use_constant) { | |
616 right_arg->dont_load_item(); | |
617 } else { | |
618 right_arg->load_item(); | |
619 } | |
620 LIR_Opr tmp = LIR_OprFact::illegalOpr; | |
621 if (use_tmp) { | |
622 tmp = new_register(T_INT); | |
623 } | |
624 rlock_result(x); | |
625 | |
626 arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), tmp); | |
627 } else { | |
628 right_arg->dont_load_item(); | |
629 rlock_result(x); | |
630 LIR_Opr tmp = LIR_OprFact::illegalOpr; | |
631 arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), tmp); | |
632 } | |
633 } | |
634 } | |
635 | |
636 | |
637 void LIRGenerator::do_ArithmeticOp(ArithmeticOp* x) { | |
638 // when an operand with use count 1 is the left operand, then it is | |
639 // likely that no move for 2-operand-LIR-form is necessary | |
640 if (x->is_commutative() && x->y()->as_Constant() == NULL && x->x()->use_count() > x->y()->use_count()) { | |
641 x->swap_operands(); | |
642 } | |
643 | |
644 ValueTag tag = x->type()->tag(); | |
645 assert(x->x()->type()->tag() == tag && x->y()->type()->tag() == tag, "wrong parameters"); | |
646 switch (tag) { | |
647 case floatTag: | |
648 case doubleTag: do_ArithmeticOp_FPU(x); return; | |
649 case longTag: do_ArithmeticOp_Long(x); return; | |
650 case intTag: do_ArithmeticOp_Int(x); return; | |
651 } | |
652 ShouldNotReachHere(); | |
653 } | |
654 | |
655 | |
656 // _ishl, _lshl, _ishr, _lshr, _iushr, _lushr | |
657 void LIRGenerator::do_ShiftOp(ShiftOp* x) { | |
658 // count must always be in rcx | |
659 LIRItem value(x->x(), this); | |
660 LIRItem count(x->y(), this); | |
661 | |
662 ValueTag elemType = x->type()->tag(); | |
663 bool must_load_count = !count.is_constant() || elemType == longTag; | |
664 if (must_load_count) { | |
665 // count for long must be in register | |
666 count.load_item_force(shiftCountOpr()); | |
667 } else { | |
668 count.dont_load_item(); | |
669 } | |
670 value.load_item(); | |
671 LIR_Opr reg = rlock_result(x); | |
672 | |
673 shift_op(x->op(), reg, value.result(), count.result(), LIR_OprFact::illegalOpr); | |
674 } | |
675 | |
676 | |
677 // _iand, _land, _ior, _lor, _ixor, _lxor | |
678 void LIRGenerator::do_LogicOp(LogicOp* x) { | |
679 // when an operand with use count 1 is the left operand, then it is | |
680 // likely that no move for 2-operand-LIR-form is necessary | |
681 if (x->is_commutative() && x->y()->as_Constant() == NULL && x->x()->use_count() > x->y()->use_count()) { | |
682 x->swap_operands(); | |
683 } | |
684 | |
685 LIRItem left(x->x(), this); | |
686 LIRItem right(x->y(), this); | |
687 | |
688 left.load_item(); | |
689 right.load_nonconstant(); | |
690 LIR_Opr reg = rlock_result(x); | |
691 | |
692 logic_op(x->op(), reg, left.result(), right.result()); | |
693 } | |
694 | |
695 | |
696 | |
697 // _lcmp, _fcmpl, _fcmpg, _dcmpl, _dcmpg | |
698 void LIRGenerator::do_CompareOp(CompareOp* x) { | |
699 LIRItem left(x->x(), this); | |
700 LIRItem right(x->y(), this); | |
701 ValueTag tag = x->x()->type()->tag(); | |
702 if (tag == longTag) { | |
703 left.set_destroys_register(); | |
704 } | |
705 left.load_item(); | |
706 right.load_item(); | |
707 LIR_Opr reg = rlock_result(x); | |
708 | |
709 if (x->x()->type()->is_float_kind()) { | |
710 Bytecodes::Code code = x->op(); | |
711 __ fcmp2int(left.result(), right.result(), reg, (code == Bytecodes::_fcmpl || code == Bytecodes::_dcmpl)); | |
712 } else if (x->x()->type()->tag() == longTag) { | |
713 __ lcmp2int(left.result(), right.result(), reg); | |
714 } else { | |
715 Unimplemented(); | |
716 } | |
717 } | |
718 | |
719 | |
720 void LIRGenerator::do_AttemptUpdate(Intrinsic* x) { | |
721 assert(x->number_of_arguments() == 3, "wrong type"); | |
722 LIRItem obj (x->argument_at(0), this); // AtomicLong object | |
723 LIRItem cmp_value (x->argument_at(1), this); // value to compare with field | |
724 LIRItem new_value (x->argument_at(2), this); // replace field with new_value if it matches cmp_value | |
725 | |
726 // compare value must be in rdx,eax (hi,lo); may be destroyed by cmpxchg8 instruction | |
304 | 727 cmp_value.load_item_force(FrameMap::long0_opr); |
0 | 728 |
729 // new value must be in rcx,ebx (hi,lo) | |
304 | 730 new_value.load_item_force(FrameMap::long1_opr); |
0 | 731 |
732 // object pointer register is overwritten with field address | |
733 obj.load_item(); | |
734 | |
735 // generate compare-and-swap; produces zero condition if swap occurs | |
736 int value_offset = sun_misc_AtomicLongCSImpl::value_offset(); | |
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737 LIR_Opr addr = new_pointer_register(); |
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738 __ leal(LIR_OprFact::address(new LIR_Address(obj.result(), value_offset, T_LONG)), addr); |
0 | 739 LIR_Opr t1 = LIR_OprFact::illegalOpr; // no temp needed |
740 LIR_Opr t2 = LIR_OprFact::illegalOpr; // no temp needed | |
741 __ cas_long(addr, cmp_value.result(), new_value.result(), t1, t2); | |
742 | |
743 // generate conditional move of boolean result | |
744 LIR_Opr result = rlock_result(x); | |
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745 __ cmove(lir_cond_equal, LIR_OprFact::intConst(1), LIR_OprFact::intConst(0), result, T_LONG); |
0 | 746 } |
747 | |
748 | |
749 void LIRGenerator::do_CompareAndSwap(Intrinsic* x, ValueType* type) { | |
750 assert(x->number_of_arguments() == 4, "wrong type"); | |
751 LIRItem obj (x->argument_at(0), this); // object | |
752 LIRItem offset(x->argument_at(1), this); // offset of field | |
753 LIRItem cmp (x->argument_at(2), this); // value to compare with field | |
754 LIRItem val (x->argument_at(3), this); // replace field with val if matches cmp | |
755 | |
756 assert(obj.type()->tag() == objectTag, "invalid type"); | |
304 | 757 |
758 // In 64bit the type can be long, sparc doesn't have this assert | |
759 // assert(offset.type()->tag() == intTag, "invalid type"); | |
760 | |
0 | 761 assert(cmp.type()->tag() == type->tag(), "invalid type"); |
762 assert(val.type()->tag() == type->tag(), "invalid type"); | |
763 | |
764 // get address of field | |
765 obj.load_item(); | |
766 offset.load_nonconstant(); | |
767 | |
768 if (type == objectType) { | |
769 cmp.load_item_force(FrameMap::rax_oop_opr); | |
770 val.load_item(); | |
771 } else if (type == intType) { | |
772 cmp.load_item_force(FrameMap::rax_opr); | |
773 val.load_item(); | |
774 } else if (type == longType) { | |
304 | 775 cmp.load_item_force(FrameMap::long0_opr); |
776 val.load_item_force(FrameMap::long1_opr); | |
0 | 777 } else { |
778 ShouldNotReachHere(); | |
779 } | |
780 | |
1873 | 781 LIR_Opr addr = new_pointer_register(); |
1060 | 782 LIR_Address* a; |
783 if(offset.result()->is_constant()) { | |
784 a = new LIR_Address(obj.result(), | |
785 NOT_LP64(offset.result()->as_constant_ptr()->as_jint()) LP64_ONLY((int)offset.result()->as_constant_ptr()->as_jlong()), | |
786 as_BasicType(type)); | |
787 } else { | |
788 a = new LIR_Address(obj.result(), | |
789 offset.result(), | |
790 LIR_Address::times_1, | |
791 0, | |
792 as_BasicType(type)); | |
793 } | |
794 __ leal(LIR_OprFact::address(a), addr); | |
0 | 795 |
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796 if (type == objectType) { // Write-barrier needed for Object fields. |
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797 // Do the pre-write barrier, if any. |
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798 pre_barrier(addr, LIR_OprFact::illegalOpr /* pre_val */, |
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799 true /* do_load */, false /* patch */, NULL); |
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800 } |
0 | 801 |
802 LIR_Opr ill = LIR_OprFact::illegalOpr; // for convenience | |
803 if (type == objectType) | |
804 __ cas_obj(addr, cmp.result(), val.result(), ill, ill); | |
805 else if (type == intType) | |
806 __ cas_int(addr, cmp.result(), val.result(), ill, ill); | |
807 else if (type == longType) | |
808 __ cas_long(addr, cmp.result(), val.result(), ill, ill); | |
809 else { | |
810 ShouldNotReachHere(); | |
811 } | |
812 | |
813 // generate conditional move of boolean result | |
814 LIR_Opr result = rlock_result(x); | |
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815 __ cmove(lir_cond_equal, LIR_OprFact::intConst(1), LIR_OprFact::intConst(0), |
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816 result, as_BasicType(type)); |
0 | 817 if (type == objectType) { // Write-barrier needed for Object fields. |
818 // Seems to be precise | |
819 post_barrier(addr, val.result()); | |
820 } | |
821 } | |
822 | |
823 | |
824 void LIRGenerator::do_MathIntrinsic(Intrinsic* x) { | |
825 assert(x->number_of_arguments() == 1, "wrong type"); | |
826 LIRItem value(x->argument_at(0), this); | |
827 | |
828 bool use_fpu = false; | |
829 if (UseSSE >= 2) { | |
830 switch(x->id()) { | |
831 case vmIntrinsics::_dsin: | |
832 case vmIntrinsics::_dcos: | |
833 case vmIntrinsics::_dtan: | |
834 case vmIntrinsics::_dlog: | |
835 case vmIntrinsics::_dlog10: | |
836 use_fpu = true; | |
837 } | |
838 } else { | |
839 value.set_destroys_register(); | |
840 } | |
841 | |
842 value.load_item(); | |
843 | |
844 LIR_Opr calc_input = value.result(); | |
845 LIR_Opr calc_result = rlock_result(x); | |
846 | |
847 // sin and cos need two free fpu stack slots, so register two temporary operands | |
848 LIR_Opr tmp1 = FrameMap::caller_save_fpu_reg_at(0); | |
849 LIR_Opr tmp2 = FrameMap::caller_save_fpu_reg_at(1); | |
850 | |
851 if (use_fpu) { | |
852 LIR_Opr tmp = FrameMap::fpu0_double_opr; | |
853 __ move(calc_input, tmp); | |
854 | |
855 calc_input = tmp; | |
856 calc_result = tmp; | |
857 tmp1 = FrameMap::caller_save_fpu_reg_at(1); | |
858 tmp2 = FrameMap::caller_save_fpu_reg_at(2); | |
859 } | |
860 | |
861 switch(x->id()) { | |
862 case vmIntrinsics::_dabs: __ abs (calc_input, calc_result, LIR_OprFact::illegalOpr); break; | |
863 case vmIntrinsics::_dsqrt: __ sqrt (calc_input, calc_result, LIR_OprFact::illegalOpr); break; | |
864 case vmIntrinsics::_dsin: __ sin (calc_input, calc_result, tmp1, tmp2); break; | |
865 case vmIntrinsics::_dcos: __ cos (calc_input, calc_result, tmp1, tmp2); break; | |
866 case vmIntrinsics::_dtan: __ tan (calc_input, calc_result, tmp1, tmp2); break; | |
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867 case vmIntrinsics::_dlog: __ log (calc_input, calc_result, tmp1); break; |
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868 case vmIntrinsics::_dlog10: __ log10(calc_input, calc_result, tmp1); break; |
0 | 869 default: ShouldNotReachHere(); |
870 } | |
871 | |
872 if (use_fpu) { | |
873 __ move(calc_result, x->operand()); | |
874 } | |
875 } | |
876 | |
877 | |
878 void LIRGenerator::do_ArrayCopy(Intrinsic* x) { | |
879 assert(x->number_of_arguments() == 5, "wrong type"); | |
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880 |
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881 // Make all state_for calls early since they can emit code |
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882 CodeEmitInfo* info = state_for(x, x->state()); |
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883 |
0 | 884 LIRItem src(x->argument_at(0), this); |
885 LIRItem src_pos(x->argument_at(1), this); | |
886 LIRItem dst(x->argument_at(2), this); | |
887 LIRItem dst_pos(x->argument_at(3), this); | |
888 LIRItem length(x->argument_at(4), this); | |
889 | |
890 // operands for arraycopy must use fixed registers, otherwise | |
891 // LinearScan will fail allocation (because arraycopy always needs a | |
892 // call) | |
304 | 893 |
894 #ifndef _LP64 | |
0 | 895 src.load_item_force (FrameMap::rcx_oop_opr); |
896 src_pos.load_item_force (FrameMap::rdx_opr); | |
897 dst.load_item_force (FrameMap::rax_oop_opr); | |
898 dst_pos.load_item_force (FrameMap::rbx_opr); | |
899 length.load_item_force (FrameMap::rdi_opr); | |
900 LIR_Opr tmp = (FrameMap::rsi_opr); | |
304 | 901 #else |
902 | |
903 // The java calling convention will give us enough registers | |
904 // so that on the stub side the args will be perfect already. | |
905 // On the other slow/special case side we call C and the arg | |
906 // positions are not similar enough to pick one as the best. | |
907 // Also because the java calling convention is a "shifted" version | |
908 // of the C convention we can process the java args trivially into C | |
909 // args without worry of overwriting during the xfer | |
910 | |
911 src.load_item_force (FrameMap::as_oop_opr(j_rarg0)); | |
912 src_pos.load_item_force (FrameMap::as_opr(j_rarg1)); | |
913 dst.load_item_force (FrameMap::as_oop_opr(j_rarg2)); | |
914 dst_pos.load_item_force (FrameMap::as_opr(j_rarg3)); | |
915 length.load_item_force (FrameMap::as_opr(j_rarg4)); | |
916 | |
917 LIR_Opr tmp = FrameMap::as_opr(j_rarg5); | |
918 #endif // LP64 | |
919 | |
0 | 920 set_no_result(x); |
921 | |
922 int flags; | |
923 ciArrayKlass* expected_type; | |
924 arraycopy_helper(x, &flags, &expected_type); | |
925 | |
926 __ arraycopy(src.result(), src_pos.result(), dst.result(), dst_pos.result(), length.result(), tmp, expected_type, flags, info); // does add_safepoint | |
927 } | |
928 | |
929 | |
930 // _i2l, _i2f, _i2d, _l2i, _l2f, _l2d, _f2i, _f2l, _f2d, _d2i, _d2l, _d2f | |
931 // _i2b, _i2c, _i2s | |
932 LIR_Opr fixed_register_for(BasicType type) { | |
933 switch (type) { | |
934 case T_FLOAT: return FrameMap::fpu0_float_opr; | |
935 case T_DOUBLE: return FrameMap::fpu0_double_opr; | |
936 case T_INT: return FrameMap::rax_opr; | |
304 | 937 case T_LONG: return FrameMap::long0_opr; |
0 | 938 default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr; |
939 } | |
940 } | |
941 | |
942 void LIRGenerator::do_Convert(Convert* x) { | |
943 // flags that vary for the different operations and different SSE-settings | |
944 bool fixed_input, fixed_result, round_result, needs_stub; | |
945 | |
946 switch (x->op()) { | |
947 case Bytecodes::_i2l: // fall through | |
948 case Bytecodes::_l2i: // fall through | |
949 case Bytecodes::_i2b: // fall through | |
950 case Bytecodes::_i2c: // fall through | |
951 case Bytecodes::_i2s: fixed_input = false; fixed_result = false; round_result = false; needs_stub = false; break; | |
952 | |
953 case Bytecodes::_f2d: fixed_input = UseSSE == 1; fixed_result = false; round_result = false; needs_stub = false; break; | |
954 case Bytecodes::_d2f: fixed_input = false; fixed_result = UseSSE == 1; round_result = UseSSE < 1; needs_stub = false; break; | |
955 case Bytecodes::_i2f: fixed_input = false; fixed_result = false; round_result = UseSSE < 1; needs_stub = false; break; | |
956 case Bytecodes::_i2d: fixed_input = false; fixed_result = false; round_result = false; needs_stub = false; break; | |
957 case Bytecodes::_f2i: fixed_input = false; fixed_result = false; round_result = false; needs_stub = true; break; | |
958 case Bytecodes::_d2i: fixed_input = false; fixed_result = false; round_result = false; needs_stub = true; break; | |
959 case Bytecodes::_l2f: fixed_input = false; fixed_result = UseSSE >= 1; round_result = UseSSE < 1; needs_stub = false; break; | |
960 case Bytecodes::_l2d: fixed_input = false; fixed_result = UseSSE >= 2; round_result = UseSSE < 2; needs_stub = false; break; | |
961 case Bytecodes::_f2l: fixed_input = true; fixed_result = true; round_result = false; needs_stub = false; break; | |
962 case Bytecodes::_d2l: fixed_input = true; fixed_result = true; round_result = false; needs_stub = false; break; | |
963 default: ShouldNotReachHere(); | |
964 } | |
965 | |
966 LIRItem value(x->value(), this); | |
967 value.load_item(); | |
968 LIR_Opr input = value.result(); | |
969 LIR_Opr result = rlock(x); | |
970 | |
971 // arguments of lir_convert | |
972 LIR_Opr conv_input = input; | |
973 LIR_Opr conv_result = result; | |
974 ConversionStub* stub = NULL; | |
975 | |
976 if (fixed_input) { | |
977 conv_input = fixed_register_for(input->type()); | |
978 __ move(input, conv_input); | |
979 } | |
980 | |
981 assert(fixed_result == false || round_result == false, "cannot set both"); | |
982 if (fixed_result) { | |
983 conv_result = fixed_register_for(result->type()); | |
984 } else if (round_result) { | |
985 result = new_register(result->type()); | |
986 set_vreg_flag(result, must_start_in_memory); | |
987 } | |
988 | |
989 if (needs_stub) { | |
990 stub = new ConversionStub(x->op(), conv_input, conv_result); | |
991 } | |
992 | |
993 __ convert(x->op(), conv_input, conv_result, stub); | |
994 | |
995 if (result != conv_result) { | |
996 __ move(conv_result, result); | |
997 } | |
998 | |
999 assert(result->is_virtual(), "result must be virtual register"); | |
1000 set_result(x, result); | |
1001 } | |
1002 | |
1003 | |
1004 void LIRGenerator::do_NewInstance(NewInstance* x) { | |
1819 | 1005 #ifndef PRODUCT |
0 | 1006 if (PrintNotLoaded && !x->klass()->is_loaded()) { |
1819 | 1007 tty->print_cr(" ###class not loaded at new bci %d", x->printable_bci()); |
0 | 1008 } |
1819 | 1009 #endif |
0 | 1010 CodeEmitInfo* info = state_for(x, x->state()); |
1011 LIR_Opr reg = result_register_for(x->type()); | |
1012 LIR_Opr klass_reg = new_register(objectType); | |
1013 new_instance(reg, x->klass(), | |
1014 FrameMap::rcx_oop_opr, | |
1015 FrameMap::rdi_oop_opr, | |
1016 FrameMap::rsi_oop_opr, | |
1017 LIR_OprFact::illegalOpr, | |
1018 FrameMap::rdx_oop_opr, info); | |
1019 LIR_Opr result = rlock_result(x); | |
1020 __ move(reg, result); | |
1021 } | |
1022 | |
1023 | |
1024 void LIRGenerator::do_NewTypeArray(NewTypeArray* x) { | |
1025 CodeEmitInfo* info = state_for(x, x->state()); | |
1026 | |
1027 LIRItem length(x->length(), this); | |
1028 length.load_item_force(FrameMap::rbx_opr); | |
1029 | |
1030 LIR_Opr reg = result_register_for(x->type()); | |
1031 LIR_Opr tmp1 = FrameMap::rcx_oop_opr; | |
1032 LIR_Opr tmp2 = FrameMap::rsi_oop_opr; | |
1033 LIR_Opr tmp3 = FrameMap::rdi_oop_opr; | |
1034 LIR_Opr tmp4 = reg; | |
1035 LIR_Opr klass_reg = FrameMap::rdx_oop_opr; | |
1036 LIR_Opr len = length.result(); | |
1037 BasicType elem_type = x->elt_type(); | |
1038 | |
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1039 __ oop2reg(ciTypeArrayKlass::make(elem_type)->constant_encoding(), klass_reg); |
0 | 1040 |
1041 CodeStub* slow_path = new NewTypeArrayStub(klass_reg, len, reg, info); | |
1042 __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, elem_type, klass_reg, slow_path); | |
1043 | |
1044 LIR_Opr result = rlock_result(x); | |
1045 __ move(reg, result); | |
1046 } | |
1047 | |
1048 | |
1049 void LIRGenerator::do_NewObjectArray(NewObjectArray* x) { | |
1050 LIRItem length(x->length(), this); | |
1051 // in case of patching (i.e., object class is not yet loaded), we need to reexecute the instruction | |
1052 // and therefore provide the state before the parameters have been consumed | |
1053 CodeEmitInfo* patching_info = NULL; | |
1054 if (!x->klass()->is_loaded() || PatchALot) { | |
1055 patching_info = state_for(x, x->state_before()); | |
1056 } | |
1057 | |
1058 CodeEmitInfo* info = state_for(x, x->state()); | |
1059 | |
1060 const LIR_Opr reg = result_register_for(x->type()); | |
1061 LIR_Opr tmp1 = FrameMap::rcx_oop_opr; | |
1062 LIR_Opr tmp2 = FrameMap::rsi_oop_opr; | |
1063 LIR_Opr tmp3 = FrameMap::rdi_oop_opr; | |
1064 LIR_Opr tmp4 = reg; | |
1065 LIR_Opr klass_reg = FrameMap::rdx_oop_opr; | |
1066 | |
1067 length.load_item_force(FrameMap::rbx_opr); | |
1068 LIR_Opr len = length.result(); | |
1069 | |
1070 CodeStub* slow_path = new NewObjectArrayStub(klass_reg, len, reg, info); | |
1071 ciObject* obj = (ciObject*) ciObjArrayKlass::make(x->klass()); | |
1072 if (obj == ciEnv::unloaded_ciobjarrayklass()) { | |
1073 BAILOUT("encountered unloaded_ciobjarrayklass due to out of memory error"); | |
1074 } | |
1075 jobject2reg_with_patching(klass_reg, obj, patching_info); | |
1076 __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, T_OBJECT, klass_reg, slow_path); | |
1077 | |
1078 LIR_Opr result = rlock_result(x); | |
1079 __ move(reg, result); | |
1080 } | |
1081 | |
1082 | |
1083 void LIRGenerator::do_NewMultiArray(NewMultiArray* x) { | |
1084 Values* dims = x->dims(); | |
1085 int i = dims->length(); | |
1086 LIRItemList* items = new LIRItemList(dims->length(), NULL); | |
1087 while (i-- > 0) { | |
1088 LIRItem* size = new LIRItem(dims->at(i), this); | |
1089 items->at_put(i, size); | |
1090 } | |
1091 | |
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1092 // Evaluate state_for early since it may emit code. |
0 | 1093 CodeEmitInfo* patching_info = NULL; |
1094 if (!x->klass()->is_loaded() || PatchALot) { | |
1095 patching_info = state_for(x, x->state_before()); | |
1096 | |
1097 // cannot re-use same xhandlers for multiple CodeEmitInfos, so | |
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1098 // clone all handlers. This is handled transparently in other |
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1099 // places by the CodeEmitInfo cloning logic but is handled |
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1100 // specially here because a stub isn't being used. |
0 | 1101 x->set_exception_handlers(new XHandlers(x->exception_handlers())); |
1102 } | |
1103 CodeEmitInfo* info = state_for(x, x->state()); | |
1104 | |
1105 i = dims->length(); | |
1106 while (i-- > 0) { | |
1107 LIRItem* size = items->at(i); | |
1108 size->load_nonconstant(); | |
1109 | |
1110 store_stack_parameter(size->result(), in_ByteSize(i*4)); | |
1111 } | |
1112 | |
1113 LIR_Opr reg = result_register_for(x->type()); | |
1114 jobject2reg_with_patching(reg, x->klass(), patching_info); | |
1115 | |
1116 LIR_Opr rank = FrameMap::rbx_opr; | |
1117 __ move(LIR_OprFact::intConst(x->rank()), rank); | |
1118 LIR_Opr varargs = FrameMap::rcx_opr; | |
1119 __ move(FrameMap::rsp_opr, varargs); | |
1120 LIR_OprList* args = new LIR_OprList(3); | |
1121 args->append(reg); | |
1122 args->append(rank); | |
1123 args->append(varargs); | |
1124 __ call_runtime(Runtime1::entry_for(Runtime1::new_multi_array_id), | |
1125 LIR_OprFact::illegalOpr, | |
1126 reg, args, info); | |
1127 | |
1128 LIR_Opr result = rlock_result(x); | |
1129 __ move(reg, result); | |
1130 } | |
1131 | |
1132 | |
1133 void LIRGenerator::do_BlockBegin(BlockBegin* x) { | |
1134 // nothing to do for now | |
1135 } | |
1136 | |
1137 | |
1138 void LIRGenerator::do_CheckCast(CheckCast* x) { | |
1139 LIRItem obj(x->obj(), this); | |
1140 | |
1141 CodeEmitInfo* patching_info = NULL; | |
1142 if (!x->klass()->is_loaded() || (PatchALot && !x->is_incompatible_class_change_check())) { | |
1143 // must do this before locking the destination register as an oop register, | |
1144 // and before the obj is loaded (the latter is for deoptimization) | |
1145 patching_info = state_for(x, x->state_before()); | |
1146 } | |
1147 obj.load_item(); | |
1148 | |
1149 // info for exceptions | |
1819 | 1150 CodeEmitInfo* info_for_exception = state_for(x); |
0 | 1151 |
1152 CodeStub* stub; | |
1153 if (x->is_incompatible_class_change_check()) { | |
1154 assert(patching_info == NULL, "can't patch this"); | |
1155 stub = new SimpleExceptionStub(Runtime1::throw_incompatible_class_change_error_id, LIR_OprFact::illegalOpr, info_for_exception); | |
1156 } else { | |
1157 stub = new SimpleExceptionStub(Runtime1::throw_class_cast_exception_id, obj.result(), info_for_exception); | |
1158 } | |
1159 LIR_Opr reg = rlock_result(x); | |
2002 | 1160 LIR_Opr tmp3 = LIR_OprFact::illegalOpr; |
1161 if (!x->klass()->is_loaded() || UseCompressedOops) { | |
1162 tmp3 = new_register(objectType); | |
1163 } | |
0 | 1164 __ checkcast(reg, obj.result(), x->klass(), |
2002 | 1165 new_register(objectType), new_register(objectType), tmp3, |
0 | 1166 x->direct_compare(), info_for_exception, patching_info, stub, |
1167 x->profiled_method(), x->profiled_bci()); | |
1168 } | |
1169 | |
1170 | |
1171 void LIRGenerator::do_InstanceOf(InstanceOf* x) { | |
1172 LIRItem obj(x->obj(), this); | |
1173 | |
1174 // result and test object may not be in same register | |
1175 LIR_Opr reg = rlock_result(x); | |
1176 CodeEmitInfo* patching_info = NULL; | |
1177 if ((!x->klass()->is_loaded() || PatchALot)) { | |
1178 // must do this before locking the destination register as an oop register | |
1179 patching_info = state_for(x, x->state_before()); | |
1180 } | |
1181 obj.load_item(); | |
2002 | 1182 LIR_Opr tmp3 = LIR_OprFact::illegalOpr; |
1183 if (!x->klass()->is_loaded() || UseCompressedOops) { | |
1184 tmp3 = new_register(objectType); | |
1185 } | |
0 | 1186 __ instanceof(reg, obj.result(), x->klass(), |
2002 | 1187 new_register(objectType), new_register(objectType), tmp3, |
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1188 x->direct_compare(), patching_info, x->profiled_method(), x->profiled_bci()); |
0 | 1189 } |
1190 | |
1191 | |
1192 void LIRGenerator::do_If(If* x) { | |
1193 assert(x->number_of_sux() == 2, "inconsistency"); | |
1194 ValueTag tag = x->x()->type()->tag(); | |
1195 bool is_safepoint = x->is_safepoint(); | |
1196 | |
1197 If::Condition cond = x->cond(); | |
1198 | |
1199 LIRItem xitem(x->x(), this); | |
1200 LIRItem yitem(x->y(), this); | |
1201 LIRItem* xin = &xitem; | |
1202 LIRItem* yin = &yitem; | |
1203 | |
1204 if (tag == longTag) { | |
1205 // for longs, only conditions "eql", "neq", "lss", "geq" are valid; | |
1206 // mirror for other conditions | |
1207 if (cond == If::gtr || cond == If::leq) { | |
1208 cond = Instruction::mirror(cond); | |
1209 xin = &yitem; | |
1210 yin = &xitem; | |
1211 } | |
1212 xin->set_destroys_register(); | |
1213 } | |
1214 xin->load_item(); | |
1215 if (tag == longTag && yin->is_constant() && yin->get_jlong_constant() == 0 && (cond == If::eql || cond == If::neq)) { | |
1216 // inline long zero | |
1217 yin->dont_load_item(); | |
1218 } else if (tag == longTag || tag == floatTag || tag == doubleTag) { | |
1219 // longs cannot handle constants at right side | |
1220 yin->load_item(); | |
1221 } else { | |
1222 yin->dont_load_item(); | |
1223 } | |
1224 | |
1225 // add safepoint before generating condition code so it can be recomputed | |
1226 if (x->is_safepoint()) { | |
1227 // increment backedge counter if needed | |
1783 | 1228 increment_backedge_counter(state_for(x, x->state_before()), x->profiled_bci()); |
0 | 1229 __ safepoint(LIR_OprFact::illegalOpr, state_for(x, x->state_before())); |
1230 } | |
1231 set_no_result(x); | |
1232 | |
1233 LIR_Opr left = xin->result(); | |
1234 LIR_Opr right = yin->result(); | |
1235 __ cmp(lir_cond(cond), left, right); | |
1783 | 1236 // Generate branch profiling. Profiling code doesn't kill flags. |
0 | 1237 profile_branch(x, cond); |
1238 move_to_phi(x->state()); | |
1239 if (x->x()->type()->is_float_kind()) { | |
1240 __ branch(lir_cond(cond), right->type(), x->tsux(), x->usux()); | |
1241 } else { | |
1242 __ branch(lir_cond(cond), right->type(), x->tsux()); | |
1243 } | |
1244 assert(x->default_sux() == x->fsux(), "wrong destination above"); | |
1245 __ jump(x->default_sux()); | |
1246 } | |
1247 | |
1248 | |
1249 LIR_Opr LIRGenerator::getThreadPointer() { | |
304 | 1250 #ifdef _LP64 |
1251 return FrameMap::as_pointer_opr(r15_thread); | |
1252 #else | |
0 | 1253 LIR_Opr result = new_register(T_INT); |
1254 __ get_thread(result); | |
1255 return result; | |
304 | 1256 #endif // |
0 | 1257 } |
1258 | |
1259 void LIRGenerator::trace_block_entry(BlockBegin* block) { | |
1260 store_stack_parameter(LIR_OprFact::intConst(block->block_id()), in_ByteSize(0)); | |
1261 LIR_OprList* args = new LIR_OprList(); | |
1262 address func = CAST_FROM_FN_PTR(address, Runtime1::trace_block_entry); | |
1263 __ call_runtime_leaf(func, LIR_OprFact::illegalOpr, LIR_OprFact::illegalOpr, args); | |
1264 } | |
1265 | |
1266 | |
1267 void LIRGenerator::volatile_field_store(LIR_Opr value, LIR_Address* address, | |
1268 CodeEmitInfo* info) { | |
1269 if (address->type() == T_LONG) { | |
1270 address = new LIR_Address(address->base(), | |
1271 address->index(), address->scale(), | |
1272 address->disp(), T_DOUBLE); | |
1273 // Transfer the value atomically by using FP moves. This means | |
1274 // the value has to be moved between CPU and FPU registers. It | |
1275 // always has to be moved through spill slot since there's no | |
1276 // quick way to pack the value into an SSE register. | |
1277 LIR_Opr temp_double = new_register(T_DOUBLE); | |
1278 LIR_Opr spill = new_register(T_LONG); | |
1279 set_vreg_flag(spill, must_start_in_memory); | |
1280 __ move(value, spill); | |
1281 __ volatile_move(spill, temp_double, T_LONG); | |
1282 __ volatile_move(temp_double, LIR_OprFact::address(address), T_LONG, info); | |
1283 } else { | |
1284 __ store(value, address, info); | |
1285 } | |
1286 } | |
1287 | |
1288 | |
1289 | |
1290 void LIRGenerator::volatile_field_load(LIR_Address* address, LIR_Opr result, | |
1291 CodeEmitInfo* info) { | |
1292 if (address->type() == T_LONG) { | |
1293 address = new LIR_Address(address->base(), | |
1294 address->index(), address->scale(), | |
1295 address->disp(), T_DOUBLE); | |
1296 // Transfer the value atomically by using FP moves. This means | |
1297 // the value has to be moved between CPU and FPU registers. In | |
1298 // SSE0 and SSE1 mode it has to be moved through spill slot but in | |
1299 // SSE2+ mode it can be moved directly. | |
1300 LIR_Opr temp_double = new_register(T_DOUBLE); | |
1301 __ volatile_move(LIR_OprFact::address(address), temp_double, T_LONG, info); | |
1302 __ volatile_move(temp_double, result, T_LONG); | |
1303 if (UseSSE < 2) { | |
1304 // no spill slot needed in SSE2 mode because xmm->cpu register move is possible | |
1305 set_vreg_flag(result, must_start_in_memory); | |
1306 } | |
1307 } else { | |
1308 __ load(address, result, info); | |
1309 } | |
1310 } | |
1311 | |
1312 void LIRGenerator::get_Object_unsafe(LIR_Opr dst, LIR_Opr src, LIR_Opr offset, | |
1313 BasicType type, bool is_volatile) { | |
1314 if (is_volatile && type == T_LONG) { | |
1315 LIR_Address* addr = new LIR_Address(src, offset, T_DOUBLE); | |
1316 LIR_Opr tmp = new_register(T_DOUBLE); | |
1317 __ load(addr, tmp); | |
1318 LIR_Opr spill = new_register(T_LONG); | |
1319 set_vreg_flag(spill, must_start_in_memory); | |
1320 __ move(tmp, spill); | |
1321 __ move(spill, dst); | |
1322 } else { | |
1323 LIR_Address* addr = new LIR_Address(src, offset, type); | |
1324 __ load(addr, dst); | |
1325 } | |
1326 } | |
1327 | |
1328 | |
1329 void LIRGenerator::put_Object_unsafe(LIR_Opr src, LIR_Opr offset, LIR_Opr data, | |
1330 BasicType type, bool is_volatile) { | |
1331 if (is_volatile && type == T_LONG) { | |
1332 LIR_Address* addr = new LIR_Address(src, offset, T_DOUBLE); | |
1333 LIR_Opr tmp = new_register(T_DOUBLE); | |
1334 LIR_Opr spill = new_register(T_DOUBLE); | |
1335 set_vreg_flag(spill, must_start_in_memory); | |
1336 __ move(data, spill); | |
1337 __ move(spill, tmp); | |
1338 __ move(tmp, addr); | |
1339 } else { | |
1340 LIR_Address* addr = new LIR_Address(src, offset, type); | |
1341 bool is_obj = (type == T_ARRAY || type == T_OBJECT); | |
1342 if (is_obj) { | |
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1343 // Do the pre-write barrier, if any. |
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1344 pre_barrier(LIR_OprFact::address(addr), LIR_OprFact::illegalOpr /* pre_val */, |
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1345 true /* do_load */, false /* patch */, NULL); |
0 | 1346 __ move(data, addr); |
1347 assert(src->is_register(), "must be register"); | |
1348 // Seems to be a precise address | |
1349 post_barrier(LIR_OprFact::address(addr), data); | |
1350 } else { | |
1351 __ move(data, addr); | |
1352 } | |
1353 } | |
1354 } |