Mercurial > hg > truffle
diff src/cpu/x86/vm/x86_64.ad @ 624:337400e7a5dd
6797305: Add LoadUB and LoadUI opcode class
Summary: Add a LoadUB (unsigned byte) and LoadUI (unsigned int) opcode class so we have these load optimizations in the first place and do not need to handle them in the matcher.
Reviewed-by: never, kvn
author | twisti |
---|---|
date | Mon, 09 Mar 2009 03:17:11 -0700 |
parents | 56aae7be60d4 |
children | 7bb995fbd3c0 660978a2a31a |
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--- a/src/cpu/x86/vm/x86_64.ad Fri Mar 06 21:36:50 2009 -0800 +++ b/src/cpu/x86/vm/x86_64.ad Mon Mar 09 03:17:11 2009 -0700 @@ -1,5 +1,5 @@ // -// Copyright 2003-2008 Sun Microsystems, Inc. All Rights Reserved. +// Copyright 2003-2009 Sun Microsystems, Inc. All Rights Reserved. // DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. // // This code is free software; you can redistribute it and/or modify it @@ -3462,14 +3462,12 @@ enc_class movq_ld(regD dst, memory mem) %{ MacroAssembler _masm(&cbuf); - Address madr = Address::make_raw($mem$$base, $mem$$index, $mem$$scale, $mem$$disp); - __ movq(as_XMMRegister($dst$$reg), madr); + __ movq($dst$$XMMRegister, $mem$$Address); %} enc_class movq_st(memory mem, regD src) %{ MacroAssembler _masm(&cbuf); - Address madr = Address::make_raw($mem$$base, $mem$$index, $mem$$scale, $mem$$disp); - __ movq(madr, as_XMMRegister($src$$reg)); + __ movq($mem$$Address, $src$$XMMRegister); %} enc_class pshufd_8x8(regF dst, regF src) %{ @@ -6031,70 +6029,88 @@ ins_cost(125); format %{ "movsbl $dst, $mem\t# byte" %} - opcode(0x0F, 0xBE); - ins_encode(REX_reg_mem(dst, mem), OpcP, OpcS, reg_mem(dst, mem)); + + ins_encode %{ + __ movsbl($dst$$Register, $mem$$Address); + %} + ins_pipe(ialu_reg_mem); %} -// Load Byte (8 bit signed) into long -// instruct loadB2L(rRegL dst, memory mem) -// %{ -// match(Set dst (ConvI2L (LoadB mem))); - -// ins_cost(125); -// format %{ "movsbq $dst, $mem\t# byte -> long" %} -// opcode(0x0F, 0xBE); -// ins_encode(REX_reg_mem_wide(dst, mem), OpcP, OpcS, reg_mem(dst, mem)); -// ins_pipe(ialu_reg_mem); -// %} - -// Load Byte (8 bit UNsigned) -instruct loadUB(rRegI dst, memory mem, immI_255 bytemask) -%{ - match(Set dst (AndI (LoadB mem) bytemask)); +// Load Byte (8 bit signed) into Long Register +instruct loadB2L(rRegL dst, memory mem) +%{ + match(Set dst (ConvI2L (LoadB mem))); + + ins_cost(125); + format %{ "movsbq $dst, $mem\t# byte -> long" %} + + ins_encode %{ + __ movsbq($dst$$Register, $mem$$Address); + %} + + ins_pipe(ialu_reg_mem); +%} + +// Load Unsigned Byte (8 bit UNsigned) +instruct loadUB(rRegI dst, memory mem) +%{ + match(Set dst (LoadUB mem)); ins_cost(125); format %{ "movzbl $dst, $mem\t# ubyte" %} - opcode(0x0F, 0xB6); - ins_encode(REX_reg_mem(dst, mem), OpcP, OpcS, reg_mem(dst, mem)); + + ins_encode %{ + __ movzbl($dst$$Register, $mem$$Address); + %} + ins_pipe(ialu_reg_mem); %} -// Load Byte (8 bit UNsigned) into long -// instruct loadUB2L(rRegL dst, memory mem, immI_255 bytemask) -// %{ -// match(Set dst (ConvI2L (AndI (LoadB mem) bytemask))); - -// ins_cost(125); -// format %{ "movzbl $dst, $mem\t# ubyte -> long" %} -// opcode(0x0F, 0xB6); -// ins_encode(REX_reg_mem(dst, mem), OpcP, OpcS, reg_mem(dst, mem)); -// ins_pipe(ialu_reg_mem); -// %} +// Load Unsigned Byte (8 bit UNsigned) into Long Register +instruct loadUB2L(rRegL dst, memory mem) +%{ + match(Set dst (ConvI2L (LoadUB mem))); + + ins_cost(125); + format %{ "movzbq $dst, $mem\t# ubyte -> long" %} + + ins_encode %{ + __ movzbq($dst$$Register, $mem$$Address); + %} + + ins_pipe(ialu_reg_mem); +%} // Load Short (16 bit signed) instruct loadS(rRegI dst, memory mem) %{ match(Set dst (LoadS mem)); - ins_cost(125); // XXX + ins_cost(125); format %{ "movswl $dst, $mem\t# short" %} - opcode(0x0F, 0xBF); - ins_encode(REX_reg_mem(dst, mem), OpcP, OpcS, reg_mem(dst, mem)); + + ins_encode %{ + __ movswl($dst$$Register, $mem$$Address); + %} + ins_pipe(ialu_reg_mem); %} -// Load Short (16 bit signed) into long -// instruct loadS2L(rRegL dst, memory mem) -// %{ -// match(Set dst (ConvI2L (LoadS mem))); - -// ins_cost(125); // XXX -// format %{ "movswq $dst, $mem\t# short -> long" %} -// opcode(0x0F, 0xBF); -// ins_encode(REX_reg_mem_wide(dst, mem), OpcP, OpcS, reg_mem(dst, mem)); -// ins_pipe(ialu_reg_mem); -// %} +// Load Short (16 bit signed) into Long Register +instruct loadS2L(rRegL dst, memory mem) +%{ + match(Set dst (ConvI2L (LoadS mem))); + + ins_cost(125); + format %{ "movswq $dst, $mem\t# short -> long" %} + + ins_encode %{ + __ movswq($dst$$Register, $mem$$Address); + %} + + ins_pipe(ialu_reg_mem); +%} // Load Unsigned Short/Char (16 bit UNsigned) instruct loadUS(rRegI dst, memory mem) @@ -6103,32 +6119,71 @@ ins_cost(125); format %{ "movzwl $dst, $mem\t# ushort/char" %} - opcode(0x0F, 0xB7); - ins_encode(REX_reg_mem(dst, mem), OpcP, OpcS, reg_mem(dst, mem)); + + ins_encode %{ + __ movzwl($dst$$Register, $mem$$Address); + %} + ins_pipe(ialu_reg_mem); %} -// Load Unsigned Short/Char (16 bit UNsigned) into long -// instruct loadUS2L(rRegL dst, memory mem) -// %{ -// match(Set dst (ConvI2L (LoadUS mem))); - -// ins_cost(125); -// format %{ "movzwl $dst, $mem\t# ushort/char -> long" %} -// opcode(0x0F, 0xB7); -// ins_encode(REX_reg_mem(dst, mem), OpcP, OpcS, reg_mem(dst, mem)); -// ins_pipe(ialu_reg_mem); -// %} +// Load Unsigned Short/Char (16 bit UNsigned) into Long Register +instruct loadUS2L(rRegL dst, memory mem) +%{ + match(Set dst (ConvI2L (LoadUS mem))); + + ins_cost(125); + format %{ "movzwq $dst, $mem\t# ushort/char -> long" %} + + ins_encode %{ + __ movzwq($dst$$Register, $mem$$Address); + %} + + ins_pipe(ialu_reg_mem); +%} // Load Integer instruct loadI(rRegI dst, memory mem) %{ match(Set dst (LoadI mem)); - ins_cost(125); // XXX + ins_cost(125); format %{ "movl $dst, $mem\t# int" %} - opcode(0x8B); - ins_encode(REX_reg_mem(dst, mem), OpcP, reg_mem(dst, mem)); + + ins_encode %{ + __ movl($dst$$Register, $mem$$Address); + %} + + ins_pipe(ialu_reg_mem); +%} + +// Load Integer into Long Register +instruct loadI2L(rRegL dst, memory mem) +%{ + match(Set dst (ConvI2L (LoadI mem))); + + ins_cost(125); + format %{ "movslq $dst, $mem\t# int -> long" %} + + ins_encode %{ + __ movslq($dst$$Register, $mem$$Address); + %} + + ins_pipe(ialu_reg_mem); +%} + +// Load Unsigned Integer into Long Register +instruct loadUI2L(rRegL dst, memory mem) +%{ + match(Set dst (LoadUI2L mem)); + + ins_cost(125); + format %{ "movl $dst, $mem\t# uint -> long" %} + + ins_encode %{ + __ movl($dst$$Register, $mem$$Address); + %} + ins_pipe(ialu_reg_mem); %} @@ -6137,10 +6192,13 @@ %{ match(Set dst (LoadL mem)); - ins_cost(125); // XXX + ins_cost(125); format %{ "movq $dst, $mem\t# long" %} - opcode(0x8B); - ins_encode(REX_reg_mem_wide(dst, mem), OpcP, reg_mem(dst, mem)); + + ins_encode %{ + __ movq($dst$$Register, $mem$$Address); + %} + ins_pipe(ialu_reg_mem); // XXX %} @@ -10804,16 +10862,6 @@ // ins_pipe(ialu_reg_reg); // %} -instruct convI2L_reg_mem(rRegL dst, memory src) -%{ - match(Set dst (ConvI2L (LoadI src))); - - format %{ "movslq $dst, $src\t# i2l" %} - opcode(0x63); // needs REX.W - ins_encode(REX_reg_mem_wide(dst, src), OpcP, reg_mem(dst,src)); - ins_pipe(ialu_reg_mem); -%} - // Zero-extend convert int to long instruct convI2L_reg_reg_zex(rRegL dst, rRegI src, immL_32bits mask) %{