com.oracle.graal.asm.amd64

Class AMD64Assembler.AMD64RROp

java.lang.Object

com.oracle.graal.asm.amd64.AMD64Assembler.AMD64Op

com.oracle.graal.asm.amd64.AMD64Assembler.AMD64RROp

Direct Known Subclasses:

AMD64Assembler.AMD64MROp, AMD64Assembler.AMD64RMOp

Enclosing class:

AMD64Assembler

public abstract static class AMD64Assembler.AMD64RROp
extends AMD64Assembler.AMD64Op

Opcode with operand order of either RM or MR.

Field Summary

Fields inherited from class com.oracle.graal.asm.amd64.AMD64Assembler.AMD64Op

P_0F, P_0F38, P_0F3A

Constructor Summary

Constructors

Modifier	Constructor and Description
protected	AMD64RROp(String opcode, int prefix1, int prefix2, int op, AMD64Assembler.OpAssertion assertion, AMD64.CPUFeature feature)
protected	AMD64RROp(String opcode, int prefix1, int prefix2, int op, boolean dstIsByte, boolean srcIsByte, AMD64Assembler.OpAssertion assertion, AMD64.CPUFeature feature)

Method Summary

Modifier and Type	Method and Description
abstract void	emit(AMD64Assembler asm, AMD64Assembler.OperandSize size, Register dst, Register src)

Methods inherited from class com.oracle.graal.asm.amd64.AMD64Assembler.AMD64Op

emitOpcode, toString, verify

Methods inherited from class java.lang.Object

clone, equals, finalize, getClass, hashCode, notify, notifyAll, wait, wait, wait

Constructor Detail

AMD64RROp

protected AMD64RROp(String opcode,
                    int prefix1,
                    int prefix2,
                    int op,
                    AMD64Assembler.OpAssertion assertion,
                    AMD64.CPUFeature feature)

AMD64RROp

protected AMD64RROp(String opcode,
                    int prefix1,
                    int prefix2,
                    int op,
                    boolean dstIsByte,
                    boolean srcIsByte,
                    AMD64Assembler.OpAssertion assertion,
                    AMD64.CPUFeature feature)

Method Detail

emit

public abstract void emit(AMD64Assembler asm,
                          AMD64Assembler.OperandSize size,
                          Register dst,
                          Register src)