Mercurial > hg > graal-compiler
annotate src/share/vm/c1/c1_LIR.hpp @ 6266:1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
6984705: JSR 292 method handle creation should not go through JNI
Summary: remove assembly code for JDK 7 chained method handles
Reviewed-by: jrose, twisti, kvn, mhaupt
Contributed-by: John Rose <john.r.rose@oracle.com>, Christian Thalinger <christian.thalinger@oracle.com>, Michael Haupt <michael.haupt@oracle.com>
| author | twisti |
|---|---|
| date | Tue, 24 Jul 2012 10:51:00 -0700 |
| parents | 6759698e3140 |
| children | da91efe96a93 |
| rev | line source |
|---|---|
| 0 | 1 /* |
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2 * Copyright (c) 2000, 2012, Oracle and/or its affiliates. All rights reserved. |
| 0 | 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
| 4 * | |
| 5 * This code is free software; you can redistribute it and/or modify it | |
| 6 * under the terms of the GNU General Public License version 2 only, as | |
| 7 * published by the Free Software Foundation. | |
| 8 * | |
| 9 * This code is distributed in the hope that it will be useful, but WITHOUT | |
| 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
| 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
| 12 * version 2 for more details (a copy is included in the LICENSE file that | |
| 13 * accompanied this code). | |
| 14 * | |
| 15 * You should have received a copy of the GNU General Public License version | |
| 16 * 2 along with this work; if not, write to the Free Software Foundation, | |
| 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
| 18 * | |
|
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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20 * or visit www.oracle.com if you need additional information or have any |
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21 * questions. |
| 0 | 22 * |
| 23 */ | |
| 24 | |
| 1972 | 25 #ifndef SHARE_VM_C1_C1_LIR_HPP |
| 26 #define SHARE_VM_C1_C1_LIR_HPP | |
| 27 | |
| 28 #include "c1/c1_ValueType.hpp" | |
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29 #include "oops/methodOop.hpp" |
| 1972 | 30 |
| 0 | 31 class BlockBegin; |
| 32 class BlockList; | |
| 33 class LIR_Assembler; | |
| 34 class CodeEmitInfo; | |
| 35 class CodeStub; | |
| 36 class CodeStubList; | |
| 37 class ArrayCopyStub; | |
| 38 class LIR_Op; | |
| 39 class ciType; | |
| 40 class ValueType; | |
| 41 class LIR_OpVisitState; | |
| 42 class FpuStackSim; | |
| 43 | |
| 44 //--------------------------------------------------------------------- | |
| 45 // LIR Operands | |
| 46 // LIR_OprDesc | |
| 47 // LIR_OprPtr | |
| 48 // LIR_Const | |
| 49 // LIR_Address | |
| 50 //--------------------------------------------------------------------- | |
| 51 class LIR_OprDesc; | |
| 52 class LIR_OprPtr; | |
| 53 class LIR_Const; | |
| 54 class LIR_Address; | |
| 55 class LIR_OprVisitor; | |
| 56 | |
| 57 | |
| 58 typedef LIR_OprDesc* LIR_Opr; | |
| 59 typedef int RegNr; | |
| 60 | |
| 61 define_array(LIR_OprArray, LIR_Opr) | |
| 62 define_stack(LIR_OprList, LIR_OprArray) | |
| 63 | |
| 64 define_array(LIR_OprRefArray, LIR_Opr*) | |
| 65 define_stack(LIR_OprRefList, LIR_OprRefArray) | |
| 66 | |
| 67 define_array(CodeEmitInfoArray, CodeEmitInfo*) | |
| 68 define_stack(CodeEmitInfoList, CodeEmitInfoArray) | |
| 69 | |
| 70 define_array(LIR_OpArray, LIR_Op*) | |
| 71 define_stack(LIR_OpList, LIR_OpArray) | |
| 72 | |
| 73 // define LIR_OprPtr early so LIR_OprDesc can refer to it | |
| 74 class LIR_OprPtr: public CompilationResourceObj { | |
| 75 public: | |
| 76 bool is_oop_pointer() const { return (type() == T_OBJECT); } | |
| 77 bool is_float_kind() const { BasicType t = type(); return (t == T_FLOAT) || (t == T_DOUBLE); } | |
| 78 | |
| 79 virtual LIR_Const* as_constant() { return NULL; } | |
| 80 virtual LIR_Address* as_address() { return NULL; } | |
| 81 virtual BasicType type() const = 0; | |
| 82 virtual void print_value_on(outputStream* out) const = 0; | |
| 83 }; | |
| 84 | |
| 85 | |
| 86 | |
| 87 // LIR constants | |
| 88 class LIR_Const: public LIR_OprPtr { | |
| 89 private: | |
| 90 JavaValue _value; | |
| 91 | |
| 92 void type_check(BasicType t) const { assert(type() == t, "type check"); } | |
| 93 void type_check(BasicType t1, BasicType t2) const { assert(type() == t1 || type() == t2, "type check"); } | |
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94 void type_check(BasicType t1, BasicType t2, BasicType t3) const { assert(type() == t1 || type() == t2 || type() == t3, "type check"); } |
| 0 | 95 |
| 96 public: | |
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97 LIR_Const(jint i, bool is_address=false) { _value.set_type(is_address?T_ADDRESS:T_INT); _value.set_jint(i); } |
| 0 | 98 LIR_Const(jlong l) { _value.set_type(T_LONG); _value.set_jlong(l); } |
| 99 LIR_Const(jfloat f) { _value.set_type(T_FLOAT); _value.set_jfloat(f); } | |
| 100 LIR_Const(jdouble d) { _value.set_type(T_DOUBLE); _value.set_jdouble(d); } | |
| 101 LIR_Const(jobject o) { _value.set_type(T_OBJECT); _value.set_jobject(o); } | |
| 102 LIR_Const(void* p) { | |
| 103 #ifdef _LP64 | |
| 104 assert(sizeof(jlong) >= sizeof(p), "too small");; | |
| 105 _value.set_type(T_LONG); _value.set_jlong((jlong)p); | |
| 106 #else | |
| 107 assert(sizeof(jint) >= sizeof(p), "too small");; | |
| 108 _value.set_type(T_INT); _value.set_jint((jint)p); | |
| 109 #endif | |
| 110 } | |
| 111 | |
| 112 virtual BasicType type() const { return _value.get_type(); } | |
| 113 virtual LIR_Const* as_constant() { return this; } | |
| 114 | |
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115 jint as_jint() const { type_check(T_INT, T_ADDRESS); return _value.get_jint(); } |
| 0 | 116 jlong as_jlong() const { type_check(T_LONG ); return _value.get_jlong(); } |
| 117 jfloat as_jfloat() const { type_check(T_FLOAT ); return _value.get_jfloat(); } | |
| 118 jdouble as_jdouble() const { type_check(T_DOUBLE); return _value.get_jdouble(); } | |
| 119 jobject as_jobject() const { type_check(T_OBJECT); return _value.get_jobject(); } | |
| 120 jint as_jint_lo() const { type_check(T_LONG ); return low(_value.get_jlong()); } | |
| 121 jint as_jint_hi() const { type_check(T_LONG ); return high(_value.get_jlong()); } | |
| 122 | |
| 123 #ifdef _LP64 | |
| 124 address as_pointer() const { type_check(T_LONG ); return (address)_value.get_jlong(); } | |
| 125 #else | |
| 126 address as_pointer() const { type_check(T_INT ); return (address)_value.get_jint(); } | |
| 127 #endif | |
| 128 | |
| 129 | |
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130 jint as_jint_bits() const { type_check(T_FLOAT, T_INT, T_ADDRESS); return _value.get_jint(); } |
| 0 | 131 jint as_jint_lo_bits() const { |
| 132 if (type() == T_DOUBLE) { | |
| 133 return low(jlong_cast(_value.get_jdouble())); | |
| 134 } else { | |
| 135 return as_jint_lo(); | |
| 136 } | |
| 137 } | |
| 138 jint as_jint_hi_bits() const { | |
| 139 if (type() == T_DOUBLE) { | |
| 140 return high(jlong_cast(_value.get_jdouble())); | |
| 141 } else { | |
| 142 return as_jint_hi(); | |
| 143 } | |
| 144 } | |
| 304 | 145 jlong as_jlong_bits() const { |
| 146 if (type() == T_DOUBLE) { | |
| 147 return jlong_cast(_value.get_jdouble()); | |
| 148 } else { | |
| 149 return as_jlong(); | |
| 150 } | |
| 151 } | |
| 0 | 152 |
| 153 virtual void print_value_on(outputStream* out) const PRODUCT_RETURN; | |
| 154 | |
| 155 | |
| 156 bool is_zero_float() { | |
| 157 jfloat f = as_jfloat(); | |
| 158 jfloat ok = 0.0f; | |
| 159 return jint_cast(f) == jint_cast(ok); | |
| 160 } | |
| 161 | |
| 162 bool is_one_float() { | |
| 163 jfloat f = as_jfloat(); | |
| 164 return !g_isnan(f) && g_isfinite(f) && f == 1.0; | |
| 165 } | |
| 166 | |
| 167 bool is_zero_double() { | |
| 168 jdouble d = as_jdouble(); | |
| 169 jdouble ok = 0.0; | |
| 170 return jlong_cast(d) == jlong_cast(ok); | |
| 171 } | |
| 172 | |
| 173 bool is_one_double() { | |
| 174 jdouble d = as_jdouble(); | |
| 175 return !g_isnan(d) && g_isfinite(d) && d == 1.0; | |
| 176 } | |
| 177 }; | |
| 178 | |
| 179 | |
| 180 //---------------------LIR Operand descriptor------------------------------------ | |
| 181 // | |
| 182 // The class LIR_OprDesc represents a LIR instruction operand; | |
| 183 // it can be a register (ALU/FPU), stack location or a constant; | |
| 184 // Constants and addresses are represented as resource area allocated | |
| 185 // structures (see above). | |
| 186 // Registers and stack locations are inlined into the this pointer | |
| 187 // (see value function). | |
| 188 | |
| 189 class LIR_OprDesc: public CompilationResourceObj { | |
| 190 public: | |
| 191 // value structure: | |
| 192 // data opr-type opr-kind | |
| 193 // +--------------+-------+-------+ | |
| 194 // [max...........|7 6 5 4|3 2 1 0] | |
| 195 // ^ | |
| 196 // is_pointer bit | |
| 197 // | |
| 198 // lowest bit cleared, means it is a structure pointer | |
| 199 // we need 4 bits to represent types | |
| 200 | |
| 201 private: | |
| 202 friend class LIR_OprFact; | |
| 203 | |
| 204 // Conversion | |
| 205 intptr_t value() const { return (intptr_t) this; } | |
| 206 | |
| 207 bool check_value_mask(intptr_t mask, intptr_t masked_value) const { | |
| 208 return (value() & mask) == masked_value; | |
| 209 } | |
| 210 | |
| 211 enum OprKind { | |
| 212 pointer_value = 0 | |
| 213 , stack_value = 1 | |
| 214 , cpu_register = 3 | |
| 215 , fpu_register = 5 | |
| 216 , illegal_value = 7 | |
| 217 }; | |
| 218 | |
| 219 enum OprBits { | |
| 220 pointer_bits = 1 | |
| 221 , kind_bits = 3 | |
| 222 , type_bits = 4 | |
| 223 , size_bits = 2 | |
| 224 , destroys_bits = 1 | |
| 225 , virtual_bits = 1 | |
| 226 , is_xmm_bits = 1 | |
| 227 , last_use_bits = 1 | |
| 228 , is_fpu_stack_offset_bits = 1 // used in assertion checking on x86 for FPU stack slot allocation | |
| 229 , non_data_bits = kind_bits + type_bits + size_bits + destroys_bits + last_use_bits + | |
| 230 is_fpu_stack_offset_bits + virtual_bits + is_xmm_bits | |
| 231 , data_bits = BitsPerInt - non_data_bits | |
| 232 , reg_bits = data_bits / 2 // for two registers in one value encoding | |
| 233 }; | |
| 234 | |
| 235 enum OprShift { | |
| 236 kind_shift = 0 | |
| 237 , type_shift = kind_shift + kind_bits | |
| 238 , size_shift = type_shift + type_bits | |
| 239 , destroys_shift = size_shift + size_bits | |
| 240 , last_use_shift = destroys_shift + destroys_bits | |
| 241 , is_fpu_stack_offset_shift = last_use_shift + last_use_bits | |
| 242 , virtual_shift = is_fpu_stack_offset_shift + is_fpu_stack_offset_bits | |
| 243 , is_xmm_shift = virtual_shift + virtual_bits | |
| 244 , data_shift = is_xmm_shift + is_xmm_bits | |
| 245 , reg1_shift = data_shift | |
| 246 , reg2_shift = data_shift + reg_bits | |
| 247 | |
| 248 }; | |
| 249 | |
| 250 enum OprSize { | |
| 251 single_size = 0 << size_shift | |
| 252 , double_size = 1 << size_shift | |
| 253 }; | |
| 254 | |
| 255 enum OprMask { | |
| 256 kind_mask = right_n_bits(kind_bits) | |
| 257 , type_mask = right_n_bits(type_bits) << type_shift | |
| 258 , size_mask = right_n_bits(size_bits) << size_shift | |
| 259 , last_use_mask = right_n_bits(last_use_bits) << last_use_shift | |
| 260 , is_fpu_stack_offset_mask = right_n_bits(is_fpu_stack_offset_bits) << is_fpu_stack_offset_shift | |
| 261 , virtual_mask = right_n_bits(virtual_bits) << virtual_shift | |
| 262 , is_xmm_mask = right_n_bits(is_xmm_bits) << is_xmm_shift | |
| 263 , pointer_mask = right_n_bits(pointer_bits) | |
| 264 , lower_reg_mask = right_n_bits(reg_bits) | |
| 265 , no_type_mask = (int)(~(type_mask | last_use_mask | is_fpu_stack_offset_mask)) | |
| 266 }; | |
| 267 | |
| 268 uintptr_t data() const { return value() >> data_shift; } | |
| 269 int lo_reg_half() const { return data() & lower_reg_mask; } | |
| 270 int hi_reg_half() const { return (data() >> reg_bits) & lower_reg_mask; } | |
| 271 OprKind kind_field() const { return (OprKind)(value() & kind_mask); } | |
| 272 OprSize size_field() const { return (OprSize)(value() & size_mask); } | |
| 273 | |
| 274 static char type_char(BasicType t); | |
| 275 | |
| 276 public: | |
| 277 enum { | |
| 278 vreg_base = ConcreteRegisterImpl::number_of_registers, | |
| 279 vreg_max = (1 << data_bits) - 1 | |
| 280 }; | |
| 281 | |
| 282 static inline LIR_Opr illegalOpr(); | |
| 283 | |
| 284 enum OprType { | |
| 285 unknown_type = 0 << type_shift // means: not set (catch uninitialized types) | |
| 286 , int_type = 1 << type_shift | |
| 287 , long_type = 2 << type_shift | |
| 288 , object_type = 3 << type_shift | |
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289 , address_type = 4 << type_shift |
| 0 | 290 , float_type = 5 << type_shift |
| 291 , double_type = 6 << type_shift | |
| 292 }; | |
| 293 friend OprType as_OprType(BasicType t); | |
| 294 friend BasicType as_BasicType(OprType t); | |
| 295 | |
| 296 OprType type_field_valid() const { assert(is_register() || is_stack(), "should not be called otherwise"); return (OprType)(value() & type_mask); } | |
| 297 OprType type_field() const { return is_illegal() ? unknown_type : (OprType)(value() & type_mask); } | |
| 298 | |
| 299 static OprSize size_for(BasicType t) { | |
| 300 switch (t) { | |
| 301 case T_LONG: | |
| 302 case T_DOUBLE: | |
| 303 return double_size; | |
| 304 break; | |
| 305 | |
| 306 case T_FLOAT: | |
| 307 case T_BOOLEAN: | |
| 308 case T_CHAR: | |
| 309 case T_BYTE: | |
| 310 case T_SHORT: | |
| 311 case T_INT: | |
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312 case T_ADDRESS: |
| 0 | 313 case T_OBJECT: |
| 314 case T_ARRAY: | |
| 315 return single_size; | |
| 316 break; | |
| 317 | |
| 318 default: | |
| 319 ShouldNotReachHere(); | |
| 304 | 320 return single_size; |
| 0 | 321 } |
| 322 } | |
| 323 | |
| 324 | |
| 325 void validate_type() const PRODUCT_RETURN; | |
| 326 | |
| 327 BasicType type() const { | |
| 328 if (is_pointer()) { | |
| 329 return pointer()->type(); | |
| 330 } | |
| 331 return as_BasicType(type_field()); | |
| 332 } | |
| 333 | |
| 334 | |
| 335 ValueType* value_type() const { return as_ValueType(type()); } | |
| 336 | |
| 337 char type_char() const { return type_char((is_pointer()) ? pointer()->type() : type()); } | |
| 338 | |
| 339 bool is_equal(LIR_Opr opr) const { return this == opr; } | |
| 340 // checks whether types are same | |
| 341 bool is_same_type(LIR_Opr opr) const { | |
| 342 assert(type_field() != unknown_type && | |
| 343 opr->type_field() != unknown_type, "shouldn't see unknown_type"); | |
| 344 return type_field() == opr->type_field(); | |
| 345 } | |
| 346 bool is_same_register(LIR_Opr opr) { | |
| 347 return (is_register() && opr->is_register() && | |
| 348 kind_field() == opr->kind_field() && | |
| 349 (value() & no_type_mask) == (opr->value() & no_type_mask)); | |
| 350 } | |
| 351 | |
| 352 bool is_pointer() const { return check_value_mask(pointer_mask, pointer_value); } | |
| 353 bool is_illegal() const { return kind_field() == illegal_value; } | |
| 354 bool is_valid() const { return kind_field() != illegal_value; } | |
| 355 | |
| 356 bool is_register() const { return is_cpu_register() || is_fpu_register(); } | |
| 357 bool is_virtual() const { return is_virtual_cpu() || is_virtual_fpu(); } | |
| 358 | |
| 359 bool is_constant() const { return is_pointer() && pointer()->as_constant() != NULL; } | |
| 360 bool is_address() const { return is_pointer() && pointer()->as_address() != NULL; } | |
| 361 | |
| 362 bool is_float_kind() const { return is_pointer() ? pointer()->is_float_kind() : (kind_field() == fpu_register); } | |
| 363 bool is_oop() const; | |
| 364 | |
| 365 // semantic for fpu- and xmm-registers: | |
| 366 // * is_float and is_double return true for xmm_registers | |
| 367 // (so is_single_fpu and is_single_xmm are true) | |
| 368 // * So you must always check for is_???_xmm prior to is_???_fpu to | |
| 369 // distinguish between fpu- and xmm-registers | |
| 370 | |
| 371 bool is_stack() const { validate_type(); return check_value_mask(kind_mask, stack_value); } | |
| 372 bool is_single_stack() const { validate_type(); return check_value_mask(kind_mask | size_mask, stack_value | single_size); } | |
| 373 bool is_double_stack() const { validate_type(); return check_value_mask(kind_mask | size_mask, stack_value | double_size); } | |
| 374 | |
| 375 bool is_cpu_register() const { validate_type(); return check_value_mask(kind_mask, cpu_register); } | |
| 376 bool is_virtual_cpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, cpu_register | virtual_mask); } | |
| 377 bool is_fixed_cpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, cpu_register); } | |
| 378 bool is_single_cpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, cpu_register | single_size); } | |
| 379 bool is_double_cpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, cpu_register | double_size); } | |
| 380 | |
| 381 bool is_fpu_register() const { validate_type(); return check_value_mask(kind_mask, fpu_register); } | |
| 382 bool is_virtual_fpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, fpu_register | virtual_mask); } | |
| 383 bool is_fixed_fpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, fpu_register); } | |
| 384 bool is_single_fpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, fpu_register | single_size); } | |
| 385 bool is_double_fpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, fpu_register | double_size); } | |
| 386 | |
| 387 bool is_xmm_register() const { validate_type(); return check_value_mask(kind_mask | is_xmm_mask, fpu_register | is_xmm_mask); } | |
| 388 bool is_single_xmm() const { validate_type(); return check_value_mask(kind_mask | size_mask | is_xmm_mask, fpu_register | single_size | is_xmm_mask); } | |
| 389 bool is_double_xmm() const { validate_type(); return check_value_mask(kind_mask | size_mask | is_xmm_mask, fpu_register | double_size | is_xmm_mask); } | |
| 390 | |
| 391 // fast accessor functions for special bits that do not work for pointers | |
| 392 // (in this functions, the check for is_pointer() is omitted) | |
| 393 bool is_single_word() const { assert(is_register() || is_stack(), "type check"); return check_value_mask(size_mask, single_size); } | |
| 394 bool is_double_word() const { assert(is_register() || is_stack(), "type check"); return check_value_mask(size_mask, double_size); } | |
| 395 bool is_virtual_register() const { assert(is_register(), "type check"); return check_value_mask(virtual_mask, virtual_mask); } | |
| 396 bool is_oop_register() const { assert(is_register() || is_stack(), "type check"); return type_field_valid() == object_type; } | |
| 397 BasicType type_register() const { assert(is_register() || is_stack(), "type check"); return as_BasicType(type_field_valid()); } | |
| 398 | |
| 399 bool is_last_use() const { assert(is_register(), "only works for registers"); return (value() & last_use_mask) != 0; } | |
| 400 bool is_fpu_stack_offset() const { assert(is_register(), "only works for registers"); return (value() & is_fpu_stack_offset_mask) != 0; } | |
| 401 LIR_Opr make_last_use() { assert(is_register(), "only works for registers"); return (LIR_Opr)(value() | last_use_mask); } | |
| 402 LIR_Opr make_fpu_stack_offset() { assert(is_register(), "only works for registers"); return (LIR_Opr)(value() | is_fpu_stack_offset_mask); } | |
| 403 | |
| 404 | |
| 405 int single_stack_ix() const { assert(is_single_stack() && !is_virtual(), "type check"); return (int)data(); } | |
| 406 int double_stack_ix() const { assert(is_double_stack() && !is_virtual(), "type check"); return (int)data(); } | |
| 407 RegNr cpu_regnr() const { assert(is_single_cpu() && !is_virtual(), "type check"); return (RegNr)data(); } | |
| 408 RegNr cpu_regnrLo() const { assert(is_double_cpu() && !is_virtual(), "type check"); return (RegNr)lo_reg_half(); } | |
| 409 RegNr cpu_regnrHi() const { assert(is_double_cpu() && !is_virtual(), "type check"); return (RegNr)hi_reg_half(); } | |
| 410 RegNr fpu_regnr() const { assert(is_single_fpu() && !is_virtual(), "type check"); return (RegNr)data(); } | |
| 411 RegNr fpu_regnrLo() const { assert(is_double_fpu() && !is_virtual(), "type check"); return (RegNr)lo_reg_half(); } | |
| 412 RegNr fpu_regnrHi() const { assert(is_double_fpu() && !is_virtual(), "type check"); return (RegNr)hi_reg_half(); } | |
| 413 RegNr xmm_regnr() const { assert(is_single_xmm() && !is_virtual(), "type check"); return (RegNr)data(); } | |
| 414 RegNr xmm_regnrLo() const { assert(is_double_xmm() && !is_virtual(), "type check"); return (RegNr)lo_reg_half(); } | |
| 415 RegNr xmm_regnrHi() const { assert(is_double_xmm() && !is_virtual(), "type check"); return (RegNr)hi_reg_half(); } | |
| 416 int vreg_number() const { assert(is_virtual(), "type check"); return (RegNr)data(); } | |
| 417 | |
| 418 LIR_OprPtr* pointer() const { assert(is_pointer(), "type check"); return (LIR_OprPtr*)this; } | |
| 419 LIR_Const* as_constant_ptr() const { return pointer()->as_constant(); } | |
| 420 LIR_Address* as_address_ptr() const { return pointer()->as_address(); } | |
| 421 | |
| 422 Register as_register() const; | |
| 423 Register as_register_lo() const; | |
| 424 Register as_register_hi() const; | |
| 425 | |
| 426 Register as_pointer_register() { | |
| 427 #ifdef _LP64 | |
| 428 if (is_double_cpu()) { | |
| 429 assert(as_register_lo() == as_register_hi(), "should be a single register"); | |
| 430 return as_register_lo(); | |
| 431 } | |
| 432 #endif | |
| 433 return as_register(); | |
| 434 } | |
| 435 | |
| 304 | 436 #ifdef X86 |
| 0 | 437 XMMRegister as_xmm_float_reg() const; |
| 438 XMMRegister as_xmm_double_reg() const; | |
| 439 // for compatibility with RInfo | |
| 440 int fpu () const { return lo_reg_half(); } | |
| 304 | 441 #endif // X86 |
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442 #if defined(SPARC) || defined(ARM) || defined(PPC) |
| 0 | 443 FloatRegister as_float_reg () const; |
| 444 FloatRegister as_double_reg () const; | |
| 445 #endif | |
| 446 | |
| 447 jint as_jint() const { return as_constant_ptr()->as_jint(); } | |
| 448 jlong as_jlong() const { return as_constant_ptr()->as_jlong(); } | |
| 449 jfloat as_jfloat() const { return as_constant_ptr()->as_jfloat(); } | |
| 450 jdouble as_jdouble() const { return as_constant_ptr()->as_jdouble(); } | |
| 451 jobject as_jobject() const { return as_constant_ptr()->as_jobject(); } | |
| 452 | |
| 453 void print() const PRODUCT_RETURN; | |
| 454 void print(outputStream* out) const PRODUCT_RETURN; | |
| 455 }; | |
| 456 | |
| 457 | |
| 458 inline LIR_OprDesc::OprType as_OprType(BasicType type) { | |
| 459 switch (type) { | |
| 460 case T_INT: return LIR_OprDesc::int_type; | |
| 461 case T_LONG: return LIR_OprDesc::long_type; | |
| 462 case T_FLOAT: return LIR_OprDesc::float_type; | |
| 463 case T_DOUBLE: return LIR_OprDesc::double_type; | |
| 464 case T_OBJECT: | |
| 465 case T_ARRAY: return LIR_OprDesc::object_type; | |
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466 case T_ADDRESS: return LIR_OprDesc::address_type; |
| 0 | 467 case T_ILLEGAL: // fall through |
| 468 default: ShouldNotReachHere(); return LIR_OprDesc::unknown_type; | |
| 469 } | |
| 470 } | |
| 471 | |
| 472 inline BasicType as_BasicType(LIR_OprDesc::OprType t) { | |
| 473 switch (t) { | |
| 474 case LIR_OprDesc::int_type: return T_INT; | |
| 475 case LIR_OprDesc::long_type: return T_LONG; | |
| 476 case LIR_OprDesc::float_type: return T_FLOAT; | |
| 477 case LIR_OprDesc::double_type: return T_DOUBLE; | |
| 478 case LIR_OprDesc::object_type: return T_OBJECT; | |
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479 case LIR_OprDesc::address_type: return T_ADDRESS; |
| 0 | 480 case LIR_OprDesc::unknown_type: // fall through |
| 481 default: ShouldNotReachHere(); return T_ILLEGAL; | |
| 482 } | |
| 483 } | |
| 484 | |
| 485 | |
| 486 // LIR_Address | |
| 487 class LIR_Address: public LIR_OprPtr { | |
| 488 friend class LIR_OpVisitState; | |
| 489 | |
| 490 public: | |
| 491 // NOTE: currently these must be the log2 of the scale factor (and | |
| 492 // must also be equivalent to the ScaleFactor enum in | |
| 493 // assembler_i486.hpp) | |
| 494 enum Scale { | |
| 495 times_1 = 0, | |
| 496 times_2 = 1, | |
| 497 times_4 = 2, | |
| 498 times_8 = 3 | |
| 499 }; | |
| 500 | |
| 501 private: | |
| 502 LIR_Opr _base; | |
| 503 LIR_Opr _index; | |
| 504 Scale _scale; | |
| 505 intx _disp; | |
| 506 BasicType _type; | |
| 507 | |
| 508 public: | |
| 509 LIR_Address(LIR_Opr base, LIR_Opr index, BasicType type): | |
| 510 _base(base) | |
| 511 , _index(index) | |
| 512 , _scale(times_1) | |
| 513 , _type(type) | |
| 514 , _disp(0) { verify(); } | |
| 515 | |
| 1572 | 516 LIR_Address(LIR_Opr base, intx disp, BasicType type): |
| 0 | 517 _base(base) |
| 518 , _index(LIR_OprDesc::illegalOpr()) | |
| 519 , _scale(times_1) | |
| 520 , _type(type) | |
| 521 , _disp(disp) { verify(); } | |
| 522 | |
| 1572 | 523 LIR_Address(LIR_Opr base, BasicType type): |
| 524 _base(base) | |
| 525 , _index(LIR_OprDesc::illegalOpr()) | |
| 526 , _scale(times_1) | |
| 527 , _type(type) | |
| 528 , _disp(0) { verify(); } | |
| 529 | |
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530 #if defined(X86) || defined(ARM) |
| 1572 | 531 LIR_Address(LIR_Opr base, LIR_Opr index, Scale scale, intx disp, BasicType type): |
| 0 | 532 _base(base) |
| 533 , _index(index) | |
| 534 , _scale(scale) | |
| 535 , _type(type) | |
| 536 , _disp(disp) { verify(); } | |
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537 #endif // X86 || ARM |
| 0 | 538 |
| 539 LIR_Opr base() const { return _base; } | |
| 540 LIR_Opr index() const { return _index; } | |
| 541 Scale scale() const { return _scale; } | |
| 542 intx disp() const { return _disp; } | |
| 543 | |
| 544 bool equals(LIR_Address* other) const { return base() == other->base() && index() == other->index() && disp() == other->disp() && scale() == other->scale(); } | |
| 545 | |
| 546 virtual LIR_Address* as_address() { return this; } | |
| 547 virtual BasicType type() const { return _type; } | |
| 548 virtual void print_value_on(outputStream* out) const PRODUCT_RETURN; | |
| 549 | |
| 550 void verify() const PRODUCT_RETURN; | |
| 551 | |
| 552 static Scale scale(BasicType type); | |
| 553 }; | |
| 554 | |
| 555 | |
| 556 // operand factory | |
| 557 class LIR_OprFact: public AllStatic { | |
| 558 public: | |
| 559 | |
| 560 static LIR_Opr illegalOpr; | |
| 561 | |
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562 static LIR_Opr single_cpu(int reg) { |
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563 return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | |
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564 LIR_OprDesc::int_type | |
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565 LIR_OprDesc::cpu_register | |
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566 LIR_OprDesc::single_size); |
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567 } |
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568 static LIR_Opr single_cpu_oop(int reg) { |
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569 return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | |
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570 LIR_OprDesc::object_type | |
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571 LIR_OprDesc::cpu_register | |
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572 LIR_OprDesc::single_size); |
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573 } |
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574 static LIR_Opr single_cpu_address(int reg) { |
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575 return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | |
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576 LIR_OprDesc::address_type | |
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577 LIR_OprDesc::cpu_register | |
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578 LIR_OprDesc::single_size); |
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579 } |
| 304 | 580 static LIR_Opr double_cpu(int reg1, int reg2) { |
| 581 LP64_ONLY(assert(reg1 == reg2, "must be identical")); | |
| 582 return (LIR_Opr)(intptr_t)((reg1 << LIR_OprDesc::reg1_shift) | | |
| 583 (reg2 << LIR_OprDesc::reg2_shift) | | |
| 584 LIR_OprDesc::long_type | | |
| 585 LIR_OprDesc::cpu_register | | |
| 586 LIR_OprDesc::double_size); | |
| 587 } | |
| 0 | 588 |
| 304 | 589 static LIR_Opr single_fpu(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | |
| 590 LIR_OprDesc::float_type | | |
| 591 LIR_OprDesc::fpu_register | | |
| 592 LIR_OprDesc::single_size); } | |
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593 #if defined(ARM) |
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594 static LIR_Opr double_fpu(int reg1, int reg2) { return (LIR_Opr)((reg1 << LIR_OprDesc::reg1_shift) | (reg2 << LIR_OprDesc::reg2_shift) | LIR_OprDesc::double_type | LIR_OprDesc::fpu_register | LIR_OprDesc::double_size); } |
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595 static LIR_Opr single_softfp(int reg) { return (LIR_Opr)((reg << LIR_OprDesc::reg1_shift) | LIR_OprDesc::float_type | LIR_OprDesc::cpu_register | LIR_OprDesc::single_size); } |
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596 static LIR_Opr double_softfp(int reg1, int reg2) { return (LIR_Opr)((reg1 << LIR_OprDesc::reg1_shift) | (reg2 << LIR_OprDesc::reg2_shift) | LIR_OprDesc::double_type | LIR_OprDesc::cpu_register | LIR_OprDesc::double_size); } |
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597 #endif |
| 0 | 598 #ifdef SPARC |
| 304 | 599 static LIR_Opr double_fpu(int reg1, int reg2) { return (LIR_Opr)(intptr_t)((reg1 << LIR_OprDesc::reg1_shift) | |
| 600 (reg2 << LIR_OprDesc::reg2_shift) | | |
| 601 LIR_OprDesc::double_type | | |
| 602 LIR_OprDesc::fpu_register | | |
| 603 LIR_OprDesc::double_size); } | |
| 0 | 604 #endif |
| 304 | 605 #ifdef X86 |
| 606 static LIR_Opr double_fpu(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | | |
| 607 (reg << LIR_OprDesc::reg2_shift) | | |
| 608 LIR_OprDesc::double_type | | |
| 609 LIR_OprDesc::fpu_register | | |
| 610 LIR_OprDesc::double_size); } | |
| 611 | |
| 612 static LIR_Opr single_xmm(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | | |
| 613 LIR_OprDesc::float_type | | |
| 614 LIR_OprDesc::fpu_register | | |
| 615 LIR_OprDesc::single_size | | |
| 616 LIR_OprDesc::is_xmm_mask); } | |
| 617 static LIR_Opr double_xmm(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | | |
| 618 (reg << LIR_OprDesc::reg2_shift) | | |
| 619 LIR_OprDesc::double_type | | |
| 620 LIR_OprDesc::fpu_register | | |
| 621 LIR_OprDesc::double_size | | |
| 622 LIR_OprDesc::is_xmm_mask); } | |
| 623 #endif // X86 | |
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624 #ifdef PPC |
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625 static LIR_Opr double_fpu(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | |
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626 (reg << LIR_OprDesc::reg2_shift) | |
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627 LIR_OprDesc::double_type | |
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628 LIR_OprDesc::fpu_register | |
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629 LIR_OprDesc::double_size); } |
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630 static LIR_Opr single_softfp(int reg) { return (LIR_Opr)((reg << LIR_OprDesc::reg1_shift) | |
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631 LIR_OprDesc::float_type | |
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632 LIR_OprDesc::cpu_register | |
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633 LIR_OprDesc::single_size); } |
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634 static LIR_Opr double_softfp(int reg1, int reg2) { return (LIR_Opr)((reg2 << LIR_OprDesc::reg1_shift) | |
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635 (reg1 << LIR_OprDesc::reg2_shift) | |
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636 LIR_OprDesc::double_type | |
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637 LIR_OprDesc::cpu_register | |
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638 LIR_OprDesc::double_size); } |
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639 #endif // PPC |
| 0 | 640 |
| 641 static LIR_Opr virtual_register(int index, BasicType type) { | |
| 642 LIR_Opr res; | |
| 643 switch (type) { | |
| 644 case T_OBJECT: // fall through | |
| 304 | 645 case T_ARRAY: |
| 646 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | | |
| 647 LIR_OprDesc::object_type | | |
| 648 LIR_OprDesc::cpu_register | | |
| 649 LIR_OprDesc::single_size | | |
| 650 LIR_OprDesc::virtual_mask); | |
| 651 break; | |
| 652 | |
| 653 case T_INT: | |
| 654 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | | |
| 655 LIR_OprDesc::int_type | | |
| 656 LIR_OprDesc::cpu_register | | |
| 657 LIR_OprDesc::single_size | | |
| 658 LIR_OprDesc::virtual_mask); | |
| 659 break; | |
| 660 | |
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661 case T_ADDRESS: |
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662 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | |
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663 LIR_OprDesc::address_type | |
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664 LIR_OprDesc::cpu_register | |
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665 LIR_OprDesc::single_size | |
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666 LIR_OprDesc::virtual_mask); |
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667 break; |
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668 |
| 304 | 669 case T_LONG: |
| 670 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | | |
| 671 LIR_OprDesc::long_type | | |
| 672 LIR_OprDesc::cpu_register | | |
| 673 LIR_OprDesc::double_size | | |
| 674 LIR_OprDesc::virtual_mask); | |
| 675 break; | |
| 676 | |
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677 #ifdef __SOFTFP__ |
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678 case T_FLOAT: |
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679 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | |
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680 LIR_OprDesc::float_type | |
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681 LIR_OprDesc::cpu_register | |
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682 LIR_OprDesc::single_size | |
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683 LIR_OprDesc::virtual_mask); |
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684 break; |
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685 case T_DOUBLE: |
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686 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | |
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687 LIR_OprDesc::double_type | |
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688 LIR_OprDesc::cpu_register | |
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689 LIR_OprDesc::double_size | |
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690 LIR_OprDesc::virtual_mask); |
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691 break; |
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692 #else // __SOFTFP__ |
| 304 | 693 case T_FLOAT: |
| 694 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | | |
| 695 LIR_OprDesc::float_type | | |
| 696 LIR_OprDesc::fpu_register | | |
| 697 LIR_OprDesc::single_size | | |
| 698 LIR_OprDesc::virtual_mask); | |
| 699 break; | |
| 700 | |
| 701 case | |
| 702 T_DOUBLE: res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | | |
| 703 LIR_OprDesc::double_type | | |
| 704 LIR_OprDesc::fpu_register | | |
| 705 LIR_OprDesc::double_size | | |
| 706 LIR_OprDesc::virtual_mask); | |
| 707 break; | |
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708 #endif // __SOFTFP__ |
| 0 | 709 default: ShouldNotReachHere(); res = illegalOpr; |
| 710 } | |
| 711 | |
| 712 #ifdef ASSERT | |
| 713 res->validate_type(); | |
| 714 assert(res->vreg_number() == index, "conversion check"); | |
| 715 assert(index >= LIR_OprDesc::vreg_base, "must start at vreg_base"); | |
| 716 assert(index <= (max_jint >> LIR_OprDesc::data_shift), "index is too big"); | |
| 717 | |
| 718 // old-style calculation; check if old and new method are equal | |
| 719 LIR_OprDesc::OprType t = as_OprType(type); | |
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720 #ifdef __SOFTFP__ |
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721 LIR_Opr old_res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | |
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722 t | |
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723 LIR_OprDesc::cpu_register | |
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724 LIR_OprDesc::size_for(type) | LIR_OprDesc::virtual_mask); |
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725 #else // __SOFTFP__ |
| 304 | 726 LIR_Opr old_res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | t | |
| 727 ((type == T_FLOAT || type == T_DOUBLE) ? LIR_OprDesc::fpu_register : LIR_OprDesc::cpu_register) | | |
| 0 | 728 LIR_OprDesc::size_for(type) | LIR_OprDesc::virtual_mask); |
| 729 assert(res == old_res, "old and new method not equal"); | |
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730 #endif // __SOFTFP__ |
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731 #endif // ASSERT |
| 0 | 732 |
| 733 return res; | |
| 734 } | |
| 735 | |
| 736 // 'index' is computed by FrameMap::local_stack_pos(index); do not use other parameters as | |
| 737 // the index is platform independent; a double stack useing indeces 2 and 3 has always | |
| 738 // index 2. | |
| 739 static LIR_Opr stack(int index, BasicType type) { | |
| 740 LIR_Opr res; | |
| 741 switch (type) { | |
| 742 case T_OBJECT: // fall through | |
| 304 | 743 case T_ARRAY: |
| 744 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | | |
| 745 LIR_OprDesc::object_type | | |
| 746 LIR_OprDesc::stack_value | | |
| 747 LIR_OprDesc::single_size); | |
| 748 break; | |
| 749 | |
| 750 case T_INT: | |
| 751 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | | |
| 752 LIR_OprDesc::int_type | | |
| 753 LIR_OprDesc::stack_value | | |
| 754 LIR_OprDesc::single_size); | |
| 755 break; | |
| 756 | |
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757 case T_ADDRESS: |
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758 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | |
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759 LIR_OprDesc::address_type | |
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760 LIR_OprDesc::stack_value | |
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761 LIR_OprDesc::single_size); |
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762 break; |
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763 |
| 304 | 764 case T_LONG: |
| 765 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | | |
| 766 LIR_OprDesc::long_type | | |
| 767 LIR_OprDesc::stack_value | | |
| 768 LIR_OprDesc::double_size); | |
| 769 break; | |
| 770 | |
| 771 case T_FLOAT: | |
| 772 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | | |
| 773 LIR_OprDesc::float_type | | |
| 774 LIR_OprDesc::stack_value | | |
| 775 LIR_OprDesc::single_size); | |
| 776 break; | |
| 777 case T_DOUBLE: | |
| 778 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | | |
| 779 LIR_OprDesc::double_type | | |
| 780 LIR_OprDesc::stack_value | | |
| 781 LIR_OprDesc::double_size); | |
| 782 break; | |
| 0 | 783 |
| 784 default: ShouldNotReachHere(); res = illegalOpr; | |
| 785 } | |
| 786 | |
| 787 #ifdef ASSERT | |
| 788 assert(index >= 0, "index must be positive"); | |
| 789 assert(index <= (max_jint >> LIR_OprDesc::data_shift), "index is too big"); | |
| 790 | |
| 304 | 791 LIR_Opr old_res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | |
| 792 LIR_OprDesc::stack_value | | |
| 793 as_OprType(type) | | |
| 794 LIR_OprDesc::size_for(type)); | |
| 0 | 795 assert(res == old_res, "old and new method not equal"); |
| 796 #endif | |
| 797 | |
| 798 return res; | |
| 799 } | |
| 800 | |
| 801 static LIR_Opr intConst(jint i) { return (LIR_Opr)(new LIR_Const(i)); } | |
| 802 static LIR_Opr longConst(jlong l) { return (LIR_Opr)(new LIR_Const(l)); } | |
| 803 static LIR_Opr floatConst(jfloat f) { return (LIR_Opr)(new LIR_Const(f)); } | |
| 804 static LIR_Opr doubleConst(jdouble d) { return (LIR_Opr)(new LIR_Const(d)); } | |
| 805 static LIR_Opr oopConst(jobject o) { return (LIR_Opr)(new LIR_Const(o)); } | |
| 806 static LIR_Opr address(LIR_Address* a) { return (LIR_Opr)a; } | |
| 807 static LIR_Opr intptrConst(void* p) { return (LIR_Opr)(new LIR_Const(p)); } | |
| 808 static LIR_Opr intptrConst(intptr_t v) { return (LIR_Opr)(new LIR_Const((void*)v)); } | |
| 809 static LIR_Opr illegal() { return (LIR_Opr)-1; } | |
|
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810 static LIR_Opr addressConst(jint i) { return (LIR_Opr)(new LIR_Const(i, true)); } |
| 0 | 811 |
| 812 static LIR_Opr value_type(ValueType* type); | |
| 813 static LIR_Opr dummy_value_type(ValueType* type); | |
| 814 }; | |
| 815 | |
| 816 | |
| 817 //------------------------------------------------------------------------------- | |
| 818 // LIR Instructions | |
| 819 //------------------------------------------------------------------------------- | |
| 820 // | |
| 821 // Note: | |
| 822 // - every instruction has a result operand | |
| 823 // - every instruction has an CodeEmitInfo operand (can be revisited later) | |
| 824 // - every instruction has a LIR_OpCode operand | |
| 825 // - LIR_OpN, means an instruction that has N input operands | |
| 826 // | |
| 827 // class hierarchy: | |
| 828 // | |
| 829 class LIR_Op; | |
| 830 class LIR_Op0; | |
| 831 class LIR_OpLabel; | |
| 832 class LIR_Op1; | |
| 833 class LIR_OpBranch; | |
| 834 class LIR_OpConvert; | |
| 835 class LIR_OpAllocObj; | |
| 836 class LIR_OpRoundFP; | |
| 837 class LIR_Op2; | |
| 838 class LIR_OpDelay; | |
| 839 class LIR_Op3; | |
| 840 class LIR_OpAllocArray; | |
| 841 class LIR_OpCall; | |
| 842 class LIR_OpJavaCall; | |
| 843 class LIR_OpRTCall; | |
| 844 class LIR_OpArrayCopy; | |
| 845 class LIR_OpLock; | |
| 846 class LIR_OpTypeCheck; | |
| 847 class LIR_OpCompareAndSwap; | |
| 848 class LIR_OpProfileCall; | |
| 849 | |
| 850 | |
| 851 // LIR operation codes | |
| 852 enum LIR_Code { | |
| 853 lir_none | |
| 854 , begin_op0 | |
| 855 , lir_word_align | |
| 856 , lir_label | |
| 857 , lir_nop | |
| 858 , lir_backwardbranch_target | |
| 859 , lir_std_entry | |
| 860 , lir_osr_entry | |
| 861 , lir_build_frame | |
| 862 , lir_fpop_raw | |
| 863 , lir_24bit_FPU | |
| 864 , lir_reset_FPU | |
| 865 , lir_breakpoint | |
| 866 , lir_rtcall | |
| 867 , lir_membar | |
| 868 , lir_membar_acquire | |
| 869 , lir_membar_release | |
|
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870 , lir_membar_loadload |
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871 , lir_membar_storestore |
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872 , lir_membar_loadstore |
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873 , lir_membar_storeload |
| 0 | 874 , lir_get_thread |
| 875 , end_op0 | |
| 876 , begin_op1 | |
| 877 , lir_fxch | |
| 878 , lir_fld | |
| 879 , lir_ffree | |
| 880 , lir_push | |
| 881 , lir_pop | |
| 882 , lir_null_check | |
| 883 , lir_return | |
| 884 , lir_leal | |
| 885 , lir_neg | |
| 886 , lir_branch | |
| 887 , lir_cond_float_branch | |
| 888 , lir_move | |
| 889 , lir_prefetchr | |
| 890 , lir_prefetchw | |
| 891 , lir_convert | |
| 892 , lir_alloc_object | |
| 893 , lir_monaddr | |
| 894 , lir_roundfp | |
| 895 , lir_safepoint | |
| 1783 | 896 , lir_pack64 |
| 897 , lir_unpack64 | |
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898 , lir_unwind |
| 0 | 899 , end_op1 |
| 900 , begin_op2 | |
| 901 , lir_cmp | |
| 902 , lir_cmp_l2i | |
| 903 , lir_ucmp_fd2i | |
| 904 , lir_cmp_fd2i | |
| 905 , lir_cmove | |
| 906 , lir_add | |
| 907 , lir_sub | |
| 908 , lir_mul | |
| 909 , lir_mul_strictfp | |
| 910 , lir_div | |
| 911 , lir_div_strictfp | |
| 912 , lir_rem | |
| 913 , lir_sqrt | |
| 914 , lir_abs | |
| 915 , lir_sin | |
| 916 , lir_cos | |
| 917 , lir_tan | |
| 918 , lir_log | |
| 919 , lir_log10 | |
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920 , lir_exp |
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921 , lir_pow |
| 0 | 922 , lir_logic_and |
| 923 , lir_logic_or | |
| 924 , lir_logic_xor | |
| 925 , lir_shl | |
| 926 , lir_shr | |
| 927 , lir_ushr | |
| 928 , lir_alloc_array | |
| 929 , lir_throw | |
| 930 , lir_compare_to | |
| 931 , end_op2 | |
| 932 , begin_op3 | |
| 933 , lir_idiv | |
| 934 , lir_irem | |
| 935 , end_op3 | |
| 936 , begin_opJavaCall | |
| 937 , lir_static_call | |
| 938 , lir_optvirtual_call | |
| 939 , lir_icvirtual_call | |
| 940 , lir_virtual_call | |
| 1295 | 941 , lir_dynamic_call |
| 0 | 942 , end_opJavaCall |
| 943 , begin_opArrayCopy | |
| 944 , lir_arraycopy | |
| 945 , end_opArrayCopy | |
| 946 , begin_opLock | |
| 947 , lir_lock | |
| 948 , lir_unlock | |
| 949 , end_opLock | |
| 950 , begin_delay_slot | |
| 951 , lir_delay_slot | |
| 952 , end_delay_slot | |
| 953 , begin_opTypeCheck | |
| 954 , lir_instanceof | |
| 955 , lir_checkcast | |
| 956 , lir_store_check | |
| 957 , end_opTypeCheck | |
| 958 , begin_opCompareAndSwap | |
| 959 , lir_cas_long | |
| 960 , lir_cas_obj | |
| 961 , lir_cas_int | |
| 962 , end_opCompareAndSwap | |
| 963 , begin_opMDOProfile | |
| 964 , lir_profile_call | |
| 965 , end_opMDOProfile | |
| 966 }; | |
| 967 | |
| 968 | |
| 969 enum LIR_Condition { | |
| 970 lir_cond_equal | |
| 971 , lir_cond_notEqual | |
| 972 , lir_cond_less | |
| 973 , lir_cond_lessEqual | |
| 974 , lir_cond_greaterEqual | |
| 975 , lir_cond_greater | |
| 976 , lir_cond_belowEqual | |
| 977 , lir_cond_aboveEqual | |
| 978 , lir_cond_always | |
| 979 , lir_cond_unknown = -1 | |
| 980 }; | |
| 981 | |
| 982 | |
| 983 enum LIR_PatchCode { | |
| 984 lir_patch_none, | |
| 985 lir_patch_low, | |
| 986 lir_patch_high, | |
| 987 lir_patch_normal | |
| 988 }; | |
| 989 | |
| 990 | |
| 991 enum LIR_MoveKind { | |
| 992 lir_move_normal, | |
| 993 lir_move_volatile, | |
| 994 lir_move_unaligned, | |
| 2002 | 995 lir_move_wide, |
| 0 | 996 lir_move_max_flag |
| 997 }; | |
| 998 | |
| 999 | |
| 1000 // -------------------------------------------------- | |
| 1001 // LIR_Op | |
| 1002 // -------------------------------------------------- | |
| 1003 class LIR_Op: public CompilationResourceObj { | |
| 1004 friend class LIR_OpVisitState; | |
| 1005 | |
| 1006 #ifdef ASSERT | |
| 1007 private: | |
| 1008 const char * _file; | |
| 1009 int _line; | |
| 1010 #endif | |
| 1011 | |
| 1012 protected: | |
| 1013 LIR_Opr _result; | |
| 1014 unsigned short _code; | |
| 1015 unsigned short _flags; | |
| 1016 CodeEmitInfo* _info; | |
| 1017 int _id; // value id for register allocation | |
| 1018 int _fpu_pop_count; | |
| 1019 Instruction* _source; // for debugging | |
| 1020 | |
| 1021 static void print_condition(outputStream* out, LIR_Condition cond) PRODUCT_RETURN; | |
| 1022 | |
| 1023 protected: | |
| 1024 static bool is_in_range(LIR_Code test, LIR_Code start, LIR_Code end) { return start < test && test < end; } | |
| 1025 | |
| 1026 public: | |
| 1027 LIR_Op() | |
| 1028 : _result(LIR_OprFact::illegalOpr) | |
| 1029 , _code(lir_none) | |
| 1030 , _flags(0) | |
| 1031 , _info(NULL) | |
| 1032 #ifdef ASSERT | |
| 1033 , _file(NULL) | |
| 1034 , _line(0) | |
| 1035 #endif | |
| 1036 , _fpu_pop_count(0) | |
| 1037 , _source(NULL) | |
| 1038 , _id(-1) {} | |
| 1039 | |
| 1040 LIR_Op(LIR_Code code, LIR_Opr result, CodeEmitInfo* info) | |
| 1041 : _result(result) | |
| 1042 , _code(code) | |
| 1043 , _flags(0) | |
| 1044 , _info(info) | |
| 1045 #ifdef ASSERT | |
| 1046 , _file(NULL) | |
| 1047 , _line(0) | |
| 1048 #endif | |
| 1049 , _fpu_pop_count(0) | |
| 1050 , _source(NULL) | |
| 1051 , _id(-1) {} | |
| 1052 | |
| 1053 CodeEmitInfo* info() const { return _info; } | |
| 1054 LIR_Code code() const { return (LIR_Code)_code; } | |
| 1055 LIR_Opr result_opr() const { return _result; } | |
| 1056 void set_result_opr(LIR_Opr opr) { _result = opr; } | |
| 1057 | |
| 1058 #ifdef ASSERT | |
| 1059 void set_file_and_line(const char * file, int line) { | |
| 1060 _file = file; | |
| 1061 _line = line; | |
| 1062 } | |
| 1063 #endif | |
| 1064 | |
| 1065 virtual const char * name() const PRODUCT_RETURN0; | |
| 1066 | |
| 1067 int id() const { return _id; } | |
| 1068 void set_id(int id) { _id = id; } | |
| 1069 | |
| 1070 // FPU stack simulation helpers -- only used on Intel | |
| 1071 void set_fpu_pop_count(int count) { assert(count >= 0 && count <= 1, "currently only 0 and 1 are valid"); _fpu_pop_count = count; } | |
| 1072 int fpu_pop_count() const { return _fpu_pop_count; } | |
| 1073 bool pop_fpu_stack() { return _fpu_pop_count > 0; } | |
| 1074 | |
| 1075 Instruction* source() const { return _source; } | |
| 1076 void set_source(Instruction* ins) { _source = ins; } | |
| 1077 | |
| 1078 virtual void emit_code(LIR_Assembler* masm) = 0; | |
| 1079 virtual void print_instr(outputStream* out) const = 0; | |
| 1080 virtual void print_on(outputStream* st) const PRODUCT_RETURN; | |
| 1081 | |
| 1082 virtual LIR_OpCall* as_OpCall() { return NULL; } | |
| 1083 virtual LIR_OpJavaCall* as_OpJavaCall() { return NULL; } | |
| 1084 virtual LIR_OpLabel* as_OpLabel() { return NULL; } | |
| 1085 virtual LIR_OpDelay* as_OpDelay() { return NULL; } | |
| 1086 virtual LIR_OpLock* as_OpLock() { return NULL; } | |
| 1087 virtual LIR_OpAllocArray* as_OpAllocArray() { return NULL; } | |
| 1088 virtual LIR_OpAllocObj* as_OpAllocObj() { return NULL; } | |
| 1089 virtual LIR_OpRoundFP* as_OpRoundFP() { return NULL; } | |
| 1090 virtual LIR_OpBranch* as_OpBranch() { return NULL; } | |
| 1091 virtual LIR_OpRTCall* as_OpRTCall() { return NULL; } | |
| 1092 virtual LIR_OpConvert* as_OpConvert() { return NULL; } | |
| 1093 virtual LIR_Op0* as_Op0() { return NULL; } | |
| 1094 virtual LIR_Op1* as_Op1() { return NULL; } | |
| 1095 virtual LIR_Op2* as_Op2() { return NULL; } | |
| 1096 virtual LIR_Op3* as_Op3() { return NULL; } | |
| 1097 virtual LIR_OpArrayCopy* as_OpArrayCopy() { return NULL; } | |
| 1098 virtual LIR_OpTypeCheck* as_OpTypeCheck() { return NULL; } | |
| 1099 virtual LIR_OpCompareAndSwap* as_OpCompareAndSwap() { return NULL; } | |
| 1100 virtual LIR_OpProfileCall* as_OpProfileCall() { return NULL; } | |
| 1101 | |
| 1102 virtual void verify() const {} | |
| 1103 }; | |
| 1104 | |
| 1105 // for calls | |
| 1106 class LIR_OpCall: public LIR_Op { | |
| 1107 friend class LIR_OpVisitState; | |
| 1108 | |
| 1109 protected: | |
| 1110 address _addr; | |
| 1111 LIR_OprList* _arguments; | |
| 1112 protected: | |
| 1113 LIR_OpCall(LIR_Code code, address addr, LIR_Opr result, | |
| 1114 LIR_OprList* arguments, CodeEmitInfo* info = NULL) | |
| 1115 : LIR_Op(code, result, info) | |
| 1116 , _arguments(arguments) | |
| 1117 , _addr(addr) {} | |
| 1118 | |
| 1119 public: | |
| 1120 address addr() const { return _addr; } | |
| 1121 const LIR_OprList* arguments() const { return _arguments; } | |
| 1122 virtual LIR_OpCall* as_OpCall() { return this; } | |
| 1123 }; | |
| 1124 | |
| 1125 | |
| 1126 // -------------------------------------------------- | |
| 1127 // LIR_OpJavaCall | |
| 1128 // -------------------------------------------------- | |
| 1129 class LIR_OpJavaCall: public LIR_OpCall { | |
| 1130 friend class LIR_OpVisitState; | |
| 1131 | |
| 1132 private: | |
| 1564 | 1133 ciMethod* _method; |
| 1134 LIR_Opr _receiver; | |
| 1135 LIR_Opr _method_handle_invoke_SP_save_opr; // Used in LIR_OpVisitState::visit to store the reference to FrameMap::method_handle_invoke_SP_save_opr. | |
| 0 | 1136 |
| 1137 public: | |
| 1138 LIR_OpJavaCall(LIR_Code code, ciMethod* method, | |
| 1139 LIR_Opr receiver, LIR_Opr result, | |
| 1140 address addr, LIR_OprList* arguments, | |
| 1141 CodeEmitInfo* info) | |
| 1142 : LIR_OpCall(code, addr, result, arguments, info) | |
| 1143 , _receiver(receiver) | |
| 1564 | 1144 , _method(method) |
| 1145 , _method_handle_invoke_SP_save_opr(LIR_OprFact::illegalOpr) | |
| 1146 { assert(is_in_range(code, begin_opJavaCall, end_opJavaCall), "code check"); } | |
| 0 | 1147 |
| 1148 LIR_OpJavaCall(LIR_Code code, ciMethod* method, | |
| 1149 LIR_Opr receiver, LIR_Opr result, intptr_t vtable_offset, | |
| 1150 LIR_OprList* arguments, CodeEmitInfo* info) | |
| 1151 : LIR_OpCall(code, (address)vtable_offset, result, arguments, info) | |
| 1152 , _receiver(receiver) | |
| 1564 | 1153 , _method(method) |
| 1154 , _method_handle_invoke_SP_save_opr(LIR_OprFact::illegalOpr) | |
| 1155 { assert(is_in_range(code, begin_opJavaCall, end_opJavaCall), "code check"); } | |
| 0 | 1156 |
| 1157 LIR_Opr receiver() const { return _receiver; } | |
| 1158 ciMethod* method() const { return _method; } | |
| 1159 | |
| 1295 | 1160 // JSR 292 support. |
| 1161 bool is_invokedynamic() const { return code() == lir_dynamic_call; } | |
| 1162 bool is_method_handle_invoke() const { | |
| 1163 return | |
| 1164 is_invokedynamic() // An invokedynamic is always a MethodHandle call site. | |
| 1165 || | |
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1166 method()->is_compiled_lambda_form() // Java-generated adapter |
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1167 || |
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1168 method()->is_method_handle_intrinsic(); // JVM-generated MH intrinsic |
| 1295 | 1169 } |
| 1170 | |
| 0 | 1171 intptr_t vtable_offset() const { |
| 1172 assert(_code == lir_virtual_call, "only have vtable for real vcall"); | |
| 1173 return (intptr_t) addr(); | |
| 1174 } | |
| 1175 | |
| 1176 virtual void emit_code(LIR_Assembler* masm); | |
| 1177 virtual LIR_OpJavaCall* as_OpJavaCall() { return this; } | |
| 1178 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; | |
| 1179 }; | |
| 1180 | |
| 1181 // -------------------------------------------------- | |
| 1182 // LIR_OpLabel | |
| 1183 // -------------------------------------------------- | |
| 1184 // Location where a branch can continue | |
| 1185 class LIR_OpLabel: public LIR_Op { | |
| 1186 friend class LIR_OpVisitState; | |
| 1187 | |
| 1188 private: | |
| 1189 Label* _label; | |
| 1190 public: | |
| 1191 LIR_OpLabel(Label* lbl) | |
| 1192 : LIR_Op(lir_label, LIR_OprFact::illegalOpr, NULL) | |
| 1193 , _label(lbl) {} | |
| 1194 Label* label() const { return _label; } | |
| 1195 | |
| 1196 virtual void emit_code(LIR_Assembler* masm); | |
| 1197 virtual LIR_OpLabel* as_OpLabel() { return this; } | |
| 1198 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; | |
| 1199 }; | |
| 1200 | |
| 1201 // LIR_OpArrayCopy | |
| 1202 class LIR_OpArrayCopy: public LIR_Op { | |
| 1203 friend class LIR_OpVisitState; | |
| 1204 | |
| 1205 private: | |
| 1206 ArrayCopyStub* _stub; | |
| 1207 LIR_Opr _src; | |
| 1208 LIR_Opr _src_pos; | |
| 1209 LIR_Opr _dst; | |
| 1210 LIR_Opr _dst_pos; | |
| 1211 LIR_Opr _length; | |
| 1212 LIR_Opr _tmp; | |
| 1213 ciArrayKlass* _expected_type; | |
| 1214 int _flags; | |
| 1215 | |
| 1216 public: | |
| 1217 enum Flags { | |
| 1218 src_null_check = 1 << 0, | |
| 1219 dst_null_check = 1 << 1, | |
| 1220 src_pos_positive_check = 1 << 2, | |
| 1221 dst_pos_positive_check = 1 << 3, | |
| 1222 length_positive_check = 1 << 4, | |
| 1223 src_range_check = 1 << 5, | |
| 1224 dst_range_check = 1 << 6, | |
| 1225 type_check = 1 << 7, | |
| 2446 | 1226 overlapping = 1 << 8, |
| 1227 unaligned = 1 << 9, | |
| 1228 src_objarray = 1 << 10, | |
| 1229 dst_objarray = 1 << 11, | |
| 1230 all_flags = (1 << 12) - 1 | |
| 0 | 1231 }; |
| 1232 | |
| 1233 LIR_OpArrayCopy(LIR_Opr src, LIR_Opr src_pos, LIR_Opr dst, LIR_Opr dst_pos, LIR_Opr length, LIR_Opr tmp, | |
| 1234 ciArrayKlass* expected_type, int flags, CodeEmitInfo* info); | |
| 1235 | |
| 1236 LIR_Opr src() const { return _src; } | |
| 1237 LIR_Opr src_pos() const { return _src_pos; } | |
| 1238 LIR_Opr dst() const { return _dst; } | |
| 1239 LIR_Opr dst_pos() const { return _dst_pos; } | |
| 1240 LIR_Opr length() const { return _length; } | |
| 1241 LIR_Opr tmp() const { return _tmp; } | |
| 1242 int flags() const { return _flags; } | |
| 1243 ciArrayKlass* expected_type() const { return _expected_type; } | |
| 1244 ArrayCopyStub* stub() const { return _stub; } | |
| 1245 | |
| 1246 virtual void emit_code(LIR_Assembler* masm); | |
| 1247 virtual LIR_OpArrayCopy* as_OpArrayCopy() { return this; } | |
| 1248 void print_instr(outputStream* out) const PRODUCT_RETURN; | |
| 1249 }; | |
| 1250 | |
| 1251 | |
| 1252 // -------------------------------------------------- | |
| 1253 // LIR_Op0 | |
| 1254 // -------------------------------------------------- | |
| 1255 class LIR_Op0: public LIR_Op { | |
| 1256 friend class LIR_OpVisitState; | |
| 1257 | |
| 1258 public: | |
| 1259 LIR_Op0(LIR_Code code) | |
| 1260 : LIR_Op(code, LIR_OprFact::illegalOpr, NULL) { assert(is_in_range(code, begin_op0, end_op0), "code check"); } | |
| 1261 LIR_Op0(LIR_Code code, LIR_Opr result, CodeEmitInfo* info = NULL) | |
| 1262 : LIR_Op(code, result, info) { assert(is_in_range(code, begin_op0, end_op0), "code check"); } | |
| 1263 | |
| 1264 virtual void emit_code(LIR_Assembler* masm); | |
| 1265 virtual LIR_Op0* as_Op0() { return this; } | |
| 1266 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; | |
| 1267 }; | |
| 1268 | |
| 1269 | |
| 1270 // -------------------------------------------------- | |
| 1271 // LIR_Op1 | |
| 1272 // -------------------------------------------------- | |
| 1273 | |
| 1274 class LIR_Op1: public LIR_Op { | |
| 1275 friend class LIR_OpVisitState; | |
| 1276 | |
| 1277 protected: | |
| 1278 LIR_Opr _opr; // input operand | |
| 1279 BasicType _type; // Operand types | |
| 1280 LIR_PatchCode _patch; // only required with patchin (NEEDS_CLEANUP: do we want a special instruction for patching?) | |
| 1281 | |
| 1282 static void print_patch_code(outputStream* out, LIR_PatchCode code); | |
| 1283 | |
| 1284 void set_kind(LIR_MoveKind kind) { | |
| 1285 assert(code() == lir_move, "must be"); | |
| 1286 _flags = kind; | |
| 1287 } | |
| 1288 | |
| 1289 public: | |
| 1290 LIR_Op1(LIR_Code code, LIR_Opr opr, LIR_Opr result = LIR_OprFact::illegalOpr, BasicType type = T_ILLEGAL, LIR_PatchCode patch = lir_patch_none, CodeEmitInfo* info = NULL) | |
| 1291 : LIR_Op(code, result, info) | |
| 1292 , _opr(opr) | |
| 1293 , _patch(patch) | |
| 1294 , _type(type) { assert(is_in_range(code, begin_op1, end_op1), "code check"); } | |
| 1295 | |
| 1296 LIR_Op1(LIR_Code code, LIR_Opr opr, LIR_Opr result, BasicType type, LIR_PatchCode patch, CodeEmitInfo* info, LIR_MoveKind kind) | |
| 1297 : LIR_Op(code, result, info) | |
| 1298 , _opr(opr) | |
| 1299 , _patch(patch) | |
| 1300 , _type(type) { | |
| 1301 assert(code == lir_move, "must be"); | |
| 1302 set_kind(kind); | |
| 1303 } | |
| 1304 | |
| 1305 LIR_Op1(LIR_Code code, LIR_Opr opr, CodeEmitInfo* info) | |
| 1306 : LIR_Op(code, LIR_OprFact::illegalOpr, info) | |
| 1307 , _opr(opr) | |
| 1308 , _patch(lir_patch_none) | |
| 1309 , _type(T_ILLEGAL) { assert(is_in_range(code, begin_op1, end_op1), "code check"); } | |
| 1310 | |
| 1311 LIR_Opr in_opr() const { return _opr; } | |
| 1312 LIR_PatchCode patch_code() const { return _patch; } | |
| 1313 BasicType type() const { return _type; } | |
| 1314 | |
| 1315 LIR_MoveKind move_kind() const { | |
| 1316 assert(code() == lir_move, "must be"); | |
| 1317 return (LIR_MoveKind)_flags; | |
| 1318 } | |
| 1319 | |
| 1320 virtual void emit_code(LIR_Assembler* masm); | |
| 1321 virtual LIR_Op1* as_Op1() { return this; } | |
| 1322 virtual const char * name() const PRODUCT_RETURN0; | |
| 1323 | |
| 1324 void set_in_opr(LIR_Opr opr) { _opr = opr; } | |
| 1325 | |
| 1326 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; | |
| 1327 virtual void verify() const; | |
| 1328 }; | |
| 1329 | |
| 1330 | |
| 1331 // for runtime calls | |
| 1332 class LIR_OpRTCall: public LIR_OpCall { | |
| 1333 friend class LIR_OpVisitState; | |
| 1334 | |
| 1335 private: | |
| 1336 LIR_Opr _tmp; | |
| 1337 public: | |
| 1338 LIR_OpRTCall(address addr, LIR_Opr tmp, | |
| 1339 LIR_Opr result, LIR_OprList* arguments, CodeEmitInfo* info = NULL) | |
| 1340 : LIR_OpCall(lir_rtcall, addr, result, arguments, info) | |
| 1341 , _tmp(tmp) {} | |
| 1342 | |
| 1343 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; | |
| 1344 virtual void emit_code(LIR_Assembler* masm); | |
| 1345 virtual LIR_OpRTCall* as_OpRTCall() { return this; } | |
| 1346 | |
| 1347 LIR_Opr tmp() const { return _tmp; } | |
| 1348 | |
| 1349 virtual void verify() const; | |
| 1350 }; | |
| 1351 | |
| 1352 | |
| 1353 class LIR_OpBranch: public LIR_Op { | |
| 1354 friend class LIR_OpVisitState; | |
| 1355 | |
| 1356 private: | |
| 1357 LIR_Condition _cond; | |
| 1358 BasicType _type; | |
| 1359 Label* _label; | |
| 1360 BlockBegin* _block; // if this is a branch to a block, this is the block | |
| 1361 BlockBegin* _ublock; // if this is a float-branch, this is the unorderd block | |
| 1362 CodeStub* _stub; // if this is a branch to a stub, this is the stub | |
| 1363 | |
| 1364 public: | |
| 4816 | 1365 LIR_OpBranch(LIR_Condition cond, BasicType type, Label* lbl) |
| 0 | 1366 : LIR_Op(lir_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*) NULL) |
| 1367 , _cond(cond) | |
| 4816 | 1368 , _type(type) |
| 0 | 1369 , _label(lbl) |
| 1370 , _block(NULL) | |
| 1371 , _ublock(NULL) | |
| 1372 , _stub(NULL) { } | |
| 1373 | |
| 1374 LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block); | |
| 1375 LIR_OpBranch(LIR_Condition cond, BasicType type, CodeStub* stub); | |
| 1376 | |
| 1377 // for unordered comparisons | |
| 1378 LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block, BlockBegin* ublock); | |
| 1379 | |
| 1380 LIR_Condition cond() const { return _cond; } | |
| 1381 BasicType type() const { return _type; } | |
| 1382 Label* label() const { return _label; } | |
| 1383 BlockBegin* block() const { return _block; } | |
| 1384 BlockBegin* ublock() const { return _ublock; } | |
| 1385 CodeStub* stub() const { return _stub; } | |
| 1386 | |
| 1387 void change_block(BlockBegin* b); | |
| 1388 void change_ublock(BlockBegin* b); | |
| 1389 void negate_cond(); | |
| 1390 | |
| 1391 virtual void emit_code(LIR_Assembler* masm); | |
| 1392 virtual LIR_OpBranch* as_OpBranch() { return this; } | |
| 1393 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; | |
| 1394 }; | |
| 1395 | |
| 1396 | |
| 1397 class ConversionStub; | |
| 1398 | |
| 1399 class LIR_OpConvert: public LIR_Op1 { | |
| 1400 friend class LIR_OpVisitState; | |
| 1401 | |
| 1402 private: | |
| 1403 Bytecodes::Code _bytecode; | |
| 1404 ConversionStub* _stub; | |
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1406 LIR_Opr _tmp1; |
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1407 LIR_Opr _tmp2; |
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1408 #endif |
| 0 | 1409 |
| 1410 public: | |
| 1411 LIR_OpConvert(Bytecodes::Code code, LIR_Opr opr, LIR_Opr result, ConversionStub* stub) | |
| 1412 : LIR_Op1(lir_convert, opr, result) | |
| 1413 , _stub(stub) | |
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1414 #ifdef PPC |
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1415 , _tmp1(LIR_OprDesc::illegalOpr()) |
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1416 , _tmp2(LIR_OprDesc::illegalOpr()) |
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1417 #endif |
| 0 | 1418 , _bytecode(code) {} |
| 1419 | |
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1420 #ifdef PPC |
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1421 LIR_OpConvert(Bytecodes::Code code, LIR_Opr opr, LIR_Opr result, ConversionStub* stub |
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1422 ,LIR_Opr tmp1, LIR_Opr tmp2) |
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1423 : LIR_Op1(lir_convert, opr, result) |
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1424 , _stub(stub) |
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1425 , _tmp1(tmp1) |
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1426 , _tmp2(tmp2) |
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1427 , _bytecode(code) {} |
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1428 #endif |
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1429 |
| 0 | 1430 Bytecodes::Code bytecode() const { return _bytecode; } |
| 1431 ConversionStub* stub() const { return _stub; } | |
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1432 #ifdef PPC |
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1433 LIR_Opr tmp1() const { return _tmp1; } |
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1434 LIR_Opr tmp2() const { return _tmp2; } |
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1435 #endif |
| 0 | 1436 |
| 1437 virtual void emit_code(LIR_Assembler* masm); | |
| 1438 virtual LIR_OpConvert* as_OpConvert() { return this; } | |
| 1439 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; | |
| 1440 | |
| 1441 static void print_bytecode(outputStream* out, Bytecodes::Code code) PRODUCT_RETURN; | |
| 1442 }; | |
| 1443 | |
| 1444 | |
| 1445 // LIR_OpAllocObj | |
| 1446 class LIR_OpAllocObj : public LIR_Op1 { | |
| 1447 friend class LIR_OpVisitState; | |
| 1448 | |
| 1449 private: | |
| 1450 LIR_Opr _tmp1; | |
| 1451 LIR_Opr _tmp2; | |
| 1452 LIR_Opr _tmp3; | |
| 1453 LIR_Opr _tmp4; | |
| 1454 int _hdr_size; | |
| 1455 int _obj_size; | |
| 1456 CodeStub* _stub; | |
| 1457 bool _init_check; | |
| 1458 | |
| 1459 public: | |
| 1460 LIR_OpAllocObj(LIR_Opr klass, LIR_Opr result, | |
| 1461 LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, | |
| 1462 int hdr_size, int obj_size, bool init_check, CodeStub* stub) | |
| 1463 : LIR_Op1(lir_alloc_object, klass, result) | |
| 1464 , _tmp1(t1) | |
| 1465 , _tmp2(t2) | |
| 1466 , _tmp3(t3) | |
| 1467 , _tmp4(t4) | |
| 1468 , _hdr_size(hdr_size) | |
| 1469 , _obj_size(obj_size) | |
| 1470 , _init_check(init_check) | |
| 1471 , _stub(stub) { } | |
| 1472 | |
| 1473 LIR_Opr klass() const { return in_opr(); } | |
| 1474 LIR_Opr obj() const { return result_opr(); } | |
| 1475 LIR_Opr tmp1() const { return _tmp1; } | |
| 1476 LIR_Opr tmp2() const { return _tmp2; } | |
| 1477 LIR_Opr tmp3() const { return _tmp3; } | |
| 1478 LIR_Opr tmp4() const { return _tmp4; } | |
| 1479 int header_size() const { return _hdr_size; } | |
| 1480 int object_size() const { return _obj_size; } | |
| 1481 bool init_check() const { return _init_check; } | |
| 1482 CodeStub* stub() const { return _stub; } | |
| 1483 | |
| 1484 virtual void emit_code(LIR_Assembler* masm); | |
| 1485 virtual LIR_OpAllocObj * as_OpAllocObj () { return this; } | |
| 1486 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; | |
| 1487 }; | |
| 1488 | |
| 1489 | |
| 1490 // LIR_OpRoundFP | |
| 1491 class LIR_OpRoundFP : public LIR_Op1 { | |
| 1492 friend class LIR_OpVisitState; | |
| 1493 | |
| 1494 private: | |
| 1495 LIR_Opr _tmp; | |
| 1496 | |
| 1497 public: | |
| 1498 LIR_OpRoundFP(LIR_Opr reg, LIR_Opr stack_loc_temp, LIR_Opr result) | |
| 1499 : LIR_Op1(lir_roundfp, reg, result) | |
| 1500 , _tmp(stack_loc_temp) {} | |
| 1501 | |
| 1502 LIR_Opr tmp() const { return _tmp; } | |
| 1503 virtual LIR_OpRoundFP* as_OpRoundFP() { return this; } | |
| 1504 void print_instr(outputStream* out) const PRODUCT_RETURN; | |
| 1505 }; | |
| 1506 | |
| 1507 // LIR_OpTypeCheck | |
| 1508 class LIR_OpTypeCheck: public LIR_Op { | |
| 1509 friend class LIR_OpVisitState; | |
| 1510 | |
| 1511 private: | |
| 1512 LIR_Opr _object; | |
| 1513 LIR_Opr _array; | |
| 1514 ciKlass* _klass; | |
| 1515 LIR_Opr _tmp1; | |
| 1516 LIR_Opr _tmp2; | |
| 1517 LIR_Opr _tmp3; | |
| 1518 bool _fast_check; | |
| 1519 CodeEmitInfo* _info_for_patch; | |
| 1520 CodeEmitInfo* _info_for_exception; | |
| 1521 CodeStub* _stub; | |
| 1522 ciMethod* _profiled_method; | |
| 1523 int _profiled_bci; | |
| 1783 | 1524 bool _should_profile; |
| 0 | 1525 |
| 1526 public: | |
| 1527 LIR_OpTypeCheck(LIR_Code code, LIR_Opr result, LIR_Opr object, ciKlass* klass, | |
| 1528 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check, | |
| 1783 | 1529 CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, CodeStub* stub); |
| 0 | 1530 LIR_OpTypeCheck(LIR_Code code, LIR_Opr object, LIR_Opr array, |
| 1783 | 1531 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, CodeEmitInfo* info_for_exception); |
| 0 | 1532 |
| 1533 LIR_Opr object() const { return _object; } | |
| 1534 LIR_Opr array() const { assert(code() == lir_store_check, "not valid"); return _array; } | |
| 1535 LIR_Opr tmp1() const { return _tmp1; } | |
| 1536 LIR_Opr tmp2() const { return _tmp2; } | |
| 1537 LIR_Opr tmp3() const { return _tmp3; } | |
| 1538 ciKlass* klass() const { assert(code() == lir_instanceof || code() == lir_checkcast, "not valid"); return _klass; } | |
| 1539 bool fast_check() const { assert(code() == lir_instanceof || code() == lir_checkcast, "not valid"); return _fast_check; } | |
| 1540 CodeEmitInfo* info_for_patch() const { return _info_for_patch; } | |
| 1541 CodeEmitInfo* info_for_exception() const { return _info_for_exception; } | |
| 1542 CodeStub* stub() const { return _stub; } | |
| 1543 | |
| 1544 // methodDataOop profiling | |
| 1783 | 1545 void set_profiled_method(ciMethod *method) { _profiled_method = method; } |
| 1546 void set_profiled_bci(int bci) { _profiled_bci = bci; } | |
| 1547 void set_should_profile(bool b) { _should_profile = b; } | |
| 1548 ciMethod* profiled_method() const { return _profiled_method; } | |
| 1549 int profiled_bci() const { return _profiled_bci; } | |
| 1550 bool should_profile() const { return _should_profile; } | |
| 0 | 1551 |
| 1552 virtual void emit_code(LIR_Assembler* masm); | |
| 1553 virtual LIR_OpTypeCheck* as_OpTypeCheck() { return this; } | |
| 1554 void print_instr(outputStream* out) const PRODUCT_RETURN; | |
| 1555 }; | |
| 1556 | |
| 1557 // LIR_Op2 | |
| 1558 class LIR_Op2: public LIR_Op { | |
| 1559 friend class LIR_OpVisitState; | |
| 1560 | |
| 1561 int _fpu_stack_size; // for sin/cos implementation on Intel | |
| 1562 | |
| 1563 protected: | |
| 1564 LIR_Opr _opr1; | |
| 1565 LIR_Opr _opr2; | |
| 1566 BasicType _type; | |
|
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1567 LIR_Opr _tmp1; |
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1568 LIR_Opr _tmp2; |
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1569 LIR_Opr _tmp3; |
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1570 LIR_Opr _tmp4; |
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1571 LIR_Opr _tmp5; |
| 0 | 1572 LIR_Condition _condition; |
| 1573 | |
| 1574 void verify() const; | |
| 1575 | |
| 1576 public: | |
| 1577 LIR_Op2(LIR_Code code, LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, CodeEmitInfo* info = NULL) | |
| 1578 : LIR_Op(code, LIR_OprFact::illegalOpr, info) | |
| 1579 , _opr1(opr1) | |
| 1580 , _opr2(opr2) | |
| 1581 , _type(T_ILLEGAL) | |
| 1582 , _condition(condition) | |
| 1583 , _fpu_stack_size(0) | |
|
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1584 , _tmp1(LIR_OprFact::illegalOpr) |
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1585 , _tmp2(LIR_OprFact::illegalOpr) |
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1586 , _tmp3(LIR_OprFact::illegalOpr) |
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1587 , _tmp4(LIR_OprFact::illegalOpr) |
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1588 , _tmp5(LIR_OprFact::illegalOpr) { |
| 0 | 1589 assert(code == lir_cmp, "code check"); |
| 1590 } | |
| 1591 | |
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1592 LIR_Op2(LIR_Code code, LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result, BasicType type) |
| 0 | 1593 : LIR_Op(code, result, NULL) |
| 1594 , _opr1(opr1) | |
| 1595 , _opr2(opr2) | |
|
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1596 , _type(type) |
| 0 | 1597 , _condition(condition) |
| 1598 , _fpu_stack_size(0) | |
|
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1599 , _tmp1(LIR_OprFact::illegalOpr) |
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1600 , _tmp2(LIR_OprFact::illegalOpr) |
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1601 , _tmp3(LIR_OprFact::illegalOpr) |
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1602 , _tmp4(LIR_OprFact::illegalOpr) |
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1603 , _tmp5(LIR_OprFact::illegalOpr) { |
| 0 | 1604 assert(code == lir_cmove, "code check"); |
|
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1605 assert(type != T_ILLEGAL, "cmove should have type"); |
| 0 | 1606 } |
| 1607 | |
| 1608 LIR_Op2(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result = LIR_OprFact::illegalOpr, | |
| 1609 CodeEmitInfo* info = NULL, BasicType type = T_ILLEGAL) | |
| 1610 : LIR_Op(code, result, info) | |
| 1611 , _opr1(opr1) | |
| 1612 , _opr2(opr2) | |
| 1613 , _type(type) | |
| 1614 , _condition(lir_cond_unknown) | |
| 1615 , _fpu_stack_size(0) | |
|
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1616 , _tmp1(LIR_OprFact::illegalOpr) |
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1617 , _tmp2(LIR_OprFact::illegalOpr) |
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1618 , _tmp3(LIR_OprFact::illegalOpr) |
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1619 , _tmp4(LIR_OprFact::illegalOpr) |
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1620 , _tmp5(LIR_OprFact::illegalOpr) { |
| 0 | 1621 assert(code != lir_cmp && is_in_range(code, begin_op2, end_op2), "code check"); |
| 1622 } | |
| 1623 | |
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1624 LIR_Op2(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result, LIR_Opr tmp1, LIR_Opr tmp2 = LIR_OprFact::illegalOpr, |
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1625 LIR_Opr tmp3 = LIR_OprFact::illegalOpr, LIR_Opr tmp4 = LIR_OprFact::illegalOpr, LIR_Opr tmp5 = LIR_OprFact::illegalOpr) |
| 0 | 1626 : LIR_Op(code, result, NULL) |
| 1627 , _opr1(opr1) | |
| 1628 , _opr2(opr2) | |
| 1629 , _type(T_ILLEGAL) | |
| 1630 , _condition(lir_cond_unknown) | |
| 1631 , _fpu_stack_size(0) | |
|
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1632 , _tmp1(tmp1) |
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1633 , _tmp2(tmp2) |
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1634 , _tmp3(tmp3) |
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1635 , _tmp4(tmp4) |
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1636 , _tmp5(tmp5) { |
| 0 | 1637 assert(code != lir_cmp && is_in_range(code, begin_op2, end_op2), "code check"); |
| 1638 } | |
| 1639 | |
| 1640 LIR_Opr in_opr1() const { return _opr1; } | |
| 1641 LIR_Opr in_opr2() const { return _opr2; } | |
| 1642 BasicType type() const { return _type; } | |
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1643 LIR_Opr tmp1_opr() const { return _tmp1; } |
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1644 LIR_Opr tmp2_opr() const { return _tmp2; } |
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1645 LIR_Opr tmp3_opr() const { return _tmp3; } |
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1646 LIR_Opr tmp4_opr() const { return _tmp4; } |
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1647 LIR_Opr tmp5_opr() const { return _tmp5; } |
| 0 | 1648 LIR_Condition condition() const { |
| 1649 assert(code() == lir_cmp || code() == lir_cmove, "only valid for cmp and cmove"); return _condition; | |
| 1650 } | |
|
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1651 void set_condition(LIR_Condition condition) { |
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1652 assert(code() == lir_cmp || code() == lir_cmove, "only valid for cmp and cmove"); _condition = condition; |
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1653 } |
| 0 | 1654 |
| 1655 void set_fpu_stack_size(int size) { _fpu_stack_size = size; } | |
| 1656 int fpu_stack_size() const { return _fpu_stack_size; } | |
| 1657 | |
| 1658 void set_in_opr1(LIR_Opr opr) { _opr1 = opr; } | |
| 1659 void set_in_opr2(LIR_Opr opr) { _opr2 = opr; } | |
| 1660 | |
| 1661 virtual void emit_code(LIR_Assembler* masm); | |
| 1662 virtual LIR_Op2* as_Op2() { return this; } | |
| 1663 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; | |
| 1664 }; | |
| 1665 | |
| 1666 class LIR_OpAllocArray : public LIR_Op { | |
| 1667 friend class LIR_OpVisitState; | |
| 1668 | |
| 1669 private: | |
| 1670 LIR_Opr _klass; | |
| 1671 LIR_Opr _len; | |
| 1672 LIR_Opr _tmp1; | |
| 1673 LIR_Opr _tmp2; | |
| 1674 LIR_Opr _tmp3; | |
| 1675 LIR_Opr _tmp4; | |
| 1676 BasicType _type; | |
| 1677 CodeStub* _stub; | |
| 1678 | |
| 1679 public: | |
| 1680 LIR_OpAllocArray(LIR_Opr klass, LIR_Opr len, LIR_Opr result, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, BasicType type, CodeStub* stub) | |
| 1681 : LIR_Op(lir_alloc_array, result, NULL) | |
| 1682 , _klass(klass) | |
| 1683 , _len(len) | |
| 1684 , _tmp1(t1) | |
| 1685 , _tmp2(t2) | |
| 1686 , _tmp3(t3) | |
| 1687 , _tmp4(t4) | |
| 1688 , _type(type) | |
| 1689 , _stub(stub) {} | |
| 1690 | |
| 1691 LIR_Opr klass() const { return _klass; } | |
| 1692 LIR_Opr len() const { return _len; } | |
| 1693 LIR_Opr obj() const { return result_opr(); } | |
| 1694 LIR_Opr tmp1() const { return _tmp1; } | |
| 1695 LIR_Opr tmp2() const { return _tmp2; } | |
| 1696 LIR_Opr tmp3() const { return _tmp3; } | |
| 1697 LIR_Opr tmp4() const { return _tmp4; } | |
| 1698 BasicType type() const { return _type; } | |
| 1699 CodeStub* stub() const { return _stub; } | |
| 1700 | |
| 1701 virtual void emit_code(LIR_Assembler* masm); | |
| 1702 virtual LIR_OpAllocArray * as_OpAllocArray () { return this; } | |
| 1703 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; | |
| 1704 }; | |
| 1705 | |
| 1706 | |
| 1707 class LIR_Op3: public LIR_Op { | |
| 1708 friend class LIR_OpVisitState; | |
| 1709 | |
| 1710 private: | |
| 1711 LIR_Opr _opr1; | |
| 1712 LIR_Opr _opr2; | |
| 1713 LIR_Opr _opr3; | |
| 1714 public: | |
| 1715 LIR_Op3(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr opr3, LIR_Opr result, CodeEmitInfo* info = NULL) | |
| 1716 : LIR_Op(code, result, info) | |
| 1717 , _opr1(opr1) | |
| 1718 , _opr2(opr2) | |
| 1719 , _opr3(opr3) { assert(is_in_range(code, begin_op3, end_op3), "code check"); } | |
| 1720 LIR_Opr in_opr1() const { return _opr1; } | |
| 1721 LIR_Opr in_opr2() const { return _opr2; } | |
| 1722 LIR_Opr in_opr3() const { return _opr3; } | |
| 1723 | |
| 1724 virtual void emit_code(LIR_Assembler* masm); | |
| 1725 virtual LIR_Op3* as_Op3() { return this; } | |
| 1726 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; | |
| 1727 }; | |
| 1728 | |
| 1729 | |
| 1730 //-------------------------------- | |
| 1731 class LabelObj: public CompilationResourceObj { | |
| 1732 private: | |
| 1733 Label _label; | |
| 1734 public: | |
| 1735 LabelObj() {} | |
| 1736 Label* label() { return &_label; } | |
| 1737 }; | |
| 1738 | |
| 1739 | |
| 1740 class LIR_OpLock: public LIR_Op { | |
| 1741 friend class LIR_OpVisitState; | |
| 1742 | |
| 1743 private: | |
| 1744 LIR_Opr _hdr; | |
| 1745 LIR_Opr _obj; | |
| 1746 LIR_Opr _lock; | |
| 1747 LIR_Opr _scratch; | |
| 1748 CodeStub* _stub; | |
| 1749 public: | |
| 1750 LIR_OpLock(LIR_Code code, LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub, CodeEmitInfo* info) | |
| 1751 : LIR_Op(code, LIR_OprFact::illegalOpr, info) | |
| 1752 , _hdr(hdr) | |
| 1753 , _obj(obj) | |
| 1754 , _lock(lock) | |
| 1755 , _scratch(scratch) | |
| 1756 , _stub(stub) {} | |
| 1757 | |
| 1758 LIR_Opr hdr_opr() const { return _hdr; } | |
| 1759 LIR_Opr obj_opr() const { return _obj; } | |
| 1760 LIR_Opr lock_opr() const { return _lock; } | |
| 1761 LIR_Opr scratch_opr() const { return _scratch; } | |
| 1762 CodeStub* stub() const { return _stub; } | |
| 1763 | |
| 1764 virtual void emit_code(LIR_Assembler* masm); | |
| 1765 virtual LIR_OpLock* as_OpLock() { return this; } | |
| 1766 void print_instr(outputStream* out) const PRODUCT_RETURN; | |
| 1767 }; | |
| 1768 | |
| 1769 | |
| 1770 class LIR_OpDelay: public LIR_Op { | |
| 1771 friend class LIR_OpVisitState; | |
| 1772 | |
| 1773 private: | |
| 1774 LIR_Op* _op; | |
| 1775 | |
| 1776 public: | |
| 1777 LIR_OpDelay(LIR_Op* op, CodeEmitInfo* info): | |
| 1778 LIR_Op(lir_delay_slot, LIR_OprFact::illegalOpr, info), | |
| 1779 _op(op) { | |
| 1780 assert(op->code() == lir_nop || LIRFillDelaySlots, "should be filling with nops"); | |
| 1781 } | |
| 1782 virtual void emit_code(LIR_Assembler* masm); | |
| 1783 virtual LIR_OpDelay* as_OpDelay() { return this; } | |
| 1784 void print_instr(outputStream* out) const PRODUCT_RETURN; | |
| 1785 LIR_Op* delay_op() const { return _op; } | |
| 1786 CodeEmitInfo* call_info() const { return info(); } | |
| 1787 }; | |
| 1788 | |
| 1789 | |
| 1790 // LIR_OpCompareAndSwap | |
| 1791 class LIR_OpCompareAndSwap : public LIR_Op { | |
| 1792 friend class LIR_OpVisitState; | |
| 1793 | |
| 1794 private: | |
| 1795 LIR_Opr _addr; | |
| 1796 LIR_Opr _cmp_value; | |
| 1797 LIR_Opr _new_value; | |
| 1798 LIR_Opr _tmp1; | |
| 1799 LIR_Opr _tmp2; | |
| 1800 | |
| 1801 public: | |
|
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1802 LIR_OpCompareAndSwap(LIR_Code code, LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, |
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1803 LIR_Opr t1, LIR_Opr t2, LIR_Opr result) |
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1804 : LIR_Op(code, result, NULL) // no result, no info |
| 0 | 1805 , _addr(addr) |
| 1806 , _cmp_value(cmp_value) | |
| 1807 , _new_value(new_value) | |
| 1808 , _tmp1(t1) | |
| 1809 , _tmp2(t2) { } | |
| 1810 | |
| 1811 LIR_Opr addr() const { return _addr; } | |
| 1812 LIR_Opr cmp_value() const { return _cmp_value; } | |
| 1813 LIR_Opr new_value() const { return _new_value; } | |
| 1814 LIR_Opr tmp1() const { return _tmp1; } | |
| 1815 LIR_Opr tmp2() const { return _tmp2; } | |
| 1816 | |
| 1817 virtual void emit_code(LIR_Assembler* masm); | |
| 1818 virtual LIR_OpCompareAndSwap * as_OpCompareAndSwap () { return this; } | |
| 1819 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; | |
| 1820 }; | |
| 1821 | |
| 1822 // LIR_OpProfileCall | |
| 1823 class LIR_OpProfileCall : public LIR_Op { | |
| 1824 friend class LIR_OpVisitState; | |
| 1825 | |
| 1826 private: | |
| 1827 ciMethod* _profiled_method; | |
|
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1828 int _profiled_bci; |
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1829 ciMethod* _profiled_callee; |
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1830 LIR_Opr _mdo; |
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1831 LIR_Opr _recv; |
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1832 LIR_Opr _tmp1; |
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1833 ciKlass* _known_holder; |
| 0 | 1834 |
| 1835 public: | |
| 1836 // Destroys recv | |
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1837 LIR_OpProfileCall(LIR_Code code, ciMethod* profiled_method, int profiled_bci, ciMethod* profiled_callee, LIR_Opr mdo, LIR_Opr recv, LIR_Opr t1, ciKlass* known_holder) |
| 0 | 1838 : LIR_Op(code, LIR_OprFact::illegalOpr, NULL) // no result, no info |
| 1839 , _profiled_method(profiled_method) | |
| 1840 , _profiled_bci(profiled_bci) | |
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1841 , _profiled_callee(profiled_callee) |
| 0 | 1842 , _mdo(mdo) |
| 1843 , _recv(recv) | |
| 1844 , _tmp1(t1) | |
| 1845 , _known_holder(known_holder) { } | |
| 1846 | |
| 1847 ciMethod* profiled_method() const { return _profiled_method; } | |
| 1848 int profiled_bci() const { return _profiled_bci; } | |
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1849 ciMethod* profiled_callee() const { return _profiled_callee; } |
| 0 | 1850 LIR_Opr mdo() const { return _mdo; } |
| 1851 LIR_Opr recv() const { return _recv; } | |
| 1852 LIR_Opr tmp1() const { return _tmp1; } | |
| 1853 ciKlass* known_holder() const { return _known_holder; } | |
| 1854 | |
| 1855 virtual void emit_code(LIR_Assembler* masm); | |
| 1856 virtual LIR_OpProfileCall* as_OpProfileCall() { return this; } | |
| 1857 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; | |
| 1858 }; | |
| 1859 | |
| 1860 class LIR_InsertionBuffer; | |
| 1861 | |
| 1862 //--------------------------------LIR_List--------------------------------------------------- | |
| 1863 // Maintains a list of LIR instructions (one instance of LIR_List per basic block) | |
| 1864 // The LIR instructions are appended by the LIR_List class itself; | |
| 1865 // | |
| 1866 // Notes: | |
| 1867 // - all offsets are(should be) in bytes | |
| 1868 // - local positions are specified with an offset, with offset 0 being local 0 | |
| 1869 | |
| 1870 class LIR_List: public CompilationResourceObj { | |
| 1871 private: | |
| 1872 LIR_OpList _operations; | |
| 1873 | |
| 1874 Compilation* _compilation; | |
| 1875 #ifndef PRODUCT | |
| 1876 BlockBegin* _block; | |
| 1877 #endif | |
| 1878 #ifdef ASSERT | |
| 1879 const char * _file; | |
| 1880 int _line; | |
| 1881 #endif | |
| 1882 | |
| 1883 void append(LIR_Op* op) { | |
| 1884 if (op->source() == NULL) | |
| 1885 op->set_source(_compilation->current_instruction()); | |
| 1886 #ifndef PRODUCT | |
| 1887 if (PrintIRWithLIR) { | |
| 1888 _compilation->maybe_print_current_instruction(); | |
| 1889 op->print(); tty->cr(); | |
| 1890 } | |
| 1891 #endif // PRODUCT | |
| 1892 | |
| 1893 _operations.append(op); | |
| 1894 | |
| 1895 #ifdef ASSERT | |
| 1896 op->verify(); | |
| 1897 op->set_file_and_line(_file, _line); | |
| 1898 _file = NULL; | |
| 1899 _line = 0; | |
| 1900 #endif | |
| 1901 } | |
| 1902 | |
| 1903 public: | |
| 1904 LIR_List(Compilation* compilation, BlockBegin* block = NULL); | |
| 1905 | |
| 1906 #ifdef ASSERT | |
| 1907 void set_file_and_line(const char * file, int line); | |
| 1908 #endif | |
| 1909 | |
| 1910 //---------- accessors --------------- | |
| 1911 LIR_OpList* instructions_list() { return &_operations; } | |
| 1912 int length() const { return _operations.length(); } | |
| 1913 LIR_Op* at(int i) const { return _operations.at(i); } | |
| 1914 | |
| 1915 NOT_PRODUCT(BlockBegin* block() const { return _block; }); | |
| 1916 | |
| 1917 // insert LIR_Ops in buffer to right places in LIR_List | |
| 1918 void append(LIR_InsertionBuffer* buffer); | |
| 1919 | |
| 1920 //---------- mutators --------------- | |
| 1921 void insert_before(int i, LIR_List* op_list) { _operations.insert_before(i, op_list->instructions_list()); } | |
| 1922 void insert_before(int i, LIR_Op* op) { _operations.insert_before(i, op); } | |
| 1783 | 1923 void remove_at(int i) { _operations.remove_at(i); } |
| 0 | 1924 |
| 1925 //---------- printing ------------- | |
| 1926 void print_instructions() PRODUCT_RETURN; | |
| 1927 | |
| 1928 | |
| 1929 //---------- instructions ------------- | |
| 1930 void call_opt_virtual(ciMethod* method, LIR_Opr receiver, LIR_Opr result, | |
| 1931 address dest, LIR_OprList* arguments, | |
| 1932 CodeEmitInfo* info) { | |
| 1933 append(new LIR_OpJavaCall(lir_optvirtual_call, method, receiver, result, dest, arguments, info)); | |
| 1934 } | |
| 1935 void call_static(ciMethod* method, LIR_Opr result, | |
| 1936 address dest, LIR_OprList* arguments, CodeEmitInfo* info) { | |
| 1937 append(new LIR_OpJavaCall(lir_static_call, method, LIR_OprFact::illegalOpr, result, dest, arguments, info)); | |
| 1938 } | |
| 1939 void call_icvirtual(ciMethod* method, LIR_Opr receiver, LIR_Opr result, | |
| 1940 address dest, LIR_OprList* arguments, CodeEmitInfo* info) { | |
| 1941 append(new LIR_OpJavaCall(lir_icvirtual_call, method, receiver, result, dest, arguments, info)); | |
| 1942 } | |
| 1943 void call_virtual(ciMethod* method, LIR_Opr receiver, LIR_Opr result, | |
| 1944 intptr_t vtable_offset, LIR_OprList* arguments, CodeEmitInfo* info) { | |
| 1945 append(new LIR_OpJavaCall(lir_virtual_call, method, receiver, result, vtable_offset, arguments, info)); | |
| 1946 } | |
| 1295 | 1947 void call_dynamic(ciMethod* method, LIR_Opr receiver, LIR_Opr result, |
| 1948 address dest, LIR_OprList* arguments, CodeEmitInfo* info) { | |
| 1949 append(new LIR_OpJavaCall(lir_dynamic_call, method, receiver, result, dest, arguments, info)); | |
| 1950 } | |
| 0 | 1951 |
| 1952 void get_thread(LIR_Opr result) { append(new LIR_Op0(lir_get_thread, result)); } | |
| 1953 void word_align() { append(new LIR_Op0(lir_word_align)); } | |
| 1954 void membar() { append(new LIR_Op0(lir_membar)); } | |
| 1955 void membar_acquire() { append(new LIR_Op0(lir_membar_acquire)); } | |
| 1956 void membar_release() { append(new LIR_Op0(lir_membar_release)); } | |
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1957 void membar_loadload() { append(new LIR_Op0(lir_membar_loadload)); } |
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1958 void membar_storestore() { append(new LIR_Op0(lir_membar_storestore)); } |
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1959 void membar_loadstore() { append(new LIR_Op0(lir_membar_loadstore)); } |
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1960 void membar_storeload() { append(new LIR_Op0(lir_membar_storeload)); } |
| 0 | 1961 |
| 1962 void nop() { append(new LIR_Op0(lir_nop)); } | |
| 1963 void build_frame() { append(new LIR_Op0(lir_build_frame)); } | |
| 1964 | |
| 1965 void std_entry(LIR_Opr receiver) { append(new LIR_Op0(lir_std_entry, receiver)); } | |
| 1966 void osr_entry(LIR_Opr osrPointer) { append(new LIR_Op0(lir_osr_entry, osrPointer)); } | |
| 1967 | |
| 1968 void branch_destination(Label* lbl) { append(new LIR_OpLabel(lbl)); } | |
| 1969 | |
| 1970 void negate(LIR_Opr from, LIR_Opr to) { append(new LIR_Op1(lir_neg, from, to)); } | |
| 1971 void leal(LIR_Opr from, LIR_Opr result_reg) { append(new LIR_Op1(lir_leal, from, result_reg)); } | |
| 1972 | |
| 1973 // result is a stack location for old backend and vreg for UseLinearScan | |
| 1974 // stack_loc_temp is an illegal register for old backend | |
| 1975 void roundfp(LIR_Opr reg, LIR_Opr stack_loc_temp, LIR_Opr result) { append(new LIR_OpRoundFP(reg, stack_loc_temp, result)); } | |
| 1976 void unaligned_move(LIR_Address* src, LIR_Opr dst) { append(new LIR_Op1(lir_move, LIR_OprFact::address(src), dst, dst->type(), lir_patch_none, NULL, lir_move_unaligned)); } | |
| 1977 void unaligned_move(LIR_Opr src, LIR_Address* dst) { append(new LIR_Op1(lir_move, src, LIR_OprFact::address(dst), src->type(), lir_patch_none, NULL, lir_move_unaligned)); } | |
| 1978 void unaligned_move(LIR_Opr src, LIR_Opr dst) { append(new LIR_Op1(lir_move, src, dst, dst->type(), lir_patch_none, NULL, lir_move_unaligned)); } | |
| 1979 void move(LIR_Opr src, LIR_Opr dst, CodeEmitInfo* info = NULL) { append(new LIR_Op1(lir_move, src, dst, dst->type(), lir_patch_none, info)); } | |
| 1980 void move(LIR_Address* src, LIR_Opr dst, CodeEmitInfo* info = NULL) { append(new LIR_Op1(lir_move, LIR_OprFact::address(src), dst, src->type(), lir_patch_none, info)); } | |
| 1981 void move(LIR_Opr src, LIR_Address* dst, CodeEmitInfo* info = NULL) { append(new LIR_Op1(lir_move, src, LIR_OprFact::address(dst), dst->type(), lir_patch_none, info)); } | |
| 2002 | 1982 void move_wide(LIR_Address* src, LIR_Opr dst, CodeEmitInfo* info = NULL) { |
| 1983 if (UseCompressedOops) { | |
| 1984 append(new LIR_Op1(lir_move, LIR_OprFact::address(src), dst, src->type(), lir_patch_none, info, lir_move_wide)); | |
| 1985 } else { | |
| 1986 move(src, dst, info); | |
| 1987 } | |
| 1988 } | |
| 1989 void move_wide(LIR_Opr src, LIR_Address* dst, CodeEmitInfo* info = NULL) { | |
| 1990 if (UseCompressedOops) { | |
| 1991 append(new LIR_Op1(lir_move, src, LIR_OprFact::address(dst), dst->type(), lir_patch_none, info, lir_move_wide)); | |
| 1992 } else { | |
| 1993 move(src, dst, info); | |
| 1994 } | |
| 1995 } | |
| 0 | 1996 void volatile_move(LIR_Opr src, LIR_Opr dst, BasicType type, CodeEmitInfo* info = NULL, LIR_PatchCode patch_code = lir_patch_none) { append(new LIR_Op1(lir_move, src, dst, type, patch_code, info, lir_move_volatile)); } |
| 1997 | |
| 1998 void oop2reg (jobject o, LIR_Opr reg) { append(new LIR_Op1(lir_move, LIR_OprFact::oopConst(o), reg)); } | |
| 1999 void oop2reg_patch(jobject o, LIR_Opr reg, CodeEmitInfo* info); | |
| 2000 | |
| 2001 void return_op(LIR_Opr result) { append(new LIR_Op1(lir_return, result)); } | |
| 2002 | |
| 2003 void safepoint(LIR_Opr tmp, CodeEmitInfo* info) { append(new LIR_Op1(lir_safepoint, tmp, info)); } | |
| 2004 | |
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2005 #ifdef PPC |
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2006 void convert(Bytecodes::Code code, LIR_Opr left, LIR_Opr dst, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_OpConvert(code, left, dst, NULL, tmp1, tmp2)); } |
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2007 #endif |
| 0 | 2008 void convert(Bytecodes::Code code, LIR_Opr left, LIR_Opr dst, ConversionStub* stub = NULL/*, bool is_32bit = false*/) { append(new LIR_OpConvert(code, left, dst, stub)); } |
| 2009 | |
| 2010 void logical_and (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_and, left, right, dst)); } | |
| 2011 void logical_or (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_or, left, right, dst)); } | |
| 2012 void logical_xor (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_xor, left, right, dst)); } | |
| 2013 | |
| 1783 | 2014 void pack64(LIR_Opr src, LIR_Opr dst) { append(new LIR_Op1(lir_pack64, src, dst, T_LONG, lir_patch_none, NULL)); } |
| 2015 void unpack64(LIR_Opr src, LIR_Opr dst) { append(new LIR_Op1(lir_unpack64, src, dst, T_LONG, lir_patch_none, NULL)); } | |
| 2016 | |
| 0 | 2017 void null_check(LIR_Opr opr, CodeEmitInfo* info) { append(new LIR_Op1(lir_null_check, opr, info)); } |
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2018 void throw_exception(LIR_Opr exceptionPC, LIR_Opr exceptionOop, CodeEmitInfo* info) { |
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2019 append(new LIR_Op2(lir_throw, exceptionPC, exceptionOop, LIR_OprFact::illegalOpr, info)); |
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2020 } |
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2021 void unwind_exception(LIR_Opr exceptionOop) { |
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2022 append(new LIR_Op1(lir_unwind, exceptionOop)); |
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2023 } |
| 0 | 2024 |
| 2025 void compare_to (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { | |
| 2026 append(new LIR_Op2(lir_compare_to, left, right, dst)); | |
| 2027 } | |
| 2028 | |
| 2029 void push(LIR_Opr opr) { append(new LIR_Op1(lir_push, opr)); } | |
| 2030 void pop(LIR_Opr reg) { append(new LIR_Op1(lir_pop, reg)); } | |
| 2031 | |
| 2032 void cmp(LIR_Condition condition, LIR_Opr left, LIR_Opr right, CodeEmitInfo* info = NULL) { | |
| 2033 append(new LIR_Op2(lir_cmp, condition, left, right, info)); | |
| 2034 } | |
| 2035 void cmp(LIR_Condition condition, LIR_Opr left, int right, CodeEmitInfo* info = NULL) { | |
| 2036 cmp(condition, left, LIR_OprFact::intConst(right), info); | |
| 2037 } | |
| 2038 | |
| 2039 void cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info); | |
| 2040 void cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Address* addr, CodeEmitInfo* info); | |
| 2041 | |
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2042 void cmove(LIR_Condition condition, LIR_Opr src1, LIR_Opr src2, LIR_Opr dst, BasicType type) { |
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2043 append(new LIR_Op2(lir_cmove, condition, src1, src2, dst, type)); |
| 0 | 2044 } |
| 2045 | |
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2046 void cas_long(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, |
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2047 LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr); |
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2048 void cas_obj(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, |
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2049 LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr); |
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2050 void cas_int(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, |
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2051 LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr); |
| 0 | 2052 |
| 2053 void abs (LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_abs , from, tmp, to)); } | |
| 2054 void sqrt(LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_sqrt, from, tmp, to)); } | |
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2055 void log (LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_log, from, LIR_OprFact::illegalOpr, to, tmp)); } |
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2056 void log10 (LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_log10, from, LIR_OprFact::illegalOpr, to, tmp)); } |
| 0 | 2057 void sin (LIR_Opr from, LIR_Opr to, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_Op2(lir_sin , from, tmp1, to, tmp2)); } |
| 2058 void cos (LIR_Opr from, LIR_Opr to, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_Op2(lir_cos , from, tmp1, to, tmp2)); } | |
| 2059 void tan (LIR_Opr from, LIR_Opr to, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_Op2(lir_tan , from, tmp1, to, tmp2)); } | |
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2060 void exp (LIR_Opr from, LIR_Opr to, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, LIR_Opr tmp4, LIR_Opr tmp5) { append(new LIR_Op2(lir_exp , from, tmp1, to, tmp2, tmp3, tmp4, tmp5)); } |
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2061 void pow (LIR_Opr arg1, LIR_Opr arg2, LIR_Opr res, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, LIR_Opr tmp4, LIR_Opr tmp5) { append(new LIR_Op2(lir_pow, arg1, arg2, res, tmp1, tmp2, tmp3, tmp4, tmp5)); } |
| 0 | 2062 |
| 2063 void add (LIR_Opr left, LIR_Opr right, LIR_Opr res) { append(new LIR_Op2(lir_add, left, right, res)); } | |
| 2064 void sub (LIR_Opr left, LIR_Opr right, LIR_Opr res, CodeEmitInfo* info = NULL) { append(new LIR_Op2(lir_sub, left, right, res, info)); } | |
| 2065 void mul (LIR_Opr left, LIR_Opr right, LIR_Opr res) { append(new LIR_Op2(lir_mul, left, right, res)); } | |
| 2066 void mul_strictfp (LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp) { append(new LIR_Op2(lir_mul_strictfp, left, right, res, tmp)); } | |
| 2067 void div (LIR_Opr left, LIR_Opr right, LIR_Opr res, CodeEmitInfo* info = NULL) { append(new LIR_Op2(lir_div, left, right, res, info)); } | |
| 2068 void div_strictfp (LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp) { append(new LIR_Op2(lir_div_strictfp, left, right, res, tmp)); } | |
| 2069 void rem (LIR_Opr left, LIR_Opr right, LIR_Opr res, CodeEmitInfo* info = NULL) { append(new LIR_Op2(lir_rem, left, right, res, info)); } | |
| 2070 | |
| 2071 void volatile_load_mem_reg(LIR_Address* address, LIR_Opr dst, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none); | |
| 2072 void volatile_load_unsafe_reg(LIR_Opr base, LIR_Opr offset, LIR_Opr dst, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code); | |
| 2073 | |
| 2074 void load(LIR_Address* addr, LIR_Opr src, CodeEmitInfo* info = NULL, LIR_PatchCode patch_code = lir_patch_none); | |
| 2075 | |
| 2076 void prefetch(LIR_Address* addr, bool is_store); | |
| 2077 | |
| 2078 void store_mem_int(jint v, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none); | |
| 2079 void store_mem_oop(jobject o, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none); | |
| 2080 void store(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info = NULL, LIR_PatchCode patch_code = lir_patch_none); | |
| 2081 void volatile_store_mem_reg(LIR_Opr src, LIR_Address* address, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none); | |
| 2082 void volatile_store_unsafe_reg(LIR_Opr src, LIR_Opr base, LIR_Opr offset, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code); | |
| 2083 | |
| 2084 void idiv(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info); | |
| 2085 void idiv(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info); | |
| 2086 void irem(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info); | |
| 2087 void irem(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info); | |
| 2088 | |
| 2089 void allocate_object(LIR_Opr dst, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, int header_size, int object_size, LIR_Opr klass, bool init_check, CodeStub* stub); | |
| 2090 void allocate_array(LIR_Opr dst, LIR_Opr len, LIR_Opr t1,LIR_Opr t2, LIR_Opr t3,LIR_Opr t4, BasicType type, LIR_Opr klass, CodeStub* stub); | |
| 2091 | |
| 2092 // jump is an unconditional branch | |
| 2093 void jump(BlockBegin* block) { | |
| 2094 append(new LIR_OpBranch(lir_cond_always, T_ILLEGAL, block)); | |
| 2095 } | |
| 2096 void jump(CodeStub* stub) { | |
| 2097 append(new LIR_OpBranch(lir_cond_always, T_ILLEGAL, stub)); | |
| 2098 } | |
| 4816 | 2099 void branch(LIR_Condition cond, BasicType type, Label* lbl) { append(new LIR_OpBranch(cond, type, lbl)); } |
| 0 | 2100 void branch(LIR_Condition cond, BasicType type, BlockBegin* block) { |
| 2101 assert(type != T_FLOAT && type != T_DOUBLE, "no fp comparisons"); | |
| 2102 append(new LIR_OpBranch(cond, type, block)); | |
| 2103 } | |
| 2104 void branch(LIR_Condition cond, BasicType type, CodeStub* stub) { | |
| 2105 assert(type != T_FLOAT && type != T_DOUBLE, "no fp comparisons"); | |
| 2106 append(new LIR_OpBranch(cond, type, stub)); | |
| 2107 } | |
| 2108 void branch(LIR_Condition cond, BasicType type, BlockBegin* block, BlockBegin* unordered) { | |
| 2109 assert(type == T_FLOAT || type == T_DOUBLE, "fp comparisons only"); | |
| 2110 append(new LIR_OpBranch(cond, type, block, unordered)); | |
| 2111 } | |
| 2112 | |
| 2113 void shift_left(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp); | |
| 2114 void shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp); | |
| 2115 void unsigned_shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp); | |
| 2116 | |
| 2117 void shift_left(LIR_Opr value, int count, LIR_Opr dst) { shift_left(value, LIR_OprFact::intConst(count), dst, LIR_OprFact::illegalOpr); } | |
| 2118 void shift_right(LIR_Opr value, int count, LIR_Opr dst) { shift_right(value, LIR_OprFact::intConst(count), dst, LIR_OprFact::illegalOpr); } | |
| 2119 void unsigned_shift_right(LIR_Opr value, int count, LIR_Opr dst) { unsigned_shift_right(value, LIR_OprFact::intConst(count), dst, LIR_OprFact::illegalOpr); } | |
| 2120 | |
| 2121 void lcmp2int(LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_cmp_l2i, left, right, dst)); } | |
| 2122 void fcmp2int(LIR_Opr left, LIR_Opr right, LIR_Opr dst, bool is_unordered_less); | |
| 2123 | |
| 2124 void call_runtime_leaf(address routine, LIR_Opr tmp, LIR_Opr result, LIR_OprList* arguments) { | |
| 2125 append(new LIR_OpRTCall(routine, tmp, result, arguments)); | |
| 2126 } | |
| 2127 | |
| 2128 void call_runtime(address routine, LIR_Opr tmp, LIR_Opr result, | |
| 2129 LIR_OprList* arguments, CodeEmitInfo* info) { | |
| 2130 append(new LIR_OpRTCall(routine, tmp, result, arguments, info)); | |
| 2131 } | |
| 2132 | |
| 2133 void load_stack_address_monitor(int monitor_ix, LIR_Opr dst) { append(new LIR_Op1(lir_monaddr, LIR_OprFact::intConst(monitor_ix), dst)); } | |
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2134 void unlock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub); |
| 0 | 2135 void lock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub, CodeEmitInfo* info); |
| 2136 | |
| 2137 void set_24bit_fpu() { append(new LIR_Op0(lir_24bit_FPU )); } | |
| 2138 void restore_fpu() { append(new LIR_Op0(lir_reset_FPU )); } | |
| 2139 void breakpoint() { append(new LIR_Op0(lir_breakpoint)); } | |
| 2140 | |
| 2141 void arraycopy(LIR_Opr src, LIR_Opr src_pos, LIR_Opr dst, LIR_Opr dst_pos, LIR_Opr length, LIR_Opr tmp, ciArrayKlass* expected_type, int flags, CodeEmitInfo* info) { append(new LIR_OpArrayCopy(src, src_pos, dst, dst_pos, length, tmp, expected_type, flags, info)); } | |
| 2142 | |
| 2143 void fpop_raw() { append(new LIR_Op0(lir_fpop_raw)); } | |
| 2144 | |
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2145 void instanceof(LIR_Opr result, LIR_Opr object, ciKlass* klass, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check, CodeEmitInfo* info_for_patch, ciMethod* profiled_method, int profiled_bci); |
| 3957 | 2146 void store_check(LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, CodeEmitInfo* info_for_exception, ciMethod* profiled_method, int profiled_bci); |
| 1783 | 2147 |
| 0 | 2148 void checkcast (LIR_Opr result, LIR_Opr object, ciKlass* klass, |
| 2149 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check, | |
| 2150 CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, CodeStub* stub, | |
| 2151 ciMethod* profiled_method, int profiled_bci); | |
| 2152 // methodDataOop profiling | |
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2153 void profile_call(ciMethod* method, int bci, ciMethod* callee, LIR_Opr mdo, LIR_Opr recv, LIR_Opr t1, ciKlass* cha_klass) { |
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2154 append(new LIR_OpProfileCall(lir_profile_call, method, bci, callee, mdo, recv, t1, cha_klass)); |
| 1783 | 2155 } |
| 0 | 2156 }; |
| 2157 | |
| 2158 void print_LIR(BlockList* blocks); | |
| 2159 | |
| 2160 class LIR_InsertionBuffer : public CompilationResourceObj { | |
| 2161 private: | |
| 2162 LIR_List* _lir; // the lir list where ops of this buffer should be inserted later (NULL when uninitialized) | |
| 2163 | |
| 2164 // list of insertion points. index and count are stored alternately: | |
| 2165 // _index_and_count[i * 2]: the index into lir list where "count" ops should be inserted | |
| 2166 // _index_and_count[i * 2 + 1]: the number of ops to be inserted at index | |
| 2167 intStack _index_and_count; | |
| 2168 | |
| 2169 // the LIR_Ops to be inserted | |
| 2170 LIR_OpList _ops; | |
| 2171 | |
| 2172 void append_new(int index, int count) { _index_and_count.append(index); _index_and_count.append(count); } | |
| 2173 void set_index_at(int i, int value) { _index_and_count.at_put((i << 1), value); } | |
| 2174 void set_count_at(int i, int value) { _index_and_count.at_put((i << 1) + 1, value); } | |
| 2175 | |
| 2176 #ifdef ASSERT | |
| 2177 void verify(); | |
| 2178 #endif | |
| 2179 public: | |
| 2180 LIR_InsertionBuffer() : _lir(NULL), _index_and_count(8), _ops(8) { } | |
| 2181 | |
| 2182 // must be called before using the insertion buffer | |
| 2183 void init(LIR_List* lir) { assert(!initialized(), "already initialized"); _lir = lir; _index_and_count.clear(); _ops.clear(); } | |
| 2184 bool initialized() const { return _lir != NULL; } | |
| 2185 // called automatically when the buffer is appended to the LIR_List | |
| 2186 void finish() { _lir = NULL; } | |
| 2187 | |
| 2188 // accessors | |
| 2189 LIR_List* lir_list() const { return _lir; } | |
| 2190 int number_of_insertion_points() const { return _index_and_count.length() >> 1; } | |
| 2191 int index_at(int i) const { return _index_and_count.at((i << 1)); } | |
| 2192 int count_at(int i) const { return _index_and_count.at((i << 1) + 1); } | |
| 2193 | |
| 2194 int number_of_ops() const { return _ops.length(); } | |
| 2195 LIR_Op* op_at(int i) const { return _ops.at(i); } | |
| 2196 | |
| 2197 // append an instruction to the buffer | |
| 2198 void append(int index, LIR_Op* op); | |
| 2199 | |
| 2200 // instruction | |
| 2201 void move(int index, LIR_Opr src, LIR_Opr dst, CodeEmitInfo* info = NULL) { append(index, new LIR_Op1(lir_move, src, dst, dst->type(), lir_patch_none, info)); } | |
| 2202 }; | |
| 2203 | |
| 2204 | |
| 2205 // | |
| 2206 // LIR_OpVisitState is used for manipulating LIR_Ops in an abstract way. | |
| 2207 // Calling a LIR_Op's visit function with a LIR_OpVisitState causes | |
| 2208 // information about the input, output and temporaries used by the | |
| 2209 // op to be recorded. It also records whether the op has call semantics | |
| 2210 // and also records all the CodeEmitInfos used by this op. | |
| 2211 // | |
| 2212 | |
| 2213 | |
| 2214 class LIR_OpVisitState: public StackObj { | |
| 2215 public: | |
| 2216 typedef enum { inputMode, firstMode = inputMode, tempMode, outputMode, numModes, invalidMode = -1 } OprMode; | |
| 2217 | |
| 2218 enum { | |
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2219 maxNumberOfOperands = 16, |
| 0 | 2220 maxNumberOfInfos = 4 |
| 2221 }; | |
| 2222 | |
| 2223 private: | |
| 2224 LIR_Op* _op; | |
| 2225 | |
| 2226 // optimization: the operands and infos are not stored in a variable-length | |
| 2227 // list, but in a fixed-size array to save time of size checks and resizing | |
| 2228 int _oprs_len[numModes]; | |
| 2229 LIR_Opr* _oprs_new[numModes][maxNumberOfOperands]; | |
| 2230 int _info_len; | |
| 2231 CodeEmitInfo* _info_new[maxNumberOfInfos]; | |
| 2232 | |
| 2233 bool _has_call; | |
| 2234 bool _has_slow_case; | |
| 2235 | |
| 2236 | |
| 2237 // only include register operands | |
| 2238 // addresses are decomposed to the base and index registers | |
| 2239 // constants and stack operands are ignored | |
| 2240 void append(LIR_Opr& opr, OprMode mode) { | |
| 2241 assert(opr->is_valid(), "should not call this otherwise"); | |
| 2242 assert(mode >= 0 && mode < numModes, "bad mode"); | |
| 2243 | |
| 2244 if (opr->is_register()) { | |
| 2245 assert(_oprs_len[mode] < maxNumberOfOperands, "array overflow"); | |
| 2246 _oprs_new[mode][_oprs_len[mode]++] = &opr; | |
| 2247 | |
| 2248 } else if (opr->is_pointer()) { | |
| 2249 LIR_Address* address = opr->as_address_ptr(); | |
| 2250 if (address != NULL) { | |
| 2251 // special handling for addresses: add base and index register of the address | |
| 2252 // both are always input operands! | |
| 2253 if (address->_base->is_valid()) { | |
| 2254 assert(address->_base->is_register(), "must be"); | |
| 2255 assert(_oprs_len[inputMode] < maxNumberOfOperands, "array overflow"); | |
| 2256 _oprs_new[inputMode][_oprs_len[inputMode]++] = &address->_base; | |
| 2257 } | |
| 2258 if (address->_index->is_valid()) { | |
| 2259 assert(address->_index->is_register(), "must be"); | |
| 2260 assert(_oprs_len[inputMode] < maxNumberOfOperands, "array overflow"); | |
| 2261 _oprs_new[inputMode][_oprs_len[inputMode]++] = &address->_index; | |
| 2262 } | |
| 2263 | |
| 2264 } else { | |
| 2265 assert(opr->is_constant(), "constant operands are not processed"); | |
| 2266 } | |
| 2267 } else { | |
| 2268 assert(opr->is_stack(), "stack operands are not processed"); | |
| 2269 } | |
| 2270 } | |
| 2271 | |
| 2272 void append(CodeEmitInfo* info) { | |
| 2273 assert(info != NULL, "should not call this otherwise"); | |
| 2274 assert(_info_len < maxNumberOfInfos, "array overflow"); | |
| 2275 _info_new[_info_len++] = info; | |
| 2276 } | |
| 2277 | |
| 2278 public: | |
| 2279 LIR_OpVisitState() { reset(); } | |
| 2280 | |
| 2281 LIR_Op* op() const { return _op; } | |
| 2282 void set_op(LIR_Op* op) { reset(); _op = op; } | |
| 2283 | |
| 2284 bool has_call() const { return _has_call; } | |
| 2285 bool has_slow_case() const { return _has_slow_case; } | |
| 2286 | |
| 2287 void reset() { | |
| 2288 _op = NULL; | |
| 2289 _has_call = false; | |
| 2290 _has_slow_case = false; | |
| 2291 | |
| 2292 _oprs_len[inputMode] = 0; | |
| 2293 _oprs_len[tempMode] = 0; | |
| 2294 _oprs_len[outputMode] = 0; | |
| 2295 _info_len = 0; | |
| 2296 } | |
| 2297 | |
| 2298 | |
| 2299 int opr_count(OprMode mode) const { | |
| 2300 assert(mode >= 0 && mode < numModes, "bad mode"); | |
| 2301 return _oprs_len[mode]; | |
| 2302 } | |
| 2303 | |
| 2304 LIR_Opr opr_at(OprMode mode, int index) const { | |
| 2305 assert(mode >= 0 && mode < numModes, "bad mode"); | |
| 2306 assert(index >= 0 && index < _oprs_len[mode], "index out of bound"); | |
| 2307 return *_oprs_new[mode][index]; | |
| 2308 } | |
| 2309 | |
| 2310 void set_opr_at(OprMode mode, int index, LIR_Opr opr) const { | |
| 2311 assert(mode >= 0 && mode < numModes, "bad mode"); | |
| 2312 assert(index >= 0 && index < _oprs_len[mode], "index out of bound"); | |
| 2313 *_oprs_new[mode][index] = opr; | |
| 2314 } | |
| 2315 | |
| 2316 int info_count() const { | |
| 2317 return _info_len; | |
| 2318 } | |
| 2319 | |
| 2320 CodeEmitInfo* info_at(int index) const { | |
| 2321 assert(index < _info_len, "index out of bounds"); | |
| 2322 return _info_new[index]; | |
| 2323 } | |
| 2324 | |
| 2325 XHandlers* all_xhandler(); | |
| 2326 | |
| 2327 // collects all register operands of the instruction | |
| 2328 void visit(LIR_Op* op); | |
| 2329 | |
| 2330 #if ASSERT | |
| 2331 // check that an operation has no operands | |
| 2332 bool no_operands(LIR_Op* op); | |
| 2333 #endif | |
| 2334 | |
| 2335 // LIR_Op visitor functions use these to fill in the state | |
| 2336 void do_input(LIR_Opr& opr) { append(opr, LIR_OpVisitState::inputMode); } | |
| 2337 void do_output(LIR_Opr& opr) { append(opr, LIR_OpVisitState::outputMode); } | |
| 2338 void do_temp(LIR_Opr& opr) { append(opr, LIR_OpVisitState::tempMode); } | |
| 2339 void do_info(CodeEmitInfo* info) { append(info); } | |
| 2340 | |
| 2341 void do_stub(CodeStub* stub); | |
| 2342 void do_call() { _has_call = true; } | |
| 2343 void do_slow_case() { _has_slow_case = true; } | |
| 2344 void do_slow_case(CodeEmitInfo* info) { | |
| 2345 _has_slow_case = true; | |
| 2346 append(info); | |
| 2347 } | |
| 2348 }; | |
| 2349 | |
| 2350 | |
| 2351 inline LIR_Opr LIR_OprDesc::illegalOpr() { return LIR_OprFact::illegalOpr; }; | |
| 1972 | 2352 |
| 2353 #endif // SHARE_VM_C1_C1_LIR_HPP |