Mercurial > hg > truffle
annotate src/cpu/x86/vm/c1_LIRGenerator_x86.cpp @ 3957:5cceda753a4a
7091764: Tiered: enable aastore profiling
Summary: Turn on aastore profiling
Reviewed-by: jrose, twisti
| author | iveresov |
|---|---|
| date | Mon, 19 Sep 2011 15:21:03 -0700 |
| parents | e1162778c1c8 |
| children | 6759698e3140 |
| rev | line source |
|---|---|
| 0 | 1 /* |
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2 * Copyright (c) 2005, 2011, Oracle and/or its affiliates. All rights reserved. |
| 0 | 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
| 4 * | |
| 5 * This code is free software; you can redistribute it and/or modify it | |
| 6 * under the terms of the GNU General Public License version 2 only, as | |
| 7 * published by the Free Software Foundation. | |
| 8 * | |
| 9 * This code is distributed in the hope that it will be useful, but WITHOUT | |
| 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
| 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
| 12 * version 2 for more details (a copy is included in the LICENSE file that | |
| 13 * accompanied this code). | |
| 14 * | |
| 15 * You should have received a copy of the GNU General Public License version | |
| 16 * 2 along with this work; if not, write to the Free Software Foundation, | |
| 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
| 18 * | |
|
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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20 * or visit www.oracle.com if you need additional information or have any |
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21 * questions. |
| 0 | 22 * |
| 23 */ | |
| 24 | |
| 1972 | 25 #include "precompiled.hpp" |
| 26 #include "c1/c1_Compilation.hpp" | |
| 27 #include "c1/c1_FrameMap.hpp" | |
| 28 #include "c1/c1_Instruction.hpp" | |
| 29 #include "c1/c1_LIRAssembler.hpp" | |
| 30 #include "c1/c1_LIRGenerator.hpp" | |
| 31 #include "c1/c1_Runtime1.hpp" | |
| 32 #include "c1/c1_ValueStack.hpp" | |
| 33 #include "ci/ciArray.hpp" | |
| 34 #include "ci/ciObjArrayKlass.hpp" | |
| 35 #include "ci/ciTypeArrayKlass.hpp" | |
| 36 #include "runtime/sharedRuntime.hpp" | |
| 37 #include "runtime/stubRoutines.hpp" | |
| 38 #include "vmreg_x86.inline.hpp" | |
| 0 | 39 |
| 40 #ifdef ASSERT | |
| 41 #define __ gen()->lir(__FILE__, __LINE__)-> | |
| 42 #else | |
| 43 #define __ gen()->lir()-> | |
| 44 #endif | |
| 45 | |
| 46 // Item will be loaded into a byte register; Intel only | |
| 47 void LIRItem::load_byte_item() { | |
| 48 load_item(); | |
| 49 LIR_Opr res = result(); | |
| 50 | |
| 51 if (!res->is_virtual() || !_gen->is_vreg_flag_set(res, LIRGenerator::byte_reg)) { | |
| 52 // make sure that it is a byte register | |
| 53 assert(!value()->type()->is_float() && !value()->type()->is_double(), | |
| 54 "can't load floats in byte register"); | |
| 55 LIR_Opr reg = _gen->rlock_byte(T_BYTE); | |
| 56 __ move(res, reg); | |
| 57 | |
| 58 _result = reg; | |
| 59 } | |
| 60 } | |
| 61 | |
| 62 | |
| 63 void LIRItem::load_nonconstant() { | |
| 64 LIR_Opr r = value()->operand(); | |
| 65 if (r->is_constant()) { | |
| 66 _result = r; | |
| 67 } else { | |
| 68 load_item(); | |
| 69 } | |
| 70 } | |
| 71 | |
| 72 //-------------------------------------------------------------- | |
| 73 // LIRGenerator | |
| 74 //-------------------------------------------------------------- | |
| 75 | |
| 76 | |
| 77 LIR_Opr LIRGenerator::exceptionOopOpr() { return FrameMap::rax_oop_opr; } | |
| 78 LIR_Opr LIRGenerator::exceptionPcOpr() { return FrameMap::rdx_opr; } | |
| 79 LIR_Opr LIRGenerator::divInOpr() { return FrameMap::rax_opr; } | |
| 80 LIR_Opr LIRGenerator::divOutOpr() { return FrameMap::rax_opr; } | |
| 81 LIR_Opr LIRGenerator::remOutOpr() { return FrameMap::rdx_opr; } | |
| 82 LIR_Opr LIRGenerator::shiftCountOpr() { return FrameMap::rcx_opr; } | |
| 83 LIR_Opr LIRGenerator::syncTempOpr() { return FrameMap::rax_opr; } | |
| 84 LIR_Opr LIRGenerator::getThreadTemp() { return LIR_OprFact::illegalOpr; } | |
| 85 | |
| 86 | |
| 87 LIR_Opr LIRGenerator::result_register_for(ValueType* type, bool callee) { | |
| 88 LIR_Opr opr; | |
| 89 switch (type->tag()) { | |
| 90 case intTag: opr = FrameMap::rax_opr; break; | |
| 91 case objectTag: opr = FrameMap::rax_oop_opr; break; | |
| 304 | 92 case longTag: opr = FrameMap::long0_opr; break; |
| 0 | 93 case floatTag: opr = UseSSE >= 1 ? FrameMap::xmm0_float_opr : FrameMap::fpu0_float_opr; break; |
| 94 case doubleTag: opr = UseSSE >= 2 ? FrameMap::xmm0_double_opr : FrameMap::fpu0_double_opr; break; | |
| 95 | |
| 96 case addressTag: | |
| 97 default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr; | |
| 98 } | |
| 99 | |
| 100 assert(opr->type_field() == as_OprType(as_BasicType(type)), "type mismatch"); | |
| 101 return opr; | |
| 102 } | |
| 103 | |
| 104 | |
| 105 LIR_Opr LIRGenerator::rlock_byte(BasicType type) { | |
| 106 LIR_Opr reg = new_register(T_INT); | |
| 107 set_vreg_flag(reg, LIRGenerator::byte_reg); | |
| 108 return reg; | |
| 109 } | |
| 110 | |
| 111 | |
| 112 //--------- loading items into registers -------------------------------- | |
| 113 | |
| 114 | |
| 115 // i486 instructions can inline constants | |
| 116 bool LIRGenerator::can_store_as_constant(Value v, BasicType type) const { | |
| 117 if (type == T_SHORT || type == T_CHAR) { | |
| 118 // there is no immediate move of word values in asembler_i486.?pp | |
| 119 return false; | |
| 120 } | |
| 121 Constant* c = v->as_Constant(); | |
| 1819 | 122 if (c && c->state_before() == NULL) { |
| 0 | 123 // constants of any type can be stored directly, except for |
| 124 // unloaded object constants. | |
| 125 return true; | |
| 126 } | |
| 127 return false; | |
| 128 } | |
| 129 | |
| 130 | |
| 131 bool LIRGenerator::can_inline_as_constant(Value v) const { | |
| 304 | 132 if (v->type()->tag() == longTag) return false; |
| 0 | 133 return v->type()->tag() != objectTag || |
| 134 (v->type()->is_constant() && v->type()->as_ObjectType()->constant_value()->is_null_object()); | |
| 135 } | |
| 136 | |
| 137 | |
| 138 bool LIRGenerator::can_inline_as_constant(LIR_Const* c) const { | |
| 304 | 139 if (c->type() == T_LONG) return false; |
| 0 | 140 return c->type() != T_OBJECT || c->as_jobject() == NULL; |
| 141 } | |
| 142 | |
| 143 | |
| 144 LIR_Opr LIRGenerator::safepoint_poll_register() { | |
| 145 return LIR_OprFact::illegalOpr; | |
| 146 } | |
| 147 | |
| 148 | |
| 149 LIR_Address* LIRGenerator::generate_address(LIR_Opr base, LIR_Opr index, | |
| 150 int shift, int disp, BasicType type) { | |
| 151 assert(base->is_register(), "must be"); | |
| 152 if (index->is_constant()) { | |
| 153 return new LIR_Address(base, | |
| 154 (index->as_constant_ptr()->as_jint() << shift) + disp, | |
| 155 type); | |
| 156 } else { | |
| 157 return new LIR_Address(base, index, (LIR_Address::Scale)shift, disp, type); | |
| 158 } | |
| 159 } | |
| 160 | |
| 161 | |
| 162 LIR_Address* LIRGenerator::emit_array_address(LIR_Opr array_opr, LIR_Opr index_opr, | |
| 163 BasicType type, bool needs_card_mark) { | |
| 164 int offset_in_bytes = arrayOopDesc::base_offset_in_bytes(type); | |
| 165 | |
| 166 LIR_Address* addr; | |
| 167 if (index_opr->is_constant()) { | |
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168 int elem_size = type2aelembytes(type); |
| 0 | 169 addr = new LIR_Address(array_opr, |
| 170 offset_in_bytes + index_opr->as_jint() * elem_size, type); | |
| 171 } else { | |
| 304 | 172 #ifdef _LP64 |
| 173 if (index_opr->type() == T_INT) { | |
| 174 LIR_Opr tmp = new_register(T_LONG); | |
| 175 __ convert(Bytecodes::_i2l, index_opr, tmp); | |
| 176 index_opr = tmp; | |
| 177 } | |
| 178 #endif // _LP64 | |
| 0 | 179 addr = new LIR_Address(array_opr, |
| 180 index_opr, | |
| 181 LIR_Address::scale(type), | |
| 182 offset_in_bytes, type); | |
| 183 } | |
| 184 if (needs_card_mark) { | |
| 185 // This store will need a precise card mark, so go ahead and | |
| 186 // compute the full adddres instead of computing once for the | |
| 187 // store and again for the card mark. | |
| 304 | 188 LIR_Opr tmp = new_pointer_register(); |
| 0 | 189 __ leal(LIR_OprFact::address(addr), tmp); |
| 1572 | 190 return new LIR_Address(tmp, type); |
| 0 | 191 } else { |
| 192 return addr; | |
| 193 } | |
| 194 } | |
| 195 | |
| 196 | |
| 1783 | 197 LIR_Opr LIRGenerator::load_immediate(int x, BasicType type) { |
| 198 LIR_Opr r; | |
| 199 if (type == T_LONG) { | |
| 200 r = LIR_OprFact::longConst(x); | |
| 201 } else if (type == T_INT) { | |
| 202 r = LIR_OprFact::intConst(x); | |
| 203 } else { | |
| 204 ShouldNotReachHere(); | |
| 205 } | |
| 206 return r; | |
| 207 } | |
| 208 | |
| 209 void LIRGenerator::increment_counter(address counter, BasicType type, int step) { | |
| 304 | 210 LIR_Opr pointer = new_pointer_register(); |
| 211 __ move(LIR_OprFact::intptrConst(counter), pointer); | |
| 1783 | 212 LIR_Address* addr = new LIR_Address(pointer, type); |
| 0 | 213 increment_counter(addr, step); |
| 214 } | |
| 215 | |
| 216 | |
| 217 void LIRGenerator::increment_counter(LIR_Address* addr, int step) { | |
| 218 __ add((LIR_Opr)addr, LIR_OprFact::intConst(step), (LIR_Opr)addr); | |
| 219 } | |
| 220 | |
| 221 void LIRGenerator::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) { | |
| 222 __ cmp_mem_int(condition, base, disp, c, info); | |
| 223 } | |
| 224 | |
| 225 | |
| 226 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, int disp, BasicType type, CodeEmitInfo* info) { | |
| 227 __ cmp_reg_mem(condition, reg, new LIR_Address(base, disp, type), info); | |
| 228 } | |
| 229 | |
| 230 | |
| 231 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, LIR_Opr disp, BasicType type, CodeEmitInfo* info) { | |
| 232 __ cmp_reg_mem(condition, reg, new LIR_Address(base, disp, type), info); | |
| 233 } | |
| 234 | |
| 235 | |
| 236 bool LIRGenerator::strength_reduce_multiply(LIR_Opr left, int c, LIR_Opr result, LIR_Opr tmp) { | |
| 237 if (tmp->is_valid()) { | |
| 238 if (is_power_of_2(c + 1)) { | |
| 239 __ move(left, tmp); | |
| 240 __ shift_left(left, log2_intptr(c + 1), left); | |
| 241 __ sub(left, tmp, result); | |
| 242 return true; | |
| 243 } else if (is_power_of_2(c - 1)) { | |
| 244 __ move(left, tmp); | |
| 245 __ shift_left(left, log2_intptr(c - 1), left); | |
| 246 __ add(left, tmp, result); | |
| 247 return true; | |
| 248 } | |
| 249 } | |
| 250 return false; | |
| 251 } | |
| 252 | |
| 253 | |
| 254 void LIRGenerator::store_stack_parameter (LIR_Opr item, ByteSize offset_from_sp) { | |
| 255 BasicType type = item->type(); | |
| 256 __ store(item, new LIR_Address(FrameMap::rsp_opr, in_bytes(offset_from_sp), type)); | |
| 257 } | |
| 258 | |
| 259 //---------------------------------------------------------------------- | |
| 260 // visitor functions | |
| 261 //---------------------------------------------------------------------- | |
| 262 | |
| 263 | |
| 264 void LIRGenerator::do_StoreIndexed(StoreIndexed* x) { | |
| 1819 | 265 assert(x->is_pinned(),""); |
| 0 | 266 bool needs_range_check = true; |
| 267 bool use_length = x->length() != NULL; | |
| 268 bool obj_store = x->elt_type() == T_ARRAY || x->elt_type() == T_OBJECT; | |
| 269 bool needs_store_check = obj_store && (x->value()->as_Constant() == NULL || | |
| 3957 | 270 !get_jobject_constant(x->value())->is_null_object() || |
| 271 x->should_profile()); | |
| 0 | 272 |
| 273 LIRItem array(x->array(), this); | |
| 274 LIRItem index(x->index(), this); | |
| 275 LIRItem value(x->value(), this); | |
| 276 LIRItem length(this); | |
| 277 | |
| 278 array.load_item(); | |
| 279 index.load_nonconstant(); | |
| 280 | |
| 281 if (use_length) { | |
| 282 needs_range_check = x->compute_needs_range_check(); | |
| 283 if (needs_range_check) { | |
| 284 length.set_instruction(x->length()); | |
| 285 length.load_item(); | |
| 286 } | |
| 287 } | |
| 288 if (needs_store_check) { | |
| 289 value.load_item(); | |
| 290 } else { | |
| 291 value.load_for_store(x->elt_type()); | |
| 292 } | |
| 293 | |
| 294 set_no_result(x); | |
| 295 | |
| 296 // the CodeEmitInfo must be duplicated for each different | |
| 297 // LIR-instruction because spilling can occur anywhere between two | |
| 298 // instructions and so the debug information must be different | |
| 299 CodeEmitInfo* range_check_info = state_for(x); | |
| 300 CodeEmitInfo* null_check_info = NULL; | |
| 301 if (x->needs_null_check()) { | |
| 302 null_check_info = new CodeEmitInfo(range_check_info); | |
| 303 } | |
| 304 | |
| 305 // emit array address setup early so it schedules better | |
| 306 LIR_Address* array_addr = emit_array_address(array.result(), index.result(), x->elt_type(), obj_store); | |
| 307 | |
| 308 if (GenerateRangeChecks && needs_range_check) { | |
| 309 if (use_length) { | |
| 310 __ cmp(lir_cond_belowEqual, length.result(), index.result()); | |
| 311 __ branch(lir_cond_belowEqual, T_INT, new RangeCheckStub(range_check_info, index.result())); | |
| 312 } else { | |
| 313 array_range_check(array.result(), index.result(), null_check_info, range_check_info); | |
| 314 // range_check also does the null check | |
| 315 null_check_info = NULL; | |
| 316 } | |
| 317 } | |
| 318 | |
| 319 if (GenerateArrayStoreCheck && needs_store_check) { | |
| 320 LIR_Opr tmp1 = new_register(objectType); | |
| 321 LIR_Opr tmp2 = new_register(objectType); | |
| 322 LIR_Opr tmp3 = new_register(objectType); | |
| 323 | |
| 324 CodeEmitInfo* store_check_info = new CodeEmitInfo(range_check_info); | |
| 3957 | 325 __ store_check(value.result(), array.result(), tmp1, tmp2, tmp3, store_check_info, x->profiled_method(), x->profiled_bci()); |
| 0 | 326 } |
| 327 | |
| 328 if (obj_store) { | |
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329 // Needs GC write barriers. |
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330 pre_barrier(LIR_OprFact::address(array_addr), LIR_OprFact::illegalOpr /* pre_val */, |
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331 true /* do_load */, false /* patch */, NULL); |
| 0 | 332 __ move(value.result(), array_addr, null_check_info); |
| 333 // Seems to be a precise | |
| 334 post_barrier(LIR_OprFact::address(array_addr), value.result()); | |
| 335 } else { | |
| 336 __ move(value.result(), array_addr, null_check_info); | |
| 337 } | |
| 338 } | |
| 339 | |
| 340 | |
| 341 void LIRGenerator::do_MonitorEnter(MonitorEnter* x) { | |
| 1819 | 342 assert(x->is_pinned(),""); |
| 0 | 343 LIRItem obj(x->obj(), this); |
| 344 obj.load_item(); | |
| 345 | |
| 346 set_no_result(x); | |
| 347 | |
| 348 // "lock" stores the address of the monitor stack slot, so this is not an oop | |
| 349 LIR_Opr lock = new_register(T_INT); | |
| 350 // Need a scratch register for biased locking on x86 | |
| 351 LIR_Opr scratch = LIR_OprFact::illegalOpr; | |
| 352 if (UseBiasedLocking) { | |
| 353 scratch = new_register(T_INT); | |
| 354 } | |
| 355 | |
| 356 CodeEmitInfo* info_for_exception = NULL; | |
| 357 if (x->needs_null_check()) { | |
| 1819 | 358 info_for_exception = state_for(x); |
| 0 | 359 } |
| 360 // this CodeEmitInfo must not have the xhandlers because here the | |
| 361 // object is already locked (xhandlers expect object to be unlocked) | |
| 362 CodeEmitInfo* info = state_for(x, x->state(), true); | |
| 363 monitor_enter(obj.result(), lock, syncTempOpr(), scratch, | |
| 364 x->monitor_no(), info_for_exception, info); | |
| 365 } | |
| 366 | |
| 367 | |
| 368 void LIRGenerator::do_MonitorExit(MonitorExit* x) { | |
| 1819 | 369 assert(x->is_pinned(),""); |
| 0 | 370 |
| 371 LIRItem obj(x->obj(), this); | |
| 372 obj.dont_load_item(); | |
| 373 | |
| 374 LIR_Opr lock = new_register(T_INT); | |
| 375 LIR_Opr obj_temp = new_register(T_INT); | |
| 376 set_no_result(x); | |
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377 monitor_exit(obj_temp, lock, syncTempOpr(), LIR_OprFact::illegalOpr, x->monitor_no()); |
| 0 | 378 } |
| 379 | |
| 380 | |
| 381 // _ineg, _lneg, _fneg, _dneg | |
| 382 void LIRGenerator::do_NegateOp(NegateOp* x) { | |
| 383 LIRItem value(x->x(), this); | |
| 384 value.set_destroys_register(); | |
| 385 value.load_item(); | |
| 386 LIR_Opr reg = rlock(x); | |
| 387 __ negate(value.result(), reg); | |
| 388 | |
| 389 set_result(x, round_item(reg)); | |
| 390 } | |
| 391 | |
| 392 | |
| 393 // for _fadd, _fmul, _fsub, _fdiv, _frem | |
| 394 // _dadd, _dmul, _dsub, _ddiv, _drem | |
| 395 void LIRGenerator::do_ArithmeticOp_FPU(ArithmeticOp* x) { | |
| 396 LIRItem left(x->x(), this); | |
| 397 LIRItem right(x->y(), this); | |
| 398 LIRItem* left_arg = &left; | |
| 399 LIRItem* right_arg = &right; | |
| 400 assert(!left.is_stack() || !right.is_stack(), "can't both be memory operands"); | |
| 401 bool must_load_both = (x->op() == Bytecodes::_frem || x->op() == Bytecodes::_drem); | |
| 402 if (left.is_register() || x->x()->type()->is_constant() || must_load_both) { | |
| 403 left.load_item(); | |
| 404 } else { | |
| 405 left.dont_load_item(); | |
| 406 } | |
| 407 | |
| 408 // do not load right operand if it is a constant. only 0 and 1 are | |
| 409 // loaded because there are special instructions for loading them | |
| 410 // without memory access (not needed for SSE2 instructions) | |
| 411 bool must_load_right = false; | |
| 412 if (right.is_constant()) { | |
| 413 LIR_Const* c = right.result()->as_constant_ptr(); | |
| 414 assert(c != NULL, "invalid constant"); | |
| 415 assert(c->type() == T_FLOAT || c->type() == T_DOUBLE, "invalid type"); | |
| 416 | |
| 417 if (c->type() == T_FLOAT) { | |
| 418 must_load_right = UseSSE < 1 && (c->is_one_float() || c->is_zero_float()); | |
| 419 } else { | |
| 420 must_load_right = UseSSE < 2 && (c->is_one_double() || c->is_zero_double()); | |
| 421 } | |
| 422 } | |
| 423 | |
| 424 if (must_load_both) { | |
| 425 // frem and drem destroy also right operand, so move it to a new register | |
| 426 right.set_destroys_register(); | |
| 427 right.load_item(); | |
| 428 } else if (right.is_register() || must_load_right) { | |
| 429 right.load_item(); | |
| 430 } else { | |
| 431 right.dont_load_item(); | |
| 432 } | |
| 433 LIR_Opr reg = rlock(x); | |
| 434 LIR_Opr tmp = LIR_OprFact::illegalOpr; | |
| 435 if (x->is_strictfp() && (x->op() == Bytecodes::_dmul || x->op() == Bytecodes::_ddiv)) { | |
| 436 tmp = new_register(T_DOUBLE); | |
| 437 } | |
| 438 | |
| 439 if ((UseSSE >= 1 && x->op() == Bytecodes::_frem) || (UseSSE >= 2 && x->op() == Bytecodes::_drem)) { | |
| 440 // special handling for frem and drem: no SSE instruction, so must use FPU with temporary fpu stack slots | |
| 441 LIR_Opr fpu0, fpu1; | |
| 442 if (x->op() == Bytecodes::_frem) { | |
| 443 fpu0 = LIR_OprFact::single_fpu(0); | |
| 444 fpu1 = LIR_OprFact::single_fpu(1); | |
| 445 } else { | |
| 446 fpu0 = LIR_OprFact::double_fpu(0); | |
| 447 fpu1 = LIR_OprFact::double_fpu(1); | |
| 448 } | |
| 449 __ move(right.result(), fpu1); // order of left and right operand is important! | |
| 450 __ move(left.result(), fpu0); | |
| 451 __ rem (fpu0, fpu1, fpu0); | |
| 452 __ move(fpu0, reg); | |
| 453 | |
| 454 } else { | |
| 455 arithmetic_op_fpu(x->op(), reg, left.result(), right.result(), x->is_strictfp(), tmp); | |
| 456 } | |
| 457 | |
| 458 set_result(x, round_item(reg)); | |
| 459 } | |
| 460 | |
| 461 | |
| 462 // for _ladd, _lmul, _lsub, _ldiv, _lrem | |
| 463 void LIRGenerator::do_ArithmeticOp_Long(ArithmeticOp* x) { | |
| 464 if (x->op() == Bytecodes::_ldiv || x->op() == Bytecodes::_lrem ) { | |
| 465 // long division is implemented as a direct call into the runtime | |
| 466 LIRItem left(x->x(), this); | |
| 467 LIRItem right(x->y(), this); | |
| 468 | |
| 469 // the check for division by zero destroys the right operand | |
| 470 right.set_destroys_register(); | |
| 471 | |
| 472 BasicTypeList signature(2); | |
| 473 signature.append(T_LONG); | |
| 474 signature.append(T_LONG); | |
| 475 CallingConvention* cc = frame_map()->c_calling_convention(&signature); | |
| 476 | |
| 477 // check for division by zero (destroys registers of right operand!) | |
| 478 CodeEmitInfo* info = state_for(x); | |
| 479 | |
| 480 const LIR_Opr result_reg = result_register_for(x->type()); | |
| 481 left.load_item_force(cc->at(1)); | |
| 482 right.load_item(); | |
| 483 | |
| 484 __ move(right.result(), cc->at(0)); | |
| 485 | |
| 486 __ cmp(lir_cond_equal, right.result(), LIR_OprFact::longConst(0)); | |
| 487 __ branch(lir_cond_equal, T_LONG, new DivByZeroStub(info)); | |
| 488 | |
| 489 address entry; | |
| 490 switch (x->op()) { | |
| 491 case Bytecodes::_lrem: | |
| 492 entry = CAST_FROM_FN_PTR(address, SharedRuntime::lrem); | |
| 493 break; // check if dividend is 0 is done elsewhere | |
| 494 case Bytecodes::_ldiv: | |
| 495 entry = CAST_FROM_FN_PTR(address, SharedRuntime::ldiv); | |
| 496 break; // check if dividend is 0 is done elsewhere | |
| 497 case Bytecodes::_lmul: | |
| 498 entry = CAST_FROM_FN_PTR(address, SharedRuntime::lmul); | |
| 499 break; | |
| 500 default: | |
| 501 ShouldNotReachHere(); | |
| 502 } | |
| 503 | |
| 504 LIR_Opr result = rlock_result(x); | |
| 505 __ call_runtime_leaf(entry, getThreadTemp(), result_reg, cc->args()); | |
| 506 __ move(result_reg, result); | |
| 507 } else if (x->op() == Bytecodes::_lmul) { | |
| 508 // missing test if instr is commutative and if we should swap | |
| 509 LIRItem left(x->x(), this); | |
| 510 LIRItem right(x->y(), this); | |
| 511 | |
| 512 // right register is destroyed by the long mul, so it must be | |
| 513 // copied to a new register. | |
| 514 right.set_destroys_register(); | |
| 515 | |
| 516 left.load_item(); | |
| 517 right.load_item(); | |
| 518 | |
| 304 | 519 LIR_Opr reg = FrameMap::long0_opr; |
| 0 | 520 arithmetic_op_long(x->op(), reg, left.result(), right.result(), NULL); |
| 521 LIR_Opr result = rlock_result(x); | |
| 522 __ move(reg, result); | |
| 523 } else { | |
| 524 // missing test if instr is commutative and if we should swap | |
| 525 LIRItem left(x->x(), this); | |
| 526 LIRItem right(x->y(), this); | |
| 527 | |
| 528 left.load_item(); | |
| 605 | 529 // don't load constants to save register |
| 0 | 530 right.load_nonconstant(); |
| 531 rlock_result(x); | |
| 532 arithmetic_op_long(x->op(), x->operand(), left.result(), right.result(), NULL); | |
| 533 } | |
| 534 } | |
| 535 | |
| 536 | |
| 537 | |
| 538 // for: _iadd, _imul, _isub, _idiv, _irem | |
| 539 void LIRGenerator::do_ArithmeticOp_Int(ArithmeticOp* x) { | |
| 540 if (x->op() == Bytecodes::_idiv || x->op() == Bytecodes::_irem) { | |
| 541 // The requirements for division and modulo | |
| 542 // input : rax,: dividend min_int | |
| 543 // reg: divisor (may not be rax,/rdx) -1 | |
| 544 // | |
| 545 // output: rax,: quotient (= rax, idiv reg) min_int | |
| 546 // rdx: remainder (= rax, irem reg) 0 | |
| 547 | |
| 548 // rax, and rdx will be destroyed | |
| 549 | |
| 550 // Note: does this invalidate the spec ??? | |
| 551 LIRItem right(x->y(), this); | |
| 552 LIRItem left(x->x() , this); // visit left second, so that the is_register test is valid | |
| 553 | |
| 554 // call state_for before load_item_force because state_for may | |
| 555 // force the evaluation of other instructions that are needed for | |
| 556 // correct debug info. Otherwise the live range of the fix | |
| 557 // register might be too long. | |
| 558 CodeEmitInfo* info = state_for(x); | |
| 559 | |
| 560 left.load_item_force(divInOpr()); | |
| 561 | |
| 562 right.load_item(); | |
| 563 | |
| 564 LIR_Opr result = rlock_result(x); | |
| 565 LIR_Opr result_reg; | |
| 566 if (x->op() == Bytecodes::_idiv) { | |
| 567 result_reg = divOutOpr(); | |
| 568 } else { | |
| 569 result_reg = remOutOpr(); | |
| 570 } | |
| 571 | |
| 572 if (!ImplicitDiv0Checks) { | |
| 573 __ cmp(lir_cond_equal, right.result(), LIR_OprFact::intConst(0)); | |
| 574 __ branch(lir_cond_equal, T_INT, new DivByZeroStub(info)); | |
| 575 } | |
| 576 LIR_Opr tmp = FrameMap::rdx_opr; // idiv and irem use rdx in their implementation | |
| 577 if (x->op() == Bytecodes::_irem) { | |
| 578 __ irem(left.result(), right.result(), result_reg, tmp, info); | |
| 579 } else if (x->op() == Bytecodes::_idiv) { | |
| 580 __ idiv(left.result(), right.result(), result_reg, tmp, info); | |
| 581 } else { | |
| 582 ShouldNotReachHere(); | |
| 583 } | |
| 584 | |
| 585 __ move(result_reg, result); | |
| 586 } else { | |
| 587 // missing test if instr is commutative and if we should swap | |
| 588 LIRItem left(x->x(), this); | |
| 589 LIRItem right(x->y(), this); | |
| 590 LIRItem* left_arg = &left; | |
| 591 LIRItem* right_arg = &right; | |
| 592 if (x->is_commutative() && left.is_stack() && right.is_register()) { | |
| 593 // swap them if left is real stack (or cached) and right is real register(not cached) | |
| 594 left_arg = &right; | |
| 595 right_arg = &left; | |
| 596 } | |
| 597 | |
| 598 left_arg->load_item(); | |
| 599 | |
| 600 // do not need to load right, as we can handle stack and constants | |
| 601 if (x->op() == Bytecodes::_imul ) { | |
| 602 // check if we can use shift instead | |
| 603 bool use_constant = false; | |
| 604 bool use_tmp = false; | |
| 605 if (right_arg->is_constant()) { | |
| 606 int iconst = right_arg->get_jint_constant(); | |
| 607 if (iconst > 0) { | |
| 608 if (is_power_of_2(iconst)) { | |
| 609 use_constant = true; | |
| 610 } else if (is_power_of_2(iconst - 1) || is_power_of_2(iconst + 1)) { | |
| 611 use_constant = true; | |
| 612 use_tmp = true; | |
| 613 } | |
| 614 } | |
| 615 } | |
| 616 if (use_constant) { | |
| 617 right_arg->dont_load_item(); | |
| 618 } else { | |
| 619 right_arg->load_item(); | |
| 620 } | |
| 621 LIR_Opr tmp = LIR_OprFact::illegalOpr; | |
| 622 if (use_tmp) { | |
| 623 tmp = new_register(T_INT); | |
| 624 } | |
| 625 rlock_result(x); | |
| 626 | |
| 627 arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), tmp); | |
| 628 } else { | |
| 629 right_arg->dont_load_item(); | |
| 630 rlock_result(x); | |
| 631 LIR_Opr tmp = LIR_OprFact::illegalOpr; | |
| 632 arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), tmp); | |
| 633 } | |
| 634 } | |
| 635 } | |
| 636 | |
| 637 | |
| 638 void LIRGenerator::do_ArithmeticOp(ArithmeticOp* x) { | |
| 639 // when an operand with use count 1 is the left operand, then it is | |
| 640 // likely that no move for 2-operand-LIR-form is necessary | |
| 641 if (x->is_commutative() && x->y()->as_Constant() == NULL && x->x()->use_count() > x->y()->use_count()) { | |
| 642 x->swap_operands(); | |
| 643 } | |
| 644 | |
| 645 ValueTag tag = x->type()->tag(); | |
| 646 assert(x->x()->type()->tag() == tag && x->y()->type()->tag() == tag, "wrong parameters"); | |
| 647 switch (tag) { | |
| 648 case floatTag: | |
| 649 case doubleTag: do_ArithmeticOp_FPU(x); return; | |
| 650 case longTag: do_ArithmeticOp_Long(x); return; | |
| 651 case intTag: do_ArithmeticOp_Int(x); return; | |
| 652 } | |
| 653 ShouldNotReachHere(); | |
| 654 } | |
| 655 | |
| 656 | |
| 657 // _ishl, _lshl, _ishr, _lshr, _iushr, _lushr | |
| 658 void LIRGenerator::do_ShiftOp(ShiftOp* x) { | |
| 659 // count must always be in rcx | |
| 660 LIRItem value(x->x(), this); | |
| 661 LIRItem count(x->y(), this); | |
| 662 | |
| 663 ValueTag elemType = x->type()->tag(); | |
| 664 bool must_load_count = !count.is_constant() || elemType == longTag; | |
| 665 if (must_load_count) { | |
| 666 // count for long must be in register | |
| 667 count.load_item_force(shiftCountOpr()); | |
| 668 } else { | |
| 669 count.dont_load_item(); | |
| 670 } | |
| 671 value.load_item(); | |
| 672 LIR_Opr reg = rlock_result(x); | |
| 673 | |
| 674 shift_op(x->op(), reg, value.result(), count.result(), LIR_OprFact::illegalOpr); | |
| 675 } | |
| 676 | |
| 677 | |
| 678 // _iand, _land, _ior, _lor, _ixor, _lxor | |
| 679 void LIRGenerator::do_LogicOp(LogicOp* x) { | |
| 680 // when an operand with use count 1 is the left operand, then it is | |
| 681 // likely that no move for 2-operand-LIR-form is necessary | |
| 682 if (x->is_commutative() && x->y()->as_Constant() == NULL && x->x()->use_count() > x->y()->use_count()) { | |
| 683 x->swap_operands(); | |
| 684 } | |
| 685 | |
| 686 LIRItem left(x->x(), this); | |
| 687 LIRItem right(x->y(), this); | |
| 688 | |
| 689 left.load_item(); | |
| 690 right.load_nonconstant(); | |
| 691 LIR_Opr reg = rlock_result(x); | |
| 692 | |
| 693 logic_op(x->op(), reg, left.result(), right.result()); | |
| 694 } | |
| 695 | |
| 696 | |
| 697 | |
| 698 // _lcmp, _fcmpl, _fcmpg, _dcmpl, _dcmpg | |
| 699 void LIRGenerator::do_CompareOp(CompareOp* x) { | |
| 700 LIRItem left(x->x(), this); | |
| 701 LIRItem right(x->y(), this); | |
| 702 ValueTag tag = x->x()->type()->tag(); | |
| 703 if (tag == longTag) { | |
| 704 left.set_destroys_register(); | |
| 705 } | |
| 706 left.load_item(); | |
| 707 right.load_item(); | |
| 708 LIR_Opr reg = rlock_result(x); | |
| 709 | |
| 710 if (x->x()->type()->is_float_kind()) { | |
| 711 Bytecodes::Code code = x->op(); | |
| 712 __ fcmp2int(left.result(), right.result(), reg, (code == Bytecodes::_fcmpl || code == Bytecodes::_dcmpl)); | |
| 713 } else if (x->x()->type()->tag() == longTag) { | |
| 714 __ lcmp2int(left.result(), right.result(), reg); | |
| 715 } else { | |
| 716 Unimplemented(); | |
| 717 } | |
| 718 } | |
| 719 | |
| 720 | |
| 721 void LIRGenerator::do_AttemptUpdate(Intrinsic* x) { | |
| 722 assert(x->number_of_arguments() == 3, "wrong type"); | |
| 723 LIRItem obj (x->argument_at(0), this); // AtomicLong object | |
| 724 LIRItem cmp_value (x->argument_at(1), this); // value to compare with field | |
| 725 LIRItem new_value (x->argument_at(2), this); // replace field with new_value if it matches cmp_value | |
| 726 | |
| 727 // compare value must be in rdx,eax (hi,lo); may be destroyed by cmpxchg8 instruction | |
| 304 | 728 cmp_value.load_item_force(FrameMap::long0_opr); |
| 0 | 729 |
| 730 // new value must be in rcx,ebx (hi,lo) | |
| 304 | 731 new_value.load_item_force(FrameMap::long1_opr); |
| 0 | 732 |
| 733 // object pointer register is overwritten with field address | |
| 734 obj.load_item(); | |
| 735 | |
| 736 // generate compare-and-swap; produces zero condition if swap occurs | |
| 737 int value_offset = sun_misc_AtomicLongCSImpl::value_offset(); | |
|
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738 LIR_Opr addr = new_pointer_register(); |
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739 __ leal(LIR_OprFact::address(new LIR_Address(obj.result(), value_offset, T_LONG)), addr); |
| 0 | 740 LIR_Opr t1 = LIR_OprFact::illegalOpr; // no temp needed |
| 741 LIR_Opr t2 = LIR_OprFact::illegalOpr; // no temp needed | |
| 742 __ cas_long(addr, cmp_value.result(), new_value.result(), t1, t2); | |
| 743 | |
| 744 // generate conditional move of boolean result | |
| 745 LIR_Opr result = rlock_result(x); | |
|
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746 __ cmove(lir_cond_equal, LIR_OprFact::intConst(1), LIR_OprFact::intConst(0), result, T_LONG); |
| 0 | 747 } |
| 748 | |
| 749 | |
| 750 void LIRGenerator::do_CompareAndSwap(Intrinsic* x, ValueType* type) { | |
| 751 assert(x->number_of_arguments() == 4, "wrong type"); | |
| 752 LIRItem obj (x->argument_at(0), this); // object | |
| 753 LIRItem offset(x->argument_at(1), this); // offset of field | |
| 754 LIRItem cmp (x->argument_at(2), this); // value to compare with field | |
| 755 LIRItem val (x->argument_at(3), this); // replace field with val if matches cmp | |
| 756 | |
| 757 assert(obj.type()->tag() == objectTag, "invalid type"); | |
| 304 | 758 |
| 759 // In 64bit the type can be long, sparc doesn't have this assert | |
| 760 // assert(offset.type()->tag() == intTag, "invalid type"); | |
| 761 | |
| 0 | 762 assert(cmp.type()->tag() == type->tag(), "invalid type"); |
| 763 assert(val.type()->tag() == type->tag(), "invalid type"); | |
| 764 | |
| 765 // get address of field | |
| 766 obj.load_item(); | |
| 767 offset.load_nonconstant(); | |
| 768 | |
| 769 if (type == objectType) { | |
| 770 cmp.load_item_force(FrameMap::rax_oop_opr); | |
| 771 val.load_item(); | |
| 772 } else if (type == intType) { | |
| 773 cmp.load_item_force(FrameMap::rax_opr); | |
| 774 val.load_item(); | |
| 775 } else if (type == longType) { | |
| 304 | 776 cmp.load_item_force(FrameMap::long0_opr); |
| 777 val.load_item_force(FrameMap::long1_opr); | |
| 0 | 778 } else { |
| 779 ShouldNotReachHere(); | |
| 780 } | |
| 781 | |
| 1873 | 782 LIR_Opr addr = new_pointer_register(); |
| 1060 | 783 LIR_Address* a; |
| 784 if(offset.result()->is_constant()) { | |
| 785 a = new LIR_Address(obj.result(), | |
| 786 NOT_LP64(offset.result()->as_constant_ptr()->as_jint()) LP64_ONLY((int)offset.result()->as_constant_ptr()->as_jlong()), | |
| 787 as_BasicType(type)); | |
| 788 } else { | |
| 789 a = new LIR_Address(obj.result(), | |
| 790 offset.result(), | |
| 791 LIR_Address::times_1, | |
| 792 0, | |
| 793 as_BasicType(type)); | |
| 794 } | |
| 795 __ leal(LIR_OprFact::address(a), addr); | |
| 0 | 796 |
|
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797 if (type == objectType) { // Write-barrier needed for Object fields. |
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798 // Do the pre-write barrier, if any. |
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799 pre_barrier(addr, LIR_OprFact::illegalOpr /* pre_val */, |
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800 true /* do_load */, false /* patch */, NULL); |
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801 } |
| 0 | 802 |
| 803 LIR_Opr ill = LIR_OprFact::illegalOpr; // for convenience | |
| 804 if (type == objectType) | |
| 805 __ cas_obj(addr, cmp.result(), val.result(), ill, ill); | |
| 806 else if (type == intType) | |
| 807 __ cas_int(addr, cmp.result(), val.result(), ill, ill); | |
| 808 else if (type == longType) | |
| 809 __ cas_long(addr, cmp.result(), val.result(), ill, ill); | |
| 810 else { | |
| 811 ShouldNotReachHere(); | |
| 812 } | |
| 813 | |
| 814 // generate conditional move of boolean result | |
| 815 LIR_Opr result = rlock_result(x); | |
|
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816 __ cmove(lir_cond_equal, LIR_OprFact::intConst(1), LIR_OprFact::intConst(0), |
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817 result, as_BasicType(type)); |
| 0 | 818 if (type == objectType) { // Write-barrier needed for Object fields. |
| 819 // Seems to be precise | |
| 820 post_barrier(addr, val.result()); | |
| 821 } | |
| 822 } | |
| 823 | |
| 824 | |
| 825 void LIRGenerator::do_MathIntrinsic(Intrinsic* x) { | |
| 826 assert(x->number_of_arguments() == 1, "wrong type"); | |
| 827 LIRItem value(x->argument_at(0), this); | |
| 828 | |
| 829 bool use_fpu = false; | |
| 830 if (UseSSE >= 2) { | |
| 831 switch(x->id()) { | |
| 832 case vmIntrinsics::_dsin: | |
| 833 case vmIntrinsics::_dcos: | |
| 834 case vmIntrinsics::_dtan: | |
| 835 case vmIntrinsics::_dlog: | |
| 836 case vmIntrinsics::_dlog10: | |
| 837 use_fpu = true; | |
| 838 } | |
| 839 } else { | |
| 840 value.set_destroys_register(); | |
| 841 } | |
| 842 | |
| 843 value.load_item(); | |
| 844 | |
| 845 LIR_Opr calc_input = value.result(); | |
| 846 LIR_Opr calc_result = rlock_result(x); | |
| 847 | |
| 848 // sin and cos need two free fpu stack slots, so register two temporary operands | |
| 849 LIR_Opr tmp1 = FrameMap::caller_save_fpu_reg_at(0); | |
| 850 LIR_Opr tmp2 = FrameMap::caller_save_fpu_reg_at(1); | |
| 851 | |
| 852 if (use_fpu) { | |
| 853 LIR_Opr tmp = FrameMap::fpu0_double_opr; | |
| 854 __ move(calc_input, tmp); | |
| 855 | |
| 856 calc_input = tmp; | |
| 857 calc_result = tmp; | |
| 858 tmp1 = FrameMap::caller_save_fpu_reg_at(1); | |
| 859 tmp2 = FrameMap::caller_save_fpu_reg_at(2); | |
| 860 } | |
| 861 | |
| 862 switch(x->id()) { | |
| 863 case vmIntrinsics::_dabs: __ abs (calc_input, calc_result, LIR_OprFact::illegalOpr); break; | |
| 864 case vmIntrinsics::_dsqrt: __ sqrt (calc_input, calc_result, LIR_OprFact::illegalOpr); break; | |
| 865 case vmIntrinsics::_dsin: __ sin (calc_input, calc_result, tmp1, tmp2); break; | |
| 866 case vmIntrinsics::_dcos: __ cos (calc_input, calc_result, tmp1, tmp2); break; | |
| 867 case vmIntrinsics::_dtan: __ tan (calc_input, calc_result, tmp1, tmp2); break; | |
|
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868 case vmIntrinsics::_dlog: __ log (calc_input, calc_result, tmp1); break; |
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869 case vmIntrinsics::_dlog10: __ log10(calc_input, calc_result, tmp1); break; |
| 0 | 870 default: ShouldNotReachHere(); |
| 871 } | |
| 872 | |
| 873 if (use_fpu) { | |
| 874 __ move(calc_result, x->operand()); | |
| 875 } | |
| 876 } | |
| 877 | |
| 878 | |
| 879 void LIRGenerator::do_ArrayCopy(Intrinsic* x) { | |
| 880 assert(x->number_of_arguments() == 5, "wrong type"); | |
|
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881 |
|
0cb042fd2d4b
6875026: CTW failure jdk6_18/hotspot/src/share/vm/c1/c1_LinearScan.cpp:5486
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882 // Make all state_for calls early since they can emit code |
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883 CodeEmitInfo* info = state_for(x, x->state()); |
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|
884 |
| 0 | 885 LIRItem src(x->argument_at(0), this); |
| 886 LIRItem src_pos(x->argument_at(1), this); | |
| 887 LIRItem dst(x->argument_at(2), this); | |
| 888 LIRItem dst_pos(x->argument_at(3), this); | |
| 889 LIRItem length(x->argument_at(4), this); | |
| 890 | |
| 891 // operands for arraycopy must use fixed registers, otherwise | |
| 892 // LinearScan will fail allocation (because arraycopy always needs a | |
| 893 // call) | |
| 304 | 894 |
| 895 #ifndef _LP64 | |
| 0 | 896 src.load_item_force (FrameMap::rcx_oop_opr); |
| 897 src_pos.load_item_force (FrameMap::rdx_opr); | |
| 898 dst.load_item_force (FrameMap::rax_oop_opr); | |
| 899 dst_pos.load_item_force (FrameMap::rbx_opr); | |
| 900 length.load_item_force (FrameMap::rdi_opr); | |
| 901 LIR_Opr tmp = (FrameMap::rsi_opr); | |
| 304 | 902 #else |
| 903 | |
| 904 // The java calling convention will give us enough registers | |
| 905 // so that on the stub side the args will be perfect already. | |
| 906 // On the other slow/special case side we call C and the arg | |
| 907 // positions are not similar enough to pick one as the best. | |
| 908 // Also because the java calling convention is a "shifted" version | |
| 909 // of the C convention we can process the java args trivially into C | |
| 910 // args without worry of overwriting during the xfer | |
| 911 | |
| 912 src.load_item_force (FrameMap::as_oop_opr(j_rarg0)); | |
| 913 src_pos.load_item_force (FrameMap::as_opr(j_rarg1)); | |
| 914 dst.load_item_force (FrameMap::as_oop_opr(j_rarg2)); | |
| 915 dst_pos.load_item_force (FrameMap::as_opr(j_rarg3)); | |
| 916 length.load_item_force (FrameMap::as_opr(j_rarg4)); | |
| 917 | |
| 918 LIR_Opr tmp = FrameMap::as_opr(j_rarg5); | |
| 919 #endif // LP64 | |
| 920 | |
| 0 | 921 set_no_result(x); |
| 922 | |
| 923 int flags; | |
| 924 ciArrayKlass* expected_type; | |
| 925 arraycopy_helper(x, &flags, &expected_type); | |
| 926 | |
| 927 __ arraycopy(src.result(), src_pos.result(), dst.result(), dst_pos.result(), length.result(), tmp, expected_type, flags, info); // does add_safepoint | |
| 928 } | |
| 929 | |
| 930 | |
| 931 // _i2l, _i2f, _i2d, _l2i, _l2f, _l2d, _f2i, _f2l, _f2d, _d2i, _d2l, _d2f | |
| 932 // _i2b, _i2c, _i2s | |
| 933 LIR_Opr fixed_register_for(BasicType type) { | |
| 934 switch (type) { | |
| 935 case T_FLOAT: return FrameMap::fpu0_float_opr; | |
| 936 case T_DOUBLE: return FrameMap::fpu0_double_opr; | |
| 937 case T_INT: return FrameMap::rax_opr; | |
| 304 | 938 case T_LONG: return FrameMap::long0_opr; |
| 0 | 939 default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr; |
| 940 } | |
| 941 } | |
| 942 | |
| 943 void LIRGenerator::do_Convert(Convert* x) { | |
| 944 // flags that vary for the different operations and different SSE-settings | |
| 945 bool fixed_input, fixed_result, round_result, needs_stub; | |
| 946 | |
| 947 switch (x->op()) { | |
| 948 case Bytecodes::_i2l: // fall through | |
| 949 case Bytecodes::_l2i: // fall through | |
| 950 case Bytecodes::_i2b: // fall through | |
| 951 case Bytecodes::_i2c: // fall through | |
| 952 case Bytecodes::_i2s: fixed_input = false; fixed_result = false; round_result = false; needs_stub = false; break; | |
| 953 | |
| 954 case Bytecodes::_f2d: fixed_input = UseSSE == 1; fixed_result = false; round_result = false; needs_stub = false; break; | |
| 955 case Bytecodes::_d2f: fixed_input = false; fixed_result = UseSSE == 1; round_result = UseSSE < 1; needs_stub = false; break; | |
| 956 case Bytecodes::_i2f: fixed_input = false; fixed_result = false; round_result = UseSSE < 1; needs_stub = false; break; | |
| 957 case Bytecodes::_i2d: fixed_input = false; fixed_result = false; round_result = false; needs_stub = false; break; | |
| 958 case Bytecodes::_f2i: fixed_input = false; fixed_result = false; round_result = false; needs_stub = true; break; | |
| 959 case Bytecodes::_d2i: fixed_input = false; fixed_result = false; round_result = false; needs_stub = true; break; | |
| 960 case Bytecodes::_l2f: fixed_input = false; fixed_result = UseSSE >= 1; round_result = UseSSE < 1; needs_stub = false; break; | |
| 961 case Bytecodes::_l2d: fixed_input = false; fixed_result = UseSSE >= 2; round_result = UseSSE < 2; needs_stub = false; break; | |
| 962 case Bytecodes::_f2l: fixed_input = true; fixed_result = true; round_result = false; needs_stub = false; break; | |
| 963 case Bytecodes::_d2l: fixed_input = true; fixed_result = true; round_result = false; needs_stub = false; break; | |
| 964 default: ShouldNotReachHere(); | |
| 965 } | |
| 966 | |
| 967 LIRItem value(x->value(), this); | |
| 968 value.load_item(); | |
| 969 LIR_Opr input = value.result(); | |
| 970 LIR_Opr result = rlock(x); | |
| 971 | |
| 972 // arguments of lir_convert | |
| 973 LIR_Opr conv_input = input; | |
| 974 LIR_Opr conv_result = result; | |
| 975 ConversionStub* stub = NULL; | |
| 976 | |
| 977 if (fixed_input) { | |
| 978 conv_input = fixed_register_for(input->type()); | |
| 979 __ move(input, conv_input); | |
| 980 } | |
| 981 | |
| 982 assert(fixed_result == false || round_result == false, "cannot set both"); | |
| 983 if (fixed_result) { | |
| 984 conv_result = fixed_register_for(result->type()); | |
| 985 } else if (round_result) { | |
| 986 result = new_register(result->type()); | |
| 987 set_vreg_flag(result, must_start_in_memory); | |
| 988 } | |
| 989 | |
| 990 if (needs_stub) { | |
| 991 stub = new ConversionStub(x->op(), conv_input, conv_result); | |
| 992 } | |
| 993 | |
| 994 __ convert(x->op(), conv_input, conv_result, stub); | |
| 995 | |
| 996 if (result != conv_result) { | |
| 997 __ move(conv_result, result); | |
| 998 } | |
| 999 | |
| 1000 assert(result->is_virtual(), "result must be virtual register"); | |
| 1001 set_result(x, result); | |
| 1002 } | |
| 1003 | |
| 1004 | |
| 1005 void LIRGenerator::do_NewInstance(NewInstance* x) { | |
| 1819 | 1006 #ifndef PRODUCT |
| 0 | 1007 if (PrintNotLoaded && !x->klass()->is_loaded()) { |
| 1819 | 1008 tty->print_cr(" ###class not loaded at new bci %d", x->printable_bci()); |
| 0 | 1009 } |
| 1819 | 1010 #endif |
| 0 | 1011 CodeEmitInfo* info = state_for(x, x->state()); |
| 1012 LIR_Opr reg = result_register_for(x->type()); | |
| 1013 LIR_Opr klass_reg = new_register(objectType); | |
| 1014 new_instance(reg, x->klass(), | |
| 1015 FrameMap::rcx_oop_opr, | |
| 1016 FrameMap::rdi_oop_opr, | |
| 1017 FrameMap::rsi_oop_opr, | |
| 1018 LIR_OprFact::illegalOpr, | |
| 1019 FrameMap::rdx_oop_opr, info); | |
| 1020 LIR_Opr result = rlock_result(x); | |
| 1021 __ move(reg, result); | |
| 1022 } | |
| 1023 | |
| 1024 | |
| 1025 void LIRGenerator::do_NewTypeArray(NewTypeArray* x) { | |
| 1026 CodeEmitInfo* info = state_for(x, x->state()); | |
| 1027 | |
| 1028 LIRItem length(x->length(), this); | |
| 1029 length.load_item_force(FrameMap::rbx_opr); | |
| 1030 | |
| 1031 LIR_Opr reg = result_register_for(x->type()); | |
| 1032 LIR_Opr tmp1 = FrameMap::rcx_oop_opr; | |
| 1033 LIR_Opr tmp2 = FrameMap::rsi_oop_opr; | |
| 1034 LIR_Opr tmp3 = FrameMap::rdi_oop_opr; | |
| 1035 LIR_Opr tmp4 = reg; | |
| 1036 LIR_Opr klass_reg = FrameMap::rdx_oop_opr; | |
| 1037 LIR_Opr len = length.result(); | |
| 1038 BasicType elem_type = x->elt_type(); | |
| 1039 | |
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1040 __ oop2reg(ciTypeArrayKlass::make(elem_type)->constant_encoding(), klass_reg); |
| 0 | 1041 |
| 1042 CodeStub* slow_path = new NewTypeArrayStub(klass_reg, len, reg, info); | |
| 1043 __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, elem_type, klass_reg, slow_path); | |
| 1044 | |
| 1045 LIR_Opr result = rlock_result(x); | |
| 1046 __ move(reg, result); | |
| 1047 } | |
| 1048 | |
| 1049 | |
| 1050 void LIRGenerator::do_NewObjectArray(NewObjectArray* x) { | |
| 1051 LIRItem length(x->length(), this); | |
| 1052 // in case of patching (i.e., object class is not yet loaded), we need to reexecute the instruction | |
| 1053 // and therefore provide the state before the parameters have been consumed | |
| 1054 CodeEmitInfo* patching_info = NULL; | |
| 1055 if (!x->klass()->is_loaded() || PatchALot) { | |
| 1056 patching_info = state_for(x, x->state_before()); | |
| 1057 } | |
| 1058 | |
| 1059 CodeEmitInfo* info = state_for(x, x->state()); | |
| 1060 | |
| 1061 const LIR_Opr reg = result_register_for(x->type()); | |
| 1062 LIR_Opr tmp1 = FrameMap::rcx_oop_opr; | |
| 1063 LIR_Opr tmp2 = FrameMap::rsi_oop_opr; | |
| 1064 LIR_Opr tmp3 = FrameMap::rdi_oop_opr; | |
| 1065 LIR_Opr tmp4 = reg; | |
| 1066 LIR_Opr klass_reg = FrameMap::rdx_oop_opr; | |
| 1067 | |
| 1068 length.load_item_force(FrameMap::rbx_opr); | |
| 1069 LIR_Opr len = length.result(); | |
| 1070 | |
| 1071 CodeStub* slow_path = new NewObjectArrayStub(klass_reg, len, reg, info); | |
| 1072 ciObject* obj = (ciObject*) ciObjArrayKlass::make(x->klass()); | |
| 1073 if (obj == ciEnv::unloaded_ciobjarrayklass()) { | |
| 1074 BAILOUT("encountered unloaded_ciobjarrayklass due to out of memory error"); | |
| 1075 } | |
| 1076 jobject2reg_with_patching(klass_reg, obj, patching_info); | |
| 1077 __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, T_OBJECT, klass_reg, slow_path); | |
| 1078 | |
| 1079 LIR_Opr result = rlock_result(x); | |
| 1080 __ move(reg, result); | |
| 1081 } | |
| 1082 | |
| 1083 | |
| 1084 void LIRGenerator::do_NewMultiArray(NewMultiArray* x) { | |
| 1085 Values* dims = x->dims(); | |
| 1086 int i = dims->length(); | |
| 1087 LIRItemList* items = new LIRItemList(dims->length(), NULL); | |
| 1088 while (i-- > 0) { | |
| 1089 LIRItem* size = new LIRItem(dims->at(i), this); | |
| 1090 items->at_put(i, size); | |
| 1091 } | |
| 1092 | |
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1093 // Evaluate state_for early since it may emit code. |
| 0 | 1094 CodeEmitInfo* patching_info = NULL; |
| 1095 if (!x->klass()->is_loaded() || PatchALot) { | |
| 1096 patching_info = state_for(x, x->state_before()); | |
| 1097 | |
| 1098 // cannot re-use same xhandlers for multiple CodeEmitInfos, so | |
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1099 // clone all handlers. This is handled transparently in other |
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1100 // places by the CodeEmitInfo cloning logic but is handled |
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1101 // specially here because a stub isn't being used. |
| 0 | 1102 x->set_exception_handlers(new XHandlers(x->exception_handlers())); |
| 1103 } | |
| 1104 CodeEmitInfo* info = state_for(x, x->state()); | |
| 1105 | |
| 1106 i = dims->length(); | |
| 1107 while (i-- > 0) { | |
| 1108 LIRItem* size = items->at(i); | |
| 1109 size->load_nonconstant(); | |
| 1110 | |
| 1111 store_stack_parameter(size->result(), in_ByteSize(i*4)); | |
| 1112 } | |
| 1113 | |
| 1114 LIR_Opr reg = result_register_for(x->type()); | |
| 1115 jobject2reg_with_patching(reg, x->klass(), patching_info); | |
| 1116 | |
| 1117 LIR_Opr rank = FrameMap::rbx_opr; | |
| 1118 __ move(LIR_OprFact::intConst(x->rank()), rank); | |
| 1119 LIR_Opr varargs = FrameMap::rcx_opr; | |
| 1120 __ move(FrameMap::rsp_opr, varargs); | |
| 1121 LIR_OprList* args = new LIR_OprList(3); | |
| 1122 args->append(reg); | |
| 1123 args->append(rank); | |
| 1124 args->append(varargs); | |
| 1125 __ call_runtime(Runtime1::entry_for(Runtime1::new_multi_array_id), | |
| 1126 LIR_OprFact::illegalOpr, | |
| 1127 reg, args, info); | |
| 1128 | |
| 1129 LIR_Opr result = rlock_result(x); | |
| 1130 __ move(reg, result); | |
| 1131 } | |
| 1132 | |
| 1133 | |
| 1134 void LIRGenerator::do_BlockBegin(BlockBegin* x) { | |
| 1135 // nothing to do for now | |
| 1136 } | |
| 1137 | |
| 1138 | |
| 1139 void LIRGenerator::do_CheckCast(CheckCast* x) { | |
| 1140 LIRItem obj(x->obj(), this); | |
| 1141 | |
| 1142 CodeEmitInfo* patching_info = NULL; | |
| 1143 if (!x->klass()->is_loaded() || (PatchALot && !x->is_incompatible_class_change_check())) { | |
| 1144 // must do this before locking the destination register as an oop register, | |
| 1145 // and before the obj is loaded (the latter is for deoptimization) | |
| 1146 patching_info = state_for(x, x->state_before()); | |
| 1147 } | |
| 1148 obj.load_item(); | |
| 1149 | |
| 1150 // info for exceptions | |
| 1819 | 1151 CodeEmitInfo* info_for_exception = state_for(x); |
| 0 | 1152 |
| 1153 CodeStub* stub; | |
| 1154 if (x->is_incompatible_class_change_check()) { | |
| 1155 assert(patching_info == NULL, "can't patch this"); | |
| 1156 stub = new SimpleExceptionStub(Runtime1::throw_incompatible_class_change_error_id, LIR_OprFact::illegalOpr, info_for_exception); | |
| 1157 } else { | |
| 1158 stub = new SimpleExceptionStub(Runtime1::throw_class_cast_exception_id, obj.result(), info_for_exception); | |
| 1159 } | |
| 1160 LIR_Opr reg = rlock_result(x); | |
| 2002 | 1161 LIR_Opr tmp3 = LIR_OprFact::illegalOpr; |
| 1162 if (!x->klass()->is_loaded() || UseCompressedOops) { | |
| 1163 tmp3 = new_register(objectType); | |
| 1164 } | |
| 0 | 1165 __ checkcast(reg, obj.result(), x->klass(), |
| 2002 | 1166 new_register(objectType), new_register(objectType), tmp3, |
| 0 | 1167 x->direct_compare(), info_for_exception, patching_info, stub, |
| 1168 x->profiled_method(), x->profiled_bci()); | |
| 1169 } | |
| 1170 | |
| 1171 | |
| 1172 void LIRGenerator::do_InstanceOf(InstanceOf* x) { | |
| 1173 LIRItem obj(x->obj(), this); | |
| 1174 | |
| 1175 // result and test object may not be in same register | |
| 1176 LIR_Opr reg = rlock_result(x); | |
| 1177 CodeEmitInfo* patching_info = NULL; | |
| 1178 if ((!x->klass()->is_loaded() || PatchALot)) { | |
| 1179 // must do this before locking the destination register as an oop register | |
| 1180 patching_info = state_for(x, x->state_before()); | |
| 1181 } | |
| 1182 obj.load_item(); | |
| 2002 | 1183 LIR_Opr tmp3 = LIR_OprFact::illegalOpr; |
| 1184 if (!x->klass()->is_loaded() || UseCompressedOops) { | |
| 1185 tmp3 = new_register(objectType); | |
| 1186 } | |
| 0 | 1187 __ instanceof(reg, obj.result(), x->klass(), |
| 2002 | 1188 new_register(objectType), new_register(objectType), tmp3, |
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1189 x->direct_compare(), patching_info, x->profiled_method(), x->profiled_bci()); |
| 0 | 1190 } |
| 1191 | |
| 1192 | |
| 1193 void LIRGenerator::do_If(If* x) { | |
| 1194 assert(x->number_of_sux() == 2, "inconsistency"); | |
| 1195 ValueTag tag = x->x()->type()->tag(); | |
| 1196 bool is_safepoint = x->is_safepoint(); | |
| 1197 | |
| 1198 If::Condition cond = x->cond(); | |
| 1199 | |
| 1200 LIRItem xitem(x->x(), this); | |
| 1201 LIRItem yitem(x->y(), this); | |
| 1202 LIRItem* xin = &xitem; | |
| 1203 LIRItem* yin = &yitem; | |
| 1204 | |
| 1205 if (tag == longTag) { | |
| 1206 // for longs, only conditions "eql", "neq", "lss", "geq" are valid; | |
| 1207 // mirror for other conditions | |
| 1208 if (cond == If::gtr || cond == If::leq) { | |
| 1209 cond = Instruction::mirror(cond); | |
| 1210 xin = &yitem; | |
| 1211 yin = &xitem; | |
| 1212 } | |
| 1213 xin->set_destroys_register(); | |
| 1214 } | |
| 1215 xin->load_item(); | |
| 1216 if (tag == longTag && yin->is_constant() && yin->get_jlong_constant() == 0 && (cond == If::eql || cond == If::neq)) { | |
| 1217 // inline long zero | |
| 1218 yin->dont_load_item(); | |
| 1219 } else if (tag == longTag || tag == floatTag || tag == doubleTag) { | |
| 1220 // longs cannot handle constants at right side | |
| 1221 yin->load_item(); | |
| 1222 } else { | |
| 1223 yin->dont_load_item(); | |
| 1224 } | |
| 1225 | |
| 1226 // add safepoint before generating condition code so it can be recomputed | |
| 1227 if (x->is_safepoint()) { | |
| 1228 // increment backedge counter if needed | |
| 1783 | 1229 increment_backedge_counter(state_for(x, x->state_before()), x->profiled_bci()); |
| 0 | 1230 __ safepoint(LIR_OprFact::illegalOpr, state_for(x, x->state_before())); |
| 1231 } | |
| 1232 set_no_result(x); | |
| 1233 | |
| 1234 LIR_Opr left = xin->result(); | |
| 1235 LIR_Opr right = yin->result(); | |
| 1236 __ cmp(lir_cond(cond), left, right); | |
| 1783 | 1237 // Generate branch profiling. Profiling code doesn't kill flags. |
| 0 | 1238 profile_branch(x, cond); |
| 1239 move_to_phi(x->state()); | |
| 1240 if (x->x()->type()->is_float_kind()) { | |
| 1241 __ branch(lir_cond(cond), right->type(), x->tsux(), x->usux()); | |
| 1242 } else { | |
| 1243 __ branch(lir_cond(cond), right->type(), x->tsux()); | |
| 1244 } | |
| 1245 assert(x->default_sux() == x->fsux(), "wrong destination above"); | |
| 1246 __ jump(x->default_sux()); | |
| 1247 } | |
| 1248 | |
| 1249 | |
| 1250 LIR_Opr LIRGenerator::getThreadPointer() { | |
| 304 | 1251 #ifdef _LP64 |
| 1252 return FrameMap::as_pointer_opr(r15_thread); | |
| 1253 #else | |
| 0 | 1254 LIR_Opr result = new_register(T_INT); |
| 1255 __ get_thread(result); | |
| 1256 return result; | |
| 304 | 1257 #endif // |
| 0 | 1258 } |
| 1259 | |
| 1260 void LIRGenerator::trace_block_entry(BlockBegin* block) { | |
| 1261 store_stack_parameter(LIR_OprFact::intConst(block->block_id()), in_ByteSize(0)); | |
| 1262 LIR_OprList* args = new LIR_OprList(); | |
| 1263 address func = CAST_FROM_FN_PTR(address, Runtime1::trace_block_entry); | |
| 1264 __ call_runtime_leaf(func, LIR_OprFact::illegalOpr, LIR_OprFact::illegalOpr, args); | |
| 1265 } | |
| 1266 | |
| 1267 | |
| 1268 void LIRGenerator::volatile_field_store(LIR_Opr value, LIR_Address* address, | |
| 1269 CodeEmitInfo* info) { | |
| 1270 if (address->type() == T_LONG) { | |
| 1271 address = new LIR_Address(address->base(), | |
| 1272 address->index(), address->scale(), | |
| 1273 address->disp(), T_DOUBLE); | |
| 1274 // Transfer the value atomically by using FP moves. This means | |
| 1275 // the value has to be moved between CPU and FPU registers. It | |
| 1276 // always has to be moved through spill slot since there's no | |
| 1277 // quick way to pack the value into an SSE register. | |
| 1278 LIR_Opr temp_double = new_register(T_DOUBLE); | |
| 1279 LIR_Opr spill = new_register(T_LONG); | |
| 1280 set_vreg_flag(spill, must_start_in_memory); | |
| 1281 __ move(value, spill); | |
| 1282 __ volatile_move(spill, temp_double, T_LONG); | |
| 1283 __ volatile_move(temp_double, LIR_OprFact::address(address), T_LONG, info); | |
| 1284 } else { | |
| 1285 __ store(value, address, info); | |
| 1286 } | |
| 1287 } | |
| 1288 | |
| 1289 | |
| 1290 | |
| 1291 void LIRGenerator::volatile_field_load(LIR_Address* address, LIR_Opr result, | |
| 1292 CodeEmitInfo* info) { | |
| 1293 if (address->type() == T_LONG) { | |
| 1294 address = new LIR_Address(address->base(), | |
| 1295 address->index(), address->scale(), | |
| 1296 address->disp(), T_DOUBLE); | |
| 1297 // Transfer the value atomically by using FP moves. This means | |
| 1298 // the value has to be moved between CPU and FPU registers. In | |
| 1299 // SSE0 and SSE1 mode it has to be moved through spill slot but in | |
| 1300 // SSE2+ mode it can be moved directly. | |
| 1301 LIR_Opr temp_double = new_register(T_DOUBLE); | |
| 1302 __ volatile_move(LIR_OprFact::address(address), temp_double, T_LONG, info); | |
| 1303 __ volatile_move(temp_double, result, T_LONG); | |
| 1304 if (UseSSE < 2) { | |
| 1305 // no spill slot needed in SSE2 mode because xmm->cpu register move is possible | |
| 1306 set_vreg_flag(result, must_start_in_memory); | |
| 1307 } | |
| 1308 } else { | |
| 1309 __ load(address, result, info); | |
| 1310 } | |
| 1311 } | |
| 1312 | |
| 1313 void LIRGenerator::get_Object_unsafe(LIR_Opr dst, LIR_Opr src, LIR_Opr offset, | |
| 1314 BasicType type, bool is_volatile) { | |
| 1315 if (is_volatile && type == T_LONG) { | |
| 1316 LIR_Address* addr = new LIR_Address(src, offset, T_DOUBLE); | |
| 1317 LIR_Opr tmp = new_register(T_DOUBLE); | |
| 1318 __ load(addr, tmp); | |
| 1319 LIR_Opr spill = new_register(T_LONG); | |
| 1320 set_vreg_flag(spill, must_start_in_memory); | |
| 1321 __ move(tmp, spill); | |
| 1322 __ move(spill, dst); | |
| 1323 } else { | |
| 1324 LIR_Address* addr = new LIR_Address(src, offset, type); | |
| 1325 __ load(addr, dst); | |
| 1326 } | |
| 1327 } | |
| 1328 | |
| 1329 | |
| 1330 void LIRGenerator::put_Object_unsafe(LIR_Opr src, LIR_Opr offset, LIR_Opr data, | |
| 1331 BasicType type, bool is_volatile) { | |
| 1332 if (is_volatile && type == T_LONG) { | |
| 1333 LIR_Address* addr = new LIR_Address(src, offset, T_DOUBLE); | |
| 1334 LIR_Opr tmp = new_register(T_DOUBLE); | |
| 1335 LIR_Opr spill = new_register(T_DOUBLE); | |
| 1336 set_vreg_flag(spill, must_start_in_memory); | |
| 1337 __ move(data, spill); | |
| 1338 __ move(spill, tmp); | |
| 1339 __ move(tmp, addr); | |
| 1340 } else { | |
| 1341 LIR_Address* addr = new LIR_Address(src, offset, type); | |
| 1342 bool is_obj = (type == T_ARRAY || type == T_OBJECT); | |
| 1343 if (is_obj) { | |
|
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1344 // Do the pre-write barrier, if any. |
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1345 pre_barrier(LIR_OprFact::address(addr), LIR_OprFact::illegalOpr /* pre_val */, |
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1346 true /* do_load */, false /* patch */, NULL); |
| 0 | 1347 __ move(data, addr); |
| 1348 assert(src->is_register(), "must be register"); | |
| 1349 // Seems to be a precise address | |
| 1350 post_barrier(LIR_OprFact::address(addr), data); | |
| 1351 } else { | |
| 1352 __ move(data, addr); | |
| 1353 } | |
| 1354 } | |
| 1355 } |