Mercurial > hg > truffle
annotate src/cpu/sparc/vm/sharedRuntime_sparc.cpp @ 18177:89f97291c3a5
Hotspot: Support narrow oop relocations in constants section.
author | Roland Schatz <roland.schatz@oracle.com> |
---|---|
date | Mon, 27 Oct 2014 14:24:02 +0100 |
parents | 2a69cbe850a8 |
children | 33a783b15758 |
rev | line source |
---|---|
0 | 1 /* |
14223
de6a9e811145
8029233: Update copyright year to match last edit in jdk8 hotspot repository for 2013
mikael
parents:
13071
diff
changeset
|
2 * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. |
0 | 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
4 * | |
5 * This code is free software; you can redistribute it and/or modify it | |
6 * under the terms of the GNU General Public License version 2 only, as | |
7 * published by the Free Software Foundation. | |
8 * | |
9 * This code is distributed in the hope that it will be useful, but WITHOUT | |
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
12 * version 2 for more details (a copy is included in the LICENSE file that | |
13 * accompanied this code). | |
14 * | |
15 * You should have received a copy of the GNU General Public License version | |
16 * 2 along with this work; if not, write to the Free Software Foundation, | |
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
18 * | |
1552
c18cbe5936b8
6941466: Oracle rebranding changes for Hotspot repositories
trims
parents:
1506
diff
changeset
|
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
c18cbe5936b8
6941466: Oracle rebranding changes for Hotspot repositories
trims
parents:
1506
diff
changeset
|
20 * or visit www.oracle.com if you need additional information or have any |
c18cbe5936b8
6941466: Oracle rebranding changes for Hotspot repositories
trims
parents:
1506
diff
changeset
|
21 * questions. |
0 | 22 * |
23 */ | |
24 | |
1972 | 25 #include "precompiled.hpp" |
7204
f0c2369fda5a
8003250: SPARC: move MacroAssembler into separate file
twisti
parents:
6940
diff
changeset
|
26 #include "asm/macroAssembler.inline.hpp" |
1972 | 27 #include "code/debugInfoRec.hpp" |
28 #include "code/icBuffer.hpp" | |
29 #include "code/vtableStubs.hpp" | |
30 #include "interpreter/interpreter.hpp" | |
6725
da91efe96a93
6964458: Reimplement class meta-data storage to use native memory
coleenp
parents:
6266
diff
changeset
|
31 #include "oops/compiledICHolder.hpp" |
1972 | 32 #include "prims/jvmtiRedefineClassesTrace.hpp" |
33 #include "runtime/sharedRuntime.hpp" | |
34 #include "runtime/vframeArray.hpp" | |
35 #include "vmreg_sparc.inline.hpp" | |
36 #ifdef COMPILER1 | |
37 #include "c1/c1_Runtime1.hpp" | |
38 #endif | |
39 #ifdef COMPILER2 | |
40 #include "opto/runtime.hpp" | |
41 #endif | |
42 #ifdef SHARK | |
43 #include "compiler/compileBroker.hpp" | |
44 #include "shark/sharkCompiler.hpp" | |
45 #endif | |
16326
51f392557124
[SPARC] Improving implicit exception handling on sparc
Stefan Anzinger <stefan.anzinger@gmail.com>
parents:
16307
diff
changeset
|
46 #ifdef GRAAL |
51f392557124
[SPARC] Improving implicit exception handling on sparc
Stefan Anzinger <stefan.anzinger@gmail.com>
parents:
16307
diff
changeset
|
47 #include "graal/graalJavaAccess.hpp" |
51f392557124
[SPARC] Improving implicit exception handling on sparc
Stefan Anzinger <stefan.anzinger@gmail.com>
parents:
16307
diff
changeset
|
48 #endif |
0 | 49 |
50 #define __ masm-> | |
51 | |
52 | |
53 class RegisterSaver { | |
54 | |
55 // Used for saving volatile registers. This is Gregs, Fregs, I/L/O. | |
56 // The Oregs are problematic. In the 32bit build the compiler can | |
57 // have O registers live with 64 bit quantities. A window save will | |
58 // cut the heads off of the registers. We have to do a very extensive | |
59 // stack dance to save and restore these properly. | |
60 | |
61 // Note that the Oregs problem only exists if we block at either a polling | |
62 // page exception a compiled code safepoint that was not originally a call | |
63 // or deoptimize following one of these kinds of safepoints. | |
64 | |
65 // Lots of registers to save. For all builds, a window save will preserve | |
66 // the %i and %l registers. For the 32-bit longs-in-two entries and 64-bit | |
67 // builds a window-save will preserve the %o registers. In the LION build | |
68 // we need to save the 64-bit %o registers which requires we save them | |
69 // before the window-save (as then they become %i registers and get their | |
70 // heads chopped off on interrupt). We have to save some %g registers here | |
71 // as well. | |
72 enum { | |
73 // This frame's save area. Includes extra space for the native call: | |
74 // vararg's layout space and the like. Briefly holds the caller's | |
75 // register save area. | |
76 call_args_area = frame::register_save_words_sp_offset + | |
77 frame::memory_parameter_word_sp_offset*wordSize, | |
78 // Make sure save locations are always 8 byte aligned. | |
79 // can't use round_to because it doesn't produce compile time constant | |
80 start_of_extra_save_area = ((call_args_area + 7) & ~7), | |
81 g1_offset = start_of_extra_save_area, // g-regs needing saving | |
82 g3_offset = g1_offset+8, | |
83 g4_offset = g3_offset+8, | |
84 g5_offset = g4_offset+8, | |
85 o0_offset = g5_offset+8, | |
86 o1_offset = o0_offset+8, | |
87 o2_offset = o1_offset+8, | |
88 o3_offset = o2_offset+8, | |
89 o4_offset = o3_offset+8, | |
90 o5_offset = o4_offset+8, | |
91 start_of_flags_save_area = o5_offset+8, | |
92 ccr_offset = start_of_flags_save_area, | |
93 fsr_offset = ccr_offset + 8, | |
94 d00_offset = fsr_offset+8, // Start of float save area | |
95 register_save_size = d00_offset+8*32 | |
96 }; | |
97 | |
98 | |
99 public: | |
100 | |
101 static int Oexception_offset() { return o0_offset; }; | |
102 static int G3_offset() { return g3_offset; }; | |
103 static int G5_offset() { return g5_offset; }; | |
104 static OopMap* save_live_registers(MacroAssembler* masm, int additional_frame_words, int* total_frame_words); | |
105 static void restore_live_registers(MacroAssembler* masm); | |
106 | |
107 // During deoptimization only the result register need to be restored | |
108 // all the other values have already been extracted. | |
109 | |
110 static void restore_result_registers(MacroAssembler* masm); | |
111 }; | |
112 | |
113 OopMap* RegisterSaver::save_live_registers(MacroAssembler* masm, int additional_frame_words, int* total_frame_words) { | |
114 // Record volatile registers as callee-save values in an OopMap so their save locations will be | |
115 // propagated to the caller frame's RegisterMap during StackFrameStream construction (needed for | |
116 // deoptimization; see compiledVFrame::create_stack_value). The caller's I, L and O registers | |
117 // are saved in register windows - I's and L's in the caller's frame and O's in the stub frame | |
118 // (as the stub's I's) when the runtime routine called by the stub creates its frame. | |
119 int i; | |
1007
1ce3281a8e93
6880034: SIGBUS during deoptimisation at a safepoint on 64bit-SPARC
kvn
parents:
1006
diff
changeset
|
120 // Always make the frame size 16 byte aligned. |
0 | 121 int frame_size = round_to(additional_frame_words + register_save_size, 16); |
122 // OopMap frame size is in c2 stack slots (sizeof(jint)) not bytes or words | |
123 int frame_size_in_slots = frame_size / sizeof(jint); | |
124 // CodeBlob frame size is in words. | |
125 *total_frame_words = frame_size / wordSize; | |
126 // OopMap* map = new OopMap(*total_frame_words, 0); | |
127 OopMap* map = new OopMap(frame_size_in_slots, 0); | |
128 | |
129 #if !defined(_LP64) | |
130 | |
131 // Save 64-bit O registers; they will get their heads chopped off on a 'save'. | |
132 __ stx(O0, G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+0*8); | |
133 __ stx(O1, G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+1*8); | |
134 __ stx(O2, G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+2*8); | |
135 __ stx(O3, G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+3*8); | |
136 __ stx(O4, G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+4*8); | |
137 __ stx(O5, G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+5*8); | |
138 #endif /* _LP64 */ | |
139 | |
140 __ save(SP, -frame_size, SP); | |
141 | |
142 #ifndef _LP64 | |
143 // Reload the 64 bit Oregs. Although they are now Iregs we load them | |
144 // to Oregs here to avoid interrupts cutting off their heads | |
145 | |
146 __ ldx(G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+0*8, O0); | |
147 __ ldx(G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+1*8, O1); | |
148 __ ldx(G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+2*8, O2); | |
149 __ ldx(G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+3*8, O3); | |
150 __ ldx(G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+4*8, O4); | |
151 __ ldx(G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+5*8, O5); | |
152 | |
153 __ stx(O0, SP, o0_offset+STACK_BIAS); | |
154 map->set_callee_saved(VMRegImpl::stack2reg((o0_offset + 4)>>2), O0->as_VMReg()); | |
155 | |
156 __ stx(O1, SP, o1_offset+STACK_BIAS); | |
157 | |
158 map->set_callee_saved(VMRegImpl::stack2reg((o1_offset + 4)>>2), O1->as_VMReg()); | |
159 | |
160 __ stx(O2, SP, o2_offset+STACK_BIAS); | |
161 map->set_callee_saved(VMRegImpl::stack2reg((o2_offset + 4)>>2), O2->as_VMReg()); | |
162 | |
163 __ stx(O3, SP, o3_offset+STACK_BIAS); | |
164 map->set_callee_saved(VMRegImpl::stack2reg((o3_offset + 4)>>2), O3->as_VMReg()); | |
165 | |
166 __ stx(O4, SP, o4_offset+STACK_BIAS); | |
167 map->set_callee_saved(VMRegImpl::stack2reg((o4_offset + 4)>>2), O4->as_VMReg()); | |
168 | |
169 __ stx(O5, SP, o5_offset+STACK_BIAS); | |
170 map->set_callee_saved(VMRegImpl::stack2reg((o5_offset + 4)>>2), O5->as_VMReg()); | |
171 #endif /* _LP64 */ | |
172 | |
113
ba764ed4b6f2
6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents:
0
diff
changeset
|
173 |
ba764ed4b6f2
6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents:
0
diff
changeset
|
174 #ifdef _LP64 |
ba764ed4b6f2
6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents:
0
diff
changeset
|
175 int debug_offset = 0; |
ba764ed4b6f2
6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents:
0
diff
changeset
|
176 #else |
ba764ed4b6f2
6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents:
0
diff
changeset
|
177 int debug_offset = 4; |
ba764ed4b6f2
6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents:
0
diff
changeset
|
178 #endif |
0 | 179 // Save the G's |
180 __ stx(G1, SP, g1_offset+STACK_BIAS); | |
113
ba764ed4b6f2
6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents:
0
diff
changeset
|
181 map->set_callee_saved(VMRegImpl::stack2reg((g1_offset + debug_offset)>>2), G1->as_VMReg()); |
0 | 182 |
183 __ stx(G3, SP, g3_offset+STACK_BIAS); | |
113
ba764ed4b6f2
6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents:
0
diff
changeset
|
184 map->set_callee_saved(VMRegImpl::stack2reg((g3_offset + debug_offset)>>2), G3->as_VMReg()); |
0 | 185 |
186 __ stx(G4, SP, g4_offset+STACK_BIAS); | |
113
ba764ed4b6f2
6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents:
0
diff
changeset
|
187 map->set_callee_saved(VMRegImpl::stack2reg((g4_offset + debug_offset)>>2), G4->as_VMReg()); |
0 | 188 |
189 __ stx(G5, SP, g5_offset+STACK_BIAS); | |
113
ba764ed4b6f2
6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents:
0
diff
changeset
|
190 map->set_callee_saved(VMRegImpl::stack2reg((g5_offset + debug_offset)>>2), G5->as_VMReg()); |
0 | 191 |
192 // This is really a waste but we'll keep things as they were for now | |
193 if (true) { | |
194 #ifndef _LP64 | |
195 map->set_callee_saved(VMRegImpl::stack2reg((o0_offset)>>2), O0->as_VMReg()->next()); | |
196 map->set_callee_saved(VMRegImpl::stack2reg((o1_offset)>>2), O1->as_VMReg()->next()); | |
197 map->set_callee_saved(VMRegImpl::stack2reg((o2_offset)>>2), O2->as_VMReg()->next()); | |
198 map->set_callee_saved(VMRegImpl::stack2reg((o3_offset)>>2), O3->as_VMReg()->next()); | |
199 map->set_callee_saved(VMRegImpl::stack2reg((o4_offset)>>2), O4->as_VMReg()->next()); | |
200 map->set_callee_saved(VMRegImpl::stack2reg((o5_offset)>>2), O5->as_VMReg()->next()); | |
201 map->set_callee_saved(VMRegImpl::stack2reg((g1_offset)>>2), G1->as_VMReg()->next()); | |
202 map->set_callee_saved(VMRegImpl::stack2reg((g3_offset)>>2), G3->as_VMReg()->next()); | |
203 map->set_callee_saved(VMRegImpl::stack2reg((g4_offset)>>2), G4->as_VMReg()->next()); | |
204 map->set_callee_saved(VMRegImpl::stack2reg((g5_offset)>>2), G5->as_VMReg()->next()); | |
113
ba764ed4b6f2
6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents:
0
diff
changeset
|
205 #endif /* _LP64 */ |
0 | 206 } |
207 | |
208 | |
209 // Save the flags | |
210 __ rdccr( G5 ); | |
211 __ stx(G5, SP, ccr_offset+STACK_BIAS); | |
212 __ stxfsr(SP, fsr_offset+STACK_BIAS); | |
213 | |
1007
1ce3281a8e93
6880034: SIGBUS during deoptimisation at a safepoint on 64bit-SPARC
kvn
parents:
1006
diff
changeset
|
214 // Save all the FP registers: 32 doubles (32 floats correspond to the 2 halves of the first 16 doubles) |
0 | 215 int offset = d00_offset; |
1007
1ce3281a8e93
6880034: SIGBUS during deoptimisation at a safepoint on 64bit-SPARC
kvn
parents:
1006
diff
changeset
|
216 for( int i=0; i<FloatRegisterImpl::number_of_registers; i+=2 ) { |
0 | 217 FloatRegister f = as_FloatRegister(i); |
218 __ stf(FloatRegisterImpl::D, f, SP, offset+STACK_BIAS); | |
1007
1ce3281a8e93
6880034: SIGBUS during deoptimisation at a safepoint on 64bit-SPARC
kvn
parents:
1006
diff
changeset
|
219 // Record as callee saved both halves of double registers (2 float registers). |
0 | 220 map->set_callee_saved(VMRegImpl::stack2reg(offset>>2), f->as_VMReg()); |
1007
1ce3281a8e93
6880034: SIGBUS during deoptimisation at a safepoint on 64bit-SPARC
kvn
parents:
1006
diff
changeset
|
221 map->set_callee_saved(VMRegImpl::stack2reg((offset + sizeof(float))>>2), f->as_VMReg()->next()); |
0 | 222 offset += sizeof(double); |
223 } | |
224 | |
225 // And we're done. | |
226 | |
227 return map; | |
228 } | |
229 | |
230 | |
231 // Pop the current frame and restore all the registers that we | |
232 // saved. | |
233 void RegisterSaver::restore_live_registers(MacroAssembler* masm) { | |
234 | |
235 // Restore all the FP registers | |
1007
1ce3281a8e93
6880034: SIGBUS during deoptimisation at a safepoint on 64bit-SPARC
kvn
parents:
1006
diff
changeset
|
236 for( int i=0; i<FloatRegisterImpl::number_of_registers; i+=2 ) { |
0 | 237 __ ldf(FloatRegisterImpl::D, SP, d00_offset+i*sizeof(float)+STACK_BIAS, as_FloatRegister(i)); |
238 } | |
239 | |
240 __ ldx(SP, ccr_offset+STACK_BIAS, G1); | |
241 __ wrccr (G1) ; | |
242 | |
243 // Restore the G's | |
244 // Note that G2 (AKA GThread) must be saved and restored separately. | |
245 // TODO-FIXME: save and restore some of the other ASRs, viz., %asi and %gsr. | |
246 | |
247 __ ldx(SP, g1_offset+STACK_BIAS, G1); | |
248 __ ldx(SP, g3_offset+STACK_BIAS, G3); | |
249 __ ldx(SP, g4_offset+STACK_BIAS, G4); | |
250 __ ldx(SP, g5_offset+STACK_BIAS, G5); | |
251 | |
252 | |
253 #if !defined(_LP64) | |
254 // Restore the 64-bit O's. | |
255 __ ldx(SP, o0_offset+STACK_BIAS, O0); | |
256 __ ldx(SP, o1_offset+STACK_BIAS, O1); | |
257 __ ldx(SP, o2_offset+STACK_BIAS, O2); | |
258 __ ldx(SP, o3_offset+STACK_BIAS, O3); | |
259 __ ldx(SP, o4_offset+STACK_BIAS, O4); | |
260 __ ldx(SP, o5_offset+STACK_BIAS, O5); | |
261 | |
262 // And temporarily place them in TLS | |
263 | |
264 __ stx(O0, G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+0*8); | |
265 __ stx(O1, G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+1*8); | |
266 __ stx(O2, G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+2*8); | |
267 __ stx(O3, G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+3*8); | |
268 __ stx(O4, G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+4*8); | |
269 __ stx(O5, G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+5*8); | |
270 #endif /* _LP64 */ | |
271 | |
272 // Restore flags | |
273 | |
274 __ ldxfsr(SP, fsr_offset+STACK_BIAS); | |
275 | |
276 __ restore(); | |
277 | |
278 #if !defined(_LP64) | |
279 // Now reload the 64bit Oregs after we've restore the window. | |
280 __ ldx(G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+0*8, O0); | |
281 __ ldx(G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+1*8, O1); | |
282 __ ldx(G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+2*8, O2); | |
283 __ ldx(G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+3*8, O3); | |
284 __ ldx(G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+4*8, O4); | |
285 __ ldx(G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+5*8, O5); | |
286 #endif /* _LP64 */ | |
287 | |
288 } | |
289 | |
290 // Pop the current frame and restore the registers that might be holding | |
291 // a result. | |
292 void RegisterSaver::restore_result_registers(MacroAssembler* masm) { | |
293 | |
294 #if !defined(_LP64) | |
295 // 32bit build returns longs in G1 | |
296 __ ldx(SP, g1_offset+STACK_BIAS, G1); | |
297 | |
298 // Retrieve the 64-bit O's. | |
299 __ ldx(SP, o0_offset+STACK_BIAS, O0); | |
300 __ ldx(SP, o1_offset+STACK_BIAS, O1); | |
301 // and save to TLS | |
302 __ stx(O0, G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+0*8); | |
303 __ stx(O1, G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+1*8); | |
304 #endif /* _LP64 */ | |
305 | |
306 __ ldf(FloatRegisterImpl::D, SP, d00_offset+STACK_BIAS, as_FloatRegister(0)); | |
307 | |
308 __ restore(); | |
309 | |
310 #if !defined(_LP64) | |
311 // Now reload the 64bit Oregs after we've restore the window. | |
312 __ ldx(G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+0*8, O0); | |
313 __ ldx(G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+1*8, O1); | |
314 #endif /* _LP64 */ | |
315 | |
316 } | |
317 | |
6792
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6790
diff
changeset
|
318 // Is vector's size (in bytes) bigger than a size saved by default? |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6790
diff
changeset
|
319 // 8 bytes FP registers are saved by default on SPARC. |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6790
diff
changeset
|
320 bool SharedRuntime::is_wide_vector(int size) { |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6790
diff
changeset
|
321 // Note, MaxVectorSize == 8 on SPARC. |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6790
diff
changeset
|
322 assert(size <= 8, err_msg_res("%d bytes vectors are not supported", size)); |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6790
diff
changeset
|
323 return size > 8; |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6790
diff
changeset
|
324 } |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6790
diff
changeset
|
325 |
0 | 326 // The java_calling_convention describes stack locations as ideal slots on |
327 // a frame with no abi restrictions. Since we must observe abi restrictions | |
328 // (like the placement of the register window) the slots must be biased by | |
329 // the following value. | |
330 static int reg2offset(VMReg r) { | |
331 return (r->reg2stack() + SharedRuntime::out_preserve_stack_slots()) * VMRegImpl::stack_slot_size; | |
332 } | |
333 | |
4873
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
334 static VMRegPair reg64_to_VMRegPair(Register r) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
335 VMRegPair ret; |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
336 if (wordSize == 8) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
337 ret.set2(r->as_VMReg()); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
338 } else { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
339 ret.set_pair(r->successor()->as_VMReg(), r->as_VMReg()); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
340 } |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
341 return ret; |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
342 } |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
343 |
0 | 344 // --------------------------------------------------------------------------- |
345 // Read the array of BasicTypes from a signature, and compute where the | |
346 // arguments should go. Values in the VMRegPair regs array refer to 4-byte (VMRegImpl::stack_slot_size) | |
347 // quantities. Values less than VMRegImpl::stack0 are registers, those above | |
348 // refer to 4-byte stack slots. All stack slots are based off of the window | |
349 // top. VMRegImpl::stack0 refers to the first slot past the 16-word window, | |
350 // and VMRegImpl::stack0+1 refers to the memory word 4-byes higher. Register | |
351 // values 0-63 (up to RegisterImpl::number_of_registers) are the 64-bit | |
352 // integer registers. Values 64-95 are the (32-bit only) float registers. | |
353 // Each 32-bit quantity is given its own number, so the integer registers | |
354 // (in either 32- or 64-bit builds) use 2 numbers. For example, there is | |
355 // an O0-low and an O0-high. Essentially, all int register numbers are doubled. | |
356 | |
357 // Register results are passed in O0-O5, for outgoing call arguments. To | |
358 // convert to incoming arguments, convert all O's to I's. The regs array | |
359 // refer to the low and hi 32-bit words of 64-bit registers or stack slots. | |
360 // If the regs[].second() field is set to VMRegImpl::Bad(), it means it's unused (a | |
361 // 32-bit value was passed). If both are VMRegImpl::Bad(), it means no value was | |
362 // passed (used as a placeholder for the other half of longs and doubles in | |
363 // the 64-bit build). regs[].second() is either VMRegImpl::Bad() or regs[].second() is | |
364 // regs[].first()+1 (regs[].first() may be misaligned in the C calling convention). | |
365 // Sparc never passes a value in regs[].second() but not regs[].first() (regs[].first() | |
366 // == VMRegImpl::Bad() && regs[].second() != VMRegImpl::Bad()) nor unrelated values in the | |
367 // same VMRegPair. | |
368 | |
369 // Note: the INPUTS in sig_bt are in units of Java argument words, which are | |
370 // either 32-bit or 64-bit depending on the build. The OUTPUTS are in 32-bit | |
371 // units regardless of build. | |
372 | |
373 | |
374 // --------------------------------------------------------------------------- | |
375 // The compiled Java calling convention. The Java convention always passes | |
376 // 64-bit values in adjacent aligned locations (either registers or stack), | |
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
377 // floats in float registers and doubles in aligned float pairs. There is |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
378 // no backing varargs store for values in registers. |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
379 // In the 32-bit build, longs are passed on the stack (cannot be |
0 | 380 // passed in I's, because longs in I's get their heads chopped off at |
381 // interrupt). | |
382 int SharedRuntime::java_calling_convention(const BasicType *sig_bt, | |
383 VMRegPair *regs, | |
384 int total_args_passed, | |
385 int is_outgoing) { | |
386 assert(F31->as_VMReg()->is_reg(), "overlapping stack/register numbers"); | |
387 | |
388 const int int_reg_max = SPARC_ARGS_IN_REGS_NUM; | |
389 const int flt_reg_max = 8; | |
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
390 |
0 | 391 int int_reg = 0; |
392 int flt_reg = 0; | |
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
393 int slot = 0; |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
394 |
0 | 395 for (int i = 0; i < total_args_passed; i++) { |
396 switch (sig_bt[i]) { | |
397 case T_INT: | |
398 case T_SHORT: | |
399 case T_CHAR: | |
400 case T_BYTE: | |
401 case T_BOOLEAN: | |
402 #ifndef _LP64 | |
403 case T_OBJECT: | |
404 case T_ARRAY: | |
405 case T_ADDRESS: // Used, e.g., in slow-path locking for the lock's stack address | |
406 #endif // _LP64 | |
407 if (int_reg < int_reg_max) { | |
408 Register r = is_outgoing ? as_oRegister(int_reg++) : as_iRegister(int_reg++); | |
409 regs[i].set1(r->as_VMReg()); | |
410 } else { | |
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
411 regs[i].set1(VMRegImpl::stack2reg(slot++)); |
0 | 412 } |
413 break; | |
414 | |
415 #ifdef _LP64 | |
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
416 case T_LONG: |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
417 assert(sig_bt[i+1] == T_VOID, "expecting VOID in other half"); |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
418 // fall-through |
0 | 419 case T_OBJECT: |
420 case T_ARRAY: | |
421 case T_ADDRESS: // Used, e.g., in slow-path locking for the lock's stack address | |
422 if (int_reg < int_reg_max) { | |
423 Register r = is_outgoing ? as_oRegister(int_reg++) : as_iRegister(int_reg++); | |
424 regs[i].set2(r->as_VMReg()); | |
425 } else { | |
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
426 slot = round_to(slot, 2); // align |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
427 regs[i].set2(VMRegImpl::stack2reg(slot)); |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
428 slot += 2; |
0 | 429 } |
430 break; | |
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
431 #else |
0 | 432 case T_LONG: |
433 assert(sig_bt[i+1] == T_VOID, "expecting VOID in other half"); | |
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
434 // On 32-bit SPARC put longs always on the stack to keep the pressure off |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
435 // integer argument registers. They should be used for oops. |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
436 slot = round_to(slot, 2); // align |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
437 regs[i].set2(VMRegImpl::stack2reg(slot)); |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
438 slot += 2; |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
439 #endif |
0 | 440 break; |
441 | |
442 case T_FLOAT: | |
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
443 if (flt_reg < flt_reg_max) { |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
444 FloatRegister r = as_FloatRegister(flt_reg++); |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
445 regs[i].set1(r->as_VMReg()); |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
446 } else { |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
447 regs[i].set1(VMRegImpl::stack2reg(slot++)); |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
448 } |
0 | 449 break; |
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
450 |
0 | 451 case T_DOUBLE: |
452 assert(sig_bt[i+1] == T_VOID, "expecting half"); | |
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
453 if (round_to(flt_reg, 2) + 1 < flt_reg_max) { |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
454 flt_reg = round_to(flt_reg, 2); // align |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
455 FloatRegister r = as_FloatRegister(flt_reg); |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
456 regs[i].set2(r->as_VMReg()); |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
457 flt_reg += 2; |
0 | 458 } else { |
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
459 slot = round_to(slot, 2); // align |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
460 regs[i].set2(VMRegImpl::stack2reg(slot)); |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
461 slot += 2; |
0 | 462 } |
463 break; | |
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
464 |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
465 case T_VOID: |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
466 regs[i].set_bad(); // Halves of longs & doubles |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
467 break; |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
468 |
0 | 469 default: |
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
470 fatal(err_msg_res("unknown basic type %d", sig_bt[i])); |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
471 break; |
0 | 472 } |
473 } | |
474 | |
475 // retun the amount of stack space these arguments will need. | |
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
476 return slot; |
0 | 477 } |
478 | |
1006
dcf03e02b020
6879902: CTW failure jdk6_18/hotspot/src/cpu/sparc/vm/assembler_sparc.hpp:845
twisti
parents:
727
diff
changeset
|
479 // Helper class mostly to avoid passing masm everywhere, and handle |
dcf03e02b020
6879902: CTW failure jdk6_18/hotspot/src/cpu/sparc/vm/assembler_sparc.hpp:845
twisti
parents:
727
diff
changeset
|
480 // store displacement overflow logic. |
0 | 481 class AdapterGenerator { |
482 MacroAssembler *masm; | |
483 Register Rdisp; | |
484 void set_Rdisp(Register r) { Rdisp = r; } | |
485 | |
486 void patch_callers_callsite(); | |
487 | |
488 // base+st_off points to top of argument | |
1506 | 489 int arg_offset(const int st_off) { return st_off; } |
0 | 490 int next_arg_offset(const int st_off) { |
1506 | 491 return st_off - Interpreter::stackElementSize; |
1006
dcf03e02b020
6879902: CTW failure jdk6_18/hotspot/src/cpu/sparc/vm/assembler_sparc.hpp:845
twisti
parents:
727
diff
changeset
|
492 } |
dcf03e02b020
6879902: CTW failure jdk6_18/hotspot/src/cpu/sparc/vm/assembler_sparc.hpp:845
twisti
parents:
727
diff
changeset
|
493 |
dcf03e02b020
6879902: CTW failure jdk6_18/hotspot/src/cpu/sparc/vm/assembler_sparc.hpp:845
twisti
parents:
727
diff
changeset
|
494 // Argument slot values may be loaded first into a register because |
dcf03e02b020
6879902: CTW failure jdk6_18/hotspot/src/cpu/sparc/vm/assembler_sparc.hpp:845
twisti
parents:
727
diff
changeset
|
495 // they might not fit into displacement. |
dcf03e02b020
6879902: CTW failure jdk6_18/hotspot/src/cpu/sparc/vm/assembler_sparc.hpp:845
twisti
parents:
727
diff
changeset
|
496 RegisterOrConstant arg_slot(const int st_off); |
dcf03e02b020
6879902: CTW failure jdk6_18/hotspot/src/cpu/sparc/vm/assembler_sparc.hpp:845
twisti
parents:
727
diff
changeset
|
497 RegisterOrConstant next_arg_slot(const int st_off); |
dcf03e02b020
6879902: CTW failure jdk6_18/hotspot/src/cpu/sparc/vm/assembler_sparc.hpp:845
twisti
parents:
727
diff
changeset
|
498 |
0 | 499 // Stores long into offset pointed to by base |
500 void store_c2i_long(Register r, Register base, | |
501 const int st_off, bool is_stack); | |
502 void store_c2i_object(Register r, Register base, | |
503 const int st_off); | |
504 void store_c2i_int(Register r, Register base, | |
505 const int st_off); | |
506 void store_c2i_double(VMReg r_2, | |
507 VMReg r_1, Register base, const int st_off); | |
508 void store_c2i_float(FloatRegister f, Register base, | |
509 const int st_off); | |
510 | |
511 public: | |
512 void gen_c2i_adapter(int total_args_passed, | |
513 // VMReg max_arg, | |
514 int comp_args_on_stack, // VMRegStackSlots | |
515 const BasicType *sig_bt, | |
516 const VMRegPair *regs, | |
517 Label& skip_fixup); | |
518 void gen_i2c_adapter(int total_args_passed, | |
17033
2d6dd2eebd51
Fixed HSAIL deopt
Tom Rodriguez <tom.rodriguez@oracle.com>
parents:
16941
diff
changeset
|
519 // VMReg max_arg, |
2d6dd2eebd51
Fixed HSAIL deopt
Tom Rodriguez <tom.rodriguez@oracle.com>
parents:
16941
diff
changeset
|
520 int comp_args_on_stack, // VMRegStackSlots |
2d6dd2eebd51
Fixed HSAIL deopt
Tom Rodriguez <tom.rodriguez@oracle.com>
parents:
16941
diff
changeset
|
521 const BasicType *sig_bt, |
2d6dd2eebd51
Fixed HSAIL deopt
Tom Rodriguez <tom.rodriguez@oracle.com>
parents:
16941
diff
changeset
|
522 const VMRegPair *regs, |
2d6dd2eebd51
Fixed HSAIL deopt
Tom Rodriguez <tom.rodriguez@oracle.com>
parents:
16941
diff
changeset
|
523 int frame_extension_argument = -1); |
0 | 524 |
525 AdapterGenerator(MacroAssembler *_masm) : masm(_masm) {} | |
526 }; | |
527 | |
528 | |
529 // Patch the callers callsite with entry to compiled code if it exists. | |
530 void AdapterGenerator::patch_callers_callsite() { | |
531 Label L; | |
6725
da91efe96a93
6964458: Reimplement class meta-data storage to use native memory
coleenp
parents:
6266
diff
changeset
|
532 __ ld_ptr(G5_method, in_bytes(Method::code_offset()), G3_scratch); |
3839 | 533 __ br_null(G3_scratch, false, Assembler::pt, L); |
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
534 __ delayed()->nop(); |
0 | 535 // Call into the VM to patch the caller, then jump to compiled callee |
536 __ save_frame(4); // Args in compiled layout; do not blow them | |
537 | |
538 // Must save all the live Gregs the list is: | |
539 // G1: 1st Long arg (32bit build) | |
540 // G2: global allocated to TLS | |
541 // G3: used in inline cache check (scratch) | |
542 // G4: 2nd Long arg (32bit build); | |
6725
da91efe96a93
6964458: Reimplement class meta-data storage to use native memory
coleenp
parents:
6266
diff
changeset
|
543 // G5: used in inline cache check (Method*) |
0 | 544 |
545 // The longs must go to the stack by hand since in the 32 bit build they can be trashed by window ops. | |
546 | |
547 #ifdef _LP64 | |
548 // mov(s,d) | |
549 __ mov(G1, L1); | |
550 __ mov(G4, L4); | |
551 __ mov(G5_method, L5); | |
552 __ mov(G5_method, O0); // VM needs target method | |
553 __ mov(I7, O1); // VM needs caller's callsite | |
554 // Must be a leaf call... | |
555 // can be very far once the blob has been relocated | |
727 | 556 AddressLiteral dest(CAST_FROM_FN_PTR(address, SharedRuntime::fixup_callers_callsite)); |
0 | 557 __ relocate(relocInfo::runtime_call_type); |
727 | 558 __ jumpl_to(dest, O7, O7); |
0 | 559 __ delayed()->mov(G2_thread, L7_thread_cache); |
560 __ mov(L7_thread_cache, G2_thread); | |
561 __ mov(L1, G1); | |
562 __ mov(L4, G4); | |
563 __ mov(L5, G5_method); | |
564 #else | |
565 __ stx(G1, FP, -8 + STACK_BIAS); | |
566 __ stx(G4, FP, -16 + STACK_BIAS); | |
567 __ mov(G5_method, L5); | |
568 __ mov(G5_method, O0); // VM needs target method | |
569 __ mov(I7, O1); // VM needs caller's callsite | |
570 // Must be a leaf call... | |
571 __ call(CAST_FROM_FN_PTR(address, SharedRuntime::fixup_callers_callsite), relocInfo::runtime_call_type); | |
572 __ delayed()->mov(G2_thread, L7_thread_cache); | |
573 __ mov(L7_thread_cache, G2_thread); | |
574 __ ldx(FP, -8 + STACK_BIAS, G1); | |
575 __ ldx(FP, -16 + STACK_BIAS, G4); | |
576 __ mov(L5, G5_method); | |
577 #endif /* _LP64 */ | |
578 | |
579 __ restore(); // Restore args | |
580 __ bind(L); | |
581 } | |
582 | |
1006
dcf03e02b020
6879902: CTW failure jdk6_18/hotspot/src/cpu/sparc/vm/assembler_sparc.hpp:845
twisti
parents:
727
diff
changeset
|
583 |
dcf03e02b020
6879902: CTW failure jdk6_18/hotspot/src/cpu/sparc/vm/assembler_sparc.hpp:845
twisti
parents:
727
diff
changeset
|
584 RegisterOrConstant AdapterGenerator::arg_slot(const int st_off) { |
dcf03e02b020
6879902: CTW failure jdk6_18/hotspot/src/cpu/sparc/vm/assembler_sparc.hpp:845
twisti
parents:
727
diff
changeset
|
585 RegisterOrConstant roc(arg_offset(st_off)); |
dcf03e02b020
6879902: CTW failure jdk6_18/hotspot/src/cpu/sparc/vm/assembler_sparc.hpp:845
twisti
parents:
727
diff
changeset
|
586 return __ ensure_simm13_or_reg(roc, Rdisp); |
dcf03e02b020
6879902: CTW failure jdk6_18/hotspot/src/cpu/sparc/vm/assembler_sparc.hpp:845
twisti
parents:
727
diff
changeset
|
587 } |
dcf03e02b020
6879902: CTW failure jdk6_18/hotspot/src/cpu/sparc/vm/assembler_sparc.hpp:845
twisti
parents:
727
diff
changeset
|
588 |
dcf03e02b020
6879902: CTW failure jdk6_18/hotspot/src/cpu/sparc/vm/assembler_sparc.hpp:845
twisti
parents:
727
diff
changeset
|
589 RegisterOrConstant AdapterGenerator::next_arg_slot(const int st_off) { |
dcf03e02b020
6879902: CTW failure jdk6_18/hotspot/src/cpu/sparc/vm/assembler_sparc.hpp:845
twisti
parents:
727
diff
changeset
|
590 RegisterOrConstant roc(next_arg_offset(st_off)); |
dcf03e02b020
6879902: CTW failure jdk6_18/hotspot/src/cpu/sparc/vm/assembler_sparc.hpp:845
twisti
parents:
727
diff
changeset
|
591 return __ ensure_simm13_or_reg(roc, Rdisp); |
0 | 592 } |
593 | |
1006
dcf03e02b020
6879902: CTW failure jdk6_18/hotspot/src/cpu/sparc/vm/assembler_sparc.hpp:845
twisti
parents:
727
diff
changeset
|
594 |
0 | 595 // Stores long into offset pointed to by base |
596 void AdapterGenerator::store_c2i_long(Register r, Register base, | |
597 const int st_off, bool is_stack) { | |
598 #ifdef _LP64 | |
599 // In V9, longs are given 2 64-bit slots in the interpreter, but the | |
600 // data is passed in only 1 slot. | |
601 __ stx(r, base, next_arg_slot(st_off)); | |
602 #else | |
342
37f87013dfd8
6711316: Open source the Garbage-First garbage collector
ysr
parents:
116
diff
changeset
|
603 #ifdef COMPILER2 |
0 | 604 // Misaligned store of 64-bit data |
605 __ stw(r, base, arg_slot(st_off)); // lo bits | |
606 __ srlx(r, 32, r); | |
607 __ stw(r, base, next_arg_slot(st_off)); // hi bits | |
608 #else | |
609 if (is_stack) { | |
610 // Misaligned store of 64-bit data | |
611 __ stw(r, base, arg_slot(st_off)); // lo bits | |
612 __ srlx(r, 32, r); | |
613 __ stw(r, base, next_arg_slot(st_off)); // hi bits | |
614 } else { | |
615 __ stw(r->successor(), base, arg_slot(st_off) ); // lo bits | |
616 __ stw(r , base, next_arg_slot(st_off)); // hi bits | |
617 } | |
618 #endif // COMPILER2 | |
342
37f87013dfd8
6711316: Open source the Garbage-First garbage collector
ysr
parents:
116
diff
changeset
|
619 #endif // _LP64 |
0 | 620 } |
621 | |
622 void AdapterGenerator::store_c2i_object(Register r, Register base, | |
623 const int st_off) { | |
624 __ st_ptr (r, base, arg_slot(st_off)); | |
625 } | |
626 | |
627 void AdapterGenerator::store_c2i_int(Register r, Register base, | |
628 const int st_off) { | |
629 __ st (r, base, arg_slot(st_off)); | |
630 } | |
631 | |
632 // Stores into offset pointed to by base | |
633 void AdapterGenerator::store_c2i_double(VMReg r_2, | |
634 VMReg r_1, Register base, const int st_off) { | |
635 #ifdef _LP64 | |
636 // In V9, doubles are given 2 64-bit slots in the interpreter, but the | |
637 // data is passed in only 1 slot. | |
638 __ stf(FloatRegisterImpl::D, r_1->as_FloatRegister(), base, next_arg_slot(st_off)); | |
639 #else | |
640 // Need to marshal 64-bit value from misaligned Lesp loads | |
641 __ stf(FloatRegisterImpl::S, r_1->as_FloatRegister(), base, next_arg_slot(st_off)); | |
642 __ stf(FloatRegisterImpl::S, r_2->as_FloatRegister(), base, arg_slot(st_off) ); | |
643 #endif | |
644 } | |
645 | |
646 void AdapterGenerator::store_c2i_float(FloatRegister f, Register base, | |
647 const int st_off) { | |
648 __ stf(FloatRegisterImpl::S, f, base, arg_slot(st_off)); | |
649 } | |
650 | |
651 void AdapterGenerator::gen_c2i_adapter( | |
652 int total_args_passed, | |
653 // VMReg max_arg, | |
654 int comp_args_on_stack, // VMRegStackSlots | |
655 const BasicType *sig_bt, | |
656 const VMRegPair *regs, | |
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
657 Label& L_skip_fixup) { |
0 | 658 |
659 // Before we get into the guts of the C2I adapter, see if we should be here | |
660 // at all. We've come from compiled code and are attempting to jump to the | |
661 // interpreter, which means the caller made a static call to get here | |
662 // (vcalls always get a compiled target if there is one). Check for a | |
663 // compiled target. If there is one, we need to patch the caller's call. | |
664 // However we will run interpreted if we come thru here. The next pass | |
665 // thru the call site will run compiled. If we ran compiled here then | |
666 // we can (theorectically) do endless i2c->c2i->i2c transitions during | |
667 // deopt/uncommon trap cycles. If we always go interpreted here then | |
668 // we can have at most one and don't need to play any tricks to keep | |
669 // from endlessly growing the stack. | |
670 // | |
671 // Actually if we detected that we had an i2c->c2i transition here we | |
672 // ought to be able to reset the world back to the state of the interpreted | |
673 // call and not bother building another interpreter arg area. We don't | |
674 // do that at this point. | |
675 | |
676 patch_callers_callsite(); | |
677 | |
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
678 __ bind(L_skip_fixup); |
0 | 679 |
680 // Since all args are passed on the stack, total_args_passed*wordSize is the | |
681 // space we need. Add in varargs area needed by the interpreter. Round up | |
682 // to stack alignment. | |
1506 | 683 const int arg_size = total_args_passed * Interpreter::stackElementSize; |
0 | 684 const int varargs_area = |
685 (frame::varargs_offset - frame::register_save_words)*wordSize; | |
686 const int extraspace = round_to(arg_size + varargs_area, 2*wordSize); | |
687 | |
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
688 const int bias = STACK_BIAS; |
0 | 689 const int interp_arg_offset = frame::varargs_offset*wordSize + |
1506 | 690 (total_args_passed-1)*Interpreter::stackElementSize; |
0 | 691 |
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
692 const Register base = SP; |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
693 |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
694 // Make some extra space on the stack. |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
695 __ sub(SP, __ ensure_simm13_or_reg(extraspace, G3_scratch), SP); |
0 | 696 set_Rdisp(G3_scratch); |
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
697 |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
698 // Write the args into the outgoing interpreter space. |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
699 for (int i = 0; i < total_args_passed; i++) { |
1506 | 700 const int st_off = interp_arg_offset - (i*Interpreter::stackElementSize) + bias; |
0 | 701 VMReg r_1 = regs[i].first(); |
702 VMReg r_2 = regs[i].second(); | |
703 if (!r_1->is_valid()) { | |
704 assert(!r_2->is_valid(), ""); | |
705 continue; | |
706 } | |
707 if (r_1->is_stack()) { // Pretend stack targets are loaded into G1 | |
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
708 RegisterOrConstant ld_off = reg2offset(r_1) + extraspace + bias; |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
709 ld_off = __ ensure_simm13_or_reg(ld_off, Rdisp); |
0 | 710 r_1 = G1_scratch->as_VMReg();// as part of the load/store shuffle |
711 if (!r_2->is_valid()) __ ld (base, ld_off, G1_scratch); | |
712 else __ ldx(base, ld_off, G1_scratch); | |
713 } | |
714 | |
715 if (r_1->is_Register()) { | |
716 Register r = r_1->as_Register()->after_restore(); | |
717 if (sig_bt[i] == T_OBJECT || sig_bt[i] == T_ARRAY) { | |
718 store_c2i_object(r, base, st_off); | |
719 } else if (sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) { | |
720 store_c2i_long(r, base, st_off, r_2->is_stack()); | |
721 } else { | |
722 store_c2i_int(r, base, st_off); | |
723 } | |
724 } else { | |
725 assert(r_1->is_FloatRegister(), ""); | |
726 if (sig_bt[i] == T_FLOAT) { | |
727 store_c2i_float(r_1->as_FloatRegister(), base, st_off); | |
728 } else { | |
729 assert(sig_bt[i] == T_DOUBLE, "wrong type"); | |
730 store_c2i_double(r_2, r_1, base, st_off); | |
731 } | |
732 } | |
733 } | |
734 | |
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
735 // Load the interpreter entry point. |
6725
da91efe96a93
6964458: Reimplement class meta-data storage to use native memory
coleenp
parents:
6266
diff
changeset
|
736 __ ld_ptr(G5_method, in_bytes(Method::interpreter_entry_offset()), G3_scratch); |
0 | 737 |
738 // Pass O5_savedSP as an argument to the interpreter. | |
739 // The interpreter will restore SP to this value before returning. | |
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
740 __ add(SP, __ ensure_simm13_or_reg(extraspace, G1), O5_savedSP); |
0 | 741 |
742 __ mov((frame::varargs_offset)*wordSize - | |
1506 | 743 1*Interpreter::stackElementSize+bias+BytesPerWord, G1); |
0 | 744 // Jump to the interpreter just as if interpreter was doing it. |
745 __ jmpl(G3_scratch, 0, G0); | |
746 // Setup Lesp for the call. Cannot actually set Lesp as the current Lesp | |
747 // (really L0) is in use by the compiled frame as a generic temp. However, | |
748 // the interpreter does not know where its args are without some kind of | |
749 // arg pointer being passed in. Pass it in Gargs. | |
750 __ delayed()->add(SP, G1, Gargs); | |
751 } | |
752 | |
6266
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
753 static void range_check(MacroAssembler* masm, Register pc_reg, Register temp_reg, Register temp2_reg, |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
754 address code_start, address code_end, |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
755 Label& L_ok) { |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
756 Label L_fail; |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
757 __ set(ExternalAddress(code_start), temp_reg); |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
758 __ set(pointer_delta(code_end, code_start, 1), temp2_reg); |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
759 __ cmp(pc_reg, temp_reg); |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
760 __ brx(Assembler::lessEqualUnsigned, false, Assembler::pn, L_fail); |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
761 __ delayed()->add(temp_reg, temp2_reg, temp_reg); |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
762 __ cmp(pc_reg, temp_reg); |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
763 __ cmp_and_brx_short(pc_reg, temp_reg, Assembler::lessUnsigned, Assembler::pt, L_ok); |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
764 __ bind(L_fail); |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
765 } |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
766 |
17033
2d6dd2eebd51
Fixed HSAIL deopt
Tom Rodriguez <tom.rodriguez@oracle.com>
parents:
16941
diff
changeset
|
767 void AdapterGenerator::gen_i2c_adapter(int total_args_passed, |
2d6dd2eebd51
Fixed HSAIL deopt
Tom Rodriguez <tom.rodriguez@oracle.com>
parents:
16941
diff
changeset
|
768 // VMReg max_arg, |
2d6dd2eebd51
Fixed HSAIL deopt
Tom Rodriguez <tom.rodriguez@oracle.com>
parents:
16941
diff
changeset
|
769 int comp_args_on_stack, // VMRegStackSlots |
2d6dd2eebd51
Fixed HSAIL deopt
Tom Rodriguez <tom.rodriguez@oracle.com>
parents:
16941
diff
changeset
|
770 const BasicType *sig_bt, |
2d6dd2eebd51
Fixed HSAIL deopt
Tom Rodriguez <tom.rodriguez@oracle.com>
parents:
16941
diff
changeset
|
771 const VMRegPair *regs, |
2d6dd2eebd51
Fixed HSAIL deopt
Tom Rodriguez <tom.rodriguez@oracle.com>
parents:
16941
diff
changeset
|
772 int frame_extension_argument) { |
2d6dd2eebd51
Fixed HSAIL deopt
Tom Rodriguez <tom.rodriguez@oracle.com>
parents:
16941
diff
changeset
|
773 assert(frame_extension_argument == -1, "unsupported"); |
0 | 774 |
775 // Generate an I2C adapter: adjust the I-frame to make space for the C-frame | |
776 // layout. Lesp was saved by the calling I-frame and will be restored on | |
777 // return. Meanwhile, outgoing arg space is all owned by the callee | |
778 // C-frame, so we can mangle it at will. After adjusting the frame size, | |
779 // hoist register arguments and repack other args according to the compiled | |
780 // code convention. Finally, end in a jump to the compiled code. The entry | |
781 // point address is the start of the buffer. | |
782 | |
783 // We will only enter here from an interpreted frame and never from after | |
784 // passing thru a c2i. Azul allowed this but we do not. If we lose the | |
785 // race and use a c2i we will remain interpreted for the race loser(s). | |
786 // This removes all sorts of headaches on the x86 side and also eliminates | |
787 // the possibility of having c2i -> i2c -> c2i -> ... endless transitions. | |
788 | |
6266
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
789 // More detail: |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
790 // Adapters can be frameless because they do not require the caller |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
791 // to perform additional cleanup work, such as correcting the stack pointer. |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
792 // An i2c adapter is frameless because the *caller* frame, which is interpreted, |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
793 // routinely repairs its own stack pointer (from interpreter_frame_last_sp), |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
794 // even if a callee has modified the stack pointer. |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
795 // A c2i adapter is frameless because the *callee* frame, which is interpreted, |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
796 // routinely repairs its caller's stack pointer (from sender_sp, which is set |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
797 // up via the senderSP register). |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
798 // In other words, if *either* the caller or callee is interpreted, we can |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
799 // get the stack pointer repaired after a call. |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
800 // This is why c2i and i2c adapters cannot be indefinitely composed. |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
801 // In particular, if a c2i adapter were to somehow call an i2c adapter, |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
802 // both caller and callee would be compiled methods, and neither would |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
803 // clean up the stack pointer changes performed by the two adapters. |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
804 // If this happens, control eventually transfers back to the compiled |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
805 // caller, but with an uncorrected stack, causing delayed havoc. |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
806 |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
807 if (VerifyAdapterCalls && |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
808 (Interpreter::code() != NULL || StubRoutines::code1() != NULL)) { |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
809 // So, let's test for cascading c2i/i2c adapters right now. |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
810 // assert(Interpreter::contains($return_addr) || |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
811 // StubRoutines::contains($return_addr), |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
812 // "i2c adapter must return to an interpreter frame"); |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
813 __ block_comment("verify_i2c { "); |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
814 Label L_ok; |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
815 if (Interpreter::code() != NULL) |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
816 range_check(masm, O7, O0, O1, |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
817 Interpreter::code()->code_start(), Interpreter::code()->code_end(), |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
818 L_ok); |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
819 if (StubRoutines::code1() != NULL) |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
820 range_check(masm, O7, O0, O1, |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
821 StubRoutines::code1()->code_begin(), StubRoutines::code1()->code_end(), |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
822 L_ok); |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
823 if (StubRoutines::code2() != NULL) |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
824 range_check(masm, O7, O0, O1, |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
825 StubRoutines::code2()->code_begin(), StubRoutines::code2()->code_end(), |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
826 L_ok); |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
827 const char* msg = "i2c adapter must return to an interpreter frame"; |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
828 __ block_comment(msg); |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
829 __ stop(msg); |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
830 __ bind(L_ok); |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
831 __ block_comment("} verify_i2ce "); |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
832 } |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
833 |
0 | 834 // As you can see from the list of inputs & outputs there are not a lot |
835 // of temp registers to work with: mostly G1, G3 & G4. | |
836 | |
837 // Inputs: | |
838 // G2_thread - TLS | |
839 // G5_method - Method oop | |
710 | 840 // G4 (Gargs) - Pointer to interpreter's args |
841 // O0..O4 - free for scratch | |
842 // O5_savedSP - Caller's saved SP, to be restored if needed | |
0 | 843 // O6 - Current SP! |
844 // O7 - Valid return address | |
710 | 845 // L0-L7, I0-I7 - Caller's temps (no frame pushed yet) |
0 | 846 |
847 // Outputs: | |
848 // G2_thread - TLS | |
849 // O0-O5 - Outgoing args in compiled layout | |
850 // O6 - Adjusted or restored SP | |
851 // O7 - Valid return address | |
1564 | 852 // L0-L7, I0-I7 - Caller's temps (no frame pushed yet) |
0 | 853 // F0-F7 - more outgoing args |
854 | |
855 | |
710 | 856 // Gargs is the incoming argument base, and also an outgoing argument. |
0 | 857 __ sub(Gargs, BytesPerWord, Gargs); |
858 | |
859 // ON ENTRY TO THE CODE WE ARE MAKING, WE HAVE AN INTERPRETED FRAME | |
860 // WITH O7 HOLDING A VALID RETURN PC | |
861 // | |
862 // | | | |
863 // : java stack : | |
864 // | | | |
865 // +--------------+ <--- start of outgoing args | |
866 // | receiver | | | |
867 // : rest of args : |---size is java-arg-words | |
868 // | | | | |
869 // +--------------+ <--- O4_args (misaligned) and Lesp if prior is not C2I | |
870 // | | | | |
871 // : unused : |---Space for max Java stack, plus stack alignment | |
872 // | | | | |
873 // +--------------+ <--- SP + 16*wordsize | |
874 // | | | |
875 // : window : | |
876 // | | | |
877 // +--------------+ <--- SP | |
878 | |
879 // WE REPACK THE STACK. We use the common calling convention layout as | |
880 // discovered by calling SharedRuntime::calling_convention. We assume it | |
881 // causes an arbitrary shuffle of memory, which may require some register | |
882 // temps to do the shuffle. We hope for (and optimize for) the case where | |
883 // temps are not needed. We may have to resize the stack slightly, in case | |
884 // we need alignment padding (32-bit interpreter can pass longs & doubles | |
885 // misaligned, but the compilers expect them aligned). | |
886 // | |
887 // | | | |
888 // : java stack : | |
889 // | | | |
890 // +--------------+ <--- start of outgoing args | |
891 // | pad, align | | | |
892 // +--------------+ | | |
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
893 // | ints, longs, | | |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
894 // | floats, | |---Outgoing stack args. |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
895 // : doubles : | First few args in registers. |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
896 // | | | |
0 | 897 // +--------------+ <--- SP' + 16*wordsize |
898 // | | | |
899 // : window : | |
900 // | | | |
901 // +--------------+ <--- SP' | |
902 | |
903 // ON EXIT FROM THE CODE WE ARE MAKING, WE STILL HAVE AN INTERPRETED FRAME | |
904 // WITH O7 HOLDING A VALID RETURN PC - ITS JUST THAT THE ARGS ARE NOW SETUP | |
905 // FOR COMPILED CODE AND THE FRAME SLIGHTLY GROWN. | |
906 | |
907 // Cut-out for having no stack args. Since up to 6 args are passed | |
908 // in registers, we will commonly have no stack args. | |
909 if (comp_args_on_stack > 0) { | |
910 // Convert VMReg stack slots to words. | |
911 int comp_words_on_stack = round_to(comp_args_on_stack*VMRegImpl::stack_slot_size, wordSize)>>LogBytesPerWord; | |
912 // Round up to miminum stack alignment, in wordSize | |
913 comp_words_on_stack = round_to(comp_words_on_stack, 2); | |
914 // Now compute the distance from Lesp to SP. This calculation does not | |
915 // include the space for total_args_passed because Lesp has not yet popped | |
916 // the arguments. | |
917 __ sub(SP, (comp_words_on_stack)*wordSize, SP); | |
918 } | |
919 | |
920 // Now generate the shuffle code. Pick up all register args and move the | |
921 // rest through G1_scratch. | |
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
922 for (int i = 0; i < total_args_passed; i++) { |
0 | 923 if (sig_bt[i] == T_VOID) { |
924 // Longs and doubles are passed in native word order, but misaligned | |
925 // in the 32-bit build. | |
926 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half"); | |
927 continue; | |
928 } | |
929 | |
930 // Pick up 0, 1 or 2 words from Lesp+offset. Assume mis-aligned in the | |
931 // 32-bit build and aligned in the 64-bit build. Look for the obvious | |
932 // ldx/lddf optimizations. | |
933 | |
934 // Load in argument order going down. | |
1506 | 935 const int ld_off = (total_args_passed-i)*Interpreter::stackElementSize; |
0 | 936 set_Rdisp(G1_scratch); |
937 | |
938 VMReg r_1 = regs[i].first(); | |
939 VMReg r_2 = regs[i].second(); | |
940 if (!r_1->is_valid()) { | |
941 assert(!r_2->is_valid(), ""); | |
942 continue; | |
943 } | |
944 if (r_1->is_stack()) { // Pretend stack targets are loaded into F8/F9 | |
945 r_1 = F8->as_VMReg(); // as part of the load/store shuffle | |
946 if (r_2->is_valid()) r_2 = r_1->next(); | |
947 } | |
948 if (r_1->is_Register()) { // Register argument | |
949 Register r = r_1->as_Register()->after_restore(); | |
950 if (!r_2->is_valid()) { | |
951 __ ld(Gargs, arg_slot(ld_off), r); | |
952 } else { | |
953 #ifdef _LP64 | |
954 // In V9, longs are given 2 64-bit slots in the interpreter, but the | |
955 // data is passed in only 1 slot. | |
1006
dcf03e02b020
6879902: CTW failure jdk6_18/hotspot/src/cpu/sparc/vm/assembler_sparc.hpp:845
twisti
parents:
727
diff
changeset
|
956 RegisterOrConstant slot = (sig_bt[i] == T_LONG) ? |
0 | 957 next_arg_slot(ld_off) : arg_slot(ld_off); |
958 __ ldx(Gargs, slot, r); | |
959 #else | |
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
960 fatal("longs should be on stack"); |
0 | 961 #endif |
962 } | |
963 } else { | |
964 assert(r_1->is_FloatRegister(), ""); | |
965 if (!r_2->is_valid()) { | |
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
966 __ ldf(FloatRegisterImpl::S, Gargs, arg_slot(ld_off), r_1->as_FloatRegister()); |
0 | 967 } else { |
968 #ifdef _LP64 | |
969 // In V9, doubles are given 2 64-bit slots in the interpreter, but the | |
970 // data is passed in only 1 slot. This code also handles longs that | |
971 // are passed on the stack, but need a stack-to-stack move through a | |
972 // spare float register. | |
1006
dcf03e02b020
6879902: CTW failure jdk6_18/hotspot/src/cpu/sparc/vm/assembler_sparc.hpp:845
twisti
parents:
727
diff
changeset
|
973 RegisterOrConstant slot = (sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) ? |
0 | 974 next_arg_slot(ld_off) : arg_slot(ld_off); |
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
975 __ ldf(FloatRegisterImpl::D, Gargs, slot, r_1->as_FloatRegister()); |
0 | 976 #else |
977 // Need to marshal 64-bit value from misaligned Lesp loads | |
978 __ ldf(FloatRegisterImpl::S, Gargs, next_arg_slot(ld_off), r_1->as_FloatRegister()); | |
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
979 __ ldf(FloatRegisterImpl::S, Gargs, arg_slot(ld_off), r_2->as_FloatRegister()); |
0 | 980 #endif |
981 } | |
982 } | |
983 // Was the argument really intended to be on the stack, but was loaded | |
984 // into F8/F9? | |
985 if (regs[i].first()->is_stack()) { | |
986 assert(r_1->as_FloatRegister() == F8, "fix this code"); | |
987 // Convert stack slot to an SP offset | |
988 int st_off = reg2offset(regs[i].first()) + STACK_BIAS; | |
989 // Store down the shuffled stack word. Target address _is_ aligned. | |
1006
dcf03e02b020
6879902: CTW failure jdk6_18/hotspot/src/cpu/sparc/vm/assembler_sparc.hpp:845
twisti
parents:
727
diff
changeset
|
990 RegisterOrConstant slot = __ ensure_simm13_or_reg(st_off, Rdisp); |
dcf03e02b020
6879902: CTW failure jdk6_18/hotspot/src/cpu/sparc/vm/assembler_sparc.hpp:845
twisti
parents:
727
diff
changeset
|
991 if (!r_2->is_valid()) __ stf(FloatRegisterImpl::S, r_1->as_FloatRegister(), SP, slot); |
dcf03e02b020
6879902: CTW failure jdk6_18/hotspot/src/cpu/sparc/vm/assembler_sparc.hpp:845
twisti
parents:
727
diff
changeset
|
992 else __ stf(FloatRegisterImpl::D, r_1->as_FloatRegister(), SP, slot); |
0 | 993 } |
994 } | |
995 | |
996 // Jump to the compiled code just as if compiled code was doing it. | |
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
997 __ ld_ptr(G5_method, in_bytes(Method::from_compiled_offset()), G3); |
16307
2395c0fc5a19
Added lookup for Gaals JavaThread::graal_alternate_call_target_offset() in the i2c.
Stefan Anzinger <stefan.anzinger@gmail.com>
parents:
14957
diff
changeset
|
998 #ifdef GRAAL |
2395c0fc5a19
Added lookup for Gaals JavaThread::graal_alternate_call_target_offset() in the i2c.
Stefan Anzinger <stefan.anzinger@gmail.com>
parents:
14957
diff
changeset
|
999 // check if this call should be routed towards a specific entry point |
2395c0fc5a19
Added lookup for Gaals JavaThread::graal_alternate_call_target_offset() in the i2c.
Stefan Anzinger <stefan.anzinger@gmail.com>
parents:
14957
diff
changeset
|
1000 __ ld(Address(G2_thread, in_bytes(JavaThread::graal_alternate_call_target_offset())), G1); |
2395c0fc5a19
Added lookup for Gaals JavaThread::graal_alternate_call_target_offset() in the i2c.
Stefan Anzinger <stefan.anzinger@gmail.com>
parents:
14957
diff
changeset
|
1001 __ cmp(G0, G1); |
2395c0fc5a19
Added lookup for Gaals JavaThread::graal_alternate_call_target_offset() in the i2c.
Stefan Anzinger <stefan.anzinger@gmail.com>
parents:
14957
diff
changeset
|
1002 Label no_alternative_target; |
2395c0fc5a19
Added lookup for Gaals JavaThread::graal_alternate_call_target_offset() in the i2c.
Stefan Anzinger <stefan.anzinger@gmail.com>
parents:
14957
diff
changeset
|
1003 __ br(Assembler::equal, false, Assembler::pn, no_alternative_target); |
2395c0fc5a19
Added lookup for Gaals JavaThread::graal_alternate_call_target_offset() in the i2c.
Stefan Anzinger <stefan.anzinger@gmail.com>
parents:
14957
diff
changeset
|
1004 __ delayed()->nop(); |
2395c0fc5a19
Added lookup for Gaals JavaThread::graal_alternate_call_target_offset() in the i2c.
Stefan Anzinger <stefan.anzinger@gmail.com>
parents:
14957
diff
changeset
|
1005 |
2395c0fc5a19
Added lookup for Gaals JavaThread::graal_alternate_call_target_offset() in the i2c.
Stefan Anzinger <stefan.anzinger@gmail.com>
parents:
14957
diff
changeset
|
1006 __ ld_ptr(G2_thread, in_bytes(JavaThread::graal_alternate_call_target_offset()), G3); |
2395c0fc5a19
Added lookup for Gaals JavaThread::graal_alternate_call_target_offset() in the i2c.
Stefan Anzinger <stefan.anzinger@gmail.com>
parents:
14957
diff
changeset
|
1007 __ st(G0, Address(G2_thread, in_bytes(JavaThread::graal_alternate_call_target_offset()))); |
2395c0fc5a19
Added lookup for Gaals JavaThread::graal_alternate_call_target_offset() in the i2c.
Stefan Anzinger <stefan.anzinger@gmail.com>
parents:
14957
diff
changeset
|
1008 |
2395c0fc5a19
Added lookup for Gaals JavaThread::graal_alternate_call_target_offset() in the i2c.
Stefan Anzinger <stefan.anzinger@gmail.com>
parents:
14957
diff
changeset
|
1009 __ bind(no_alternative_target); |
2395c0fc5a19
Added lookup for Gaals JavaThread::graal_alternate_call_target_offset() in the i2c.
Stefan Anzinger <stefan.anzinger@gmail.com>
parents:
14957
diff
changeset
|
1010 #endif |
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
1011 |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
1012 // 6243940 We might end up in handle_wrong_method if |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
1013 // the callee is deoptimized as we race thru here. If that |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
1014 // happens we don't want to take a safepoint because the |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
1015 // caller frame will look interpreted and arguments are now |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
1016 // "compiled" so it is much better to make this transition |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
1017 // invisible to the stack walking code. Unfortunately if |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
1018 // we try and find the callee by normal means a safepoint |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
1019 // is possible. So we stash the desired callee in the thread |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
1020 // and the vm will find there should this case occur. |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
1021 Address callee_target_addr(G2_thread, JavaThread::callee_target_offset()); |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
1022 __ st_ptr(G5_method, callee_target_addr); |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
1023 __ jmpl(G3, 0, G0); |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
1024 __ delayed()->nop(); |
0 | 1025 } |
1026 | |
14030
f6c04e69cf75
SharedRuntime: add gen_i2c_adapter, implement it with pre-existing methods in each architecture.
Gilles Duboscq <duboscq@ssw.jku.at>
parents:
13086
diff
changeset
|
1027 void SharedRuntime::gen_i2c_adapter(MacroAssembler *masm, |
f6c04e69cf75
SharedRuntime: add gen_i2c_adapter, implement it with pre-existing methods in each architecture.
Gilles Duboscq <duboscq@ssw.jku.at>
parents:
13086
diff
changeset
|
1028 int total_args_passed, |
f6c04e69cf75
SharedRuntime: add gen_i2c_adapter, implement it with pre-existing methods in each architecture.
Gilles Duboscq <duboscq@ssw.jku.at>
parents:
13086
diff
changeset
|
1029 int comp_args_on_stack, |
f6c04e69cf75
SharedRuntime: add gen_i2c_adapter, implement it with pre-existing methods in each architecture.
Gilles Duboscq <duboscq@ssw.jku.at>
parents:
13086
diff
changeset
|
1030 const BasicType *sig_bt, |
17033
2d6dd2eebd51
Fixed HSAIL deopt
Tom Rodriguez <tom.rodriguez@oracle.com>
parents:
16941
diff
changeset
|
1031 const VMRegPair *regs, |
17096
23cdb7e5fa2d
Fixed variable name
Tom Rodriguez <tom.rodriguez@oracle.com>
parents:
17087
diff
changeset
|
1032 int frame_extension_argument) { |
14030
f6c04e69cf75
SharedRuntime: add gen_i2c_adapter, implement it with pre-existing methods in each architecture.
Gilles Duboscq <duboscq@ssw.jku.at>
parents:
13086
diff
changeset
|
1033 AdapterGenerator agen(masm); |
17096
23cdb7e5fa2d
Fixed variable name
Tom Rodriguez <tom.rodriguez@oracle.com>
parents:
17087
diff
changeset
|
1034 agen.gen_i2c_adapter(total_args_passed, comp_args_on_stack, sig_bt, regs, frame_extension_argument); |
14030
f6c04e69cf75
SharedRuntime: add gen_i2c_adapter, implement it with pre-existing methods in each architecture.
Gilles Duboscq <duboscq@ssw.jku.at>
parents:
13086
diff
changeset
|
1035 } |
f6c04e69cf75
SharedRuntime: add gen_i2c_adapter, implement it with pre-existing methods in each architecture.
Gilles Duboscq <duboscq@ssw.jku.at>
parents:
13086
diff
changeset
|
1036 |
0 | 1037 // --------------------------------------------------------------- |
1038 AdapterHandlerEntry* SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm, | |
1039 int total_args_passed, | |
1040 // VMReg max_arg, | |
1041 int comp_args_on_stack, // VMRegStackSlots | |
1042 const BasicType *sig_bt, | |
1187
cf0685d550f1
6911204: generated adapters with large signatures can fill up the code cache
never
parents:
1037
diff
changeset
|
1043 const VMRegPair *regs, |
cf0685d550f1
6911204: generated adapters with large signatures can fill up the code cache
never
parents:
1037
diff
changeset
|
1044 AdapterFingerPrint* fingerprint) { |
0 | 1045 address i2c_entry = __ pc(); |
1046 | |
14030
f6c04e69cf75
SharedRuntime: add gen_i2c_adapter, implement it with pre-existing methods in each architecture.
Gilles Duboscq <duboscq@ssw.jku.at>
parents:
13086
diff
changeset
|
1047 gen_i2c_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs); |
0 | 1048 |
1049 | |
1050 // ------------------------------------------------------------------------- | |
6725
da91efe96a93
6964458: Reimplement class meta-data storage to use native memory
coleenp
parents:
6266
diff
changeset
|
1051 // Generate a C2I adapter. On entry we know G5 holds the Method*. The |
0 | 1052 // args start out packed in the compiled layout. They need to be unpacked |
1053 // into the interpreter layout. This will almost always require some stack | |
1054 // space. We grow the current (compiled) stack, then repack the args. We | |
1055 // finally end in a jump to the generic interpreter entry point. On exit | |
1056 // from the interpreter, the interpreter will restore our SP (lest the | |
1057 // compiled code, which relys solely on SP and not FP, get sick). | |
1058 | |
1059 address c2i_unverified_entry = __ pc(); | |
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
1060 Label L_skip_fixup; |
0 | 1061 { |
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
1062 Register R_temp = G1; // another scratch register |
0 | 1063 |
727 | 1064 AddressLiteral ic_miss(SharedRuntime::get_ic_miss_stub()); |
0 | 1065 |
1066 __ verify_oop(O0); | |
113
ba764ed4b6f2
6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents:
0
diff
changeset
|
1067 __ load_klass(O0, G3_scratch); |
0 | 1068 |
6725
da91efe96a93
6964458: Reimplement class meta-data storage to use native memory
coleenp
parents:
6266
diff
changeset
|
1069 __ ld_ptr(G5_method, CompiledICHolder::holder_klass_offset(), R_temp); |
0 | 1070 __ cmp(G3_scratch, R_temp); |
1071 | |
1072 Label ok, ok2; | |
1073 __ brx(Assembler::equal, false, Assembler::pt, ok); | |
6725
da91efe96a93
6964458: Reimplement class meta-data storage to use native memory
coleenp
parents:
6266
diff
changeset
|
1074 __ delayed()->ld_ptr(G5_method, CompiledICHolder::holder_method_offset(), G5_method); |
727 | 1075 __ jump_to(ic_miss, G3_scratch); |
0 | 1076 __ delayed()->nop(); |
1077 | |
1078 __ bind(ok); | |
1079 // Method might have been compiled since the call site was patched to | |
1080 // interpreted if that is the case treat it as a miss so we can get | |
1081 // the call site corrected. | |
6725
da91efe96a93
6964458: Reimplement class meta-data storage to use native memory
coleenp
parents:
6266
diff
changeset
|
1082 __ ld_ptr(G5_method, in_bytes(Method::code_offset()), G3_scratch); |
0 | 1083 __ bind(ok2); |
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
1084 __ br_null(G3_scratch, false, Assembler::pt, L_skip_fixup); |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
1085 __ delayed()->nop(); |
727 | 1086 __ jump_to(ic_miss, G3_scratch); |
0 | 1087 __ delayed()->nop(); |
1088 | |
1089 } | |
1090 | |
1091 address c2i_entry = __ pc(); | |
14030
f6c04e69cf75
SharedRuntime: add gen_i2c_adapter, implement it with pre-existing methods in each architecture.
Gilles Duboscq <duboscq@ssw.jku.at>
parents:
13086
diff
changeset
|
1092 AdapterGenerator agen(masm); |
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
1093 agen.gen_c2i_adapter(total_args_passed, comp_args_on_stack, sig_bt, regs, L_skip_fixup); |
0 | 1094 |
1095 __ flush(); | |
1187
cf0685d550f1
6911204: generated adapters with large signatures can fill up the code cache
never
parents:
1037
diff
changeset
|
1096 return AdapterHandlerLibrary::new_entry(fingerprint, i2c_entry, c2i_entry, c2i_unverified_entry); |
0 | 1097 |
1098 } | |
1099 | |
1100 // Helper function for native calling conventions | |
1101 static VMReg int_stk_helper( int i ) { | |
1102 // Bias any stack based VMReg we get by ignoring the window area | |
1103 // but not the register parameter save area. | |
1104 // | |
1105 // This is strange for the following reasons. We'd normally expect | |
1106 // the calling convention to return an VMReg for a stack slot | |
1107 // completely ignoring any abi reserved area. C2 thinks of that | |
1108 // abi area as only out_preserve_stack_slots. This does not include | |
1109 // the area allocated by the C abi to store down integer arguments | |
1110 // because the java calling convention does not use it. So | |
1111 // since c2 assumes that there are only out_preserve_stack_slots | |
1112 // to bias the optoregs (which impacts VMRegs) when actually referencing any actual stack | |
1113 // location the c calling convention must add in this bias amount | |
1114 // to make up for the fact that the out_preserve_stack_slots is | |
1115 // insufficient for C calls. What a mess. I sure hope those 6 | |
1116 // stack words were worth it on every java call! | |
1117 | |
1118 // Another way of cleaning this up would be for out_preserve_stack_slots | |
1119 // to take a parameter to say whether it was C or java calling conventions. | |
1120 // Then things might look a little better (but not much). | |
1121 | |
1122 int mem_parm_offset = i - SPARC_ARGS_IN_REGS_NUM; | |
1123 if( mem_parm_offset < 0 ) { | |
1124 return as_oRegister(i)->as_VMReg(); | |
1125 } else { | |
1126 int actual_offset = (mem_parm_offset + frame::memory_parameter_word_sp_offset) * VMRegImpl::slots_per_word; | |
1127 // Now return a biased offset that will be correct when out_preserve_slots is added back in | |
1128 return VMRegImpl::stack2reg(actual_offset - SharedRuntime::out_preserve_stack_slots()); | |
1129 } | |
1130 } | |
1131 | |
1132 | |
1133 int SharedRuntime::c_calling_convention(const BasicType *sig_bt, | |
1134 VMRegPair *regs, | |
14416
6a936747b569
8024344: PPC64 (part 112): C argument in register AND stack slot.
goetz
parents:
10997
diff
changeset
|
1135 VMRegPair *regs2, |
0 | 1136 int total_args_passed) { |
14416
6a936747b569
8024344: PPC64 (part 112): C argument in register AND stack slot.
goetz
parents:
10997
diff
changeset
|
1137 assert(regs2 == NULL, "not needed on sparc"); |
0 | 1138 |
1139 // Return the number of VMReg stack_slots needed for the args. | |
1140 // This value does not include an abi space (like register window | |
1141 // save area). | |
1142 | |
1143 // The native convention is V8 if !LP64 | |
1144 // The LP64 convention is the V9 convention which is slightly more sane. | |
1145 | |
1146 // We return the amount of VMReg stack slots we need to reserve for all | |
1147 // the arguments NOT counting out_preserve_stack_slots. Since we always | |
1148 // have space for storing at least 6 registers to memory we start with that. | |
1149 // See int_stk_helper for a further discussion. | |
1150 int max_stack_slots = (frame::varargs_offset * VMRegImpl::slots_per_word) - SharedRuntime::out_preserve_stack_slots(); | |
1151 | |
1152 #ifdef _LP64 | |
1153 // V9 convention: All things "as-if" on double-wide stack slots. | |
1154 // Hoist any int/ptr/long's in the first 6 to int regs. | |
1155 // Hoist any flt/dbl's in the first 16 dbl regs. | |
1156 int j = 0; // Count of actual args, not HALVES | |
1157 for( int i=0; i<total_args_passed; i++, j++ ) { | |
1158 switch( sig_bt[i] ) { | |
1159 case T_BOOLEAN: | |
1160 case T_BYTE: | |
1161 case T_CHAR: | |
1162 case T_INT: | |
1163 case T_SHORT: | |
1164 regs[i].set1( int_stk_helper( j ) ); break; | |
1165 case T_LONG: | |
1166 assert( sig_bt[i+1] == T_VOID, "expecting half" ); | |
1167 case T_ADDRESS: // raw pointers, like current thread, for VM calls | |
1168 case T_ARRAY: | |
1169 case T_OBJECT: | |
6739
8a02ca5e5576
7195816: NPG: Crash in c1_ValueType - ShouldNotReachHere
roland
parents:
6725
diff
changeset
|
1170 case T_METADATA: |
0 | 1171 regs[i].set2( int_stk_helper( j ) ); |
1172 break; | |
1173 case T_FLOAT: | |
1174 if ( j < 16 ) { | |
1175 // V9ism: floats go in ODD registers | |
1176 regs[i].set1(as_FloatRegister(1 + (j<<1))->as_VMReg()); | |
1177 } else { | |
1178 // V9ism: floats go in ODD stack slot | |
1179 regs[i].set1(VMRegImpl::stack2reg(1 + (j<<1))); | |
1180 } | |
1181 break; | |
1182 case T_DOUBLE: | |
1183 assert( sig_bt[i+1] == T_VOID, "expecting half" ); | |
1184 if ( j < 16 ) { | |
1185 // V9ism: doubles go in EVEN/ODD regs | |
1186 regs[i].set2(as_FloatRegister(j<<1)->as_VMReg()); | |
1187 } else { | |
1188 // V9ism: doubles go in EVEN/ODD stack slots | |
1189 regs[i].set2(VMRegImpl::stack2reg(j<<1)); | |
1190 } | |
1191 break; | |
1192 case T_VOID: regs[i].set_bad(); j--; break; // Do not count HALVES | |
1193 default: | |
1194 ShouldNotReachHere(); | |
1195 } | |
1196 if (regs[i].first()->is_stack()) { | |
1197 int off = regs[i].first()->reg2stack(); | |
1198 if (off > max_stack_slots) max_stack_slots = off; | |
1199 } | |
1200 if (regs[i].second()->is_stack()) { | |
1201 int off = regs[i].second()->reg2stack(); | |
1202 if (off > max_stack_slots) max_stack_slots = off; | |
1203 } | |
1204 } | |
1205 | |
1206 #else // _LP64 | |
1207 // V8 convention: first 6 things in O-regs, rest on stack. | |
1208 // Alignment is willy-nilly. | |
1209 for( int i=0; i<total_args_passed; i++ ) { | |
1210 switch( sig_bt[i] ) { | |
1211 case T_ADDRESS: // raw pointers, like current thread, for VM calls | |
1212 case T_ARRAY: | |
1213 case T_BOOLEAN: | |
1214 case T_BYTE: | |
1215 case T_CHAR: | |
1216 case T_FLOAT: | |
1217 case T_INT: | |
1218 case T_OBJECT: | |
6739
8a02ca5e5576
7195816: NPG: Crash in c1_ValueType - ShouldNotReachHere
roland
parents:
6725
diff
changeset
|
1219 case T_METADATA: |
0 | 1220 case T_SHORT: |
1221 regs[i].set1( int_stk_helper( i ) ); | |
1222 break; | |
1223 case T_DOUBLE: | |
1224 case T_LONG: | |
1225 assert( sig_bt[i+1] == T_VOID, "expecting half" ); | |
1226 regs[i].set_pair( int_stk_helper( i+1 ), int_stk_helper( i ) ); | |
1227 break; | |
1228 case T_VOID: regs[i].set_bad(); break; | |
1229 default: | |
1230 ShouldNotReachHere(); | |
1231 } | |
1232 if (regs[i].first()->is_stack()) { | |
1233 int off = regs[i].first()->reg2stack(); | |
1234 if (off > max_stack_slots) max_stack_slots = off; | |
1235 } | |
1236 if (regs[i].second()->is_stack()) { | |
1237 int off = regs[i].second()->reg2stack(); | |
1238 if (off > max_stack_slots) max_stack_slots = off; | |
1239 } | |
1240 } | |
1241 #endif // _LP64 | |
1242 | |
1243 return round_to(max_stack_slots + 1, 2); | |
1244 | |
1245 } | |
1246 | |
1247 | |
1248 // --------------------------------------------------------------------------- | |
1249 void SharedRuntime::save_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) { | |
1250 switch (ret_type) { | |
1251 case T_FLOAT: | |
1252 __ stf(FloatRegisterImpl::S, F0, SP, frame_slots*VMRegImpl::stack_slot_size - 4+STACK_BIAS); | |
1253 break; | |
1254 case T_DOUBLE: | |
1255 __ stf(FloatRegisterImpl::D, F0, SP, frame_slots*VMRegImpl::stack_slot_size - 8+STACK_BIAS); | |
1256 break; | |
1257 } | |
1258 } | |
1259 | |
1260 void SharedRuntime::restore_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) { | |
1261 switch (ret_type) { | |
1262 case T_FLOAT: | |
1263 __ ldf(FloatRegisterImpl::S, SP, frame_slots*VMRegImpl::stack_slot_size - 4+STACK_BIAS, F0); | |
1264 break; | |
1265 case T_DOUBLE: | |
1266 __ ldf(FloatRegisterImpl::D, SP, frame_slots*VMRegImpl::stack_slot_size - 8+STACK_BIAS, F0); | |
1267 break; | |
1268 } | |
1269 } | |
1270 | |
1271 // Check and forward and pending exception. Thread is stored in | |
1272 // L7_thread_cache and possibly NOT in G2_thread. Since this is a native call, there | |
1273 // is no exception handler. We merely pop this frame off and throw the | |
1274 // exception in the caller's frame. | |
1275 static void check_forward_pending_exception(MacroAssembler *masm, Register Rex_oop) { | |
1276 Label L; | |
1277 __ br_null(Rex_oop, false, Assembler::pt, L); | |
1278 __ delayed()->mov(L7_thread_cache, G2_thread); // restore in case we have exception | |
1279 // Since this is a native call, we *know* the proper exception handler | |
1280 // without calling into the VM: it's the empty function. Just pop this | |
1281 // frame and then jump to forward_exception_entry; O7 will contain the | |
1282 // native caller's return PC. | |
727 | 1283 AddressLiteral exception_entry(StubRoutines::forward_exception_entry()); |
1284 __ jump_to(exception_entry, G3_scratch); | |
0 | 1285 __ delayed()->restore(); // Pop this frame off. |
1286 __ bind(L); | |
1287 } | |
1288 | |
1289 // A simple move of integer like type | |
1290 static void simple_move32(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { | |
1291 if (src.first()->is_stack()) { | |
1292 if (dst.first()->is_stack()) { | |
1293 // stack to stack | |
1294 __ ld(FP, reg2offset(src.first()) + STACK_BIAS, L5); | |
1295 __ st(L5, SP, reg2offset(dst.first()) + STACK_BIAS); | |
1296 } else { | |
1297 // stack to reg | |
1298 __ ld(FP, reg2offset(src.first()) + STACK_BIAS, dst.first()->as_Register()); | |
1299 } | |
1300 } else if (dst.first()->is_stack()) { | |
1301 // reg to stack | |
1302 __ st(src.first()->as_Register(), SP, reg2offset(dst.first()) + STACK_BIAS); | |
1303 } else { | |
1304 __ mov(src.first()->as_Register(), dst.first()->as_Register()); | |
1305 } | |
1306 } | |
1307 | |
1308 // On 64 bit we will store integer like items to the stack as | |
1309 // 64 bits items (sparc abi) even though java would only store | |
1310 // 32bits for a parameter. On 32bit it will simply be 32 bits | |
1311 // So this routine will do 32->32 on 32bit and 32->64 on 64bit | |
1312 static void move32_64(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { | |
1313 if (src.first()->is_stack()) { | |
1314 if (dst.first()->is_stack()) { | |
1315 // stack to stack | |
1316 __ ld(FP, reg2offset(src.first()) + STACK_BIAS, L5); | |
1317 __ st_ptr(L5, SP, reg2offset(dst.first()) + STACK_BIAS); | |
1318 } else { | |
1319 // stack to reg | |
1320 __ ld(FP, reg2offset(src.first()) + STACK_BIAS, dst.first()->as_Register()); | |
1321 } | |
1322 } else if (dst.first()->is_stack()) { | |
1323 // reg to stack | |
1324 __ st_ptr(src.first()->as_Register(), SP, reg2offset(dst.first()) + STACK_BIAS); | |
1325 } else { | |
1326 __ mov(src.first()->as_Register(), dst.first()->as_Register()); | |
1327 } | |
1328 } | |
1329 | |
1330 | |
4873
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1331 static void move_ptr(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1332 if (src.first()->is_stack()) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1333 if (dst.first()->is_stack()) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1334 // stack to stack |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1335 __ ld_ptr(FP, reg2offset(src.first()) + STACK_BIAS, L5); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1336 __ st_ptr(L5, SP, reg2offset(dst.first()) + STACK_BIAS); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1337 } else { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1338 // stack to reg |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1339 __ ld_ptr(FP, reg2offset(src.first()) + STACK_BIAS, dst.first()->as_Register()); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1340 } |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1341 } else if (dst.first()->is_stack()) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1342 // reg to stack |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1343 __ st_ptr(src.first()->as_Register(), SP, reg2offset(dst.first()) + STACK_BIAS); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1344 } else { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1345 __ mov(src.first()->as_Register(), dst.first()->as_Register()); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1346 } |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1347 } |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1348 |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1349 |
0 | 1350 // An oop arg. Must pass a handle not the oop itself |
1351 static void object_move(MacroAssembler* masm, | |
1352 OopMap* map, | |
1353 int oop_handle_offset, | |
1354 int framesize_in_slots, | |
1355 VMRegPair src, | |
1356 VMRegPair dst, | |
1357 bool is_receiver, | |
1358 int* receiver_offset) { | |
1359 | |
1360 // must pass a handle. First figure out the location we use as a handle | |
1361 | |
1362 if (src.first()->is_stack()) { | |
1363 // Oop is already on the stack | |
1364 Register rHandle = dst.first()->is_stack() ? L5 : dst.first()->as_Register(); | |
1365 __ add(FP, reg2offset(src.first()) + STACK_BIAS, rHandle); | |
1366 __ ld_ptr(rHandle, 0, L4); | |
1367 #ifdef _LP64 | |
1368 __ movr( Assembler::rc_z, L4, G0, rHandle ); | |
1369 #else | |
1370 __ tst( L4 ); | |
1371 __ movcc( Assembler::zero, false, Assembler::icc, G0, rHandle ); | |
1372 #endif | |
1373 if (dst.first()->is_stack()) { | |
1374 __ st_ptr(rHandle, SP, reg2offset(dst.first()) + STACK_BIAS); | |
1375 } | |
1376 int offset_in_older_frame = src.first()->reg2stack() + SharedRuntime::out_preserve_stack_slots(); | |
1377 if (is_receiver) { | |
1378 *receiver_offset = (offset_in_older_frame + framesize_in_slots) * VMRegImpl::stack_slot_size; | |
1379 } | |
1380 map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + framesize_in_slots)); | |
1381 } else { | |
1382 // Oop is in an input register pass we must flush it to the stack | |
1383 const Register rOop = src.first()->as_Register(); | |
1384 const Register rHandle = L5; | |
1385 int oop_slot = rOop->input_number() * VMRegImpl::slots_per_word + oop_handle_offset; | |
1386 int offset = oop_slot*VMRegImpl::stack_slot_size; | |
1387 Label skip; | |
1388 __ st_ptr(rOop, SP, offset + STACK_BIAS); | |
1389 if (is_receiver) { | |
1390 *receiver_offset = oop_slot * VMRegImpl::stack_slot_size; | |
1391 } | |
1392 map->set_oop(VMRegImpl::stack2reg(oop_slot)); | |
1393 __ add(SP, offset + STACK_BIAS, rHandle); | |
1394 #ifdef _LP64 | |
1395 __ movr( Assembler::rc_z, rOop, G0, rHandle ); | |
1396 #else | |
1397 __ tst( rOop ); | |
1398 __ movcc( Assembler::zero, false, Assembler::icc, G0, rHandle ); | |
1399 #endif | |
1400 | |
1401 if (dst.first()->is_stack()) { | |
1402 __ st_ptr(rHandle, SP, reg2offset(dst.first()) + STACK_BIAS); | |
1403 } else { | |
1404 __ mov(rHandle, dst.first()->as_Register()); | |
1405 } | |
1406 } | |
1407 } | |
1408 | |
1409 // A float arg may have to do float reg int reg conversion | |
1410 static void float_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { | |
1411 assert(!src.second()->is_valid() && !dst.second()->is_valid(), "bad float_move"); | |
1412 | |
1413 if (src.first()->is_stack()) { | |
1414 if (dst.first()->is_stack()) { | |
1415 // stack to stack the easiest of the bunch | |
1416 __ ld(FP, reg2offset(src.first()) + STACK_BIAS, L5); | |
1417 __ st(L5, SP, reg2offset(dst.first()) + STACK_BIAS); | |
1418 } else { | |
1419 // stack to reg | |
1420 if (dst.first()->is_Register()) { | |
1421 __ ld(FP, reg2offset(src.first()) + STACK_BIAS, dst.first()->as_Register()); | |
1422 } else { | |
1423 __ ldf(FloatRegisterImpl::S, FP, reg2offset(src.first()) + STACK_BIAS, dst.first()->as_FloatRegister()); | |
1424 } | |
1425 } | |
1426 } else if (dst.first()->is_stack()) { | |
1427 // reg to stack | |
1428 if (src.first()->is_Register()) { | |
1429 __ st(src.first()->as_Register(), SP, reg2offset(dst.first()) + STACK_BIAS); | |
1430 } else { | |
1431 __ stf(FloatRegisterImpl::S, src.first()->as_FloatRegister(), SP, reg2offset(dst.first()) + STACK_BIAS); | |
1432 } | |
1433 } else { | |
1434 // reg to reg | |
1435 if (src.first()->is_Register()) { | |
1436 if (dst.first()->is_Register()) { | |
1437 // gpr -> gpr | |
1438 __ mov(src.first()->as_Register(), dst.first()->as_Register()); | |
1439 } else { | |
1440 // gpr -> fpr | |
1441 __ st(src.first()->as_Register(), FP, -4 + STACK_BIAS); | |
1442 __ ldf(FloatRegisterImpl::S, FP, -4 + STACK_BIAS, dst.first()->as_FloatRegister()); | |
1443 } | |
1444 } else if (dst.first()->is_Register()) { | |
1445 // fpr -> gpr | |
1446 __ stf(FloatRegisterImpl::S, src.first()->as_FloatRegister(), FP, -4 + STACK_BIAS); | |
1447 __ ld(FP, -4 + STACK_BIAS, dst.first()->as_Register()); | |
1448 } else { | |
1449 // fpr -> fpr | |
1450 // In theory these overlap but the ordering is such that this is likely a nop | |
1451 if ( src.first() != dst.first()) { | |
1452 __ fmov(FloatRegisterImpl::S, src.first()->as_FloatRegister(), dst.first()->as_FloatRegister()); | |
1453 } | |
1454 } | |
1455 } | |
1456 } | |
1457 | |
1458 static void split_long_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { | |
1459 VMRegPair src_lo(src.first()); | |
1460 VMRegPair src_hi(src.second()); | |
1461 VMRegPair dst_lo(dst.first()); | |
1462 VMRegPair dst_hi(dst.second()); | |
1463 simple_move32(masm, src_lo, dst_lo); | |
1464 simple_move32(masm, src_hi, dst_hi); | |
1465 } | |
1466 | |
1467 // A long move | |
1468 static void long_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { | |
1469 | |
1470 // Do the simple ones here else do two int moves | |
1471 if (src.is_single_phys_reg() ) { | |
1472 if (dst.is_single_phys_reg()) { | |
1473 __ mov(src.first()->as_Register(), dst.first()->as_Register()); | |
1474 } else { | |
1475 // split src into two separate registers | |
1476 // Remember hi means hi address or lsw on sparc | |
1477 // Move msw to lsw | |
1478 if (dst.second()->is_reg()) { | |
1479 // MSW -> MSW | |
1480 __ srax(src.first()->as_Register(), 32, dst.first()->as_Register()); | |
1481 // Now LSW -> LSW | |
1482 // this will only move lo -> lo and ignore hi | |
1483 VMRegPair split(dst.second()); | |
1484 simple_move32(masm, src, split); | |
1485 } else { | |
1486 VMRegPair split(src.first(), L4->as_VMReg()); | |
1487 // MSW -> MSW (lo ie. first word) | |
1488 __ srax(src.first()->as_Register(), 32, L4); | |
1489 split_long_move(masm, split, dst); | |
1490 } | |
1491 } | |
1492 } else if (dst.is_single_phys_reg()) { | |
1493 if (src.is_adjacent_aligned_on_stack(2)) { | |
304 | 1494 __ ldx(FP, reg2offset(src.first()) + STACK_BIAS, dst.first()->as_Register()); |
0 | 1495 } else { |
1496 // dst is a single reg. | |
1497 // Remember lo is low address not msb for stack slots | |
1498 // and lo is the "real" register for registers | |
1499 // src is | |
1500 | |
1501 VMRegPair split; | |
1502 | |
1503 if (src.first()->is_reg()) { | |
1504 // src.lo (msw) is a reg, src.hi is stk/reg | |
1505 // we will move: src.hi (LSW) -> dst.lo, src.lo (MSW) -> src.lo [the MSW is in the LSW of the reg] | |
1506 split.set_pair(dst.first(), src.first()); | |
1507 } else { | |
1508 // msw is stack move to L5 | |
1509 // lsw is stack move to dst.lo (real reg) | |
1510 // we will move: src.hi (LSW) -> dst.lo, src.lo (MSW) -> L5 | |
1511 split.set_pair(dst.first(), L5->as_VMReg()); | |
1512 } | |
1513 | |
1514 // src.lo -> src.lo/L5, src.hi -> dst.lo (the real reg) | |
1515 // msw -> src.lo/L5, lsw -> dst.lo | |
1516 split_long_move(masm, src, split); | |
1517 | |
1518 // So dst now has the low order correct position the | |
1519 // msw half | |
1520 __ sllx(split.first()->as_Register(), 32, L5); | |
1521 | |
1522 const Register d = dst.first()->as_Register(); | |
1523 __ or3(L5, d, d); | |
1524 } | |
1525 } else { | |
1526 // For LP64 we can probably do better. | |
1527 split_long_move(masm, src, dst); | |
1528 } | |
1529 } | |
1530 | |
1531 // A double move | |
1532 static void double_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { | |
1533 | |
1534 // The painful thing here is that like long_move a VMRegPair might be | |
1535 // 1: a single physical register | |
1536 // 2: two physical registers (v8) | |
1537 // 3: a physical reg [lo] and a stack slot [hi] (v8) | |
1538 // 4: two stack slots | |
1539 | |
1540 // Since src is always a java calling convention we know that the src pair | |
1541 // is always either all registers or all stack (and aligned?) | |
1542 | |
1543 // in a register [lo] and a stack slot [hi] | |
1544 if (src.first()->is_stack()) { | |
1545 if (dst.first()->is_stack()) { | |
1546 // stack to stack the easiest of the bunch | |
1547 // ought to be a way to do this where if alignment is ok we use ldd/std when possible | |
1548 __ ld(FP, reg2offset(src.first()) + STACK_BIAS, L5); | |
1549 __ ld(FP, reg2offset(src.second()) + STACK_BIAS, L4); | |
1550 __ st(L5, SP, reg2offset(dst.first()) + STACK_BIAS); | |
1551 __ st(L4, SP, reg2offset(dst.second()) + STACK_BIAS); | |
1552 } else { | |
1553 // stack to reg | |
1554 if (dst.second()->is_stack()) { | |
1555 // stack -> reg, stack -> stack | |
1556 __ ld(FP, reg2offset(src.second()) + STACK_BIAS, L4); | |
1557 if (dst.first()->is_Register()) { | |
1558 __ ld(FP, reg2offset(src.first()) + STACK_BIAS, dst.first()->as_Register()); | |
1559 } else { | |
1560 __ ldf(FloatRegisterImpl::S, FP, reg2offset(src.first()) + STACK_BIAS, dst.first()->as_FloatRegister()); | |
1561 } | |
1562 // This was missing. (very rare case) | |
1563 __ st(L4, SP, reg2offset(dst.second()) + STACK_BIAS); | |
1564 } else { | |
1565 // stack -> reg | |
1566 // Eventually optimize for alignment QQQ | |
1567 if (dst.first()->is_Register()) { | |
1568 __ ld(FP, reg2offset(src.first()) + STACK_BIAS, dst.first()->as_Register()); | |
1569 __ ld(FP, reg2offset(src.second()) + STACK_BIAS, dst.second()->as_Register()); | |
1570 } else { | |
1571 __ ldf(FloatRegisterImpl::S, FP, reg2offset(src.first()) + STACK_BIAS, dst.first()->as_FloatRegister()); | |
1572 __ ldf(FloatRegisterImpl::S, FP, reg2offset(src.second()) + STACK_BIAS, dst.second()->as_FloatRegister()); | |
1573 } | |
1574 } | |
1575 } | |
1576 } else if (dst.first()->is_stack()) { | |
1577 // reg to stack | |
1578 if (src.first()->is_Register()) { | |
1579 // Eventually optimize for alignment QQQ | |
1580 __ st(src.first()->as_Register(), SP, reg2offset(dst.first()) + STACK_BIAS); | |
1581 if (src.second()->is_stack()) { | |
1582 __ ld(FP, reg2offset(src.second()) + STACK_BIAS, L4); | |
1583 __ st(L4, SP, reg2offset(dst.second()) + STACK_BIAS); | |
1584 } else { | |
1585 __ st(src.second()->as_Register(), SP, reg2offset(dst.second()) + STACK_BIAS); | |
1586 } | |
1587 } else { | |
1588 // fpr to stack | |
1589 if (src.second()->is_stack()) { | |
1590 ShouldNotReachHere(); | |
1591 } else { | |
1592 // Is the stack aligned? | |
1593 if (reg2offset(dst.first()) & 0x7) { | |
1594 // No do as pairs | |
1595 __ stf(FloatRegisterImpl::S, src.first()->as_FloatRegister(), SP, reg2offset(dst.first()) + STACK_BIAS); | |
1596 __ stf(FloatRegisterImpl::S, src.second()->as_FloatRegister(), SP, reg2offset(dst.second()) + STACK_BIAS); | |
1597 } else { | |
1598 __ stf(FloatRegisterImpl::D, src.first()->as_FloatRegister(), SP, reg2offset(dst.first()) + STACK_BIAS); | |
1599 } | |
1600 } | |
1601 } | |
1602 } else { | |
1603 // reg to reg | |
1604 if (src.first()->is_Register()) { | |
1605 if (dst.first()->is_Register()) { | |
1606 // gpr -> gpr | |
1607 __ mov(src.first()->as_Register(), dst.first()->as_Register()); | |
1608 __ mov(src.second()->as_Register(), dst.second()->as_Register()); | |
1609 } else { | |
1610 // gpr -> fpr | |
1611 // ought to be able to do a single store | |
1612 __ stx(src.first()->as_Register(), FP, -8 + STACK_BIAS); | |
1613 __ stx(src.second()->as_Register(), FP, -4 + STACK_BIAS); | |
1614 // ought to be able to do a single load | |
1615 __ ldf(FloatRegisterImpl::S, FP, -8 + STACK_BIAS, dst.first()->as_FloatRegister()); | |
1616 __ ldf(FloatRegisterImpl::S, FP, -4 + STACK_BIAS, dst.second()->as_FloatRegister()); | |
1617 } | |
1618 } else if (dst.first()->is_Register()) { | |
1619 // fpr -> gpr | |
1620 // ought to be able to do a single store | |
1621 __ stf(FloatRegisterImpl::D, src.first()->as_FloatRegister(), FP, -8 + STACK_BIAS); | |
1622 // ought to be able to do a single load | |
1623 // REMEMBER first() is low address not LSB | |
1624 __ ld(FP, -8 + STACK_BIAS, dst.first()->as_Register()); | |
1625 if (dst.second()->is_Register()) { | |
1626 __ ld(FP, -4 + STACK_BIAS, dst.second()->as_Register()); | |
1627 } else { | |
1628 __ ld(FP, -4 + STACK_BIAS, L4); | |
1629 __ st(L4, SP, reg2offset(dst.second()) + STACK_BIAS); | |
1630 } | |
1631 } else { | |
1632 // fpr -> fpr | |
1633 // In theory these overlap but the ordering is such that this is likely a nop | |
1634 if ( src.first() != dst.first()) { | |
1635 __ fmov(FloatRegisterImpl::D, src.first()->as_FloatRegister(), dst.first()->as_FloatRegister()); | |
1636 } | |
1637 } | |
1638 } | |
1639 } | |
1640 | |
1641 // Creates an inner frame if one hasn't already been created, and | |
1642 // saves a copy of the thread in L7_thread_cache | |
1643 static void create_inner_frame(MacroAssembler* masm, bool* already_created) { | |
1644 if (!*already_created) { | |
1645 __ save_frame(0); | |
1646 // Save thread in L7 (INNER FRAME); it crosses a bunch of VM calls below | |
1647 // Don't use save_thread because it smashes G2 and we merely want to save a | |
1648 // copy | |
1649 __ mov(G2_thread, L7_thread_cache); | |
1650 *already_created = true; | |
1651 } | |
1652 } | |
1653 | |
4873
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1654 |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1655 static void save_or_restore_arguments(MacroAssembler* masm, |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1656 const int stack_slots, |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1657 const int total_in_args, |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1658 const int arg_save_area, |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1659 OopMap* map, |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1660 VMRegPair* in_regs, |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1661 BasicType* in_sig_bt) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1662 // if map is non-NULL then the code should store the values, |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1663 // otherwise it should load them. |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1664 if (map != NULL) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1665 // Fill in the map |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1666 for (int i = 0; i < total_in_args; i++) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1667 if (in_sig_bt[i] == T_ARRAY) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1668 if (in_regs[i].first()->is_stack()) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1669 int offset_in_older_frame = in_regs[i].first()->reg2stack() + SharedRuntime::out_preserve_stack_slots(); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1670 map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + stack_slots)); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1671 } else if (in_regs[i].first()->is_Register()) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1672 map->set_oop(in_regs[i].first()); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1673 } else { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1674 ShouldNotReachHere(); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1675 } |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1676 } |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1677 } |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1678 } |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1679 |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1680 // Save or restore double word values |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1681 int handle_index = 0; |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1682 for (int i = 0; i < total_in_args; i++) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1683 int slot = handle_index + arg_save_area; |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1684 int offset = slot * VMRegImpl::stack_slot_size; |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1685 if (in_sig_bt[i] == T_LONG && in_regs[i].first()->is_Register()) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1686 const Register reg = in_regs[i].first()->as_Register(); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1687 if (reg->is_global()) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1688 handle_index += 2; |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1689 assert(handle_index <= stack_slots, "overflow"); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1690 if (map != NULL) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1691 __ stx(reg, SP, offset + STACK_BIAS); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1692 } else { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1693 __ ldx(SP, offset + STACK_BIAS, reg); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1694 } |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1695 } |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1696 } else if (in_sig_bt[i] == T_DOUBLE && in_regs[i].first()->is_FloatRegister()) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1697 handle_index += 2; |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1698 assert(handle_index <= stack_slots, "overflow"); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1699 if (map != NULL) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1700 __ stf(FloatRegisterImpl::D, in_regs[i].first()->as_FloatRegister(), SP, offset + STACK_BIAS); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1701 } else { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1702 __ ldf(FloatRegisterImpl::D, SP, offset + STACK_BIAS, in_regs[i].first()->as_FloatRegister()); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1703 } |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1704 } |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1705 } |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1706 // Save floats |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1707 for (int i = 0; i < total_in_args; i++) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1708 int slot = handle_index + arg_save_area; |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1709 int offset = slot * VMRegImpl::stack_slot_size; |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1710 if (in_sig_bt[i] == T_FLOAT && in_regs[i].first()->is_FloatRegister()) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1711 handle_index++; |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1712 assert(handle_index <= stack_slots, "overflow"); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1713 if (map != NULL) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1714 __ stf(FloatRegisterImpl::S, in_regs[i].first()->as_FloatRegister(), SP, offset + STACK_BIAS); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1715 } else { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1716 __ ldf(FloatRegisterImpl::S, SP, offset + STACK_BIAS, in_regs[i].first()->as_FloatRegister()); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1717 } |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1718 } |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1719 } |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1720 |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1721 } |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1722 |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1723 |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1724 // Check GC_locker::needs_gc and enter the runtime if it's true. This |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1725 // keeps a new JNI critical region from starting until a GC has been |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1726 // forced. Save down any oops in registers and describe them in an |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1727 // OopMap. |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1728 static void check_needs_gc_for_critical_native(MacroAssembler* masm, |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1729 const int stack_slots, |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1730 const int total_in_args, |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1731 const int arg_save_area, |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1732 OopMapSet* oop_maps, |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1733 VMRegPair* in_regs, |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1734 BasicType* in_sig_bt) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1735 __ block_comment("check GC_locker::needs_gc"); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1736 Label cont; |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1737 AddressLiteral sync_state(GC_locker::needs_gc_address()); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1738 __ load_bool_contents(sync_state, G3_scratch); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1739 __ cmp_zero_and_br(Assembler::equal, G3_scratch, cont); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1740 __ delayed()->nop(); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1741 |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1742 // Save down any values that are live in registers and call into the |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1743 // runtime to halt for a GC |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1744 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1745 save_or_restore_arguments(masm, stack_slots, total_in_args, |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1746 arg_save_area, map, in_regs, in_sig_bt); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1747 |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1748 __ mov(G2_thread, L7_thread_cache); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1749 |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1750 __ set_last_Java_frame(SP, noreg); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1751 |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1752 __ block_comment("block_for_jni_critical"); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1753 __ call(CAST_FROM_FN_PTR(address, SharedRuntime::block_for_jni_critical), relocInfo::runtime_call_type); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1754 __ delayed()->mov(L7_thread_cache, O0); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1755 oop_maps->add_gc_map( __ offset(), map); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1756 |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1757 __ restore_thread(L7_thread_cache); // restore G2_thread |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1758 __ reset_last_Java_frame(); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1759 |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1760 // Reload all the register arguments |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1761 save_or_restore_arguments(masm, stack_slots, total_in_args, |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1762 arg_save_area, NULL, in_regs, in_sig_bt); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1763 |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1764 __ bind(cont); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1765 #ifdef ASSERT |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1766 if (StressCriticalJNINatives) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1767 // Stress register saving |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1768 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1769 save_or_restore_arguments(masm, stack_slots, total_in_args, |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1770 arg_save_area, map, in_regs, in_sig_bt); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1771 // Destroy argument registers |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1772 for (int i = 0; i < total_in_args; i++) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1773 if (in_regs[i].first()->is_Register()) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1774 const Register reg = in_regs[i].first()->as_Register(); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1775 if (reg->is_global()) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1776 __ mov(G0, reg); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1777 } |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1778 } else if (in_regs[i].first()->is_FloatRegister()) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1779 __ fneg(FloatRegisterImpl::D, in_regs[i].first()->as_FloatRegister(), in_regs[i].first()->as_FloatRegister()); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1780 } |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1781 } |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1782 |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1783 save_or_restore_arguments(masm, stack_slots, total_in_args, |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1784 arg_save_area, NULL, in_regs, in_sig_bt); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1785 } |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1786 #endif |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1787 } |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1788 |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1789 // Unpack an array argument into a pointer to the body and the length |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1790 // if the array is non-null, otherwise pass 0 for both. |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1791 static void unpack_array_argument(MacroAssembler* masm, VMRegPair reg, BasicType in_elem_type, VMRegPair body_arg, VMRegPair length_arg) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1792 // Pass the length, ptr pair |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1793 Label is_null, done; |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1794 if (reg.first()->is_stack()) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1795 VMRegPair tmp = reg64_to_VMRegPair(L2); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1796 // Load the arg up from the stack |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1797 move_ptr(masm, reg, tmp); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1798 reg = tmp; |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1799 } |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1800 __ cmp(reg.first()->as_Register(), G0); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1801 __ brx(Assembler::equal, false, Assembler::pt, is_null); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1802 __ delayed()->add(reg.first()->as_Register(), arrayOopDesc::base_offset_in_bytes(in_elem_type), L4); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1803 move_ptr(masm, reg64_to_VMRegPair(L4), body_arg); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1804 __ ld(reg.first()->as_Register(), arrayOopDesc::length_offset_in_bytes(), L4); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1805 move32_64(masm, reg64_to_VMRegPair(L4), length_arg); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1806 __ ba_short(done); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1807 __ bind(is_null); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1808 // Pass zeros |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1809 move_ptr(masm, reg64_to_VMRegPair(G0), body_arg); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1810 move32_64(masm, reg64_to_VMRegPair(G0), length_arg); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1811 __ bind(done); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1812 } |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1813 |
6266
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1814 static void verify_oop_args(MacroAssembler* masm, |
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
1815 methodHandle method, |
6266
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1816 const BasicType* sig_bt, |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1817 const VMRegPair* regs) { |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1818 Register temp_reg = G5_method; // not part of any compiled calling seq |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1819 if (VerifyOops) { |
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
1820 for (int i = 0; i < method->size_of_parameters(); i++) { |
6266
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1821 if (sig_bt[i] == T_OBJECT || |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1822 sig_bt[i] == T_ARRAY) { |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1823 VMReg r = regs[i].first(); |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1824 assert(r->is_valid(), "bad oop arg"); |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1825 if (r->is_stack()) { |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1826 RegisterOrConstant ld_off = reg2offset(r) + STACK_BIAS; |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1827 ld_off = __ ensure_simm13_or_reg(ld_off, temp_reg); |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1828 __ ld_ptr(SP, ld_off, temp_reg); |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1829 __ verify_oop(temp_reg); |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1830 } else { |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1831 __ verify_oop(r->as_Register()); |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1832 } |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1833 } |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1834 } |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1835 } |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1836 } |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1837 |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1838 static void gen_special_dispatch(MacroAssembler* masm, |
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
1839 methodHandle method, |
6266
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1840 const BasicType* sig_bt, |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1841 const VMRegPair* regs) { |
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
1842 verify_oop_args(masm, method, sig_bt, regs); |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
1843 vmIntrinsics::ID iid = method->intrinsic_id(); |
6266
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1844 |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1845 // Now write the args into the outgoing interpreter space |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1846 bool has_receiver = false; |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1847 Register receiver_reg = noreg; |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1848 int member_arg_pos = -1; |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1849 Register member_reg = noreg; |
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
1850 int ref_kind = MethodHandles::signature_polymorphic_intrinsic_ref_kind(iid); |
6266
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1851 if (ref_kind != 0) { |
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
1852 member_arg_pos = method->size_of_parameters() - 1; // trailing MemberName argument |
6266
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1853 member_reg = G5_method; // known to be free at this point |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1854 has_receiver = MethodHandles::ref_kind_has_receiver(ref_kind); |
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
1855 } else if (iid == vmIntrinsics::_invokeBasic) { |
6266
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1856 has_receiver = true; |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1857 } else { |
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
1858 fatal(err_msg_res("unexpected intrinsic id %d", iid)); |
6266
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1859 } |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1860 |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1861 if (member_reg != noreg) { |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1862 // Load the member_arg into register, if necessary. |
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
1863 SharedRuntime::check_member_name_argument_is_last_argument(method, sig_bt, regs); |
6266
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1864 VMReg r = regs[member_arg_pos].first(); |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1865 if (r->is_stack()) { |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1866 RegisterOrConstant ld_off = reg2offset(r) + STACK_BIAS; |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1867 ld_off = __ ensure_simm13_or_reg(ld_off, member_reg); |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1868 __ ld_ptr(SP, ld_off, member_reg); |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1869 } else { |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1870 // no data motion is needed |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1871 member_reg = r->as_Register(); |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1872 } |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1873 } |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1874 |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1875 if (has_receiver) { |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1876 // Make sure the receiver is loaded into a register. |
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
1877 assert(method->size_of_parameters() > 0, "oob"); |
6266
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1878 assert(sig_bt[0] == T_OBJECT, "receiver argument must be an object"); |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1879 VMReg r = regs[0].first(); |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1880 assert(r->is_valid(), "bad receiver arg"); |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1881 if (r->is_stack()) { |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1882 // Porting note: This assumes that compiled calling conventions always |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1883 // pass the receiver oop in a register. If this is not true on some |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1884 // platform, pick a temp and load the receiver from stack. |
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
1885 fatal("receiver always in a register"); |
6266
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1886 receiver_reg = G3_scratch; // known to be free at this point |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1887 RegisterOrConstant ld_off = reg2offset(r) + STACK_BIAS; |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1888 ld_off = __ ensure_simm13_or_reg(ld_off, member_reg); |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1889 __ ld_ptr(SP, ld_off, receiver_reg); |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1890 } else { |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1891 // no data motion is needed |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1892 receiver_reg = r->as_Register(); |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1893 } |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1894 } |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1895 |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1896 // Figure out which address we are really jumping to: |
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
1897 MethodHandles::generate_method_handle_dispatch(masm, iid, |
6266
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1898 receiver_reg, member_reg, /*for_compiler_entry:*/ true); |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1899 } |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1900 |
0 | 1901 // --------------------------------------------------------------------------- |
1902 // Generate a native wrapper for a given method. The method takes arguments | |
1903 // in the Java compiled code convention, marshals them to the native | |
1904 // convention (handlizes oops, etc), transitions to native, makes the call, | |
1905 // returns to java state (possibly blocking), unhandlizes any result and | |
1906 // returns. | |
6266
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1907 // |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1908 // Critical native functions are a shorthand for the use of |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1909 // GetPrimtiveArrayCritical and disallow the use of any other JNI |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1910 // functions. The wrapper is expected to unpack the arguments before |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1911 // passing them to the callee and perform checks before and after the |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1912 // native call to ensure that they GC_locker |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1913 // lock_critical/unlock_critical semantics are followed. Some other |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1914 // parts of JNI setup are skipped like the tear down of the JNI handle |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1915 // block and the check for pending exceptions it's impossible for them |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1916 // to be thrown. |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1917 // |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1918 // They are roughly structured like this: |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1919 // if (GC_locker::needs_gc()) |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1920 // SharedRuntime::block_for_jni_critical(); |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1921 // tranistion to thread_in_native |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1922 // unpack arrray arguments and call native entry point |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1923 // check for safepoint in progress |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1924 // check if any thread suspend flags are set |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1925 // call into JVM and possible unlock the JNI critical |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1926 // if a GC was suppressed while in the critical native. |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1927 // transition back to thread_in_Java |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1928 // return to caller |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1929 // |
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
1930 nmethod* SharedRuntime::generate_native_wrapper(MacroAssembler* masm, |
0 | 1931 methodHandle method, |
2405
3d58a4983660
7022998: JSR 292 recursive method handle calls inline themselves infinitely
twisti
parents:
2177
diff
changeset
|
1932 int compile_id, |
6266
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1933 BasicType* in_sig_bt, |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1934 VMRegPair* in_regs, |
0 | 1935 BasicType ret_type) { |
6266
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1936 if (method->is_method_handle_intrinsic()) { |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1937 vmIntrinsics::ID iid = method->intrinsic_id(); |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1938 intptr_t start = (intptr_t)__ pc(); |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1939 int vep_offset = ((intptr_t)__ pc()) - start; |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1940 gen_special_dispatch(masm, |
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
1941 method, |
6266
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1942 in_sig_bt, |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1943 in_regs); |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1944 int frame_complete = ((intptr_t)__ pc()) - start; // not complete, period |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1945 __ flush(); |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1946 int stack_slots = SharedRuntime::out_preserve_stack_slots(); // no out slots at all, actually |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1947 return nmethod::new_native_nmethod(method, |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1948 compile_id, |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1949 masm->code(), |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1950 vep_offset, |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1951 frame_complete, |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1952 stack_slots / VMRegImpl::slots_per_word, |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1953 in_ByteSize(-1), |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1954 in_ByteSize(-1), |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1955 (OopMapSet*)NULL); |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1956 } |
4873
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1957 bool is_critical_native = true; |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1958 address native_func = method->critical_native_function(); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1959 if (native_func == NULL) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1960 native_func = method->native_function(); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1961 is_critical_native = false; |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1962 } |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1963 assert(native_func != NULL, "must have function"); |
0 | 1964 |
1965 // Native nmethod wrappers never take possesion of the oop arguments. | |
1966 // So the caller will gc the arguments. The only thing we need an | |
1967 // oopMap for is if the call is static | |
1968 // | |
1969 // An OopMap for lock (and class if static), and one for the VM call itself | |
1970 OopMapSet *oop_maps = new OopMapSet(); | |
1971 intptr_t start = (intptr_t)__ pc(); | |
1972 | |
1973 // First thing make an ic check to see if we should even be here | |
1974 { | |
1975 Label L; | |
1976 const Register temp_reg = G3_scratch; | |
727 | 1977 AddressLiteral ic_miss(SharedRuntime::get_ic_miss_stub()); |
0 | 1978 __ verify_oop(O0); |
113
ba764ed4b6f2
6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents:
0
diff
changeset
|
1979 __ load_klass(O0, temp_reg); |
3839 | 1980 __ cmp_and_brx_short(temp_reg, G5_inline_cache_reg, Assembler::equal, Assembler::pt, L); |
0 | 1981 |
727 | 1982 __ jump_to(ic_miss, temp_reg); |
0 | 1983 __ delayed()->nop(); |
1984 __ align(CodeEntryAlignment); | |
1985 __ bind(L); | |
1986 } | |
1987 | |
1988 int vep_offset = ((intptr_t)__ pc()) - start; | |
1989 | |
1990 #ifdef COMPILER1 | |
1991 if (InlineObjectHash && method->intrinsic_id() == vmIntrinsics::_hashCode) { | |
1992 // Object.hashCode can pull the hashCode from the header word | |
1993 // instead of doing a full VM transition once it's been computed. | |
1994 // Since hashCode is usually polymorphic at call sites we can't do | |
1995 // this optimization at the call site without a lot of work. | |
1996 Label slowCase; | |
1997 Register receiver = O0; | |
1998 Register result = O0; | |
1999 Register header = G3_scratch; | |
2000 Register hash = G3_scratch; // overwrite header value with hash value | |
2001 Register mask = G1; // to get hash field from header | |
2002 | |
2003 // Read the header and build a mask to get its hash field. Give up if the object is not unlocked. | |
2004 // We depend on hash_mask being at most 32 bits and avoid the use of | |
2005 // hash_mask_in_place because it could be larger than 32 bits in a 64-bit | |
2006 // vm: see markOop.hpp. | |
2007 __ ld_ptr(receiver, oopDesc::mark_offset_in_bytes(), header); | |
2008 __ sethi(markOopDesc::hash_mask, mask); | |
2009 __ btst(markOopDesc::unlocked_value, header); | |
2010 __ br(Assembler::zero, false, Assembler::pn, slowCase); | |
2011 if (UseBiasedLocking) { | |
2012 // Check if biased and fall through to runtime if so | |
2013 __ delayed()->nop(); | |
2014 __ btst(markOopDesc::biased_lock_bit_in_place, header); | |
2015 __ br(Assembler::notZero, false, Assembler::pn, slowCase); | |
2016 } | |
2017 __ delayed()->or3(mask, markOopDesc::hash_mask & 0x3ff, mask); | |
2018 | |
2019 // Check for a valid (non-zero) hash code and get its value. | |
2020 #ifdef _LP64 | |
2021 __ srlx(header, markOopDesc::hash_shift, hash); | |
2022 #else | |
2023 __ srl(header, markOopDesc::hash_shift, hash); | |
2024 #endif | |
2025 __ andcc(hash, mask, hash); | |
2026 __ br(Assembler::equal, false, Assembler::pn, slowCase); | |
2027 __ delayed()->nop(); | |
2028 | |
2029 // leaf return. | |
2030 __ retl(); | |
2031 __ delayed()->mov(hash, result); | |
2032 __ bind(slowCase); | |
2033 } | |
2034 #endif // COMPILER1 | |
2035 | |
2036 | |
2037 // We have received a description of where all the java arg are located | |
2038 // on entry to the wrapper. We need to convert these args to where | |
2039 // the jni function will expect them. To figure out where they go | |
2040 // we convert the java signature to a C signature by inserting | |
2041 // the hidden arguments as arg[0] and possibly arg[1] (static method) | |
2042 | |
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
2043 const int total_in_args = method->size_of_parameters(); |
4873
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2044 int total_c_args = total_in_args; |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2045 int total_save_slots = 6 * VMRegImpl::slots_per_word; |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2046 if (!is_critical_native) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2047 total_c_args += 1; |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2048 if (method->is_static()) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2049 total_c_args++; |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2050 } |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2051 } else { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2052 for (int i = 0; i < total_in_args; i++) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2053 if (in_sig_bt[i] == T_ARRAY) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2054 // These have to be saved and restored across the safepoint |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2055 total_c_args++; |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2056 } |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2057 } |
0 | 2058 } |
2059 | |
2060 BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_c_args); | |
4873
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2061 VMRegPair* out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_c_args); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2062 BasicType* in_elem_bt = NULL; |
0 | 2063 |
2064 int argc = 0; | |
4873
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2065 if (!is_critical_native) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2066 out_sig_bt[argc++] = T_ADDRESS; |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2067 if (method->is_static()) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2068 out_sig_bt[argc++] = T_OBJECT; |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2069 } |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2070 |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2071 for (int i = 0; i < total_in_args ; i++ ) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2072 out_sig_bt[argc++] = in_sig_bt[i]; |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2073 } |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2074 } else { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2075 Thread* THREAD = Thread::current(); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2076 in_elem_bt = NEW_RESOURCE_ARRAY(BasicType, total_in_args); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2077 SignatureStream ss(method->signature()); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2078 for (int i = 0; i < total_in_args ; i++ ) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2079 if (in_sig_bt[i] == T_ARRAY) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2080 // Arrays are passed as int, elem* pair |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2081 out_sig_bt[argc++] = T_INT; |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2082 out_sig_bt[argc++] = T_ADDRESS; |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2083 Symbol* atype = ss.as_symbol(CHECK_NULL); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2084 const char* at = atype->as_C_string(); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2085 if (strlen(at) == 2) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2086 assert(at[0] == '[', "must be"); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2087 switch (at[1]) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2088 case 'B': in_elem_bt[i] = T_BYTE; break; |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2089 case 'C': in_elem_bt[i] = T_CHAR; break; |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2090 case 'D': in_elem_bt[i] = T_DOUBLE; break; |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2091 case 'F': in_elem_bt[i] = T_FLOAT; break; |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2092 case 'I': in_elem_bt[i] = T_INT; break; |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2093 case 'J': in_elem_bt[i] = T_LONG; break; |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2094 case 'S': in_elem_bt[i] = T_SHORT; break; |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2095 case 'Z': in_elem_bt[i] = T_BOOLEAN; break; |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2096 default: ShouldNotReachHere(); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2097 } |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2098 } |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2099 } else { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2100 out_sig_bt[argc++] = in_sig_bt[i]; |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2101 in_elem_bt[i] = T_VOID; |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2102 } |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2103 if (in_sig_bt[i] != T_VOID) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2104 assert(in_sig_bt[i] == ss.type(), "must match"); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2105 ss.next(); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2106 } |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2107 } |
0 | 2108 } |
2109 | |
2110 // Now figure out where the args must be stored and how much stack space | |
2111 // they require (neglecting out_preserve_stack_slots but space for storing | |
2112 // the 1st six register arguments). It's weird see int_stk_helper. | |
2113 // | |
2114 int out_arg_slots; | |
14416
6a936747b569
8024344: PPC64 (part 112): C argument in register AND stack slot.
goetz
parents:
10997
diff
changeset
|
2115 out_arg_slots = c_calling_convention(out_sig_bt, out_regs, NULL, total_c_args); |
0 | 2116 |
4873
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2117 if (is_critical_native) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2118 // Critical natives may have to call out so they need a save area |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2119 // for register arguments. |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2120 int double_slots = 0; |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2121 int single_slots = 0; |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2122 for ( int i = 0; i < total_in_args; i++) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2123 if (in_regs[i].first()->is_Register()) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2124 const Register reg = in_regs[i].first()->as_Register(); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2125 switch (in_sig_bt[i]) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2126 case T_ARRAY: |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2127 case T_BOOLEAN: |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2128 case T_BYTE: |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2129 case T_SHORT: |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2130 case T_CHAR: |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2131 case T_INT: assert(reg->is_in(), "don't need to save these"); break; |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2132 case T_LONG: if (reg->is_global()) double_slots++; break; |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2133 default: ShouldNotReachHere(); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2134 } |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2135 } else if (in_regs[i].first()->is_FloatRegister()) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2136 switch (in_sig_bt[i]) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2137 case T_FLOAT: single_slots++; break; |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2138 case T_DOUBLE: double_slots++; break; |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2139 default: ShouldNotReachHere(); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2140 } |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2141 } |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2142 } |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2143 total_save_slots = double_slots * 2 + single_slots; |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2144 } |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2145 |
0 | 2146 // Compute framesize for the wrapper. We need to handlize all oops in |
2147 // registers. We must create space for them here that is disjoint from | |
2148 // the windowed save area because we have no control over when we might | |
2149 // flush the window again and overwrite values that gc has since modified. | |
2150 // (The live window race) | |
2151 // | |
2152 // We always just allocate 6 word for storing down these object. This allow | |
2153 // us to simply record the base and use the Ireg number to decide which | |
2154 // slot to use. (Note that the reg number is the inbound number not the | |
2155 // outbound number). | |
2156 // We must shuffle args to match the native convention, and include var-args space. | |
2157 | |
2158 // Calculate the total number of stack slots we will need. | |
2159 | |
2160 // First count the abi requirement plus all of the outgoing args | |
2161 int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots; | |
2162 | |
2163 // Now the space for the inbound oop handle area | |
2164 | |
4873
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2165 int oop_handle_offset = round_to(stack_slots, 2); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2166 stack_slots += total_save_slots; |
0 | 2167 |
2168 // Now any space we need for handlizing a klass if static method | |
2169 | |
2170 int klass_slot_offset = 0; | |
2171 int klass_offset = -1; | |
2172 int lock_slot_offset = 0; | |
2173 bool is_static = false; | |
2174 | |
2175 if (method->is_static()) { | |
2176 klass_slot_offset = stack_slots; | |
2177 stack_slots += VMRegImpl::slots_per_word; | |
2178 klass_offset = klass_slot_offset * VMRegImpl::stack_slot_size; | |
2179 is_static = true; | |
2180 } | |
2181 | |
2182 // Plus a lock if needed | |
2183 | |
2184 if (method->is_synchronized()) { | |
2185 lock_slot_offset = stack_slots; | |
2186 stack_slots += VMRegImpl::slots_per_word; | |
2187 } | |
2188 | |
2189 // Now a place to save return value or as a temporary for any gpr -> fpr moves | |
2190 stack_slots += 2; | |
2191 | |
2192 // Ok The space we have allocated will look like: | |
2193 // | |
2194 // | |
2195 // FP-> | | | |
2196 // |---------------------| | |
2197 // | 2 slots for moves | | |
2198 // |---------------------| | |
2199 // | lock box (if sync) | | |
2200 // |---------------------| <- lock_slot_offset | |
2201 // | klass (if static) | | |
2202 // |---------------------| <- klass_slot_offset | |
2203 // | oopHandle area | | |
2204 // |---------------------| <- oop_handle_offset | |
2205 // | outbound memory | | |
2206 // | based arguments | | |
2207 // | | | |
2208 // |---------------------| | |
2209 // | vararg area | | |
2210 // |---------------------| | |
2211 // | | | |
2212 // SP-> | out_preserved_slots | | |
2213 // | |
2214 // | |
2215 | |
2216 | |
2217 // Now compute actual number of stack words we need rounding to make | |
2218 // stack properly aligned. | |
2219 stack_slots = round_to(stack_slots, 2 * VMRegImpl::slots_per_word); | |
2220 | |
2221 int stack_size = stack_slots * VMRegImpl::stack_slot_size; | |
2222 | |
2223 // Generate stack overflow check before creating frame | |
2224 __ generate_stack_overflow_check(stack_size); | |
2225 | |
2226 // Generate a new frame for the wrapper. | |
2227 __ save(SP, -stack_size, SP); | |
2228 | |
2229 int frame_complete = ((intptr_t)__ pc()) - start; | |
2230 | |
2231 __ verify_thread(); | |
2232 | |
4873
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2233 if (is_critical_native) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2234 check_needs_gc_for_critical_native(masm, stack_slots, total_in_args, |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2235 oop_handle_offset, oop_maps, in_regs, in_sig_bt); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2236 } |
0 | 2237 |
2238 // | |
2239 // We immediately shuffle the arguments so that any vm call we have to | |
2240 // make from here on out (sync slow path, jvmti, etc.) we will have | |
2241 // captured the oops from our caller and have a valid oopMap for | |
2242 // them. | |
2243 | |
2244 // ----------------- | |
2245 // The Grand Shuffle | |
2246 // | |
2247 // Natives require 1 or 2 extra arguments over the normal ones: the JNIEnv* | |
2248 // (derived from JavaThread* which is in L7_thread_cache) and, if static, | |
2249 // the class mirror instead of a receiver. This pretty much guarantees that | |
2250 // register layout will not match. We ignore these extra arguments during | |
2251 // the shuffle. The shuffle is described by the two calling convention | |
2252 // vectors we have in our possession. We simply walk the java vector to | |
2253 // get the source locations and the c vector to get the destinations. | |
2254 // Because we have a new window and the argument registers are completely | |
2255 // disjoint ( I0 -> O1, I1 -> O2, ...) we have nothing to worry about | |
2256 // here. | |
2257 | |
2258 // This is a trick. We double the stack slots so we can claim | |
2259 // the oops in the caller's frame. Since we are sure to have | |
2260 // more args than the caller doubling is enough to make | |
2261 // sure we can capture all the incoming oop args from the | |
2262 // caller. | |
2263 // | |
2264 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/); | |
2265 // Record sp-based slot for receiver on stack for non-static methods | |
2266 int receiver_offset = -1; | |
2267 | |
2268 // We move the arguments backward because the floating point registers | |
2269 // destination will always be to a register with a greater or equal register | |
2270 // number or the stack. | |
2271 | |
2272 #ifdef ASSERT | |
2273 bool reg_destroyed[RegisterImpl::number_of_registers]; | |
2274 bool freg_destroyed[FloatRegisterImpl::number_of_registers]; | |
2275 for ( int r = 0 ; r < RegisterImpl::number_of_registers ; r++ ) { | |
2276 reg_destroyed[r] = false; | |
2277 } | |
2278 for ( int f = 0 ; f < FloatRegisterImpl::number_of_registers ; f++ ) { | |
2279 freg_destroyed[f] = false; | |
2280 } | |
2281 | |
2282 #endif /* ASSERT */ | |
2283 | |
4873
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2284 for ( int i = total_in_args - 1, c_arg = total_c_args - 1; i >= 0 ; i--, c_arg-- ) { |
0 | 2285 |
2286 #ifdef ASSERT | |
2287 if (in_regs[i].first()->is_Register()) { | |
2288 assert(!reg_destroyed[in_regs[i].first()->as_Register()->encoding()], "ack!"); | |
2289 } else if (in_regs[i].first()->is_FloatRegister()) { | |
2290 assert(!freg_destroyed[in_regs[i].first()->as_FloatRegister()->encoding(FloatRegisterImpl::S)], "ack!"); | |
2291 } | |
2292 if (out_regs[c_arg].first()->is_Register()) { | |
2293 reg_destroyed[out_regs[c_arg].first()->as_Register()->encoding()] = true; | |
2294 } else if (out_regs[c_arg].first()->is_FloatRegister()) { | |
2295 freg_destroyed[out_regs[c_arg].first()->as_FloatRegister()->encoding(FloatRegisterImpl::S)] = true; | |
2296 } | |
2297 #endif /* ASSERT */ | |
2298 | |
2299 switch (in_sig_bt[i]) { | |
2300 case T_ARRAY: | |
4873
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2301 if (is_critical_native) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2302 unpack_array_argument(masm, in_regs[i], in_elem_bt[i], out_regs[c_arg], out_regs[c_arg - 1]); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2303 c_arg--; |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2304 break; |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2305 } |
0 | 2306 case T_OBJECT: |
4873
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2307 assert(!is_critical_native, "no oop arguments"); |
0 | 2308 object_move(masm, map, oop_handle_offset, stack_slots, in_regs[i], out_regs[c_arg], |
2309 ((i == 0) && (!is_static)), | |
2310 &receiver_offset); | |
2311 break; | |
2312 case T_VOID: | |
2313 break; | |
2314 | |
2315 case T_FLOAT: | |
2316 float_move(masm, in_regs[i], out_regs[c_arg]); | |
4873
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2317 break; |
0 | 2318 |
2319 case T_DOUBLE: | |
2320 assert( i + 1 < total_in_args && | |
2321 in_sig_bt[i + 1] == T_VOID && | |
2322 out_sig_bt[c_arg+1] == T_VOID, "bad arg list"); | |
2323 double_move(masm, in_regs[i], out_regs[c_arg]); | |
2324 break; | |
2325 | |
2326 case T_LONG : | |
2327 long_move(masm, in_regs[i], out_regs[c_arg]); | |
2328 break; | |
2329 | |
2330 case T_ADDRESS: assert(false, "found T_ADDRESS in java args"); | |
2331 | |
2332 default: | |
2333 move32_64(masm, in_regs[i], out_regs[c_arg]); | |
2334 } | |
2335 } | |
2336 | |
2337 // Pre-load a static method's oop into O1. Used both by locking code and | |
2338 // the normal JNI call code. | |
4873
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2339 if (method->is_static() && !is_critical_native) { |
6940
18fb7da42534
8000725: NPG: method_holder() and pool_holder() and pool_holder field should be InstanceKlass
coleenp
parents:
6792
diff
changeset
|
2340 __ set_oop_constant(JNIHandles::make_local(method->method_holder()->java_mirror()), O1); |
0 | 2341 |
2342 // Now handlize the static class mirror in O1. It's known not-null. | |
2343 __ st_ptr(O1, SP, klass_offset + STACK_BIAS); | |
2344 map->set_oop(VMRegImpl::stack2reg(klass_slot_offset)); | |
2345 __ add(SP, klass_offset + STACK_BIAS, O1); | |
2346 } | |
2347 | |
2348 | |
2349 const Register L6_handle = L6; | |
2350 | |
2351 if (method->is_synchronized()) { | |
4873
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2352 assert(!is_critical_native, "unhandled"); |
0 | 2353 __ mov(O1, L6_handle); |
2354 } | |
2355 | |
2356 // We have all of the arguments setup at this point. We MUST NOT touch any Oregs | |
2357 // except O6/O7. So if we must call out we must push a new frame. We immediately | |
2358 // push a new frame and flush the windows. | |
2359 #ifdef _LP64 | |
2360 intptr_t thepc = (intptr_t) __ pc(); | |
2361 { | |
2362 address here = __ pc(); | |
2363 // Call the next instruction | |
2364 __ call(here + 8, relocInfo::none); | |
2365 __ delayed()->nop(); | |
2366 } | |
2367 #else | |
2368 intptr_t thepc = __ load_pc_address(O7, 0); | |
2369 #endif /* _LP64 */ | |
2370 | |
2371 // We use the same pc/oopMap repeatedly when we call out | |
2372 oop_maps->add_gc_map(thepc - start, map); | |
2373 | |
2374 // O7 now has the pc loaded that we will use when we finally call to native. | |
2375 | |
2376 // Save thread in L7; it crosses a bunch of VM calls below | |
2377 // Don't use save_thread because it smashes G2 and we merely | |
2378 // want to save a copy | |
2379 __ mov(G2_thread, L7_thread_cache); | |
2380 | |
2381 | |
2382 // If we create an inner frame once is plenty | |
2383 // when we create it we must also save G2_thread | |
2384 bool inner_frame_created = false; | |
2385 | |
2386 // dtrace method entry support | |
2387 { | |
2388 SkipIfEqual skip_if( | |
2389 masm, G3_scratch, &DTraceMethodProbes, Assembler::zero); | |
2390 // create inner frame | |
2391 __ save_frame(0); | |
2392 __ mov(G2_thread, L7_thread_cache); | |
6725
da91efe96a93
6964458: Reimplement class meta-data storage to use native memory
coleenp
parents:
6266
diff
changeset
|
2393 __ set_metadata_constant(method(), O1); |
0 | 2394 __ call_VM_leaf(L7_thread_cache, |
2395 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_entry), | |
2396 G2_thread, O1); | |
2397 __ restore(); | |
2398 } | |
2399 | |
610
70998f2e05ef
6805864: 4/3 Problem with jvmti->redefineClasses: some methods don't get redefined
dcubed
parents:
362
diff
changeset
|
2400 // RedefineClasses() tracing support for obsolete method entry |
70998f2e05ef
6805864: 4/3 Problem with jvmti->redefineClasses: some methods don't get redefined
dcubed
parents:
362
diff
changeset
|
2401 if (RC_TRACE_IN_RANGE(0x00001000, 0x00002000)) { |
70998f2e05ef
6805864: 4/3 Problem with jvmti->redefineClasses: some methods don't get redefined
dcubed
parents:
362
diff
changeset
|
2402 // create inner frame |
70998f2e05ef
6805864: 4/3 Problem with jvmti->redefineClasses: some methods don't get redefined
dcubed
parents:
362
diff
changeset
|
2403 __ save_frame(0); |
70998f2e05ef
6805864: 4/3 Problem with jvmti->redefineClasses: some methods don't get redefined
dcubed
parents:
362
diff
changeset
|
2404 __ mov(G2_thread, L7_thread_cache); |
6725
da91efe96a93
6964458: Reimplement class meta-data storage to use native memory
coleenp
parents:
6266
diff
changeset
|
2405 __ set_metadata_constant(method(), O1); |
610
70998f2e05ef
6805864: 4/3 Problem with jvmti->redefineClasses: some methods don't get redefined
dcubed
parents:
362
diff
changeset
|
2406 __ call_VM_leaf(L7_thread_cache, |
70998f2e05ef
6805864: 4/3 Problem with jvmti->redefineClasses: some methods don't get redefined
dcubed
parents:
362
diff
changeset
|
2407 CAST_FROM_FN_PTR(address, SharedRuntime::rc_trace_method_entry), |
70998f2e05ef
6805864: 4/3 Problem with jvmti->redefineClasses: some methods don't get redefined
dcubed
parents:
362
diff
changeset
|
2408 G2_thread, O1); |
70998f2e05ef
6805864: 4/3 Problem with jvmti->redefineClasses: some methods don't get redefined
dcubed
parents:
362
diff
changeset
|
2409 __ restore(); |
70998f2e05ef
6805864: 4/3 Problem with jvmti->redefineClasses: some methods don't get redefined
dcubed
parents:
362
diff
changeset
|
2410 } |
70998f2e05ef
6805864: 4/3 Problem with jvmti->redefineClasses: some methods don't get redefined
dcubed
parents:
362
diff
changeset
|
2411 |
0 | 2412 // We are in the jni frame unless saved_frame is true in which case |
2413 // we are in one frame deeper (the "inner" frame). If we are in the | |
2414 // "inner" frames the args are in the Iregs and if the jni frame then | |
2415 // they are in the Oregs. | |
2416 // If we ever need to go to the VM (for locking, jvmti) then | |
2417 // we will always be in the "inner" frame. | |
2418 | |
2419 // Lock a synchronized method | |
2420 int lock_offset = -1; // Set if locked | |
2421 if (method->is_synchronized()) { | |
2422 Register Roop = O1; | |
2423 const Register L3_box = L3; | |
2424 | |
2425 create_inner_frame(masm, &inner_frame_created); | |
2426 | |
2427 __ ld_ptr(I1, 0, O1); | |
2428 Label done; | |
2429 | |
2430 lock_offset = (lock_slot_offset * VMRegImpl::stack_slot_size); | |
2431 __ add(FP, lock_offset+STACK_BIAS, L3_box); | |
2432 #ifdef ASSERT | |
2433 if (UseBiasedLocking) { | |
2434 // making the box point to itself will make it clear it went unused | |
2435 // but also be obviously invalid | |
2436 __ st_ptr(L3_box, L3_box, 0); | |
2437 } | |
2438 #endif // ASSERT | |
2439 // | |
2440 // Compiler_lock_object (Roop, Rmark, Rbox, Rscratch) -- kills Rmark, Rbox, Rscratch | |
2441 // | |
2442 __ compiler_lock_object(Roop, L1, L3_box, L2); | |
2443 __ br(Assembler::equal, false, Assembler::pt, done); | |
2444 __ delayed() -> add(FP, lock_offset+STACK_BIAS, L3_box); | |
2445 | |
2446 | |
2447 // None of the above fast optimizations worked so we have to get into the | |
2448 // slow case of monitor enter. Inline a special case of call_VM that | |
2449 // disallows any pending_exception. | |
2450 __ mov(Roop, O0); // Need oop in O0 | |
2451 __ mov(L3_box, O1); | |
2452 | |
2453 // Record last_Java_sp, in case the VM code releases the JVM lock. | |
2454 | |
2455 __ set_last_Java_frame(FP, I7); | |
2456 | |
2457 // do the call | |
2458 __ call(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_locking_C), relocInfo::runtime_call_type); | |
2459 __ delayed()->mov(L7_thread_cache, O2); | |
2460 | |
2461 __ restore_thread(L7_thread_cache); // restore G2_thread | |
2462 __ reset_last_Java_frame(); | |
2463 | |
2464 #ifdef ASSERT | |
2465 { Label L; | |
2466 __ ld_ptr(G2_thread, in_bytes(Thread::pending_exception_offset()), O0); | |
3839 | 2467 __ br_null_short(O0, Assembler::pt, L); |
0 | 2468 __ stop("no pending exception allowed on exit from IR::monitorenter"); |
2469 __ bind(L); | |
2470 } | |
2471 #endif | |
2472 __ bind(done); | |
2473 } | |
2474 | |
2475 | |
2476 // Finally just about ready to make the JNI call | |
2477 | |
10997 | 2478 __ flushw(); |
0 | 2479 if (inner_frame_created) { |
2480 __ restore(); | |
2481 } else { | |
2482 // Store only what we need from this frame | |
2483 // QQQ I think that non-v9 (like we care) we don't need these saves | |
2484 // either as the flush traps and the current window goes too. | |
2485 __ st_ptr(FP, SP, FP->sp_offset_in_saved_window()*wordSize + STACK_BIAS); | |
2486 __ st_ptr(I7, SP, I7->sp_offset_in_saved_window()*wordSize + STACK_BIAS); | |
2487 } | |
2488 | |
2489 // get JNIEnv* which is first argument to native | |
4873
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2490 if (!is_critical_native) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2491 __ add(G2_thread, in_bytes(JavaThread::jni_environment_offset()), O0); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2492 } |
0 | 2493 |
2494 // Use that pc we placed in O7 a while back as the current frame anchor | |
2495 __ set_last_Java_frame(SP, O7); | |
2496 | |
4873
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2497 // We flushed the windows ages ago now mark them as flushed before transitioning. |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2498 __ set(JavaFrameAnchor::flushed, G3_scratch); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2499 __ st(G3_scratch, G2_thread, JavaThread::frame_anchor_offset() + JavaFrameAnchor::flags_offset()); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2500 |
0 | 2501 // Transition from _thread_in_Java to _thread_in_native. |
2502 __ set(_thread_in_native, G3_scratch); | |
2503 | |
2504 #ifdef _LP64 | |
4873
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2505 AddressLiteral dest(native_func); |
0 | 2506 __ relocate(relocInfo::runtime_call_type); |
727 | 2507 __ jumpl_to(dest, O7, O7); |
0 | 2508 #else |
4873
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2509 __ call(native_func, relocInfo::runtime_call_type); |
0 | 2510 #endif |
4873
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2511 __ delayed()->st(G3_scratch, G2_thread, JavaThread::thread_state_offset()); |
0 | 2512 |
2513 __ restore_thread(L7_thread_cache); // restore G2_thread | |
2514 | |
2515 // Unpack native results. For int-types, we do any needed sign-extension | |
2516 // and move things into I0. The return value there will survive any VM | |
2517 // calls for blocking or unlocking. An FP or OOP result (handle) is done | |
2518 // specially in the slow-path code. | |
2519 switch (ret_type) { | |
2520 case T_VOID: break; // Nothing to do! | |
2521 case T_FLOAT: break; // Got it where we want it (unless slow-path) | |
2522 case T_DOUBLE: break; // Got it where we want it (unless slow-path) | |
2523 // In 64 bits build result is in O0, in O0, O1 in 32bit build | |
2524 case T_LONG: | |
2525 #ifndef _LP64 | |
2526 __ mov(O1, I1); | |
2527 #endif | |
2528 // Fall thru | |
2529 case T_OBJECT: // Really a handle | |
2530 case T_ARRAY: | |
2531 case T_INT: | |
2532 __ mov(O0, I0); | |
2533 break; | |
2534 case T_BOOLEAN: __ subcc(G0, O0, G0); __ addc(G0, 0, I0); break; // !0 => true; 0 => false | |
2535 case T_BYTE : __ sll(O0, 24, O0); __ sra(O0, 24, I0); break; | |
2536 case T_CHAR : __ sll(O0, 16, O0); __ srl(O0, 16, I0); break; // cannot use and3, 0xFFFF too big as immediate value! | |
2537 case T_SHORT : __ sll(O0, 16, O0); __ sra(O0, 16, I0); break; | |
2538 break; // Cannot de-handlize until after reclaiming jvm_lock | |
2539 default: | |
2540 ShouldNotReachHere(); | |
2541 } | |
2542 | |
4873
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2543 Label after_transition; |
0 | 2544 // must we block? |
2545 | |
2546 // Block, if necessary, before resuming in _thread_in_Java state. | |
2547 // In order for GC to work, don't clear the last_Java_sp until after blocking. | |
2548 { Label no_block; | |
727 | 2549 AddressLiteral sync_state(SafepointSynchronize::address_of_state()); |
0 | 2550 |
2551 // Switch thread to "native transition" state before reading the synchronization state. | |
2552 // This additional state is necessary because reading and testing the synchronization | |
2553 // state is not atomic w.r.t. GC, as this scenario demonstrates: | |
2554 // Java thread A, in _thread_in_native state, loads _not_synchronized and is preempted. | |
2555 // VM thread changes sync state to synchronizing and suspends threads for GC. | |
2556 // Thread A is resumed to finish this native method, but doesn't block here since it | |
2557 // didn't see any synchronization is progress, and escapes. | |
2558 __ set(_thread_in_native_trans, G3_scratch); | |
727 | 2559 __ st(G3_scratch, G2_thread, JavaThread::thread_state_offset()); |
0 | 2560 if(os::is_MP()) { |
2561 if (UseMembar) { | |
2562 // Force this write out before the read below | |
2563 __ membar(Assembler::StoreLoad); | |
2564 } else { | |
2565 // Write serialization page so VM thread can do a pseudo remote membar. | |
2566 // We use the current thread pointer to calculate a thread specific | |
2567 // offset to write to within the page. This minimizes bus traffic | |
2568 // due to cache line collision. | |
2569 __ serialize_memory(G2_thread, G1_scratch, G3_scratch); | |
2570 } | |
2571 } | |
2572 __ load_contents(sync_state, G3_scratch); | |
2573 __ cmp(G3_scratch, SafepointSynchronize::_not_synchronized); | |
2574 | |
2575 Label L; | |
727 | 2576 Address suspend_state(G2_thread, JavaThread::suspend_flags_offset()); |
0 | 2577 __ br(Assembler::notEqual, false, Assembler::pn, L); |
727 | 2578 __ delayed()->ld(suspend_state, G3_scratch); |
3839 | 2579 __ cmp_and_br_short(G3_scratch, 0, Assembler::equal, Assembler::pt, no_block); |
0 | 2580 __ bind(L); |
2581 | |
2582 // Block. Save any potential method result value before the operation and | |
2583 // use a leaf call to leave the last_Java_frame setup undisturbed. Doing this | |
2584 // lets us share the oopMap we used when we went native rather the create | |
2585 // a distinct one for this pc | |
2586 // | |
2587 save_native_result(masm, ret_type, stack_slots); | |
4873
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2588 if (!is_critical_native) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2589 __ call_VM_leaf(L7_thread_cache, |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2590 CAST_FROM_FN_PTR(address, JavaThread::check_special_condition_for_native_trans), |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2591 G2_thread); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2592 } else { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2593 __ call_VM_leaf(L7_thread_cache, |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2594 CAST_FROM_FN_PTR(address, JavaThread::check_special_condition_for_native_trans_and_transition), |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2595 G2_thread); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2596 } |
0 | 2597 |
2598 // Restore any method result value | |
2599 restore_native_result(masm, ret_type, stack_slots); | |
4873
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2600 |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2601 if (is_critical_native) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2602 // The call above performed the transition to thread_in_Java so |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2603 // skip the transition logic below. |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2604 __ ba(after_transition); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2605 __ delayed()->nop(); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2606 } |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2607 |
0 | 2608 __ bind(no_block); |
2609 } | |
2610 | |
2611 // thread state is thread_in_native_trans. Any safepoint blocking has already | |
2612 // happened so we can now change state to _thread_in_Java. | |
2613 __ set(_thread_in_Java, G3_scratch); | |
727 | 2614 __ st(G3_scratch, G2_thread, JavaThread::thread_state_offset()); |
4873
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2615 __ bind(after_transition); |
0 | 2616 |
2617 Label no_reguard; | |
727 | 2618 __ ld(G2_thread, JavaThread::stack_guard_state_offset(), G3_scratch); |
3839 | 2619 __ cmp_and_br_short(G3_scratch, JavaThread::stack_guard_yellow_disabled, Assembler::notEqual, Assembler::pt, no_reguard); |
0 | 2620 |
2621 save_native_result(masm, ret_type, stack_slots); | |
2622 __ call(CAST_FROM_FN_PTR(address, SharedRuntime::reguard_yellow_pages)); | |
2623 __ delayed()->nop(); | |
2624 | |
2625 __ restore_thread(L7_thread_cache); // restore G2_thread | |
2626 restore_native_result(masm, ret_type, stack_slots); | |
2627 | |
2628 __ bind(no_reguard); | |
2629 | |
2630 // Handle possible exception (will unlock if necessary) | |
2631 | |
2632 // native result if any is live in freg or I0 (and I1 if long and 32bit vm) | |
2633 | |
2634 // Unlock | |
2635 if (method->is_synchronized()) { | |
2636 Label done; | |
2637 Register I2_ex_oop = I2; | |
2638 const Register L3_box = L3; | |
2639 // Get locked oop from the handle we passed to jni | |
2640 __ ld_ptr(L6_handle, 0, L4); | |
2641 __ add(SP, lock_offset+STACK_BIAS, L3_box); | |
2642 // Must save pending exception around the slow-path VM call. Since it's a | |
2643 // leaf call, the pending exception (if any) can be kept in a register. | |
2644 __ ld_ptr(G2_thread, in_bytes(Thread::pending_exception_offset()), I2_ex_oop); | |
2645 // Now unlock | |
2646 // (Roop, Rmark, Rbox, Rscratch) | |
2647 __ compiler_unlock_object(L4, L1, L3_box, L2); | |
2648 __ br(Assembler::equal, false, Assembler::pt, done); | |
2649 __ delayed()-> add(SP, lock_offset+STACK_BIAS, L3_box); | |
2650 | |
2651 // save and restore any potential method result value around the unlocking | |
2652 // operation. Will save in I0 (or stack for FP returns). | |
2653 save_native_result(masm, ret_type, stack_slots); | |
2654 | |
2655 // Must clear pending-exception before re-entering the VM. Since this is | |
2656 // a leaf call, pending-exception-oop can be safely kept in a register. | |
2657 __ st_ptr(G0, G2_thread, in_bytes(Thread::pending_exception_offset())); | |
2658 | |
2659 // slow case of monitor enter. Inline a special case of call_VM that | |
2660 // disallows any pending_exception. | |
2661 __ mov(L3_box, O1); | |
2662 | |
2663 __ call(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_unlocking_C), relocInfo::runtime_call_type); | |
2664 __ delayed()->mov(L4, O0); // Need oop in O0 | |
2665 | |
2666 __ restore_thread(L7_thread_cache); // restore G2_thread | |
2667 | |
2668 #ifdef ASSERT | |
2669 { Label L; | |
2670 __ ld_ptr(G2_thread, in_bytes(Thread::pending_exception_offset()), O0); | |
3839 | 2671 __ br_null_short(O0, Assembler::pt, L); |
0 | 2672 __ stop("no pending exception allowed on exit from IR::monitorexit"); |
2673 __ bind(L); | |
2674 } | |
2675 #endif | |
2676 restore_native_result(masm, ret_type, stack_slots); | |
2677 // check_forward_pending_exception jump to forward_exception if any pending | |
2678 // exception is set. The forward_exception routine expects to see the | |
2679 // exception in pending_exception and not in a register. Kind of clumsy, | |
2680 // since all folks who branch to forward_exception must have tested | |
2681 // pending_exception first and hence have it in a register already. | |
2682 __ st_ptr(I2_ex_oop, G2_thread, in_bytes(Thread::pending_exception_offset())); | |
2683 __ bind(done); | |
2684 } | |
2685 | |
2686 // Tell dtrace about this method exit | |
2687 { | |
2688 SkipIfEqual skip_if( | |
2689 masm, G3_scratch, &DTraceMethodProbes, Assembler::zero); | |
2690 save_native_result(masm, ret_type, stack_slots); | |
6725
da91efe96a93
6964458: Reimplement class meta-data storage to use native memory
coleenp
parents:
6266
diff
changeset
|
2691 __ set_metadata_constant(method(), O1); |
0 | 2692 __ call_VM_leaf(L7_thread_cache, |
2693 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_exit), | |
2694 G2_thread, O1); | |
2695 restore_native_result(masm, ret_type, stack_slots); | |
2696 } | |
2697 | |
2698 // Clear "last Java frame" SP and PC. | |
2699 __ verify_thread(); // G2_thread must be correct | |
2700 __ reset_last_Java_frame(); | |
2701 | |
2702 // Unpack oop result | |
2703 if (ret_type == T_OBJECT || ret_type == T_ARRAY) { | |
2704 Label L; | |
2705 __ addcc(G0, I0, G0); | |
2706 __ brx(Assembler::notZero, true, Assembler::pt, L); | |
2707 __ delayed()->ld_ptr(I0, 0, I0); | |
2708 __ mov(G0, I0); | |
2709 __ bind(L); | |
2710 __ verify_oop(I0); | |
2711 } | |
2712 | |
4873
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2713 if (!is_critical_native) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2714 // reset handle block |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2715 __ ld_ptr(G2_thread, in_bytes(JavaThread::active_handles_offset()), L5); |
17850
2100bf712e2a
8039146: Fix 64-bit store to int JNIHandleBlock::_top
goetz
parents:
14456
diff
changeset
|
2716 __ st(G0, L5, JNIHandleBlock::top_offset_in_bytes()); |
4873
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2717 |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2718 __ ld_ptr(G2_thread, in_bytes(Thread::pending_exception_offset()), G3_scratch); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2719 check_forward_pending_exception(masm, G3_scratch); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2720 } |
0 | 2721 |
2722 | |
2723 // Return | |
2724 | |
2725 #ifndef _LP64 | |
2726 if (ret_type == T_LONG) { | |
2727 | |
2728 // Must leave proper result in O0,O1 and G1 (c2/tiered only) | |
2729 __ sllx(I0, 32, G1); // Shift bits into high G1 | |
2730 __ srl (I1, 0, I1); // Zero extend O1 (harmless?) | |
2731 __ or3 (I1, G1, G1); // OR 64 bits into G1 | |
2732 } | |
2733 #endif | |
2734 | |
2735 __ ret(); | |
2736 __ delayed()->restore(); | |
2737 | |
2738 __ flush(); | |
2739 | |
2740 nmethod *nm = nmethod::new_native_nmethod(method, | |
2405
3d58a4983660
7022998: JSR 292 recursive method handle calls inline themselves infinitely
twisti
parents:
2177
diff
changeset
|
2741 compile_id, |
0 | 2742 masm->code(), |
2743 vep_offset, | |
2744 frame_complete, | |
2745 stack_slots / VMRegImpl::slots_per_word, | |
2746 (is_static ? in_ByteSize(klass_offset) : in_ByteSize(receiver_offset)), | |
2747 in_ByteSize(lock_offset), | |
2748 oop_maps); | |
4873
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2749 |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2750 if (is_critical_native) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2751 nm->set_lazy_critical_native(true); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2752 } |
0 | 2753 return nm; |
2754 | |
2755 } | |
2756 | |
116
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2757 #ifdef HAVE_DTRACE_H |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2758 // --------------------------------------------------------------------------- |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2759 // Generate a dtrace nmethod for a given signature. The method takes arguments |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2760 // in the Java compiled code convention, marshals them to the native |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2761 // abi and then leaves nops at the position you would expect to call a native |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2762 // function. When the probe is enabled the nops are replaced with a trap |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2763 // instruction that dtrace inserts and the trace will cause a notification |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2764 // to dtrace. |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2765 // |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2766 // The probes are only able to take primitive types and java/lang/String as |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2767 // arguments. No other java types are allowed. Strings are converted to utf8 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2768 // strings so that from dtrace point of view java strings are converted to C |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2769 // strings. There is an arbitrary fixed limit on the total space that a method |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2770 // can use for converting the strings. (256 chars per string in the signature). |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2771 // So any java string larger then this is truncated. |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2772 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2773 static int fp_offset[ConcreteRegisterImpl::number_of_registers] = { 0 }; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2774 static bool offsets_initialized = false; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2775 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2776 nmethod *SharedRuntime::generate_dtrace_nmethod( |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2777 MacroAssembler *masm, methodHandle method) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2778 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2779 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2780 // generate_dtrace_nmethod is guarded by a mutex so we are sure to |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2781 // be single threaded in this method. |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2782 assert(AdapterHandlerLibrary_lock->owned_by_self(), "must be"); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2783 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2784 // Fill in the signature array, for the calling-convention call. |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2785 int total_args_passed = method->size_of_parameters(); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2786 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2787 BasicType* in_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_args_passed); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2788 VMRegPair *in_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_args_passed); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2789 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2790 // The signature we are going to use for the trap that dtrace will see |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2791 // java/lang/String is converted. We drop "this" and any other object |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2792 // is converted to NULL. (A one-slot java/lang/Long object reference |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2793 // is converted to a two-slot long, which is why we double the allocation). |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2794 BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_args_passed * 2); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2795 VMRegPair* out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_args_passed * 2); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2796 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2797 int i=0; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2798 int total_strings = 0; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2799 int first_arg_to_pass = 0; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2800 int total_c_args = 0; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2801 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2802 // Skip the receiver as dtrace doesn't want to see it |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2803 if( !method->is_static() ) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2804 in_sig_bt[i++] = T_OBJECT; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2805 first_arg_to_pass = 1; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2806 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2807 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2808 SignatureStream ss(method->signature()); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2809 for ( ; !ss.at_return_type(); ss.next()) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2810 BasicType bt = ss.type(); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2811 in_sig_bt[i++] = bt; // Collect remaining bits of signature |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2812 out_sig_bt[total_c_args++] = bt; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2813 if( bt == T_OBJECT) { |
2177
3582bf76420e
6990754: Use native memory and reference counting to implement SymbolTable
coleenp
parents:
1972
diff
changeset
|
2814 Symbol* s = ss.as_symbol_or_null(); |
116
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2815 if (s == vmSymbols::java_lang_String()) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2816 total_strings++; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2817 out_sig_bt[total_c_args-1] = T_ADDRESS; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2818 } else if (s == vmSymbols::java_lang_Boolean() || |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2819 s == vmSymbols::java_lang_Byte()) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2820 out_sig_bt[total_c_args-1] = T_BYTE; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2821 } else if (s == vmSymbols::java_lang_Character() || |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2822 s == vmSymbols::java_lang_Short()) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2823 out_sig_bt[total_c_args-1] = T_SHORT; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2824 } else if (s == vmSymbols::java_lang_Integer() || |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2825 s == vmSymbols::java_lang_Float()) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2826 out_sig_bt[total_c_args-1] = T_INT; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2827 } else if (s == vmSymbols::java_lang_Long() || |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2828 s == vmSymbols::java_lang_Double()) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2829 out_sig_bt[total_c_args-1] = T_LONG; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2830 out_sig_bt[total_c_args++] = T_VOID; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2831 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2832 } else if ( bt == T_LONG || bt == T_DOUBLE ) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2833 in_sig_bt[i++] = T_VOID; // Longs & doubles take 2 Java slots |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2834 // We convert double to long |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2835 out_sig_bt[total_c_args-1] = T_LONG; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2836 out_sig_bt[total_c_args++] = T_VOID; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2837 } else if ( bt == T_FLOAT) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2838 // We convert float to int |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2839 out_sig_bt[total_c_args-1] = T_INT; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2840 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2841 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2842 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2843 assert(i==total_args_passed, "validly parsed signature"); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2844 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2845 // Now get the compiled-Java layout as input arguments |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2846 int comp_args_on_stack; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2847 comp_args_on_stack = SharedRuntime::java_calling_convention( |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2848 in_sig_bt, in_regs, total_args_passed, false); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2849 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2850 // We have received a description of where all the java arg are located |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2851 // on entry to the wrapper. We need to convert these args to where |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2852 // the a native (non-jni) function would expect them. To figure out |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2853 // where they go we convert the java signature to a C signature and remove |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2854 // T_VOID for any long/double we might have received. |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2855 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2856 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2857 // Now figure out where the args must be stored and how much stack space |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2858 // they require (neglecting out_preserve_stack_slots but space for storing |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2859 // the 1st six register arguments). It's weird see int_stk_helper. |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2860 // |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2861 int out_arg_slots; |
14416
6a936747b569
8024344: PPC64 (part 112): C argument in register AND stack slot.
goetz
parents:
10997
diff
changeset
|
2862 out_arg_slots = c_calling_convention(out_sig_bt, out_regs, NULL, total_c_args); |
116
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2863 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2864 // Calculate the total number of stack slots we will need. |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2865 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2866 // First count the abi requirement plus all of the outgoing args |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2867 int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2868 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2869 // Plus a temp for possible converion of float/double/long register args |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2870 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2871 int conversion_temp = stack_slots; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2872 stack_slots += 2; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2873 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2874 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2875 // Now space for the string(s) we must convert |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2876 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2877 int string_locs = stack_slots; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2878 stack_slots += total_strings * |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2879 (max_dtrace_string_size / VMRegImpl::stack_slot_size); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2880 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2881 // Ok The space we have allocated will look like: |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2882 // |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2883 // |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2884 // FP-> | | |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2885 // |---------------------| |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2886 // | string[n] | |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2887 // |---------------------| <- string_locs[n] |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2888 // | string[n-1] | |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2889 // |---------------------| <- string_locs[n-1] |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2890 // | ... | |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2891 // | ... | |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2892 // |---------------------| <- string_locs[1] |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2893 // | string[0] | |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2894 // |---------------------| <- string_locs[0] |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2895 // | temp | |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2896 // |---------------------| <- conversion_temp |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2897 // | outbound memory | |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2898 // | based arguments | |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2899 // | | |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2900 // |---------------------| |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2901 // | | |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2902 // SP-> | out_preserved_slots | |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2903 // |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2904 // |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2905 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2906 // Now compute actual number of stack words we need rounding to make |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2907 // stack properly aligned. |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2908 stack_slots = round_to(stack_slots, 4 * VMRegImpl::slots_per_word); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2909 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2910 int stack_size = stack_slots * VMRegImpl::stack_slot_size; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2911 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2912 intptr_t start = (intptr_t)__ pc(); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2913 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2914 // First thing make an ic check to see if we should even be here |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2915 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2916 { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2917 Label L; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2918 const Register temp_reg = G3_scratch; |
727 | 2919 AddressLiteral ic_miss(SharedRuntime::get_ic_miss_stub()); |
116
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2920 __ verify_oop(O0); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2921 __ ld_ptr(O0, oopDesc::klass_offset_in_bytes(), temp_reg); |
3839 | 2922 __ cmp_and_brx_short(temp_reg, G5_inline_cache_reg, Assembler::equal, Assembler::pt, L); |
116
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2923 |
727 | 2924 __ jump_to(ic_miss, temp_reg); |
116
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2925 __ delayed()->nop(); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2926 __ align(CodeEntryAlignment); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2927 __ bind(L); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2928 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2929 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2930 int vep_offset = ((intptr_t)__ pc()) - start; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2931 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2932 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2933 // The instruction at the verified entry point must be 5 bytes or longer |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2934 // because it can be patched on the fly by make_non_entrant. The stack bang |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2935 // instruction fits that requirement. |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2936 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2937 // Generate stack overflow check before creating frame |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2938 __ generate_stack_overflow_check(stack_size); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2939 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2940 assert(((intptr_t)__ pc() - start - vep_offset) >= 5, |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2941 "valid size for make_non_entrant"); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2942 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2943 // Generate a new frame for the wrapper. |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2944 __ save(SP, -stack_size, SP); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2945 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2946 // Frame is now completed as far a size and linkage. |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2947 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2948 int frame_complete = ((intptr_t)__ pc()) - start; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2949 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2950 #ifdef ASSERT |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2951 bool reg_destroyed[RegisterImpl::number_of_registers]; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2952 bool freg_destroyed[FloatRegisterImpl::number_of_registers]; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2953 for ( int r = 0 ; r < RegisterImpl::number_of_registers ; r++ ) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2954 reg_destroyed[r] = false; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2955 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2956 for ( int f = 0 ; f < FloatRegisterImpl::number_of_registers ; f++ ) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2957 freg_destroyed[f] = false; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2958 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2959 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2960 #endif /* ASSERT */ |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2961 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2962 VMRegPair zero; |
176
6b648fefb395
6705523: Fix for 6695506 will violate spec when used in JDK6
kamg
parents:
116
diff
changeset
|
2963 const Register g0 = G0; // without this we get a compiler warning (why??) |
6b648fefb395
6705523: Fix for 6695506 will violate spec when used in JDK6
kamg
parents:
116
diff
changeset
|
2964 zero.set2(g0->as_VMReg()); |
116
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2965 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2966 int c_arg, j_arg; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2967 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2968 Register conversion_off = noreg; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2969 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2970 for (j_arg = first_arg_to_pass, c_arg = 0 ; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2971 j_arg < total_args_passed ; j_arg++, c_arg++ ) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2972 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2973 VMRegPair src = in_regs[j_arg]; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2974 VMRegPair dst = out_regs[c_arg]; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2975 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2976 #ifdef ASSERT |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2977 if (src.first()->is_Register()) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2978 assert(!reg_destroyed[src.first()->as_Register()->encoding()], "ack!"); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2979 } else if (src.first()->is_FloatRegister()) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2980 assert(!freg_destroyed[src.first()->as_FloatRegister()->encoding( |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2981 FloatRegisterImpl::S)], "ack!"); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2982 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2983 if (dst.first()->is_Register()) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2984 reg_destroyed[dst.first()->as_Register()->encoding()] = true; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2985 } else if (dst.first()->is_FloatRegister()) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2986 freg_destroyed[dst.first()->as_FloatRegister()->encoding( |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2987 FloatRegisterImpl::S)] = true; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2988 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2989 #endif /* ASSERT */ |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2990 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2991 switch (in_sig_bt[j_arg]) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2992 case T_ARRAY: |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2993 case T_OBJECT: |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2994 { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2995 if (out_sig_bt[c_arg] == T_BYTE || out_sig_bt[c_arg] == T_SHORT || |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2996 out_sig_bt[c_arg] == T_INT || out_sig_bt[c_arg] == T_LONG) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2997 // need to unbox a one-slot value |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2998 Register in_reg = L0; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2999 Register tmp = L2; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3000 if ( src.first()->is_reg() ) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3001 in_reg = src.first()->as_Register(); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3002 } else { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3003 assert(Assembler::is_simm13(reg2offset(src.first()) + STACK_BIAS), |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3004 "must be"); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3005 __ ld_ptr(FP, reg2offset(src.first()) + STACK_BIAS, in_reg); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3006 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3007 // If the final destination is an acceptable register |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3008 if ( dst.first()->is_reg() ) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3009 if ( dst.is_single_phys_reg() || out_sig_bt[c_arg] != T_LONG ) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3010 tmp = dst.first()->as_Register(); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3011 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3012 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3013 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3014 Label skipUnbox; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3015 if ( wordSize == 4 && out_sig_bt[c_arg] == T_LONG ) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3016 __ mov(G0, tmp->successor()); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3017 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3018 __ br_null(in_reg, true, Assembler::pn, skipUnbox); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3019 __ delayed()->mov(G0, tmp); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3020 |
165
437d03ea40b1
6703888: Compressed Oops: use the 32-bits gap after klass in a object
kvn
parents:
116
diff
changeset
|
3021 BasicType bt = out_sig_bt[c_arg]; |
437d03ea40b1
6703888: Compressed Oops: use the 32-bits gap after klass in a object
kvn
parents:
116
diff
changeset
|
3022 int box_offset = java_lang_boxing_object::value_offset_in_bytes(bt); |
437d03ea40b1
6703888: Compressed Oops: use the 32-bits gap after klass in a object
kvn
parents:
116
diff
changeset
|
3023 switch (bt) { |
116
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3024 case T_BYTE: |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3025 __ ldub(in_reg, box_offset, tmp); break; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3026 case T_SHORT: |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3027 __ lduh(in_reg, box_offset, tmp); break; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3028 case T_INT: |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3029 __ ld(in_reg, box_offset, tmp); break; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3030 case T_LONG: |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3031 __ ld_long(in_reg, box_offset, tmp); break; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3032 default: ShouldNotReachHere(); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3033 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3034 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3035 __ bind(skipUnbox); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3036 // If tmp wasn't final destination copy to final destination |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3037 if (tmp == L2) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3038 VMRegPair tmp_as_VM = reg64_to_VMRegPair(L2); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3039 if (out_sig_bt[c_arg] == T_LONG) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3040 long_move(masm, tmp_as_VM, dst); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3041 } else { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3042 move32_64(masm, tmp_as_VM, out_regs[c_arg]); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3043 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3044 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3045 if (out_sig_bt[c_arg] == T_LONG) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3046 assert(out_sig_bt[c_arg+1] == T_VOID, "must be"); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3047 ++c_arg; // move over the T_VOID to keep the loop indices in sync |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3048 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3049 } else if (out_sig_bt[c_arg] == T_ADDRESS) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3050 Register s = |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3051 src.first()->is_reg() ? src.first()->as_Register() : L2; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3052 Register d = |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3053 dst.first()->is_reg() ? dst.first()->as_Register() : L2; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3054 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3055 // We store the oop now so that the conversion pass can reach |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3056 // while in the inner frame. This will be the only store if |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3057 // the oop is NULL. |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3058 if (s != L2) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3059 // src is register |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3060 if (d != L2) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3061 // dst is register |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3062 __ mov(s, d); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3063 } else { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3064 assert(Assembler::is_simm13(reg2offset(dst.first()) + |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3065 STACK_BIAS), "must be"); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3066 __ st_ptr(s, SP, reg2offset(dst.first()) + STACK_BIAS); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3067 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3068 } else { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3069 // src not a register |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3070 assert(Assembler::is_simm13(reg2offset(src.first()) + |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3071 STACK_BIAS), "must be"); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3072 __ ld_ptr(FP, reg2offset(src.first()) + STACK_BIAS, d); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3073 if (d == L2) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3074 assert(Assembler::is_simm13(reg2offset(dst.first()) + |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3075 STACK_BIAS), "must be"); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3076 __ st_ptr(d, SP, reg2offset(dst.first()) + STACK_BIAS); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3077 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3078 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3079 } else if (out_sig_bt[c_arg] != T_VOID) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3080 // Convert the arg to NULL |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3081 if (dst.first()->is_reg()) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3082 __ mov(G0, dst.first()->as_Register()); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3083 } else { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3084 assert(Assembler::is_simm13(reg2offset(dst.first()) + |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3085 STACK_BIAS), "must be"); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3086 __ st_ptr(G0, SP, reg2offset(dst.first()) + STACK_BIAS); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3087 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3088 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3089 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3090 break; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3091 case T_VOID: |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3092 break; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3093 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3094 case T_FLOAT: |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3095 if (src.first()->is_stack()) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3096 // Stack to stack/reg is simple |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3097 move32_64(masm, src, dst); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3098 } else { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3099 if (dst.first()->is_reg()) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3100 // freg -> reg |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3101 int off = |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3102 STACK_BIAS + conversion_temp * VMRegImpl::stack_slot_size; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3103 Register d = dst.first()->as_Register(); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3104 if (Assembler::is_simm13(off)) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3105 __ stf(FloatRegisterImpl::S, src.first()->as_FloatRegister(), |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3106 SP, off); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3107 __ ld(SP, off, d); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3108 } else { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3109 if (conversion_off == noreg) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3110 __ set(off, L6); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3111 conversion_off = L6; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3112 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3113 __ stf(FloatRegisterImpl::S, src.first()->as_FloatRegister(), |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3114 SP, conversion_off); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3115 __ ld(SP, conversion_off , d); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3116 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3117 } else { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3118 // freg -> mem |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3119 int off = STACK_BIAS + reg2offset(dst.first()); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3120 if (Assembler::is_simm13(off)) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3121 __ stf(FloatRegisterImpl::S, src.first()->as_FloatRegister(), |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3122 SP, off); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3123 } else { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3124 if (conversion_off == noreg) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3125 __ set(off, L6); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3126 conversion_off = L6; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3127 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3128 __ stf(FloatRegisterImpl::S, src.first()->as_FloatRegister(), |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3129 SP, conversion_off); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3130 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3131 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3132 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3133 break; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3134 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3135 case T_DOUBLE: |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3136 assert( j_arg + 1 < total_args_passed && |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3137 in_sig_bt[j_arg + 1] == T_VOID && |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3138 out_sig_bt[c_arg+1] == T_VOID, "bad arg list"); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3139 if (src.first()->is_stack()) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3140 // Stack to stack/reg is simple |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3141 long_move(masm, src, dst); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3142 } else { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3143 Register d = dst.first()->is_reg() ? dst.first()->as_Register() : L2; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3144 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3145 // Destination could be an odd reg on 32bit in which case |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3146 // we can't load direct to the destination. |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3147 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3148 if (!d->is_even() && wordSize == 4) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3149 d = L2; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3150 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3151 int off = STACK_BIAS + conversion_temp * VMRegImpl::stack_slot_size; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3152 if (Assembler::is_simm13(off)) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3153 __ stf(FloatRegisterImpl::D, src.first()->as_FloatRegister(), |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3154 SP, off); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3155 __ ld_long(SP, off, d); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3156 } else { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3157 if (conversion_off == noreg) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3158 __ set(off, L6); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3159 conversion_off = L6; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3160 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3161 __ stf(FloatRegisterImpl::D, src.first()->as_FloatRegister(), |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3162 SP, conversion_off); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3163 __ ld_long(SP, conversion_off, d); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3164 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3165 if (d == L2) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3166 long_move(masm, reg64_to_VMRegPair(L2), dst); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3167 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3168 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3169 break; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3170 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3171 case T_LONG : |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3172 // 32bit can't do a split move of something like g1 -> O0, O1 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3173 // so use a memory temp |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3174 if (src.is_single_phys_reg() && wordSize == 4) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3175 Register tmp = L2; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3176 if (dst.first()->is_reg() && |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3177 (wordSize == 8 || dst.first()->as_Register()->is_even())) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3178 tmp = dst.first()->as_Register(); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3179 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3180 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3181 int off = STACK_BIAS + conversion_temp * VMRegImpl::stack_slot_size; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3182 if (Assembler::is_simm13(off)) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3183 __ stx(src.first()->as_Register(), SP, off); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3184 __ ld_long(SP, off, tmp); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3185 } else { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3186 if (conversion_off == noreg) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3187 __ set(off, L6); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3188 conversion_off = L6; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3189 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3190 __ stx(src.first()->as_Register(), SP, conversion_off); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3191 __ ld_long(SP, conversion_off, tmp); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3192 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3193 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3194 if (tmp == L2) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3195 long_move(masm, reg64_to_VMRegPair(L2), dst); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3196 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3197 } else { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3198 long_move(masm, src, dst); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3199 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3200 break; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3201 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3202 case T_ADDRESS: assert(false, "found T_ADDRESS in java args"); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3203 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3204 default: |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3205 move32_64(masm, src, dst); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3206 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3207 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3208 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3209 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3210 // If we have any strings we must store any register based arg to the stack |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3211 // This includes any still live xmm registers too. |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3212 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3213 if (total_strings > 0 ) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3214 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3215 // protect all the arg registers |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3216 __ save_frame(0); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3217 __ mov(G2_thread, L7_thread_cache); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3218 const Register L2_string_off = L2; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3219 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3220 // Get first string offset |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3221 __ set(string_locs * VMRegImpl::stack_slot_size, L2_string_off); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3222 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3223 for (c_arg = 0 ; c_arg < total_c_args ; c_arg++ ) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3224 if (out_sig_bt[c_arg] == T_ADDRESS) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3225 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3226 VMRegPair dst = out_regs[c_arg]; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3227 const Register d = dst.first()->is_reg() ? |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3228 dst.first()->as_Register()->after_save() : noreg; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3229 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3230 // It's a string the oop and it was already copied to the out arg |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3231 // position |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3232 if (d != noreg) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3233 __ mov(d, O0); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3234 } else { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3235 assert(Assembler::is_simm13(reg2offset(dst.first()) + STACK_BIAS), |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3236 "must be"); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3237 __ ld_ptr(FP, reg2offset(dst.first()) + STACK_BIAS, O0); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3238 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3239 Label skip; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3240 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3241 __ br_null(O0, false, Assembler::pn, skip); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3242 __ delayed()->add(FP, L2_string_off, O1); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3243 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3244 if (d != noreg) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3245 __ mov(O1, d); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3246 } else { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3247 assert(Assembler::is_simm13(reg2offset(dst.first()) + STACK_BIAS), |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3248 "must be"); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3249 __ st_ptr(O1, FP, reg2offset(dst.first()) + STACK_BIAS); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3250 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3251 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3252 __ call(CAST_FROM_FN_PTR(address, SharedRuntime::get_utf), |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3253 relocInfo::runtime_call_type); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3254 __ delayed()->add(L2_string_off, max_dtrace_string_size, L2_string_off); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3255 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3256 __ bind(skip); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3257 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3258 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3259 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3260 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3261 __ mov(L7_thread_cache, G2_thread); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3262 __ restore(); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3263 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3264 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3265 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3266 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3267 // Ok now we are done. Need to place the nop that dtrace wants in order to |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3268 // patch in the trap |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3269 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3270 int patch_offset = ((intptr_t)__ pc()) - start; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3271 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3272 __ nop(); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3273 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3274 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3275 // Return |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3276 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3277 __ ret(); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3278 __ delayed()->restore(); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3279 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3280 __ flush(); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3281 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3282 nmethod *nm = nmethod::new_dtrace_nmethod( |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3283 method, masm->code(), vep_offset, patch_offset, frame_complete, |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3284 stack_slots / VMRegImpl::slots_per_word); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3285 return nm; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3286 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3287 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3288 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3289 #endif // HAVE_DTRACE_H |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3290 |
0 | 3291 // this function returns the adjust size (in number of words) to a c2i adapter |
3292 // activation for use during deoptimization | |
3293 int Deoptimization::last_frame_adjust(int callee_parameters, int callee_locals) { | |
3294 assert(callee_locals >= callee_parameters, | |
3295 "test and remove; got more parms than locals"); | |
3296 if (callee_locals < callee_parameters) | |
3297 return 0; // No adjustment for negative locals | |
1506 | 3298 int diff = (callee_locals - callee_parameters) * Interpreter::stackElementWords; |
0 | 3299 return round_to(diff, WordsPerLong); |
3300 } | |
3301 | |
3302 // "Top of Stack" slots that may be unused by the calling convention but must | |
3303 // otherwise be preserved. | |
3304 // On Intel these are not necessary and the value can be zero. | |
3305 // On Sparc this describes the words reserved for storing a register window | |
3306 // when an interrupt occurs. | |
3307 uint SharedRuntime::out_preserve_stack_slots() { | |
3308 return frame::register_save_words * VMRegImpl::slots_per_word; | |
3309 } | |
3310 | |
3311 static void gen_new_frame(MacroAssembler* masm, bool deopt) { | |
3312 // | |
3313 // Common out the new frame generation for deopt and uncommon trap | |
3314 // | |
3315 Register G3pcs = G3_scratch; // Array of new pcs (input) | |
3316 Register Oreturn0 = O0; | |
3317 Register Oreturn1 = O1; | |
3318 Register O2UnrollBlock = O2; | |
3319 Register O3array = O3; // Array of frame sizes (input) | |
3320 Register O4array_size = O4; // number of frames (input) | |
3321 Register O7frame_size = O7; // number of frames (input) | |
3322 | |
3323 __ ld_ptr(O3array, 0, O7frame_size); | |
3324 __ sub(G0, O7frame_size, O7frame_size); | |
3325 __ save(SP, O7frame_size, SP); | |
3326 __ ld_ptr(G3pcs, 0, I7); // load frame's new pc | |
3327 | |
3328 #ifdef ASSERT | |
3329 // make sure that the frames are aligned properly | |
3330 #ifndef _LP64 | |
3331 __ btst(wordSize*2-1, SP); | |
5923 | 3332 __ breakpoint_trap(Assembler::notZero, Assembler::ptr_cc); |
0 | 3333 #endif |
3334 #endif | |
3335 | |
3336 // Deopt needs to pass some extra live values from frame to frame | |
3337 | |
3338 if (deopt) { | |
3339 __ mov(Oreturn0->after_save(), Oreturn0); | |
3340 __ mov(Oreturn1->after_save(), Oreturn1); | |
3341 } | |
3342 | |
3343 __ mov(O4array_size->after_save(), O4array_size); | |
3344 __ sub(O4array_size, 1, O4array_size); | |
3345 __ mov(O3array->after_save(), O3array); | |
3346 __ mov(O2UnrollBlock->after_save(), O2UnrollBlock); | |
3347 __ add(G3pcs, wordSize, G3pcs); // point to next pc value | |
3348 | |
3349 #ifdef ASSERT | |
3350 // trash registers to show a clear pattern in backtraces | |
3351 __ set(0xDEAD0000, I0); | |
3352 __ add(I0, 2, I1); | |
3353 __ add(I0, 4, I2); | |
3354 __ add(I0, 6, I3); | |
3355 __ add(I0, 8, I4); | |
3356 // Don't touch I5 could have valuable savedSP | |
3357 __ set(0xDEADBEEF, L0); | |
3358 __ mov(L0, L1); | |
3359 __ mov(L0, L2); | |
3360 __ mov(L0, L3); | |
3361 __ mov(L0, L4); | |
3362 __ mov(L0, L5); | |
3363 | |
3364 // trash the return value as there is nothing to return yet | |
3365 __ set(0xDEAD0001, O7); | |
3366 #endif | |
3367 | |
3368 __ mov(SP, O5_savedSP); | |
3369 } | |
3370 | |
3371 | |
3372 static void make_new_frames(MacroAssembler* masm, bool deopt) { | |
3373 // | |
3374 // loop through the UnrollBlock info and create new frames | |
3375 // | |
3376 Register G3pcs = G3_scratch; | |
3377 Register Oreturn0 = O0; | |
3378 Register Oreturn1 = O1; | |
3379 Register O2UnrollBlock = O2; | |
3380 Register O3array = O3; | |
3381 Register O4array_size = O4; | |
3382 Label loop; | |
3383 | |
17980
0bf37f737702
8032410: compiler/uncommontrap/TestStackBangRbp.java times out on Solaris-Sparc V9
roland
parents:
17850
diff
changeset
|
3384 #ifdef ASSERT |
0bf37f737702
8032410: compiler/uncommontrap/TestStackBangRbp.java times out on Solaris-Sparc V9
roland
parents:
17850
diff
changeset
|
3385 // Compilers generate code that bang the stack by as much as the |
0bf37f737702
8032410: compiler/uncommontrap/TestStackBangRbp.java times out on Solaris-Sparc V9
roland
parents:
17850
diff
changeset
|
3386 // interpreter would need. So this stack banging should never |
0bf37f737702
8032410: compiler/uncommontrap/TestStackBangRbp.java times out on Solaris-Sparc V9
roland
parents:
17850
diff
changeset
|
3387 // trigger a fault. Verify that it does not on non product builds. |
0 | 3388 if (UseStackBanging) { |
3389 // Get total frame size for interpreted frames | |
727 | 3390 __ ld(O2UnrollBlock, Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes(), O4); |
0 | 3391 __ bang_stack_size(O4, O3, G3_scratch); |
3392 } | |
17980
0bf37f737702
8032410: compiler/uncommontrap/TestStackBangRbp.java times out on Solaris-Sparc V9
roland
parents:
17850
diff
changeset
|
3393 #endif |
0 | 3394 |
727 | 3395 __ ld(O2UnrollBlock, Deoptimization::UnrollBlock::number_of_frames_offset_in_bytes(), O4array_size); |
3396 __ ld_ptr(O2UnrollBlock, Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes(), G3pcs); | |
3397 __ ld_ptr(O2UnrollBlock, Deoptimization::UnrollBlock::frame_sizes_offset_in_bytes(), O3array); | |
0 | 3398 |
3399 // Adjust old interpreter frame to make space for new frame's extra java locals | |
3400 // | |
3401 // We capture the original sp for the transition frame only because it is needed in | |
3402 // order to properly calculate interpreter_sp_adjustment. Even though in real life | |
3403 // every interpreter frame captures a savedSP it is only needed at the transition | |
3404 // (fortunately). If we had to have it correct everywhere then we would need to | |
3405 // be told the sp_adjustment for each frame we create. If the frame size array | |
3406 // were to have twice the frame count entries then we could have pairs [sp_adjustment, frame_size] | |
3407 // for each frame we create and keep up the illusion every where. | |
3408 // | |
3409 | |
727 | 3410 __ ld(O2UnrollBlock, Deoptimization::UnrollBlock::caller_adjustment_offset_in_bytes(), O7); |
0 | 3411 __ mov(SP, O5_savedSP); // remember initial sender's original sp before adjustment |
3412 __ sub(SP, O7, SP); | |
3413 | |
3414 #ifdef ASSERT | |
3415 // make sure that there is at least one entry in the array | |
3416 __ tst(O4array_size); | |
5923 | 3417 __ breakpoint_trap(Assembler::zero, Assembler::icc); |
0 | 3418 #endif |
3419 | |
3420 // Now push the new interpreter frames | |
3421 __ bind(loop); | |
3422 | |
3423 // allocate a new frame, filling the registers | |
3424 | |
3425 gen_new_frame(masm, deopt); // allocate an interpreter frame | |
3426 | |
3839 | 3427 __ cmp_zero_and_br(Assembler::notZero, O4array_size, loop); |
0 | 3428 __ delayed()->add(O3array, wordSize, O3array); |
3429 __ ld_ptr(G3pcs, 0, O7); // load final frame new pc | |
3430 | |
3431 } | |
3432 | |
3433 //------------------------------generate_deopt_blob---------------------------- | |
3434 // Ought to generate an ideal graph & compile, but here's some SPARC ASM | |
3435 // instead. | |
3436 void SharedRuntime::generate_deopt_blob() { | |
3437 // allocate space for the code | |
3438 ResourceMark rm; | |
3439 // setup code generation tools | |
3440 int pad = VerifyThread ? 512 : 0;// Extra slop space for more verify code | |
17980
0bf37f737702
8032410: compiler/uncommontrap/TestStackBangRbp.java times out on Solaris-Sparc V9
roland
parents:
17850
diff
changeset
|
3441 #ifdef ASSERT |
4957
931e5f39e365
7147064: assert(allocates2(pc)) failed: not in CodeBuffer memory: 0xffffffff778d9d60 <= 0xffffffff778da69c
kvn
parents:
4873
diff
changeset
|
3442 if (UseStackBanging) { |
931e5f39e365
7147064: assert(allocates2(pc)) failed: not in CodeBuffer memory: 0xffffffff778d9d60 <= 0xffffffff778da69c
kvn
parents:
4873
diff
changeset
|
3443 pad += StackShadowPages*16 + 32; |
931e5f39e365
7147064: assert(allocates2(pc)) failed: not in CodeBuffer memory: 0xffffffff778d9d60 <= 0xffffffff778da69c
kvn
parents:
4873
diff
changeset
|
3444 } |
17980
0bf37f737702
8032410: compiler/uncommontrap/TestStackBangRbp.java times out on Solaris-Sparc V9
roland
parents:
17850
diff
changeset
|
3445 #endif |
16941
4e3b63e7a9f6
Fixing relock on interpreter when entering synchronized methods.
Stefan Anzinger <stefan.anzinger@oracle.com>
parents:
16657
diff
changeset
|
3446 #ifdef GRAAL |
17103
69d8f4e45ee2
[SPARC] Fix typo
Stefan Anzinger <stefan.anzinger@oracle.com>
parents:
17096
diff
changeset
|
3447 pad += 1000; // Increase the buffer size when compiling for GRAAL |
16941
4e3b63e7a9f6
Fixing relock on interpreter when entering synchronized methods.
Stefan Anzinger <stefan.anzinger@oracle.com>
parents:
16657
diff
changeset
|
3448 #endif |
0 | 3449 #ifdef _LP64 |
17103
69d8f4e45ee2
[SPARC] Fix typo
Stefan Anzinger <stefan.anzinger@oracle.com>
parents:
17096
diff
changeset
|
3450 CodeBuffer buffer("deopt_blob", 2100+pad+1000, 512); |
0 | 3451 #else |
3452 // Measured 8/7/03 at 1212 in 32bit debug build (no VerifyThread) | |
3453 // Measured 8/7/03 at 1396 in 32bit debug build (VerifyThread) | |
3454 CodeBuffer buffer("deopt_blob", 1600+pad, 512); | |
3455 #endif /* _LP64 */ | |
3456 MacroAssembler* masm = new MacroAssembler(&buffer); | |
3457 FloatRegister Freturn0 = F0; | |
3458 Register Greturn1 = G1; | |
3459 Register Oreturn0 = O0; | |
3460 Register Oreturn1 = O1; | |
3461 Register O2UnrollBlock = O2; | |
1037 | 3462 Register L0deopt_mode = L0; |
3463 Register G4deopt_mode = G4_scratch; | |
0 | 3464 int frame_size_words; |
727 | 3465 Address saved_Freturn0_addr(FP, -sizeof(double) + STACK_BIAS); |
0 | 3466 #if !defined(_LP64) && defined(COMPILER2) |
727 | 3467 Address saved_Greturn1_addr(FP, -sizeof(double) -sizeof(jlong) + STACK_BIAS); |
0 | 3468 #endif |
3469 Label cont; | |
3470 | |
3471 OopMapSet *oop_maps = new OopMapSet(); | |
3472 | |
3473 // | |
3474 // This is the entry point for code which is returning to a de-optimized | |
3475 // frame. | |
3476 // The steps taken by this frame are as follows: | |
3477 // - push a dummy "register_save" and save the return values (O0, O1, F0/F1, G1) | |
3478 // and all potentially live registers (at a pollpoint many registers can be live). | |
3479 // | |
3480 // - call the C routine: Deoptimization::fetch_unroll_info (this function | |
3481 // returns information about the number and size of interpreter frames | |
3482 // which are equivalent to the frame which is being deoptimized) | |
3483 // - deallocate the unpack frame, restoring only results values. Other | |
3484 // volatile registers will now be captured in the vframeArray as needed. | |
3485 // - deallocate the deoptimization frame | |
3486 // - in a loop using the information returned in the previous step | |
3487 // push new interpreter frames (take care to propagate the return | |
3488 // values through each new frame pushed) | |
3489 // - create a dummy "unpack_frame" and save the return values (O0, O1, F0) | |
3490 // - call the C routine: Deoptimization::unpack_frames (this function | |
3491 // lays out values on the interpreter frame which was just created) | |
3492 // - deallocate the dummy unpack_frame | |
3493 // - ensure that all the return values are correctly set and then do | |
3494 // a return to the interpreter entry point | |
3495 // | |
3496 // Refer to the following methods for more information: | |
3497 // - Deoptimization::fetch_unroll_info | |
3498 // - Deoptimization::unpack_frames | |
3499 | |
3500 OopMap* map = NULL; | |
3501 | |
3502 int start = __ offset(); | |
3503 | |
3504 // restore G2, the trampoline destroyed it | |
3505 __ get_thread(); | |
3506 | |
3507 // On entry we have been called by the deoptimized nmethod with a call that | |
3508 // replaced the original call (or safepoint polling location) so the deoptimizing | |
3509 // pc is now in O7. Return values are still in the expected places | |
3510 | |
3511 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_words); | |
3839 | 3512 __ ba(cont); |
1037 | 3513 __ delayed()->mov(Deoptimization::Unpack_deopt, L0deopt_mode); |
0 | 3514 |
16326
51f392557124
[SPARC] Improving implicit exception handling on sparc
Stefan Anzinger <stefan.anzinger@gmail.com>
parents:
16307
diff
changeset
|
3515 |
51f392557124
[SPARC] Improving implicit exception handling on sparc
Stefan Anzinger <stefan.anzinger@gmail.com>
parents:
16307
diff
changeset
|
3516 #ifdef GRAAL |
51f392557124
[SPARC] Improving implicit exception handling on sparc
Stefan Anzinger <stefan.anzinger@gmail.com>
parents:
16307
diff
changeset
|
3517 masm->block_comment("BEGIN GRAAL"); |
51f392557124
[SPARC] Improving implicit exception handling on sparc
Stefan Anzinger <stefan.anzinger@gmail.com>
parents:
16307
diff
changeset
|
3518 int implicit_exception_uncommon_trap_offset = __ offset() - start; |
51f392557124
[SPARC] Improving implicit exception handling on sparc
Stefan Anzinger <stefan.anzinger@gmail.com>
parents:
16307
diff
changeset
|
3519 //__ pushptr(Address(G2_thread, in_bytes(JavaThread::graal_implicit_exception_pc_offset()))); |
51f392557124
[SPARC] Improving implicit exception handling on sparc
Stefan Anzinger <stefan.anzinger@gmail.com>
parents:
16307
diff
changeset
|
3520 __ ld_ptr(G2_thread, in_bytes(JavaThread::graal_implicit_exception_pc_offset()), O7); |
51f392557124
[SPARC] Improving implicit exception handling on sparc
Stefan Anzinger <stefan.anzinger@gmail.com>
parents:
16307
diff
changeset
|
3521 //__ add(G0, 0x321, O7); |
51f392557124
[SPARC] Improving implicit exception handling on sparc
Stefan Anzinger <stefan.anzinger@gmail.com>
parents:
16307
diff
changeset
|
3522 __ add(O7, -8, O7); |
51f392557124
[SPARC] Improving implicit exception handling on sparc
Stefan Anzinger <stefan.anzinger@gmail.com>
parents:
16307
diff
changeset
|
3523 //__ st_ptr(I7, SP, I7->sp_offset_in_saved_window()*wordSize + STACK_BIAS); |
51f392557124
[SPARC] Improving implicit exception handling on sparc
Stefan Anzinger <stefan.anzinger@gmail.com>
parents:
16307
diff
changeset
|
3524 // Save everything in sight. |
51f392557124
[SPARC] Improving implicit exception handling on sparc
Stefan Anzinger <stefan.anzinger@gmail.com>
parents:
16307
diff
changeset
|
3525 masm->block_comment("save_live_regs"); |
51f392557124
[SPARC] Improving implicit exception handling on sparc
Stefan Anzinger <stefan.anzinger@gmail.com>
parents:
16307
diff
changeset
|
3526 (void) RegisterSaver::save_live_registers(masm, 0, &frame_size_words); |
51f392557124
[SPARC] Improving implicit exception handling on sparc
Stefan Anzinger <stefan.anzinger@gmail.com>
parents:
16307
diff
changeset
|
3527 masm->block_comment("/save_live_regs"); |
51f392557124
[SPARC] Improving implicit exception handling on sparc
Stefan Anzinger <stefan.anzinger@gmail.com>
parents:
16307
diff
changeset
|
3528 //__ ld_ptr(G2_thread, in_bytes(JavaThread::graal_implicit_exception_pc_offset()), O7); |
51f392557124
[SPARC] Improving implicit exception handling on sparc
Stefan Anzinger <stefan.anzinger@gmail.com>
parents:
16307
diff
changeset
|
3529 // fetch_unroll_info needs to call last_java_frame() |
51f392557124
[SPARC] Improving implicit exception handling on sparc
Stefan Anzinger <stefan.anzinger@gmail.com>
parents:
16307
diff
changeset
|
3530 masm->block_comment("set_last_java_frame"); |
51f392557124
[SPARC] Improving implicit exception handling on sparc
Stefan Anzinger <stefan.anzinger@gmail.com>
parents:
16307
diff
changeset
|
3531 __ set_last_Java_frame(SP, NULL); |
51f392557124
[SPARC] Improving implicit exception handling on sparc
Stefan Anzinger <stefan.anzinger@gmail.com>
parents:
16307
diff
changeset
|
3532 masm->block_comment("/set_last_java_frame"); |
51f392557124
[SPARC] Improving implicit exception handling on sparc
Stefan Anzinger <stefan.anzinger@gmail.com>
parents:
16307
diff
changeset
|
3533 |
51f392557124
[SPARC] Improving implicit exception handling on sparc
Stefan Anzinger <stefan.anzinger@gmail.com>
parents:
16307
diff
changeset
|
3534 //__ movl(c_rarg1, Address(r15_thread, in_bytes(ThreadShadow::pending_deoptimization_offset()))); |
51f392557124
[SPARC] Improving implicit exception handling on sparc
Stefan Anzinger <stefan.anzinger@gmail.com>
parents:
16307
diff
changeset
|
3535 __ ld(G2_thread, in_bytes(ThreadShadow::pending_deoptimization_offset()), O1); |
51f392557124
[SPARC] Improving implicit exception handling on sparc
Stefan Anzinger <stefan.anzinger@gmail.com>
parents:
16307
diff
changeset
|
3536 //__ movl(Address(r15_thread, in_bytes(ThreadShadow::pending_deoptimization_offset())), -1); |
51f392557124
[SPARC] Improving implicit exception handling on sparc
Stefan Anzinger <stefan.anzinger@gmail.com>
parents:
16307
diff
changeset
|
3537 __ sub(G0, 1, L1); |
51f392557124
[SPARC] Improving implicit exception handling on sparc
Stefan Anzinger <stefan.anzinger@gmail.com>
parents:
16307
diff
changeset
|
3538 __ st_ptr(L1, G2_thread, in_bytes(ThreadShadow::pending_deoptimization_offset())); |
51f392557124
[SPARC] Improving implicit exception handling on sparc
Stefan Anzinger <stefan.anzinger@gmail.com>
parents:
16307
diff
changeset
|
3539 |
51f392557124
[SPARC] Improving implicit exception handling on sparc
Stefan Anzinger <stefan.anzinger@gmail.com>
parents:
16307
diff
changeset
|
3540 __ mov((int32_t)Deoptimization::Unpack_reexecute, L0deopt_mode); |
51f392557124
[SPARC] Improving implicit exception handling on sparc
Stefan Anzinger <stefan.anzinger@gmail.com>
parents:
16307
diff
changeset
|
3541 __ mov(G2_thread, O0); |
51f392557124
[SPARC] Improving implicit exception handling on sparc
Stefan Anzinger <stefan.anzinger@gmail.com>
parents:
16307
diff
changeset
|
3542 __ call(CAST_FROM_FN_PTR(address, Deoptimization::uncommon_trap)); |
51f392557124
[SPARC] Improving implicit exception handling on sparc
Stefan Anzinger <stefan.anzinger@gmail.com>
parents:
16307
diff
changeset
|
3543 __ delayed()->nop(); |
51f392557124
[SPARC] Improving implicit exception handling on sparc
Stefan Anzinger <stefan.anzinger@gmail.com>
parents:
16307
diff
changeset
|
3544 oop_maps->add_gc_map( __ offset()-start, map->deep_copy()); |
51f392557124
[SPARC] Improving implicit exception handling on sparc
Stefan Anzinger <stefan.anzinger@gmail.com>
parents:
16307
diff
changeset
|
3545 __ get_thread(); |
51f392557124
[SPARC] Improving implicit exception handling on sparc
Stefan Anzinger <stefan.anzinger@gmail.com>
parents:
16307
diff
changeset
|
3546 __ add(O7, 8, O7); |
51f392557124
[SPARC] Improving implicit exception handling on sparc
Stefan Anzinger <stefan.anzinger@gmail.com>
parents:
16307
diff
changeset
|
3547 __ reset_last_Java_frame(); |
51f392557124
[SPARC] Improving implicit exception handling on sparc
Stefan Anzinger <stefan.anzinger@gmail.com>
parents:
16307
diff
changeset
|
3548 |
51f392557124
[SPARC] Improving implicit exception handling on sparc
Stefan Anzinger <stefan.anzinger@gmail.com>
parents:
16307
diff
changeset
|
3549 Label after_fetch_unroll_info_call; |
51f392557124
[SPARC] Improving implicit exception handling on sparc
Stefan Anzinger <stefan.anzinger@gmail.com>
parents:
16307
diff
changeset
|
3550 __ ba(after_fetch_unroll_info_call); |
51f392557124
[SPARC] Improving implicit exception handling on sparc
Stefan Anzinger <stefan.anzinger@gmail.com>
parents:
16307
diff
changeset
|
3551 __ delayed()->nop(); // Delay slot |
51f392557124
[SPARC] Improving implicit exception handling on sparc
Stefan Anzinger <stefan.anzinger@gmail.com>
parents:
16307
diff
changeset
|
3552 masm->block_comment("END GRAAL"); |
51f392557124
[SPARC] Improving implicit exception handling on sparc
Stefan Anzinger <stefan.anzinger@gmail.com>
parents:
16307
diff
changeset
|
3553 #endif // GRAAL |
51f392557124
[SPARC] Improving implicit exception handling on sparc
Stefan Anzinger <stefan.anzinger@gmail.com>
parents:
16307
diff
changeset
|
3554 |
0 | 3555 int exception_offset = __ offset() - start; |
3556 | |
3557 // restore G2, the trampoline destroyed it | |
3558 __ get_thread(); | |
3559 | |
3560 // On entry we have been jumped to by the exception handler (or exception_blob | |
3561 // for server). O0 contains the exception oop and O7 contains the original | |
3562 // exception pc. So if we push a frame here it will look to the | |
3563 // stack walking code (fetch_unroll_info) just like a normal call so | |
3564 // state will be extracted normally. | |
3565 | |
3566 // save exception oop in JavaThread and fall through into the | |
3567 // exception_in_tls case since they are handled in same way except | |
3568 // for where the pending exception is kept. | |
727 | 3569 __ st_ptr(Oexception, G2_thread, JavaThread::exception_oop_offset()); |
0 | 3570 |
3571 // | |
3572 // Vanilla deoptimization with an exception pending in exception_oop | |
3573 // | |
3574 int exception_in_tls_offset = __ offset() - start; | |
3575 | |
3576 // No need to update oop_map as each call to save_live_registers will produce identical oopmap | |
16641
422eda5267b3
[SPARC] Temporary fix to get the stack for deoptimization right when exception is thrown
Stefan Anzinger <stefan.anzinger@gmail.com>
parents:
16326
diff
changeset
|
3577 // Opens a new stack frame |
0 | 3578 (void) RegisterSaver::save_live_registers(masm, 0, &frame_size_words); |
3579 | |
3580 // Restore G2_thread | |
3581 __ get_thread(); | |
3582 | |
16941
4e3b63e7a9f6
Fixing relock on interpreter when entering synchronized methods.
Stefan Anzinger <stefan.anzinger@oracle.com>
parents:
16657
diff
changeset
|
3583 #ifdef GRAAL |
4e3b63e7a9f6
Fixing relock on interpreter when entering synchronized methods.
Stefan Anzinger <stefan.anzinger@oracle.com>
parents:
16657
diff
changeset
|
3584 // load throwing pc from JavaThread and patch it as the return address |
4e3b63e7a9f6
Fixing relock on interpreter when entering synchronized methods.
Stefan Anzinger <stefan.anzinger@oracle.com>
parents:
16657
diff
changeset
|
3585 // of the current frame. Then clear the field in JavaThread |
4e3b63e7a9f6
Fixing relock on interpreter when entering synchronized methods.
Stefan Anzinger <stefan.anzinger@oracle.com>
parents:
16657
diff
changeset
|
3586 __ block_comment("load throwing pc and patch return"); |
4e3b63e7a9f6
Fixing relock on interpreter when entering synchronized methods.
Stefan Anzinger <stefan.anzinger@oracle.com>
parents:
16657
diff
changeset
|
3587 Address exception_pc(G2_thread, JavaThread::exception_pc_offset()); |
4e3b63e7a9f6
Fixing relock on interpreter when entering synchronized methods.
Stefan Anzinger <stefan.anzinger@oracle.com>
parents:
16657
diff
changeset
|
3588 Label has_no_pc; |
4e3b63e7a9f6
Fixing relock on interpreter when entering synchronized methods.
Stefan Anzinger <stefan.anzinger@oracle.com>
parents:
16657
diff
changeset
|
3589 // TODO: Remove this weird check if we should patch the return pc |
4e3b63e7a9f6
Fixing relock on interpreter when entering synchronized methods.
Stefan Anzinger <stefan.anzinger@oracle.com>
parents:
16657
diff
changeset
|
3590 // This is because when graal decides to deoptimize and the ExceptionHandlerStub.java |
4e3b63e7a9f6
Fixing relock on interpreter when entering synchronized methods.
Stefan Anzinger <stefan.anzinger@oracle.com>
parents:
16657
diff
changeset
|
3591 // jumps back to this code and the I7 register contains the pc pointing to the begin |
4e3b63e7a9f6
Fixing relock on interpreter when entering synchronized methods.
Stefan Anzinger <stefan.anzinger@oracle.com>
parents:
16657
diff
changeset
|
3592 // of this code. If this is the case (PC within a certain range) then we need to patch |
4e3b63e7a9f6
Fixing relock on interpreter when entering synchronized methods.
Stefan Anzinger <stefan.anzinger@oracle.com>
parents:
16657
diff
changeset
|
3593 // the return pc. |
4e3b63e7a9f6
Fixing relock on interpreter when entering synchronized methods.
Stefan Anzinger <stefan.anzinger@oracle.com>
parents:
16657
diff
changeset
|
3594 // THIS NEEDS REWORK! (sa) |
4e3b63e7a9f6
Fixing relock on interpreter when entering synchronized methods.
Stefan Anzinger <stefan.anzinger@oracle.com>
parents:
16657
diff
changeset
|
3595 __ rdpc(L0); |
4e3b63e7a9f6
Fixing relock on interpreter when entering synchronized methods.
Stefan Anzinger <stefan.anzinger@oracle.com>
parents:
16657
diff
changeset
|
3596 __ sub(L0, I7, L0); |
4e3b63e7a9f6
Fixing relock on interpreter when entering synchronized methods.
Stefan Anzinger <stefan.anzinger@oracle.com>
parents:
16657
diff
changeset
|
3597 __ cmp(L0, 0xFFF); |
4e3b63e7a9f6
Fixing relock on interpreter when entering synchronized methods.
Stefan Anzinger <stefan.anzinger@oracle.com>
parents:
16657
diff
changeset
|
3598 __ br(Assembler::greater, false, Assembler::pt, has_no_pc); |
4e3b63e7a9f6
Fixing relock on interpreter when entering synchronized methods.
Stefan Anzinger <stefan.anzinger@oracle.com>
parents:
16657
diff
changeset
|
3599 __ delayed() -> nop(); |
4e3b63e7a9f6
Fixing relock on interpreter when entering synchronized methods.
Stefan Anzinger <stefan.anzinger@oracle.com>
parents:
16657
diff
changeset
|
3600 __ cmp(L0, -0xFFF); |
4e3b63e7a9f6
Fixing relock on interpreter when entering synchronized methods.
Stefan Anzinger <stefan.anzinger@oracle.com>
parents:
16657
diff
changeset
|
3601 __ br(Assembler::less, false, Assembler::pt, has_no_pc); |
4e3b63e7a9f6
Fixing relock on interpreter when entering synchronized methods.
Stefan Anzinger <stefan.anzinger@oracle.com>
parents:
16657
diff
changeset
|
3602 __ delayed() -> nop(); |
4e3b63e7a9f6
Fixing relock on interpreter when entering synchronized methods.
Stefan Anzinger <stefan.anzinger@oracle.com>
parents:
16657
diff
changeset
|
3603 __ ld_ptr(exception_pc, I7); |
4e3b63e7a9f6
Fixing relock on interpreter when entering synchronized methods.
Stefan Anzinger <stefan.anzinger@oracle.com>
parents:
16657
diff
changeset
|
3604 __ sub(I7, 8, I7); |
4e3b63e7a9f6
Fixing relock on interpreter when entering synchronized methods.
Stefan Anzinger <stefan.anzinger@oracle.com>
parents:
16657
diff
changeset
|
3605 __ st_ptr(G0, exception_pc); |
4e3b63e7a9f6
Fixing relock on interpreter when entering synchronized methods.
Stefan Anzinger <stefan.anzinger@oracle.com>
parents:
16657
diff
changeset
|
3606 __ bind(has_no_pc); |
4e3b63e7a9f6
Fixing relock on interpreter when entering synchronized methods.
Stefan Anzinger <stefan.anzinger@oracle.com>
parents:
16657
diff
changeset
|
3607 __ block_comment("/load throwing pc and patch return"); |
4e3b63e7a9f6
Fixing relock on interpreter when entering synchronized methods.
Stefan Anzinger <stefan.anzinger@oracle.com>
parents:
16657
diff
changeset
|
3608 #endif // GAAL |
4e3b63e7a9f6
Fixing relock on interpreter when entering synchronized methods.
Stefan Anzinger <stefan.anzinger@oracle.com>
parents:
16657
diff
changeset
|
3609 |
0 | 3610 #ifdef ASSERT |
3611 { | |
3612 // verify that there is really an exception oop in exception_oop | |
3613 Label has_exception; | |
727 | 3614 __ ld_ptr(G2_thread, JavaThread::exception_oop_offset(), Oexception); |
3839 | 3615 __ br_notnull_short(Oexception, Assembler::pt, has_exception); |
0 | 3616 __ stop("no exception in thread"); |
3617 __ bind(has_exception); | |
3618 | |
3619 // verify that there is no pending exception | |
3620 Label no_pending_exception; | |
727 | 3621 Address exception_addr(G2_thread, Thread::pending_exception_offset()); |
0 | 3622 __ ld_ptr(exception_addr, Oexception); |
3839 | 3623 __ br_null_short(Oexception, Assembler::pt, no_pending_exception); |
0 | 3624 __ stop("must not have pending exception here"); |
3625 __ bind(no_pending_exception); | |
3626 } | |
3627 #endif | |
3628 | |
3839 | 3629 __ ba(cont); |
1037 | 3630 __ delayed()->mov(Deoptimization::Unpack_exception, L0deopt_mode);; |
0 | 3631 |
3632 // | |
3633 // Reexecute entry, similar to c2 uncommon trap | |
3634 // | |
3635 int reexecute_offset = __ offset() - start; | |
16641
422eda5267b3
[SPARC] Temporary fix to get the stack for deoptimization right when exception is thrown
Stefan Anzinger <stefan.anzinger@gmail.com>
parents:
16326
diff
changeset
|
3636 #if defined(COMPILERGRAAL) && !defined(COMPILER1) |
422eda5267b3
[SPARC] Temporary fix to get the stack for deoptimization right when exception is thrown
Stefan Anzinger <stefan.anzinger@gmail.com>
parents:
16326
diff
changeset
|
3637 // Graal does not use this kind of deoptimization |
422eda5267b3
[SPARC] Temporary fix to get the stack for deoptimization right when exception is thrown
Stefan Anzinger <stefan.anzinger@gmail.com>
parents:
16326
diff
changeset
|
3638 __ should_not_reach_here(); |
422eda5267b3
[SPARC] Temporary fix to get the stack for deoptimization right when exception is thrown
Stefan Anzinger <stefan.anzinger@gmail.com>
parents:
16326
diff
changeset
|
3639 #endif |
0 | 3640 // No need to update oop_map as each call to save_live_registers will produce identical oopmap |
3641 (void) RegisterSaver::save_live_registers(masm, 0, &frame_size_words); | |
3642 | |
1037 | 3643 __ mov(Deoptimization::Unpack_reexecute, L0deopt_mode); |
0 | 3644 |
3645 __ bind(cont); | |
3646 | |
3647 __ set_last_Java_frame(SP, noreg); | |
3648 | |
3649 // do the call by hand so we can get the oopmap | |
3650 | |
3651 __ mov(G2_thread, L7_thread_cache); | |
3652 __ call(CAST_FROM_FN_PTR(address, Deoptimization::fetch_unroll_info), relocInfo::runtime_call_type); | |
3653 __ delayed()->mov(G2_thread, O0); | |
3654 | |
3655 // Set an oopmap for the call site this describes all our saved volatile registers | |
3656 | |
3657 oop_maps->add_gc_map( __ offset()-start, map); | |
3658 | |
3659 __ mov(L7_thread_cache, G2_thread); | |
3660 | |
3661 __ reset_last_Java_frame(); | |
3662 | |
16326
51f392557124
[SPARC] Improving implicit exception handling on sparc
Stefan Anzinger <stefan.anzinger@gmail.com>
parents:
16307
diff
changeset
|
3663 #ifdef GRAAL |
51f392557124
[SPARC] Improving implicit exception handling on sparc
Stefan Anzinger <stefan.anzinger@gmail.com>
parents:
16307
diff
changeset
|
3664 __ bind(after_fetch_unroll_info_call); |
51f392557124
[SPARC] Improving implicit exception handling on sparc
Stefan Anzinger <stefan.anzinger@gmail.com>
parents:
16307
diff
changeset
|
3665 #endif |
0 | 3666 // NOTE: we know that only O0/O1 will be reloaded by restore_result_registers |
3667 // so this move will survive | |
3668 | |
1037 | 3669 __ mov(L0deopt_mode, G4deopt_mode); |
0 | 3670 |
3671 __ mov(O0, O2UnrollBlock->after_save()); | |
3672 | |
3673 RegisterSaver::restore_result_registers(masm); | |
18125
2a69cbe850a8
Reduce diff with upstream
Gilles Duboscq <duboscq@ssw.jku.at>
parents:
18041
diff
changeset
|
3674 |
0 | 3675 Label noException; |
3839 | 3676 __ cmp_and_br_short(G4deopt_mode, Deoptimization::Unpack_exception, Assembler::notEqual, Assembler::pt, noException); |
0 | 3677 |
3678 // Move the pending exception from exception_oop to Oexception so | |
3679 // the pending exception will be picked up the interpreter. | |
3680 __ ld_ptr(G2_thread, in_bytes(JavaThread::exception_oop_offset()), Oexception); | |
3681 __ st_ptr(G0, G2_thread, in_bytes(JavaThread::exception_oop_offset())); | |
12884
e504cd481ec0
8026376: assert(false) failed: DEBUG MESSAGE: exception pc already set
twisti
parents:
10997
diff
changeset
|
3682 __ st_ptr(G0, G2_thread, in_bytes(JavaThread::exception_pc_offset())); |
0 | 3683 __ bind(noException); |
3684 | |
3685 // deallocate the deoptimization frame taking care to preserve the return values | |
3686 __ mov(Oreturn0, Oreturn0->after_save()); | |
3687 __ mov(Oreturn1, Oreturn1->after_save()); | |
3688 __ mov(O2UnrollBlock, O2UnrollBlock->after_save()); | |
3689 __ restore(); | |
3690 | |
3691 // Allocate new interpreter frame(s) and possible c2i adapter frame | |
3692 | |
3693 make_new_frames(masm, true); | |
3694 | |
3695 // push a dummy "unpack_frame" taking care of float return values and | |
3696 // call Deoptimization::unpack_frames to have the unpacker layout | |
3697 // information in the interpreter frames just created and then return | |
3698 // to the interpreter entry point | |
3699 __ save(SP, -frame_size_words*wordSize, SP); | |
3700 __ stf(FloatRegisterImpl::D, Freturn0, saved_Freturn0_addr); | |
3701 #if !defined(_LP64) | |
3702 #if defined(COMPILER2) | |
1783 | 3703 // 32-bit 1-register longs return longs in G1 |
3704 __ stx(Greturn1, saved_Greturn1_addr); | |
0 | 3705 #endif |
3706 __ set_last_Java_frame(SP, noreg); | |
1037 | 3707 __ call_VM_leaf(L7_thread_cache, CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames), G2_thread, G4deopt_mode); |
0 | 3708 #else |
3709 // LP64 uses g4 in set_last_Java_frame | |
1037 | 3710 __ mov(G4deopt_mode, O1); |
0 | 3711 __ set_last_Java_frame(SP, G0); |
3712 __ call_VM_leaf(L7_thread_cache, CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames), G2_thread, O1); | |
3713 #endif | |
3714 __ reset_last_Java_frame(); | |
3715 __ ldf(FloatRegisterImpl::D, saved_Freturn0_addr, Freturn0); | |
3716 | |
3717 #if !defined(_LP64) && defined(COMPILER2) | |
3718 // In 32 bit, C2 returns longs in G1 so restore the saved G1 into | |
1783 | 3719 // I0/I1 if the return value is long. |
3720 Label not_long; | |
3839 | 3721 __ cmp_and_br_short(O0,T_LONG, Assembler::notEqual, Assembler::pt, not_long); |
1783 | 3722 __ ldd(saved_Greturn1_addr,I0); |
3723 __ bind(not_long); | |
0 | 3724 #endif |
3725 __ ret(); | |
3726 __ delayed()->restore(); | |
3727 | |
3728 masm->flush(); | |
3729 _deopt_blob = DeoptimizationBlob::create(&buffer, oop_maps, 0, exception_offset, reexecute_offset, frame_size_words); | |
3730 _deopt_blob->set_unpack_with_exception_in_tls_offset(exception_in_tls_offset); | |
16326
51f392557124
[SPARC] Improving implicit exception handling on sparc
Stefan Anzinger <stefan.anzinger@gmail.com>
parents:
16307
diff
changeset
|
3731 #ifdef GRAAL |
51f392557124
[SPARC] Improving implicit exception handling on sparc
Stefan Anzinger <stefan.anzinger@gmail.com>
parents:
16307
diff
changeset
|
3732 _deopt_blob->set_implicit_exception_uncommon_trap_offset(implicit_exception_uncommon_trap_offset); |
51f392557124
[SPARC] Improving implicit exception handling on sparc
Stefan Anzinger <stefan.anzinger@gmail.com>
parents:
16307
diff
changeset
|
3733 #endif |
0 | 3734 } |
3735 | |
3736 #ifdef COMPILER2 | |
3737 | |
3738 //------------------------------generate_uncommon_trap_blob-------------------- | |
3739 // Ought to generate an ideal graph & compile, but here's some SPARC ASM | |
3740 // instead. | |
3741 void SharedRuntime::generate_uncommon_trap_blob() { | |
3742 // allocate space for the code | |
3743 ResourceMark rm; | |
3744 // setup code generation tools | |
3745 int pad = VerifyThread ? 512 : 0; | |
17980
0bf37f737702
8032410: compiler/uncommontrap/TestStackBangRbp.java times out on Solaris-Sparc V9
roland
parents:
17850
diff
changeset
|
3746 #ifdef ASSERT |
4957
931e5f39e365
7147064: assert(allocates2(pc)) failed: not in CodeBuffer memory: 0xffffffff778d9d60 <= 0xffffffff778da69c
kvn
parents:
4873
diff
changeset
|
3747 if (UseStackBanging) { |
931e5f39e365
7147064: assert(allocates2(pc)) failed: not in CodeBuffer memory: 0xffffffff778d9d60 <= 0xffffffff778da69c
kvn
parents:
4873
diff
changeset
|
3748 pad += StackShadowPages*16 + 32; |
931e5f39e365
7147064: assert(allocates2(pc)) failed: not in CodeBuffer memory: 0xffffffff778d9d60 <= 0xffffffff778da69c
kvn
parents:
4873
diff
changeset
|
3749 } |
17980
0bf37f737702
8032410: compiler/uncommontrap/TestStackBangRbp.java times out on Solaris-Sparc V9
roland
parents:
17850
diff
changeset
|
3750 #endif |
0 | 3751 #ifdef _LP64 |
3752 CodeBuffer buffer("uncommon_trap_blob", 2700+pad, 512); | |
3753 #else | |
3754 // Measured 8/7/03 at 660 in 32bit debug build (no VerifyThread) | |
3755 // Measured 8/7/03 at 1028 in 32bit debug build (VerifyThread) | |
3756 CodeBuffer buffer("uncommon_trap_blob", 2000+pad, 512); | |
3757 #endif | |
3758 MacroAssembler* masm = new MacroAssembler(&buffer); | |
3759 Register O2UnrollBlock = O2; | |
3760 Register O2klass_index = O2; | |
3761 | |
3762 // | |
3763 // This is the entry point for all traps the compiler takes when it thinks | |
3764 // it cannot handle further execution of compilation code. The frame is | |
3765 // deoptimized in these cases and converted into interpreter frames for | |
3766 // execution | |
3767 // The steps taken by this frame are as follows: | |
3768 // - push a fake "unpack_frame" | |
3769 // - call the C routine Deoptimization::uncommon_trap (this function | |
3770 // packs the current compiled frame into vframe arrays and returns | |
3771 // information about the number and size of interpreter frames which | |
3772 // are equivalent to the frame which is being deoptimized) | |
3773 // - deallocate the "unpack_frame" | |
3774 // - deallocate the deoptimization frame | |
3775 // - in a loop using the information returned in the previous step | |
3776 // push interpreter frames; | |
3777 // - create a dummy "unpack_frame" | |
3778 // - call the C routine: Deoptimization::unpack_frames (this function | |
3779 // lays out values on the interpreter frame which was just created) | |
3780 // - deallocate the dummy unpack_frame | |
3781 // - return to the interpreter entry point | |
3782 // | |
3783 // Refer to the following methods for more information: | |
3784 // - Deoptimization::uncommon_trap | |
3785 // - Deoptimization::unpack_frame | |
3786 | |
3787 // the unloaded class index is in O0 (first parameter to this blob) | |
3788 | |
3789 // push a dummy "unpack_frame" | |
3790 // and call Deoptimization::uncommon_trap to pack the compiled frame into | |
3791 // vframe array and return the UnrollBlock information | |
3792 __ save_frame(0); | |
3793 __ set_last_Java_frame(SP, noreg); | |
3794 __ mov(I0, O2klass_index); | |
3795 __ call_VM_leaf(L7_thread_cache, CAST_FROM_FN_PTR(address, Deoptimization::uncommon_trap), G2_thread, O2klass_index); | |
3796 __ reset_last_Java_frame(); | |
3797 __ mov(O0, O2UnrollBlock->after_save()); | |
3798 __ restore(); | |
3799 | |
3800 // deallocate the deoptimized frame taking care to preserve the return values | |
3801 __ mov(O2UnrollBlock, O2UnrollBlock->after_save()); | |
3802 __ restore(); | |
3803 | |
3804 // Allocate new interpreter frame(s) and possible c2i adapter frame | |
3805 | |
3806 make_new_frames(masm, false); | |
3807 | |
3808 // push a dummy "unpack_frame" taking care of float return values and | |
3809 // call Deoptimization::unpack_frames to have the unpacker layout | |
3810 // information in the interpreter frames just created and then return | |
3811 // to the interpreter entry point | |
3812 __ save_frame(0); | |
3813 __ set_last_Java_frame(SP, noreg); | |
3814 __ mov(Deoptimization::Unpack_uncommon_trap, O3); // indicate it is the uncommon trap case | |
3815 __ call_VM_leaf(L7_thread_cache, CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames), G2_thread, O3); | |
3816 __ reset_last_Java_frame(); | |
3817 __ ret(); | |
3818 __ delayed()->restore(); | |
3819 | |
3820 masm->flush(); | |
3821 _uncommon_trap_blob = UncommonTrapBlob::create(&buffer, NULL, __ total_frame_size_in_bytes(0)/wordSize); | |
3822 } | |
3823 | |
3824 #endif // COMPILER2 | |
3825 | |
3826 //------------------------------generate_handler_blob------------------- | |
3827 // | |
3828 // Generate a special Compile2Runtime blob that saves all registers, and sets | |
3829 // up an OopMap. | |
3830 // | |
3831 // This blob is jumped to (via a breakpoint and the signal handler) from a | |
3832 // safepoint in compiled code. On entry to this blob, O7 contains the | |
3833 // address in the original nmethod at which we should resume normal execution. | |
3834 // Thus, this blob looks like a subroutine which must preserve lots of | |
3835 // registers and return normally. Note that O7 is never register-allocated, | |
3836 // so it is guaranteed to be free here. | |
3837 // | |
3838 | |
3839 // The hardest part of what this blob must do is to save the 64-bit %o | |
3840 // registers in the 32-bit build. A simple 'save' turn the %o's to %i's and | |
3841 // an interrupt will chop off their heads. Making space in the caller's frame | |
3842 // first will let us save the 64-bit %o's before save'ing, but we cannot hand | |
3843 // the adjusted FP off to the GC stack-crawler: this will modify the caller's | |
3844 // SP and mess up HIS OopMaps. So we first adjust the caller's SP, then save | |
3845 // the 64-bit %o's, then do a save, then fixup the caller's SP (our FP). | |
3846 // Tricky, tricky, tricky... | |
3847 | |
6792
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6790
diff
changeset
|
3848 SafepointBlob* SharedRuntime::generate_handler_blob(address call_ptr, int poll_type) { |
0 | 3849 assert (StubRoutines::forward_exception_entry() != NULL, "must be generated before"); |
3850 | |
3851 // allocate space for the code | |
3852 ResourceMark rm; | |
3853 // setup code generation tools | |
3854 // Measured 8/7/03 at 896 in 32bit debug build (no VerifyThread) | |
3855 // Measured 8/7/03 at 1080 in 32bit debug build (VerifyThread) | |
3856 // even larger with TraceJumps | |
3857 int pad = TraceJumps ? 512 : 0; | |
3858 CodeBuffer buffer("handler_blob", 1600 + pad, 512); | |
3859 MacroAssembler* masm = new MacroAssembler(&buffer); | |
3860 int frame_size_words; | |
3861 OopMapSet *oop_maps = new OopMapSet(); | |
3862 OopMap* map = NULL; | |
3863 | |
3864 int start = __ offset(); | |
3865 | |
6792
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6790
diff
changeset
|
3866 bool cause_return = (poll_type == POLL_AT_RETURN); |
0 | 3867 // If this causes a return before the processing, then do a "restore" |
3868 if (cause_return) { | |
3869 __ restore(); | |
3870 } else { | |
3871 // Make it look like we were called via the poll | |
3872 // so that frame constructor always sees a valid return address | |
3873 __ ld_ptr(G2_thread, in_bytes(JavaThread::saved_exception_pc_offset()), O7); | |
3874 __ sub(O7, frame::pc_return_offset, O7); | |
3875 } | |
3876 | |
3877 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_words); | |
3878 | |
3879 // setup last_Java_sp (blows G4) | |
3880 __ set_last_Java_frame(SP, noreg); | |
3881 | |
3882 // call into the runtime to handle illegal instructions exception | |
3883 // Do not use call_VM_leaf, because we need to make a GC map at this call site. | |
3884 __ mov(G2_thread, O0); | |
3885 __ save_thread(L7_thread_cache); | |
3886 __ call(call_ptr); | |
3887 __ delayed()->nop(); | |
3888 | |
3889 // Set an oopmap for the call site. | |
3890 // We need this not only for callee-saved registers, but also for volatile | |
3891 // registers that the compiler might be keeping live across a safepoint. | |
3892 | |
3893 oop_maps->add_gc_map( __ offset() - start, map); | |
3894 | |
3895 __ restore_thread(L7_thread_cache); | |
3896 // clear last_Java_sp | |
3897 __ reset_last_Java_frame(); | |
3898 | |
3899 // Check for exceptions | |
3900 Label pending; | |
3901 | |
3902 __ ld_ptr(G2_thread, in_bytes(Thread::pending_exception_offset()), O1); | |
3839 | 3903 __ br_notnull_short(O1, Assembler::pn, pending); |
0 | 3904 |
3905 RegisterSaver::restore_live_registers(masm); | |
3906 | |
3907 // We are back the the original state on entry and ready to go. | |
3908 | |
3909 __ retl(); | |
3910 __ delayed()->nop(); | |
3911 | |
3912 // Pending exception after the safepoint | |
3913 | |
3914 __ bind(pending); | |
3915 | |
3916 RegisterSaver::restore_live_registers(masm); | |
3917 | |
3918 // We are back the the original state on entry. | |
3919 | |
3920 // Tail-call forward_exception_entry, with the issuing PC in O7, | |
3921 // so it looks like the original nmethod called forward_exception_entry. | |
3922 __ set((intptr_t)StubRoutines::forward_exception_entry(), O0); | |
3923 __ JMP(O0, 0); | |
3924 __ delayed()->nop(); | |
3925 | |
3926 // ------------- | |
3927 // make sure all code is generated | |
3928 masm->flush(); | |
3929 | |
3930 // return exception blob | |
3931 return SafepointBlob::create(&buffer, oop_maps, frame_size_words); | |
3932 } | |
3933 | |
3934 // | |
3935 // generate_resolve_blob - call resolution (static/virtual/opt-virtual/ic-miss | |
3936 // | |
3937 // Generate a stub that calls into vm to find out the proper destination | |
3938 // of a java call. All the argument registers are live at this point | |
3939 // but since this is generic code we don't know what they are and the caller | |
3940 // must do any gc of the args. | |
3941 // | |
3442
f7d55ea6ee56
7045514: SPARC assembly code for JSR 292 ricochet frames
never
parents:
2405
diff
changeset
|
3942 RuntimeStub* SharedRuntime::generate_resolve_blob(address destination, const char* name) { |
0 | 3943 assert (StubRoutines::forward_exception_entry() != NULL, "must be generated before"); |
3944 | |
3945 // allocate space for the code | |
3946 ResourceMark rm; | |
3947 // setup code generation tools | |
3948 // Measured 8/7/03 at 896 in 32bit debug build (no VerifyThread) | |
3949 // Measured 8/7/03 at 1080 in 32bit debug build (VerifyThread) | |
3950 // even larger with TraceJumps | |
3951 int pad = TraceJumps ? 512 : 0; | |
3952 CodeBuffer buffer(name, 1600 + pad, 512); | |
3953 MacroAssembler* masm = new MacroAssembler(&buffer); | |
3954 int frame_size_words; | |
3955 OopMapSet *oop_maps = new OopMapSet(); | |
3956 OopMap* map = NULL; | |
3957 | |
3958 int start = __ offset(); | |
3959 | |
3960 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_words); | |
3961 | |
3962 int frame_complete = __ offset(); | |
3963 | |
3964 // setup last_Java_sp (blows G4) | |
3965 __ set_last_Java_frame(SP, noreg); | |
3966 | |
3967 // call into the runtime to handle illegal instructions exception | |
3968 // Do not use call_VM_leaf, because we need to make a GC map at this call site. | |
3969 __ mov(G2_thread, O0); | |
3970 __ save_thread(L7_thread_cache); | |
3971 __ call(destination, relocInfo::runtime_call_type); | |
3972 __ delayed()->nop(); | |
3973 | |
3974 // O0 contains the address we are going to jump to assuming no exception got installed | |
3975 | |
3976 // Set an oopmap for the call site. | |
3977 // We need this not only for callee-saved registers, but also for volatile | |
3978 // registers that the compiler might be keeping live across a safepoint. | |
3979 | |
3980 oop_maps->add_gc_map( __ offset() - start, map); | |
3981 | |
3982 __ restore_thread(L7_thread_cache); | |
3983 // clear last_Java_sp | |
3984 __ reset_last_Java_frame(); | |
3985 | |
3986 // Check for exceptions | |
3987 Label pending; | |
3988 | |
3989 __ ld_ptr(G2_thread, in_bytes(Thread::pending_exception_offset()), O1); | |
3839 | 3990 __ br_notnull_short(O1, Assembler::pn, pending); |
0 | 3991 |
6725
da91efe96a93
6964458: Reimplement class meta-data storage to use native memory
coleenp
parents:
6266
diff
changeset
|
3992 // get the returned Method* |
da91efe96a93
6964458: Reimplement class meta-data storage to use native memory
coleenp
parents:
6266
diff
changeset
|
3993 |
da91efe96a93
6964458: Reimplement class meta-data storage to use native memory
coleenp
parents:
6266
diff
changeset
|
3994 __ get_vm_result_2(G5_method); |
0 | 3995 __ stx(G5_method, SP, RegisterSaver::G5_offset()+STACK_BIAS); |
3996 | |
3997 // O0 is where we want to jump, overwrite G3 which is saved and scratch | |
3998 | |
3999 __ stx(O0, SP, RegisterSaver::G3_offset()+STACK_BIAS); | |
4000 | |
4001 RegisterSaver::restore_live_registers(masm); | |
4002 | |
4003 // We are back the the original state on entry and ready to go. | |
4004 | |
4005 __ JMP(G3, 0); | |
4006 __ delayed()->nop(); | |
4007 | |
4008 // Pending exception after the safepoint | |
4009 | |
4010 __ bind(pending); | |
4011 | |
4012 RegisterSaver::restore_live_registers(masm); | |
4013 | |
4014 // We are back the the original state on entry. | |
4015 | |
4016 // Tail-call forward_exception_entry, with the issuing PC in O7, | |
4017 // so it looks like the original nmethod called forward_exception_entry. | |
4018 __ set((intptr_t)StubRoutines::forward_exception_entry(), O0); | |
4019 __ JMP(O0, 0); | |
4020 __ delayed()->nop(); | |
4021 | |
4022 // ------------- | |
4023 // make sure all code is generated | |
4024 masm->flush(); | |
4025 | |
4026 // return the blob | |
4027 // frame_size_words or bytes?? | |
4028 return RuntimeStub::new_runtime_stub(name, &buffer, frame_complete, frame_size_words, oop_maps, true); | |
4029 } |