Mercurial > hg > truffle
annotate src/cpu/x86/vm/c1_LIRGenerator_x86.cpp @ 7234:911872d97f65
C2 build bugfix
author | Christian Haeubl <haeubl@ssw.jku.at> |
---|---|
date | Mon, 17 Dec 2012 08:32:49 +0100 |
parents | 8e47bac5643a |
children | 46f6f063b272 |
rev | line source |
---|---|
0 | 1 /* |
6725
da91efe96a93
6964458: Reimplement class meta-data storage to use native memory
coleenp
parents:
6145
diff
changeset
|
2 * Copyright (c) 2005, 2012, Oracle and/or its affiliates. All rights reserved. |
0 | 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
4 * | |
5 * This code is free software; you can redistribute it and/or modify it | |
6 * under the terms of the GNU General Public License version 2 only, as | |
7 * published by the Free Software Foundation. | |
8 * | |
9 * This code is distributed in the hope that it will be useful, but WITHOUT | |
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
12 * version 2 for more details (a copy is included in the LICENSE file that | |
13 * accompanied this code). | |
14 * | |
15 * You should have received a copy of the GNU General Public License version | |
16 * 2 along with this work; if not, write to the Free Software Foundation, | |
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
18 * | |
1552
c18cbe5936b8
6941466: Oracle rebranding changes for Hotspot repositories
trims
parents:
1060
diff
changeset
|
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
c18cbe5936b8
6941466: Oracle rebranding changes for Hotspot repositories
trims
parents:
1060
diff
changeset
|
20 * or visit www.oracle.com if you need additional information or have any |
c18cbe5936b8
6941466: Oracle rebranding changes for Hotspot repositories
trims
parents:
1060
diff
changeset
|
21 * questions. |
0 | 22 * |
23 */ | |
24 | |
1972 | 25 #include "precompiled.hpp" |
26 #include "c1/c1_Compilation.hpp" | |
27 #include "c1/c1_FrameMap.hpp" | |
28 #include "c1/c1_Instruction.hpp" | |
29 #include "c1/c1_LIRAssembler.hpp" | |
30 #include "c1/c1_LIRGenerator.hpp" | |
31 #include "c1/c1_Runtime1.hpp" | |
32 #include "c1/c1_ValueStack.hpp" | |
33 #include "ci/ciArray.hpp" | |
34 #include "ci/ciObjArrayKlass.hpp" | |
35 #include "ci/ciTypeArrayKlass.hpp" | |
36 #include "runtime/sharedRuntime.hpp" | |
37 #include "runtime/stubRoutines.hpp" | |
38 #include "vmreg_x86.inline.hpp" | |
0 | 39 |
40 #ifdef ASSERT | |
41 #define __ gen()->lir(__FILE__, __LINE__)-> | |
42 #else | |
43 #define __ gen()->lir()-> | |
44 #endif | |
45 | |
46 // Item will be loaded into a byte register; Intel only | |
47 void LIRItem::load_byte_item() { | |
48 load_item(); | |
49 LIR_Opr res = result(); | |
50 | |
51 if (!res->is_virtual() || !_gen->is_vreg_flag_set(res, LIRGenerator::byte_reg)) { | |
52 // make sure that it is a byte register | |
53 assert(!value()->type()->is_float() && !value()->type()->is_double(), | |
54 "can't load floats in byte register"); | |
55 LIR_Opr reg = _gen->rlock_byte(T_BYTE); | |
56 __ move(res, reg); | |
57 | |
58 _result = reg; | |
59 } | |
60 } | |
61 | |
62 | |
63 void LIRItem::load_nonconstant() { | |
64 LIR_Opr r = value()->operand(); | |
65 if (r->is_constant()) { | |
66 _result = r; | |
67 } else { | |
68 load_item(); | |
69 } | |
70 } | |
71 | |
72 //-------------------------------------------------------------- | |
73 // LIRGenerator | |
74 //-------------------------------------------------------------- | |
75 | |
76 | |
77 LIR_Opr LIRGenerator::exceptionOopOpr() { return FrameMap::rax_oop_opr; } | |
78 LIR_Opr LIRGenerator::exceptionPcOpr() { return FrameMap::rdx_opr; } | |
79 LIR_Opr LIRGenerator::divInOpr() { return FrameMap::rax_opr; } | |
80 LIR_Opr LIRGenerator::divOutOpr() { return FrameMap::rax_opr; } | |
81 LIR_Opr LIRGenerator::remOutOpr() { return FrameMap::rdx_opr; } | |
82 LIR_Opr LIRGenerator::shiftCountOpr() { return FrameMap::rcx_opr; } | |
83 LIR_Opr LIRGenerator::syncTempOpr() { return FrameMap::rax_opr; } | |
84 LIR_Opr LIRGenerator::getThreadTemp() { return LIR_OprFact::illegalOpr; } | |
85 | |
86 | |
87 LIR_Opr LIRGenerator::result_register_for(ValueType* type, bool callee) { | |
88 LIR_Opr opr; | |
89 switch (type->tag()) { | |
90 case intTag: opr = FrameMap::rax_opr; break; | |
91 case objectTag: opr = FrameMap::rax_oop_opr; break; | |
304 | 92 case longTag: opr = FrameMap::long0_opr; break; |
0 | 93 case floatTag: opr = UseSSE >= 1 ? FrameMap::xmm0_float_opr : FrameMap::fpu0_float_opr; break; |
94 case doubleTag: opr = UseSSE >= 2 ? FrameMap::xmm0_double_opr : FrameMap::fpu0_double_opr; break; | |
95 | |
96 case addressTag: | |
97 default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr; | |
98 } | |
99 | |
100 assert(opr->type_field() == as_OprType(as_BasicType(type)), "type mismatch"); | |
101 return opr; | |
102 } | |
103 | |
104 | |
105 LIR_Opr LIRGenerator::rlock_byte(BasicType type) { | |
106 LIR_Opr reg = new_register(T_INT); | |
107 set_vreg_flag(reg, LIRGenerator::byte_reg); | |
108 return reg; | |
109 } | |
110 | |
111 | |
112 //--------- loading items into registers -------------------------------- | |
113 | |
114 | |
115 // i486 instructions can inline constants | |
116 bool LIRGenerator::can_store_as_constant(Value v, BasicType type) const { | |
117 if (type == T_SHORT || type == T_CHAR) { | |
118 // there is no immediate move of word values in asembler_i486.?pp | |
119 return false; | |
120 } | |
121 Constant* c = v->as_Constant(); | |
1819 | 122 if (c && c->state_before() == NULL) { |
0 | 123 // constants of any type can be stored directly, except for |
124 // unloaded object constants. | |
125 return true; | |
126 } | |
127 return false; | |
128 } | |
129 | |
130 | |
131 bool LIRGenerator::can_inline_as_constant(Value v) const { | |
304 | 132 if (v->type()->tag() == longTag) return false; |
0 | 133 return v->type()->tag() != objectTag || |
134 (v->type()->is_constant() && v->type()->as_ObjectType()->constant_value()->is_null_object()); | |
135 } | |
136 | |
137 | |
138 bool LIRGenerator::can_inline_as_constant(LIR_Const* c) const { | |
304 | 139 if (c->type() == T_LONG) return false; |
0 | 140 return c->type() != T_OBJECT || c->as_jobject() == NULL; |
141 } | |
142 | |
143 | |
144 LIR_Opr LIRGenerator::safepoint_poll_register() { | |
145 return LIR_OprFact::illegalOpr; | |
146 } | |
147 | |
148 | |
149 LIR_Address* LIRGenerator::generate_address(LIR_Opr base, LIR_Opr index, | |
150 int shift, int disp, BasicType type) { | |
151 assert(base->is_register(), "must be"); | |
152 if (index->is_constant()) { | |
153 return new LIR_Address(base, | |
154 (index->as_constant_ptr()->as_jint() << shift) + disp, | |
155 type); | |
156 } else { | |
157 return new LIR_Address(base, index, (LIR_Address::Scale)shift, disp, type); | |
158 } | |
159 } | |
160 | |
161 | |
162 LIR_Address* LIRGenerator::emit_array_address(LIR_Opr array_opr, LIR_Opr index_opr, | |
163 BasicType type, bool needs_card_mark) { | |
164 int offset_in_bytes = arrayOopDesc::base_offset_in_bytes(type); | |
165 | |
166 LIR_Address* addr; | |
167 if (index_opr->is_constant()) { | |
29
d5fc211aea19
6633953: type2aelembytes{T_ADDRESS} should be 8 bytes in 64 bit VM
kvn
parents:
0
diff
changeset
|
168 int elem_size = type2aelembytes(type); |
0 | 169 addr = new LIR_Address(array_opr, |
170 offset_in_bytes + index_opr->as_jint() * elem_size, type); | |
171 } else { | |
304 | 172 #ifdef _LP64 |
173 if (index_opr->type() == T_INT) { | |
174 LIR_Opr tmp = new_register(T_LONG); | |
175 __ convert(Bytecodes::_i2l, index_opr, tmp); | |
176 index_opr = tmp; | |
177 } | |
178 #endif // _LP64 | |
0 | 179 addr = new LIR_Address(array_opr, |
180 index_opr, | |
181 LIR_Address::scale(type), | |
182 offset_in_bytes, type); | |
183 } | |
184 if (needs_card_mark) { | |
185 // This store will need a precise card mark, so go ahead and | |
186 // compute the full adddres instead of computing once for the | |
187 // store and again for the card mark. | |
304 | 188 LIR_Opr tmp = new_pointer_register(); |
0 | 189 __ leal(LIR_OprFact::address(addr), tmp); |
1572 | 190 return new LIR_Address(tmp, type); |
0 | 191 } else { |
192 return addr; | |
193 } | |
194 } | |
195 | |
196 | |
1783 | 197 LIR_Opr LIRGenerator::load_immediate(int x, BasicType type) { |
198 LIR_Opr r; | |
199 if (type == T_LONG) { | |
200 r = LIR_OprFact::longConst(x); | |
201 } else if (type == T_INT) { | |
202 r = LIR_OprFact::intConst(x); | |
203 } else { | |
204 ShouldNotReachHere(); | |
205 } | |
206 return r; | |
207 } | |
208 | |
209 void LIRGenerator::increment_counter(address counter, BasicType type, int step) { | |
304 | 210 LIR_Opr pointer = new_pointer_register(); |
211 __ move(LIR_OprFact::intptrConst(counter), pointer); | |
1783 | 212 LIR_Address* addr = new LIR_Address(pointer, type); |
0 | 213 increment_counter(addr, step); |
214 } | |
215 | |
216 | |
217 void LIRGenerator::increment_counter(LIR_Address* addr, int step) { | |
218 __ add((LIR_Opr)addr, LIR_OprFact::intConst(step), (LIR_Opr)addr); | |
219 } | |
220 | |
221 void LIRGenerator::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) { | |
222 __ cmp_mem_int(condition, base, disp, c, info); | |
223 } | |
224 | |
225 | |
226 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, int disp, BasicType type, CodeEmitInfo* info) { | |
227 __ cmp_reg_mem(condition, reg, new LIR_Address(base, disp, type), info); | |
228 } | |
229 | |
230 | |
231 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, LIR_Opr disp, BasicType type, CodeEmitInfo* info) { | |
232 __ cmp_reg_mem(condition, reg, new LIR_Address(base, disp, type), info); | |
233 } | |
234 | |
235 | |
236 bool LIRGenerator::strength_reduce_multiply(LIR_Opr left, int c, LIR_Opr result, LIR_Opr tmp) { | |
237 if (tmp->is_valid()) { | |
238 if (is_power_of_2(c + 1)) { | |
239 __ move(left, tmp); | |
240 __ shift_left(left, log2_intptr(c + 1), left); | |
241 __ sub(left, tmp, result); | |
242 return true; | |
243 } else if (is_power_of_2(c - 1)) { | |
244 __ move(left, tmp); | |
245 __ shift_left(left, log2_intptr(c - 1), left); | |
246 __ add(left, tmp, result); | |
247 return true; | |
248 } | |
249 } | |
250 return false; | |
251 } | |
252 | |
253 | |
254 void LIRGenerator::store_stack_parameter (LIR_Opr item, ByteSize offset_from_sp) { | |
255 BasicType type = item->type(); | |
256 __ store(item, new LIR_Address(FrameMap::rsp_opr, in_bytes(offset_from_sp), type)); | |
257 } | |
258 | |
259 //---------------------------------------------------------------------- | |
260 // visitor functions | |
261 //---------------------------------------------------------------------- | |
262 | |
263 | |
264 void LIRGenerator::do_StoreIndexed(StoreIndexed* x) { | |
1819 | 265 assert(x->is_pinned(),""); |
0 | 266 bool needs_range_check = true; |
267 bool use_length = x->length() != NULL; | |
268 bool obj_store = x->elt_type() == T_ARRAY || x->elt_type() == T_OBJECT; | |
269 bool needs_store_check = obj_store && (x->value()->as_Constant() == NULL || | |
3957 | 270 !get_jobject_constant(x->value())->is_null_object() || |
271 x->should_profile()); | |
0 | 272 |
273 LIRItem array(x->array(), this); | |
274 LIRItem index(x->index(), this); | |
275 LIRItem value(x->value(), this); | |
276 LIRItem length(this); | |
277 | |
278 array.load_item(); | |
279 index.load_nonconstant(); | |
280 | |
281 if (use_length) { | |
282 needs_range_check = x->compute_needs_range_check(); | |
283 if (needs_range_check) { | |
284 length.set_instruction(x->length()); | |
285 length.load_item(); | |
286 } | |
287 } | |
288 if (needs_store_check) { | |
289 value.load_item(); | |
290 } else { | |
291 value.load_for_store(x->elt_type()); | |
292 } | |
293 | |
294 set_no_result(x); | |
295 | |
296 // the CodeEmitInfo must be duplicated for each different | |
297 // LIR-instruction because spilling can occur anywhere between two | |
298 // instructions and so the debug information must be different | |
299 CodeEmitInfo* range_check_info = state_for(x); | |
300 CodeEmitInfo* null_check_info = NULL; | |
301 if (x->needs_null_check()) { | |
302 null_check_info = new CodeEmitInfo(range_check_info); | |
303 } | |
304 | |
305 // emit array address setup early so it schedules better | |
306 LIR_Address* array_addr = emit_array_address(array.result(), index.result(), x->elt_type(), obj_store); | |
307 | |
308 if (GenerateRangeChecks && needs_range_check) { | |
309 if (use_length) { | |
310 __ cmp(lir_cond_belowEqual, length.result(), index.result()); | |
311 __ branch(lir_cond_belowEqual, T_INT, new RangeCheckStub(range_check_info, index.result())); | |
312 } else { | |
313 array_range_check(array.result(), index.result(), null_check_info, range_check_info); | |
314 // range_check also does the null check | |
315 null_check_info = NULL; | |
316 } | |
317 } | |
318 | |
319 if (GenerateArrayStoreCheck && needs_store_check) { | |
320 LIR_Opr tmp1 = new_register(objectType); | |
321 LIR_Opr tmp2 = new_register(objectType); | |
322 LIR_Opr tmp3 = new_register(objectType); | |
323 | |
324 CodeEmitInfo* store_check_info = new CodeEmitInfo(range_check_info); | |
3957 | 325 __ store_check(value.result(), array.result(), tmp1, tmp2, tmp3, store_check_info, x->profiled_method(), x->profiled_bci()); |
0 | 326 } |
327 | |
328 if (obj_store) { | |
342
37f87013dfd8
6711316: Open source the Garbage-First garbage collector
ysr
parents:
29
diff
changeset
|
329 // Needs GC write barriers. |
3249
e1162778c1c8
7009266: G1: assert(obj->is_oop_or_null(true )) failed: Error
johnc
parents:
2169
diff
changeset
|
330 pre_barrier(LIR_OprFact::address(array_addr), LIR_OprFact::illegalOpr /* pre_val */, |
e1162778c1c8
7009266: G1: assert(obj->is_oop_or_null(true )) failed: Error
johnc
parents:
2169
diff
changeset
|
331 true /* do_load */, false /* patch */, NULL); |
0 | 332 __ move(value.result(), array_addr, null_check_info); |
333 // Seems to be a precise | |
334 post_barrier(LIR_OprFact::address(array_addr), value.result()); | |
335 } else { | |
336 __ move(value.result(), array_addr, null_check_info); | |
337 } | |
338 } | |
339 | |
340 | |
341 void LIRGenerator::do_MonitorEnter(MonitorEnter* x) { | |
1819 | 342 assert(x->is_pinned(),""); |
0 | 343 LIRItem obj(x->obj(), this); |
344 obj.load_item(); | |
345 | |
346 set_no_result(x); | |
347 | |
348 // "lock" stores the address of the monitor stack slot, so this is not an oop | |
349 LIR_Opr lock = new_register(T_INT); | |
350 // Need a scratch register for biased locking on x86 | |
351 LIR_Opr scratch = LIR_OprFact::illegalOpr; | |
352 if (UseBiasedLocking) { | |
353 scratch = new_register(T_INT); | |
354 } | |
355 | |
356 CodeEmitInfo* info_for_exception = NULL; | |
357 if (x->needs_null_check()) { | |
1819 | 358 info_for_exception = state_for(x); |
0 | 359 } |
360 // this CodeEmitInfo must not have the xhandlers because here the | |
361 // object is already locked (xhandlers expect object to be unlocked) | |
362 CodeEmitInfo* info = state_for(x, x->state(), true); | |
363 monitor_enter(obj.result(), lock, syncTempOpr(), scratch, | |
364 x->monitor_no(), info_for_exception, info); | |
365 } | |
366 | |
367 | |
368 void LIRGenerator::do_MonitorExit(MonitorExit* x) { | |
1819 | 369 assert(x->is_pinned(),""); |
0 | 370 |
371 LIRItem obj(x->obj(), this); | |
372 obj.dont_load_item(); | |
373 | |
374 LIR_Opr lock = new_register(T_INT); | |
375 LIR_Opr obj_temp = new_register(T_INT); | |
376 set_no_result(x); | |
1681
126ea7725993
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
1579
diff
changeset
|
377 monitor_exit(obj_temp, lock, syncTempOpr(), LIR_OprFact::illegalOpr, x->monitor_no()); |
0 | 378 } |
379 | |
380 | |
381 // _ineg, _lneg, _fneg, _dneg | |
382 void LIRGenerator::do_NegateOp(NegateOp* x) { | |
383 LIRItem value(x->x(), this); | |
384 value.set_destroys_register(); | |
385 value.load_item(); | |
386 LIR_Opr reg = rlock(x); | |
387 __ negate(value.result(), reg); | |
388 | |
389 set_result(x, round_item(reg)); | |
390 } | |
391 | |
392 | |
393 // for _fadd, _fmul, _fsub, _fdiv, _frem | |
394 // _dadd, _dmul, _dsub, _ddiv, _drem | |
395 void LIRGenerator::do_ArithmeticOp_FPU(ArithmeticOp* x) { | |
396 LIRItem left(x->x(), this); | |
397 LIRItem right(x->y(), this); | |
398 LIRItem* left_arg = &left; | |
399 LIRItem* right_arg = &right; | |
400 assert(!left.is_stack() || !right.is_stack(), "can't both be memory operands"); | |
401 bool must_load_both = (x->op() == Bytecodes::_frem || x->op() == Bytecodes::_drem); | |
402 if (left.is_register() || x->x()->type()->is_constant() || must_load_both) { | |
403 left.load_item(); | |
404 } else { | |
405 left.dont_load_item(); | |
406 } | |
407 | |
408 // do not load right operand if it is a constant. only 0 and 1 are | |
409 // loaded because there are special instructions for loading them | |
410 // without memory access (not needed for SSE2 instructions) | |
411 bool must_load_right = false; | |
412 if (right.is_constant()) { | |
413 LIR_Const* c = right.result()->as_constant_ptr(); | |
414 assert(c != NULL, "invalid constant"); | |
415 assert(c->type() == T_FLOAT || c->type() == T_DOUBLE, "invalid type"); | |
416 | |
417 if (c->type() == T_FLOAT) { | |
418 must_load_right = UseSSE < 1 && (c->is_one_float() || c->is_zero_float()); | |
419 } else { | |
420 must_load_right = UseSSE < 2 && (c->is_one_double() || c->is_zero_double()); | |
421 } | |
422 } | |
423 | |
424 if (must_load_both) { | |
425 // frem and drem destroy also right operand, so move it to a new register | |
426 right.set_destroys_register(); | |
427 right.load_item(); | |
428 } else if (right.is_register() || must_load_right) { | |
429 right.load_item(); | |
430 } else { | |
431 right.dont_load_item(); | |
432 } | |
433 LIR_Opr reg = rlock(x); | |
434 LIR_Opr tmp = LIR_OprFact::illegalOpr; | |
435 if (x->is_strictfp() && (x->op() == Bytecodes::_dmul || x->op() == Bytecodes::_ddiv)) { | |
436 tmp = new_register(T_DOUBLE); | |
437 } | |
438 | |
439 if ((UseSSE >= 1 && x->op() == Bytecodes::_frem) || (UseSSE >= 2 && x->op() == Bytecodes::_drem)) { | |
440 // special handling for frem and drem: no SSE instruction, so must use FPU with temporary fpu stack slots | |
441 LIR_Opr fpu0, fpu1; | |
442 if (x->op() == Bytecodes::_frem) { | |
443 fpu0 = LIR_OprFact::single_fpu(0); | |
444 fpu1 = LIR_OprFact::single_fpu(1); | |
445 } else { | |
446 fpu0 = LIR_OprFact::double_fpu(0); | |
447 fpu1 = LIR_OprFact::double_fpu(1); | |
448 } | |
449 __ move(right.result(), fpu1); // order of left and right operand is important! | |
450 __ move(left.result(), fpu0); | |
451 __ rem (fpu0, fpu1, fpu0); | |
452 __ move(fpu0, reg); | |
453 | |
454 } else { | |
455 arithmetic_op_fpu(x->op(), reg, left.result(), right.result(), x->is_strictfp(), tmp); | |
456 } | |
457 | |
458 set_result(x, round_item(reg)); | |
459 } | |
460 | |
461 | |
462 // for _ladd, _lmul, _lsub, _ldiv, _lrem | |
463 void LIRGenerator::do_ArithmeticOp_Long(ArithmeticOp* x) { | |
464 if (x->op() == Bytecodes::_ldiv || x->op() == Bytecodes::_lrem ) { | |
465 // long division is implemented as a direct call into the runtime | |
466 LIRItem left(x->x(), this); | |
467 LIRItem right(x->y(), this); | |
468 | |
469 // the check for division by zero destroys the right operand | |
470 right.set_destroys_register(); | |
471 | |
472 BasicTypeList signature(2); | |
473 signature.append(T_LONG); | |
474 signature.append(T_LONG); | |
475 CallingConvention* cc = frame_map()->c_calling_convention(&signature); | |
476 | |
477 // check for division by zero (destroys registers of right operand!) | |
478 CodeEmitInfo* info = state_for(x); | |
479 | |
480 const LIR_Opr result_reg = result_register_for(x->type()); | |
481 left.load_item_force(cc->at(1)); | |
482 right.load_item(); | |
483 | |
484 __ move(right.result(), cc->at(0)); | |
485 | |
486 __ cmp(lir_cond_equal, right.result(), LIR_OprFact::longConst(0)); | |
487 __ branch(lir_cond_equal, T_LONG, new DivByZeroStub(info)); | |
488 | |
489 address entry; | |
490 switch (x->op()) { | |
491 case Bytecodes::_lrem: | |
492 entry = CAST_FROM_FN_PTR(address, SharedRuntime::lrem); | |
493 break; // check if dividend is 0 is done elsewhere | |
494 case Bytecodes::_ldiv: | |
495 entry = CAST_FROM_FN_PTR(address, SharedRuntime::ldiv); | |
496 break; // check if dividend is 0 is done elsewhere | |
497 case Bytecodes::_lmul: | |
498 entry = CAST_FROM_FN_PTR(address, SharedRuntime::lmul); | |
499 break; | |
500 default: | |
501 ShouldNotReachHere(); | |
502 } | |
503 | |
504 LIR_Opr result = rlock_result(x); | |
505 __ call_runtime_leaf(entry, getThreadTemp(), result_reg, cc->args()); | |
506 __ move(result_reg, result); | |
507 } else if (x->op() == Bytecodes::_lmul) { | |
508 // missing test if instr is commutative and if we should swap | |
509 LIRItem left(x->x(), this); | |
510 LIRItem right(x->y(), this); | |
511 | |
512 // right register is destroyed by the long mul, so it must be | |
513 // copied to a new register. | |
514 right.set_destroys_register(); | |
515 | |
516 left.load_item(); | |
517 right.load_item(); | |
518 | |
304 | 519 LIR_Opr reg = FrameMap::long0_opr; |
0 | 520 arithmetic_op_long(x->op(), reg, left.result(), right.result(), NULL); |
521 LIR_Opr result = rlock_result(x); | |
522 __ move(reg, result); | |
523 } else { | |
524 // missing test if instr is commutative and if we should swap | |
525 LIRItem left(x->x(), this); | |
526 LIRItem right(x->y(), this); | |
527 | |
528 left.load_item(); | |
605 | 529 // don't load constants to save register |
0 | 530 right.load_nonconstant(); |
531 rlock_result(x); | |
532 arithmetic_op_long(x->op(), x->operand(), left.result(), right.result(), NULL); | |
533 } | |
534 } | |
535 | |
536 | |
537 | |
538 // for: _iadd, _imul, _isub, _idiv, _irem | |
539 void LIRGenerator::do_ArithmeticOp_Int(ArithmeticOp* x) { | |
540 if (x->op() == Bytecodes::_idiv || x->op() == Bytecodes::_irem) { | |
541 // The requirements for division and modulo | |
542 // input : rax,: dividend min_int | |
543 // reg: divisor (may not be rax,/rdx) -1 | |
544 // | |
545 // output: rax,: quotient (= rax, idiv reg) min_int | |
546 // rdx: remainder (= rax, irem reg) 0 | |
547 | |
548 // rax, and rdx will be destroyed | |
549 | |
550 // Note: does this invalidate the spec ??? | |
551 LIRItem right(x->y(), this); | |
552 LIRItem left(x->x() , this); // visit left second, so that the is_register test is valid | |
553 | |
554 // call state_for before load_item_force because state_for may | |
555 // force the evaluation of other instructions that are needed for | |
556 // correct debug info. Otherwise the live range of the fix | |
557 // register might be too long. | |
558 CodeEmitInfo* info = state_for(x); | |
559 | |
560 left.load_item_force(divInOpr()); | |
561 | |
562 right.load_item(); | |
563 | |
564 LIR_Opr result = rlock_result(x); | |
565 LIR_Opr result_reg; | |
566 if (x->op() == Bytecodes::_idiv) { | |
567 result_reg = divOutOpr(); | |
568 } else { | |
569 result_reg = remOutOpr(); | |
570 } | |
571 | |
572 if (!ImplicitDiv0Checks) { | |
573 __ cmp(lir_cond_equal, right.result(), LIR_OprFact::intConst(0)); | |
574 __ branch(lir_cond_equal, T_INT, new DivByZeroStub(info)); | |
575 } | |
576 LIR_Opr tmp = FrameMap::rdx_opr; // idiv and irem use rdx in their implementation | |
577 if (x->op() == Bytecodes::_irem) { | |
578 __ irem(left.result(), right.result(), result_reg, tmp, info); | |
579 } else if (x->op() == Bytecodes::_idiv) { | |
580 __ idiv(left.result(), right.result(), result_reg, tmp, info); | |
581 } else { | |
582 ShouldNotReachHere(); | |
583 } | |
584 | |
585 __ move(result_reg, result); | |
586 } else { | |
587 // missing test if instr is commutative and if we should swap | |
588 LIRItem left(x->x(), this); | |
589 LIRItem right(x->y(), this); | |
590 LIRItem* left_arg = &left; | |
591 LIRItem* right_arg = &right; | |
592 if (x->is_commutative() && left.is_stack() && right.is_register()) { | |
593 // swap them if left is real stack (or cached) and right is real register(not cached) | |
594 left_arg = &right; | |
595 right_arg = &left; | |
596 } | |
597 | |
598 left_arg->load_item(); | |
599 | |
600 // do not need to load right, as we can handle stack and constants | |
601 if (x->op() == Bytecodes::_imul ) { | |
602 // check if we can use shift instead | |
603 bool use_constant = false; | |
604 bool use_tmp = false; | |
605 if (right_arg->is_constant()) { | |
606 int iconst = right_arg->get_jint_constant(); | |
607 if (iconst > 0) { | |
608 if (is_power_of_2(iconst)) { | |
609 use_constant = true; | |
610 } else if (is_power_of_2(iconst - 1) || is_power_of_2(iconst + 1)) { | |
611 use_constant = true; | |
612 use_tmp = true; | |
613 } | |
614 } | |
615 } | |
616 if (use_constant) { | |
617 right_arg->dont_load_item(); | |
618 } else { | |
619 right_arg->load_item(); | |
620 } | |
621 LIR_Opr tmp = LIR_OprFact::illegalOpr; | |
622 if (use_tmp) { | |
623 tmp = new_register(T_INT); | |
624 } | |
625 rlock_result(x); | |
626 | |
627 arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), tmp); | |
628 } else { | |
629 right_arg->dont_load_item(); | |
630 rlock_result(x); | |
631 LIR_Opr tmp = LIR_OprFact::illegalOpr; | |
632 arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), tmp); | |
633 } | |
634 } | |
635 } | |
636 | |
637 | |
638 void LIRGenerator::do_ArithmeticOp(ArithmeticOp* x) { | |
639 // when an operand with use count 1 is the left operand, then it is | |
640 // likely that no move for 2-operand-LIR-form is necessary | |
641 if (x->is_commutative() && x->y()->as_Constant() == NULL && x->x()->use_count() > x->y()->use_count()) { | |
642 x->swap_operands(); | |
643 } | |
644 | |
645 ValueTag tag = x->type()->tag(); | |
646 assert(x->x()->type()->tag() == tag && x->y()->type()->tag() == tag, "wrong parameters"); | |
647 switch (tag) { | |
648 case floatTag: | |
649 case doubleTag: do_ArithmeticOp_FPU(x); return; | |
650 case longTag: do_ArithmeticOp_Long(x); return; | |
651 case intTag: do_ArithmeticOp_Int(x); return; | |
652 } | |
653 ShouldNotReachHere(); | |
654 } | |
655 | |
656 | |
657 // _ishl, _lshl, _ishr, _lshr, _iushr, _lushr | |
658 void LIRGenerator::do_ShiftOp(ShiftOp* x) { | |
659 // count must always be in rcx | |
660 LIRItem value(x->x(), this); | |
661 LIRItem count(x->y(), this); | |
662 | |
663 ValueTag elemType = x->type()->tag(); | |
664 bool must_load_count = !count.is_constant() || elemType == longTag; | |
665 if (must_load_count) { | |
666 // count for long must be in register | |
667 count.load_item_force(shiftCountOpr()); | |
668 } else { | |
669 count.dont_load_item(); | |
670 } | |
671 value.load_item(); | |
672 LIR_Opr reg = rlock_result(x); | |
673 | |
674 shift_op(x->op(), reg, value.result(), count.result(), LIR_OprFact::illegalOpr); | |
675 } | |
676 | |
677 | |
678 // _iand, _land, _ior, _lor, _ixor, _lxor | |
679 void LIRGenerator::do_LogicOp(LogicOp* x) { | |
680 // when an operand with use count 1 is the left operand, then it is | |
681 // likely that no move for 2-operand-LIR-form is necessary | |
682 if (x->is_commutative() && x->y()->as_Constant() == NULL && x->x()->use_count() > x->y()->use_count()) { | |
683 x->swap_operands(); | |
684 } | |
685 | |
686 LIRItem left(x->x(), this); | |
687 LIRItem right(x->y(), this); | |
688 | |
689 left.load_item(); | |
690 right.load_nonconstant(); | |
691 LIR_Opr reg = rlock_result(x); | |
692 | |
693 logic_op(x->op(), reg, left.result(), right.result()); | |
694 } | |
695 | |
696 | |
697 | |
698 // _lcmp, _fcmpl, _fcmpg, _dcmpl, _dcmpg | |
699 void LIRGenerator::do_CompareOp(CompareOp* x) { | |
700 LIRItem left(x->x(), this); | |
701 LIRItem right(x->y(), this); | |
702 ValueTag tag = x->x()->type()->tag(); | |
703 if (tag == longTag) { | |
704 left.set_destroys_register(); | |
705 } | |
706 left.load_item(); | |
707 right.load_item(); | |
708 LIR_Opr reg = rlock_result(x); | |
709 | |
710 if (x->x()->type()->is_float_kind()) { | |
711 Bytecodes::Code code = x->op(); | |
712 __ fcmp2int(left.result(), right.result(), reg, (code == Bytecodes::_fcmpl || code == Bytecodes::_dcmpl)); | |
713 } else if (x->x()->type()->tag() == longTag) { | |
714 __ lcmp2int(left.result(), right.result(), reg); | |
715 } else { | |
716 Unimplemented(); | |
717 } | |
718 } | |
719 | |
720 | |
721 void LIRGenerator::do_CompareAndSwap(Intrinsic* x, ValueType* type) { | |
722 assert(x->number_of_arguments() == 4, "wrong type"); | |
723 LIRItem obj (x->argument_at(0), this); // object | |
724 LIRItem offset(x->argument_at(1), this); // offset of field | |
725 LIRItem cmp (x->argument_at(2), this); // value to compare with field | |
726 LIRItem val (x->argument_at(3), this); // replace field with val if matches cmp | |
727 | |
728 assert(obj.type()->tag() == objectTag, "invalid type"); | |
304 | 729 |
730 // In 64bit the type can be long, sparc doesn't have this assert | |
731 // assert(offset.type()->tag() == intTag, "invalid type"); | |
732 | |
0 | 733 assert(cmp.type()->tag() == type->tag(), "invalid type"); |
734 assert(val.type()->tag() == type->tag(), "invalid type"); | |
735 | |
736 // get address of field | |
737 obj.load_item(); | |
738 offset.load_nonconstant(); | |
739 | |
740 if (type == objectType) { | |
741 cmp.load_item_force(FrameMap::rax_oop_opr); | |
742 val.load_item(); | |
743 } else if (type == intType) { | |
744 cmp.load_item_force(FrameMap::rax_opr); | |
745 val.load_item(); | |
746 } else if (type == longType) { | |
304 | 747 cmp.load_item_force(FrameMap::long0_opr); |
748 val.load_item_force(FrameMap::long1_opr); | |
0 | 749 } else { |
750 ShouldNotReachHere(); | |
751 } | |
752 | |
1873 | 753 LIR_Opr addr = new_pointer_register(); |
1060 | 754 LIR_Address* a; |
755 if(offset.result()->is_constant()) { | |
6795
7eca5de9e0b6
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
6739
diff
changeset
|
756 #ifdef _LP64 |
7eca5de9e0b6
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
6739
diff
changeset
|
757 jlong c = offset.result()->as_jlong(); |
7eca5de9e0b6
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
6739
diff
changeset
|
758 if ((jlong)((jint)c) == c) { |
7eca5de9e0b6
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
6739
diff
changeset
|
759 a = new LIR_Address(obj.result(), |
7eca5de9e0b6
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
6739
diff
changeset
|
760 (jint)c, |
7eca5de9e0b6
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
6739
diff
changeset
|
761 as_BasicType(type)); |
7eca5de9e0b6
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
6739
diff
changeset
|
762 } else { |
7eca5de9e0b6
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
6739
diff
changeset
|
763 LIR_Opr tmp = new_register(T_LONG); |
7eca5de9e0b6
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
6739
diff
changeset
|
764 __ move(offset.result(), tmp); |
7eca5de9e0b6
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
6739
diff
changeset
|
765 a = new LIR_Address(obj.result(), |
7eca5de9e0b6
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
6739
diff
changeset
|
766 tmp, |
7eca5de9e0b6
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
6739
diff
changeset
|
767 as_BasicType(type)); |
7eca5de9e0b6
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
6739
diff
changeset
|
768 } |
7eca5de9e0b6
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
6739
diff
changeset
|
769 #else |
1060 | 770 a = new LIR_Address(obj.result(), |
6795
7eca5de9e0b6
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
6739
diff
changeset
|
771 offset.result()->as_jint(), |
1060 | 772 as_BasicType(type)); |
6795
7eca5de9e0b6
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
6739
diff
changeset
|
773 #endif |
1060 | 774 } else { |
775 a = new LIR_Address(obj.result(), | |
776 offset.result(), | |
777 LIR_Address::times_1, | |
778 0, | |
779 as_BasicType(type)); | |
780 } | |
781 __ leal(LIR_OprFact::address(a), addr); | |
0 | 782 |
342
37f87013dfd8
6711316: Open source the Garbage-First garbage collector
ysr
parents:
29
diff
changeset
|
783 if (type == objectType) { // Write-barrier needed for Object fields. |
37f87013dfd8
6711316: Open source the Garbage-First garbage collector
ysr
parents:
29
diff
changeset
|
784 // Do the pre-write barrier, if any. |
3249
e1162778c1c8
7009266: G1: assert(obj->is_oop_or_null(true )) failed: Error
johnc
parents:
2169
diff
changeset
|
785 pre_barrier(addr, LIR_OprFact::illegalOpr /* pre_val */, |
e1162778c1c8
7009266: G1: assert(obj->is_oop_or_null(true )) failed: Error
johnc
parents:
2169
diff
changeset
|
786 true /* do_load */, false /* patch */, NULL); |
342
37f87013dfd8
6711316: Open source the Garbage-First garbage collector
ysr
parents:
29
diff
changeset
|
787 } |
0 | 788 |
789 LIR_Opr ill = LIR_OprFact::illegalOpr; // for convenience | |
790 if (type == objectType) | |
791 __ cas_obj(addr, cmp.result(), val.result(), ill, ill); | |
792 else if (type == intType) | |
793 __ cas_int(addr, cmp.result(), val.result(), ill, ill); | |
794 else if (type == longType) | |
795 __ cas_long(addr, cmp.result(), val.result(), ill, ill); | |
796 else { | |
797 ShouldNotReachHere(); | |
798 } | |
799 | |
800 // generate conditional move of boolean result | |
801 LIR_Opr result = rlock_result(x); | |
2089
037c727f35fb
7009231: C1: Incorrect CAS code for longs on SPARC 32bit
iveresov
parents:
2005
diff
changeset
|
802 __ cmove(lir_cond_equal, LIR_OprFact::intConst(1), LIR_OprFact::intConst(0), |
037c727f35fb
7009231: C1: Incorrect CAS code for longs on SPARC 32bit
iveresov
parents:
2005
diff
changeset
|
803 result, as_BasicType(type)); |
0 | 804 if (type == objectType) { // Write-barrier needed for Object fields. |
805 // Seems to be precise | |
806 post_barrier(addr, val.result()); | |
807 } | |
808 } | |
809 | |
810 | |
811 void LIRGenerator::do_MathIntrinsic(Intrinsic* x) { | |
6084
6759698e3140
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
3957
diff
changeset
|
812 assert(x->number_of_arguments() == 1 || (x->number_of_arguments() == 2 && x->id() == vmIntrinsics::_dpow), "wrong type"); |
0 | 813 LIRItem value(x->argument_at(0), this); |
814 | |
815 bool use_fpu = false; | |
816 if (UseSSE >= 2) { | |
817 switch(x->id()) { | |
818 case vmIntrinsics::_dsin: | |
819 case vmIntrinsics::_dcos: | |
820 case vmIntrinsics::_dtan: | |
821 case vmIntrinsics::_dlog: | |
822 case vmIntrinsics::_dlog10: | |
6084
6759698e3140
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
3957
diff
changeset
|
823 case vmIntrinsics::_dexp: |
6759698e3140
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
3957
diff
changeset
|
824 case vmIntrinsics::_dpow: |
0 | 825 use_fpu = true; |
826 } | |
827 } else { | |
828 value.set_destroys_register(); | |
829 } | |
830 | |
831 value.load_item(); | |
832 | |
833 LIR_Opr calc_input = value.result(); | |
6084
6759698e3140
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
3957
diff
changeset
|
834 LIR_Opr calc_input2 = NULL; |
6759698e3140
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
3957
diff
changeset
|
835 if (x->id() == vmIntrinsics::_dpow) { |
6759698e3140
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
3957
diff
changeset
|
836 LIRItem extra_arg(x->argument_at(1), this); |
6759698e3140
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
3957
diff
changeset
|
837 if (UseSSE < 2) { |
6759698e3140
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
3957
diff
changeset
|
838 extra_arg.set_destroys_register(); |
6759698e3140
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
3957
diff
changeset
|
839 } |
6759698e3140
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
3957
diff
changeset
|
840 extra_arg.load_item(); |
6759698e3140
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
3957
diff
changeset
|
841 calc_input2 = extra_arg.result(); |
6759698e3140
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
3957
diff
changeset
|
842 } |
0 | 843 LIR_Opr calc_result = rlock_result(x); |
844 | |
6084
6759698e3140
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
3957
diff
changeset
|
845 // sin, cos, pow and exp need two free fpu stack slots, so register |
6759698e3140
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
3957
diff
changeset
|
846 // two temporary operands |
0 | 847 LIR_Opr tmp1 = FrameMap::caller_save_fpu_reg_at(0); |
848 LIR_Opr tmp2 = FrameMap::caller_save_fpu_reg_at(1); | |
849 | |
850 if (use_fpu) { | |
851 LIR_Opr tmp = FrameMap::fpu0_double_opr; | |
6084
6759698e3140
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
3957
diff
changeset
|
852 int tmp_start = 1; |
6759698e3140
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
3957
diff
changeset
|
853 if (calc_input2 != NULL) { |
6759698e3140
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
3957
diff
changeset
|
854 __ move(calc_input2, tmp); |
6759698e3140
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
3957
diff
changeset
|
855 tmp_start = 2; |
6759698e3140
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
3957
diff
changeset
|
856 calc_input2 = tmp; |
6759698e3140
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
3957
diff
changeset
|
857 } |
0 | 858 __ move(calc_input, tmp); |
859 | |
860 calc_input = tmp; | |
861 calc_result = tmp; | |
6084
6759698e3140
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
3957
diff
changeset
|
862 |
6759698e3140
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
3957
diff
changeset
|
863 tmp1 = FrameMap::caller_save_fpu_reg_at(tmp_start); |
6759698e3140
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
3957
diff
changeset
|
864 tmp2 = FrameMap::caller_save_fpu_reg_at(tmp_start + 1); |
0 | 865 } |
866 | |
867 switch(x->id()) { | |
868 case vmIntrinsics::_dabs: __ abs (calc_input, calc_result, LIR_OprFact::illegalOpr); break; | |
869 case vmIntrinsics::_dsqrt: __ sqrt (calc_input, calc_result, LIR_OprFact::illegalOpr); break; | |
870 case vmIntrinsics::_dsin: __ sin (calc_input, calc_result, tmp1, tmp2); break; | |
871 case vmIntrinsics::_dcos: __ cos (calc_input, calc_result, tmp1, tmp2); break; | |
872 case vmIntrinsics::_dtan: __ tan (calc_input, calc_result, tmp1, tmp2); break; | |
953
ff1a29907b6c
6855215: Calculation error (NaN) after about 1500 calculations
never
parents:
933
diff
changeset
|
873 case vmIntrinsics::_dlog: __ log (calc_input, calc_result, tmp1); break; |
ff1a29907b6c
6855215: Calculation error (NaN) after about 1500 calculations
never
parents:
933
diff
changeset
|
874 case vmIntrinsics::_dlog10: __ log10(calc_input, calc_result, tmp1); break; |
6084
6759698e3140
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
3957
diff
changeset
|
875 case vmIntrinsics::_dexp: __ exp (calc_input, calc_result, tmp1, tmp2, FrameMap::rax_opr, FrameMap::rcx_opr, FrameMap::rdx_opr); break; |
6759698e3140
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
3957
diff
changeset
|
876 case vmIntrinsics::_dpow: __ pow (calc_input, calc_input2, calc_result, tmp1, tmp2, FrameMap::rax_opr, FrameMap::rcx_opr, FrameMap::rdx_opr); break; |
0 | 877 default: ShouldNotReachHere(); |
878 } | |
879 | |
880 if (use_fpu) { | |
881 __ move(calc_result, x->operand()); | |
882 } | |
883 } | |
884 | |
885 | |
886 void LIRGenerator::do_ArrayCopy(Intrinsic* x) { | |
887 assert(x->number_of_arguments() == 5, "wrong type"); | |
2005
0cb042fd2d4b
6875026: CTW failure jdk6_18/hotspot/src/share/vm/c1/c1_LinearScan.cpp:5486
never
parents:
2002
diff
changeset
|
888 |
0cb042fd2d4b
6875026: CTW failure jdk6_18/hotspot/src/share/vm/c1/c1_LinearScan.cpp:5486
never
parents:
2002
diff
changeset
|
889 // Make all state_for calls early since they can emit code |
0cb042fd2d4b
6875026: CTW failure jdk6_18/hotspot/src/share/vm/c1/c1_LinearScan.cpp:5486
never
parents:
2002
diff
changeset
|
890 CodeEmitInfo* info = state_for(x, x->state()); |
0cb042fd2d4b
6875026: CTW failure jdk6_18/hotspot/src/share/vm/c1/c1_LinearScan.cpp:5486
never
parents:
2002
diff
changeset
|
891 |
0 | 892 LIRItem src(x->argument_at(0), this); |
893 LIRItem src_pos(x->argument_at(1), this); | |
894 LIRItem dst(x->argument_at(2), this); | |
895 LIRItem dst_pos(x->argument_at(3), this); | |
896 LIRItem length(x->argument_at(4), this); | |
897 | |
898 // operands for arraycopy must use fixed registers, otherwise | |
899 // LinearScan will fail allocation (because arraycopy always needs a | |
900 // call) | |
304 | 901 |
902 #ifndef _LP64 | |
0 | 903 src.load_item_force (FrameMap::rcx_oop_opr); |
904 src_pos.load_item_force (FrameMap::rdx_opr); | |
905 dst.load_item_force (FrameMap::rax_oop_opr); | |
906 dst_pos.load_item_force (FrameMap::rbx_opr); | |
907 length.load_item_force (FrameMap::rdi_opr); | |
908 LIR_Opr tmp = (FrameMap::rsi_opr); | |
304 | 909 #else |
910 | |
911 // The java calling convention will give us enough registers | |
912 // so that on the stub side the args will be perfect already. | |
913 // On the other slow/special case side we call C and the arg | |
914 // positions are not similar enough to pick one as the best. | |
915 // Also because the java calling convention is a "shifted" version | |
916 // of the C convention we can process the java args trivially into C | |
917 // args without worry of overwriting during the xfer | |
918 | |
919 src.load_item_force (FrameMap::as_oop_opr(j_rarg0)); | |
920 src_pos.load_item_force (FrameMap::as_opr(j_rarg1)); | |
921 dst.load_item_force (FrameMap::as_oop_opr(j_rarg2)); | |
922 dst_pos.load_item_force (FrameMap::as_opr(j_rarg3)); | |
923 length.load_item_force (FrameMap::as_opr(j_rarg4)); | |
924 | |
925 LIR_Opr tmp = FrameMap::as_opr(j_rarg5); | |
926 #endif // LP64 | |
927 | |
0 | 928 set_no_result(x); |
929 | |
930 int flags; | |
931 ciArrayKlass* expected_type; | |
932 arraycopy_helper(x, &flags, &expected_type); | |
933 | |
934 __ arraycopy(src.result(), src_pos.result(), dst.result(), dst_pos.result(), length.result(), tmp, expected_type, flags, info); // does add_safepoint | |
935 } | |
936 | |
937 | |
938 // _i2l, _i2f, _i2d, _l2i, _l2f, _l2d, _f2i, _f2l, _f2d, _d2i, _d2l, _d2f | |
939 // _i2b, _i2c, _i2s | |
940 LIR_Opr fixed_register_for(BasicType type) { | |
941 switch (type) { | |
942 case T_FLOAT: return FrameMap::fpu0_float_opr; | |
943 case T_DOUBLE: return FrameMap::fpu0_double_opr; | |
944 case T_INT: return FrameMap::rax_opr; | |
304 | 945 case T_LONG: return FrameMap::long0_opr; |
0 | 946 default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr; |
947 } | |
948 } | |
949 | |
950 void LIRGenerator::do_Convert(Convert* x) { | |
951 // flags that vary for the different operations and different SSE-settings | |
952 bool fixed_input, fixed_result, round_result, needs_stub; | |
953 | |
954 switch (x->op()) { | |
955 case Bytecodes::_i2l: // fall through | |
956 case Bytecodes::_l2i: // fall through | |
957 case Bytecodes::_i2b: // fall through | |
958 case Bytecodes::_i2c: // fall through | |
959 case Bytecodes::_i2s: fixed_input = false; fixed_result = false; round_result = false; needs_stub = false; break; | |
960 | |
961 case Bytecodes::_f2d: fixed_input = UseSSE == 1; fixed_result = false; round_result = false; needs_stub = false; break; | |
962 case Bytecodes::_d2f: fixed_input = false; fixed_result = UseSSE == 1; round_result = UseSSE < 1; needs_stub = false; break; | |
963 case Bytecodes::_i2f: fixed_input = false; fixed_result = false; round_result = UseSSE < 1; needs_stub = false; break; | |
964 case Bytecodes::_i2d: fixed_input = false; fixed_result = false; round_result = false; needs_stub = false; break; | |
965 case Bytecodes::_f2i: fixed_input = false; fixed_result = false; round_result = false; needs_stub = true; break; | |
966 case Bytecodes::_d2i: fixed_input = false; fixed_result = false; round_result = false; needs_stub = true; break; | |
967 case Bytecodes::_l2f: fixed_input = false; fixed_result = UseSSE >= 1; round_result = UseSSE < 1; needs_stub = false; break; | |
968 case Bytecodes::_l2d: fixed_input = false; fixed_result = UseSSE >= 2; round_result = UseSSE < 2; needs_stub = false; break; | |
969 case Bytecodes::_f2l: fixed_input = true; fixed_result = true; round_result = false; needs_stub = false; break; | |
970 case Bytecodes::_d2l: fixed_input = true; fixed_result = true; round_result = false; needs_stub = false; break; | |
971 default: ShouldNotReachHere(); | |
972 } | |
973 | |
974 LIRItem value(x->value(), this); | |
975 value.load_item(); | |
976 LIR_Opr input = value.result(); | |
977 LIR_Opr result = rlock(x); | |
978 | |
979 // arguments of lir_convert | |
980 LIR_Opr conv_input = input; | |
981 LIR_Opr conv_result = result; | |
982 ConversionStub* stub = NULL; | |
983 | |
984 if (fixed_input) { | |
985 conv_input = fixed_register_for(input->type()); | |
986 __ move(input, conv_input); | |
987 } | |
988 | |
989 assert(fixed_result == false || round_result == false, "cannot set both"); | |
990 if (fixed_result) { | |
991 conv_result = fixed_register_for(result->type()); | |
992 } else if (round_result) { | |
993 result = new_register(result->type()); | |
994 set_vreg_flag(result, must_start_in_memory); | |
995 } | |
996 | |
997 if (needs_stub) { | |
998 stub = new ConversionStub(x->op(), conv_input, conv_result); | |
999 } | |
1000 | |
1001 __ convert(x->op(), conv_input, conv_result, stub); | |
1002 | |
1003 if (result != conv_result) { | |
1004 __ move(conv_result, result); | |
1005 } | |
1006 | |
1007 assert(result->is_virtual(), "result must be virtual register"); | |
1008 set_result(x, result); | |
1009 } | |
1010 | |
1011 | |
1012 void LIRGenerator::do_NewInstance(NewInstance* x) { | |
1819 | 1013 #ifndef PRODUCT |
0 | 1014 if (PrintNotLoaded && !x->klass()->is_loaded()) { |
1819 | 1015 tty->print_cr(" ###class not loaded at new bci %d", x->printable_bci()); |
0 | 1016 } |
1819 | 1017 #endif |
0 | 1018 CodeEmitInfo* info = state_for(x, x->state()); |
1019 LIR_Opr reg = result_register_for(x->type()); | |
1020 new_instance(reg, x->klass(), | |
1021 FrameMap::rcx_oop_opr, | |
1022 FrameMap::rdi_oop_opr, | |
1023 FrameMap::rsi_oop_opr, | |
1024 LIR_OprFact::illegalOpr, | |
6739
8a02ca5e5576
7195816: NPG: Crash in c1_ValueType - ShouldNotReachHere
roland
parents:
6725
diff
changeset
|
1025 FrameMap::rdx_metadata_opr, info); |
0 | 1026 LIR_Opr result = rlock_result(x); |
1027 __ move(reg, result); | |
1028 } | |
1029 | |
1030 | |
1031 void LIRGenerator::do_NewTypeArray(NewTypeArray* x) { | |
1032 CodeEmitInfo* info = state_for(x, x->state()); | |
1033 | |
1034 LIRItem length(x->length(), this); | |
1035 length.load_item_force(FrameMap::rbx_opr); | |
1036 | |
1037 LIR_Opr reg = result_register_for(x->type()); | |
1038 LIR_Opr tmp1 = FrameMap::rcx_oop_opr; | |
1039 LIR_Opr tmp2 = FrameMap::rsi_oop_opr; | |
1040 LIR_Opr tmp3 = FrameMap::rdi_oop_opr; | |
1041 LIR_Opr tmp4 = reg; | |
6739
8a02ca5e5576
7195816: NPG: Crash in c1_ValueType - ShouldNotReachHere
roland
parents:
6725
diff
changeset
|
1042 LIR_Opr klass_reg = FrameMap::rdx_metadata_opr; |
0 | 1043 LIR_Opr len = length.result(); |
1044 BasicType elem_type = x->elt_type(); | |
1045 | |
6739
8a02ca5e5576
7195816: NPG: Crash in c1_ValueType - ShouldNotReachHere
roland
parents:
6725
diff
changeset
|
1046 __ metadata2reg(ciTypeArrayKlass::make(elem_type)->constant_encoding(), klass_reg); |
0 | 1047 |
1048 CodeStub* slow_path = new NewTypeArrayStub(klass_reg, len, reg, info); | |
1049 __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, elem_type, klass_reg, slow_path); | |
1050 | |
1051 LIR_Opr result = rlock_result(x); | |
1052 __ move(reg, result); | |
1053 } | |
1054 | |
1055 | |
1056 void LIRGenerator::do_NewObjectArray(NewObjectArray* x) { | |
1057 LIRItem length(x->length(), this); | |
1058 // in case of patching (i.e., object class is not yet loaded), we need to reexecute the instruction | |
1059 // and therefore provide the state before the parameters have been consumed | |
1060 CodeEmitInfo* patching_info = NULL; | |
1061 if (!x->klass()->is_loaded() || PatchALot) { | |
1062 patching_info = state_for(x, x->state_before()); | |
1063 } | |
1064 | |
1065 CodeEmitInfo* info = state_for(x, x->state()); | |
1066 | |
1067 const LIR_Opr reg = result_register_for(x->type()); | |
1068 LIR_Opr tmp1 = FrameMap::rcx_oop_opr; | |
1069 LIR_Opr tmp2 = FrameMap::rsi_oop_opr; | |
1070 LIR_Opr tmp3 = FrameMap::rdi_oop_opr; | |
1071 LIR_Opr tmp4 = reg; | |
6739
8a02ca5e5576
7195816: NPG: Crash in c1_ValueType - ShouldNotReachHere
roland
parents:
6725
diff
changeset
|
1072 LIR_Opr klass_reg = FrameMap::rdx_metadata_opr; |
0 | 1073 |
1074 length.load_item_force(FrameMap::rbx_opr); | |
1075 LIR_Opr len = length.result(); | |
1076 | |
1077 CodeStub* slow_path = new NewObjectArrayStub(klass_reg, len, reg, info); | |
6725
da91efe96a93
6964458: Reimplement class meta-data storage to use native memory
coleenp
parents:
6145
diff
changeset
|
1078 ciKlass* obj = (ciKlass*) ciObjArrayKlass::make(x->klass()); |
0 | 1079 if (obj == ciEnv::unloaded_ciobjarrayklass()) { |
1080 BAILOUT("encountered unloaded_ciobjarrayklass due to out of memory error"); | |
1081 } | |
6725
da91efe96a93
6964458: Reimplement class meta-data storage to use native memory
coleenp
parents:
6145
diff
changeset
|
1082 klass2reg_with_patching(klass_reg, obj, patching_info); |
0 | 1083 __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, T_OBJECT, klass_reg, slow_path); |
1084 | |
1085 LIR_Opr result = rlock_result(x); | |
1086 __ move(reg, result); | |
1087 } | |
1088 | |
1089 | |
1090 void LIRGenerator::do_NewMultiArray(NewMultiArray* x) { | |
1091 Values* dims = x->dims(); | |
1092 int i = dims->length(); | |
1093 LIRItemList* items = new LIRItemList(dims->length(), NULL); | |
1094 while (i-- > 0) { | |
1095 LIRItem* size = new LIRItem(dims->at(i), this); | |
1096 items->at_put(i, size); | |
1097 } | |
1098 | |
933
cdb8b7c37ac1
6875329: fix for 6795465 broke exception handler cloning
never
parents:
605
diff
changeset
|
1099 // Evaluate state_for early since it may emit code. |
0 | 1100 CodeEmitInfo* patching_info = NULL; |
1101 if (!x->klass()->is_loaded() || PatchALot) { | |
1102 patching_info = state_for(x, x->state_before()); | |
1103 | |
6145
e2fe93124108
7174928: JSR 292: unresolved invokedynamic call sites deopt and osr infinitely
twisti
parents:
6143
diff
changeset
|
1104 // Cannot re-use same xhandlers for multiple CodeEmitInfos, so |
e2fe93124108
7174928: JSR 292: unresolved invokedynamic call sites deopt and osr infinitely
twisti
parents:
6143
diff
changeset
|
1105 // clone all handlers (NOTE: Usually this is handled transparently |
e2fe93124108
7174928: JSR 292: unresolved invokedynamic call sites deopt and osr infinitely
twisti
parents:
6143
diff
changeset
|
1106 // by the CodeEmitInfo cloning logic in CodeStub constructors but |
e2fe93124108
7174928: JSR 292: unresolved invokedynamic call sites deopt and osr infinitely
twisti
parents:
6143
diff
changeset
|
1107 // is done explicitly here because a stub isn't being used). |
0 | 1108 x->set_exception_handlers(new XHandlers(x->exception_handlers())); |
1109 } | |
1110 CodeEmitInfo* info = state_for(x, x->state()); | |
1111 | |
1112 i = dims->length(); | |
1113 while (i-- > 0) { | |
1114 LIRItem* size = items->at(i); | |
1115 size->load_nonconstant(); | |
1116 | |
1117 store_stack_parameter(size->result(), in_ByteSize(i*4)); | |
1118 } | |
1119 | |
6739
8a02ca5e5576
7195816: NPG: Crash in c1_ValueType - ShouldNotReachHere
roland
parents:
6725
diff
changeset
|
1120 LIR_Opr klass_reg = FrameMap::rax_metadata_opr; |
8a02ca5e5576
7195816: NPG: Crash in c1_ValueType - ShouldNotReachHere
roland
parents:
6725
diff
changeset
|
1121 klass2reg_with_patching(klass_reg, x->klass(), patching_info); |
0 | 1122 |
1123 LIR_Opr rank = FrameMap::rbx_opr; | |
1124 __ move(LIR_OprFact::intConst(x->rank()), rank); | |
1125 LIR_Opr varargs = FrameMap::rcx_opr; | |
1126 __ move(FrameMap::rsp_opr, varargs); | |
1127 LIR_OprList* args = new LIR_OprList(3); | |
6739
8a02ca5e5576
7195816: NPG: Crash in c1_ValueType - ShouldNotReachHere
roland
parents:
6725
diff
changeset
|
1128 args->append(klass_reg); |
0 | 1129 args->append(rank); |
1130 args->append(varargs); | |
6739
8a02ca5e5576
7195816: NPG: Crash in c1_ValueType - ShouldNotReachHere
roland
parents:
6725
diff
changeset
|
1131 LIR_Opr reg = result_register_for(x->type()); |
0 | 1132 __ call_runtime(Runtime1::entry_for(Runtime1::new_multi_array_id), |
1133 LIR_OprFact::illegalOpr, | |
1134 reg, args, info); | |
1135 | |
1136 LIR_Opr result = rlock_result(x); | |
1137 __ move(reg, result); | |
1138 } | |
1139 | |
1140 | |
1141 void LIRGenerator::do_BlockBegin(BlockBegin* x) { | |
1142 // nothing to do for now | |
1143 } | |
1144 | |
1145 | |
1146 void LIRGenerator::do_CheckCast(CheckCast* x) { | |
1147 LIRItem obj(x->obj(), this); | |
1148 | |
1149 CodeEmitInfo* patching_info = NULL; | |
1150 if (!x->klass()->is_loaded() || (PatchALot && !x->is_incompatible_class_change_check())) { | |
1151 // must do this before locking the destination register as an oop register, | |
1152 // and before the obj is loaded (the latter is for deoptimization) | |
1153 patching_info = state_for(x, x->state_before()); | |
1154 } | |
1155 obj.load_item(); | |
1156 | |
1157 // info for exceptions | |
1819 | 1158 CodeEmitInfo* info_for_exception = state_for(x); |
0 | 1159 |
1160 CodeStub* stub; | |
1161 if (x->is_incompatible_class_change_check()) { | |
1162 assert(patching_info == NULL, "can't patch this"); | |
1163 stub = new SimpleExceptionStub(Runtime1::throw_incompatible_class_change_error_id, LIR_OprFact::illegalOpr, info_for_exception); | |
1164 } else { | |
1165 stub = new SimpleExceptionStub(Runtime1::throw_class_cast_exception_id, obj.result(), info_for_exception); | |
1166 } | |
1167 LIR_Opr reg = rlock_result(x); | |
2002 | 1168 LIR_Opr tmp3 = LIR_OprFact::illegalOpr; |
6848
8e47bac5643a
7054512: Compress class pointers after perm gen removal
roland
parents:
6795
diff
changeset
|
1169 if (!x->klass()->is_loaded() || UseCompressedKlassPointers) { |
2002 | 1170 tmp3 = new_register(objectType); |
1171 } | |
0 | 1172 __ checkcast(reg, obj.result(), x->klass(), |
2002 | 1173 new_register(objectType), new_register(objectType), tmp3, |
0 | 1174 x->direct_compare(), info_for_exception, patching_info, stub, |
1175 x->profiled_method(), x->profiled_bci()); | |
1176 } | |
1177 | |
1178 | |
1179 void LIRGenerator::do_InstanceOf(InstanceOf* x) { | |
1180 LIRItem obj(x->obj(), this); | |
1181 | |
1182 // result and test object may not be in same register | |
1183 LIR_Opr reg = rlock_result(x); | |
1184 CodeEmitInfo* patching_info = NULL; | |
1185 if ((!x->klass()->is_loaded() || PatchALot)) { | |
1186 // must do this before locking the destination register as an oop register | |
1187 patching_info = state_for(x, x->state_before()); | |
1188 } | |
1189 obj.load_item(); | |
2002 | 1190 LIR_Opr tmp3 = LIR_OprFact::illegalOpr; |
6848
8e47bac5643a
7054512: Compress class pointers after perm gen removal
roland
parents:
6795
diff
changeset
|
1191 if (!x->klass()->is_loaded() || UseCompressedKlassPointers) { |
2002 | 1192 tmp3 = new_register(objectType); |
1193 } | |
0 | 1194 __ instanceof(reg, obj.result(), x->klass(), |
2002 | 1195 new_register(objectType), new_register(objectType), tmp3, |
1791
3a294e483abc
6919069: client compiler needs to capture more profile information for tiered work
iveresov
parents:
1783
diff
changeset
|
1196 x->direct_compare(), patching_info, x->profiled_method(), x->profiled_bci()); |
0 | 1197 } |
1198 | |
1199 | |
1200 void LIRGenerator::do_If(If* x) { | |
1201 assert(x->number_of_sux() == 2, "inconsistency"); | |
1202 ValueTag tag = x->x()->type()->tag(); | |
1203 bool is_safepoint = x->is_safepoint(); | |
1204 | |
1205 If::Condition cond = x->cond(); | |
1206 | |
1207 LIRItem xitem(x->x(), this); | |
1208 LIRItem yitem(x->y(), this); | |
1209 LIRItem* xin = &xitem; | |
1210 LIRItem* yin = &yitem; | |
1211 | |
1212 if (tag == longTag) { | |
1213 // for longs, only conditions "eql", "neq", "lss", "geq" are valid; | |
1214 // mirror for other conditions | |
1215 if (cond == If::gtr || cond == If::leq) { | |
1216 cond = Instruction::mirror(cond); | |
1217 xin = &yitem; | |
1218 yin = &xitem; | |
1219 } | |
1220 xin->set_destroys_register(); | |
1221 } | |
1222 xin->load_item(); | |
1223 if (tag == longTag && yin->is_constant() && yin->get_jlong_constant() == 0 && (cond == If::eql || cond == If::neq)) { | |
1224 // inline long zero | |
1225 yin->dont_load_item(); | |
1226 } else if (tag == longTag || tag == floatTag || tag == doubleTag) { | |
1227 // longs cannot handle constants at right side | |
1228 yin->load_item(); | |
1229 } else { | |
1230 yin->dont_load_item(); | |
1231 } | |
1232 | |
1233 // add safepoint before generating condition code so it can be recomputed | |
1234 if (x->is_safepoint()) { | |
1235 // increment backedge counter if needed | |
1783 | 1236 increment_backedge_counter(state_for(x, x->state_before()), x->profiled_bci()); |
0 | 1237 __ safepoint(LIR_OprFact::illegalOpr, state_for(x, x->state_before())); |
1238 } | |
1239 set_no_result(x); | |
1240 | |
1241 LIR_Opr left = xin->result(); | |
1242 LIR_Opr right = yin->result(); | |
1243 __ cmp(lir_cond(cond), left, right); | |
1783 | 1244 // Generate branch profiling. Profiling code doesn't kill flags. |
0 | 1245 profile_branch(x, cond); |
1246 move_to_phi(x->state()); | |
1247 if (x->x()->type()->is_float_kind()) { | |
1248 __ branch(lir_cond(cond), right->type(), x->tsux(), x->usux()); | |
1249 } else { | |
1250 __ branch(lir_cond(cond), right->type(), x->tsux()); | |
1251 } | |
1252 assert(x->default_sux() == x->fsux(), "wrong destination above"); | |
1253 __ jump(x->default_sux()); | |
1254 } | |
1255 | |
1256 | |
1257 LIR_Opr LIRGenerator::getThreadPointer() { | |
304 | 1258 #ifdef _LP64 |
1259 return FrameMap::as_pointer_opr(r15_thread); | |
1260 #else | |
0 | 1261 LIR_Opr result = new_register(T_INT); |
1262 __ get_thread(result); | |
1263 return result; | |
304 | 1264 #endif // |
0 | 1265 } |
1266 | |
1267 void LIRGenerator::trace_block_entry(BlockBegin* block) { | |
1268 store_stack_parameter(LIR_OprFact::intConst(block->block_id()), in_ByteSize(0)); | |
1269 LIR_OprList* args = new LIR_OprList(); | |
1270 address func = CAST_FROM_FN_PTR(address, Runtime1::trace_block_entry); | |
1271 __ call_runtime_leaf(func, LIR_OprFact::illegalOpr, LIR_OprFact::illegalOpr, args); | |
1272 } | |
1273 | |
1274 | |
1275 void LIRGenerator::volatile_field_store(LIR_Opr value, LIR_Address* address, | |
1276 CodeEmitInfo* info) { | |
1277 if (address->type() == T_LONG) { | |
1278 address = new LIR_Address(address->base(), | |
1279 address->index(), address->scale(), | |
1280 address->disp(), T_DOUBLE); | |
1281 // Transfer the value atomically by using FP moves. This means | |
1282 // the value has to be moved between CPU and FPU registers. It | |
1283 // always has to be moved through spill slot since there's no | |
1284 // quick way to pack the value into an SSE register. | |
1285 LIR_Opr temp_double = new_register(T_DOUBLE); | |
1286 LIR_Opr spill = new_register(T_LONG); | |
1287 set_vreg_flag(spill, must_start_in_memory); | |
1288 __ move(value, spill); | |
1289 __ volatile_move(spill, temp_double, T_LONG); | |
1290 __ volatile_move(temp_double, LIR_OprFact::address(address), T_LONG, info); | |
1291 } else { | |
1292 __ store(value, address, info); | |
1293 } | |
1294 } | |
1295 | |
1296 | |
1297 | |
1298 void LIRGenerator::volatile_field_load(LIR_Address* address, LIR_Opr result, | |
1299 CodeEmitInfo* info) { | |
1300 if (address->type() == T_LONG) { | |
1301 address = new LIR_Address(address->base(), | |
1302 address->index(), address->scale(), | |
1303 address->disp(), T_DOUBLE); | |
1304 // Transfer the value atomically by using FP moves. This means | |
1305 // the value has to be moved between CPU and FPU registers. In | |
1306 // SSE0 and SSE1 mode it has to be moved through spill slot but in | |
1307 // SSE2+ mode it can be moved directly. | |
1308 LIR_Opr temp_double = new_register(T_DOUBLE); | |
1309 __ volatile_move(LIR_OprFact::address(address), temp_double, T_LONG, info); | |
1310 __ volatile_move(temp_double, result, T_LONG); | |
1311 if (UseSSE < 2) { | |
1312 // no spill slot needed in SSE2 mode because xmm->cpu register move is possible | |
1313 set_vreg_flag(result, must_start_in_memory); | |
1314 } | |
1315 } else { | |
1316 __ load(address, result, info); | |
1317 } | |
1318 } | |
1319 | |
1320 void LIRGenerator::get_Object_unsafe(LIR_Opr dst, LIR_Opr src, LIR_Opr offset, | |
1321 BasicType type, bool is_volatile) { | |
1322 if (is_volatile && type == T_LONG) { | |
1323 LIR_Address* addr = new LIR_Address(src, offset, T_DOUBLE); | |
1324 LIR_Opr tmp = new_register(T_DOUBLE); | |
1325 __ load(addr, tmp); | |
1326 LIR_Opr spill = new_register(T_LONG); | |
1327 set_vreg_flag(spill, must_start_in_memory); | |
1328 __ move(tmp, spill); | |
1329 __ move(spill, dst); | |
1330 } else { | |
1331 LIR_Address* addr = new LIR_Address(src, offset, type); | |
1332 __ load(addr, dst); | |
1333 } | |
1334 } | |
1335 | |
1336 | |
1337 void LIRGenerator::put_Object_unsafe(LIR_Opr src, LIR_Opr offset, LIR_Opr data, | |
1338 BasicType type, bool is_volatile) { | |
1339 if (is_volatile && type == T_LONG) { | |
1340 LIR_Address* addr = new LIR_Address(src, offset, T_DOUBLE); | |
1341 LIR_Opr tmp = new_register(T_DOUBLE); | |
1342 LIR_Opr spill = new_register(T_DOUBLE); | |
1343 set_vreg_flag(spill, must_start_in_memory); | |
1344 __ move(data, spill); | |
1345 __ move(spill, tmp); | |
1346 __ move(tmp, addr); | |
1347 } else { | |
1348 LIR_Address* addr = new LIR_Address(src, offset, type); | |
1349 bool is_obj = (type == T_ARRAY || type == T_OBJECT); | |
1350 if (is_obj) { | |
342
37f87013dfd8
6711316: Open source the Garbage-First garbage collector
ysr
parents:
29
diff
changeset
|
1351 // Do the pre-write barrier, if any. |
3249
e1162778c1c8
7009266: G1: assert(obj->is_oop_or_null(true )) failed: Error
johnc
parents:
2169
diff
changeset
|
1352 pre_barrier(LIR_OprFact::address(addr), LIR_OprFact::illegalOpr /* pre_val */, |
e1162778c1c8
7009266: G1: assert(obj->is_oop_or_null(true )) failed: Error
johnc
parents:
2169
diff
changeset
|
1353 true /* do_load */, false /* patch */, NULL); |
0 | 1354 __ move(data, addr); |
1355 assert(src->is_register(), "must be register"); | |
1356 // Seems to be a precise address | |
1357 post_barrier(LIR_OprFact::address(addr), data); | |
1358 } else { | |
1359 __ move(data, addr); | |
1360 } | |
1361 } | |
1362 } | |
6795
7eca5de9e0b6
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
6739
diff
changeset
|
1363 |
7eca5de9e0b6
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
6739
diff
changeset
|
1364 void LIRGenerator::do_UnsafeGetAndSetObject(UnsafeGetAndSetObject* x) { |
7eca5de9e0b6
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
6739
diff
changeset
|
1365 BasicType type = x->basic_type(); |
7eca5de9e0b6
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
6739
diff
changeset
|
1366 LIRItem src(x->object(), this); |
7eca5de9e0b6
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
6739
diff
changeset
|
1367 LIRItem off(x->offset(), this); |
7eca5de9e0b6
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
6739
diff
changeset
|
1368 LIRItem value(x->value(), this); |
7eca5de9e0b6
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
6739
diff
changeset
|
1369 |
7eca5de9e0b6
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
6739
diff
changeset
|
1370 src.load_item(); |
7eca5de9e0b6
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
6739
diff
changeset
|
1371 value.load_item(); |
7eca5de9e0b6
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
6739
diff
changeset
|
1372 off.load_nonconstant(); |
7eca5de9e0b6
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
6739
diff
changeset
|
1373 |
7eca5de9e0b6
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
6739
diff
changeset
|
1374 LIR_Opr dst = rlock_result(x, type); |
7eca5de9e0b6
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
6739
diff
changeset
|
1375 LIR_Opr data = value.result(); |
7eca5de9e0b6
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
6739
diff
changeset
|
1376 bool is_obj = (type == T_ARRAY || type == T_OBJECT); |
7eca5de9e0b6
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
6739
diff
changeset
|
1377 LIR_Opr offset = off.result(); |
7eca5de9e0b6
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
6739
diff
changeset
|
1378 |
7eca5de9e0b6
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
6739
diff
changeset
|
1379 assert (type == T_INT || (!x->is_add() && is_obj) LP64_ONLY( || type == T_LONG ), "unexpected type"); |
7eca5de9e0b6
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
6739
diff
changeset
|
1380 LIR_Address* addr; |
7eca5de9e0b6
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
6739
diff
changeset
|
1381 if (offset->is_constant()) { |
7eca5de9e0b6
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
6739
diff
changeset
|
1382 #ifdef _LP64 |
7eca5de9e0b6
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
6739
diff
changeset
|
1383 jlong c = offset->as_jlong(); |
7eca5de9e0b6
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
6739
diff
changeset
|
1384 if ((jlong)((jint)c) == c) { |
7eca5de9e0b6
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
6739
diff
changeset
|
1385 addr = new LIR_Address(src.result(), (jint)c, type); |
7eca5de9e0b6
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
6739
diff
changeset
|
1386 } else { |
7eca5de9e0b6
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
6739
diff
changeset
|
1387 LIR_Opr tmp = new_register(T_LONG); |
7eca5de9e0b6
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
6739
diff
changeset
|
1388 __ move(offset, tmp); |
7eca5de9e0b6
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
6739
diff
changeset
|
1389 addr = new LIR_Address(src.result(), tmp, type); |
7eca5de9e0b6
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
6739
diff
changeset
|
1390 } |
7eca5de9e0b6
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
6739
diff
changeset
|
1391 #else |
7eca5de9e0b6
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
6739
diff
changeset
|
1392 addr = new LIR_Address(src.result(), offset->as_jint(), type); |
7eca5de9e0b6
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
6739
diff
changeset
|
1393 #endif |
7eca5de9e0b6
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
6739
diff
changeset
|
1394 } else { |
7eca5de9e0b6
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
6739
diff
changeset
|
1395 addr = new LIR_Address(src.result(), offset, type); |
7eca5de9e0b6
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
6739
diff
changeset
|
1396 } |
7eca5de9e0b6
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
6739
diff
changeset
|
1397 |
7eca5de9e0b6
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
6739
diff
changeset
|
1398 if (data != dst) { |
7eca5de9e0b6
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
6739
diff
changeset
|
1399 __ move(data, dst); |
7eca5de9e0b6
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
6739
diff
changeset
|
1400 data = dst; |
7eca5de9e0b6
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
6739
diff
changeset
|
1401 } |
7eca5de9e0b6
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
6739
diff
changeset
|
1402 if (x->is_add()) { |
7eca5de9e0b6
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
6739
diff
changeset
|
1403 __ xadd(LIR_OprFact::address(addr), data, dst, LIR_OprFact::illegalOpr); |
7eca5de9e0b6
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
6739
diff
changeset
|
1404 } else { |
7eca5de9e0b6
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
6739
diff
changeset
|
1405 if (is_obj) { |
7eca5de9e0b6
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
6739
diff
changeset
|
1406 // Do the pre-write barrier, if any. |
7eca5de9e0b6
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
6739
diff
changeset
|
1407 pre_barrier(LIR_OprFact::address(addr), LIR_OprFact::illegalOpr /* pre_val */, |
7eca5de9e0b6
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
6739
diff
changeset
|
1408 true /* do_load */, false /* patch */, NULL); |
7eca5de9e0b6
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
6739
diff
changeset
|
1409 } |
7eca5de9e0b6
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
6739
diff
changeset
|
1410 __ xchg(LIR_OprFact::address(addr), data, dst, LIR_OprFact::illegalOpr); |
7eca5de9e0b6
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
6739
diff
changeset
|
1411 if (is_obj) { |
7eca5de9e0b6
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
6739
diff
changeset
|
1412 // Seems to be a precise address |
7eca5de9e0b6
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
6739
diff
changeset
|
1413 post_barrier(LIR_OprFact::address(addr), data); |
7eca5de9e0b6
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
6739
diff
changeset
|
1414 } |
7eca5de9e0b6
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
6739
diff
changeset
|
1415 } |
7eca5de9e0b6
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
6739
diff
changeset
|
1416 } |