annotate src/share/vm/opto/memnode.hpp @ 3961:a92cdbac8b9e

7081933: Use zeroing elimination optimization for large array Summary: Don't zero new typeArray during runtime call if the allocation is followed by arraycopy into it. Reviewed-by: twisti
author kvn
date Mon, 26 Sep 2011 10:24:05 -0700
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children 1bd45abaa507
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1 /*
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2 * Copyright (c) 1997, 2011, Oracle and/or its affiliates. All rights reserved.
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3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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4 *
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5 * This code is free software; you can redistribute it and/or modify it
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6 * under the terms of the GNU General Public License version 2 only, as
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7 * published by the Free Software Foundation.
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8 *
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9 * This code is distributed in the hope that it will be useful, but WITHOUT
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10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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12 * version 2 for more details (a copy is included in the LICENSE file that
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13 * accompanied this code).
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14 *
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15 * You should have received a copy of the GNU General Public License version
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16 * 2 along with this work; if not, write to the Free Software Foundation,
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17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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18 *
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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20 * or visit www.oracle.com if you need additional information or have any
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21 * questions.
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22 *
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23 */
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24
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25 #ifndef SHARE_VM_OPTO_MEMNODE_HPP
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26 #define SHARE_VM_OPTO_MEMNODE_HPP
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27
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28 #include "opto/multnode.hpp"
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29 #include "opto/node.hpp"
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30 #include "opto/opcodes.hpp"
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31 #include "opto/type.hpp"
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32
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33 // Portions of code courtesy of Clifford Click
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34
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35 class MultiNode;
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36 class PhaseCCP;
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37 class PhaseTransform;
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38
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39 //------------------------------MemNode----------------------------------------
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40 // Load or Store, possibly throwing a NULL pointer exception
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41 class MemNode : public Node {
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42 protected:
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43 #ifdef ASSERT
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44 const TypePtr* _adr_type; // What kind of memory is being addressed?
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45 #endif
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46 virtual uint size_of() const; // Size is bigger (ASSERT only)
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47 public:
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48 enum { Control, // When is it safe to do this load?
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49 Memory, // Chunk of memory is being loaded from
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50 Address, // Actually address, derived from base
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51 ValueIn, // Value to store
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52 OopStore // Preceeding oop store, only in StoreCM
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53 };
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54 protected:
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55 MemNode( Node *c0, Node *c1, Node *c2, const TypePtr* at )
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56 : Node(c0,c1,c2 ) {
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57 init_class_id(Class_Mem);
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58 debug_only(_adr_type=at; adr_type();)
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59 }
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60 MemNode( Node *c0, Node *c1, Node *c2, const TypePtr* at, Node *c3 )
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61 : Node(c0,c1,c2,c3) {
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62 init_class_id(Class_Mem);
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63 debug_only(_adr_type=at; adr_type();)
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64 }
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65 MemNode( Node *c0, Node *c1, Node *c2, const TypePtr* at, Node *c3, Node *c4)
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66 : Node(c0,c1,c2,c3,c4) {
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67 init_class_id(Class_Mem);
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68 debug_only(_adr_type=at; adr_type();)
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69 }
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70
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71 public:
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72 // Helpers for the optimizer. Documented in memnode.cpp.
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73 static bool detect_ptr_independence(Node* p1, AllocateNode* a1,
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74 Node* p2, AllocateNode* a2,
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75 PhaseTransform* phase);
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76 static bool adr_phi_is_loop_invariant(Node* adr_phi, Node* cast);
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77
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78 static Node *optimize_simple_memory_chain(Node *mchain, const TypePtr *t_adr, PhaseGVN *phase);
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79 static Node *optimize_memory_chain(Node *mchain, const TypePtr *t_adr, PhaseGVN *phase);
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80 // This one should probably be a phase-specific function:
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81 static bool all_controls_dominate(Node* dom, Node* sub);
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82
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83 // Find any cast-away of null-ness and keep its control.
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84 static Node *Ideal_common_DU_postCCP( PhaseCCP *ccp, Node* n, Node* adr );
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85 virtual Node *Ideal_DU_postCCP( PhaseCCP *ccp );
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86
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87 virtual const class TypePtr *adr_type() const; // returns bottom_type of address
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88
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89 // Shared code for Ideal methods:
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90 Node *Ideal_common(PhaseGVN *phase, bool can_reshape); // Return -1 for short-circuit NULL.
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91
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92 // Helper function for adr_type() implementations.
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93 static const TypePtr* calculate_adr_type(const Type* t, const TypePtr* cross_check = NULL);
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94
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95 // Raw access function, to allow copying of adr_type efficiently in
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96 // product builds and retain the debug info for debug builds.
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97 const TypePtr *raw_adr_type() const {
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98 #ifdef ASSERT
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99 return _adr_type;
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100 #else
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101 return 0;
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102 #endif
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103 }
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104
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105 // Map a load or store opcode to its corresponding store opcode.
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106 // (Return -1 if unknown.)
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107 virtual int store_Opcode() const { return -1; }
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108
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109 // What is the type of the value in memory? (T_VOID mean "unspecified".)
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110 virtual BasicType memory_type() const = 0;
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111 virtual int memory_size() const {
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112 #ifdef ASSERT
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113 return type2aelembytes(memory_type(), true);
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114 #else
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115 return type2aelembytes(memory_type());
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116 #endif
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117 }
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118
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119 // Search through memory states which precede this node (load or store).
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120 // Look for an exact match for the address, with no intervening
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121 // aliased stores.
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122 Node* find_previous_store(PhaseTransform* phase);
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123
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124 // Can this node (load or store) accurately see a stored value in
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125 // the given memory state? (The state may or may not be in(Memory).)
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126 Node* can_see_stored_value(Node* st, PhaseTransform* phase) const;
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127
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128 #ifndef PRODUCT
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129 static void dump_adr_type(const Node* mem, const TypePtr* adr_type, outputStream *st);
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130 virtual void dump_spec(outputStream *st) const;
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131 #endif
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132 };
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133
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134 //------------------------------LoadNode---------------------------------------
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135 // Load value; requires Memory and Address
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136 class LoadNode : public MemNode {
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137 protected:
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138 virtual uint cmp( const Node &n ) const;
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139 virtual uint size_of() const; // Size is bigger
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140 const Type* const _type; // What kind of value is loaded?
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141 public:
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142
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143 LoadNode( Node *c, Node *mem, Node *adr, const TypePtr* at, const Type *rt )
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144 : MemNode(c,mem,adr,at), _type(rt) {
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145 init_class_id(Class_Load);
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146 }
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147
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148 // Polymorphic factory method:
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149 static Node* make( PhaseGVN& gvn, Node *c, Node *mem, Node *adr,
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150 const TypePtr* at, const Type *rt, BasicType bt );
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151
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152 virtual uint hash() const; // Check the type
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153
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154 // Handle algebraic identities here. If we have an identity, return the Node
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155 // we are equivalent to. We look for Load of a Store.
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156 virtual Node *Identity( PhaseTransform *phase );
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157
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158 // If the load is from Field memory and the pointer is non-null, we can
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159 // zero out the control input.
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160 virtual Node *Ideal(PhaseGVN *phase, bool can_reshape);
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161
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162 // Split instance field load through Phi.
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163 Node* split_through_phi(PhaseGVN *phase);
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164
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165 // Recover original value from boxed values
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166 Node *eliminate_autobox(PhaseGVN *phase);
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167
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168 // Compute a new Type for this node. Basically we just do the pre-check,
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169 // then call the virtual add() to set the type.
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170 virtual const Type *Value( PhaseTransform *phase ) const;
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171
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172 // Common methods for LoadKlass and LoadNKlass nodes.
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173 const Type *klass_value_common( PhaseTransform *phase ) const;
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174 Node *klass_identity_common( PhaseTransform *phase );
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175
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176 virtual uint ideal_reg() const;
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177 virtual const Type *bottom_type() const;
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178 // Following method is copied from TypeNode:
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179 void set_type(const Type* t) {
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180 assert(t != NULL, "sanity");
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181 debug_only(uint check_hash = (VerifyHashTableKeys && _hash_lock) ? hash() : NO_HASH);
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182 *(const Type**)&_type = t; // cast away const-ness
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183 // If this node is in the hash table, make sure it doesn't need a rehash.
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184 assert(check_hash == NO_HASH || check_hash == hash(), "type change must preserve hash code");
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185 }
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186 const Type* type() const { assert(_type != NULL, "sanity"); return _type; };
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187
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188 // Do not match memory edge
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189 virtual uint match_edge(uint idx) const;
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190
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191 // Map a load opcode to its corresponding store opcode.
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192 virtual int store_Opcode() const = 0;
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193
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194 // Check if the load's memory input is a Phi node with the same control.
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195 bool is_instance_field_load_with_local_phi(Node* ctrl);
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196
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197 #ifndef PRODUCT
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198 virtual void dump_spec(outputStream *st) const;
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199 #endif
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200 #ifdef ASSERT
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201 // Helper function to allow a raw load without control edge for some cases
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202 static bool is_immutable_value(Node* adr);
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203 #endif
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204 protected:
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205 const Type* load_array_final_field(const TypeKlassPtr *tkls,
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206 ciKlass* klass) const;
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207 };
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208
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209 //------------------------------LoadBNode--------------------------------------
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210 // Load a byte (8bits signed) from memory
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211 class LoadBNode : public LoadNode {
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212 public:
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213 LoadBNode( Node *c, Node *mem, Node *adr, const TypePtr* at, const TypeInt *ti = TypeInt::BYTE )
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214 : LoadNode(c,mem,adr,at,ti) {}
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215 virtual int Opcode() const;
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216 virtual uint ideal_reg() const { return Op_RegI; }
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217 virtual Node *Ideal(PhaseGVN *phase, bool can_reshape);
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218 virtual int store_Opcode() const { return Op_StoreB; }
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219 virtual BasicType memory_type() const { return T_BYTE; }
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220 };
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221
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222 //------------------------------LoadUBNode-------------------------------------
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223 // Load a unsigned byte (8bits unsigned) from memory
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224 class LoadUBNode : public LoadNode {
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225 public:
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226 LoadUBNode(Node* c, Node* mem, Node* adr, const TypePtr* at, const TypeInt* ti = TypeInt::UBYTE )
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227 : LoadNode(c, mem, adr, at, ti) {}
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228 virtual int Opcode() const;
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229 virtual uint ideal_reg() const { return Op_RegI; }
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230 virtual Node* Ideal(PhaseGVN *phase, bool can_reshape);
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231 virtual int store_Opcode() const { return Op_StoreB; }
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232 virtual BasicType memory_type() const { return T_BYTE; }
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233 };
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234
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235 //------------------------------LoadUSNode-------------------------------------
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236 // Load an unsigned short/char (16bits unsigned) from memory
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237 class LoadUSNode : public LoadNode {
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238 public:
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239 LoadUSNode( Node *c, Node *mem, Node *adr, const TypePtr* at, const TypeInt *ti = TypeInt::CHAR )
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240 : LoadNode(c,mem,adr,at,ti) {}
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241 virtual int Opcode() const;
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242 virtual uint ideal_reg() const { return Op_RegI; }
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243 virtual Node *Ideal(PhaseGVN *phase, bool can_reshape);
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244 virtual int store_Opcode() const { return Op_StoreC; }
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245 virtual BasicType memory_type() const { return T_CHAR; }
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246 };
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247
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248 //------------------------------LoadINode--------------------------------------
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249 // Load an integer from memory
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250 class LoadINode : public LoadNode {
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251 public:
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252 LoadINode( Node *c, Node *mem, Node *adr, const TypePtr* at, const TypeInt *ti = TypeInt::INT )
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253 : LoadNode(c,mem,adr,at,ti) {}
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254 virtual int Opcode() const;
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255 virtual uint ideal_reg() const { return Op_RegI; }
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256 virtual int store_Opcode() const { return Op_StoreI; }
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257 virtual BasicType memory_type() const { return T_INT; }
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258 };
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259
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260 //------------------------------LoadUI2LNode-----------------------------------
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261 // Load an unsigned integer into long from memory
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262 class LoadUI2LNode : public LoadNode {
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263 public:
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264 LoadUI2LNode(Node* c, Node* mem, Node* adr, const TypePtr* at, const TypeLong* t = TypeLong::UINT)
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265 : LoadNode(c, mem, adr, at, t) {}
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266 virtual int Opcode() const;
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267 virtual uint ideal_reg() const { return Op_RegL; }
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268 virtual int store_Opcode() const { return Op_StoreL; }
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269 virtual BasicType memory_type() const { return T_LONG; }
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270 };
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271
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272 //------------------------------LoadRangeNode----------------------------------
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273 // Load an array length from the array
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274 class LoadRangeNode : public LoadINode {
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275 public:
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276 LoadRangeNode( Node *c, Node *mem, Node *adr, const TypeInt *ti = TypeInt::POS )
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277 : LoadINode(c,mem,adr,TypeAryPtr::RANGE,ti) {}
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278 virtual int Opcode() const;
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279 virtual const Type *Value( PhaseTransform *phase ) const;
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280 virtual Node *Identity( PhaseTransform *phase );
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281 virtual Node *Ideal(PhaseGVN *phase, bool can_reshape);
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282 };
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283
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284 //------------------------------LoadLNode--------------------------------------
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285 // Load a long from memory
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286 class LoadLNode : public LoadNode {
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287 virtual uint hash() const { return LoadNode::hash() + _require_atomic_access; }
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288 virtual uint cmp( const Node &n ) const {
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289 return _require_atomic_access == ((LoadLNode&)n)._require_atomic_access
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290 && LoadNode::cmp(n);
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291 }
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292 virtual uint size_of() const { return sizeof(*this); }
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293 const bool _require_atomic_access; // is piecewise load forbidden?
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294
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295 public:
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296 LoadLNode( Node *c, Node *mem, Node *adr, const TypePtr* at,
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297 const TypeLong *tl = TypeLong::LONG,
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298 bool require_atomic_access = false )
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299 : LoadNode(c,mem,adr,at,tl)
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300 , _require_atomic_access(require_atomic_access)
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301 {}
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302 virtual int Opcode() const;
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303 virtual uint ideal_reg() const { return Op_RegL; }
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304 virtual int store_Opcode() const { return Op_StoreL; }
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305 virtual BasicType memory_type() const { return T_LONG; }
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306 bool require_atomic_access() { return _require_atomic_access; }
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307 static LoadLNode* make_atomic(Compile *C, Node* ctl, Node* mem, Node* adr, const TypePtr* adr_type, const Type* rt);
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308 #ifndef PRODUCT
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309 virtual void dump_spec(outputStream *st) const {
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310 LoadNode::dump_spec(st);
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311 if (_require_atomic_access) st->print(" Atomic!");
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312 }
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313 #endif
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314 };
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315
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316 //------------------------------LoadL_unalignedNode----------------------------
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317 // Load a long from unaligned memory
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318 class LoadL_unalignedNode : public LoadLNode {
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319 public:
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320 LoadL_unalignedNode( Node *c, Node *mem, Node *adr, const TypePtr* at )
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321 : LoadLNode(c,mem,adr,at) {}
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322 virtual int Opcode() const;
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323 };
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324
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325 //------------------------------LoadFNode--------------------------------------
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326 // Load a float (64 bits) from memory
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327 class LoadFNode : public LoadNode {
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328 public:
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329 LoadFNode( Node *c, Node *mem, Node *adr, const TypePtr* at, const Type *t = Type::FLOAT )
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330 : LoadNode(c,mem,adr,at,t) {}
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331 virtual int Opcode() const;
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332 virtual uint ideal_reg() const { return Op_RegF; }
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333 virtual int store_Opcode() const { return Op_StoreF; }
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334 virtual BasicType memory_type() const { return T_FLOAT; }
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335 };
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336
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337 //------------------------------LoadDNode--------------------------------------
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338 // Load a double (64 bits) from memory
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339 class LoadDNode : public LoadNode {
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340 public:
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341 LoadDNode( Node *c, Node *mem, Node *adr, const TypePtr* at, const Type *t = Type::DOUBLE )
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342 : LoadNode(c,mem,adr,at,t) {}
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343 virtual int Opcode() const;
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344 virtual uint ideal_reg() const { return Op_RegD; }
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345 virtual int store_Opcode() const { return Op_StoreD; }
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346 virtual BasicType memory_type() const { return T_DOUBLE; }
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347 };
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348
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349 //------------------------------LoadD_unalignedNode----------------------------
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350 // Load a double from unaligned memory
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351 class LoadD_unalignedNode : public LoadDNode {
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352 public:
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353 LoadD_unalignedNode( Node *c, Node *mem, Node *adr, const TypePtr* at )
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354 : LoadDNode(c,mem,adr,at) {}
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355 virtual int Opcode() const;
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356 };
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357
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358 //------------------------------LoadPNode--------------------------------------
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359 // Load a pointer from memory (either object or array)
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360 class LoadPNode : public LoadNode {
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361 public:
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362 LoadPNode( Node *c, Node *mem, Node *adr, const TypePtr *at, const TypePtr* t )
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363 : LoadNode(c,mem,adr,at,t) {}
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364 virtual int Opcode() const;
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365 virtual uint ideal_reg() const { return Op_RegP; }
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366 virtual int store_Opcode() const { return Op_StoreP; }
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367 virtual BasicType memory_type() const { return T_ADDRESS; }
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368 // depends_only_on_test is almost always true, and needs to be almost always
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369 // true to enable key hoisting & commoning optimizations. However, for the
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370 // special case of RawPtr loads from TLS top & end, the control edge carries
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371 // the dependence preventing hoisting past a Safepoint instead of the memory
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372 // edge. (An unfortunate consequence of having Safepoints not set Raw
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373 // Memory; itself an unfortunate consequence of having Nodes which produce
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374 // results (new raw memory state) inside of loops preventing all manner of
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375 // other optimizations). Basically, it's ugly but so is the alternative.
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376 // See comment in macro.cpp, around line 125 expand_allocate_common().
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377 virtual bool depends_only_on_test() const { return adr_type() != TypeRawPtr::BOTTOM; }
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378 };
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379
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380
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381 //------------------------------LoadNNode--------------------------------------
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382 // Load a narrow oop from memory (either object or array)
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383 class LoadNNode : public LoadNode {
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384 public:
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385 LoadNNode( Node *c, Node *mem, Node *adr, const TypePtr *at, const Type* t )
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386 : LoadNode(c,mem,adr,at,t) {}
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387 virtual int Opcode() const;
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388 virtual uint ideal_reg() const { return Op_RegN; }
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389 virtual int store_Opcode() const { return Op_StoreN; }
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390 virtual BasicType memory_type() const { return T_NARROWOOP; }
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391 // depends_only_on_test is almost always true, and needs to be almost always
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392 // true to enable key hoisting & commoning optimizations. However, for the
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393 // special case of RawPtr loads from TLS top & end, the control edge carries
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394 // the dependence preventing hoisting past a Safepoint instead of the memory
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395 // edge. (An unfortunate consequence of having Safepoints not set Raw
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396 // Memory; itself an unfortunate consequence of having Nodes which produce
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397 // results (new raw memory state) inside of loops preventing all manner of
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398 // other optimizations). Basically, it's ugly but so is the alternative.
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399 // See comment in macro.cpp, around line 125 expand_allocate_common().
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400 virtual bool depends_only_on_test() const { return adr_type() != TypeRawPtr::BOTTOM; }
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401 };
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402
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403 //------------------------------LoadKlassNode----------------------------------
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404 // Load a Klass from an object
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405 class LoadKlassNode : public LoadPNode {
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406 public:
164
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407 LoadKlassNode( Node *c, Node *mem, Node *adr, const TypePtr *at, const TypeKlassPtr *tk )
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408 : LoadPNode(c,mem,adr,at,tk) {}
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409 virtual int Opcode() const;
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410 virtual const Type *Value( PhaseTransform *phase ) const;
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411 virtual Node *Identity( PhaseTransform *phase );
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412 virtual bool depends_only_on_test() const { return true; }
164
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413
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414 // Polymorphic factory method:
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415 static Node* make( PhaseGVN& gvn, Node *mem, Node *adr, const TypePtr* at,
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416 const TypeKlassPtr *tk = TypeKlassPtr::OBJECT );
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417 };
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418
164
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419 //------------------------------LoadNKlassNode---------------------------------
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420 // Load a narrow Klass from an object.
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421 class LoadNKlassNode : public LoadNNode {
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422 public:
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423 LoadNKlassNode( Node *c, Node *mem, Node *adr, const TypePtr *at, const TypeNarrowOop *tk )
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424 : LoadNNode(c,mem,adr,at,tk) {}
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425 virtual int Opcode() const;
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426 virtual uint ideal_reg() const { return Op_RegN; }
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427 virtual int store_Opcode() const { return Op_StoreN; }
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428 virtual BasicType memory_type() const { return T_NARROWOOP; }
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429
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430 virtual const Type *Value( PhaseTransform *phase ) const;
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431 virtual Node *Identity( PhaseTransform *phase );
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432 virtual bool depends_only_on_test() const { return true; }
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433 };
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434
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435
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436 //------------------------------LoadSNode--------------------------------------
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437 // Load a short (16bits signed) from memory
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438 class LoadSNode : public LoadNode {
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439 public:
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440 LoadSNode( Node *c, Node *mem, Node *adr, const TypePtr* at, const TypeInt *ti = TypeInt::SHORT )
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441 : LoadNode(c,mem,adr,at,ti) {}
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442 virtual int Opcode() const;
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443 virtual uint ideal_reg() const { return Op_RegI; }
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444 virtual Node *Ideal(PhaseGVN *phase, bool can_reshape);
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445 virtual int store_Opcode() const { return Op_StoreC; }
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446 virtual BasicType memory_type() const { return T_SHORT; }
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447 };
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448
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449 //------------------------------StoreNode--------------------------------------
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450 // Store value; requires Store, Address and Value
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451 class StoreNode : public MemNode {
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452 protected:
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453 virtual uint cmp( const Node &n ) const;
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454 virtual bool depends_only_on_test() const { return false; }
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455
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456 Node *Ideal_masked_input (PhaseGVN *phase, uint mask);
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457 Node *Ideal_sign_extended_input(PhaseGVN *phase, int num_bits);
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458
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459 public:
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460 StoreNode( Node *c, Node *mem, Node *adr, const TypePtr* at, Node *val )
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461 : MemNode(c,mem,adr,at,val) {
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462 init_class_id(Class_Store);
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463 }
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464 StoreNode( Node *c, Node *mem, Node *adr, const TypePtr* at, Node *val, Node *oop_store )
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465 : MemNode(c,mem,adr,at,val,oop_store) {
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466 init_class_id(Class_Store);
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467 }
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468
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469 // Polymorphic factory method:
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470 static StoreNode* make( PhaseGVN& gvn, Node *c, Node *mem, Node *adr,
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471 const TypePtr* at, Node *val, BasicType bt );
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472
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473 virtual uint hash() const; // Check the type
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474
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475 // If the store is to Field memory and the pointer is non-null, we can
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476 // zero out the control input.
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477 virtual Node *Ideal(PhaseGVN *phase, bool can_reshape);
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478
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479 // Compute a new Type for this node. Basically we just do the pre-check,
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480 // then call the virtual add() to set the type.
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481 virtual const Type *Value( PhaseTransform *phase ) const;
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482
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483 // Check for identity function on memory (Load then Store at same address)
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484 virtual Node *Identity( PhaseTransform *phase );
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485
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486 // Do not match memory edge
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487 virtual uint match_edge(uint idx) const;
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488
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489 virtual const Type *bottom_type() const; // returns Type::MEMORY
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490
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491 // Map a store opcode to its corresponding own opcode, trivially.
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492 virtual int store_Opcode() const { return Opcode(); }
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493
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494 // have all possible loads of the value stored been optimized away?
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495 bool value_never_loaded(PhaseTransform *phase) const;
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496 };
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497
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498 //------------------------------StoreBNode-------------------------------------
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499 // Store byte to memory
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500 class StoreBNode : public StoreNode {
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501 public:
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502 StoreBNode( Node *c, Node *mem, Node *adr, const TypePtr* at, Node *val ) : StoreNode(c,mem,adr,at,val) {}
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503 virtual int Opcode() const;
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504 virtual Node *Ideal(PhaseGVN *phase, bool can_reshape);
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505 virtual BasicType memory_type() const { return T_BYTE; }
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506 };
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507
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508 //------------------------------StoreCNode-------------------------------------
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509 // Store char/short to memory
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510 class StoreCNode : public StoreNode {
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511 public:
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512 StoreCNode( Node *c, Node *mem, Node *adr, const TypePtr* at, Node *val ) : StoreNode(c,mem,adr,at,val) {}
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513 virtual int Opcode() const;
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514 virtual Node *Ideal(PhaseGVN *phase, bool can_reshape);
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515 virtual BasicType memory_type() const { return T_CHAR; }
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516 };
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517
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518 //------------------------------StoreINode-------------------------------------
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519 // Store int to memory
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520 class StoreINode : public StoreNode {
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521 public:
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522 StoreINode( Node *c, Node *mem, Node *adr, const TypePtr* at, Node *val ) : StoreNode(c,mem,adr,at,val) {}
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523 virtual int Opcode() const;
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524 virtual BasicType memory_type() const { return T_INT; }
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525 };
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526
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527 //------------------------------StoreLNode-------------------------------------
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528 // Store long to memory
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529 class StoreLNode : public StoreNode {
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530 virtual uint hash() const { return StoreNode::hash() + _require_atomic_access; }
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531 virtual uint cmp( const Node &n ) const {
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532 return _require_atomic_access == ((StoreLNode&)n)._require_atomic_access
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533 && StoreNode::cmp(n);
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534 }
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535 virtual uint size_of() const { return sizeof(*this); }
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536 const bool _require_atomic_access; // is piecewise store forbidden?
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537
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538 public:
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539 StoreLNode( Node *c, Node *mem, Node *adr, const TypePtr* at, Node *val,
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540 bool require_atomic_access = false )
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541 : StoreNode(c,mem,adr,at,val)
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542 , _require_atomic_access(require_atomic_access)
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543 {}
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544 virtual int Opcode() const;
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545 virtual BasicType memory_type() const { return T_LONG; }
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546 bool require_atomic_access() { return _require_atomic_access; }
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547 static StoreLNode* make_atomic(Compile *C, Node* ctl, Node* mem, Node* adr, const TypePtr* adr_type, Node* val);
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548 #ifndef PRODUCT
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549 virtual void dump_spec(outputStream *st) const {
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550 StoreNode::dump_spec(st);
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551 if (_require_atomic_access) st->print(" Atomic!");
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552 }
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553 #endif
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554 };
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555
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556 //------------------------------StoreFNode-------------------------------------
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557 // Store float to memory
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558 class StoreFNode : public StoreNode {
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559 public:
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560 StoreFNode( Node *c, Node *mem, Node *adr, const TypePtr* at, Node *val ) : StoreNode(c,mem,adr,at,val) {}
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561 virtual int Opcode() const;
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562 virtual BasicType memory_type() const { return T_FLOAT; }
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563 };
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564
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565 //------------------------------StoreDNode-------------------------------------
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566 // Store double to memory
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567 class StoreDNode : public StoreNode {
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568 public:
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569 StoreDNode( Node *c, Node *mem, Node *adr, const TypePtr* at, Node *val ) : StoreNode(c,mem,adr,at,val) {}
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570 virtual int Opcode() const;
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571 virtual BasicType memory_type() const { return T_DOUBLE; }
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572 };
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573
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574 //------------------------------StorePNode-------------------------------------
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575 // Store pointer to memory
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576 class StorePNode : public StoreNode {
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577 public:
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578 StorePNode( Node *c, Node *mem, Node *adr, const TypePtr* at, Node *val ) : StoreNode(c,mem,adr,at,val) {}
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579 virtual int Opcode() const;
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580 virtual BasicType memory_type() const { return T_ADDRESS; }
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581 };
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582
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parents: 74
diff changeset
583 //------------------------------StoreNNode-------------------------------------
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 74
diff changeset
584 // Store narrow oop to memory
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 74
diff changeset
585 class StoreNNode : public StoreNode {
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 74
diff changeset
586 public:
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 74
diff changeset
587 StoreNNode( Node *c, Node *mem, Node *adr, const TypePtr* at, Node *val ) : StoreNode(c,mem,adr,at,val) {}
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
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diff changeset
588 virtual int Opcode() const;
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
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diff changeset
589 virtual BasicType memory_type() const { return T_NARROWOOP; }
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 74
diff changeset
590 };
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 74
diff changeset
591
0
a61af66fc99e Initial load
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parents:
diff changeset
592 //------------------------------StoreCMNode-----------------------------------
a61af66fc99e Initial load
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parents:
diff changeset
593 // Store card-mark byte to memory for CM
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parents:
diff changeset
594 // The last StoreCM before a SafePoint must be preserved and occur after its "oop" store
a61af66fc99e Initial load
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parents:
diff changeset
595 // Preceeding equivalent StoreCMs may be eliminated.
a61af66fc99e Initial load
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parents:
diff changeset
596 class StoreCMNode : public StoreNode {
985
685e959d09ea 6877254: Server vm crashes with no branches off of store slice" when run with CMS and UseSuperWord(default)
cfang
parents: 681
diff changeset
597 private:
1198
8d9bfe6a446b 6920346: G1: "must avoid base_memory and AliasIdxTop"
never
parents: 1100
diff changeset
598 virtual uint hash() const { return StoreNode::hash() + _oop_alias_idx; }
8d9bfe6a446b 6920346: G1: "must avoid base_memory and AliasIdxTop"
never
parents: 1100
diff changeset
599 virtual uint cmp( const Node &n ) const {
8d9bfe6a446b 6920346: G1: "must avoid base_memory and AliasIdxTop"
never
parents: 1100
diff changeset
600 return _oop_alias_idx == ((StoreCMNode&)n)._oop_alias_idx
8d9bfe6a446b 6920346: G1: "must avoid base_memory and AliasIdxTop"
never
parents: 1100
diff changeset
601 && StoreNode::cmp(n);
8d9bfe6a446b 6920346: G1: "must avoid base_memory and AliasIdxTop"
never
parents: 1100
diff changeset
602 }
8d9bfe6a446b 6920346: G1: "must avoid base_memory and AliasIdxTop"
never
parents: 1100
diff changeset
603 virtual uint size_of() const { return sizeof(*this); }
985
685e959d09ea 6877254: Server vm crashes with no branches off of store slice" when run with CMS and UseSuperWord(default)
cfang
parents: 681
diff changeset
604 int _oop_alias_idx; // The alias_idx of OopStore
1198
8d9bfe6a446b 6920346: G1: "must avoid base_memory and AliasIdxTop"
never
parents: 1100
diff changeset
605
0
a61af66fc99e Initial load
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parents:
diff changeset
606 public:
1198
8d9bfe6a446b 6920346: G1: "must avoid base_memory and AliasIdxTop"
never
parents: 1100
diff changeset
607 StoreCMNode( Node *c, Node *mem, Node *adr, const TypePtr* at, Node *val, Node *oop_store, int oop_alias_idx ) :
8d9bfe6a446b 6920346: G1: "must avoid base_memory and AliasIdxTop"
never
parents: 1100
diff changeset
608 StoreNode(c,mem,adr,at,val,oop_store),
8d9bfe6a446b 6920346: G1: "must avoid base_memory and AliasIdxTop"
never
parents: 1100
diff changeset
609 _oop_alias_idx(oop_alias_idx) {
8d9bfe6a446b 6920346: G1: "must avoid base_memory and AliasIdxTop"
never
parents: 1100
diff changeset
610 assert(_oop_alias_idx >= Compile::AliasIdxRaw ||
8d9bfe6a446b 6920346: G1: "must avoid base_memory and AliasIdxTop"
never
parents: 1100
diff changeset
611 _oop_alias_idx == Compile::AliasIdxBot && Compile::current()->AliasLevel() == 0,
8d9bfe6a446b 6920346: G1: "must avoid base_memory and AliasIdxTop"
never
parents: 1100
diff changeset
612 "bad oop alias idx");
8d9bfe6a446b 6920346: G1: "must avoid base_memory and AliasIdxTop"
never
parents: 1100
diff changeset
613 }
0
a61af66fc99e Initial load
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diff changeset
614 virtual int Opcode() const;
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diff changeset
615 virtual Node *Identity( PhaseTransform *phase );
985
685e959d09ea 6877254: Server vm crashes with no branches off of store slice" when run with CMS and UseSuperWord(default)
cfang
parents: 681
diff changeset
616 virtual Node *Ideal(PhaseGVN *phase, bool can_reshape);
0
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diff changeset
617 virtual const Type *Value( PhaseTransform *phase ) const;
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diff changeset
618 virtual BasicType memory_type() const { return T_VOID; } // unspecific
985
685e959d09ea 6877254: Server vm crashes with no branches off of store slice" when run with CMS and UseSuperWord(default)
cfang
parents: 681
diff changeset
619 int oop_alias_idx() const { return _oop_alias_idx; }
0
a61af66fc99e Initial load
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diff changeset
620 };
a61af66fc99e Initial load
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parents:
diff changeset
621
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parents:
diff changeset
622 //------------------------------LoadPLockedNode---------------------------------
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parents:
diff changeset
623 // Load-locked a pointer from memory (either object or array).
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parents:
diff changeset
624 // On Sparc & Intel this is implemented as a normal pointer load.
a61af66fc99e Initial load
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parents:
diff changeset
625 // On PowerPC and friends it's a real load-locked.
a61af66fc99e Initial load
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parents:
diff changeset
626 class LoadPLockedNode : public LoadPNode {
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parents:
diff changeset
627 public:
a61af66fc99e Initial load
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parents:
diff changeset
628 LoadPLockedNode( Node *c, Node *mem, Node *adr )
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parents:
diff changeset
629 : LoadPNode(c,mem,adr,TypeRawPtr::BOTTOM, TypeRawPtr::BOTTOM) {}
a61af66fc99e Initial load
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parents:
diff changeset
630 virtual int Opcode() const;
a61af66fc99e Initial load
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parents:
diff changeset
631 virtual int store_Opcode() const { return Op_StorePConditional; }
a61af66fc99e Initial load
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parents:
diff changeset
632 virtual bool depends_only_on_test() const { return true; }
a61af66fc99e Initial load
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parents:
diff changeset
633 };
a61af66fc99e Initial load
duke
parents:
diff changeset
634
a61af66fc99e Initial load
duke
parents:
diff changeset
635 //------------------------------LoadLLockedNode---------------------------------
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parents:
diff changeset
636 // Load-locked a pointer from memory (either object or array).
a61af66fc99e Initial load
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parents:
diff changeset
637 // On Sparc & Intel this is implemented as a normal long load.
a61af66fc99e Initial load
duke
parents:
diff changeset
638 class LoadLLockedNode : public LoadLNode {
a61af66fc99e Initial load
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parents:
diff changeset
639 public:
a61af66fc99e Initial load
duke
parents:
diff changeset
640 LoadLLockedNode( Node *c, Node *mem, Node *adr )
a61af66fc99e Initial load
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parents:
diff changeset
641 : LoadLNode(c,mem,adr,TypeRawPtr::BOTTOM, TypeLong::LONG) {}
a61af66fc99e Initial load
duke
parents:
diff changeset
642 virtual int Opcode() const;
a61af66fc99e Initial load
duke
parents:
diff changeset
643 virtual int store_Opcode() const { return Op_StoreLConditional; }
a61af66fc99e Initial load
duke
parents:
diff changeset
644 };
a61af66fc99e Initial load
duke
parents:
diff changeset
645
a61af66fc99e Initial load
duke
parents:
diff changeset
646 //------------------------------SCMemProjNode---------------------------------------
a61af66fc99e Initial load
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parents:
diff changeset
647 // This class defines a projection of the memory state of a store conditional node.
a61af66fc99e Initial load
duke
parents:
diff changeset
648 // These nodes return a value, but also update memory.
a61af66fc99e Initial load
duke
parents:
diff changeset
649 class SCMemProjNode : public ProjNode {
a61af66fc99e Initial load
duke
parents:
diff changeset
650 public:
a61af66fc99e Initial load
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parents:
diff changeset
651 enum {SCMEMPROJCON = (uint)-2};
a61af66fc99e Initial load
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parents:
diff changeset
652 SCMemProjNode( Node *src) : ProjNode( src, SCMEMPROJCON) { }
a61af66fc99e Initial load
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parents:
diff changeset
653 virtual int Opcode() const;
a61af66fc99e Initial load
duke
parents:
diff changeset
654 virtual bool is_CFG() const { return false; }
a61af66fc99e Initial load
duke
parents:
diff changeset
655 virtual const Type *bottom_type() const {return Type::MEMORY;}
a61af66fc99e Initial load
duke
parents:
diff changeset
656 virtual const TypePtr *adr_type() const { return in(0)->in(MemNode::Memory)->adr_type();}
a61af66fc99e Initial load
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parents:
diff changeset
657 virtual uint ideal_reg() const { return 0;} // memory projections don't have a register
a61af66fc99e Initial load
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parents:
diff changeset
658 virtual const Type *Value( PhaseTransform *phase ) const;
a61af66fc99e Initial load
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parents:
diff changeset
659 #ifndef PRODUCT
a61af66fc99e Initial load
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parents:
diff changeset
660 virtual void dump_spec(outputStream *st) const {};
a61af66fc99e Initial load
duke
parents:
diff changeset
661 #endif
a61af66fc99e Initial load
duke
parents:
diff changeset
662 };
a61af66fc99e Initial load
duke
parents:
diff changeset
663
a61af66fc99e Initial load
duke
parents:
diff changeset
664 //------------------------------LoadStoreNode---------------------------
253
b0fe4deeb9fb 6726999: nsk/stress/jck12a/jck12a010 assert(n != null,"Bad immediate dominator info.")
kvn
parents: 196
diff changeset
665 // Note: is_Mem() method returns 'true' for this class.
0
a61af66fc99e Initial load
duke
parents:
diff changeset
666 class LoadStoreNode : public Node {
a61af66fc99e Initial load
duke
parents:
diff changeset
667 public:
a61af66fc99e Initial load
duke
parents:
diff changeset
668 enum {
a61af66fc99e Initial load
duke
parents:
diff changeset
669 ExpectedIn = MemNode::ValueIn+1 // One more input than MemNode
a61af66fc99e Initial load
duke
parents:
diff changeset
670 };
a61af66fc99e Initial load
duke
parents:
diff changeset
671 LoadStoreNode( Node *c, Node *mem, Node *adr, Node *val, Node *ex);
a61af66fc99e Initial load
duke
parents:
diff changeset
672 virtual bool depends_only_on_test() const { return false; }
a61af66fc99e Initial load
duke
parents:
diff changeset
673 virtual const Type *bottom_type() const { return TypeInt::BOOL; }
a61af66fc99e Initial load
duke
parents:
diff changeset
674 virtual uint ideal_reg() const { return Op_RegI; }
a61af66fc99e Initial load
duke
parents:
diff changeset
675 virtual uint match_edge(uint idx) const { return idx == MemNode::Address || idx == MemNode::ValueIn; }
a61af66fc99e Initial load
duke
parents:
diff changeset
676 };
a61af66fc99e Initial load
duke
parents:
diff changeset
677
a61af66fc99e Initial load
duke
parents:
diff changeset
678 //------------------------------StorePConditionalNode---------------------------
a61af66fc99e Initial load
duke
parents:
diff changeset
679 // Conditionally store pointer to memory, if no change since prior
a61af66fc99e Initial load
duke
parents:
diff changeset
680 // load-locked. Sets flags for success or failure of the store.
a61af66fc99e Initial load
duke
parents:
diff changeset
681 class StorePConditionalNode : public LoadStoreNode {
a61af66fc99e Initial load
duke
parents:
diff changeset
682 public:
a61af66fc99e Initial load
duke
parents:
diff changeset
683 StorePConditionalNode( Node *c, Node *mem, Node *adr, Node *val, Node *ll ) : LoadStoreNode(c, mem, adr, val, ll) { }
a61af66fc99e Initial load
duke
parents:
diff changeset
684 virtual int Opcode() const;
a61af66fc99e Initial load
duke
parents:
diff changeset
685 // Produces flags
a61af66fc99e Initial load
duke
parents:
diff changeset
686 virtual uint ideal_reg() const { return Op_RegFlags; }
a61af66fc99e Initial load
duke
parents:
diff changeset
687 };
a61af66fc99e Initial load
duke
parents:
diff changeset
688
420
a1980da045cc 6462850: generate biased locking code in C2 ideal graph
kvn
parents: 366
diff changeset
689 //------------------------------StoreIConditionalNode---------------------------
a1980da045cc 6462850: generate biased locking code in C2 ideal graph
kvn
parents: 366
diff changeset
690 // Conditionally store int to memory, if no change since prior
a1980da045cc 6462850: generate biased locking code in C2 ideal graph
kvn
parents: 366
diff changeset
691 // load-locked. Sets flags for success or failure of the store.
a1980da045cc 6462850: generate biased locking code in C2 ideal graph
kvn
parents: 366
diff changeset
692 class StoreIConditionalNode : public LoadStoreNode {
a1980da045cc 6462850: generate biased locking code in C2 ideal graph
kvn
parents: 366
diff changeset
693 public:
a1980da045cc 6462850: generate biased locking code in C2 ideal graph
kvn
parents: 366
diff changeset
694 StoreIConditionalNode( Node *c, Node *mem, Node *adr, Node *val, Node *ii ) : LoadStoreNode(c, mem, adr, val, ii) { }
a1980da045cc 6462850: generate biased locking code in C2 ideal graph
kvn
parents: 366
diff changeset
695 virtual int Opcode() const;
a1980da045cc 6462850: generate biased locking code in C2 ideal graph
kvn
parents: 366
diff changeset
696 // Produces flags
a1980da045cc 6462850: generate biased locking code in C2 ideal graph
kvn
parents: 366
diff changeset
697 virtual uint ideal_reg() const { return Op_RegFlags; }
a1980da045cc 6462850: generate biased locking code in C2 ideal graph
kvn
parents: 366
diff changeset
698 };
a1980da045cc 6462850: generate biased locking code in C2 ideal graph
kvn
parents: 366
diff changeset
699
0
a61af66fc99e Initial load
duke
parents:
diff changeset
700 //------------------------------StoreLConditionalNode---------------------------
a61af66fc99e Initial load
duke
parents:
diff changeset
701 // Conditionally store long to memory, if no change since prior
a61af66fc99e Initial load
duke
parents:
diff changeset
702 // load-locked. Sets flags for success or failure of the store.
a61af66fc99e Initial load
duke
parents:
diff changeset
703 class StoreLConditionalNode : public LoadStoreNode {
a61af66fc99e Initial load
duke
parents:
diff changeset
704 public:
a61af66fc99e Initial load
duke
parents:
diff changeset
705 StoreLConditionalNode( Node *c, Node *mem, Node *adr, Node *val, Node *ll ) : LoadStoreNode(c, mem, adr, val, ll) { }
a61af66fc99e Initial load
duke
parents:
diff changeset
706 virtual int Opcode() const;
420
a1980da045cc 6462850: generate biased locking code in C2 ideal graph
kvn
parents: 366
diff changeset
707 // Produces flags
a1980da045cc 6462850: generate biased locking code in C2 ideal graph
kvn
parents: 366
diff changeset
708 virtual uint ideal_reg() const { return Op_RegFlags; }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
709 };
a61af66fc99e Initial load
duke
parents:
diff changeset
710
a61af66fc99e Initial load
duke
parents:
diff changeset
711
a61af66fc99e Initial load
duke
parents:
diff changeset
712 //------------------------------CompareAndSwapLNode---------------------------
a61af66fc99e Initial load
duke
parents:
diff changeset
713 class CompareAndSwapLNode : public LoadStoreNode {
a61af66fc99e Initial load
duke
parents:
diff changeset
714 public:
a61af66fc99e Initial load
duke
parents:
diff changeset
715 CompareAndSwapLNode( Node *c, Node *mem, Node *adr, Node *val, Node *ex) : LoadStoreNode(c, mem, adr, val, ex) { }
a61af66fc99e Initial load
duke
parents:
diff changeset
716 virtual int Opcode() const;
a61af66fc99e Initial load
duke
parents:
diff changeset
717 };
a61af66fc99e Initial load
duke
parents:
diff changeset
718
a61af66fc99e Initial load
duke
parents:
diff changeset
719
a61af66fc99e Initial load
duke
parents:
diff changeset
720 //------------------------------CompareAndSwapINode---------------------------
a61af66fc99e Initial load
duke
parents:
diff changeset
721 class CompareAndSwapINode : public LoadStoreNode {
a61af66fc99e Initial load
duke
parents:
diff changeset
722 public:
a61af66fc99e Initial load
duke
parents:
diff changeset
723 CompareAndSwapINode( Node *c, Node *mem, Node *adr, Node *val, Node *ex) : LoadStoreNode(c, mem, adr, val, ex) { }
a61af66fc99e Initial load
duke
parents:
diff changeset
724 virtual int Opcode() const;
a61af66fc99e Initial load
duke
parents:
diff changeset
725 };
a61af66fc99e Initial load
duke
parents:
diff changeset
726
a61af66fc99e Initial load
duke
parents:
diff changeset
727
a61af66fc99e Initial load
duke
parents:
diff changeset
728 //------------------------------CompareAndSwapPNode---------------------------
a61af66fc99e Initial load
duke
parents:
diff changeset
729 class CompareAndSwapPNode : public LoadStoreNode {
a61af66fc99e Initial load
duke
parents:
diff changeset
730 public:
a61af66fc99e Initial load
duke
parents:
diff changeset
731 CompareAndSwapPNode( Node *c, Node *mem, Node *adr, Node *val, Node *ex) : LoadStoreNode(c, mem, adr, val, ex) { }
a61af66fc99e Initial load
duke
parents:
diff changeset
732 virtual int Opcode() const;
a61af66fc99e Initial load
duke
parents:
diff changeset
733 };
a61af66fc99e Initial load
duke
parents:
diff changeset
734
113
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 74
diff changeset
735 //------------------------------CompareAndSwapNNode---------------------------
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 74
diff changeset
736 class CompareAndSwapNNode : public LoadStoreNode {
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 74
diff changeset
737 public:
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 74
diff changeset
738 CompareAndSwapNNode( Node *c, Node *mem, Node *adr, Node *val, Node *ex) : LoadStoreNode(c, mem, adr, val, ex) { }
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 74
diff changeset
739 virtual int Opcode() const;
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 74
diff changeset
740 };
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 74
diff changeset
741
0
a61af66fc99e Initial load
duke
parents:
diff changeset
742 //------------------------------ClearArray-------------------------------------
a61af66fc99e Initial load
duke
parents:
diff changeset
743 class ClearArrayNode: public Node {
a61af66fc99e Initial load
duke
parents:
diff changeset
744 public:
1100
f96a1a986f7b 6895383: JCK test throws NPE for method compiled with Escape Analysis
kvn
parents: 986
diff changeset
745 ClearArrayNode( Node *ctrl, Node *arymem, Node *word_cnt, Node *base )
f96a1a986f7b 6895383: JCK test throws NPE for method compiled with Escape Analysis
kvn
parents: 986
diff changeset
746 : Node(ctrl,arymem,word_cnt,base) {
f96a1a986f7b 6895383: JCK test throws NPE for method compiled with Escape Analysis
kvn
parents: 986
diff changeset
747 init_class_id(Class_ClearArray);
f96a1a986f7b 6895383: JCK test throws NPE for method compiled with Escape Analysis
kvn
parents: 986
diff changeset
748 }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
749 virtual int Opcode() const;
a61af66fc99e Initial load
duke
parents:
diff changeset
750 virtual const Type *bottom_type() const { return Type::MEMORY; }
a61af66fc99e Initial load
duke
parents:
diff changeset
751 // ClearArray modifies array elements, and so affects only the
a61af66fc99e Initial load
duke
parents:
diff changeset
752 // array memory addressed by the bottom_type of its base address.
a61af66fc99e Initial load
duke
parents:
diff changeset
753 virtual const class TypePtr *adr_type() const;
a61af66fc99e Initial load
duke
parents:
diff changeset
754 virtual Node *Identity( PhaseTransform *phase );
a61af66fc99e Initial load
duke
parents:
diff changeset
755 virtual Node *Ideal(PhaseGVN *phase, bool can_reshape);
a61af66fc99e Initial load
duke
parents:
diff changeset
756 virtual uint match_edge(uint idx) const;
a61af66fc99e Initial load
duke
parents:
diff changeset
757
a61af66fc99e Initial load
duke
parents:
diff changeset
758 // Clear the given area of an object or array.
a61af66fc99e Initial load
duke
parents:
diff changeset
759 // The start offset must always be aligned mod BytesPerInt.
a61af66fc99e Initial load
duke
parents:
diff changeset
760 // The end offset must always be aligned mod BytesPerLong.
a61af66fc99e Initial load
duke
parents:
diff changeset
761 // Return the new memory.
a61af66fc99e Initial load
duke
parents:
diff changeset
762 static Node* clear_memory(Node* control, Node* mem, Node* dest,
a61af66fc99e Initial load
duke
parents:
diff changeset
763 intptr_t start_offset,
a61af66fc99e Initial load
duke
parents:
diff changeset
764 intptr_t end_offset,
a61af66fc99e Initial load
duke
parents:
diff changeset
765 PhaseGVN* phase);
a61af66fc99e Initial load
duke
parents:
diff changeset
766 static Node* clear_memory(Node* control, Node* mem, Node* dest,
a61af66fc99e Initial load
duke
parents:
diff changeset
767 intptr_t start_offset,
a61af66fc99e Initial load
duke
parents:
diff changeset
768 Node* end_offset,
a61af66fc99e Initial load
duke
parents:
diff changeset
769 PhaseGVN* phase);
a61af66fc99e Initial load
duke
parents:
diff changeset
770 static Node* clear_memory(Node* control, Node* mem, Node* dest,
a61af66fc99e Initial load
duke
parents:
diff changeset
771 Node* start_offset,
a61af66fc99e Initial load
duke
parents:
diff changeset
772 Node* end_offset,
a61af66fc99e Initial load
duke
parents:
diff changeset
773 PhaseGVN* phase);
1100
f96a1a986f7b 6895383: JCK test throws NPE for method compiled with Escape Analysis
kvn
parents: 986
diff changeset
774 // Return allocation input memory edge if it is different instance
f96a1a986f7b 6895383: JCK test throws NPE for method compiled with Escape Analysis
kvn
parents: 986
diff changeset
775 // or itself if it is the one we are looking for.
f96a1a986f7b 6895383: JCK test throws NPE for method compiled with Escape Analysis
kvn
parents: 986
diff changeset
776 static bool step_through(Node** np, uint instance_id, PhaseTransform* phase);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
777 };
a61af66fc99e Initial load
duke
parents:
diff changeset
778
2412
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
779 //------------------------------StrIntrinsic-------------------------------
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
780 // Base class for Ideal nodes used in String instrinsic code.
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
781 class StrIntrinsicNode: public Node {
0
a61af66fc99e Initial load
duke
parents:
diff changeset
782 public:
2412
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
783 StrIntrinsicNode(Node* control, Node* char_array_mem,
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
784 Node* s1, Node* c1, Node* s2, Node* c2):
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
785 Node(control, char_array_mem, s1, c1, s2, c2) {
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
786 }
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
787
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
788 StrIntrinsicNode(Node* control, Node* char_array_mem,
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
789 Node* s1, Node* s2, Node* c):
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
790 Node(control, char_array_mem, s1, s2, c) {
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
791 }
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
792
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
793 StrIntrinsicNode(Node* control, Node* char_array_mem,
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
794 Node* s1, Node* s2):
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
795 Node(control, char_array_mem, s1, s2) {
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
796 }
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
797
0
a61af66fc99e Initial load
duke
parents:
diff changeset
798 virtual bool depends_only_on_test() const { return false; }
986
62001a362ce9 6827605: new String intrinsics may prevent EA scalar replacement
kvn
parents: 985
diff changeset
799 virtual const TypePtr* adr_type() const { return TypeAryPtr::CHARS; }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
800 virtual uint match_edge(uint idx) const;
a61af66fc99e Initial load
duke
parents:
diff changeset
801 virtual uint ideal_reg() const { return Op_RegI; }
a61af66fc99e Initial load
duke
parents:
diff changeset
802 virtual Node *Ideal(PhaseGVN *phase, bool can_reshape);
a61af66fc99e Initial load
duke
parents:
diff changeset
803 };
a61af66fc99e Initial load
duke
parents:
diff changeset
804
2412
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
805 //------------------------------StrComp-------------------------------------
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
806 class StrCompNode: public StrIntrinsicNode {
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
807 public:
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
808 StrCompNode(Node* control, Node* char_array_mem,
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
809 Node* s1, Node* c1, Node* s2, Node* c2):
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
810 StrIntrinsicNode(control, char_array_mem, s1, c1, s2, c2) {};
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
811 virtual int Opcode() const;
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
812 virtual const Type* bottom_type() const { return TypeInt::INT; }
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
813 };
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
814
681
fbde8ec322d0 6761600: Use sse 4.2 in intrinsics
cfang
parents: 628
diff changeset
815 //------------------------------StrEquals-------------------------------------
2412
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
816 class StrEqualsNode: public StrIntrinsicNode {
681
fbde8ec322d0 6761600: Use sse 4.2 in intrinsics
cfang
parents: 628
diff changeset
817 public:
986
62001a362ce9 6827605: new String intrinsics may prevent EA scalar replacement
kvn
parents: 985
diff changeset
818 StrEqualsNode(Node* control, Node* char_array_mem,
2412
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
819 Node* s1, Node* s2, Node* c):
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
820 StrIntrinsicNode(control, char_array_mem, s1, s2, c) {};
681
fbde8ec322d0 6761600: Use sse 4.2 in intrinsics
cfang
parents: 628
diff changeset
821 virtual int Opcode() const;
fbde8ec322d0 6761600: Use sse 4.2 in intrinsics
cfang
parents: 628
diff changeset
822 virtual const Type* bottom_type() const { return TypeInt::BOOL; }
fbde8ec322d0 6761600: Use sse 4.2 in intrinsics
cfang
parents: 628
diff changeset
823 };
fbde8ec322d0 6761600: Use sse 4.2 in intrinsics
cfang
parents: 628
diff changeset
824
fbde8ec322d0 6761600: Use sse 4.2 in intrinsics
cfang
parents: 628
diff changeset
825 //------------------------------StrIndexOf-------------------------------------
2412
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
826 class StrIndexOfNode: public StrIntrinsicNode {
681
fbde8ec322d0 6761600: Use sse 4.2 in intrinsics
cfang
parents: 628
diff changeset
827 public:
986
62001a362ce9 6827605: new String intrinsics may prevent EA scalar replacement
kvn
parents: 985
diff changeset
828 StrIndexOfNode(Node* control, Node* char_array_mem,
2412
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
829 Node* s1, Node* c1, Node* s2, Node* c2):
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
830 StrIntrinsicNode(control, char_array_mem, s1, c1, s2, c2) {};
681
fbde8ec322d0 6761600: Use sse 4.2 in intrinsics
cfang
parents: 628
diff changeset
831 virtual int Opcode() const;
fbde8ec322d0 6761600: Use sse 4.2 in intrinsics
cfang
parents: 628
diff changeset
832 virtual const Type* bottom_type() const { return TypeInt::INT; }
fbde8ec322d0 6761600: Use sse 4.2 in intrinsics
cfang
parents: 628
diff changeset
833 };
fbde8ec322d0 6761600: Use sse 4.2 in intrinsics
cfang
parents: 628
diff changeset
834
169
9148c65abefc 6695049: (coll) Create an x86 intrinsic for Arrays.equals
rasbold
parents: 164
diff changeset
835 //------------------------------AryEq---------------------------------------
2412
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
836 class AryEqNode: public StrIntrinsicNode {
169
9148c65abefc 6695049: (coll) Create an x86 intrinsic for Arrays.equals
rasbold
parents: 164
diff changeset
837 public:
2412
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
838 AryEqNode(Node* control, Node* char_array_mem, Node* s1, Node* s2):
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
839 StrIntrinsicNode(control, char_array_mem, s1, s2) {};
169
9148c65abefc 6695049: (coll) Create an x86 intrinsic for Arrays.equals
rasbold
parents: 164
diff changeset
840 virtual int Opcode() const;
9148c65abefc 6695049: (coll) Create an x86 intrinsic for Arrays.equals
rasbold
parents: 164
diff changeset
841 virtual const Type* bottom_type() const { return TypeInt::BOOL; }
9148c65abefc 6695049: (coll) Create an x86 intrinsic for Arrays.equals
rasbold
parents: 164
diff changeset
842 };
9148c65abefc 6695049: (coll) Create an x86 intrinsic for Arrays.equals
rasbold
parents: 164
diff changeset
843
0
a61af66fc99e Initial load
duke
parents:
diff changeset
844 //------------------------------MemBar-----------------------------------------
a61af66fc99e Initial load
duke
parents:
diff changeset
845 // There are different flavors of Memory Barriers to match the Java Memory
a61af66fc99e Initial load
duke
parents:
diff changeset
846 // Model. Monitor-enter and volatile-load act as Aquires: no following ref
a61af66fc99e Initial load
duke
parents:
diff changeset
847 // can be moved to before them. We insert a MemBar-Acquire after a FastLock or
a61af66fc99e Initial load
duke
parents:
diff changeset
848 // volatile-load. Monitor-exit and volatile-store act as Release: no
605
98cb887364d3 6810672: Comment typos
twisti
parents: 558
diff changeset
849 // preceding ref can be moved to after them. We insert a MemBar-Release
0
a61af66fc99e Initial load
duke
parents:
diff changeset
850 // before a FastUnlock or volatile-store. All volatiles need to be
a61af66fc99e Initial load
duke
parents:
diff changeset
851 // serialized, so we follow all volatile-stores with a MemBar-Volatile to
605
98cb887364d3 6810672: Comment typos
twisti
parents: 558
diff changeset
852 // separate it from any following volatile-load.
0
a61af66fc99e Initial load
duke
parents:
diff changeset
853 class MemBarNode: public MultiNode {
a61af66fc99e Initial load
duke
parents:
diff changeset
854 virtual uint hash() const ; // { return NO_HASH; }
a61af66fc99e Initial load
duke
parents:
diff changeset
855 virtual uint cmp( const Node &n ) const ; // Always fail, except on self
a61af66fc99e Initial load
duke
parents:
diff changeset
856
a61af66fc99e Initial load
duke
parents:
diff changeset
857 virtual uint size_of() const { return sizeof(*this); }
a61af66fc99e Initial load
duke
parents:
diff changeset
858 // Memory type this node is serializing. Usually either rawptr or bottom.
a61af66fc99e Initial load
duke
parents:
diff changeset
859 const TypePtr* _adr_type;
a61af66fc99e Initial load
duke
parents:
diff changeset
860
a61af66fc99e Initial load
duke
parents:
diff changeset
861 public:
a61af66fc99e Initial load
duke
parents:
diff changeset
862 enum {
a61af66fc99e Initial load
duke
parents:
diff changeset
863 Precedent = TypeFunc::Parms // optional edge to force precedence
a61af66fc99e Initial load
duke
parents:
diff changeset
864 };
a61af66fc99e Initial load
duke
parents:
diff changeset
865 MemBarNode(Compile* C, int alias_idx, Node* precedent);
a61af66fc99e Initial load
duke
parents:
diff changeset
866 virtual int Opcode() const = 0;
a61af66fc99e Initial load
duke
parents:
diff changeset
867 virtual const class TypePtr *adr_type() const { return _adr_type; }
a61af66fc99e Initial load
duke
parents:
diff changeset
868 virtual const Type *Value( PhaseTransform *phase ) const;
a61af66fc99e Initial load
duke
parents:
diff changeset
869 virtual Node *Ideal(PhaseGVN *phase, bool can_reshape);
a61af66fc99e Initial load
duke
parents:
diff changeset
870 virtual uint match_edge(uint idx) const { return 0; }
a61af66fc99e Initial load
duke
parents:
diff changeset
871 virtual const Type *bottom_type() const { return TypeTuple::MEMBAR; }
a61af66fc99e Initial load
duke
parents:
diff changeset
872 virtual Node *match( const ProjNode *proj, const Matcher *m );
a61af66fc99e Initial load
duke
parents:
diff changeset
873 // Factory method. Builds a wide or narrow membar.
a61af66fc99e Initial load
duke
parents:
diff changeset
874 // Optional 'precedent' becomes an extra edge if not null.
a61af66fc99e Initial load
duke
parents:
diff changeset
875 static MemBarNode* make(Compile* C, int opcode,
a61af66fc99e Initial load
duke
parents:
diff changeset
876 int alias_idx = Compile::AliasIdxBot,
a61af66fc99e Initial load
duke
parents:
diff changeset
877 Node* precedent = NULL);
a61af66fc99e Initial load
duke
parents:
diff changeset
878 };
a61af66fc99e Initial load
duke
parents:
diff changeset
879
a61af66fc99e Initial load
duke
parents:
diff changeset
880 // "Acquire" - no following ref can move before (but earlier refs can
a61af66fc99e Initial load
duke
parents:
diff changeset
881 // follow, like an early Load stalled in cache). Requires multi-cpu
3849
f1c12354c3f7 7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents: 2426
diff changeset
882 // visibility. Inserted after a volatile load.
0
a61af66fc99e Initial load
duke
parents:
diff changeset
883 class MemBarAcquireNode: public MemBarNode {
a61af66fc99e Initial load
duke
parents:
diff changeset
884 public:
a61af66fc99e Initial load
duke
parents:
diff changeset
885 MemBarAcquireNode(Compile* C, int alias_idx, Node* precedent)
a61af66fc99e Initial load
duke
parents:
diff changeset
886 : MemBarNode(C, alias_idx, precedent) {}
a61af66fc99e Initial load
duke
parents:
diff changeset
887 virtual int Opcode() const;
a61af66fc99e Initial load
duke
parents:
diff changeset
888 };
a61af66fc99e Initial load
duke
parents:
diff changeset
889
a61af66fc99e Initial load
duke
parents:
diff changeset
890 // "Release" - no earlier ref can move after (but later refs can move
a61af66fc99e Initial load
duke
parents:
diff changeset
891 // up, like a speculative pipelined cache-hitting Load). Requires
3849
f1c12354c3f7 7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents: 2426
diff changeset
892 // multi-cpu visibility. Inserted before a volatile store.
0
a61af66fc99e Initial load
duke
parents:
diff changeset
893 class MemBarReleaseNode: public MemBarNode {
a61af66fc99e Initial load
duke
parents:
diff changeset
894 public:
a61af66fc99e Initial load
duke
parents:
diff changeset
895 MemBarReleaseNode(Compile* C, int alias_idx, Node* precedent)
a61af66fc99e Initial load
duke
parents:
diff changeset
896 : MemBarNode(C, alias_idx, precedent) {}
a61af66fc99e Initial load
duke
parents:
diff changeset
897 virtual int Opcode() const;
a61af66fc99e Initial load
duke
parents:
diff changeset
898 };
a61af66fc99e Initial load
duke
parents:
diff changeset
899
3849
f1c12354c3f7 7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents: 2426
diff changeset
900 // "Acquire" - no following ref can move before (but earlier refs can
f1c12354c3f7 7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents: 2426
diff changeset
901 // follow, like an early Load stalled in cache). Requires multi-cpu
f1c12354c3f7 7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents: 2426
diff changeset
902 // visibility. Inserted after a FastLock.
f1c12354c3f7 7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents: 2426
diff changeset
903 class MemBarAcquireLockNode: public MemBarNode {
f1c12354c3f7 7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents: 2426
diff changeset
904 public:
f1c12354c3f7 7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents: 2426
diff changeset
905 MemBarAcquireLockNode(Compile* C, int alias_idx, Node* precedent)
f1c12354c3f7 7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents: 2426
diff changeset
906 : MemBarNode(C, alias_idx, precedent) {}
f1c12354c3f7 7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents: 2426
diff changeset
907 virtual int Opcode() const;
f1c12354c3f7 7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents: 2426
diff changeset
908 };
f1c12354c3f7 7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents: 2426
diff changeset
909
f1c12354c3f7 7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents: 2426
diff changeset
910 // "Release" - no earlier ref can move after (but later refs can move
f1c12354c3f7 7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents: 2426
diff changeset
911 // up, like a speculative pipelined cache-hitting Load). Requires
f1c12354c3f7 7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents: 2426
diff changeset
912 // multi-cpu visibility. Inserted before a FastUnLock.
f1c12354c3f7 7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents: 2426
diff changeset
913 class MemBarReleaseLockNode: public MemBarNode {
f1c12354c3f7 7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents: 2426
diff changeset
914 public:
f1c12354c3f7 7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents: 2426
diff changeset
915 MemBarReleaseLockNode(Compile* C, int alias_idx, Node* precedent)
f1c12354c3f7 7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents: 2426
diff changeset
916 : MemBarNode(C, alias_idx, precedent) {}
f1c12354c3f7 7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents: 2426
diff changeset
917 virtual int Opcode() const;
f1c12354c3f7 7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents: 2426
diff changeset
918 };
f1c12354c3f7 7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents: 2426
diff changeset
919
0
a61af66fc99e Initial load
duke
parents:
diff changeset
920 // Ordering between a volatile store and a following volatile load.
a61af66fc99e Initial load
duke
parents:
diff changeset
921 // Requires multi-CPU visibility?
a61af66fc99e Initial load
duke
parents:
diff changeset
922 class MemBarVolatileNode: public MemBarNode {
a61af66fc99e Initial load
duke
parents:
diff changeset
923 public:
a61af66fc99e Initial load
duke
parents:
diff changeset
924 MemBarVolatileNode(Compile* C, int alias_idx, Node* precedent)
a61af66fc99e Initial load
duke
parents:
diff changeset
925 : MemBarNode(C, alias_idx, precedent) {}
a61af66fc99e Initial load
duke
parents:
diff changeset
926 virtual int Opcode() const;
a61af66fc99e Initial load
duke
parents:
diff changeset
927 };
a61af66fc99e Initial load
duke
parents:
diff changeset
928
a61af66fc99e Initial load
duke
parents:
diff changeset
929 // Ordering within the same CPU. Used to order unsafe memory references
a61af66fc99e Initial load
duke
parents:
diff changeset
930 // inside the compiler when we lack alias info. Not needed "outside" the
a61af66fc99e Initial load
duke
parents:
diff changeset
931 // compiler because the CPU does all the ordering for us.
a61af66fc99e Initial load
duke
parents:
diff changeset
932 class MemBarCPUOrderNode: public MemBarNode {
a61af66fc99e Initial load
duke
parents:
diff changeset
933 public:
a61af66fc99e Initial load
duke
parents:
diff changeset
934 MemBarCPUOrderNode(Compile* C, int alias_idx, Node* precedent)
a61af66fc99e Initial load
duke
parents:
diff changeset
935 : MemBarNode(C, alias_idx, precedent) {}
a61af66fc99e Initial load
duke
parents:
diff changeset
936 virtual int Opcode() const;
a61af66fc99e Initial load
duke
parents:
diff changeset
937 virtual uint ideal_reg() const { return 0; } // not matched in the AD file
a61af66fc99e Initial load
duke
parents:
diff changeset
938 };
a61af66fc99e Initial load
duke
parents:
diff changeset
939
a61af66fc99e Initial load
duke
parents:
diff changeset
940 // Isolation of object setup after an AllocateNode and before next safepoint.
a61af66fc99e Initial load
duke
parents:
diff changeset
941 // (See comment in memnode.cpp near InitializeNode::InitializeNode for semantics.)
a61af66fc99e Initial load
duke
parents:
diff changeset
942 class InitializeNode: public MemBarNode {
a61af66fc99e Initial load
duke
parents:
diff changeset
943 friend class AllocateNode;
a61af66fc99e Initial load
duke
parents:
diff changeset
944
3961
a92cdbac8b9e 7081933: Use zeroing elimination optimization for large array
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diff changeset
945 enum {
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diff changeset
946 Incomplete = 0,
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diff changeset
947 Complete = 1,
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diff changeset
948 WithArraycopy = 2
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diff changeset
949 };
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diff changeset
950 int _is_complete;
0
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diff changeset
951
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diff changeset
952 public:
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diff changeset
953 enum {
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diff changeset
954 Control = TypeFunc::Control,
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diff changeset
955 Memory = TypeFunc::Memory, // MergeMem for states affected by this op
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diff changeset
956 RawAddress = TypeFunc::Parms+0, // the newly-allocated raw address
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parents:
diff changeset
957 RawStores = TypeFunc::Parms+1 // zero or more stores (or TOP)
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diff changeset
958 };
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diff changeset
959
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diff changeset
960 InitializeNode(Compile* C, int adr_type, Node* rawoop);
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parents:
diff changeset
961 virtual int Opcode() const;
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diff changeset
962 virtual uint size_of() const { return sizeof(*this); }
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diff changeset
963 virtual uint ideal_reg() const { return 0; } // not matched in the AD file
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diff changeset
964 virtual const RegMask &in_RegMask(uint) const; // mask for RawAddress
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diff changeset
965
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parents:
diff changeset
966 // Manage incoming memory edges via a MergeMem on in(Memory):
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diff changeset
967 Node* memory(uint alias_idx);
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diff changeset
968
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diff changeset
969 // The raw memory edge coming directly from the Allocation.
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parents:
diff changeset
970 // The contents of this memory are *always* all-zero-bits.
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diff changeset
971 Node* zero_memory() { return memory(Compile::AliasIdxRaw); }
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diff changeset
972
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diff changeset
973 // Return the corresponding allocation for this initialization (or null if none).
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diff changeset
974 // (Note: Both InitializeNode::allocation and AllocateNode::initialization
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parents:
diff changeset
975 // are defined in graphKit.cpp, which sets up the bidirectional relation.)
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diff changeset
976 AllocateNode* allocation();
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diff changeset
977
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parents:
diff changeset
978 // Anything other than zeroing in this init?
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diff changeset
979 bool is_non_zero();
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diff changeset
980
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parents:
diff changeset
981 // An InitializeNode must completed before macro expansion is done.
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diff changeset
982 // Completion requires that the AllocateNode must be followed by
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diff changeset
983 // initialization of the new memory to zero, then to any initializers.
3961
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diff changeset
984 bool is_complete() { return _is_complete != Incomplete; }
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diff changeset
985 bool is_complete_with_arraycopy() { return (_is_complete & WithArraycopy) != 0; }
0
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986
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diff changeset
987 // Mark complete. (Must not yet be complete.)
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988 void set_complete(PhaseGVN* phase);
3961
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diff changeset
989 void set_complete_with_arraycopy() { _is_complete = Complete | WithArraycopy; }
0
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990
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991 #ifdef ASSERT
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diff changeset
992 // ensure all non-degenerate stores are ordered and non-overlapping
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993 bool stores_are_sane(PhaseTransform* phase);
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994 #endif //ASSERT
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995
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diff changeset
996 // See if this store can be captured; return offset where it initializes.
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diff changeset
997 // Return 0 if the store cannot be moved (any sort of problem).
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diff changeset
998 intptr_t can_capture_store(StoreNode* st, PhaseTransform* phase);
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diff changeset
999
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diff changeset
1000 // Capture another store; reformat it to write my internal raw memory.
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parents:
diff changeset
1001 // Return the captured copy, else NULL if there is some sort of problem.
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diff changeset
1002 Node* capture_store(StoreNode* st, intptr_t start, PhaseTransform* phase);
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parents:
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1003
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parents:
diff changeset
1004 // Find captured store which corresponds to the range [start..start+size).
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parents:
diff changeset
1005 // Return my own memory projection (meaning the initial zero bits)
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parents:
diff changeset
1006 // if there is no such store. Return NULL if there is a problem.
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diff changeset
1007 Node* find_captured_store(intptr_t start, int size_in_bytes, PhaseTransform* phase);
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parents:
diff changeset
1008
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parents:
diff changeset
1009 // Called when the associated AllocateNode is expanded into CFG.
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parents:
diff changeset
1010 Node* complete_stores(Node* rawctl, Node* rawmem, Node* rawptr,
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parents:
diff changeset
1011 intptr_t header_size, Node* size_in_bytes,
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diff changeset
1012 PhaseGVN* phase);
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1013
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1014 private:
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1015 void remove_extra_zeroes();
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parents:
diff changeset
1016
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parents:
diff changeset
1017 // Find out where a captured store should be placed (or already is placed).
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parents:
diff changeset
1018 int captured_store_insertion_point(intptr_t start, int size_in_bytes,
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parents:
diff changeset
1019 PhaseTransform* phase);
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parents:
diff changeset
1020
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diff changeset
1021 static intptr_t get_store_offset(Node* st, PhaseTransform* phase);
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1022
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diff changeset
1023 Node* make_raw_address(intptr_t offset, PhaseTransform* phase);
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parents:
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1024
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parents:
diff changeset
1025 bool detect_init_independence(Node* n, bool st_is_pinned, int& count);
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parents:
diff changeset
1026
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parents:
diff changeset
1027 void coalesce_subword_stores(intptr_t header_size, Node* size_in_bytes,
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parents:
diff changeset
1028 PhaseGVN* phase);
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parents:
diff changeset
1029
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parents:
diff changeset
1030 intptr_t find_next_fullword_store(uint i, PhaseGVN* phase);
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parents:
diff changeset
1031 };
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parents:
diff changeset
1032
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parents:
diff changeset
1033 //------------------------------MergeMem---------------------------------------
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parents:
diff changeset
1034 // (See comment in memnode.cpp near MergeMemNode::MergeMemNode for semantics.)
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parents:
diff changeset
1035 class MergeMemNode: public Node {
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parents:
diff changeset
1036 virtual uint hash() const ; // { return NO_HASH; }
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parents:
diff changeset
1037 virtual uint cmp( const Node &n ) const ; // Always fail, except on self
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parents:
diff changeset
1038 friend class MergeMemStream;
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parents:
diff changeset
1039 MergeMemNode(Node* def); // clients use MergeMemNode::make
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1040
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diff changeset
1041 public:
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parents:
diff changeset
1042 // If the input is a whole memory state, clone it with all its slices intact.
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parents:
diff changeset
1043 // Otherwise, make a new memory state with just that base memory input.
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parents:
diff changeset
1044 // In either case, the result is a newly created MergeMem.
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diff changeset
1045 static MergeMemNode* make(Compile* C, Node* base_memory);
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1046
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1047 virtual int Opcode() const;
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parents:
diff changeset
1048 virtual Node *Identity( PhaseTransform *phase );
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diff changeset
1049 virtual Node *Ideal(PhaseGVN *phase, bool can_reshape);
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diff changeset
1050 virtual uint ideal_reg() const { return NotAMachineReg; }
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parents:
diff changeset
1051 virtual uint match_edge(uint idx) const { return 0; }
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diff changeset
1052 virtual const RegMask &out_RegMask() const;
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parents:
diff changeset
1053 virtual const Type *bottom_type() const { return Type::MEMORY; }
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diff changeset
1054 virtual const TypePtr *adr_type() const { return TypePtr::BOTTOM; }
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diff changeset
1055 // sparse accessors
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diff changeset
1056 // Fetch the previously stored "set_memory_at", or else the base memory.
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parents:
diff changeset
1057 // (Caller should clone it if it is a phi-nest.)
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diff changeset
1058 Node* memory_at(uint alias_idx) const;
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parents:
diff changeset
1059 // set the memory, regardless of its previous value
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parents:
diff changeset
1060 void set_memory_at(uint alias_idx, Node* n);
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parents:
diff changeset
1061 // the "base" is the memory that provides the non-finite support
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diff changeset
1062 Node* base_memory() const { return in(Compile::AliasIdxBot); }
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parents:
diff changeset
1063 // warning: setting the base can implicitly set any of the other slices too
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diff changeset
1064 void set_base_memory(Node* def);
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parents:
diff changeset
1065 // sentinel value which denotes a copy of the base memory:
a61af66fc99e Initial load
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parents:
diff changeset
1066 Node* empty_memory() const { return in(Compile::AliasIdxTop); }
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parents:
diff changeset
1067 static Node* make_empty_memory(); // where the sentinel comes from
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diff changeset
1068 bool is_empty_memory(Node* n) const { assert((n == empty_memory()) == n->is_top(), "sanity"); return n->is_top(); }
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parents:
diff changeset
1069 // hook for the iterator, to perform any necessary setup
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parents:
diff changeset
1070 void iteration_setup(const MergeMemNode* other = NULL);
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parents:
diff changeset
1071 // push sentinels until I am at least as long as the other (semantic no-op)
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parents:
diff changeset
1072 void grow_to_match(const MergeMemNode* other);
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parents:
diff changeset
1073 bool verify_sparse() const PRODUCT_RETURN0;
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parents:
diff changeset
1074 #ifndef PRODUCT
a61af66fc99e Initial load
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parents:
diff changeset
1075 virtual void dump_spec(outputStream *st) const;
a61af66fc99e Initial load
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parents:
diff changeset
1076 #endif
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parents:
diff changeset
1077 };
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parents:
diff changeset
1078
a61af66fc99e Initial load
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parents:
diff changeset
1079 class MergeMemStream : public StackObj {
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parents:
diff changeset
1080 private:
a61af66fc99e Initial load
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parents:
diff changeset
1081 MergeMemNode* _mm;
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parents:
diff changeset
1082 const MergeMemNode* _mm2; // optional second guy, contributes non-empty iterations
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parents:
diff changeset
1083 Node* _mm_base; // loop-invariant base memory of _mm
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parents:
diff changeset
1084 int _idx;
a61af66fc99e Initial load
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parents:
diff changeset
1085 int _cnt;
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parents:
diff changeset
1086 Node* _mem;
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parents:
diff changeset
1087 Node* _mem2;
a61af66fc99e Initial load
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parents:
diff changeset
1088 int _cnt2;
a61af66fc99e Initial load
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parents:
diff changeset
1089
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parents:
diff changeset
1090 void init(MergeMemNode* mm, const MergeMemNode* mm2 = NULL) {
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parents:
diff changeset
1091 // subsume_node will break sparseness at times, whenever a memory slice
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parents:
diff changeset
1092 // folds down to a copy of the base ("fat") memory. In such a case,
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parents:
diff changeset
1093 // the raw edge will update to base, although it should be top.
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parents:
diff changeset
1094 // This iterator will recognize either top or base_memory as an
a61af66fc99e Initial load
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parents:
diff changeset
1095 // "empty" slice. See is_empty, is_empty2, and next below.
a61af66fc99e Initial load
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parents:
diff changeset
1096 //
a61af66fc99e Initial load
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parents:
diff changeset
1097 // The sparseness property is repaired in MergeMemNode::Ideal.
a61af66fc99e Initial load
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parents:
diff changeset
1098 // As long as access to a MergeMem goes through this iterator
a61af66fc99e Initial load
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parents:
diff changeset
1099 // or the memory_at accessor, flaws in the sparseness will
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parents:
diff changeset
1100 // never be observed.
a61af66fc99e Initial load
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parents:
diff changeset
1101 //
a61af66fc99e Initial load
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parents:
diff changeset
1102 // Also, iteration_setup repairs sparseness.
a61af66fc99e Initial load
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parents:
diff changeset
1103 assert(mm->verify_sparse(), "please, no dups of base");
a61af66fc99e Initial load
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parents:
diff changeset
1104 assert(mm2==NULL || mm2->verify_sparse(), "please, no dups of base");
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parents:
diff changeset
1105
a61af66fc99e Initial load
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parents:
diff changeset
1106 _mm = mm;
a61af66fc99e Initial load
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parents:
diff changeset
1107 _mm_base = mm->base_memory();
a61af66fc99e Initial load
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parents:
diff changeset
1108 _mm2 = mm2;
a61af66fc99e Initial load
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parents:
diff changeset
1109 _cnt = mm->req();
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parents:
diff changeset
1110 _idx = Compile::AliasIdxBot-1; // start at the base memory
a61af66fc99e Initial load
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parents:
diff changeset
1111 _mem = NULL;
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parents:
diff changeset
1112 _mem2 = NULL;
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parents:
diff changeset
1113 }
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parents:
diff changeset
1114
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parents:
diff changeset
1115 #ifdef ASSERT
a61af66fc99e Initial load
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parents:
diff changeset
1116 Node* check_memory() const {
a61af66fc99e Initial load
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parents:
diff changeset
1117 if (at_base_memory())
a61af66fc99e Initial load
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parents:
diff changeset
1118 return _mm->base_memory();
a61af66fc99e Initial load
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parents:
diff changeset
1119 else if ((uint)_idx < _mm->req() && !_mm->in(_idx)->is_top())
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parents:
diff changeset
1120 return _mm->memory_at(_idx);
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parents:
diff changeset
1121 else
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parents:
diff changeset
1122 return _mm_base;
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parents:
diff changeset
1123 }
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parents:
diff changeset
1124 Node* check_memory2() const {
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parents:
diff changeset
1125 return at_base_memory()? _mm2->base_memory(): _mm2->memory_at(_idx);
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parents:
diff changeset
1126 }
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parents:
diff changeset
1127 #endif
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parents:
diff changeset
1128
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parents:
diff changeset
1129 static bool match_memory(Node* mem, const MergeMemNode* mm, int idx) PRODUCT_RETURN0;
a61af66fc99e Initial load
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parents:
diff changeset
1130 void assert_synch() const {
a61af66fc99e Initial load
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parents:
diff changeset
1131 assert(!_mem || _idx >= _cnt || match_memory(_mem, _mm, _idx),
a61af66fc99e Initial load
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parents:
diff changeset
1132 "no side-effects except through the stream");
a61af66fc99e Initial load
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parents:
diff changeset
1133 }
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parents:
diff changeset
1134
a61af66fc99e Initial load
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parents:
diff changeset
1135 public:
a61af66fc99e Initial load
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parents:
diff changeset
1136
a61af66fc99e Initial load
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parents:
diff changeset
1137 // expected usages:
a61af66fc99e Initial load
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parents:
diff changeset
1138 // for (MergeMemStream mms(mem->is_MergeMem()); next_non_empty(); ) { ... }
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parents:
diff changeset
1139 // for (MergeMemStream mms(mem1, mem2); next_non_empty2(); ) { ... }
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parents:
diff changeset
1140
a61af66fc99e Initial load
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parents:
diff changeset
1141 // iterate over one merge
a61af66fc99e Initial load
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parents:
diff changeset
1142 MergeMemStream(MergeMemNode* mm) {
a61af66fc99e Initial load
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parents:
diff changeset
1143 mm->iteration_setup();
a61af66fc99e Initial load
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parents:
diff changeset
1144 init(mm);
a61af66fc99e Initial load
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parents:
diff changeset
1145 debug_only(_cnt2 = 999);
a61af66fc99e Initial load
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parents:
diff changeset
1146 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1147 // iterate in parallel over two merges
a61af66fc99e Initial load
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parents:
diff changeset
1148 // only iterates through non-empty elements of mm2
a61af66fc99e Initial load
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parents:
diff changeset
1149 MergeMemStream(MergeMemNode* mm, const MergeMemNode* mm2) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1150 assert(mm2, "second argument must be a MergeMem also");
a61af66fc99e Initial load
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parents:
diff changeset
1151 ((MergeMemNode*)mm2)->iteration_setup(); // update hidden state
a61af66fc99e Initial load
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parents:
diff changeset
1152 mm->iteration_setup(mm2);
a61af66fc99e Initial load
duke
parents:
diff changeset
1153 init(mm, mm2);
a61af66fc99e Initial load
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parents:
diff changeset
1154 _cnt2 = mm2->req();
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parents:
diff changeset
1155 }
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parents:
diff changeset
1156 #ifdef ASSERT
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parents:
diff changeset
1157 ~MergeMemStream() {
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parents:
diff changeset
1158 assert_synch();
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parents:
diff changeset
1159 }
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parents:
diff changeset
1160 #endif
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parents:
diff changeset
1161
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parents:
diff changeset
1162 MergeMemNode* all_memory() const {
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parents:
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1163 return _mm;
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parents:
diff changeset
1164 }
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parents:
diff changeset
1165 Node* base_memory() const {
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parents:
diff changeset
1166 assert(_mm_base == _mm->base_memory(), "no update to base memory, please");
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parents:
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1167 return _mm_base;
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parents:
diff changeset
1168 }
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parents:
diff changeset
1169 const MergeMemNode* all_memory2() const {
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parents:
diff changeset
1170 assert(_mm2 != NULL, "");
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parents:
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1171 return _mm2;
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parents:
diff changeset
1172 }
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parents:
diff changeset
1173 bool at_base_memory() const {
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parents:
diff changeset
1174 return _idx == Compile::AliasIdxBot;
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parents:
diff changeset
1175 }
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parents:
diff changeset
1176 int alias_idx() const {
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parents:
diff changeset
1177 assert(_mem, "must call next 1st");
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parents:
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1178 return _idx;
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parents:
diff changeset
1179 }
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parents:
diff changeset
1180
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parents:
diff changeset
1181 const TypePtr* adr_type() const {
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parents:
diff changeset
1182 return Compile::current()->get_adr_type(alias_idx());
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parents:
diff changeset
1183 }
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parents:
diff changeset
1184
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parents:
diff changeset
1185 const TypePtr* adr_type(Compile* C) const {
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parents:
diff changeset
1186 return C->get_adr_type(alias_idx());
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parents:
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1187 }
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parents:
diff changeset
1188 bool is_empty() const {
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parents:
diff changeset
1189 assert(_mem, "must call next 1st");
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parents:
diff changeset
1190 assert(_mem->is_top() == (_mem==_mm->empty_memory()), "correct sentinel");
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parents:
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1191 return _mem->is_top();
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parents:
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1192 }
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parents:
diff changeset
1193 bool is_empty2() const {
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parents:
diff changeset
1194 assert(_mem2, "must call next 1st");
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parents:
diff changeset
1195 assert(_mem2->is_top() == (_mem2==_mm2->empty_memory()), "correct sentinel");
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parents:
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1196 return _mem2->is_top();
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parents:
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1197 }
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parents:
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1198 Node* memory() const {
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parents:
diff changeset
1199 assert(!is_empty(), "must not be empty");
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parents:
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1200 assert_synch();
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parents:
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1201 return _mem;
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parents:
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1202 }
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parents:
diff changeset
1203 // get the current memory, regardless of empty or non-empty status
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parents:
diff changeset
1204 Node* force_memory() const {
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parents:
diff changeset
1205 assert(!is_empty() || !at_base_memory(), "");
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parents:
diff changeset
1206 // Use _mm_base to defend against updates to _mem->base_memory().
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parents:
diff changeset
1207 Node *mem = _mem->is_top() ? _mm_base : _mem;
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parents:
diff changeset
1208 assert(mem == check_memory(), "");
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parents:
diff changeset
1209 return mem;
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parents:
diff changeset
1210 }
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parents:
diff changeset
1211 Node* memory2() const {
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parents:
diff changeset
1212 assert(_mem2 == check_memory2(), "");
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parents:
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1213 return _mem2;
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parents:
diff changeset
1214 }
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parents:
diff changeset
1215 void set_memory(Node* mem) {
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parents:
diff changeset
1216 if (at_base_memory()) {
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parents:
diff changeset
1217 // Note that this does not change the invariant _mm_base.
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parents:
diff changeset
1218 _mm->set_base_memory(mem);
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parents:
diff changeset
1219 } else {
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parents:
diff changeset
1220 _mm->set_memory_at(_idx, mem);
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parents:
diff changeset
1221 }
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parents:
diff changeset
1222 _mem = mem;
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parents:
diff changeset
1223 assert_synch();
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parents:
diff changeset
1224 }
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parents:
diff changeset
1225
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parents:
diff changeset
1226 // Recover from a side effect to the MergeMemNode.
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parents:
diff changeset
1227 void set_memory() {
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parents:
diff changeset
1228 _mem = _mm->in(_idx);
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parents:
diff changeset
1229 }
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parents:
diff changeset
1230
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parents:
diff changeset
1231 bool next() { return next(false); }
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parents:
diff changeset
1232 bool next2() { return next(true); }
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parents:
diff changeset
1233
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parents:
diff changeset
1234 bool next_non_empty() { return next_non_empty(false); }
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parents:
diff changeset
1235 bool next_non_empty2() { return next_non_empty(true); }
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parents:
diff changeset
1236 // next_non_empty2 can yield states where is_empty() is true
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parents:
diff changeset
1237
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parents:
diff changeset
1238 private:
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parents:
diff changeset
1239 // find the next item, which might be empty
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parents:
diff changeset
1240 bool next(bool have_mm2) {
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parents:
diff changeset
1241 assert((_mm2 != NULL) == have_mm2, "use other next");
a61af66fc99e Initial load
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parents:
diff changeset
1242 assert_synch();
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parents:
diff changeset
1243 if (++_idx < _cnt) {
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parents:
diff changeset
1244 // Note: This iterator allows _mm to be non-sparse.
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parents:
diff changeset
1245 // It behaves the same whether _mem is top or base_memory.
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parents:
diff changeset
1246 _mem = _mm->in(_idx);
a61af66fc99e Initial load
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parents:
diff changeset
1247 if (have_mm2)
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parents:
diff changeset
1248 _mem2 = _mm2->in((_idx < _cnt2) ? _idx : Compile::AliasIdxTop);
a61af66fc99e Initial load
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parents:
diff changeset
1249 return true;
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parents:
diff changeset
1250 }
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parents:
diff changeset
1251 return false;
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parents:
diff changeset
1252 }
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parents:
diff changeset
1253
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parents:
diff changeset
1254 // find the next non-empty item
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parents:
diff changeset
1255 bool next_non_empty(bool have_mm2) {
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parents:
diff changeset
1256 while (next(have_mm2)) {
a61af66fc99e Initial load
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parents:
diff changeset
1257 if (!is_empty()) {
a61af66fc99e Initial load
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parents:
diff changeset
1258 // make sure _mem2 is filled in sensibly
a61af66fc99e Initial load
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parents:
diff changeset
1259 if (have_mm2 && _mem2->is_top()) _mem2 = _mm2->base_memory();
a61af66fc99e Initial load
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parents:
diff changeset
1260 return true;
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parents:
diff changeset
1261 } else if (have_mm2 && !is_empty2()) {
a61af66fc99e Initial load
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parents:
diff changeset
1262 return true; // is_empty() == true
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parents:
diff changeset
1263 }
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parents:
diff changeset
1264 }
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parents:
diff changeset
1265 return false;
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parents:
diff changeset
1266 }
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parents:
diff changeset
1267 };
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parents:
diff changeset
1268
a61af66fc99e Initial load
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parents:
diff changeset
1269 //------------------------------Prefetch---------------------------------------
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parents:
diff changeset
1270
a61af66fc99e Initial load
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parents:
diff changeset
1271 // Non-faulting prefetch load. Prefetch for many reads.
a61af66fc99e Initial load
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parents:
diff changeset
1272 class PrefetchReadNode : public Node {
a61af66fc99e Initial load
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parents:
diff changeset
1273 public:
a61af66fc99e Initial load
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parents:
diff changeset
1274 PrefetchReadNode(Node *abio, Node *adr) : Node(0,abio,adr) {}
a61af66fc99e Initial load
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parents:
diff changeset
1275 virtual int Opcode() const;
a61af66fc99e Initial load
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parents:
diff changeset
1276 virtual uint ideal_reg() const { return NotAMachineReg; }
a61af66fc99e Initial load
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parents:
diff changeset
1277 virtual uint match_edge(uint idx) const { return idx==2; }
a61af66fc99e Initial load
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parents:
diff changeset
1278 virtual const Type *bottom_type() const { return Type::ABIO; }
a61af66fc99e Initial load
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parents:
diff changeset
1279 };
a61af66fc99e Initial load
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parents:
diff changeset
1280
a61af66fc99e Initial load
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parents:
diff changeset
1281 // Non-faulting prefetch load. Prefetch for many reads & many writes.
a61af66fc99e Initial load
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parents:
diff changeset
1282 class PrefetchWriteNode : public Node {
a61af66fc99e Initial load
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parents:
diff changeset
1283 public:
a61af66fc99e Initial load
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parents:
diff changeset
1284 PrefetchWriteNode(Node *abio, Node *adr) : Node(0,abio,adr) {}
a61af66fc99e Initial load
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parents:
diff changeset
1285 virtual int Opcode() const;
a61af66fc99e Initial load
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parents:
diff changeset
1286 virtual uint ideal_reg() const { return NotAMachineReg; }
a61af66fc99e Initial load
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parents:
diff changeset
1287 virtual uint match_edge(uint idx) const { return idx==2; }
3854
1af104d6cf99 7079329: Adjust allocation prefetching for T4
kvn
parents: 3849
diff changeset
1288 virtual const Type *bottom_type() const { return Type::ABIO; }
1af104d6cf99 7079329: Adjust allocation prefetching for T4
kvn
parents: 3849
diff changeset
1289 };
1af104d6cf99 7079329: Adjust allocation prefetching for T4
kvn
parents: 3849
diff changeset
1290
1af104d6cf99 7079329: Adjust allocation prefetching for T4
kvn
parents: 3849
diff changeset
1291 // Allocation prefetch which may fault, TLAB size have to be adjusted.
1af104d6cf99 7079329: Adjust allocation prefetching for T4
kvn
parents: 3849
diff changeset
1292 class PrefetchAllocationNode : public Node {
1af104d6cf99 7079329: Adjust allocation prefetching for T4
kvn
parents: 3849
diff changeset
1293 public:
1af104d6cf99 7079329: Adjust allocation prefetching for T4
kvn
parents: 3849
diff changeset
1294 PrefetchAllocationNode(Node *mem, Node *adr) : Node(0,mem,adr) {}
1af104d6cf99 7079329: Adjust allocation prefetching for T4
kvn
parents: 3849
diff changeset
1295 virtual int Opcode() const;
1af104d6cf99 7079329: Adjust allocation prefetching for T4
kvn
parents: 3849
diff changeset
1296 virtual uint ideal_reg() const { return NotAMachineReg; }
1af104d6cf99 7079329: Adjust allocation prefetching for T4
kvn
parents: 3849
diff changeset
1297 virtual uint match_edge(uint idx) const { return idx==2; }
1367
9e321dcfa5b7 6940726: Use BIS instruction for allocation prefetch on Sparc
kvn
parents: 1198
diff changeset
1298 virtual const Type *bottom_type() const { return ( AllocatePrefetchStyle == 3 ) ? Type::MEMORY : Type::ABIO; }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1299 };
1972
f95d63e2154a 6989984: Use standard include model for Hospot
stefank
parents: 1609
diff changeset
1300
f95d63e2154a 6989984: Use standard include model for Hospot
stefank
parents: 1609
diff changeset
1301 #endif // SHARE_VM_OPTO_MEMNODE_HPP