annotate src/share/vm/opto/memnode.hpp @ 10278:6f3fd5150b67

6934604: enable parts of EliminateAutoBox by default Summary: Resurrected autobox elimination code and enabled part of it by default. Reviewed-by: roland, twisti
author kvn
date Wed, 08 May 2013 15:08:01 -0700
parents 6931f425c517
children 94a83e0f9ce1 2113136690bc
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1 /*
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2 * Copyright (c) 1997, 2012, Oracle and/or its affiliates. All rights reserved.
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3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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4 *
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5 * This code is free software; you can redistribute it and/or modify it
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6 * under the terms of the GNU General Public License version 2 only, as
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7 * published by the Free Software Foundation.
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8 *
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9 * This code is distributed in the hope that it will be useful, but WITHOUT
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10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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12 * version 2 for more details (a copy is included in the LICENSE file that
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13 * accompanied this code).
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14 *
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15 * You should have received a copy of the GNU General Public License version
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16 * 2 along with this work; if not, write to the Free Software Foundation,
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17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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18 *
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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20 * or visit www.oracle.com if you need additional information or have any
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21 * questions.
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22 *
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23 */
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24
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25 #ifndef SHARE_VM_OPTO_MEMNODE_HPP
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26 #define SHARE_VM_OPTO_MEMNODE_HPP
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27
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28 #include "opto/multnode.hpp"
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29 #include "opto/node.hpp"
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30 #include "opto/opcodes.hpp"
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31 #include "opto/type.hpp"
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32
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33 // Portions of code courtesy of Clifford Click
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34
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35 class MultiNode;
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36 class PhaseCCP;
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37 class PhaseTransform;
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38
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39 //------------------------------MemNode----------------------------------------
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40 // Load or Store, possibly throwing a NULL pointer exception
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41 class MemNode : public Node {
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42 protected:
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43 #ifdef ASSERT
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44 const TypePtr* _adr_type; // What kind of memory is being addressed?
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45 #endif
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46 virtual uint size_of() const; // Size is bigger (ASSERT only)
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47 public:
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48 enum { Control, // When is it safe to do this load?
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49 Memory, // Chunk of memory is being loaded from
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50 Address, // Actually address, derived from base
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51 ValueIn, // Value to store
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52 OopStore // Preceeding oop store, only in StoreCM
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53 };
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54 protected:
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55 MemNode( Node *c0, Node *c1, Node *c2, const TypePtr* at )
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56 : Node(c0,c1,c2 ) {
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57 init_class_id(Class_Mem);
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58 debug_only(_adr_type=at; adr_type();)
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59 }
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60 MemNode( Node *c0, Node *c1, Node *c2, const TypePtr* at, Node *c3 )
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61 : Node(c0,c1,c2,c3) {
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62 init_class_id(Class_Mem);
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63 debug_only(_adr_type=at; adr_type();)
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64 }
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65 MemNode( Node *c0, Node *c1, Node *c2, const TypePtr* at, Node *c3, Node *c4)
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66 : Node(c0,c1,c2,c3,c4) {
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67 init_class_id(Class_Mem);
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68 debug_only(_adr_type=at; adr_type();)
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69 }
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70
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71 public:
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72 // Helpers for the optimizer. Documented in memnode.cpp.
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73 static bool detect_ptr_independence(Node* p1, AllocateNode* a1,
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74 Node* p2, AllocateNode* a2,
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75 PhaseTransform* phase);
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76 static bool adr_phi_is_loop_invariant(Node* adr_phi, Node* cast);
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77
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78 static Node *optimize_simple_memory_chain(Node *mchain, const TypeOopPtr *t_oop, Node *load, PhaseGVN *phase);
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79 static Node *optimize_memory_chain(Node *mchain, const TypePtr *t_adr, Node *load, PhaseGVN *phase);
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80 // This one should probably be a phase-specific function:
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81 static bool all_controls_dominate(Node* dom, Node* sub);
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82
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83 // Find any cast-away of null-ness and keep its control.
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84 static Node *Ideal_common_DU_postCCP( PhaseCCP *ccp, Node* n, Node* adr );
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85 virtual Node *Ideal_DU_postCCP( PhaseCCP *ccp );
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86
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87 virtual const class TypePtr *adr_type() const; // returns bottom_type of address
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88
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89 // Shared code for Ideal methods:
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90 Node *Ideal_common(PhaseGVN *phase, bool can_reshape); // Return -1 for short-circuit NULL.
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91
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92 // Helper function for adr_type() implementations.
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93 static const TypePtr* calculate_adr_type(const Type* t, const TypePtr* cross_check = NULL);
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94
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95 // Raw access function, to allow copying of adr_type efficiently in
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96 // product builds and retain the debug info for debug builds.
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97 const TypePtr *raw_adr_type() const {
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98 #ifdef ASSERT
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99 return _adr_type;
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100 #else
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101 return 0;
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102 #endif
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103 }
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104
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105 // Map a load or store opcode to its corresponding store opcode.
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106 // (Return -1 if unknown.)
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107 virtual int store_Opcode() const { return -1; }
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108
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109 // What is the type of the value in memory? (T_VOID mean "unspecified".)
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110 virtual BasicType memory_type() const = 0;
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111 virtual int memory_size() const {
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112 #ifdef ASSERT
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113 return type2aelembytes(memory_type(), true);
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114 #else
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115 return type2aelembytes(memory_type());
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116 #endif
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117 }
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118
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119 // Search through memory states which precede this node (load or store).
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120 // Look for an exact match for the address, with no intervening
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121 // aliased stores.
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122 Node* find_previous_store(PhaseTransform* phase);
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123
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124 // Can this node (load or store) accurately see a stored value in
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125 // the given memory state? (The state may or may not be in(Memory).)
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126 Node* can_see_stored_value(Node* st, PhaseTransform* phase) const;
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127
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128 #ifndef PRODUCT
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129 static void dump_adr_type(const Node* mem, const TypePtr* adr_type, outputStream *st);
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130 virtual void dump_spec(outputStream *st) const;
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131 #endif
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132 };
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133
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134 //------------------------------LoadNode---------------------------------------
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135 // Load value; requires Memory and Address
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136 class LoadNode : public MemNode {
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137 protected:
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138 virtual uint cmp( const Node &n ) const;
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139 virtual uint size_of() const; // Size is bigger
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140 const Type* const _type; // What kind of value is loaded?
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141 public:
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142
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143 LoadNode( Node *c, Node *mem, Node *adr, const TypePtr* at, const Type *rt )
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144 : MemNode(c,mem,adr,at), _type(rt) {
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145 init_class_id(Class_Load);
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146 }
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147
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148 // Polymorphic factory method:
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149 static Node* make( PhaseGVN& gvn, Node *c, Node *mem, Node *adr,
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150 const TypePtr* at, const Type *rt, BasicType bt );
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151
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152 virtual uint hash() const; // Check the type
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153
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154 // Handle algebraic identities here. If we have an identity, return the Node
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155 // we are equivalent to. We look for Load of a Store.
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156 virtual Node *Identity( PhaseTransform *phase );
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157
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158 // If the load is from Field memory and the pointer is non-null, we can
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159 // zero out the control input.
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160 virtual Node *Ideal(PhaseGVN *phase, bool can_reshape);
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161
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162 // Split instance field load through Phi.
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163 Node* split_through_phi(PhaseGVN *phase);
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164
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165 // Recover original value from boxed values
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166 Node *eliminate_autobox(PhaseGVN *phase);
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167
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168 // Compute a new Type for this node. Basically we just do the pre-check,
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169 // then call the virtual add() to set the type.
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170 virtual const Type *Value( PhaseTransform *phase ) const;
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171
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172 // Common methods for LoadKlass and LoadNKlass nodes.
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173 const Type *klass_value_common( PhaseTransform *phase ) const;
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174 Node *klass_identity_common( PhaseTransform *phase );
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175
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176 virtual uint ideal_reg() const;
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177 virtual const Type *bottom_type() const;
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178 // Following method is copied from TypeNode:
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179 void set_type(const Type* t) {
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180 assert(t != NULL, "sanity");
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181 debug_only(uint check_hash = (VerifyHashTableKeys && _hash_lock) ? hash() : NO_HASH);
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182 *(const Type**)&_type = t; // cast away const-ness
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183 // If this node is in the hash table, make sure it doesn't need a rehash.
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184 assert(check_hash == NO_HASH || check_hash == hash(), "type change must preserve hash code");
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185 }
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186 const Type* type() const { assert(_type != NULL, "sanity"); return _type; };
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187
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188 // Do not match memory edge
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189 virtual uint match_edge(uint idx) const;
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190
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191 // Map a load opcode to its corresponding store opcode.
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192 virtual int store_Opcode() const = 0;
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193
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194 // Check if the load's memory input is a Phi node with the same control.
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195 bool is_instance_field_load_with_local_phi(Node* ctrl);
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196
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197 #ifndef PRODUCT
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198 virtual void dump_spec(outputStream *st) const;
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199 #endif
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200 #ifdef ASSERT
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201 // Helper function to allow a raw load without control edge for some cases
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202 static bool is_immutable_value(Node* adr);
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203 #endif
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204 protected:
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205 const Type* load_array_final_field(const TypeKlassPtr *tkls,
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206 ciKlass* klass) const;
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207 };
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208
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209 //------------------------------LoadBNode--------------------------------------
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210 // Load a byte (8bits signed) from memory
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211 class LoadBNode : public LoadNode {
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212 public:
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213 LoadBNode( Node *c, Node *mem, Node *adr, const TypePtr* at, const TypeInt *ti = TypeInt::BYTE )
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214 : LoadNode(c,mem,adr,at,ti) {}
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215 virtual int Opcode() const;
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216 virtual uint ideal_reg() const { return Op_RegI; }
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217 virtual Node *Ideal(PhaseGVN *phase, bool can_reshape);
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218 virtual const Type *Value(PhaseTransform *phase) const;
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219 virtual int store_Opcode() const { return Op_StoreB; }
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220 virtual BasicType memory_type() const { return T_BYTE; }
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221 };
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222
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223 //------------------------------LoadUBNode-------------------------------------
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224 // Load a unsigned byte (8bits unsigned) from memory
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225 class LoadUBNode : public LoadNode {
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226 public:
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227 LoadUBNode(Node* c, Node* mem, Node* adr, const TypePtr* at, const TypeInt* ti = TypeInt::UBYTE )
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228 : LoadNode(c, mem, adr, at, ti) {}
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229 virtual int Opcode() const;
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230 virtual uint ideal_reg() const { return Op_RegI; }
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231 virtual Node* Ideal(PhaseGVN *phase, bool can_reshape);
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232 virtual const Type *Value(PhaseTransform *phase) const;
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233 virtual int store_Opcode() const { return Op_StoreB; }
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234 virtual BasicType memory_type() const { return T_BYTE; }
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235 };
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236
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237 //------------------------------LoadUSNode-------------------------------------
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238 // Load an unsigned short/char (16bits unsigned) from memory
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239 class LoadUSNode : public LoadNode {
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240 public:
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241 LoadUSNode( Node *c, Node *mem, Node *adr, const TypePtr* at, const TypeInt *ti = TypeInt::CHAR )
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242 : LoadNode(c,mem,adr,at,ti) {}
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243 virtual int Opcode() const;
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244 virtual uint ideal_reg() const { return Op_RegI; }
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245 virtual Node *Ideal(PhaseGVN *phase, bool can_reshape);
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246 virtual const Type *Value(PhaseTransform *phase) const;
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247 virtual int store_Opcode() const { return Op_StoreC; }
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248 virtual BasicType memory_type() const { return T_CHAR; }
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249 };
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250
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251 //------------------------------LoadSNode--------------------------------------
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252 // Load a short (16bits signed) from memory
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253 class LoadSNode : public LoadNode {
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254 public:
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255 LoadSNode( Node *c, Node *mem, Node *adr, const TypePtr* at, const TypeInt *ti = TypeInt::SHORT )
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256 : LoadNode(c,mem,adr,at,ti) {}
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257 virtual int Opcode() const;
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258 virtual uint ideal_reg() const { return Op_RegI; }
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259 virtual Node *Ideal(PhaseGVN *phase, bool can_reshape);
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260 virtual const Type *Value(PhaseTransform *phase) const;
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261 virtual int store_Opcode() const { return Op_StoreC; }
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262 virtual BasicType memory_type() const { return T_SHORT; }
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263 };
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264
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265 //------------------------------LoadINode--------------------------------------
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266 // Load an integer from memory
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267 class LoadINode : public LoadNode {
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268 public:
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269 LoadINode( Node *c, Node *mem, Node *adr, const TypePtr* at, const TypeInt *ti = TypeInt::INT )
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270 : LoadNode(c,mem,adr,at,ti) {}
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271 virtual int Opcode() const;
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272 virtual uint ideal_reg() const { return Op_RegI; }
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273 virtual int store_Opcode() const { return Op_StoreI; }
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274 virtual BasicType memory_type() const { return T_INT; }
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275 };
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276
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277 //------------------------------LoadRangeNode----------------------------------
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278 // Load an array length from the array
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279 class LoadRangeNode : public LoadINode {
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280 public:
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281 LoadRangeNode( Node *c, Node *mem, Node *adr, const TypeInt *ti = TypeInt::POS )
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282 : LoadINode(c,mem,adr,TypeAryPtr::RANGE,ti) {}
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283 virtual int Opcode() const;
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284 virtual const Type *Value( PhaseTransform *phase ) const;
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285 virtual Node *Identity( PhaseTransform *phase );
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286 virtual Node *Ideal(PhaseGVN *phase, bool can_reshape);
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287 };
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288
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289 //------------------------------LoadLNode--------------------------------------
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290 // Load a long from memory
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291 class LoadLNode : public LoadNode {
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292 virtual uint hash() const { return LoadNode::hash() + _require_atomic_access; }
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293 virtual uint cmp( const Node &n ) const {
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294 return _require_atomic_access == ((LoadLNode&)n)._require_atomic_access
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295 && LoadNode::cmp(n);
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296 }
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297 virtual uint size_of() const { return sizeof(*this); }
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298 const bool _require_atomic_access; // is piecewise load forbidden?
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299
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300 public:
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301 LoadLNode( Node *c, Node *mem, Node *adr, const TypePtr* at,
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302 const TypeLong *tl = TypeLong::LONG,
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303 bool require_atomic_access = false )
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304 : LoadNode(c,mem,adr,at,tl)
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305 , _require_atomic_access(require_atomic_access)
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306 {}
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307 virtual int Opcode() const;
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308 virtual uint ideal_reg() const { return Op_RegL; }
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309 virtual int store_Opcode() const { return Op_StoreL; }
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310 virtual BasicType memory_type() const { return T_LONG; }
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311 bool require_atomic_access() { return _require_atomic_access; }
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312 static LoadLNode* make_atomic(Compile *C, Node* ctl, Node* mem, Node* adr, const TypePtr* adr_type, const Type* rt);
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313 #ifndef PRODUCT
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314 virtual void dump_spec(outputStream *st) const {
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315 LoadNode::dump_spec(st);
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316 if (_require_atomic_access) st->print(" Atomic!");
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317 }
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318 #endif
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319 };
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320
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321 //------------------------------LoadL_unalignedNode----------------------------
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322 // Load a long from unaligned memory
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323 class LoadL_unalignedNode : public LoadLNode {
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324 public:
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325 LoadL_unalignedNode( Node *c, Node *mem, Node *adr, const TypePtr* at )
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326 : LoadLNode(c,mem,adr,at) {}
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327 virtual int Opcode() const;
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328 };
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329
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330 //------------------------------LoadFNode--------------------------------------
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331 // Load a float (64 bits) from memory
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332 class LoadFNode : public LoadNode {
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333 public:
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334 LoadFNode( Node *c, Node *mem, Node *adr, const TypePtr* at, const Type *t = Type::FLOAT )
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335 : LoadNode(c,mem,adr,at,t) {}
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336 virtual int Opcode() const;
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337 virtual uint ideal_reg() const { return Op_RegF; }
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338 virtual int store_Opcode() const { return Op_StoreF; }
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339 virtual BasicType memory_type() const { return T_FLOAT; }
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340 };
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341
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342 //------------------------------LoadDNode--------------------------------------
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343 // Load a double (64 bits) from memory
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344 class LoadDNode : public LoadNode {
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345 public:
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346 LoadDNode( Node *c, Node *mem, Node *adr, const TypePtr* at, const Type *t = Type::DOUBLE )
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347 : LoadNode(c,mem,adr,at,t) {}
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348 virtual int Opcode() const;
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349 virtual uint ideal_reg() const { return Op_RegD; }
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350 virtual int store_Opcode() const { return Op_StoreD; }
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351 virtual BasicType memory_type() const { return T_DOUBLE; }
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352 };
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353
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354 //------------------------------LoadD_unalignedNode----------------------------
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355 // Load a double from unaligned memory
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356 class LoadD_unalignedNode : public LoadDNode {
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357 public:
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358 LoadD_unalignedNode( Node *c, Node *mem, Node *adr, const TypePtr* at )
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359 : LoadDNode(c,mem,adr,at) {}
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360 virtual int Opcode() const;
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361 };
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362
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363 //------------------------------LoadPNode--------------------------------------
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364 // Load a pointer from memory (either object or array)
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365 class LoadPNode : public LoadNode {
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366 public:
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367 LoadPNode( Node *c, Node *mem, Node *adr, const TypePtr *at, const TypePtr* t )
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368 : LoadNode(c,mem,adr,at,t) {}
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369 virtual int Opcode() const;
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370 virtual uint ideal_reg() const { return Op_RegP; }
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371 virtual int store_Opcode() const { return Op_StoreP; }
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372 virtual BasicType memory_type() const { return T_ADDRESS; }
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373 // depends_only_on_test is almost always true, and needs to be almost always
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374 // true to enable key hoisting & commoning optimizations. However, for the
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375 // special case of RawPtr loads from TLS top & end, the control edge carries
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376 // the dependence preventing hoisting past a Safepoint instead of the memory
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377 // edge. (An unfortunate consequence of having Safepoints not set Raw
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378 // Memory; itself an unfortunate consequence of having Nodes which produce
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379 // results (new raw memory state) inside of loops preventing all manner of
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380 // other optimizations). Basically, it's ugly but so is the alternative.
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381 // See comment in macro.cpp, around line 125 expand_allocate_common().
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382 virtual bool depends_only_on_test() const { return adr_type() != TypeRawPtr::BOTTOM; }
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383 };
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384
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385
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386 //------------------------------LoadNNode--------------------------------------
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387 // Load a narrow oop from memory (either object or array)
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388 class LoadNNode : public LoadNode {
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389 public:
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390 LoadNNode( Node *c, Node *mem, Node *adr, const TypePtr *at, const Type* t )
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391 : LoadNode(c,mem,adr,at,t) {}
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392 virtual int Opcode() const;
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393 virtual uint ideal_reg() const { return Op_RegN; }
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394 virtual int store_Opcode() const { return Op_StoreN; }
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395 virtual BasicType memory_type() const { return T_NARROWOOP; }
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396 // depends_only_on_test is almost always true, and needs to be almost always
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397 // true to enable key hoisting & commoning optimizations. However, for the
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398 // special case of RawPtr loads from TLS top & end, the control edge carries
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399 // the dependence preventing hoisting past a Safepoint instead of the memory
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400 // edge. (An unfortunate consequence of having Safepoints not set Raw
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401 // Memory; itself an unfortunate consequence of having Nodes which produce
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402 // results (new raw memory state) inside of loops preventing all manner of
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403 // other optimizations). Basically, it's ugly but so is the alternative.
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404 // See comment in macro.cpp, around line 125 expand_allocate_common().
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405 virtual bool depends_only_on_test() const { return adr_type() != TypeRawPtr::BOTTOM; }
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406 };
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407
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408 //------------------------------LoadKlassNode----------------------------------
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409 // Load a Klass from an object
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410 class LoadKlassNode : public LoadPNode {
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411 public:
164
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412 LoadKlassNode( Node *c, Node *mem, Node *adr, const TypePtr *at, const TypeKlassPtr *tk )
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413 : LoadPNode(c,mem,adr,at,tk) {}
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414 virtual int Opcode() const;
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415 virtual const Type *Value( PhaseTransform *phase ) const;
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416 virtual Node *Identity( PhaseTransform *phase );
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417 virtual bool depends_only_on_test() const { return true; }
164
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418
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419 // Polymorphic factory method:
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420 static Node* make( PhaseGVN& gvn, Node *mem, Node *adr, const TypePtr* at,
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421 const TypeKlassPtr *tk = TypeKlassPtr::OBJECT );
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422 };
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423
164
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424 //------------------------------LoadNKlassNode---------------------------------
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425 // Load a narrow Klass from an object.
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426 class LoadNKlassNode : public LoadNNode {
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427 public:
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428 LoadNKlassNode( Node *c, Node *mem, Node *adr, const TypePtr *at, const TypeNarrowKlass *tk )
164
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429 : LoadNNode(c,mem,adr,at,tk) {}
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430 virtual int Opcode() const;
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431 virtual uint ideal_reg() const { return Op_RegN; }
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432 virtual int store_Opcode() const { return Op_StoreNKlass; }
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433 virtual BasicType memory_type() const { return T_NARROWKLASS; }
164
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434
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435 virtual const Type *Value( PhaseTransform *phase ) const;
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436 virtual Node *Identity( PhaseTransform *phase );
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437 virtual bool depends_only_on_test() const { return true; }
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438 };
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439
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440
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441 //------------------------------StoreNode--------------------------------------
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442 // Store value; requires Store, Address and Value
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443 class StoreNode : public MemNode {
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444 protected:
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445 virtual uint cmp( const Node &n ) const;
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446 virtual bool depends_only_on_test() const { return false; }
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447
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448 Node *Ideal_masked_input (PhaseGVN *phase, uint mask);
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449 Node *Ideal_sign_extended_input(PhaseGVN *phase, int num_bits);
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450
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451 public:
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452 StoreNode( Node *c, Node *mem, Node *adr, const TypePtr* at, Node *val )
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453 : MemNode(c,mem,adr,at,val) {
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454 init_class_id(Class_Store);
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455 }
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456 StoreNode( Node *c, Node *mem, Node *adr, const TypePtr* at, Node *val, Node *oop_store )
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457 : MemNode(c,mem,adr,at,val,oop_store) {
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458 init_class_id(Class_Store);
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459 }
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460
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461 // Polymorphic factory method:
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462 static StoreNode* make( PhaseGVN& gvn, Node *c, Node *mem, Node *adr,
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463 const TypePtr* at, Node *val, BasicType bt );
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464
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465 virtual uint hash() const; // Check the type
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466
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467 // If the store is to Field memory and the pointer is non-null, we can
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468 // zero out the control input.
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469 virtual Node *Ideal(PhaseGVN *phase, bool can_reshape);
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470
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471 // Compute a new Type for this node. Basically we just do the pre-check,
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472 // then call the virtual add() to set the type.
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473 virtual const Type *Value( PhaseTransform *phase ) const;
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474
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475 // Check for identity function on memory (Load then Store at same address)
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476 virtual Node *Identity( PhaseTransform *phase );
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477
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478 // Do not match memory edge
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479 virtual uint match_edge(uint idx) const;
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480
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481 virtual const Type *bottom_type() const; // returns Type::MEMORY
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482
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483 // Map a store opcode to its corresponding own opcode, trivially.
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484 virtual int store_Opcode() const { return Opcode(); }
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485
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486 // have all possible loads of the value stored been optimized away?
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487 bool value_never_loaded(PhaseTransform *phase) const;
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488 };
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489
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490 //------------------------------StoreBNode-------------------------------------
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491 // Store byte to memory
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492 class StoreBNode : public StoreNode {
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493 public:
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494 StoreBNode( Node *c, Node *mem, Node *adr, const TypePtr* at, Node *val ) : StoreNode(c,mem,adr,at,val) {}
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495 virtual int Opcode() const;
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496 virtual Node *Ideal(PhaseGVN *phase, bool can_reshape);
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497 virtual BasicType memory_type() const { return T_BYTE; }
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498 };
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499
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500 //------------------------------StoreCNode-------------------------------------
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501 // Store char/short to memory
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502 class StoreCNode : public StoreNode {
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503 public:
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504 StoreCNode( Node *c, Node *mem, Node *adr, const TypePtr* at, Node *val ) : StoreNode(c,mem,adr,at,val) {}
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505 virtual int Opcode() const;
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506 virtual Node *Ideal(PhaseGVN *phase, bool can_reshape);
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507 virtual BasicType memory_type() const { return T_CHAR; }
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508 };
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509
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510 //------------------------------StoreINode-------------------------------------
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511 // Store int to memory
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512 class StoreINode : public StoreNode {
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513 public:
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514 StoreINode( Node *c, Node *mem, Node *adr, const TypePtr* at, Node *val ) : StoreNode(c,mem,adr,at,val) {}
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515 virtual int Opcode() const;
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516 virtual BasicType memory_type() const { return T_INT; }
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517 };
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518
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519 //------------------------------StoreLNode-------------------------------------
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520 // Store long to memory
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521 class StoreLNode : public StoreNode {
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522 virtual uint hash() const { return StoreNode::hash() + _require_atomic_access; }
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523 virtual uint cmp( const Node &n ) const {
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524 return _require_atomic_access == ((StoreLNode&)n)._require_atomic_access
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525 && StoreNode::cmp(n);
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526 }
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527 virtual uint size_of() const { return sizeof(*this); }
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528 const bool _require_atomic_access; // is piecewise store forbidden?
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529
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530 public:
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531 StoreLNode( Node *c, Node *mem, Node *adr, const TypePtr* at, Node *val,
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532 bool require_atomic_access = false )
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533 : StoreNode(c,mem,adr,at,val)
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534 , _require_atomic_access(require_atomic_access)
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535 {}
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536 virtual int Opcode() const;
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537 virtual BasicType memory_type() const { return T_LONG; }
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538 bool require_atomic_access() { return _require_atomic_access; }
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539 static StoreLNode* make_atomic(Compile *C, Node* ctl, Node* mem, Node* adr, const TypePtr* adr_type, Node* val);
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540 #ifndef PRODUCT
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541 virtual void dump_spec(outputStream *st) const {
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542 StoreNode::dump_spec(st);
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543 if (_require_atomic_access) st->print(" Atomic!");
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544 }
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545 #endif
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546 };
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547
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548 //------------------------------StoreFNode-------------------------------------
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549 // Store float to memory
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550 class StoreFNode : public StoreNode {
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551 public:
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552 StoreFNode( Node *c, Node *mem, Node *adr, const TypePtr* at, Node *val ) : StoreNode(c,mem,adr,at,val) {}
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553 virtual int Opcode() const;
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554 virtual BasicType memory_type() const { return T_FLOAT; }
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555 };
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556
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557 //------------------------------StoreDNode-------------------------------------
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558 // Store double to memory
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559 class StoreDNode : public StoreNode {
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560 public:
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561 StoreDNode( Node *c, Node *mem, Node *adr, const TypePtr* at, Node *val ) : StoreNode(c,mem,adr,at,val) {}
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562 virtual int Opcode() const;
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563 virtual BasicType memory_type() const { return T_DOUBLE; }
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564 };
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565
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566 //------------------------------StorePNode-------------------------------------
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567 // Store pointer to memory
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568 class StorePNode : public StoreNode {
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569 public:
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570 StorePNode( Node *c, Node *mem, Node *adr, const TypePtr* at, Node *val ) : StoreNode(c,mem,adr,at,val) {}
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571 virtual int Opcode() const;
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572 virtual BasicType memory_type() const { return T_ADDRESS; }
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573 };
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574
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575 //------------------------------StoreNNode-------------------------------------
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576 // Store narrow oop to memory
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577 class StoreNNode : public StoreNode {
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diff changeset
578 public:
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 74
diff changeset
579 StoreNNode( Node *c, Node *mem, Node *adr, const TypePtr* at, Node *val ) : StoreNode(c,mem,adr,at,val) {}
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 74
diff changeset
580 virtual int Opcode() const;
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 74
diff changeset
581 virtual BasicType memory_type() const { return T_NARROWOOP; }
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 74
diff changeset
582 };
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 74
diff changeset
583
6848
8e47bac5643a 7054512: Compress class pointers after perm gen removal
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parents: 6795
diff changeset
584 //------------------------------StoreNKlassNode--------------------------------------
8e47bac5643a 7054512: Compress class pointers after perm gen removal
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parents: 6795
diff changeset
585 // Store narrow klass to memory
8e47bac5643a 7054512: Compress class pointers after perm gen removal
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parents: 6795
diff changeset
586 class StoreNKlassNode : public StoreNNode {
8e47bac5643a 7054512: Compress class pointers after perm gen removal
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parents: 6795
diff changeset
587 public:
8e47bac5643a 7054512: Compress class pointers after perm gen removal
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parents: 6795
diff changeset
588 StoreNKlassNode( Node *c, Node *mem, Node *adr, const TypePtr* at, Node *val ) : StoreNNode(c,mem,adr,at,val) {}
8e47bac5643a 7054512: Compress class pointers after perm gen removal
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diff changeset
589 virtual int Opcode() const;
8e47bac5643a 7054512: Compress class pointers after perm gen removal
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diff changeset
590 virtual BasicType memory_type() const { return T_NARROWKLASS; }
8e47bac5643a 7054512: Compress class pointers after perm gen removal
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diff changeset
591 };
8e47bac5643a 7054512: Compress class pointers after perm gen removal
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diff changeset
592
0
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593 //------------------------------StoreCMNode-----------------------------------
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594 // Store card-mark byte to memory for CM
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parents:
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595 // The last StoreCM before a SafePoint must be preserved and occur after its "oop" store
a61af66fc99e Initial load
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596 // Preceeding equivalent StoreCMs may be eliminated.
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diff changeset
597 class StoreCMNode : public StoreNode {
985
685e959d09ea 6877254: Server vm crashes with no branches off of store slice" when run with CMS and UseSuperWord(default)
cfang
parents: 681
diff changeset
598 private:
1198
8d9bfe6a446b 6920346: G1: "must avoid base_memory and AliasIdxTop"
never
parents: 1100
diff changeset
599 virtual uint hash() const { return StoreNode::hash() + _oop_alias_idx; }
8d9bfe6a446b 6920346: G1: "must avoid base_memory and AliasIdxTop"
never
parents: 1100
diff changeset
600 virtual uint cmp( const Node &n ) const {
8d9bfe6a446b 6920346: G1: "must avoid base_memory and AliasIdxTop"
never
parents: 1100
diff changeset
601 return _oop_alias_idx == ((StoreCMNode&)n)._oop_alias_idx
8d9bfe6a446b 6920346: G1: "must avoid base_memory and AliasIdxTop"
never
parents: 1100
diff changeset
602 && StoreNode::cmp(n);
8d9bfe6a446b 6920346: G1: "must avoid base_memory and AliasIdxTop"
never
parents: 1100
diff changeset
603 }
8d9bfe6a446b 6920346: G1: "must avoid base_memory and AliasIdxTop"
never
parents: 1100
diff changeset
604 virtual uint size_of() const { return sizeof(*this); }
985
685e959d09ea 6877254: Server vm crashes with no branches off of store slice" when run with CMS and UseSuperWord(default)
cfang
parents: 681
diff changeset
605 int _oop_alias_idx; // The alias_idx of OopStore
1198
8d9bfe6a446b 6920346: G1: "must avoid base_memory and AliasIdxTop"
never
parents: 1100
diff changeset
606
0
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parents:
diff changeset
607 public:
1198
8d9bfe6a446b 6920346: G1: "must avoid base_memory and AliasIdxTop"
never
parents: 1100
diff changeset
608 StoreCMNode( Node *c, Node *mem, Node *adr, const TypePtr* at, Node *val, Node *oop_store, int oop_alias_idx ) :
8d9bfe6a446b 6920346: G1: "must avoid base_memory and AliasIdxTop"
never
parents: 1100
diff changeset
609 StoreNode(c,mem,adr,at,val,oop_store),
8d9bfe6a446b 6920346: G1: "must avoid base_memory and AliasIdxTop"
never
parents: 1100
diff changeset
610 _oop_alias_idx(oop_alias_idx) {
8d9bfe6a446b 6920346: G1: "must avoid base_memory and AliasIdxTop"
never
parents: 1100
diff changeset
611 assert(_oop_alias_idx >= Compile::AliasIdxRaw ||
8d9bfe6a446b 6920346: G1: "must avoid base_memory and AliasIdxTop"
never
parents: 1100
diff changeset
612 _oop_alias_idx == Compile::AliasIdxBot && Compile::current()->AliasLevel() == 0,
8d9bfe6a446b 6920346: G1: "must avoid base_memory and AliasIdxTop"
never
parents: 1100
diff changeset
613 "bad oop alias idx");
8d9bfe6a446b 6920346: G1: "must avoid base_memory and AliasIdxTop"
never
parents: 1100
diff changeset
614 }
0
a61af66fc99e Initial load
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parents:
diff changeset
615 virtual int Opcode() const;
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diff changeset
616 virtual Node *Identity( PhaseTransform *phase );
985
685e959d09ea 6877254: Server vm crashes with no branches off of store slice" when run with CMS and UseSuperWord(default)
cfang
parents: 681
diff changeset
617 virtual Node *Ideal(PhaseGVN *phase, bool can_reshape);
0
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diff changeset
618 virtual const Type *Value( PhaseTransform *phase ) const;
a61af66fc99e Initial load
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diff changeset
619 virtual BasicType memory_type() const { return T_VOID; } // unspecific
985
685e959d09ea 6877254: Server vm crashes with no branches off of store slice" when run with CMS and UseSuperWord(default)
cfang
parents: 681
diff changeset
620 int oop_alias_idx() const { return _oop_alias_idx; }
0
a61af66fc99e Initial load
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diff changeset
621 };
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parents:
diff changeset
622
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parents:
diff changeset
623 //------------------------------LoadPLockedNode---------------------------------
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624 // Load-locked a pointer from memory (either object or array).
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parents:
diff changeset
625 // On Sparc & Intel this is implemented as a normal pointer load.
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parents:
diff changeset
626 // On PowerPC and friends it's a real load-locked.
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diff changeset
627 class LoadPLockedNode : public LoadPNode {
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diff changeset
628 public:
a61af66fc99e Initial load
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parents:
diff changeset
629 LoadPLockedNode( Node *c, Node *mem, Node *adr )
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diff changeset
630 : LoadPNode(c,mem,adr,TypeRawPtr::BOTTOM, TypeRawPtr::BOTTOM) {}
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parents:
diff changeset
631 virtual int Opcode() const;
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diff changeset
632 virtual int store_Opcode() const { return Op_StorePConditional; }
a61af66fc99e Initial load
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diff changeset
633 virtual bool depends_only_on_test() const { return true; }
a61af66fc99e Initial load
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diff changeset
634 };
a61af66fc99e Initial load
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diff changeset
635
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parents:
diff changeset
636 //------------------------------SCMemProjNode---------------------------------------
a61af66fc99e Initial load
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parents:
diff changeset
637 // This class defines a projection of the memory state of a store conditional node.
a61af66fc99e Initial load
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parents:
diff changeset
638 // These nodes return a value, but also update memory.
a61af66fc99e Initial load
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parents:
diff changeset
639 class SCMemProjNode : public ProjNode {
a61af66fc99e Initial load
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diff changeset
640 public:
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parents:
diff changeset
641 enum {SCMEMPROJCON = (uint)-2};
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parents:
diff changeset
642 SCMemProjNode( Node *src) : ProjNode( src, SCMEMPROJCON) { }
a61af66fc99e Initial load
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parents:
diff changeset
643 virtual int Opcode() const;
a61af66fc99e Initial load
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parents:
diff changeset
644 virtual bool is_CFG() const { return false; }
a61af66fc99e Initial load
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parents:
diff changeset
645 virtual const Type *bottom_type() const {return Type::MEMORY;}
a61af66fc99e Initial load
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parents:
diff changeset
646 virtual const TypePtr *adr_type() const { return in(0)->in(MemNode::Memory)->adr_type();}
a61af66fc99e Initial load
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parents:
diff changeset
647 virtual uint ideal_reg() const { return 0;} // memory projections don't have a register
a61af66fc99e Initial load
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parents:
diff changeset
648 virtual const Type *Value( PhaseTransform *phase ) const;
a61af66fc99e Initial load
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parents:
diff changeset
649 #ifndef PRODUCT
a61af66fc99e Initial load
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parents:
diff changeset
650 virtual void dump_spec(outputStream *st) const {};
a61af66fc99e Initial load
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parents:
diff changeset
651 #endif
a61af66fc99e Initial load
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parents:
diff changeset
652 };
a61af66fc99e Initial load
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parents:
diff changeset
653
a61af66fc99e Initial load
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parents:
diff changeset
654 //------------------------------LoadStoreNode---------------------------
253
b0fe4deeb9fb 6726999: nsk/stress/jck12a/jck12a010 assert(n != null,"Bad immediate dominator info.")
kvn
parents: 196
diff changeset
655 // Note: is_Mem() method returns 'true' for this class.
0
a61af66fc99e Initial load
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parents:
diff changeset
656 class LoadStoreNode : public Node {
6795
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
657 private:
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
658 const Type* const _type; // What kind of value is loaded?
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
659 const TypePtr* _adr_type; // What kind of memory is being addressed?
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
660 virtual uint size_of() const; // Size is bigger
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
661 public:
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
662 LoadStoreNode( Node *c, Node *mem, Node *adr, Node *val, const TypePtr* at, const Type* rt, uint required );
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
663 virtual bool depends_only_on_test() const { return false; }
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
664 virtual uint match_edge(uint idx) const { return idx == MemNode::Address || idx == MemNode::ValueIn; }
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
665
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
666 virtual const Type *bottom_type() const { return _type; }
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
667 virtual uint ideal_reg() const;
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
668 virtual const class TypePtr *adr_type() const { return _adr_type; } // returns bottom_type of address
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
669
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
670 bool result_not_used() const;
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
671 };
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
672
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
673 class LoadStoreConditionalNode : public LoadStoreNode {
0
a61af66fc99e Initial load
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parents:
diff changeset
674 public:
a61af66fc99e Initial load
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parents:
diff changeset
675 enum {
a61af66fc99e Initial load
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parents:
diff changeset
676 ExpectedIn = MemNode::ValueIn+1 // One more input than MemNode
a61af66fc99e Initial load
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parents:
diff changeset
677 };
6795
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
678 LoadStoreConditionalNode(Node *c, Node *mem, Node *adr, Node *val, Node *ex);
0
a61af66fc99e Initial load
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parents:
diff changeset
679 };
a61af66fc99e Initial load
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parents:
diff changeset
680
a61af66fc99e Initial load
duke
parents:
diff changeset
681 //------------------------------StorePConditionalNode---------------------------
a61af66fc99e Initial load
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parents:
diff changeset
682 // Conditionally store pointer to memory, if no change since prior
a61af66fc99e Initial load
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parents:
diff changeset
683 // load-locked. Sets flags for success or failure of the store.
6795
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
684 class StorePConditionalNode : public LoadStoreConditionalNode {
0
a61af66fc99e Initial load
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parents:
diff changeset
685 public:
6795
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
686 StorePConditionalNode( Node *c, Node *mem, Node *adr, Node *val, Node *ll ) : LoadStoreConditionalNode(c, mem, adr, val, ll) { }
0
a61af66fc99e Initial load
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parents:
diff changeset
687 virtual int Opcode() const;
a61af66fc99e Initial load
duke
parents:
diff changeset
688 // Produces flags
a61af66fc99e Initial load
duke
parents:
diff changeset
689 virtual uint ideal_reg() const { return Op_RegFlags; }
a61af66fc99e Initial load
duke
parents:
diff changeset
690 };
a61af66fc99e Initial load
duke
parents:
diff changeset
691
420
a1980da045cc 6462850: generate biased locking code in C2 ideal graph
kvn
parents: 366
diff changeset
692 //------------------------------StoreIConditionalNode---------------------------
a1980da045cc 6462850: generate biased locking code in C2 ideal graph
kvn
parents: 366
diff changeset
693 // Conditionally store int to memory, if no change since prior
a1980da045cc 6462850: generate biased locking code in C2 ideal graph
kvn
parents: 366
diff changeset
694 // load-locked. Sets flags for success or failure of the store.
6795
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
695 class StoreIConditionalNode : public LoadStoreConditionalNode {
420
a1980da045cc 6462850: generate biased locking code in C2 ideal graph
kvn
parents: 366
diff changeset
696 public:
6795
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
697 StoreIConditionalNode( Node *c, Node *mem, Node *adr, Node *val, Node *ii ) : LoadStoreConditionalNode(c, mem, adr, val, ii) { }
420
a1980da045cc 6462850: generate biased locking code in C2 ideal graph
kvn
parents: 366
diff changeset
698 virtual int Opcode() const;
a1980da045cc 6462850: generate biased locking code in C2 ideal graph
kvn
parents: 366
diff changeset
699 // Produces flags
a1980da045cc 6462850: generate biased locking code in C2 ideal graph
kvn
parents: 366
diff changeset
700 virtual uint ideal_reg() const { return Op_RegFlags; }
a1980da045cc 6462850: generate biased locking code in C2 ideal graph
kvn
parents: 366
diff changeset
701 };
a1980da045cc 6462850: generate biased locking code in C2 ideal graph
kvn
parents: 366
diff changeset
702
0
a61af66fc99e Initial load
duke
parents:
diff changeset
703 //------------------------------StoreLConditionalNode---------------------------
a61af66fc99e Initial load
duke
parents:
diff changeset
704 // Conditionally store long to memory, if no change since prior
a61af66fc99e Initial load
duke
parents:
diff changeset
705 // load-locked. Sets flags for success or failure of the store.
6795
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
706 class StoreLConditionalNode : public LoadStoreConditionalNode {
0
a61af66fc99e Initial load
duke
parents:
diff changeset
707 public:
6795
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
708 StoreLConditionalNode( Node *c, Node *mem, Node *adr, Node *val, Node *ll ) : LoadStoreConditionalNode(c, mem, adr, val, ll) { }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
709 virtual int Opcode() const;
420
a1980da045cc 6462850: generate biased locking code in C2 ideal graph
kvn
parents: 366
diff changeset
710 // Produces flags
a1980da045cc 6462850: generate biased locking code in C2 ideal graph
kvn
parents: 366
diff changeset
711 virtual uint ideal_reg() const { return Op_RegFlags; }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
712 };
a61af66fc99e Initial load
duke
parents:
diff changeset
713
a61af66fc99e Initial load
duke
parents:
diff changeset
714
a61af66fc99e Initial load
duke
parents:
diff changeset
715 //------------------------------CompareAndSwapLNode---------------------------
6795
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
716 class CompareAndSwapLNode : public LoadStoreConditionalNode {
0
a61af66fc99e Initial load
duke
parents:
diff changeset
717 public:
6795
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
718 CompareAndSwapLNode( Node *c, Node *mem, Node *adr, Node *val, Node *ex) : LoadStoreConditionalNode(c, mem, adr, val, ex) { }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
719 virtual int Opcode() const;
a61af66fc99e Initial load
duke
parents:
diff changeset
720 };
a61af66fc99e Initial load
duke
parents:
diff changeset
721
a61af66fc99e Initial load
duke
parents:
diff changeset
722
a61af66fc99e Initial load
duke
parents:
diff changeset
723 //------------------------------CompareAndSwapINode---------------------------
6795
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
724 class CompareAndSwapINode : public LoadStoreConditionalNode {
0
a61af66fc99e Initial load
duke
parents:
diff changeset
725 public:
6795
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
726 CompareAndSwapINode( Node *c, Node *mem, Node *adr, Node *val, Node *ex) : LoadStoreConditionalNode(c, mem, adr, val, ex) { }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
727 virtual int Opcode() const;
a61af66fc99e Initial load
duke
parents:
diff changeset
728 };
a61af66fc99e Initial load
duke
parents:
diff changeset
729
a61af66fc99e Initial load
duke
parents:
diff changeset
730
a61af66fc99e Initial load
duke
parents:
diff changeset
731 //------------------------------CompareAndSwapPNode---------------------------
6795
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
732 class CompareAndSwapPNode : public LoadStoreConditionalNode {
0
a61af66fc99e Initial load
duke
parents:
diff changeset
733 public:
6795
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
734 CompareAndSwapPNode( Node *c, Node *mem, Node *adr, Node *val, Node *ex) : LoadStoreConditionalNode(c, mem, adr, val, ex) { }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
735 virtual int Opcode() const;
a61af66fc99e Initial load
duke
parents:
diff changeset
736 };
a61af66fc99e Initial load
duke
parents:
diff changeset
737
113
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 74
diff changeset
738 //------------------------------CompareAndSwapNNode---------------------------
6795
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
739 class CompareAndSwapNNode : public LoadStoreConditionalNode {
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
740 public:
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
741 CompareAndSwapNNode( Node *c, Node *mem, Node *adr, Node *val, Node *ex) : LoadStoreConditionalNode(c, mem, adr, val, ex) { }
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
742 virtual int Opcode() const;
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
743 };
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
744
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
745 //------------------------------GetAndAddINode---------------------------
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
746 class GetAndAddINode : public LoadStoreNode {
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
747 public:
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
748 GetAndAddINode( Node *c, Node *mem, Node *adr, Node *val, const TypePtr* at ) : LoadStoreNode(c, mem, adr, val, at, TypeInt::INT, 4) { }
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
749 virtual int Opcode() const;
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
750 };
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
751
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
752 //------------------------------GetAndAddLNode---------------------------
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
753 class GetAndAddLNode : public LoadStoreNode {
113
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 74
diff changeset
754 public:
6795
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
755 GetAndAddLNode( Node *c, Node *mem, Node *adr, Node *val, const TypePtr* at ) : LoadStoreNode(c, mem, adr, val, at, TypeLong::LONG, 4) { }
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
756 virtual int Opcode() const;
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
757 };
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
758
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
759
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
760 //------------------------------GetAndSetINode---------------------------
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
761 class GetAndSetINode : public LoadStoreNode {
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
762 public:
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
763 GetAndSetINode( Node *c, Node *mem, Node *adr, Node *val, const TypePtr* at ) : LoadStoreNode(c, mem, adr, val, at, TypeInt::INT, 4) { }
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
764 virtual int Opcode() const;
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
765 };
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
766
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
767 //------------------------------GetAndSetINode---------------------------
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
768 class GetAndSetLNode : public LoadStoreNode {
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
769 public:
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
770 GetAndSetLNode( Node *c, Node *mem, Node *adr, Node *val, const TypePtr* at ) : LoadStoreNode(c, mem, adr, val, at, TypeLong::LONG, 4) { }
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
771 virtual int Opcode() const;
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
772 };
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
773
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
774 //------------------------------GetAndSetPNode---------------------------
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
775 class GetAndSetPNode : public LoadStoreNode {
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
776 public:
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
777 GetAndSetPNode( Node *c, Node *mem, Node *adr, Node *val, const TypePtr* at, const Type* t ) : LoadStoreNode(c, mem, adr, val, at, t, 4) { }
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
778 virtual int Opcode() const;
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
779 };
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
780
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
781 //------------------------------GetAndSetNNode---------------------------
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
782 class GetAndSetNNode : public LoadStoreNode {
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
783 public:
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
784 GetAndSetNNode( Node *c, Node *mem, Node *adr, Node *val, const TypePtr* at, const Type* t ) : LoadStoreNode(c, mem, adr, val, at, t, 4) { }
113
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 74
diff changeset
785 virtual int Opcode() const;
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 74
diff changeset
786 };
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 74
diff changeset
787
0
a61af66fc99e Initial load
duke
parents:
diff changeset
788 //------------------------------ClearArray-------------------------------------
a61af66fc99e Initial load
duke
parents:
diff changeset
789 class ClearArrayNode: public Node {
a61af66fc99e Initial load
duke
parents:
diff changeset
790 public:
1100
f96a1a986f7b 6895383: JCK test throws NPE for method compiled with Escape Analysis
kvn
parents: 986
diff changeset
791 ClearArrayNode( Node *ctrl, Node *arymem, Node *word_cnt, Node *base )
f96a1a986f7b 6895383: JCK test throws NPE for method compiled with Escape Analysis
kvn
parents: 986
diff changeset
792 : Node(ctrl,arymem,word_cnt,base) {
f96a1a986f7b 6895383: JCK test throws NPE for method compiled with Escape Analysis
kvn
parents: 986
diff changeset
793 init_class_id(Class_ClearArray);
f96a1a986f7b 6895383: JCK test throws NPE for method compiled with Escape Analysis
kvn
parents: 986
diff changeset
794 }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
795 virtual int Opcode() const;
a61af66fc99e Initial load
duke
parents:
diff changeset
796 virtual const Type *bottom_type() const { return Type::MEMORY; }
a61af66fc99e Initial load
duke
parents:
diff changeset
797 // ClearArray modifies array elements, and so affects only the
a61af66fc99e Initial load
duke
parents:
diff changeset
798 // array memory addressed by the bottom_type of its base address.
a61af66fc99e Initial load
duke
parents:
diff changeset
799 virtual const class TypePtr *adr_type() const;
a61af66fc99e Initial load
duke
parents:
diff changeset
800 virtual Node *Identity( PhaseTransform *phase );
a61af66fc99e Initial load
duke
parents:
diff changeset
801 virtual Node *Ideal(PhaseGVN *phase, bool can_reshape);
a61af66fc99e Initial load
duke
parents:
diff changeset
802 virtual uint match_edge(uint idx) const;
a61af66fc99e Initial load
duke
parents:
diff changeset
803
a61af66fc99e Initial load
duke
parents:
diff changeset
804 // Clear the given area of an object or array.
a61af66fc99e Initial load
duke
parents:
diff changeset
805 // The start offset must always be aligned mod BytesPerInt.
a61af66fc99e Initial load
duke
parents:
diff changeset
806 // The end offset must always be aligned mod BytesPerLong.
a61af66fc99e Initial load
duke
parents:
diff changeset
807 // Return the new memory.
a61af66fc99e Initial load
duke
parents:
diff changeset
808 static Node* clear_memory(Node* control, Node* mem, Node* dest,
a61af66fc99e Initial load
duke
parents:
diff changeset
809 intptr_t start_offset,
a61af66fc99e Initial load
duke
parents:
diff changeset
810 intptr_t end_offset,
a61af66fc99e Initial load
duke
parents:
diff changeset
811 PhaseGVN* phase);
a61af66fc99e Initial load
duke
parents:
diff changeset
812 static Node* clear_memory(Node* control, Node* mem, Node* dest,
a61af66fc99e Initial load
duke
parents:
diff changeset
813 intptr_t start_offset,
a61af66fc99e Initial load
duke
parents:
diff changeset
814 Node* end_offset,
a61af66fc99e Initial load
duke
parents:
diff changeset
815 PhaseGVN* phase);
a61af66fc99e Initial load
duke
parents:
diff changeset
816 static Node* clear_memory(Node* control, Node* mem, Node* dest,
a61af66fc99e Initial load
duke
parents:
diff changeset
817 Node* start_offset,
a61af66fc99e Initial load
duke
parents:
diff changeset
818 Node* end_offset,
a61af66fc99e Initial load
duke
parents:
diff changeset
819 PhaseGVN* phase);
1100
f96a1a986f7b 6895383: JCK test throws NPE for method compiled with Escape Analysis
kvn
parents: 986
diff changeset
820 // Return allocation input memory edge if it is different instance
f96a1a986f7b 6895383: JCK test throws NPE for method compiled with Escape Analysis
kvn
parents: 986
diff changeset
821 // or itself if it is the one we are looking for.
f96a1a986f7b 6895383: JCK test throws NPE for method compiled with Escape Analysis
kvn
parents: 986
diff changeset
822 static bool step_through(Node** np, uint instance_id, PhaseTransform* phase);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
823 };
a61af66fc99e Initial load
duke
parents:
diff changeset
824
2412
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
825 //------------------------------StrIntrinsic-------------------------------
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
826 // Base class for Ideal nodes used in String instrinsic code.
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
827 class StrIntrinsicNode: public Node {
0
a61af66fc99e Initial load
duke
parents:
diff changeset
828 public:
2412
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
829 StrIntrinsicNode(Node* control, Node* char_array_mem,
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
830 Node* s1, Node* c1, Node* s2, Node* c2):
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
831 Node(control, char_array_mem, s1, c1, s2, c2) {
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
832 }
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
833
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
834 StrIntrinsicNode(Node* control, Node* char_array_mem,
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
835 Node* s1, Node* s2, Node* c):
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
836 Node(control, char_array_mem, s1, s2, c) {
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
837 }
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
838
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
839 StrIntrinsicNode(Node* control, Node* char_array_mem,
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
840 Node* s1, Node* s2):
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
841 Node(control, char_array_mem, s1, s2) {
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
842 }
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
843
0
a61af66fc99e Initial load
duke
parents:
diff changeset
844 virtual bool depends_only_on_test() const { return false; }
986
62001a362ce9 6827605: new String intrinsics may prevent EA scalar replacement
kvn
parents: 985
diff changeset
845 virtual const TypePtr* adr_type() const { return TypeAryPtr::CHARS; }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
846 virtual uint match_edge(uint idx) const;
a61af66fc99e Initial load
duke
parents:
diff changeset
847 virtual uint ideal_reg() const { return Op_RegI; }
a61af66fc99e Initial load
duke
parents:
diff changeset
848 virtual Node *Ideal(PhaseGVN *phase, bool can_reshape);
4115
1bd45abaa507 6890673: Eliminate allocations immediately after EA
kvn
parents: 3961
diff changeset
849 virtual const Type *Value(PhaseTransform *phase) const;
0
a61af66fc99e Initial load
duke
parents:
diff changeset
850 };
a61af66fc99e Initial load
duke
parents:
diff changeset
851
2412
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
852 //------------------------------StrComp-------------------------------------
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
853 class StrCompNode: public StrIntrinsicNode {
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
854 public:
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
855 StrCompNode(Node* control, Node* char_array_mem,
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
856 Node* s1, Node* c1, Node* s2, Node* c2):
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
857 StrIntrinsicNode(control, char_array_mem, s1, c1, s2, c2) {};
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
858 virtual int Opcode() const;
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
859 virtual const Type* bottom_type() const { return TypeInt::INT; }
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
860 };
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
861
681
fbde8ec322d0 6761600: Use sse 4.2 in intrinsics
cfang
parents: 628
diff changeset
862 //------------------------------StrEquals-------------------------------------
2412
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
863 class StrEqualsNode: public StrIntrinsicNode {
681
fbde8ec322d0 6761600: Use sse 4.2 in intrinsics
cfang
parents: 628
diff changeset
864 public:
986
62001a362ce9 6827605: new String intrinsics may prevent EA scalar replacement
kvn
parents: 985
diff changeset
865 StrEqualsNode(Node* control, Node* char_array_mem,
2412
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
866 Node* s1, Node* s2, Node* c):
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
867 StrIntrinsicNode(control, char_array_mem, s1, s2, c) {};
681
fbde8ec322d0 6761600: Use sse 4.2 in intrinsics
cfang
parents: 628
diff changeset
868 virtual int Opcode() const;
fbde8ec322d0 6761600: Use sse 4.2 in intrinsics
cfang
parents: 628
diff changeset
869 virtual const Type* bottom_type() const { return TypeInt::BOOL; }
fbde8ec322d0 6761600: Use sse 4.2 in intrinsics
cfang
parents: 628
diff changeset
870 };
fbde8ec322d0 6761600: Use sse 4.2 in intrinsics
cfang
parents: 628
diff changeset
871
fbde8ec322d0 6761600: Use sse 4.2 in intrinsics
cfang
parents: 628
diff changeset
872 //------------------------------StrIndexOf-------------------------------------
2412
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
873 class StrIndexOfNode: public StrIntrinsicNode {
681
fbde8ec322d0 6761600: Use sse 4.2 in intrinsics
cfang
parents: 628
diff changeset
874 public:
986
62001a362ce9 6827605: new String intrinsics may prevent EA scalar replacement
kvn
parents: 985
diff changeset
875 StrIndexOfNode(Node* control, Node* char_array_mem,
2412
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
876 Node* s1, Node* c1, Node* s2, Node* c2):
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
877 StrIntrinsicNode(control, char_array_mem, s1, c1, s2, c2) {};
681
fbde8ec322d0 6761600: Use sse 4.2 in intrinsics
cfang
parents: 628
diff changeset
878 virtual int Opcode() const;
fbde8ec322d0 6761600: Use sse 4.2 in intrinsics
cfang
parents: 628
diff changeset
879 virtual const Type* bottom_type() const { return TypeInt::INT; }
fbde8ec322d0 6761600: Use sse 4.2 in intrinsics
cfang
parents: 628
diff changeset
880 };
fbde8ec322d0 6761600: Use sse 4.2 in intrinsics
cfang
parents: 628
diff changeset
881
169
9148c65abefc 6695049: (coll) Create an x86 intrinsic for Arrays.equals
rasbold
parents: 164
diff changeset
882 //------------------------------AryEq---------------------------------------
2412
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
883 class AryEqNode: public StrIntrinsicNode {
169
9148c65abefc 6695049: (coll) Create an x86 intrinsic for Arrays.equals
rasbold
parents: 164
diff changeset
884 public:
2412
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
885 AryEqNode(Node* control, Node* char_array_mem, Node* s1, Node* s2):
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
886 StrIntrinsicNode(control, char_array_mem, s1, s2) {};
169
9148c65abefc 6695049: (coll) Create an x86 intrinsic for Arrays.equals
rasbold
parents: 164
diff changeset
887 virtual int Opcode() const;
9148c65abefc 6695049: (coll) Create an x86 intrinsic for Arrays.equals
rasbold
parents: 164
diff changeset
888 virtual const Type* bottom_type() const { return TypeInt::BOOL; }
9148c65abefc 6695049: (coll) Create an x86 intrinsic for Arrays.equals
rasbold
parents: 164
diff changeset
889 };
9148c65abefc 6695049: (coll) Create an x86 intrinsic for Arrays.equals
rasbold
parents: 164
diff changeset
890
7637
b30b3c2a0cf2 6896617: Optimize sun.nio.cs.ISO_8859_1$Encode.encodeArrayLoop() on x86
kvn
parents: 6853
diff changeset
891
b30b3c2a0cf2 6896617: Optimize sun.nio.cs.ISO_8859_1$Encode.encodeArrayLoop() on x86
kvn
parents: 6853
diff changeset
892 //------------------------------EncodeISOArray--------------------------------
b30b3c2a0cf2 6896617: Optimize sun.nio.cs.ISO_8859_1$Encode.encodeArrayLoop() on x86
kvn
parents: 6853
diff changeset
893 // encode char[] to byte[] in ISO_8859_1
b30b3c2a0cf2 6896617: Optimize sun.nio.cs.ISO_8859_1$Encode.encodeArrayLoop() on x86
kvn
parents: 6853
diff changeset
894 class EncodeISOArrayNode: public Node {
b30b3c2a0cf2 6896617: Optimize sun.nio.cs.ISO_8859_1$Encode.encodeArrayLoop() on x86
kvn
parents: 6853
diff changeset
895 public:
b30b3c2a0cf2 6896617: Optimize sun.nio.cs.ISO_8859_1$Encode.encodeArrayLoop() on x86
kvn
parents: 6853
diff changeset
896 EncodeISOArrayNode(Node *control, Node* arymem, Node* s1, Node* s2, Node* c): Node(control, arymem, s1, s2, c) {};
b30b3c2a0cf2 6896617: Optimize sun.nio.cs.ISO_8859_1$Encode.encodeArrayLoop() on x86
kvn
parents: 6853
diff changeset
897 virtual int Opcode() const;
b30b3c2a0cf2 6896617: Optimize sun.nio.cs.ISO_8859_1$Encode.encodeArrayLoop() on x86
kvn
parents: 6853
diff changeset
898 virtual bool depends_only_on_test() const { return false; }
b30b3c2a0cf2 6896617: Optimize sun.nio.cs.ISO_8859_1$Encode.encodeArrayLoop() on x86
kvn
parents: 6853
diff changeset
899 virtual const Type* bottom_type() const { return TypeInt::INT; }
b30b3c2a0cf2 6896617: Optimize sun.nio.cs.ISO_8859_1$Encode.encodeArrayLoop() on x86
kvn
parents: 6853
diff changeset
900 virtual const TypePtr* adr_type() const { return TypePtr::BOTTOM; }
b30b3c2a0cf2 6896617: Optimize sun.nio.cs.ISO_8859_1$Encode.encodeArrayLoop() on x86
kvn
parents: 6853
diff changeset
901 virtual uint match_edge(uint idx) const;
b30b3c2a0cf2 6896617: Optimize sun.nio.cs.ISO_8859_1$Encode.encodeArrayLoop() on x86
kvn
parents: 6853
diff changeset
902 virtual uint ideal_reg() const { return Op_RegI; }
b30b3c2a0cf2 6896617: Optimize sun.nio.cs.ISO_8859_1$Encode.encodeArrayLoop() on x86
kvn
parents: 6853
diff changeset
903 virtual Node *Ideal(PhaseGVN *phase, bool can_reshape);
b30b3c2a0cf2 6896617: Optimize sun.nio.cs.ISO_8859_1$Encode.encodeArrayLoop() on x86
kvn
parents: 6853
diff changeset
904 virtual const Type *Value(PhaseTransform *phase) const;
b30b3c2a0cf2 6896617: Optimize sun.nio.cs.ISO_8859_1$Encode.encodeArrayLoop() on x86
kvn
parents: 6853
diff changeset
905 };
b30b3c2a0cf2 6896617: Optimize sun.nio.cs.ISO_8859_1$Encode.encodeArrayLoop() on x86
kvn
parents: 6853
diff changeset
906
0
a61af66fc99e Initial load
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parents:
diff changeset
907 //------------------------------MemBar-----------------------------------------
a61af66fc99e Initial load
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parents:
diff changeset
908 // There are different flavors of Memory Barriers to match the Java Memory
a61af66fc99e Initial load
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parents:
diff changeset
909 // Model. Monitor-enter and volatile-load act as Aquires: no following ref
a61af66fc99e Initial load
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parents:
diff changeset
910 // can be moved to before them. We insert a MemBar-Acquire after a FastLock or
a61af66fc99e Initial load
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parents:
diff changeset
911 // volatile-load. Monitor-exit and volatile-store act as Release: no
605
98cb887364d3 6810672: Comment typos
twisti
parents: 558
diff changeset
912 // preceding ref can be moved to after them. We insert a MemBar-Release
0
a61af66fc99e Initial load
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parents:
diff changeset
913 // before a FastUnlock or volatile-store. All volatiles need to be
a61af66fc99e Initial load
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parents:
diff changeset
914 // serialized, so we follow all volatile-stores with a MemBar-Volatile to
605
98cb887364d3 6810672: Comment typos
twisti
parents: 558
diff changeset
915 // separate it from any following volatile-load.
0
a61af66fc99e Initial load
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parents:
diff changeset
916 class MemBarNode: public MultiNode {
a61af66fc99e Initial load
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parents:
diff changeset
917 virtual uint hash() const ; // { return NO_HASH; }
a61af66fc99e Initial load
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parents:
diff changeset
918 virtual uint cmp( const Node &n ) const ; // Always fail, except on self
a61af66fc99e Initial load
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parents:
diff changeset
919
a61af66fc99e Initial load
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parents:
diff changeset
920 virtual uint size_of() const { return sizeof(*this); }
a61af66fc99e Initial load
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parents:
diff changeset
921 // Memory type this node is serializing. Usually either rawptr or bottom.
a61af66fc99e Initial load
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parents:
diff changeset
922 const TypePtr* _adr_type;
a61af66fc99e Initial load
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parents:
diff changeset
923
a61af66fc99e Initial load
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parents:
diff changeset
924 public:
a61af66fc99e Initial load
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parents:
diff changeset
925 enum {
a61af66fc99e Initial load
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parents:
diff changeset
926 Precedent = TypeFunc::Parms // optional edge to force precedence
a61af66fc99e Initial load
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parents:
diff changeset
927 };
a61af66fc99e Initial load
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parents:
diff changeset
928 MemBarNode(Compile* C, int alias_idx, Node* precedent);
a61af66fc99e Initial load
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parents:
diff changeset
929 virtual int Opcode() const = 0;
a61af66fc99e Initial load
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parents:
diff changeset
930 virtual const class TypePtr *adr_type() const { return _adr_type; }
a61af66fc99e Initial load
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parents:
diff changeset
931 virtual const Type *Value( PhaseTransform *phase ) const;
a61af66fc99e Initial load
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parents:
diff changeset
932 virtual Node *Ideal(PhaseGVN *phase, bool can_reshape);
a61af66fc99e Initial load
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parents:
diff changeset
933 virtual uint match_edge(uint idx) const { return 0; }
a61af66fc99e Initial load
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parents:
diff changeset
934 virtual const Type *bottom_type() const { return TypeTuple::MEMBAR; }
a61af66fc99e Initial load
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parents:
diff changeset
935 virtual Node *match( const ProjNode *proj, const Matcher *m );
a61af66fc99e Initial load
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parents:
diff changeset
936 // Factory method. Builds a wide or narrow membar.
a61af66fc99e Initial load
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parents:
diff changeset
937 // Optional 'precedent' becomes an extra edge if not null.
a61af66fc99e Initial load
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parents:
diff changeset
938 static MemBarNode* make(Compile* C, int opcode,
a61af66fc99e Initial load
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parents:
diff changeset
939 int alias_idx = Compile::AliasIdxBot,
a61af66fc99e Initial load
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parents:
diff changeset
940 Node* precedent = NULL);
a61af66fc99e Initial load
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parents:
diff changeset
941 };
a61af66fc99e Initial load
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parents:
diff changeset
942
a61af66fc99e Initial load
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parents:
diff changeset
943 // "Acquire" - no following ref can move before (but earlier refs can
a61af66fc99e Initial load
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parents:
diff changeset
944 // follow, like an early Load stalled in cache). Requires multi-cpu
3849
f1c12354c3f7 7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents: 2426
diff changeset
945 // visibility. Inserted after a volatile load.
0
a61af66fc99e Initial load
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parents:
diff changeset
946 class MemBarAcquireNode: public MemBarNode {
a61af66fc99e Initial load
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parents:
diff changeset
947 public:
a61af66fc99e Initial load
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parents:
diff changeset
948 MemBarAcquireNode(Compile* C, int alias_idx, Node* precedent)
a61af66fc99e Initial load
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parents:
diff changeset
949 : MemBarNode(C, alias_idx, precedent) {}
a61af66fc99e Initial load
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parents:
diff changeset
950 virtual int Opcode() const;
a61af66fc99e Initial load
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parents:
diff changeset
951 };
a61af66fc99e Initial load
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parents:
diff changeset
952
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parents:
diff changeset
953 // "Release" - no earlier ref can move after (but later refs can move
a61af66fc99e Initial load
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parents:
diff changeset
954 // up, like a speculative pipelined cache-hitting Load). Requires
3849
f1c12354c3f7 7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents: 2426
diff changeset
955 // multi-cpu visibility. Inserted before a volatile store.
0
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parents:
diff changeset
956 class MemBarReleaseNode: public MemBarNode {
a61af66fc99e Initial load
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parents:
diff changeset
957 public:
a61af66fc99e Initial load
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parents:
diff changeset
958 MemBarReleaseNode(Compile* C, int alias_idx, Node* precedent)
a61af66fc99e Initial load
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parents:
diff changeset
959 : MemBarNode(C, alias_idx, precedent) {}
a61af66fc99e Initial load
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parents:
diff changeset
960 virtual int Opcode() const;
a61af66fc99e Initial load
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parents:
diff changeset
961 };
a61af66fc99e Initial load
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parents:
diff changeset
962
3849
f1c12354c3f7 7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents: 2426
diff changeset
963 // "Acquire" - no following ref can move before (but earlier refs can
f1c12354c3f7 7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents: 2426
diff changeset
964 // follow, like an early Load stalled in cache). Requires multi-cpu
f1c12354c3f7 7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents: 2426
diff changeset
965 // visibility. Inserted after a FastLock.
f1c12354c3f7 7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents: 2426
diff changeset
966 class MemBarAcquireLockNode: public MemBarNode {
f1c12354c3f7 7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents: 2426
diff changeset
967 public:
f1c12354c3f7 7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents: 2426
diff changeset
968 MemBarAcquireLockNode(Compile* C, int alias_idx, Node* precedent)
f1c12354c3f7 7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents: 2426
diff changeset
969 : MemBarNode(C, alias_idx, precedent) {}
f1c12354c3f7 7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents: 2426
diff changeset
970 virtual int Opcode() const;
f1c12354c3f7 7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents: 2426
diff changeset
971 };
f1c12354c3f7 7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents: 2426
diff changeset
972
f1c12354c3f7 7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents: 2426
diff changeset
973 // "Release" - no earlier ref can move after (but later refs can move
f1c12354c3f7 7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents: 2426
diff changeset
974 // up, like a speculative pipelined cache-hitting Load). Requires
f1c12354c3f7 7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents: 2426
diff changeset
975 // multi-cpu visibility. Inserted before a FastUnLock.
f1c12354c3f7 7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents: 2426
diff changeset
976 class MemBarReleaseLockNode: public MemBarNode {
f1c12354c3f7 7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents: 2426
diff changeset
977 public:
f1c12354c3f7 7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents: 2426
diff changeset
978 MemBarReleaseLockNode(Compile* C, int alias_idx, Node* precedent)
f1c12354c3f7 7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents: 2426
diff changeset
979 : MemBarNode(C, alias_idx, precedent) {}
f1c12354c3f7 7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents: 2426
diff changeset
980 virtual int Opcode() const;
f1c12354c3f7 7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents: 2426
diff changeset
981 };
f1c12354c3f7 7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents: 2426
diff changeset
982
4763
1dc233a8c7fe 7121140: Allocation paths require explicit memory synchronization operations for RMO systems
roland
parents: 4115
diff changeset
983 class MemBarStoreStoreNode: public MemBarNode {
1dc233a8c7fe 7121140: Allocation paths require explicit memory synchronization operations for RMO systems
roland
parents: 4115
diff changeset
984 public:
1dc233a8c7fe 7121140: Allocation paths require explicit memory synchronization operations for RMO systems
roland
parents: 4115
diff changeset
985 MemBarStoreStoreNode(Compile* C, int alias_idx, Node* precedent)
1dc233a8c7fe 7121140: Allocation paths require explicit memory synchronization operations for RMO systems
roland
parents: 4115
diff changeset
986 : MemBarNode(C, alias_idx, precedent) {
1dc233a8c7fe 7121140: Allocation paths require explicit memory synchronization operations for RMO systems
roland
parents: 4115
diff changeset
987 init_class_id(Class_MemBarStoreStore);
1dc233a8c7fe 7121140: Allocation paths require explicit memory synchronization operations for RMO systems
roland
parents: 4115
diff changeset
988 }
1dc233a8c7fe 7121140: Allocation paths require explicit memory synchronization operations for RMO systems
roland
parents: 4115
diff changeset
989 virtual int Opcode() const;
1dc233a8c7fe 7121140: Allocation paths require explicit memory synchronization operations for RMO systems
roland
parents: 4115
diff changeset
990 };
1dc233a8c7fe 7121140: Allocation paths require explicit memory synchronization operations for RMO systems
roland
parents: 4115
diff changeset
991
0
a61af66fc99e Initial load
duke
parents:
diff changeset
992 // Ordering between a volatile store and a following volatile load.
a61af66fc99e Initial load
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parents:
diff changeset
993 // Requires multi-CPU visibility?
a61af66fc99e Initial load
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parents:
diff changeset
994 class MemBarVolatileNode: public MemBarNode {
a61af66fc99e Initial load
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parents:
diff changeset
995 public:
a61af66fc99e Initial load
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parents:
diff changeset
996 MemBarVolatileNode(Compile* C, int alias_idx, Node* precedent)
a61af66fc99e Initial load
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parents:
diff changeset
997 : MemBarNode(C, alias_idx, precedent) {}
a61af66fc99e Initial load
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parents:
diff changeset
998 virtual int Opcode() const;
a61af66fc99e Initial load
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parents:
diff changeset
999 };
a61af66fc99e Initial load
duke
parents:
diff changeset
1000
a61af66fc99e Initial load
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parents:
diff changeset
1001 // Ordering within the same CPU. Used to order unsafe memory references
a61af66fc99e Initial load
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parents:
diff changeset
1002 // inside the compiler when we lack alias info. Not needed "outside" the
a61af66fc99e Initial load
duke
parents:
diff changeset
1003 // compiler because the CPU does all the ordering for us.
a61af66fc99e Initial load
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parents:
diff changeset
1004 class MemBarCPUOrderNode: public MemBarNode {
a61af66fc99e Initial load
duke
parents:
diff changeset
1005 public:
a61af66fc99e Initial load
duke
parents:
diff changeset
1006 MemBarCPUOrderNode(Compile* C, int alias_idx, Node* precedent)
a61af66fc99e Initial load
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parents:
diff changeset
1007 : MemBarNode(C, alias_idx, precedent) {}
a61af66fc99e Initial load
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parents:
diff changeset
1008 virtual int Opcode() const;
a61af66fc99e Initial load
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parents:
diff changeset
1009 virtual uint ideal_reg() const { return 0; } // not matched in the AD file
a61af66fc99e Initial load
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parents:
diff changeset
1010 };
a61af66fc99e Initial load
duke
parents:
diff changeset
1011
a61af66fc99e Initial load
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parents:
diff changeset
1012 // Isolation of object setup after an AllocateNode and before next safepoint.
a61af66fc99e Initial load
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parents:
diff changeset
1013 // (See comment in memnode.cpp near InitializeNode::InitializeNode for semantics.)
a61af66fc99e Initial load
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parents:
diff changeset
1014 class InitializeNode: public MemBarNode {
a61af66fc99e Initial load
duke
parents:
diff changeset
1015 friend class AllocateNode;
a61af66fc99e Initial load
duke
parents:
diff changeset
1016
3961
a92cdbac8b9e 7081933: Use zeroing elimination optimization for large array
kvn
parents: 3854
diff changeset
1017 enum {
a92cdbac8b9e 7081933: Use zeroing elimination optimization for large array
kvn
parents: 3854
diff changeset
1018 Incomplete = 0,
a92cdbac8b9e 7081933: Use zeroing elimination optimization for large array
kvn
parents: 3854
diff changeset
1019 Complete = 1,
a92cdbac8b9e 7081933: Use zeroing elimination optimization for large array
kvn
parents: 3854
diff changeset
1020 WithArraycopy = 2
a92cdbac8b9e 7081933: Use zeroing elimination optimization for large array
kvn
parents: 3854
diff changeset
1021 };
a92cdbac8b9e 7081933: Use zeroing elimination optimization for large array
kvn
parents: 3854
diff changeset
1022 int _is_complete;
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1023
4763
1dc233a8c7fe 7121140: Allocation paths require explicit memory synchronization operations for RMO systems
roland
parents: 4115
diff changeset
1024 bool _does_not_escape;
1dc233a8c7fe 7121140: Allocation paths require explicit memory synchronization operations for RMO systems
roland
parents: 4115
diff changeset
1025
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1026 public:
a61af66fc99e Initial load
duke
parents:
diff changeset
1027 enum {
a61af66fc99e Initial load
duke
parents:
diff changeset
1028 Control = TypeFunc::Control,
a61af66fc99e Initial load
duke
parents:
diff changeset
1029 Memory = TypeFunc::Memory, // MergeMem for states affected by this op
a61af66fc99e Initial load
duke
parents:
diff changeset
1030 RawAddress = TypeFunc::Parms+0, // the newly-allocated raw address
a61af66fc99e Initial load
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parents:
diff changeset
1031 RawStores = TypeFunc::Parms+1 // zero or more stores (or TOP)
a61af66fc99e Initial load
duke
parents:
diff changeset
1032 };
a61af66fc99e Initial load
duke
parents:
diff changeset
1033
a61af66fc99e Initial load
duke
parents:
diff changeset
1034 InitializeNode(Compile* C, int adr_type, Node* rawoop);
a61af66fc99e Initial load
duke
parents:
diff changeset
1035 virtual int Opcode() const;
a61af66fc99e Initial load
duke
parents:
diff changeset
1036 virtual uint size_of() const { return sizeof(*this); }
a61af66fc99e Initial load
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parents:
diff changeset
1037 virtual uint ideal_reg() const { return 0; } // not matched in the AD file
a61af66fc99e Initial load
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parents:
diff changeset
1038 virtual const RegMask &in_RegMask(uint) const; // mask for RawAddress
a61af66fc99e Initial load
duke
parents:
diff changeset
1039
a61af66fc99e Initial load
duke
parents:
diff changeset
1040 // Manage incoming memory edges via a MergeMem on in(Memory):
a61af66fc99e Initial load
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parents:
diff changeset
1041 Node* memory(uint alias_idx);
a61af66fc99e Initial load
duke
parents:
diff changeset
1042
a61af66fc99e Initial load
duke
parents:
diff changeset
1043 // The raw memory edge coming directly from the Allocation.
a61af66fc99e Initial load
duke
parents:
diff changeset
1044 // The contents of this memory are *always* all-zero-bits.
a61af66fc99e Initial load
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parents:
diff changeset
1045 Node* zero_memory() { return memory(Compile::AliasIdxRaw); }
a61af66fc99e Initial load
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parents:
diff changeset
1046
a61af66fc99e Initial load
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parents:
diff changeset
1047 // Return the corresponding allocation for this initialization (or null if none).
a61af66fc99e Initial load
duke
parents:
diff changeset
1048 // (Note: Both InitializeNode::allocation and AllocateNode::initialization
a61af66fc99e Initial load
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parents:
diff changeset
1049 // are defined in graphKit.cpp, which sets up the bidirectional relation.)
a61af66fc99e Initial load
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parents:
diff changeset
1050 AllocateNode* allocation();
a61af66fc99e Initial load
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parents:
diff changeset
1051
a61af66fc99e Initial load
duke
parents:
diff changeset
1052 // Anything other than zeroing in this init?
a61af66fc99e Initial load
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parents:
diff changeset
1053 bool is_non_zero();
a61af66fc99e Initial load
duke
parents:
diff changeset
1054
a61af66fc99e Initial load
duke
parents:
diff changeset
1055 // An InitializeNode must completed before macro expansion is done.
a61af66fc99e Initial load
duke
parents:
diff changeset
1056 // Completion requires that the AllocateNode must be followed by
a61af66fc99e Initial load
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parents:
diff changeset
1057 // initialization of the new memory to zero, then to any initializers.
3961
a92cdbac8b9e 7081933: Use zeroing elimination optimization for large array
kvn
parents: 3854
diff changeset
1058 bool is_complete() { return _is_complete != Incomplete; }
a92cdbac8b9e 7081933: Use zeroing elimination optimization for large array
kvn
parents: 3854
diff changeset
1059 bool is_complete_with_arraycopy() { return (_is_complete & WithArraycopy) != 0; }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1060
a61af66fc99e Initial load
duke
parents:
diff changeset
1061 // Mark complete. (Must not yet be complete.)
a61af66fc99e Initial load
duke
parents:
diff changeset
1062 void set_complete(PhaseGVN* phase);
3961
a92cdbac8b9e 7081933: Use zeroing elimination optimization for large array
kvn
parents: 3854
diff changeset
1063 void set_complete_with_arraycopy() { _is_complete = Complete | WithArraycopy; }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1064
4763
1dc233a8c7fe 7121140: Allocation paths require explicit memory synchronization operations for RMO systems
roland
parents: 4115
diff changeset
1065 bool does_not_escape() { return _does_not_escape; }
1dc233a8c7fe 7121140: Allocation paths require explicit memory synchronization operations for RMO systems
roland
parents: 4115
diff changeset
1066 void set_does_not_escape() { _does_not_escape = true; }
1dc233a8c7fe 7121140: Allocation paths require explicit memory synchronization operations for RMO systems
roland
parents: 4115
diff changeset
1067
0
a61af66fc99e Initial load
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parents:
diff changeset
1068 #ifdef ASSERT
a61af66fc99e Initial load
duke
parents:
diff changeset
1069 // ensure all non-degenerate stores are ordered and non-overlapping
a61af66fc99e Initial load
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parents:
diff changeset
1070 bool stores_are_sane(PhaseTransform* phase);
a61af66fc99e Initial load
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parents:
diff changeset
1071 #endif //ASSERT
a61af66fc99e Initial load
duke
parents:
diff changeset
1072
a61af66fc99e Initial load
duke
parents:
diff changeset
1073 // See if this store can be captured; return offset where it initializes.
a61af66fc99e Initial load
duke
parents:
diff changeset
1074 // Return 0 if the store cannot be moved (any sort of problem).
8116
6931f425c517 8007294: ReduceFieldZeroing doesn't check for dependent load and can lead to incorrect execution
roland
parents: 7637
diff changeset
1075 intptr_t can_capture_store(StoreNode* st, PhaseTransform* phase, bool can_reshape);
0
a61af66fc99e Initial load
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parents:
diff changeset
1076
a61af66fc99e Initial load
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parents:
diff changeset
1077 // Capture another store; reformat it to write my internal raw memory.
a61af66fc99e Initial load
duke
parents:
diff changeset
1078 // Return the captured copy, else NULL if there is some sort of problem.
8116
6931f425c517 8007294: ReduceFieldZeroing doesn't check for dependent load and can lead to incorrect execution
roland
parents: 7637
diff changeset
1079 Node* capture_store(StoreNode* st, intptr_t start, PhaseTransform* phase, bool can_reshape);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1080
a61af66fc99e Initial load
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parents:
diff changeset
1081 // Find captured store which corresponds to the range [start..start+size).
a61af66fc99e Initial load
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parents:
diff changeset
1082 // Return my own memory projection (meaning the initial zero bits)
a61af66fc99e Initial load
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parents:
diff changeset
1083 // if there is no such store. Return NULL if there is a problem.
a61af66fc99e Initial load
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diff changeset
1084 Node* find_captured_store(intptr_t start, int size_in_bytes, PhaseTransform* phase);
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parents:
diff changeset
1085
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parents:
diff changeset
1086 // Called when the associated AllocateNode is expanded into CFG.
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parents:
diff changeset
1087 Node* complete_stores(Node* rawctl, Node* rawmem, Node* rawptr,
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parents:
diff changeset
1088 intptr_t header_size, Node* size_in_bytes,
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parents:
diff changeset
1089 PhaseGVN* phase);
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parents:
diff changeset
1090
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parents:
diff changeset
1091 private:
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parents:
diff changeset
1092 void remove_extra_zeroes();
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parents:
diff changeset
1093
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parents:
diff changeset
1094 // Find out where a captured store should be placed (or already is placed).
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parents:
diff changeset
1095 int captured_store_insertion_point(intptr_t start, int size_in_bytes,
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parents:
diff changeset
1096 PhaseTransform* phase);
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parents:
diff changeset
1097
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parents:
diff changeset
1098 static intptr_t get_store_offset(Node* st, PhaseTransform* phase);
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parents:
diff changeset
1099
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diff changeset
1100 Node* make_raw_address(intptr_t offset, PhaseTransform* phase);
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diff changeset
1101
10278
6f3fd5150b67 6934604: enable parts of EliminateAutoBox by default
kvn
parents: 8116
diff changeset
1102 bool detect_init_independence(Node* n, int& count);
0
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diff changeset
1103
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parents:
diff changeset
1104 void coalesce_subword_stores(intptr_t header_size, Node* size_in_bytes,
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parents:
diff changeset
1105 PhaseGVN* phase);
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parents:
diff changeset
1106
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parents:
diff changeset
1107 intptr_t find_next_fullword_store(uint i, PhaseGVN* phase);
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parents:
diff changeset
1108 };
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parents:
diff changeset
1109
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parents:
diff changeset
1110 //------------------------------MergeMem---------------------------------------
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parents:
diff changeset
1111 // (See comment in memnode.cpp near MergeMemNode::MergeMemNode for semantics.)
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parents:
diff changeset
1112 class MergeMemNode: public Node {
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parents:
diff changeset
1113 virtual uint hash() const ; // { return NO_HASH; }
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parents:
diff changeset
1114 virtual uint cmp( const Node &n ) const ; // Always fail, except on self
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parents:
diff changeset
1115 friend class MergeMemStream;
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parents:
diff changeset
1116 MergeMemNode(Node* def); // clients use MergeMemNode::make
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parents:
diff changeset
1117
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parents:
diff changeset
1118 public:
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parents:
diff changeset
1119 // If the input is a whole memory state, clone it with all its slices intact.
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parents:
diff changeset
1120 // Otherwise, make a new memory state with just that base memory input.
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parents:
diff changeset
1121 // In either case, the result is a newly created MergeMem.
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parents:
diff changeset
1122 static MergeMemNode* make(Compile* C, Node* base_memory);
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diff changeset
1123
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parents:
diff changeset
1124 virtual int Opcode() const;
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diff changeset
1125 virtual Node *Identity( PhaseTransform *phase );
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diff changeset
1126 virtual Node *Ideal(PhaseGVN *phase, bool can_reshape);
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diff changeset
1127 virtual uint ideal_reg() const { return NotAMachineReg; }
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diff changeset
1128 virtual uint match_edge(uint idx) const { return 0; }
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parents:
diff changeset
1129 virtual const RegMask &out_RegMask() const;
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parents:
diff changeset
1130 virtual const Type *bottom_type() const { return Type::MEMORY; }
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parents:
diff changeset
1131 virtual const TypePtr *adr_type() const { return TypePtr::BOTTOM; }
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parents:
diff changeset
1132 // sparse accessors
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diff changeset
1133 // Fetch the previously stored "set_memory_at", or else the base memory.
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parents:
diff changeset
1134 // (Caller should clone it if it is a phi-nest.)
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diff changeset
1135 Node* memory_at(uint alias_idx) const;
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parents:
diff changeset
1136 // set the memory, regardless of its previous value
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diff changeset
1137 void set_memory_at(uint alias_idx, Node* n);
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parents:
diff changeset
1138 // the "base" is the memory that provides the non-finite support
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parents:
diff changeset
1139 Node* base_memory() const { return in(Compile::AliasIdxBot); }
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parents:
diff changeset
1140 // warning: setting the base can implicitly set any of the other slices too
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parents:
diff changeset
1141 void set_base_memory(Node* def);
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parents:
diff changeset
1142 // sentinel value which denotes a copy of the base memory:
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parents:
diff changeset
1143 Node* empty_memory() const { return in(Compile::AliasIdxTop); }
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parents:
diff changeset
1144 static Node* make_empty_memory(); // where the sentinel comes from
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parents:
diff changeset
1145 bool is_empty_memory(Node* n) const { assert((n == empty_memory()) == n->is_top(), "sanity"); return n->is_top(); }
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parents:
diff changeset
1146 // hook for the iterator, to perform any necessary setup
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parents:
diff changeset
1147 void iteration_setup(const MergeMemNode* other = NULL);
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parents:
diff changeset
1148 // push sentinels until I am at least as long as the other (semantic no-op)
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parents:
diff changeset
1149 void grow_to_match(const MergeMemNode* other);
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parents:
diff changeset
1150 bool verify_sparse() const PRODUCT_RETURN0;
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parents:
diff changeset
1151 #ifndef PRODUCT
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parents:
diff changeset
1152 virtual void dump_spec(outputStream *st) const;
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parents:
diff changeset
1153 #endif
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parents:
diff changeset
1154 };
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parents:
diff changeset
1155
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parents:
diff changeset
1156 class MergeMemStream : public StackObj {
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parents:
diff changeset
1157 private:
a61af66fc99e Initial load
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parents:
diff changeset
1158 MergeMemNode* _mm;
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parents:
diff changeset
1159 const MergeMemNode* _mm2; // optional second guy, contributes non-empty iterations
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parents:
diff changeset
1160 Node* _mm_base; // loop-invariant base memory of _mm
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parents:
diff changeset
1161 int _idx;
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parents:
diff changeset
1162 int _cnt;
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parents:
diff changeset
1163 Node* _mem;
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parents:
diff changeset
1164 Node* _mem2;
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parents:
diff changeset
1165 int _cnt2;
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parents:
diff changeset
1166
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parents:
diff changeset
1167 void init(MergeMemNode* mm, const MergeMemNode* mm2 = NULL) {
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parents:
diff changeset
1168 // subsume_node will break sparseness at times, whenever a memory slice
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parents:
diff changeset
1169 // folds down to a copy of the base ("fat") memory. In such a case,
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parents:
diff changeset
1170 // the raw edge will update to base, although it should be top.
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parents:
diff changeset
1171 // This iterator will recognize either top or base_memory as an
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parents:
diff changeset
1172 // "empty" slice. See is_empty, is_empty2, and next below.
a61af66fc99e Initial load
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parents:
diff changeset
1173 //
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parents:
diff changeset
1174 // The sparseness property is repaired in MergeMemNode::Ideal.
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parents:
diff changeset
1175 // As long as access to a MergeMem goes through this iterator
a61af66fc99e Initial load
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parents:
diff changeset
1176 // or the memory_at accessor, flaws in the sparseness will
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parents:
diff changeset
1177 // never be observed.
a61af66fc99e Initial load
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parents:
diff changeset
1178 //
a61af66fc99e Initial load
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parents:
diff changeset
1179 // Also, iteration_setup repairs sparseness.
a61af66fc99e Initial load
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parents:
diff changeset
1180 assert(mm->verify_sparse(), "please, no dups of base");
a61af66fc99e Initial load
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parents:
diff changeset
1181 assert(mm2==NULL || mm2->verify_sparse(), "please, no dups of base");
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parents:
diff changeset
1182
a61af66fc99e Initial load
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parents:
diff changeset
1183 _mm = mm;
a61af66fc99e Initial load
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parents:
diff changeset
1184 _mm_base = mm->base_memory();
a61af66fc99e Initial load
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parents:
diff changeset
1185 _mm2 = mm2;
a61af66fc99e Initial load
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parents:
diff changeset
1186 _cnt = mm->req();
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parents:
diff changeset
1187 _idx = Compile::AliasIdxBot-1; // start at the base memory
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parents:
diff changeset
1188 _mem = NULL;
a61af66fc99e Initial load
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parents:
diff changeset
1189 _mem2 = NULL;
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parents:
diff changeset
1190 }
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parents:
diff changeset
1191
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parents:
diff changeset
1192 #ifdef ASSERT
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parents:
diff changeset
1193 Node* check_memory() const {
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parents:
diff changeset
1194 if (at_base_memory())
a61af66fc99e Initial load
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parents:
diff changeset
1195 return _mm->base_memory();
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parents:
diff changeset
1196 else if ((uint)_idx < _mm->req() && !_mm->in(_idx)->is_top())
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parents:
diff changeset
1197 return _mm->memory_at(_idx);
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parents:
diff changeset
1198 else
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parents:
diff changeset
1199 return _mm_base;
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parents:
diff changeset
1200 }
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parents:
diff changeset
1201 Node* check_memory2() const {
a61af66fc99e Initial load
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parents:
diff changeset
1202 return at_base_memory()? _mm2->base_memory(): _mm2->memory_at(_idx);
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parents:
diff changeset
1203 }
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parents:
diff changeset
1204 #endif
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parents:
diff changeset
1205
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parents:
diff changeset
1206 static bool match_memory(Node* mem, const MergeMemNode* mm, int idx) PRODUCT_RETURN0;
a61af66fc99e Initial load
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parents:
diff changeset
1207 void assert_synch() const {
a61af66fc99e Initial load
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parents:
diff changeset
1208 assert(!_mem || _idx >= _cnt || match_memory(_mem, _mm, _idx),
a61af66fc99e Initial load
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parents:
diff changeset
1209 "no side-effects except through the stream");
a61af66fc99e Initial load
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parents:
diff changeset
1210 }
a61af66fc99e Initial load
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parents:
diff changeset
1211
a61af66fc99e Initial load
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parents:
diff changeset
1212 public:
a61af66fc99e Initial load
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parents:
diff changeset
1213
a61af66fc99e Initial load
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parents:
diff changeset
1214 // expected usages:
a61af66fc99e Initial load
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parents:
diff changeset
1215 // for (MergeMemStream mms(mem->is_MergeMem()); next_non_empty(); ) { ... }
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parents:
diff changeset
1216 // for (MergeMemStream mms(mem1, mem2); next_non_empty2(); ) { ... }
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parents:
diff changeset
1217
a61af66fc99e Initial load
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parents:
diff changeset
1218 // iterate over one merge
a61af66fc99e Initial load
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parents:
diff changeset
1219 MergeMemStream(MergeMemNode* mm) {
a61af66fc99e Initial load
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parents:
diff changeset
1220 mm->iteration_setup();
a61af66fc99e Initial load
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parents:
diff changeset
1221 init(mm);
a61af66fc99e Initial load
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parents:
diff changeset
1222 debug_only(_cnt2 = 999);
a61af66fc99e Initial load
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parents:
diff changeset
1223 }
a61af66fc99e Initial load
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parents:
diff changeset
1224 // iterate in parallel over two merges
a61af66fc99e Initial load
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parents:
diff changeset
1225 // only iterates through non-empty elements of mm2
a61af66fc99e Initial load
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parents:
diff changeset
1226 MergeMemStream(MergeMemNode* mm, const MergeMemNode* mm2) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1227 assert(mm2, "second argument must be a MergeMem also");
a61af66fc99e Initial load
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parents:
diff changeset
1228 ((MergeMemNode*)mm2)->iteration_setup(); // update hidden state
a61af66fc99e Initial load
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parents:
diff changeset
1229 mm->iteration_setup(mm2);
a61af66fc99e Initial load
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parents:
diff changeset
1230 init(mm, mm2);
a61af66fc99e Initial load
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parents:
diff changeset
1231 _cnt2 = mm2->req();
a61af66fc99e Initial load
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parents:
diff changeset
1232 }
a61af66fc99e Initial load
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parents:
diff changeset
1233 #ifdef ASSERT
a61af66fc99e Initial load
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parents:
diff changeset
1234 ~MergeMemStream() {
a61af66fc99e Initial load
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parents:
diff changeset
1235 assert_synch();
a61af66fc99e Initial load
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parents:
diff changeset
1236 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1237 #endif
a61af66fc99e Initial load
duke
parents:
diff changeset
1238
a61af66fc99e Initial load
duke
parents:
diff changeset
1239 MergeMemNode* all_memory() const {
a61af66fc99e Initial load
duke
parents:
diff changeset
1240 return _mm;
a61af66fc99e Initial load
duke
parents:
diff changeset
1241 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1242 Node* base_memory() const {
a61af66fc99e Initial load
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parents:
diff changeset
1243 assert(_mm_base == _mm->base_memory(), "no update to base memory, please");
a61af66fc99e Initial load
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parents:
diff changeset
1244 return _mm_base;
a61af66fc99e Initial load
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parents:
diff changeset
1245 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1246 const MergeMemNode* all_memory2() const {
a61af66fc99e Initial load
duke
parents:
diff changeset
1247 assert(_mm2 != NULL, "");
a61af66fc99e Initial load
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parents:
diff changeset
1248 return _mm2;
a61af66fc99e Initial load
duke
parents:
diff changeset
1249 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1250 bool at_base_memory() const {
a61af66fc99e Initial load
duke
parents:
diff changeset
1251 return _idx == Compile::AliasIdxBot;
a61af66fc99e Initial load
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parents:
diff changeset
1252 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1253 int alias_idx() const {
a61af66fc99e Initial load
duke
parents:
diff changeset
1254 assert(_mem, "must call next 1st");
a61af66fc99e Initial load
duke
parents:
diff changeset
1255 return _idx;
a61af66fc99e Initial load
duke
parents:
diff changeset
1256 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1257
a61af66fc99e Initial load
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parents:
diff changeset
1258 const TypePtr* adr_type() const {
a61af66fc99e Initial load
duke
parents:
diff changeset
1259 return Compile::current()->get_adr_type(alias_idx());
a61af66fc99e Initial load
duke
parents:
diff changeset
1260 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1261
a61af66fc99e Initial load
duke
parents:
diff changeset
1262 const TypePtr* adr_type(Compile* C) const {
a61af66fc99e Initial load
duke
parents:
diff changeset
1263 return C->get_adr_type(alias_idx());
a61af66fc99e Initial load
duke
parents:
diff changeset
1264 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1265 bool is_empty() const {
a61af66fc99e Initial load
duke
parents:
diff changeset
1266 assert(_mem, "must call next 1st");
a61af66fc99e Initial load
duke
parents:
diff changeset
1267 assert(_mem->is_top() == (_mem==_mm->empty_memory()), "correct sentinel");
a61af66fc99e Initial load
duke
parents:
diff changeset
1268 return _mem->is_top();
a61af66fc99e Initial load
duke
parents:
diff changeset
1269 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1270 bool is_empty2() const {
a61af66fc99e Initial load
duke
parents:
diff changeset
1271 assert(_mem2, "must call next 1st");
a61af66fc99e Initial load
duke
parents:
diff changeset
1272 assert(_mem2->is_top() == (_mem2==_mm2->empty_memory()), "correct sentinel");
a61af66fc99e Initial load
duke
parents:
diff changeset
1273 return _mem2->is_top();
a61af66fc99e Initial load
duke
parents:
diff changeset
1274 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1275 Node* memory() const {
a61af66fc99e Initial load
duke
parents:
diff changeset
1276 assert(!is_empty(), "must not be empty");
a61af66fc99e Initial load
duke
parents:
diff changeset
1277 assert_synch();
a61af66fc99e Initial load
duke
parents:
diff changeset
1278 return _mem;
a61af66fc99e Initial load
duke
parents:
diff changeset
1279 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1280 // get the current memory, regardless of empty or non-empty status
a61af66fc99e Initial load
duke
parents:
diff changeset
1281 Node* force_memory() const {
a61af66fc99e Initial load
duke
parents:
diff changeset
1282 assert(!is_empty() || !at_base_memory(), "");
a61af66fc99e Initial load
duke
parents:
diff changeset
1283 // Use _mm_base to defend against updates to _mem->base_memory().
a61af66fc99e Initial load
duke
parents:
diff changeset
1284 Node *mem = _mem->is_top() ? _mm_base : _mem;
a61af66fc99e Initial load
duke
parents:
diff changeset
1285 assert(mem == check_memory(), "");
a61af66fc99e Initial load
duke
parents:
diff changeset
1286 return mem;
a61af66fc99e Initial load
duke
parents:
diff changeset
1287 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1288 Node* memory2() const {
a61af66fc99e Initial load
duke
parents:
diff changeset
1289 assert(_mem2 == check_memory2(), "");
a61af66fc99e Initial load
duke
parents:
diff changeset
1290 return _mem2;
a61af66fc99e Initial load
duke
parents:
diff changeset
1291 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1292 void set_memory(Node* mem) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1293 if (at_base_memory()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1294 // Note that this does not change the invariant _mm_base.
a61af66fc99e Initial load
duke
parents:
diff changeset
1295 _mm->set_base_memory(mem);
a61af66fc99e Initial load
duke
parents:
diff changeset
1296 } else {
a61af66fc99e Initial load
duke
parents:
diff changeset
1297 _mm->set_memory_at(_idx, mem);
a61af66fc99e Initial load
duke
parents:
diff changeset
1298 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1299 _mem = mem;
a61af66fc99e Initial load
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parents:
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1300 assert_synch();
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1301 }
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1302
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1303 // Recover from a side effect to the MergeMemNode.
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1304 void set_memory() {
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1305 _mem = _mm->in(_idx);
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1306 }
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1307
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1308 bool next() { return next(false); }
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1309 bool next2() { return next(true); }
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1310
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1311 bool next_non_empty() { return next_non_empty(false); }
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1312 bool next_non_empty2() { return next_non_empty(true); }
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1313 // next_non_empty2 can yield states where is_empty() is true
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1314
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1315 private:
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1316 // find the next item, which might be empty
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1317 bool next(bool have_mm2) {
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1318 assert((_mm2 != NULL) == have_mm2, "use other next");
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1319 assert_synch();
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1320 if (++_idx < _cnt) {
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1321 // Note: This iterator allows _mm to be non-sparse.
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1322 // It behaves the same whether _mem is top or base_memory.
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1323 _mem = _mm->in(_idx);
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1324 if (have_mm2)
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1325 _mem2 = _mm2->in((_idx < _cnt2) ? _idx : Compile::AliasIdxTop);
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1326 return true;
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1327 }
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1328 return false;
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1329 }
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1330
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1331 // find the next non-empty item
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1332 bool next_non_empty(bool have_mm2) {
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1333 while (next(have_mm2)) {
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1334 if (!is_empty()) {
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1335 // make sure _mem2 is filled in sensibly
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1336 if (have_mm2 && _mem2->is_top()) _mem2 = _mm2->base_memory();
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1337 return true;
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1338 } else if (have_mm2 && !is_empty2()) {
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1339 return true; // is_empty() == true
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1340 }
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1341 }
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1342 return false;
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1343 }
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1344 };
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1345
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1346 //------------------------------Prefetch---------------------------------------
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1347
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1348 // Non-faulting prefetch load. Prefetch for many reads.
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1349 class PrefetchReadNode : public Node {
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1350 public:
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1351 PrefetchReadNode(Node *abio, Node *adr) : Node(0,abio,adr) {}
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1352 virtual int Opcode() const;
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1353 virtual uint ideal_reg() const { return NotAMachineReg; }
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1354 virtual uint match_edge(uint idx) const { return idx==2; }
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1355 virtual const Type *bottom_type() const { return Type::ABIO; }
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1356 };
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1357
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1358 // Non-faulting prefetch load. Prefetch for many reads & many writes.
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1359 class PrefetchWriteNode : public Node {
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1360 public:
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1361 PrefetchWriteNode(Node *abio, Node *adr) : Node(0,abio,adr) {}
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1362 virtual int Opcode() const;
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1363 virtual uint ideal_reg() const { return NotAMachineReg; }
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1364 virtual uint match_edge(uint idx) const { return idx==2; }
3854
1af104d6cf99 7079329: Adjust allocation prefetching for T4
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parents: 3849
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1365 virtual const Type *bottom_type() const { return Type::ABIO; }
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1366 };
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diff changeset
1367
1af104d6cf99 7079329: Adjust allocation prefetching for T4
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1368 // Allocation prefetch which may fault, TLAB size have to be adjusted.
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1369 class PrefetchAllocationNode : public Node {
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1370 public:
1af104d6cf99 7079329: Adjust allocation prefetching for T4
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1371 PrefetchAllocationNode(Node *mem, Node *adr) : Node(0,mem,adr) {}
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1372 virtual int Opcode() const;
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1373 virtual uint ideal_reg() const { return NotAMachineReg; }
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diff changeset
1374 virtual uint match_edge(uint idx) const { return idx==2; }
1367
9e321dcfa5b7 6940726: Use BIS instruction for allocation prefetch on Sparc
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1375 virtual const Type *bottom_type() const { return ( AllocatePrefetchStyle == 3 ) ? Type::MEMORY : Type::ABIO; }
0
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1376 };
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f95d63e2154a 6989984: Use standard include model for Hospot
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1377
f95d63e2154a 6989984: Use standard include model for Hospot
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1378 #endif // SHARE_VM_OPTO_MEMNODE_HPP