annotate graal/com.oracle.graal.lir.amd64/src/com/oracle/graal/lir/amd64/AMD64Arithmetic.java @ 19526:8fc336a04d77

Create TYPE fields for LIRInstruction and CompositeValue. Renaming NodeClass#get to NodeClass#create.
author Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
date Fri, 20 Feb 2015 22:22:55 +0100
parents 437894ecd7c5
children 89c729e9e0a4
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1 /*
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2 * Copyright (c) 2011, 2015, Oracle and/or its affiliates. All rights reserved.
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3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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4 *
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5 * This code is free software; you can redistribute it and/or modify it
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6 * under the terms of the GNU General Public License version 2 only, as
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7 * published by the Free Software Foundation.
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8 *
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9 * This code is distributed in the hope that it will be useful, but WITHOUT
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10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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12 * version 2 for more details (a copy is included in the LICENSE file that
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13 * accompanied this code).
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14 *
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15 * You should have received a copy of the GNU General Public License version
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16 * 2 along with this work; if not, write to the Free Software Foundation,
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17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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18 *
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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20 * or visit www.oracle.com if you need additional information or have any
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21 * questions.
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22 */
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23 package com.oracle.graal.lir.amd64;
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24
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25 import static com.oracle.graal.api.code.ValueUtil.*;
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26 import static com.oracle.graal.lir.LIRInstruction.OperandFlag.*;
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27
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28 import com.oracle.graal.amd64.*;
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29 import com.oracle.graal.api.meta.*;
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30 import com.oracle.graal.asm.*;
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31 import com.oracle.graal.asm.amd64.*;
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32 import com.oracle.graal.asm.amd64.AMD64Assembler.ConditionFlag;
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33 import com.oracle.graal.compiler.common.*;
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34 import com.oracle.graal.lir.*;
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35 import com.oracle.graal.lir.amd64.AMD64Move.MemOp;
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36 import com.oracle.graal.lir.asm.*;
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37
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38 public enum AMD64Arithmetic {
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39
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40 // @formatter:off
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41
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42 IADD, ISUB, IMUL, IUMUL, IDIV, IDIVREM, IREM, IUDIV, IUREM, IAND, IOR, IXOR, ISHL, ISHR, IUSHR, IROL, IROR,
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43 LADD, LSUB, LMUL, LUMUL, LDIV, LDIVREM, LREM, LUDIV, LUREM, LAND, LOR, LXOR, LSHL, LSHR, LUSHR, LROL, LROR,
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44 FADD, FSUB, FMUL, FDIV, FREM, FAND, FOR, FXOR,
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45 DADD, DSUB, DMUL, DDIV, DREM, DAND, DOR, DXOR,
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46 INEG, LNEG, INOT, LNOT,
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47 SQRT,
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48 L2I, B2I, S2I, B2L, S2L, I2L,
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49 F2D, D2F,
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50 I2F, I2D,
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51 L2F, L2D,
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52 MOV_I2F, MOV_L2D, MOV_F2I, MOV_D2L,
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53 MOV_B2UI, MOV_B2UL, // Zero extending byte loads
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54
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55 /*
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56 * Converts a float/double to an int/long. The result of the conversion does not comply with Java semantics
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57 * when the input is a NaN, infinity or the conversion result is greater than Integer.MAX_VALUE/Long.MAX_VALUE.
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58 */
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59 F2I, D2I, F2L, D2L;
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60
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61 // @formatter:on
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62
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63 /**
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64 * Unary operation with separate source and destination operand.
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65 */
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66 public static final class Unary2Op extends AMD64LIRInstruction {
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67
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68 public static final LIRInstructionClass<Unary2Op> TYPE = LIRInstructionClass.create(Unary2Op.class);
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69 @Opcode private final AMD64Arithmetic opcode;
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70 @Def({REG}) protected AllocatableValue result;
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71 @Use({REG, STACK}) protected AllocatableValue x;
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72
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73 public Unary2Op(AMD64Arithmetic opcode, AllocatableValue result, AllocatableValue x) {
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74 super(TYPE);
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75 this.opcode = opcode;
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76 this.result = result;
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77 this.x = x;
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78 }
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79
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80 @Override
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81 public void emitCode(CompilationResultBuilder crb, AMD64MacroAssembler masm) {
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82 emit(crb, masm, opcode, result, x, null);
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83 }
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84 }
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85
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86 /**
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87 * Unary operation with separate source and destination operand but register only.
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88 */
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89 public static final class Unary2RegOp extends AMD64LIRInstruction {
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90 public static final LIRInstructionClass<Unary2RegOp> TYPE = LIRInstructionClass.create(Unary2RegOp.class);
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91
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92 @Opcode private final AMD64Arithmetic opcode;
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93 @Def({REG}) protected AllocatableValue result;
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94 @Use({REG}) protected AllocatableValue x;
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95
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96 public Unary2RegOp(AMD64Arithmetic opcode, AllocatableValue result, AllocatableValue x) {
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97 super(TYPE);
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98 this.opcode = opcode;
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99 this.result = result;
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100 this.x = x;
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101 }
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102
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103 @Override
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104 public void emitCode(CompilationResultBuilder crb, AMD64MacroAssembler masm) {
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105 emit(crb, masm, opcode, result, x, null);
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106 }
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107 }
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108
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109 /**
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110 * Unary operation with single operand for source and destination.
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111 */
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112 public static class Unary1Op extends AMD64LIRInstruction {
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113 public static final LIRInstructionClass<Unary1Op> TYPE = LIRInstructionClass.create(Unary1Op.class);
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114
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115 @Opcode private final AMD64Arithmetic opcode;
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116 @Def({REG, HINT}) protected AllocatableValue result;
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117 @Use({REG, STACK}) protected AllocatableValue x;
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118
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119 public Unary1Op(AMD64Arithmetic opcode, AllocatableValue result, AllocatableValue x) {
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120 super(TYPE);
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121 this.opcode = opcode;
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122 this.result = result;
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123 this.x = x;
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124 }
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125
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126 @Override
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127 public void emitCode(CompilationResultBuilder crb, AMD64MacroAssembler masm) {
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128 AMD64Move.move(crb, masm, result, x);
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129 emit(crb, masm, opcode, result);
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130 }
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131 }
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132
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133 /**
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134 * Unary operation with separate memory source and destination operand.
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135 */
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136 public static final class Unary2MemoryOp extends MemOp {
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137 public static final LIRInstructionClass<Unary2MemoryOp> TYPE = LIRInstructionClass.create(Unary2MemoryOp.class);
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138
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139 @Opcode private final AMD64Arithmetic opcode;
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140 @Def({REG}) protected AllocatableValue result;
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141
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142 public Unary2MemoryOp(AMD64Arithmetic opcode, AllocatableValue result, Kind kind, AMD64AddressValue address, LIRFrameState state) {
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143 super(TYPE, kind, address, state);
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144 this.opcode = opcode;
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145 this.result = result;
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146 }
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147
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148 @Override
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149 public void emitMemAccess(CompilationResultBuilder crb, AMD64MacroAssembler masm) {
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150 emit(crb, masm, opcode, result, address, null);
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151 }
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152 }
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153
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154 /**
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155 * Binary operation with two operands. The first source operand is combined with the
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156 * destination. The second source operand may be a stack slot.
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157 */
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158 public static class BinaryRegStack extends AMD64LIRInstruction {
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159 public static final LIRInstructionClass<BinaryRegStack> TYPE = LIRInstructionClass.create(BinaryRegStack.class);
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160
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161 @Opcode private final AMD64Arithmetic opcode;
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162 @Def({REG, HINT}) protected AllocatableValue result;
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163 @Use({REG, STACK}) protected AllocatableValue x;
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164 @Alive({REG, STACK}) protected AllocatableValue y;
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165
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166 public BinaryRegStack(AMD64Arithmetic opcode, AllocatableValue result, AllocatableValue x, AllocatableValue y) {
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167 super(TYPE);
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168 this.opcode = opcode;
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169 this.result = result;
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170 this.x = x;
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171 this.y = y;
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172 }
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173
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174 @Override
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175 public void emitCode(CompilationResultBuilder crb, AMD64MacroAssembler masm) {
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176 AMD64Move.move(crb, masm, result, x);
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177 emit(crb, masm, opcode, result, y, null);
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178 }
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179
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180 @Override
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181 public void verify() {
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182 super.verify();
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183 assert differentRegisters(result, y) || sameRegister(x, y);
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184 verifyKind(opcode, result, x, y);
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185 }
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186 }
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187
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188 /**
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189 * Binary operation with two operands. The first source operand is combined with the
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190 * destination. The second source operand may be a stack slot.
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191 */
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192 public static final class BinaryMemory extends AMD64LIRInstruction {
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193 public static final LIRInstructionClass<BinaryMemory> TYPE = LIRInstructionClass.create(BinaryMemory.class);
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194
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195 @Opcode private final AMD64Arithmetic opcode;
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196 @Def({REG, HINT}) protected AllocatableValue result;
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197 @Use({REG}) protected AllocatableValue x;
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198 protected final Kind kind;
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199 @Alive({COMPOSITE}) protected AMD64AddressValue location;
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200 @State protected LIRFrameState state;
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201
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202 public BinaryMemory(AMD64Arithmetic opcode, Kind kind, AllocatableValue result, AllocatableValue x, AMD64AddressValue location, LIRFrameState state) {
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203 super(TYPE);
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204 this.opcode = opcode;
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205 this.result = result;
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206 this.x = x;
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207 this.location = location;
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208 this.kind = kind;
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209 this.state = state;
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210 }
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211
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212 @Override
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213 public void emitCode(CompilationResultBuilder crb, AMD64MacroAssembler masm) {
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214 AMD64Move.move(crb, masm, result, x);
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215 if (state != null) {
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216 crb.recordImplicitException(masm.position(), state);
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217 }
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218 emit(crb, masm, opcode, result, location, null);
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219 }
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220
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221 @Override
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222 public void verify() {
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223 super.verify();
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224 assert differentRegisters(result, location) || sameRegister(x, location);
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225 // verifyKind(opcode, result, x, location);
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226 }
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227 }
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228
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229 /**
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230 * Binary operation with two operands. The first source operand is combined with the
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231 * destination. The second source operand must be a register.
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232 */
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233 public static final class BinaryRegReg extends AMD64LIRInstruction {
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234 public static final LIRInstructionClass<BinaryRegReg> TYPE = LIRInstructionClass.create(BinaryRegReg.class);
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235
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236 @Opcode private final AMD64Arithmetic opcode;
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237 @Def({REG, HINT}) protected AllocatableValue result;
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238 @Use({REG, STACK}) protected AllocatableValue x;
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239 @Alive({REG}) protected AllocatableValue y;
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240
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241 public BinaryRegReg(AMD64Arithmetic opcode, AllocatableValue result, AllocatableValue x, AllocatableValue y) {
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242 super(TYPE);
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243 this.opcode = opcode;
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244 this.result = result;
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245 this.x = x;
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246 this.y = y;
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247 }
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248
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249 @Override
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250 public void emitCode(CompilationResultBuilder crb, AMD64MacroAssembler masm) {
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diff changeset
251 AMD64Move.move(crb, masm, result, x);
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252 emit(crb, masm, opcode, result, y, null);
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253 }
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254
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255 @Override
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256 public void verify() {
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257 super.verify();
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258 assert differentRegisters(result, y) || sameRegister(x, y);
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259 verifyKind(opcode, result, x, y);
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260 }
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261 }
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262
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263 /**
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264 * Binary operation with single source/destination operand and one constant.
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265 */
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266 public static final class BinaryRegConst extends AMD64LIRInstruction {
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267 public static final LIRInstructionClass<BinaryRegConst> TYPE = LIRInstructionClass.create(BinaryRegConst.class);
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268
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269 @Opcode private final AMD64Arithmetic opcode;
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270 @Def({REG, HINT}) protected AllocatableValue result;
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271 @Use({REG, STACK}) protected AllocatableValue x;
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272 protected JavaConstant y;
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273
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274 public BinaryRegConst(AMD64Arithmetic opcode, AllocatableValue result, AllocatableValue x, JavaConstant y) {
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275 super(TYPE);
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276 this.opcode = opcode;
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277 this.result = result;
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278 this.x = x;
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279 this.y = y;
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280 }
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281
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282 @Override
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283 public void emitCode(CompilationResultBuilder crb, AMD64MacroAssembler masm) {
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284 AMD64Move.move(crb, masm, result, x);
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285 emit(crb, masm, opcode, result, y, null);
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286 }
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287
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288 @Override
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289 public void verify() {
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290 super.verify();
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291 verifyKind(opcode, result, x, y);
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292 }
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293 }
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294
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295 /**
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296 * Commutative binary operation with two operands. One of the operands is combined with the
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297 * result.
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298 */
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299 public static final class BinaryCommutative extends AMD64LIRInstruction {
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300 public static final LIRInstructionClass<BinaryCommutative> TYPE = LIRInstructionClass.create(BinaryCommutative.class);
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301
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302 @Opcode private final AMD64Arithmetic opcode;
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303 @Def({REG, HINT}) protected AllocatableValue result;
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304 @Use({REG, STACK}) protected AllocatableValue x;
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305 @Use({REG, STACK}) protected AllocatableValue y;
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306
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307 public BinaryCommutative(AMD64Arithmetic opcode, AllocatableValue result, AllocatableValue x, AllocatableValue y) {
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308 super(TYPE);
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309 this.opcode = opcode;
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310 this.result = result;
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311 this.x = x;
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312 this.y = y;
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313 }
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314
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315 @Override
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316 public void emitCode(CompilationResultBuilder crb, AMD64MacroAssembler masm) {
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317 if (sameRegister(result, y)) {
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318 emit(crb, masm, opcode, result, x, null);
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319 } else {
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320 AMD64Move.move(crb, masm, result, x);
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321 emit(crb, masm, opcode, result, y, null);
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322 }
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323 }
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324
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325 @Override
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326 public void verify() {
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327 super.verify();
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328 verifyKind(opcode, result, x, y);
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329 }
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330 }
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331
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332 /**
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333 * Binary operation with separate source and destination and one constant operand.
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334 */
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335 public static final class BinaryRegStackConst extends AMD64LIRInstruction {
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336 public static final LIRInstructionClass<BinaryRegStackConst> TYPE = LIRInstructionClass.create(BinaryRegStackConst.class);
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337
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338 @Opcode private final AMD64Arithmetic opcode;
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339 @Def({REG}) protected AllocatableValue result;
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340 @Use({REG, STACK}) protected AllocatableValue x;
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341 protected JavaConstant y;
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342
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343 public BinaryRegStackConst(AMD64Arithmetic opcode, AllocatableValue result, AllocatableValue x, JavaConstant y) {
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344 super(TYPE);
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345 this.opcode = opcode;
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346 this.result = result;
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347 this.x = x;
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348 this.y = y;
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349 }
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350
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351 @Override
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352 public void emitCode(CompilationResultBuilder crb, AMD64MacroAssembler masm) {
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353 if (isRegister(x)) {
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354 switch (opcode) {
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355 case IMUL:
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356 masm.imull(asIntReg(result), asIntReg(x), crb.asIntConst(y));
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357 break;
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358 case LMUL:
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359 masm.imulq(asLongReg(result), asLongReg(x), crb.asIntConst(y));
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360 break;
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361 default:
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362 throw GraalInternalError.shouldNotReachHere();
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diff changeset
363 }
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diff changeset
364 } else {
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365 assert isStackSlot(x);
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diff changeset
366 switch (opcode) {
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367 case IMUL:
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368 masm.imull(asIntReg(result), (AMD64Address) crb.asIntAddr(x), crb.asIntConst(y));
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diff changeset
369 break;
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370 case LMUL:
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371 masm.imulq(asLongReg(result), (AMD64Address) crb.asLongAddr(x), crb.asIntConst(y));
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diff changeset
372 break;
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diff changeset
373 default:
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374 throw GraalInternalError.shouldNotReachHere();
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diff changeset
375 }
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diff changeset
376 }
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377 }
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378
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diff changeset
379 @Override
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380 public void verify() {
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381 super.verify();
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382 verifyKind(opcode, result, x, y);
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diff changeset
383 }
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diff changeset
384 }
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parents:
diff changeset
385
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diff changeset
386 public static final class MulHighOp extends AMD64LIRInstruction {
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diff changeset
387 public static final LIRInstructionClass<MulHighOp> TYPE = LIRInstructionClass.create(MulHighOp.class);
15691
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diff changeset
388
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389 @Opcode private final AMD64Arithmetic opcode;
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390 @Def({REG}) public AllocatableValue lowResult;
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391 @Def({REG}) public AllocatableValue highResult;
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392 @Use({REG}) public AllocatableValue x;
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diff changeset
393 @Use({REG, STACK}) public AllocatableValue y;
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diff changeset
394
16346
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diff changeset
395 public MulHighOp(AMD64Arithmetic opcode, LIRKind kind, AllocatableValue y) {
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diff changeset
396 super(TYPE);
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diff changeset
397 this.opcode = opcode;
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diff changeset
398 this.x = AMD64.rax.asValue(kind);
6a13c422fca4 API for high word multiplication.
Roland Schatz <roland.schatz@oracle.com>
parents: 15453
diff changeset
399 this.y = y;
6a13c422fca4 API for high word multiplication.
Roland Schatz <roland.schatz@oracle.com>
parents: 15453
diff changeset
400 this.lowResult = AMD64.rax.asValue(kind);
6a13c422fca4 API for high word multiplication.
Roland Schatz <roland.schatz@oracle.com>
parents: 15453
diff changeset
401 this.highResult = AMD64.rdx.asValue(kind);
6a13c422fca4 API for high word multiplication.
Roland Schatz <roland.schatz@oracle.com>
parents: 15453
diff changeset
402 }
6a13c422fca4 API for high word multiplication.
Roland Schatz <roland.schatz@oracle.com>
parents: 15453
diff changeset
403
6a13c422fca4 API for high word multiplication.
Roland Schatz <roland.schatz@oracle.com>
parents: 15453
diff changeset
404 @Override
6a13c422fca4 API for high word multiplication.
Roland Schatz <roland.schatz@oracle.com>
parents: 15453
diff changeset
405 public void emitCode(CompilationResultBuilder crb, AMD64MacroAssembler masm) {
6a13c422fca4 API for high word multiplication.
Roland Schatz <roland.schatz@oracle.com>
parents: 15453
diff changeset
406 if (isRegister(y)) {
6a13c422fca4 API for high word multiplication.
Roland Schatz <roland.schatz@oracle.com>
parents: 15453
diff changeset
407 switch (opcode) {
6a13c422fca4 API for high word multiplication.
Roland Schatz <roland.schatz@oracle.com>
parents: 15453
diff changeset
408 case IMUL:
6a13c422fca4 API for high word multiplication.
Roland Schatz <roland.schatz@oracle.com>
parents: 15453
diff changeset
409 masm.imull(asRegister(y));
6a13c422fca4 API for high word multiplication.
Roland Schatz <roland.schatz@oracle.com>
parents: 15453
diff changeset
410 break;
6a13c422fca4 API for high word multiplication.
Roland Schatz <roland.schatz@oracle.com>
parents: 15453
diff changeset
411 case IUMUL:
6a13c422fca4 API for high word multiplication.
Roland Schatz <roland.schatz@oracle.com>
parents: 15453
diff changeset
412 masm.mull(asRegister(y));
6a13c422fca4 API for high word multiplication.
Roland Schatz <roland.schatz@oracle.com>
parents: 15453
diff changeset
413 break;
6a13c422fca4 API for high word multiplication.
Roland Schatz <roland.schatz@oracle.com>
parents: 15453
diff changeset
414 case LMUL:
6a13c422fca4 API for high word multiplication.
Roland Schatz <roland.schatz@oracle.com>
parents: 15453
diff changeset
415 masm.imulq(asRegister(y));
6a13c422fca4 API for high word multiplication.
Roland Schatz <roland.schatz@oracle.com>
parents: 15453
diff changeset
416 break;
6a13c422fca4 API for high word multiplication.
Roland Schatz <roland.schatz@oracle.com>
parents: 15453
diff changeset
417 case LUMUL:
6a13c422fca4 API for high word multiplication.
Roland Schatz <roland.schatz@oracle.com>
parents: 15453
diff changeset
418 masm.mulq(asRegister(y));
6a13c422fca4 API for high word multiplication.
Roland Schatz <roland.schatz@oracle.com>
parents: 15453
diff changeset
419 break;
6a13c422fca4 API for high word multiplication.
Roland Schatz <roland.schatz@oracle.com>
parents: 15453
diff changeset
420 default:
6a13c422fca4 API for high word multiplication.
Roland Schatz <roland.schatz@oracle.com>
parents: 15453
diff changeset
421 throw GraalInternalError.shouldNotReachHere();
6a13c422fca4 API for high word multiplication.
Roland Schatz <roland.schatz@oracle.com>
parents: 15453
diff changeset
422 }
6a13c422fca4 API for high word multiplication.
Roland Schatz <roland.schatz@oracle.com>
parents: 15453
diff changeset
423 } else {
6a13c422fca4 API for high word multiplication.
Roland Schatz <roland.schatz@oracle.com>
parents: 15453
diff changeset
424 switch (opcode) {
6a13c422fca4 API for high word multiplication.
Roland Schatz <roland.schatz@oracle.com>
parents: 15453
diff changeset
425 case IMUL:
6a13c422fca4 API for high word multiplication.
Roland Schatz <roland.schatz@oracle.com>
parents: 15453
diff changeset
426 masm.imull((AMD64Address) crb.asAddress(y));
6a13c422fca4 API for high word multiplication.
Roland Schatz <roland.schatz@oracle.com>
parents: 15453
diff changeset
427 break;
6a13c422fca4 API for high word multiplication.
Roland Schatz <roland.schatz@oracle.com>
parents: 15453
diff changeset
428 case IUMUL:
6a13c422fca4 API for high word multiplication.
Roland Schatz <roland.schatz@oracle.com>
parents: 15453
diff changeset
429 masm.mull((AMD64Address) crb.asAddress(y));
6a13c422fca4 API for high word multiplication.
Roland Schatz <roland.schatz@oracle.com>
parents: 15453
diff changeset
430 break;
6a13c422fca4 API for high word multiplication.
Roland Schatz <roland.schatz@oracle.com>
parents: 15453
diff changeset
431 case LMUL:
6a13c422fca4 API for high word multiplication.
Roland Schatz <roland.schatz@oracle.com>
parents: 15453
diff changeset
432 masm.imulq((AMD64Address) crb.asAddress(y));
6a13c422fca4 API for high word multiplication.
Roland Schatz <roland.schatz@oracle.com>
parents: 15453
diff changeset
433 break;
6a13c422fca4 API for high word multiplication.
Roland Schatz <roland.schatz@oracle.com>
parents: 15453
diff changeset
434 case LUMUL:
6a13c422fca4 API for high word multiplication.
Roland Schatz <roland.schatz@oracle.com>
parents: 15453
diff changeset
435 masm.mulq((AMD64Address) crb.asAddress(y));
6a13c422fca4 API for high word multiplication.
Roland Schatz <roland.schatz@oracle.com>
parents: 15453
diff changeset
436 break;
6a13c422fca4 API for high word multiplication.
Roland Schatz <roland.schatz@oracle.com>
parents: 15453
diff changeset
437 default:
6a13c422fca4 API for high word multiplication.
Roland Schatz <roland.schatz@oracle.com>
parents: 15453
diff changeset
438 throw GraalInternalError.shouldNotReachHere();
6a13c422fca4 API for high word multiplication.
Roland Schatz <roland.schatz@oracle.com>
parents: 15453
diff changeset
439 }
6a13c422fca4 API for high word multiplication.
Roland Schatz <roland.schatz@oracle.com>
parents: 15453
diff changeset
440 }
6a13c422fca4 API for high word multiplication.
Roland Schatz <roland.schatz@oracle.com>
parents: 15453
diff changeset
441 }
6a13c422fca4 API for high word multiplication.
Roland Schatz <roland.schatz@oracle.com>
parents: 15453
diff changeset
442 }
6a13c422fca4 API for high word multiplication.
Roland Schatz <roland.schatz@oracle.com>
parents: 15453
diff changeset
443
19526
8fc336a04d77 Create TYPE fields for LIRInstruction and CompositeValue. Renaming NodeClass#get to NodeClass#create.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents: 18842
diff changeset
444 public static final class DivRemOp extends AMD64LIRInstruction {
8fc336a04d77 Create TYPE fields for LIRInstruction and CompositeValue. Renaming NodeClass#get to NodeClass#create.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents: 18842
diff changeset
445 public static final LIRInstructionClass<DivRemOp> TYPE = LIRInstructionClass.create(DivRemOp.class);
10959
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
446
7379
0cc86f2309be Added DivRemOp that produces both the division result and the remainder.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents: 7306
diff changeset
447 @Opcode private final AMD64Arithmetic opcode;
16346
bbf051d717f5 Propagate reference information through arithmetics.
Roland Schatz <roland.schatz@oracle.com>
parents: 16094
diff changeset
448 @Def public AllocatableValue divResult;
bbf051d717f5 Propagate reference information through arithmetics.
Roland Schatz <roland.schatz@oracle.com>
parents: 16094
diff changeset
449 @Def public AllocatableValue remResult;
7921
1b591118d01e Use AllocatableValue in DivRemOp.
Roland Schatz <roland.schatz@oracle.com>
parents: 7920
diff changeset
450 @Use protected AllocatableValue x;
1b591118d01e Use AllocatableValue in DivRemOp.
Roland Schatz <roland.schatz@oracle.com>
parents: 7920
diff changeset
451 @Alive protected AllocatableValue y;
7379
0cc86f2309be Added DivRemOp that produces both the division result and the remainder.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents: 7306
diff changeset
452 @State protected LIRFrameState state;
0cc86f2309be Added DivRemOp that produces both the division result and the remainder.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents: 7306
diff changeset
453
7921
1b591118d01e Use AllocatableValue in DivRemOp.
Roland Schatz <roland.schatz@oracle.com>
parents: 7920
diff changeset
454 public DivRemOp(AMD64Arithmetic opcode, AllocatableValue x, AllocatableValue y, LIRFrameState state) {
19526
8fc336a04d77 Create TYPE fields for LIRInstruction and CompositeValue. Renaming NodeClass#get to NodeClass#create.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents: 18842
diff changeset
455 super(TYPE);
7379
0cc86f2309be Added DivRemOp that produces both the division result and the remainder.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents: 7306
diff changeset
456 this.opcode = opcode;
16346
bbf051d717f5 Propagate reference information through arithmetics.
Roland Schatz <roland.schatz@oracle.com>
parents: 16094
diff changeset
457 this.divResult = AMD64.rax.asValue(LIRKind.derive(x, y));
bbf051d717f5 Propagate reference information through arithmetics.
Roland Schatz <roland.schatz@oracle.com>
parents: 16094
diff changeset
458 this.remResult = AMD64.rdx.asValue(LIRKind.derive(x, y));
7379
0cc86f2309be Added DivRemOp that produces both the division result and the remainder.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents: 7306
diff changeset
459 this.x = x;
0cc86f2309be Added DivRemOp that produces both the division result and the remainder.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents: 7306
diff changeset
460 this.y = y;
0cc86f2309be Added DivRemOp that produces both the division result and the remainder.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents: 7306
diff changeset
461 this.state = state;
0cc86f2309be Added DivRemOp that produces both the division result and the remainder.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents: 7306
diff changeset
462 }
0cc86f2309be Added DivRemOp that produces both the division result and the remainder.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents: 7306
diff changeset
463
0cc86f2309be Added DivRemOp that produces both the division result and the remainder.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents: 7306
diff changeset
464 @Override
13227
1a66453f73db renamed TargetMethodAssembler to CompilationResultBuilder
Doug Simon <doug.simon@oracle.com>
parents: 11355
diff changeset
465 public void emitCode(CompilationResultBuilder crb, AMD64MacroAssembler masm) {
1a66453f73db renamed TargetMethodAssembler to CompilationResultBuilder
Doug Simon <doug.simon@oracle.com>
parents: 11355
diff changeset
466 emit(crb, masm, opcode, null, y, state);
7379
0cc86f2309be Added DivRemOp that produces both the division result and the remainder.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents: 7306
diff changeset
467 }
0cc86f2309be Added DivRemOp that produces both the division result and the remainder.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents: 7306
diff changeset
468
0cc86f2309be Added DivRemOp that produces both the division result and the remainder.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents: 7306
diff changeset
469 @Override
17604
35ae3e916582 Make LIRInstruction an interface.
Josef Eisl <josef.eisl@jku.at>
parents: 16891
diff changeset
470 public void verify() {
7379
0cc86f2309be Added DivRemOp that produces both the division result and the remainder.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents: 7306
diff changeset
471 super.verify();
10959
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
472 // left input in rax, right input in any register but rax and rdx, result quotient in
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
473 // rax, result remainder in rdx
9791
e92fdf3e1558 Register: replace usages of object identity with equals()
Bernhard Urban <bernhard.urban@jku.at>
parents: 9581
diff changeset
474 assert asRegister(x).equals(AMD64.rax);
7379
0cc86f2309be Added DivRemOp that produces both the division result and the remainder.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents: 7306
diff changeset
475 assert differentRegisters(y, AMD64.rax.asValue(), AMD64.rdx.asValue());
0cc86f2309be Added DivRemOp that produces both the division result and the remainder.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents: 7306
diff changeset
476 verifyKind(opcode, divResult, x, y);
0cc86f2309be Added DivRemOp that produces both the division result and the remainder.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents: 7306
diff changeset
477 verifyKind(opcode, remResult, x, y);
0cc86f2309be Added DivRemOp that produces both the division result and the remainder.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents: 7306
diff changeset
478 }
0cc86f2309be Added DivRemOp that produces both the division result and the remainder.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents: 7306
diff changeset
479 }
0cc86f2309be Added DivRemOp that produces both the division result and the remainder.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents: 7306
diff changeset
480
9581
d84ea522800e replaced arithmetic_[fd]rem stubs with inline compiled code (GRAAL-81)
Doug Simon <doug.simon@oracle.com>
parents: 9422
diff changeset
481 public static class FPDivRemOp extends AMD64LIRInstruction {
19526
8fc336a04d77 Create TYPE fields for LIRInstruction and CompositeValue. Renaming NodeClass#get to NodeClass#create.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents: 18842
diff changeset
482 public static final LIRInstructionClass<FPDivRemOp> TYPE = LIRInstructionClass.create(FPDivRemOp.class);
10959
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
483
9581
d84ea522800e replaced arithmetic_[fd]rem stubs with inline compiled code (GRAAL-81)
Doug Simon <doug.simon@oracle.com>
parents: 9422
diff changeset
484 @Opcode private final AMD64Arithmetic opcode;
d84ea522800e replaced arithmetic_[fd]rem stubs with inline compiled code (GRAAL-81)
Doug Simon <doug.simon@oracle.com>
parents: 9422
diff changeset
485 @Def protected AllocatableValue result;
d84ea522800e replaced arithmetic_[fd]rem stubs with inline compiled code (GRAAL-81)
Doug Simon <doug.simon@oracle.com>
parents: 9422
diff changeset
486 @Use protected AllocatableValue x;
d84ea522800e replaced arithmetic_[fd]rem stubs with inline compiled code (GRAAL-81)
Doug Simon <doug.simon@oracle.com>
parents: 9422
diff changeset
487 @Use protected AllocatableValue y;
d84ea522800e replaced arithmetic_[fd]rem stubs with inline compiled code (GRAAL-81)
Doug Simon <doug.simon@oracle.com>
parents: 9422
diff changeset
488 @Temp protected AllocatableValue raxTemp;
d84ea522800e replaced arithmetic_[fd]rem stubs with inline compiled code (GRAAL-81)
Doug Simon <doug.simon@oracle.com>
parents: 9422
diff changeset
489
d84ea522800e replaced arithmetic_[fd]rem stubs with inline compiled code (GRAAL-81)
Doug Simon <doug.simon@oracle.com>
parents: 9422
diff changeset
490 public FPDivRemOp(AMD64Arithmetic opcode, AllocatableValue result, AllocatableValue x, AllocatableValue y) {
19526
8fc336a04d77 Create TYPE fields for LIRInstruction and CompositeValue. Renaming NodeClass#get to NodeClass#create.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents: 18842
diff changeset
491 super(TYPE);
9581
d84ea522800e replaced arithmetic_[fd]rem stubs with inline compiled code (GRAAL-81)
Doug Simon <doug.simon@oracle.com>
parents: 9422
diff changeset
492 this.opcode = opcode;
d84ea522800e replaced arithmetic_[fd]rem stubs with inline compiled code (GRAAL-81)
Doug Simon <doug.simon@oracle.com>
parents: 9422
diff changeset
493 this.result = result;
16094
c0b8d395368b Introduce LIRKind to accurately track oop references in backend.
Roland Schatz <roland.schatz@oracle.com>
parents: 15691
diff changeset
494 this.raxTemp = AMD64.rax.asValue(LIRKind.value(Kind.Int));
9581
d84ea522800e replaced arithmetic_[fd]rem stubs with inline compiled code (GRAAL-81)
Doug Simon <doug.simon@oracle.com>
parents: 9422
diff changeset
495 this.x = x;
d84ea522800e replaced arithmetic_[fd]rem stubs with inline compiled code (GRAAL-81)
Doug Simon <doug.simon@oracle.com>
parents: 9422
diff changeset
496 this.y = y;
d84ea522800e replaced arithmetic_[fd]rem stubs with inline compiled code (GRAAL-81)
Doug Simon <doug.simon@oracle.com>
parents: 9422
diff changeset
497 }
d84ea522800e replaced arithmetic_[fd]rem stubs with inline compiled code (GRAAL-81)
Doug Simon <doug.simon@oracle.com>
parents: 9422
diff changeset
498
d84ea522800e replaced arithmetic_[fd]rem stubs with inline compiled code (GRAAL-81)
Doug Simon <doug.simon@oracle.com>
parents: 9422
diff changeset
499 @Override
13227
1a66453f73db renamed TargetMethodAssembler to CompilationResultBuilder
Doug Simon <doug.simon@oracle.com>
parents: 11355
diff changeset
500 public void emitCode(CompilationResultBuilder crb, AMD64MacroAssembler masm) {
9581
d84ea522800e replaced arithmetic_[fd]rem stubs with inline compiled code (GRAAL-81)
Doug Simon <doug.simon@oracle.com>
parents: 9422
diff changeset
501 AMD64Address tmp = new AMD64Address(AMD64.rsp);
d84ea522800e replaced arithmetic_[fd]rem stubs with inline compiled code (GRAAL-81)
Doug Simon <doug.simon@oracle.com>
parents: 9422
diff changeset
502 masm.subq(AMD64.rsp, 8);
d84ea522800e replaced arithmetic_[fd]rem stubs with inline compiled code (GRAAL-81)
Doug Simon <doug.simon@oracle.com>
parents: 9422
diff changeset
503 if (opcode == FREM) {
d84ea522800e replaced arithmetic_[fd]rem stubs with inline compiled code (GRAAL-81)
Doug Simon <doug.simon@oracle.com>
parents: 9422
diff changeset
504 masm.movflt(tmp, asRegister(y));
10513
00b70a864d3b updated Checkstyle rules to prohibit underscores in method names and fixed current violations
Doug Simon <doug.simon@oracle.com>
parents: 9791
diff changeset
505 masm.flds(tmp);
9581
d84ea522800e replaced arithmetic_[fd]rem stubs with inline compiled code (GRAAL-81)
Doug Simon <doug.simon@oracle.com>
parents: 9422
diff changeset
506 masm.movflt(tmp, asRegister(x));
10513
00b70a864d3b updated Checkstyle rules to prohibit underscores in method names and fixed current violations
Doug Simon <doug.simon@oracle.com>
parents: 9791
diff changeset
507 masm.flds(tmp);
9581
d84ea522800e replaced arithmetic_[fd]rem stubs with inline compiled code (GRAAL-81)
Doug Simon <doug.simon@oracle.com>
parents: 9422
diff changeset
508 } else {
d84ea522800e replaced arithmetic_[fd]rem stubs with inline compiled code (GRAAL-81)
Doug Simon <doug.simon@oracle.com>
parents: 9422
diff changeset
509 assert opcode == DREM;
13265
2d76d0c85345 Make selection of x86 floating point move instruction extensible.
Roland Schatz <roland.schatz@oracle.com>
parents: 13227
diff changeset
510 masm.movdbl(tmp, asRegister(y));
10513
00b70a864d3b updated Checkstyle rules to prohibit underscores in method names and fixed current violations
Doug Simon <doug.simon@oracle.com>
parents: 9791
diff changeset
511 masm.fldd(tmp);
13265
2d76d0c85345 Make selection of x86 floating point move instruction extensible.
Roland Schatz <roland.schatz@oracle.com>
parents: 13227
diff changeset
512 masm.movdbl(tmp, asRegister(x));
10513
00b70a864d3b updated Checkstyle rules to prohibit underscores in method names and fixed current violations
Doug Simon <doug.simon@oracle.com>
parents: 9791
diff changeset
513 masm.fldd(tmp);
9581
d84ea522800e replaced arithmetic_[fd]rem stubs with inline compiled code (GRAAL-81)
Doug Simon <doug.simon@oracle.com>
parents: 9422
diff changeset
514 }
d84ea522800e replaced arithmetic_[fd]rem stubs with inline compiled code (GRAAL-81)
Doug Simon <doug.simon@oracle.com>
parents: 9422
diff changeset
515
d84ea522800e replaced arithmetic_[fd]rem stubs with inline compiled code (GRAAL-81)
Doug Simon <doug.simon@oracle.com>
parents: 9422
diff changeset
516 Label label = new Label();
d84ea522800e replaced arithmetic_[fd]rem stubs with inline compiled code (GRAAL-81)
Doug Simon <doug.simon@oracle.com>
parents: 9422
diff changeset
517 masm.bind(label);
d84ea522800e replaced arithmetic_[fd]rem stubs with inline compiled code (GRAAL-81)
Doug Simon <doug.simon@oracle.com>
parents: 9422
diff changeset
518 masm.fprem();
d84ea522800e replaced arithmetic_[fd]rem stubs with inline compiled code (GRAAL-81)
Doug Simon <doug.simon@oracle.com>
parents: 9422
diff changeset
519 masm.fwait();
10513
00b70a864d3b updated Checkstyle rules to prohibit underscores in method names and fixed current violations
Doug Simon <doug.simon@oracle.com>
parents: 9791
diff changeset
520 masm.fnstswAX();
9581
d84ea522800e replaced arithmetic_[fd]rem stubs with inline compiled code (GRAAL-81)
Doug Simon <doug.simon@oracle.com>
parents: 9422
diff changeset
521 masm.testl(AMD64.rax, 0x400);
d84ea522800e replaced arithmetic_[fd]rem stubs with inline compiled code (GRAAL-81)
Doug Simon <doug.simon@oracle.com>
parents: 9422
diff changeset
522 masm.jcc(ConditionFlag.NotZero, label);
d84ea522800e replaced arithmetic_[fd]rem stubs with inline compiled code (GRAAL-81)
Doug Simon <doug.simon@oracle.com>
parents: 9422
diff changeset
523 masm.fxch(1);
d84ea522800e replaced arithmetic_[fd]rem stubs with inline compiled code (GRAAL-81)
Doug Simon <doug.simon@oracle.com>
parents: 9422
diff changeset
524 masm.fpop();
d84ea522800e replaced arithmetic_[fd]rem stubs with inline compiled code (GRAAL-81)
Doug Simon <doug.simon@oracle.com>
parents: 9422
diff changeset
525
d84ea522800e replaced arithmetic_[fd]rem stubs with inline compiled code (GRAAL-81)
Doug Simon <doug.simon@oracle.com>
parents: 9422
diff changeset
526 if (opcode == FREM) {
10513
00b70a864d3b updated Checkstyle rules to prohibit underscores in method names and fixed current violations
Doug Simon <doug.simon@oracle.com>
parents: 9791
diff changeset
527 masm.fstps(tmp);
9581
d84ea522800e replaced arithmetic_[fd]rem stubs with inline compiled code (GRAAL-81)
Doug Simon <doug.simon@oracle.com>
parents: 9422
diff changeset
528 masm.movflt(asRegister(result), tmp);
d84ea522800e replaced arithmetic_[fd]rem stubs with inline compiled code (GRAAL-81)
Doug Simon <doug.simon@oracle.com>
parents: 9422
diff changeset
529 } else {
10513
00b70a864d3b updated Checkstyle rules to prohibit underscores in method names and fixed current violations
Doug Simon <doug.simon@oracle.com>
parents: 9791
diff changeset
530 masm.fstpd(tmp);
13265
2d76d0c85345 Make selection of x86 floating point move instruction extensible.
Roland Schatz <roland.schatz@oracle.com>
parents: 13227
diff changeset
531 masm.movdbl(asRegister(result), tmp);
9581
d84ea522800e replaced arithmetic_[fd]rem stubs with inline compiled code (GRAAL-81)
Doug Simon <doug.simon@oracle.com>
parents: 9422
diff changeset
532 }
d84ea522800e replaced arithmetic_[fd]rem stubs with inline compiled code (GRAAL-81)
Doug Simon <doug.simon@oracle.com>
parents: 9422
diff changeset
533 masm.addq(AMD64.rsp, 8);
d84ea522800e replaced arithmetic_[fd]rem stubs with inline compiled code (GRAAL-81)
Doug Simon <doug.simon@oracle.com>
parents: 9422
diff changeset
534 }
d84ea522800e replaced arithmetic_[fd]rem stubs with inline compiled code (GRAAL-81)
Doug Simon <doug.simon@oracle.com>
parents: 9422
diff changeset
535
d84ea522800e replaced arithmetic_[fd]rem stubs with inline compiled code (GRAAL-81)
Doug Simon <doug.simon@oracle.com>
parents: 9422
diff changeset
536 @Override
17604
35ae3e916582 Make LIRInstruction an interface.
Josef Eisl <josef.eisl@jku.at>
parents: 16891
diff changeset
537 public void verify() {
9581
d84ea522800e replaced arithmetic_[fd]rem stubs with inline compiled code (GRAAL-81)
Doug Simon <doug.simon@oracle.com>
parents: 9422
diff changeset
538 super.verify();
d84ea522800e replaced arithmetic_[fd]rem stubs with inline compiled code (GRAAL-81)
Doug Simon <doug.simon@oracle.com>
parents: 9422
diff changeset
539 verifyKind(opcode, result, x, y);
d84ea522800e replaced arithmetic_[fd]rem stubs with inline compiled code (GRAAL-81)
Doug Simon <doug.simon@oracle.com>
parents: 9422
diff changeset
540 }
d84ea522800e replaced arithmetic_[fd]rem stubs with inline compiled code (GRAAL-81)
Doug Simon <doug.simon@oracle.com>
parents: 9422
diff changeset
541 }
4323
df5547057954 Remove LIROpcode and use non-anonymous subclasses of LIRInstruction
Christian Wimmer <Christian.Wimmer@Oracle.com>
parents: 4254
diff changeset
542
df5547057954 Remove LIROpcode and use non-anonymous subclasses of LIRInstruction
Christian Wimmer <Christian.Wimmer@Oracle.com>
parents: 4254
diff changeset
543 @SuppressWarnings("unused")
13227
1a66453f73db renamed TargetMethodAssembler to CompilationResultBuilder
Doug Simon <doug.simon@oracle.com>
parents: 11355
diff changeset
544 protected static void emit(CompilationResultBuilder crb, AMD64MacroAssembler masm, AMD64Arithmetic opcode, AllocatableValue result) {
4323
df5547057954 Remove LIROpcode and use non-anonymous subclasses of LIRInstruction
Christian Wimmer <Christian.Wimmer@Oracle.com>
parents: 4254
diff changeset
545 switch (opcode) {
10959
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
546 case INEG:
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
547 masm.negl(asIntReg(result));
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
548 break;
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
549 case LNEG:
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
550 masm.negq(asLongReg(result));
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
551 break;
11355
01269a181628 add bitwise "not" operation
Lukas Stadler <lukas.stadler@jku.at>
parents: 11273
diff changeset
552 case INOT:
01269a181628 add bitwise "not" operation
Lukas Stadler <lukas.stadler@jku.at>
parents: 11273
diff changeset
553 masm.notl(asIntReg(result));
01269a181628 add bitwise "not" operation
Lukas Stadler <lukas.stadler@jku.at>
parents: 11273
diff changeset
554 break;
01269a181628 add bitwise "not" operation
Lukas Stadler <lukas.stadler@jku.at>
parents: 11273
diff changeset
555 case LNOT:
01269a181628 add bitwise "not" operation
Lukas Stadler <lukas.stadler@jku.at>
parents: 11273
diff changeset
556 masm.notq(asLongReg(result));
01269a181628 add bitwise "not" operation
Lukas Stadler <lukas.stadler@jku.at>
parents: 11273
diff changeset
557 break;
10959
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
558 default:
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
559 throw GraalInternalError.shouldNotReachHere();
4323
df5547057954 Remove LIROpcode and use non-anonymous subclasses of LIRInstruction
Christian Wimmer <Christian.Wimmer@Oracle.com>
parents: 4254
diff changeset
560 }
df5547057954 Remove LIROpcode and use non-anonymous subclasses of LIRInstruction
Christian Wimmer <Christian.Wimmer@Oracle.com>
parents: 4254
diff changeset
561 }
df5547057954 Remove LIROpcode and use non-anonymous subclasses of LIRInstruction
Christian Wimmer <Christian.Wimmer@Oracle.com>
parents: 4254
diff changeset
562
13227
1a66453f73db renamed TargetMethodAssembler to CompilationResultBuilder
Doug Simon <doug.simon@oracle.com>
parents: 11355
diff changeset
563 public static void emit(CompilationResultBuilder crb, AMD64MacroAssembler masm, AMD64Arithmetic opcode, Value dst, Value src, LIRFrameState info) {
4323
df5547057954 Remove LIROpcode and use non-anonymous subclasses of LIRInstruction
Christian Wimmer <Christian.Wimmer@Oracle.com>
parents: 4254
diff changeset
564 int exceptionOffset = -1;
df5547057954 Remove LIROpcode and use non-anonymous subclasses of LIRInstruction
Christian Wimmer <Christian.Wimmer@Oracle.com>
parents: 4254
diff changeset
565 if (isRegister(src)) {
df5547057954 Remove LIROpcode and use non-anonymous subclasses of LIRInstruction
Christian Wimmer <Christian.Wimmer@Oracle.com>
parents: 4254
diff changeset
566 switch (opcode) {
10959
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
567 case IADD:
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
568 masm.addl(asIntReg(dst), asIntReg(src));
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
569 break;
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
570 case ISUB:
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
571 masm.subl(asIntReg(dst), asIntReg(src));
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
572 break;
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
573 case IAND:
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
574 masm.andl(asIntReg(dst), asIntReg(src));
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
575 break;
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
576 case IMUL:
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
577 masm.imull(asIntReg(dst), asIntReg(src));
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
578 break;
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
579 case IOR:
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
580 masm.orl(asIntReg(dst), asIntReg(src));
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
581 break;
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
582 case IXOR:
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
583 masm.xorl(asIntReg(dst), asIntReg(src));
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
584 break;
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
585 case ISHL:
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
586 assert asIntReg(src).equals(AMD64.rcx);
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
587 masm.shll(asIntReg(dst));
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
588 break;
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
589 case ISHR:
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
590 assert asIntReg(src).equals(AMD64.rcx);
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
591 masm.sarl(asIntReg(dst));
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
592 break;
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
593 case IUSHR:
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
594 assert asIntReg(src).equals(AMD64.rcx);
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
595 masm.shrl(asIntReg(dst));
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
596 break;
15370
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15278
diff changeset
597 case IROL:
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15278
diff changeset
598 assert asIntReg(src).equals(AMD64.rcx);
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15278
diff changeset
599 masm.roll(asIntReg(dst));
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15278
diff changeset
600 break;
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15278
diff changeset
601 case IROR:
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15278
diff changeset
602 assert asIntReg(src).equals(AMD64.rcx);
15453
100306ae985b switch MatchRule from class to method annotation and fix review feedback
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15370
diff changeset
603 masm.rorl(asIntReg(dst));
15370
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15278
diff changeset
604 break;
4323
df5547057954 Remove LIROpcode and use non-anonymous subclasses of LIRInstruction
Christian Wimmer <Christian.Wimmer@Oracle.com>
parents: 4254
diff changeset
605
10959
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
606 case LADD:
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
607 masm.addq(asLongReg(dst), asLongReg(src));
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
608 break;
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
609 case LSUB:
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
610 masm.subq(asLongReg(dst), asLongReg(src));
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
611 break;
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
612 case LMUL:
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
613 masm.imulq(asLongReg(dst), asLongReg(src));
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
614 break;
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
615 case LAND:
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
616 masm.andq(asLongReg(dst), asLongReg(src));
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
617 break;
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
618 case LOR:
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
619 masm.orq(asLongReg(dst), asLongReg(src));
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
620 break;
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
621 case LXOR:
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
622 masm.xorq(asLongReg(dst), asLongReg(src));
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
623 break;
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
624 case LSHL:
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
625 assert asIntReg(src).equals(AMD64.rcx);
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
626 masm.shlq(asLongReg(dst));
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
627 break;
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
628 case LSHR:
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
629 assert asIntReg(src).equals(AMD64.rcx);
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
630 masm.sarq(asLongReg(dst));
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
631 break;
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
632 case LUSHR:
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
633 assert asIntReg(src).equals(AMD64.rcx);
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
634 masm.shrq(asLongReg(dst));
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
635 break;
15370
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15278
diff changeset
636 case LROL:
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15278
diff changeset
637 assert asIntReg(src).equals(AMD64.rcx);
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15278
diff changeset
638 masm.rolq(asLongReg(dst));
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15278
diff changeset
639 break;
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15278
diff changeset
640 case LROR:
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15278
diff changeset
641 assert asIntReg(src).equals(AMD64.rcx);
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15278
diff changeset
642 masm.rorq(asLongReg(dst));
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15278
diff changeset
643 break;
4323
df5547057954 Remove LIROpcode and use non-anonymous subclasses of LIRInstruction
Christian Wimmer <Christian.Wimmer@Oracle.com>
parents: 4254
diff changeset
644
10959
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
645 case FADD:
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
646 masm.addss(asFloatReg(dst), asFloatReg(src));
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
647 break;
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
648 case FSUB:
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
649 masm.subss(asFloatReg(dst), asFloatReg(src));
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
650 break;
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
651 case FMUL:
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
652 masm.mulss(asFloatReg(dst), asFloatReg(src));
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
653 break;
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
654 case FDIV:
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
655 masm.divss(asFloatReg(dst), asFloatReg(src));
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
656 break;
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
657 case FAND:
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
658 masm.andps(asFloatReg(dst), asFloatReg(src));
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
659 break;
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
660 case FOR:
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
661 masm.orps(asFloatReg(dst), asFloatReg(src));
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
662 break;
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
663 case FXOR:
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
664 masm.xorps(asFloatReg(dst), asFloatReg(src));
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
665 break;
4323
df5547057954 Remove LIROpcode and use non-anonymous subclasses of LIRInstruction
Christian Wimmer <Christian.Wimmer@Oracle.com>
parents: 4254
diff changeset
666
10959
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
667 case DADD:
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
668 masm.addsd(asDoubleReg(dst), asDoubleReg(src));
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
669 break;
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
670 case DSUB:
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
671 masm.subsd(asDoubleReg(dst), asDoubleReg(src));
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
672 break;
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
673 case DMUL:
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
674 masm.mulsd(asDoubleReg(dst), asDoubleReg(src));
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
675 break;
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
676 case DDIV:
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
677 masm.divsd(asDoubleReg(dst), asDoubleReg(src));
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
678 break;
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
679 case DAND:
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
680 masm.andpd(asDoubleReg(dst), asDoubleReg(src));
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
681 break;
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
682 case DOR:
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
683 masm.orpd(asDoubleReg(dst), asDoubleReg(src));
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
684 break;
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
685 case DXOR:
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
686 masm.xorpd(asDoubleReg(dst), asDoubleReg(src));
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
687 break;
4254
1cf920630944 Canonicalize parameter lists and names
Christian Wimmer <Christian.Wimmer@Oracle.com>
parents: 4245
diff changeset
688
11273
b5e95841d366 Move SQRT from AMD64MathIntrinsicOp to AMD64Arithmetic.
Roland Schatz <roland.schatz@oracle.com>
parents: 10959
diff changeset
689 case SQRT:
b5e95841d366 Move SQRT from AMD64MathIntrinsicOp to AMD64Arithmetic.
Roland Schatz <roland.schatz@oracle.com>
parents: 10959
diff changeset
690 masm.sqrtsd(asDoubleReg(dst), asDoubleReg(src));
b5e95841d366 Move SQRT from AMD64MathIntrinsicOp to AMD64Arithmetic.
Roland Schatz <roland.schatz@oracle.com>
parents: 10959
diff changeset
691 break;
b5e95841d366 Move SQRT from AMD64MathIntrinsicOp to AMD64Arithmetic.
Roland Schatz <roland.schatz@oracle.com>
parents: 10959
diff changeset
692
14001
79114edb5130 Explicit x2L instructions in AMD64 backend.
Roland Schatz <roland.schatz@oracle.com>
parents: 13587
diff changeset
693 case B2I:
13587
40e81cba9e08 renamed movzx/movsx instructions; removed duplicate movswl; added movzbl
twisti
parents: 13265
diff changeset
694 masm.movsbl(asIntReg(dst), asIntReg(src));
10959
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
695 break;
14001
79114edb5130 Explicit x2L instructions in AMD64 backend.
Roland Schatz <roland.schatz@oracle.com>
parents: 13587
diff changeset
696 case S2I:
13587
40e81cba9e08 renamed movzx/movsx instructions; removed duplicate movswl; added movzbl
twisti
parents: 13265
diff changeset
697 masm.movswl(asIntReg(dst), asIntReg(src));
10959
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
698 break;
14001
79114edb5130 Explicit x2L instructions in AMD64 backend.
Roland Schatz <roland.schatz@oracle.com>
parents: 13587
diff changeset
699 case B2L:
79114edb5130 Explicit x2L instructions in AMD64 backend.
Roland Schatz <roland.schatz@oracle.com>
parents: 13587
diff changeset
700 masm.movsbq(asLongReg(dst), asIntReg(src));
79114edb5130 Explicit x2L instructions in AMD64 backend.
Roland Schatz <roland.schatz@oracle.com>
parents: 13587
diff changeset
701 break;
79114edb5130 Explicit x2L instructions in AMD64 backend.
Roland Schatz <roland.schatz@oracle.com>
parents: 13587
diff changeset
702 case S2L:
79114edb5130 Explicit x2L instructions in AMD64 backend.
Roland Schatz <roland.schatz@oracle.com>
parents: 13587
diff changeset
703 masm.movswq(asLongReg(dst), asIntReg(src));
79114edb5130 Explicit x2L instructions in AMD64 backend.
Roland Schatz <roland.schatz@oracle.com>
parents: 13587
diff changeset
704 break;
10959
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
705 case I2L:
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
706 masm.movslq(asLongReg(dst), asIntReg(src));
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
707 break;
15278
3ef4196cf8e5 use movl instead of andl for L2I
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15193
diff changeset
708 case L2I:
3ef4196cf8e5 use movl instead of andl for L2I
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15193
diff changeset
709 masm.movl(asIntReg(dst), asLongReg(src));
3ef4196cf8e5 use movl instead of andl for L2I
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15193
diff changeset
710 break;
10959
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
711 case F2D:
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
712 masm.cvtss2sd(asDoubleReg(dst), asFloatReg(src));
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
713 break;
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
714 case D2F:
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
715 masm.cvtsd2ss(asFloatReg(dst), asDoubleReg(src));
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
716 break;
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
717 case I2F:
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
718 masm.cvtsi2ssl(asFloatReg(dst), asIntReg(src));
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
719 break;
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
720 case I2D:
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
721 masm.cvtsi2sdl(asDoubleReg(dst), asIntReg(src));
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
722 break;
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
723 case L2F:
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
724 masm.cvtsi2ssq(asFloatReg(dst), asLongReg(src));
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
725 break;
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
726 case L2D:
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
727 masm.cvtsi2sdq(asDoubleReg(dst), asLongReg(src));
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
728 break;
4323
df5547057954 Remove LIROpcode and use non-anonymous subclasses of LIRInstruction
Christian Wimmer <Christian.Wimmer@Oracle.com>
parents: 4254
diff changeset
729 case F2I:
df5547057954 Remove LIROpcode and use non-anonymous subclasses of LIRInstruction
Christian Wimmer <Christian.Wimmer@Oracle.com>
parents: 4254
diff changeset
730 masm.cvttss2sil(asIntReg(dst), asFloatReg(src));
df5547057954 Remove LIROpcode and use non-anonymous subclasses of LIRInstruction
Christian Wimmer <Christian.Wimmer@Oracle.com>
parents: 4254
diff changeset
731 break;
df5547057954 Remove LIROpcode and use non-anonymous subclasses of LIRInstruction
Christian Wimmer <Christian.Wimmer@Oracle.com>
parents: 4254
diff changeset
732 case D2I:
df5547057954 Remove LIROpcode and use non-anonymous subclasses of LIRInstruction
Christian Wimmer <Christian.Wimmer@Oracle.com>
parents: 4254
diff changeset
733 masm.cvttsd2sil(asIntReg(dst), asDoubleReg(src));
df5547057954 Remove LIROpcode and use non-anonymous subclasses of LIRInstruction
Christian Wimmer <Christian.Wimmer@Oracle.com>
parents: 4254
diff changeset
734 break;
df5547057954 Remove LIROpcode and use non-anonymous subclasses of LIRInstruction
Christian Wimmer <Christian.Wimmer@Oracle.com>
parents: 4254
diff changeset
735 case F2L:
df5547057954 Remove LIROpcode and use non-anonymous subclasses of LIRInstruction
Christian Wimmer <Christian.Wimmer@Oracle.com>
parents: 4254
diff changeset
736 masm.cvttss2siq(asLongReg(dst), asFloatReg(src));
df5547057954 Remove LIROpcode and use non-anonymous subclasses of LIRInstruction
Christian Wimmer <Christian.Wimmer@Oracle.com>
parents: 4254
diff changeset
737 break;
df5547057954 Remove LIROpcode and use non-anonymous subclasses of LIRInstruction
Christian Wimmer <Christian.Wimmer@Oracle.com>
parents: 4254
diff changeset
738 case D2L:
df5547057954 Remove LIROpcode and use non-anonymous subclasses of LIRInstruction
Christian Wimmer <Christian.Wimmer@Oracle.com>
parents: 4254
diff changeset
739 masm.cvttsd2siq(asLongReg(dst), asDoubleReg(src));
df5547057954 Remove LIROpcode and use non-anonymous subclasses of LIRInstruction
Christian Wimmer <Christian.Wimmer@Oracle.com>
parents: 4254
diff changeset
740 break;
10959
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
741 case MOV_I2F:
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
742 masm.movdl(asFloatReg(dst), asIntReg(src));
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
743 break;
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
744 case MOV_L2D:
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
745 masm.movdq(asDoubleReg(dst), asLongReg(src));
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
746 break;
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
747 case MOV_F2I:
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
748 masm.movdl(asIntReg(dst), asFloatReg(src));
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
749 break;
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
750 case MOV_D2L:
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
751 masm.movdq(asLongReg(dst), asDoubleReg(src));
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
752 break;
4323
df5547057954 Remove LIROpcode and use non-anonymous subclasses of LIRInstruction
Christian Wimmer <Christian.Wimmer@Oracle.com>
parents: 4254
diff changeset
753
7379
0cc86f2309be Added DivRemOp that produces both the division result and the remainder.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents: 7306
diff changeset
754 case IDIVREM:
4323
df5547057954 Remove LIROpcode and use non-anonymous subclasses of LIRInstruction
Christian Wimmer <Christian.Wimmer@Oracle.com>
parents: 4254
diff changeset
755 case IDIV:
df5547057954 Remove LIROpcode and use non-anonymous subclasses of LIRInstruction
Christian Wimmer <Christian.Wimmer@Oracle.com>
parents: 4254
diff changeset
756 case IREM:
df5547057954 Remove LIROpcode and use non-anonymous subclasses of LIRInstruction
Christian Wimmer <Christian.Wimmer@Oracle.com>
parents: 4254
diff changeset
757 masm.cdql();
14031
390c4b742890 made com.oracle.graal.asm.Buffer non-public and a private field in AbstractAssembler
twisti
parents: 14001
diff changeset
758 exceptionOffset = masm.position();
4323
df5547057954 Remove LIROpcode and use non-anonymous subclasses of LIRInstruction
Christian Wimmer <Christian.Wimmer@Oracle.com>
parents: 4254
diff changeset
759 masm.idivl(asRegister(src));
df5547057954 Remove LIROpcode and use non-anonymous subclasses of LIRInstruction
Christian Wimmer <Christian.Wimmer@Oracle.com>
parents: 4254
diff changeset
760 break;
df5547057954 Remove LIROpcode and use non-anonymous subclasses of LIRInstruction
Christian Wimmer <Christian.Wimmer@Oracle.com>
parents: 4254
diff changeset
761
7379
0cc86f2309be Added DivRemOp that produces both the division result and the remainder.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents: 7306
diff changeset
762 case LDIVREM:
4323
df5547057954 Remove LIROpcode and use non-anonymous subclasses of LIRInstruction
Christian Wimmer <Christian.Wimmer@Oracle.com>
parents: 4254
diff changeset
763 case LDIV:
df5547057954 Remove LIROpcode and use non-anonymous subclasses of LIRInstruction
Christian Wimmer <Christian.Wimmer@Oracle.com>
parents: 4254
diff changeset
764 case LREM:
df5547057954 Remove LIROpcode and use non-anonymous subclasses of LIRInstruction
Christian Wimmer <Christian.Wimmer@Oracle.com>
parents: 4254
diff changeset
765 masm.cdqq();
14031
390c4b742890 made com.oracle.graal.asm.Buffer non-public and a private field in AbstractAssembler
twisti
parents: 14001
diff changeset
766 exceptionOffset = masm.position();
4323
df5547057954 Remove LIROpcode and use non-anonymous subclasses of LIRInstruction
Christian Wimmer <Christian.Wimmer@Oracle.com>
parents: 4254
diff changeset
767 masm.idivq(asRegister(src));
df5547057954 Remove LIROpcode and use non-anonymous subclasses of LIRInstruction
Christian Wimmer <Christian.Wimmer@Oracle.com>
parents: 4254
diff changeset
768 break;
df5547057954 Remove LIROpcode and use non-anonymous subclasses of LIRInstruction
Christian Wimmer <Christian.Wimmer@Oracle.com>
parents: 4254
diff changeset
769
df5547057954 Remove LIROpcode and use non-anonymous subclasses of LIRInstruction
Christian Wimmer <Christian.Wimmer@Oracle.com>
parents: 4254
diff changeset
770 case IUDIV:
df5547057954 Remove LIROpcode and use non-anonymous subclasses of LIRInstruction
Christian Wimmer <Christian.Wimmer@Oracle.com>
parents: 4254
diff changeset
771 case IUREM:
df5547057954 Remove LIROpcode and use non-anonymous subclasses of LIRInstruction
Christian Wimmer <Christian.Wimmer@Oracle.com>
parents: 4254
diff changeset
772 // Must zero the high 64-bit word (in RDX) of the dividend
df5547057954 Remove LIROpcode and use non-anonymous subclasses of LIRInstruction
Christian Wimmer <Christian.Wimmer@Oracle.com>
parents: 4254
diff changeset
773 masm.xorq(AMD64.rdx, AMD64.rdx);
14031
390c4b742890 made com.oracle.graal.asm.Buffer non-public and a private field in AbstractAssembler
twisti
parents: 14001
diff changeset
774 exceptionOffset = masm.position();
4323
df5547057954 Remove LIROpcode and use non-anonymous subclasses of LIRInstruction
Christian Wimmer <Christian.Wimmer@Oracle.com>
parents: 4254
diff changeset
775 masm.divl(asRegister(src));
df5547057954 Remove LIROpcode and use non-anonymous subclasses of LIRInstruction
Christian Wimmer <Christian.Wimmer@Oracle.com>
parents: 4254
diff changeset
776 break;
df5547057954 Remove LIROpcode and use non-anonymous subclasses of LIRInstruction
Christian Wimmer <Christian.Wimmer@Oracle.com>
parents: 4254
diff changeset
777
df5547057954 Remove LIROpcode and use non-anonymous subclasses of LIRInstruction
Christian Wimmer <Christian.Wimmer@Oracle.com>
parents: 4254
diff changeset
778 case LUDIV:
df5547057954 Remove LIROpcode and use non-anonymous subclasses of LIRInstruction
Christian Wimmer <Christian.Wimmer@Oracle.com>
parents: 4254
diff changeset
779 case LUREM:
df5547057954 Remove LIROpcode and use non-anonymous subclasses of LIRInstruction
Christian Wimmer <Christian.Wimmer@Oracle.com>
parents: 4254
diff changeset
780 // Must zero the high 64-bit word (in RDX) of the dividend
df5547057954 Remove LIROpcode and use non-anonymous subclasses of LIRInstruction
Christian Wimmer <Christian.Wimmer@Oracle.com>
parents: 4254
diff changeset
781 masm.xorq(AMD64.rdx, AMD64.rdx);
14031
390c4b742890 made com.oracle.graal.asm.Buffer non-public and a private field in AbstractAssembler
twisti
parents: 14001
diff changeset
782 exceptionOffset = masm.position();
4323
df5547057954 Remove LIROpcode and use non-anonymous subclasses of LIRInstruction
Christian Wimmer <Christian.Wimmer@Oracle.com>
parents: 4254
diff changeset
783 masm.divq(asRegister(src));
df5547057954 Remove LIROpcode and use non-anonymous subclasses of LIRInstruction
Christian Wimmer <Christian.Wimmer@Oracle.com>
parents: 4254
diff changeset
784 break;
df5547057954 Remove LIROpcode and use non-anonymous subclasses of LIRInstruction
Christian Wimmer <Christian.Wimmer@Oracle.com>
parents: 4254
diff changeset
785 default:
4524
dcc8f5c6f394 Refactorings to prepare for LIR project splitting
Christian Wimmer <Christian.Wimmer@Oracle.com>
parents: 4325
diff changeset
786 throw GraalInternalError.shouldNotReachHere();
3733
e233f5660da4 Added Java files from Maxine project.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
diff changeset
787 }
4323
df5547057954 Remove LIROpcode and use non-anonymous subclasses of LIRInstruction
Christian Wimmer <Christian.Wimmer@Oracle.com>
parents: 4254
diff changeset
788 } else if (isConstant(src)) {
df5547057954 Remove LIROpcode and use non-anonymous subclasses of LIRInstruction
Christian Wimmer <Christian.Wimmer@Oracle.com>
parents: 4254
diff changeset
789 switch (opcode) {
10959
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
790 case IADD:
13227
1a66453f73db renamed TargetMethodAssembler to CompilationResultBuilder
Doug Simon <doug.simon@oracle.com>
parents: 11355
diff changeset
791 masm.incrementl(asIntReg(dst), crb.asIntConst(src));
10959
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
792 break;
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
793 case ISUB:
13227
1a66453f73db renamed TargetMethodAssembler to CompilationResultBuilder
Doug Simon <doug.simon@oracle.com>
parents: 11355
diff changeset
794 masm.decrementl(asIntReg(dst), crb.asIntConst(src));
10959
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
795 break;
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
796 case IAND:
13227
1a66453f73db renamed TargetMethodAssembler to CompilationResultBuilder
Doug Simon <doug.simon@oracle.com>
parents: 11355
diff changeset
797 masm.andl(asIntReg(dst), crb.asIntConst(src));
10959
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
798 break;
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
799 case IOR:
13227
1a66453f73db renamed TargetMethodAssembler to CompilationResultBuilder
Doug Simon <doug.simon@oracle.com>
parents: 11355
diff changeset
800 masm.orl(asIntReg(dst), crb.asIntConst(src));
10959
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
801 break;
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
802 case IXOR:
13227
1a66453f73db renamed TargetMethodAssembler to CompilationResultBuilder
Doug Simon <doug.simon@oracle.com>
parents: 11355
diff changeset
803 masm.xorl(asIntReg(dst), crb.asIntConst(src));
10959
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
804 break;
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
805 case ISHL:
13227
1a66453f73db renamed TargetMethodAssembler to CompilationResultBuilder
Doug Simon <doug.simon@oracle.com>
parents: 11355
diff changeset
806 masm.shll(asIntReg(dst), crb.asIntConst(src) & 31);
10959
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
807 break;
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
808 case ISHR:
13227
1a66453f73db renamed TargetMethodAssembler to CompilationResultBuilder
Doug Simon <doug.simon@oracle.com>
parents: 11355
diff changeset
809 masm.sarl(asIntReg(dst), crb.asIntConst(src) & 31);
10959
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
810 break;
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
811 case IUSHR:
13227
1a66453f73db renamed TargetMethodAssembler to CompilationResultBuilder
Doug Simon <doug.simon@oracle.com>
parents: 11355
diff changeset
812 masm.shrl(asIntReg(dst), crb.asIntConst(src) & 31);
10959
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
813 break;
15370
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15278
diff changeset
814 case IROL:
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15278
diff changeset
815 masm.roll(asIntReg(dst), crb.asIntConst(src) & 31);
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15278
diff changeset
816 break;
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15278
diff changeset
817 case IROR:
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15278
diff changeset
818 masm.rorl(asIntReg(dst), crb.asIntConst(src) & 31);
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15278
diff changeset
819 break;
4323
df5547057954 Remove LIROpcode and use non-anonymous subclasses of LIRInstruction
Christian Wimmer <Christian.Wimmer@Oracle.com>
parents: 4254
diff changeset
820
10959
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
821 case LADD:
13227
1a66453f73db renamed TargetMethodAssembler to CompilationResultBuilder
Doug Simon <doug.simon@oracle.com>
parents: 11355
diff changeset
822 masm.addq(asLongReg(dst), crb.asIntConst(src));
10959
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
823 break;
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
824 case LSUB:
13227
1a66453f73db renamed TargetMethodAssembler to CompilationResultBuilder
Doug Simon <doug.simon@oracle.com>
parents: 11355
diff changeset
825 masm.subq(asLongReg(dst), crb.asIntConst(src));
10959
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
826 break;
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
827 case LAND:
13227
1a66453f73db renamed TargetMethodAssembler to CompilationResultBuilder
Doug Simon <doug.simon@oracle.com>
parents: 11355
diff changeset
828 masm.andq(asLongReg(dst), crb.asIntConst(src));
10959
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
829 break;
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
830 case LOR:
13227
1a66453f73db renamed TargetMethodAssembler to CompilationResultBuilder
Doug Simon <doug.simon@oracle.com>
parents: 11355
diff changeset
831 masm.orq(asLongReg(dst), crb.asIntConst(src));
10959
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
832 break;
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
833 case LXOR:
13227
1a66453f73db renamed TargetMethodAssembler to CompilationResultBuilder
Doug Simon <doug.simon@oracle.com>
parents: 11355
diff changeset
834 masm.xorq(asLongReg(dst), crb.asIntConst(src));
10959
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
835 break;
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
836 case LSHL:
13227
1a66453f73db renamed TargetMethodAssembler to CompilationResultBuilder
Doug Simon <doug.simon@oracle.com>
parents: 11355
diff changeset
837 masm.shlq(asLongReg(dst), crb.asIntConst(src) & 63);
10959
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
838 break;
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
839 case LSHR:
13227
1a66453f73db renamed TargetMethodAssembler to CompilationResultBuilder
Doug Simon <doug.simon@oracle.com>
parents: 11355
diff changeset
840 masm.sarq(asLongReg(dst), crb.asIntConst(src) & 63);
10959
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
841 break;
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
842 case LUSHR:
13227
1a66453f73db renamed TargetMethodAssembler to CompilationResultBuilder
Doug Simon <doug.simon@oracle.com>
parents: 11355
diff changeset
843 masm.shrq(asLongReg(dst), crb.asIntConst(src) & 63);
10959
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
844 break;
15370
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15278
diff changeset
845 case LROL:
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15278
diff changeset
846 masm.rolq(asLongReg(dst), crb.asIntConst(src) & 31);
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15278
diff changeset
847 break;
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15278
diff changeset
848 case LROR:
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15278
diff changeset
849 masm.rorq(asLongReg(dst), crb.asIntConst(src) & 31);
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15278
diff changeset
850 break;
4323
df5547057954 Remove LIROpcode and use non-anonymous subclasses of LIRInstruction
Christian Wimmer <Christian.Wimmer@Oracle.com>
parents: 4254
diff changeset
851
10959
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
852 case FADD:
13227
1a66453f73db renamed TargetMethodAssembler to CompilationResultBuilder
Doug Simon <doug.simon@oracle.com>
parents: 11355
diff changeset
853 masm.addss(asFloatReg(dst), (AMD64Address) crb.asFloatConstRef(src));
10959
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
854 break;
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
855 case FSUB:
13227
1a66453f73db renamed TargetMethodAssembler to CompilationResultBuilder
Doug Simon <doug.simon@oracle.com>
parents: 11355
diff changeset
856 masm.subss(asFloatReg(dst), (AMD64Address) crb.asFloatConstRef(src));
10959
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
857 break;
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
858 case FMUL:
13227
1a66453f73db renamed TargetMethodAssembler to CompilationResultBuilder
Doug Simon <doug.simon@oracle.com>
parents: 11355
diff changeset
859 masm.mulss(asFloatReg(dst), (AMD64Address) crb.asFloatConstRef(src));
10959
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
860 break;
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
861 case FAND:
13227
1a66453f73db renamed TargetMethodAssembler to CompilationResultBuilder
Doug Simon <doug.simon@oracle.com>
parents: 11355
diff changeset
862 masm.andps(asFloatReg(dst), (AMD64Address) crb.asFloatConstRef(src, 16));
10959
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
863 break;
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
864 case FOR:
13227
1a66453f73db renamed TargetMethodAssembler to CompilationResultBuilder
Doug Simon <doug.simon@oracle.com>
parents: 11355
diff changeset
865 masm.orps(asFloatReg(dst), (AMD64Address) crb.asFloatConstRef(src, 16));
10959
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
866 break;
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
867 case FXOR:
13227
1a66453f73db renamed TargetMethodAssembler to CompilationResultBuilder
Doug Simon <doug.simon@oracle.com>
parents: 11355
diff changeset
868 masm.xorps(asFloatReg(dst), (AMD64Address) crb.asFloatConstRef(src, 16));
10959
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
869 break;
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
870 case FDIV:
13227
1a66453f73db renamed TargetMethodAssembler to CompilationResultBuilder
Doug Simon <doug.simon@oracle.com>
parents: 11355
diff changeset
871 masm.divss(asFloatReg(dst), (AMD64Address) crb.asFloatConstRef(src));
10959
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
872 break;
4323
df5547057954 Remove LIROpcode and use non-anonymous subclasses of LIRInstruction
Christian Wimmer <Christian.Wimmer@Oracle.com>
parents: 4254
diff changeset
873
10959
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
874 case DADD:
13227
1a66453f73db renamed TargetMethodAssembler to CompilationResultBuilder
Doug Simon <doug.simon@oracle.com>
parents: 11355
diff changeset
875 masm.addsd(asDoubleReg(dst), (AMD64Address) crb.asDoubleConstRef(src));
10959
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
876 break;
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
877 case DSUB:
13227
1a66453f73db renamed TargetMethodAssembler to CompilationResultBuilder
Doug Simon <doug.simon@oracle.com>
parents: 11355
diff changeset
878 masm.subsd(asDoubleReg(dst), (AMD64Address) crb.asDoubleConstRef(src));
10959
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
879 break;
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
880 case DMUL:
13227
1a66453f73db renamed TargetMethodAssembler to CompilationResultBuilder
Doug Simon <doug.simon@oracle.com>
parents: 11355
diff changeset
881 masm.mulsd(asDoubleReg(dst), (AMD64Address) crb.asDoubleConstRef(src));
10959
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
882 break;
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
883 case DDIV:
13227
1a66453f73db renamed TargetMethodAssembler to CompilationResultBuilder
Doug Simon <doug.simon@oracle.com>
parents: 11355
diff changeset
884 masm.divsd(asDoubleReg(dst), (AMD64Address) crb.asDoubleConstRef(src));
10959
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
885 break;
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
886 case DAND:
13227
1a66453f73db renamed TargetMethodAssembler to CompilationResultBuilder
Doug Simon <doug.simon@oracle.com>
parents: 11355
diff changeset
887 masm.andpd(asDoubleReg(dst), (AMD64Address) crb.asDoubleConstRef(src, 16));
10959
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
888 break;
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
889 case DOR:
13227
1a66453f73db renamed TargetMethodAssembler to CompilationResultBuilder
Doug Simon <doug.simon@oracle.com>
parents: 11355
diff changeset
890 masm.orpd(asDoubleReg(dst), (AMD64Address) crb.asDoubleConstRef(src, 16));
10959
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
891 break;
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
892 case DXOR:
13227
1a66453f73db renamed TargetMethodAssembler to CompilationResultBuilder
Doug Simon <doug.simon@oracle.com>
parents: 11355
diff changeset
893 masm.xorpd(asDoubleReg(dst), (AMD64Address) crb.asDoubleConstRef(src, 16));
10959
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
894 break;
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
895 default:
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
896 throw GraalInternalError.shouldNotReachHere();
3733
e233f5660da4 Added Java files from Maxine project.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
diff changeset
897 }
14707
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
898 } else if (isStackSlot(src)) {
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
899
4323
df5547057954 Remove LIROpcode and use non-anonymous subclasses of LIRInstruction
Christian Wimmer <Christian.Wimmer@Oracle.com>
parents: 4254
diff changeset
900 switch (opcode) {
10959
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
901 case IADD:
13227
1a66453f73db renamed TargetMethodAssembler to CompilationResultBuilder
Doug Simon <doug.simon@oracle.com>
parents: 11355
diff changeset
902 masm.addl(asIntReg(dst), (AMD64Address) crb.asIntAddr(src));
10959
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
903 break;
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
904 case ISUB:
13227
1a66453f73db renamed TargetMethodAssembler to CompilationResultBuilder
Doug Simon <doug.simon@oracle.com>
parents: 11355
diff changeset
905 masm.subl(asIntReg(dst), (AMD64Address) crb.asIntAddr(src));
10959
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
906 break;
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
907 case IAND:
13227
1a66453f73db renamed TargetMethodAssembler to CompilationResultBuilder
Doug Simon <doug.simon@oracle.com>
parents: 11355
diff changeset
908 masm.andl(asIntReg(dst), (AMD64Address) crb.asIntAddr(src));
10959
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
909 break;
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
910 case IMUL:
13227
1a66453f73db renamed TargetMethodAssembler to CompilationResultBuilder
Doug Simon <doug.simon@oracle.com>
parents: 11355
diff changeset
911 masm.imull(asIntReg(dst), (AMD64Address) crb.asIntAddr(src));
10959
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
912 break;
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
913 case IOR:
13227
1a66453f73db renamed TargetMethodAssembler to CompilationResultBuilder
Doug Simon <doug.simon@oracle.com>
parents: 11355
diff changeset
914 masm.orl(asIntReg(dst), (AMD64Address) crb.asIntAddr(src));
10959
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
915 break;
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
916 case IXOR:
13227
1a66453f73db renamed TargetMethodAssembler to CompilationResultBuilder
Doug Simon <doug.simon@oracle.com>
parents: 11355
diff changeset
917 masm.xorl(asIntReg(dst), (AMD64Address) crb.asIntAddr(src));
10959
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
918 break;
4323
df5547057954 Remove LIROpcode and use non-anonymous subclasses of LIRInstruction
Christian Wimmer <Christian.Wimmer@Oracle.com>
parents: 4254
diff changeset
919
10959
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
920 case LADD:
13227
1a66453f73db renamed TargetMethodAssembler to CompilationResultBuilder
Doug Simon <doug.simon@oracle.com>
parents: 11355
diff changeset
921 masm.addq(asLongReg(dst), (AMD64Address) crb.asLongAddr(src));
10959
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
922 break;
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
923 case LSUB:
13227
1a66453f73db renamed TargetMethodAssembler to CompilationResultBuilder
Doug Simon <doug.simon@oracle.com>
parents: 11355
diff changeset
924 masm.subq(asLongReg(dst), (AMD64Address) crb.asLongAddr(src));
10959
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
925 break;
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
926 case LMUL:
13227
1a66453f73db renamed TargetMethodAssembler to CompilationResultBuilder
Doug Simon <doug.simon@oracle.com>
parents: 11355
diff changeset
927 masm.imulq(asLongReg(dst), (AMD64Address) crb.asLongAddr(src));
10959
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
928 break;
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
929 case LAND:
13227
1a66453f73db renamed TargetMethodAssembler to CompilationResultBuilder
Doug Simon <doug.simon@oracle.com>
parents: 11355
diff changeset
930 masm.andq(asLongReg(dst), (AMD64Address) crb.asLongAddr(src));
10959
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
931 break;
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
932 case LOR:
13227
1a66453f73db renamed TargetMethodAssembler to CompilationResultBuilder
Doug Simon <doug.simon@oracle.com>
parents: 11355
diff changeset
933 masm.orq(asLongReg(dst), (AMD64Address) crb.asLongAddr(src));
10959
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
934 break;
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
935 case LXOR:
13227
1a66453f73db renamed TargetMethodAssembler to CompilationResultBuilder
Doug Simon <doug.simon@oracle.com>
parents: 11355
diff changeset
936 masm.xorq(asLongReg(dst), (AMD64Address) crb.asLongAddr(src));
10959
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
937 break;
4323
df5547057954 Remove LIROpcode and use non-anonymous subclasses of LIRInstruction
Christian Wimmer <Christian.Wimmer@Oracle.com>
parents: 4254
diff changeset
938
10959
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
939 case FADD:
13227
1a66453f73db renamed TargetMethodAssembler to CompilationResultBuilder
Doug Simon <doug.simon@oracle.com>
parents: 11355
diff changeset
940 masm.addss(asFloatReg(dst), (AMD64Address) crb.asFloatAddr(src));
10959
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
941 break;
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
942 case FSUB:
13227
1a66453f73db renamed TargetMethodAssembler to CompilationResultBuilder
Doug Simon <doug.simon@oracle.com>
parents: 11355
diff changeset
943 masm.subss(asFloatReg(dst), (AMD64Address) crb.asFloatAddr(src));
10959
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
944 break;
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
945 case FMUL:
13227
1a66453f73db renamed TargetMethodAssembler to CompilationResultBuilder
Doug Simon <doug.simon@oracle.com>
parents: 11355
diff changeset
946 masm.mulss(asFloatReg(dst), (AMD64Address) crb.asFloatAddr(src));
10959
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
947 break;
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
948 case FDIV:
13227
1a66453f73db renamed TargetMethodAssembler to CompilationResultBuilder
Doug Simon <doug.simon@oracle.com>
parents: 11355
diff changeset
949 masm.divss(asFloatReg(dst), (AMD64Address) crb.asFloatAddr(src));
10959
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
950 break;
4323
df5547057954 Remove LIROpcode and use non-anonymous subclasses of LIRInstruction
Christian Wimmer <Christian.Wimmer@Oracle.com>
parents: 4254
diff changeset
951
10959
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
952 case DADD:
13227
1a66453f73db renamed TargetMethodAssembler to CompilationResultBuilder
Doug Simon <doug.simon@oracle.com>
parents: 11355
diff changeset
953 masm.addsd(asDoubleReg(dst), (AMD64Address) crb.asDoubleAddr(src));
10959
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
954 break;
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
955 case DSUB:
13227
1a66453f73db renamed TargetMethodAssembler to CompilationResultBuilder
Doug Simon <doug.simon@oracle.com>
parents: 11355
diff changeset
956 masm.subsd(asDoubleReg(dst), (AMD64Address) crb.asDoubleAddr(src));
10959
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
957 break;
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
958 case DMUL:
13227
1a66453f73db renamed TargetMethodAssembler to CompilationResultBuilder
Doug Simon <doug.simon@oracle.com>
parents: 11355
diff changeset
959 masm.mulsd(asDoubleReg(dst), (AMD64Address) crb.asDoubleAddr(src));
10959
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
960 break;
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
961 case DDIV:
13227
1a66453f73db renamed TargetMethodAssembler to CompilationResultBuilder
Doug Simon <doug.simon@oracle.com>
parents: 11355
diff changeset
962 masm.divsd(asDoubleReg(dst), (AMD64Address) crb.asDoubleAddr(src));
10959
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
963 break;
8192
b1d5f203c57d Allow STACK argument in conversion ops.
Roland Schatz <roland.schatz@oracle.com>
parents: 8179
diff changeset
964
11273
b5e95841d366 Move SQRT from AMD64MathIntrinsicOp to AMD64Arithmetic.
Roland Schatz <roland.schatz@oracle.com>
parents: 10959
diff changeset
965 case SQRT:
13227
1a66453f73db renamed TargetMethodAssembler to CompilationResultBuilder
Doug Simon <doug.simon@oracle.com>
parents: 11355
diff changeset
966 masm.sqrtsd(asDoubleReg(dst), (AMD64Address) crb.asDoubleAddr(src));
11273
b5e95841d366 Move SQRT from AMD64MathIntrinsicOp to AMD64Arithmetic.
Roland Schatz <roland.schatz@oracle.com>
parents: 10959
diff changeset
967 break;
b5e95841d366 Move SQRT from AMD64MathIntrinsicOp to AMD64Arithmetic.
Roland Schatz <roland.schatz@oracle.com>
parents: 10959
diff changeset
968
14001
79114edb5130 Explicit x2L instructions in AMD64 backend.
Roland Schatz <roland.schatz@oracle.com>
parents: 13587
diff changeset
969 case B2I:
16891
f3bc50fe5157 use correct asXyzAddr methods in AMD64Arithmetic
Lukas Stadler <lukas.stadler@oracle.com>
parents: 16346
diff changeset
970 masm.movsbl(asIntReg(dst), (AMD64Address) crb.asByteAddr(src));
10959
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
971 break;
14001
79114edb5130 Explicit x2L instructions in AMD64 backend.
Roland Schatz <roland.schatz@oracle.com>
parents: 13587
diff changeset
972 case S2I:
16891
f3bc50fe5157 use correct asXyzAddr methods in AMD64Arithmetic
Lukas Stadler <lukas.stadler@oracle.com>
parents: 16346
diff changeset
973 masm.movswl(asIntReg(dst), (AMD64Address) crb.asShortAddr(src));
10959
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
974 break;
14001
79114edb5130 Explicit x2L instructions in AMD64 backend.
Roland Schatz <roland.schatz@oracle.com>
parents: 13587
diff changeset
975 case B2L:
16891
f3bc50fe5157 use correct asXyzAddr methods in AMD64Arithmetic
Lukas Stadler <lukas.stadler@oracle.com>
parents: 16346
diff changeset
976 masm.movsbq(asLongReg(dst), (AMD64Address) crb.asByteAddr(src));
14001
79114edb5130 Explicit x2L instructions in AMD64 backend.
Roland Schatz <roland.schatz@oracle.com>
parents: 13587
diff changeset
977 break;
79114edb5130 Explicit x2L instructions in AMD64 backend.
Roland Schatz <roland.schatz@oracle.com>
parents: 13587
diff changeset
978 case S2L:
16891
f3bc50fe5157 use correct asXyzAddr methods in AMD64Arithmetic
Lukas Stadler <lukas.stadler@oracle.com>
parents: 16346
diff changeset
979 masm.movswq(asLongReg(dst), (AMD64Address) crb.asShortAddr(src));
14001
79114edb5130 Explicit x2L instructions in AMD64 backend.
Roland Schatz <roland.schatz@oracle.com>
parents: 13587
diff changeset
980 break;
10959
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
981 case I2L:
13227
1a66453f73db renamed TargetMethodAssembler to CompilationResultBuilder
Doug Simon <doug.simon@oracle.com>
parents: 11355
diff changeset
982 masm.movslq(asLongReg(dst), (AMD64Address) crb.asIntAddr(src));
10959
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
983 break;
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
984 case F2D:
13227
1a66453f73db renamed TargetMethodAssembler to CompilationResultBuilder
Doug Simon <doug.simon@oracle.com>
parents: 11355
diff changeset
985 masm.cvtss2sd(asDoubleReg(dst), (AMD64Address) crb.asFloatAddr(src));
10959
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
986 break;
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
987 case D2F:
13227
1a66453f73db renamed TargetMethodAssembler to CompilationResultBuilder
Doug Simon <doug.simon@oracle.com>
parents: 11355
diff changeset
988 masm.cvtsd2ss(asFloatReg(dst), (AMD64Address) crb.asDoubleAddr(src));
10959
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
989 break;
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
990 case I2F:
13227
1a66453f73db renamed TargetMethodAssembler to CompilationResultBuilder
Doug Simon <doug.simon@oracle.com>
parents: 11355
diff changeset
991 masm.cvtsi2ssl(asFloatReg(dst), (AMD64Address) crb.asIntAddr(src));
10959
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
992 break;
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
993 case I2D:
13227
1a66453f73db renamed TargetMethodAssembler to CompilationResultBuilder
Doug Simon <doug.simon@oracle.com>
parents: 11355
diff changeset
994 masm.cvtsi2sdl(asDoubleReg(dst), (AMD64Address) crb.asIntAddr(src));
10959
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
995 break;
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
996 case L2F:
13227
1a66453f73db renamed TargetMethodAssembler to CompilationResultBuilder
Doug Simon <doug.simon@oracle.com>
parents: 11355
diff changeset
997 masm.cvtsi2ssq(asFloatReg(dst), (AMD64Address) crb.asLongAddr(src));
10959
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
998 break;
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
999 case L2D:
13227
1a66453f73db renamed TargetMethodAssembler to CompilationResultBuilder
Doug Simon <doug.simon@oracle.com>
parents: 11355
diff changeset
1000 masm.cvtsi2sdq(asDoubleReg(dst), (AMD64Address) crb.asLongAddr(src));
10959
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
1001 break;
8192
b1d5f203c57d Allow STACK argument in conversion ops.
Roland Schatz <roland.schatz@oracle.com>
parents: 8179
diff changeset
1002 case F2I:
13227
1a66453f73db renamed TargetMethodAssembler to CompilationResultBuilder
Doug Simon <doug.simon@oracle.com>
parents: 11355
diff changeset
1003 masm.cvttss2sil(asIntReg(dst), (AMD64Address) crb.asFloatAddr(src));
8192
b1d5f203c57d Allow STACK argument in conversion ops.
Roland Schatz <roland.schatz@oracle.com>
parents: 8179
diff changeset
1004 break;
b1d5f203c57d Allow STACK argument in conversion ops.
Roland Schatz <roland.schatz@oracle.com>
parents: 8179
diff changeset
1005 case D2I:
13227
1a66453f73db renamed TargetMethodAssembler to CompilationResultBuilder
Doug Simon <doug.simon@oracle.com>
parents: 11355
diff changeset
1006 masm.cvttsd2sil(asIntReg(dst), (AMD64Address) crb.asDoubleAddr(src));
8192
b1d5f203c57d Allow STACK argument in conversion ops.
Roland Schatz <roland.schatz@oracle.com>
parents: 8179
diff changeset
1007 break;
b1d5f203c57d Allow STACK argument in conversion ops.
Roland Schatz <roland.schatz@oracle.com>
parents: 8179
diff changeset
1008 case F2L:
13227
1a66453f73db renamed TargetMethodAssembler to CompilationResultBuilder
Doug Simon <doug.simon@oracle.com>
parents: 11355
diff changeset
1009 masm.cvttss2siq(asLongReg(dst), (AMD64Address) crb.asFloatAddr(src));
8192
b1d5f203c57d Allow STACK argument in conversion ops.
Roland Schatz <roland.schatz@oracle.com>
parents: 8179
diff changeset
1010 break;
b1d5f203c57d Allow STACK argument in conversion ops.
Roland Schatz <roland.schatz@oracle.com>
parents: 8179
diff changeset
1011 case D2L:
13227
1a66453f73db renamed TargetMethodAssembler to CompilationResultBuilder
Doug Simon <doug.simon@oracle.com>
parents: 11355
diff changeset
1012 masm.cvttsd2siq(asLongReg(dst), (AMD64Address) crb.asDoubleAddr(src));
8192
b1d5f203c57d Allow STACK argument in conversion ops.
Roland Schatz <roland.schatz@oracle.com>
parents: 8179
diff changeset
1013 break;
10959
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
1014 case MOV_I2F:
13227
1a66453f73db renamed TargetMethodAssembler to CompilationResultBuilder
Doug Simon <doug.simon@oracle.com>
parents: 11355
diff changeset
1015 masm.movss(asFloatReg(dst), (AMD64Address) crb.asIntAddr(src));
10959
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
1016 break;
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
1017 case MOV_L2D:
13227
1a66453f73db renamed TargetMethodAssembler to CompilationResultBuilder
Doug Simon <doug.simon@oracle.com>
parents: 11355
diff changeset
1018 masm.movsd(asDoubleReg(dst), (AMD64Address) crb.asLongAddr(src));
10959
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
1019 break;
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
1020 case MOV_F2I:
13227
1a66453f73db renamed TargetMethodAssembler to CompilationResultBuilder
Doug Simon <doug.simon@oracle.com>
parents: 11355
diff changeset
1021 masm.movl(asIntReg(dst), (AMD64Address) crb.asFloatAddr(src));
10959
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
1022 break;
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
1023 case MOV_D2L:
13227
1a66453f73db renamed TargetMethodAssembler to CompilationResultBuilder
Doug Simon <doug.simon@oracle.com>
parents: 11355
diff changeset
1024 masm.movq(asLongReg(dst), (AMD64Address) crb.asDoubleAddr(src));
10959
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
1025 break;
8192
b1d5f203c57d Allow STACK argument in conversion ops.
Roland Schatz <roland.schatz@oracle.com>
parents: 8179
diff changeset
1026
10959
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
1027 default:
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
1028 throw GraalInternalError.shouldNotReachHere();
3733
e233f5660da4 Added Java files from Maxine project.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
diff changeset
1029 }
14707
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1030 } else {
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1031 switch (opcode) {
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1032 case IADD:
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1033 masm.addl(asIntReg(dst), ((AMD64AddressValue) src).toAddress());
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1034 break;
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1035 case ISUB:
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1036 masm.subl(asIntReg(dst), ((AMD64AddressValue) src).toAddress());
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1037 break;
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1038 case IAND:
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1039 masm.andl(asIntReg(dst), ((AMD64AddressValue) src).toAddress());
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1040 break;
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1041 case IMUL:
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1042 masm.imull(asIntReg(dst), ((AMD64AddressValue) src).toAddress());
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1043 break;
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1044 case IOR:
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1045 masm.orl(asIntReg(dst), ((AMD64AddressValue) src).toAddress());
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1046 break;
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1047 case IXOR:
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1048 masm.xorl(asIntReg(dst), ((AMD64AddressValue) src).toAddress());
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1049 break;
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1050
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1051 case LADD:
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1052 masm.addq(asLongReg(dst), ((AMD64AddressValue) src).toAddress());
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1053 break;
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1054 case LSUB:
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1055 masm.subq(asLongReg(dst), ((AMD64AddressValue) src).toAddress());
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1056 break;
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1057 case LMUL:
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1058 masm.imulq(asLongReg(dst), ((AMD64AddressValue) src).toAddress());
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1059 break;
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1060 case LAND:
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1061 masm.andq(asLongReg(dst), ((AMD64AddressValue) src).toAddress());
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1062 break;
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1063 case LOR:
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1064 masm.orq(asLongReg(dst), ((AMD64AddressValue) src).toAddress());
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1065 break;
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1066 case LXOR:
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1067 masm.xorq(asLongReg(dst), ((AMD64AddressValue) src).toAddress());
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1068 break;
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1069
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1070 case FADD:
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1071 masm.addss(asFloatReg(dst), ((AMD64AddressValue) src).toAddress());
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1072 break;
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1073 case FSUB:
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1074 masm.subss(asFloatReg(dst), ((AMD64AddressValue) src).toAddress());
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1075 break;
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1076 case FMUL:
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1077 masm.mulss(asFloatReg(dst), ((AMD64AddressValue) src).toAddress());
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1078 break;
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1079 case FDIV:
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1080 masm.divss(asFloatReg(dst), ((AMD64AddressValue) src).toAddress());
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1081 break;
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1082
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1083 case DADD:
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1084 masm.addsd(asDoubleReg(dst), ((AMD64AddressValue) src).toAddress());
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1085 break;
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1086 case DSUB:
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1087 masm.subsd(asDoubleReg(dst), ((AMD64AddressValue) src).toAddress());
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1088 break;
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1089 case DMUL:
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1090 masm.mulsd(asDoubleReg(dst), ((AMD64AddressValue) src).toAddress());
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1091 break;
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1092 case DDIV:
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1093 masm.divsd(asDoubleReg(dst), ((AMD64AddressValue) src).toAddress());
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1094 break;
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1095
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1096 case SQRT:
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1097 masm.sqrtsd(asDoubleReg(dst), ((AMD64AddressValue) src).toAddress());
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1098 break;
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1099
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1100 case B2I:
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1101 masm.movsbl(asIntReg(dst), ((AMD64AddressValue) src).toAddress());
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1102 break;
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1103 case S2I:
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1104 masm.movswl(asIntReg(dst), ((AMD64AddressValue) src).toAddress());
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1105 break;
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1106 case B2L:
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1107 masm.movsbq(asLongReg(dst), ((AMD64AddressValue) src).toAddress());
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1108 break;
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1109 case S2L:
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1110 masm.movswq(asLongReg(dst), ((AMD64AddressValue) src).toAddress());
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1111 break;
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1112 case I2L:
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1113 masm.movslq(asLongReg(dst), ((AMD64AddressValue) src).toAddress());
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1114 break;
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1115 case F2D:
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1116 masm.cvtss2sd(asDoubleReg(dst), ((AMD64AddressValue) src).toAddress());
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1117 break;
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1118 case D2F:
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1119 masm.cvtsd2ss(asFloatReg(dst), ((AMD64AddressValue) src).toAddress());
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1120 break;
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1121 case I2F:
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1122 masm.cvtsi2ssl(asFloatReg(dst), ((AMD64AddressValue) src).toAddress());
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1123 break;
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1124 case I2D:
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1125 masm.cvtsi2sdl(asDoubleReg(dst), ((AMD64AddressValue) src).toAddress());
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1126 break;
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1127 case L2F:
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1128 masm.cvtsi2ssq(asFloatReg(dst), ((AMD64AddressValue) src).toAddress());
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1129 break;
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1130 case L2D:
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1131 masm.cvtsi2sdq(asDoubleReg(dst), ((AMD64AddressValue) src).toAddress());
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1132 break;
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1133 case F2I:
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1134 masm.cvttss2sil(asIntReg(dst), ((AMD64AddressValue) src).toAddress());
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1135 break;
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1136 case D2I:
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1137 masm.cvttsd2sil(asIntReg(dst), ((AMD64AddressValue) src).toAddress());
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1138 break;
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1139 case F2L:
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1140 masm.cvttss2siq(asLongReg(dst), ((AMD64AddressValue) src).toAddress());
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1141 break;
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1142 case D2L:
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1143 masm.cvttsd2siq(asLongReg(dst), ((AMD64AddressValue) src).toAddress());
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1144 break;
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1145 case MOV_I2F:
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1146 masm.movss(asFloatReg(dst), ((AMD64AddressValue) src).toAddress());
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1147 break;
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1148 case MOV_L2D:
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1149 masm.movsd(asDoubleReg(dst), ((AMD64AddressValue) src).toAddress());
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1150 break;
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1151 case MOV_F2I:
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1152 masm.movl(asIntReg(dst), ((AMD64AddressValue) src).toAddress());
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1153 break;
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1154 case MOV_D2L:
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1155 masm.movq(asLongReg(dst), ((AMD64AddressValue) src).toAddress());
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1156 break;
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1157 case MOV_B2UI:
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1158 masm.movzbl(asIntReg(dst), ((AMD64AddressValue) src).toAddress());
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1159 break;
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1160 case MOV_B2UL:
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1161 masm.movzbl(asLongReg(dst), ((AMD64AddressValue) src).toAddress());
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1162 break;
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1163
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1164 default:
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1165 throw GraalInternalError.shouldNotReachHere();
6ce6c4ccba8f initial support for memory arithmetic on x86
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 14031
diff changeset
1166 }
3733
e233f5660da4 Added Java files from Maxine project.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
diff changeset
1167 }
4323
df5547057954 Remove LIROpcode and use non-anonymous subclasses of LIRInstruction
Christian Wimmer <Christian.Wimmer@Oracle.com>
parents: 4254
diff changeset
1168
df5547057954 Remove LIROpcode and use non-anonymous subclasses of LIRInstruction
Christian Wimmer <Christian.Wimmer@Oracle.com>
parents: 4254
diff changeset
1169 if (info != null) {
df5547057954 Remove LIROpcode and use non-anonymous subclasses of LIRInstruction
Christian Wimmer <Christian.Wimmer@Oracle.com>
parents: 4254
diff changeset
1170 assert exceptionOffset != -1;
13227
1a66453f73db renamed TargetMethodAssembler to CompilationResultBuilder
Doug Simon <doug.simon@oracle.com>
parents: 11355
diff changeset
1171 crb.recordImplicitException(exceptionOffset, info);
4323
df5547057954 Remove LIROpcode and use non-anonymous subclasses of LIRInstruction
Christian Wimmer <Christian.Wimmer@Oracle.com>
parents: 4254
diff changeset
1172 }
df5547057954 Remove LIROpcode and use non-anonymous subclasses of LIRInstruction
Christian Wimmer <Christian.Wimmer@Oracle.com>
parents: 4254
diff changeset
1173 }
df5547057954 Remove LIROpcode and use non-anonymous subclasses of LIRInstruction
Christian Wimmer <Christian.Wimmer@Oracle.com>
parents: 4254
diff changeset
1174
5539
bc647d8b0080 Renaming RiValue => Value.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents: 5538
diff changeset
1175 private static void verifyKind(AMD64Arithmetic opcode, Value result, Value x, Value y) {
14942
13a8c3454e76 Make type assertions in backend less strict.
Roland Schatz <roland.schatz@oracle.com>
parents: 14931
diff changeset
1176 assert (opcode.name().startsWith("I") && result.getKind().getStackKind() == Kind.Int && x.getKind().getStackKind() == Kind.Int && y.getKind().getStackKind() == Kind.Int) ||
10959
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
1177 (opcode.name().startsWith("L") && result.getKind() == Kind.Long && x.getKind() == Kind.Long && y.getKind() == Kind.Long) ||
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
1178 (opcode.name().startsWith("F") && result.getKind() == Kind.Float && x.getKind() == Kind.Float && y.getKind() == Kind.Float) ||
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
1179 (opcode.name().startsWith("D") && result.getKind() == Kind.Double && x.getKind() == Kind.Double && y.getKind() == Kind.Double) ||
109747b3b337 AMD64 cleanups
twisti
parents: 10513
diff changeset
1180 (opcode.name().matches(".U?SH.") && result.getKind() == x.getKind() && y.getKind() == Kind.Int && (isConstant(y) || asRegister(y).equals(AMD64.rcx)));
3733
e233f5660da4 Added Java files from Maxine project.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
diff changeset
1181 }
e233f5660da4 Added Java files from Maxine project.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
diff changeset
1182 }