annotate src/share/vm/opto/memnode.hpp @ 17795:a9becfeecd1b

Merge
author kvn
date Wed, 22 Jan 2014 17:42:23 -0800
parents 55fb97c4c58d 50fdb38839eb
children 4ca6dc0799b6 e7b3d177adda
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1 /*
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2 * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved.
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3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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4 *
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5 * This code is free software; you can redistribute it and/or modify it
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6 * under the terms of the GNU General Public License version 2 only, as
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7 * published by the Free Software Foundation.
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8 *
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9 * This code is distributed in the hope that it will be useful, but WITHOUT
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10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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12 * version 2 for more details (a copy is included in the LICENSE file that
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13 * accompanied this code).
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14 *
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15 * You should have received a copy of the GNU General Public License version
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16 * 2 along with this work; if not, write to the Free Software Foundation,
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17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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18 *
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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20 * or visit www.oracle.com if you need additional information or have any
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21 * questions.
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22 *
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23 */
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24
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25 #ifndef SHARE_VM_OPTO_MEMNODE_HPP
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26 #define SHARE_VM_OPTO_MEMNODE_HPP
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27
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28 #include "opto/multnode.hpp"
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29 #include "opto/node.hpp"
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30 #include "opto/opcodes.hpp"
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31 #include "opto/type.hpp"
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32
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33 // Portions of code courtesy of Clifford Click
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34
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35 class MultiNode;
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36 class PhaseCCP;
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37 class PhaseTransform;
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38
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39 //------------------------------MemNode----------------------------------------
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40 // Load or Store, possibly throwing a NULL pointer exception
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41 class MemNode : public Node {
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42 protected:
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43 #ifdef ASSERT
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44 const TypePtr* _adr_type; // What kind of memory is being addressed?
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45 #endif
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46 virtual uint size_of() const; // Size is bigger (ASSERT only)
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47 public:
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48 enum { Control, // When is it safe to do this load?
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49 Memory, // Chunk of memory is being loaded from
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50 Address, // Actually address, derived from base
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51 ValueIn, // Value to store
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52 OopStore // Preceeding oop store, only in StoreCM
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53 };
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54 typedef enum { unordered = 0,
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55 acquire, // Load has to acquire or be succeeded by MemBarAcquire.
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56 release // Store has to release or be preceded by MemBarRelease.
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57 } MemOrd;
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58 protected:
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59 MemNode( Node *c0, Node *c1, Node *c2, const TypePtr* at )
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60 : Node(c0,c1,c2 ) {
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61 init_class_id(Class_Mem);
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62 debug_only(_adr_type=at; adr_type();)
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63 }
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64 MemNode( Node *c0, Node *c1, Node *c2, const TypePtr* at, Node *c3 )
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65 : Node(c0,c1,c2,c3) {
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66 init_class_id(Class_Mem);
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67 debug_only(_adr_type=at; adr_type();)
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68 }
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69 MemNode( Node *c0, Node *c1, Node *c2, const TypePtr* at, Node *c3, Node *c4)
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70 : Node(c0,c1,c2,c3,c4) {
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71 init_class_id(Class_Mem);
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72 debug_only(_adr_type=at; adr_type();)
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73 }
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74
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75 public:
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76 // Helpers for the optimizer. Documented in memnode.cpp.
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77 static bool detect_ptr_independence(Node* p1, AllocateNode* a1,
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78 Node* p2, AllocateNode* a2,
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79 PhaseTransform* phase);
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80 static bool adr_phi_is_loop_invariant(Node* adr_phi, Node* cast);
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81
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82 static Node *optimize_simple_memory_chain(Node *mchain, const TypeOopPtr *t_oop, Node *load, PhaseGVN *phase);
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83 static Node *optimize_memory_chain(Node *mchain, const TypePtr *t_adr, Node *load, PhaseGVN *phase);
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84 // This one should probably be a phase-specific function:
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85 static bool all_controls_dominate(Node* dom, Node* sub);
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86
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87 // Find any cast-away of null-ness and keep its control.
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88 static Node *Ideal_common_DU_postCCP( PhaseCCP *ccp, Node* n, Node* adr );
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89 virtual Node *Ideal_DU_postCCP( PhaseCCP *ccp );
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90
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91 virtual const class TypePtr *adr_type() const; // returns bottom_type of address
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92
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93 // Shared code for Ideal methods:
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94 Node *Ideal_common(PhaseGVN *phase, bool can_reshape); // Return -1 for short-circuit NULL.
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95
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96 // Helper function for adr_type() implementations.
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97 static const TypePtr* calculate_adr_type(const Type* t, const TypePtr* cross_check = NULL);
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98
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99 // Raw access function, to allow copying of adr_type efficiently in
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100 // product builds and retain the debug info for debug builds.
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101 const TypePtr *raw_adr_type() const {
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102 #ifdef ASSERT
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103 return _adr_type;
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104 #else
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105 return 0;
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106 #endif
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107 }
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108
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109 // Map a load or store opcode to its corresponding store opcode.
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110 // (Return -1 if unknown.)
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111 virtual int store_Opcode() const { return -1; }
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112
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113 // What is the type of the value in memory? (T_VOID mean "unspecified".)
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114 virtual BasicType memory_type() const = 0;
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115 virtual int memory_size() const {
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116 #ifdef ASSERT
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117 return type2aelembytes(memory_type(), true);
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118 #else
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119 return type2aelembytes(memory_type());
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120 #endif
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121 }
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123 // Search through memory states which precede this node (load or store).
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124 // Look for an exact match for the address, with no intervening
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125 // aliased stores.
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126 Node* find_previous_store(PhaseTransform* phase);
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127
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128 // Can this node (load or store) accurately see a stored value in
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129 // the given memory state? (The state may or may not be in(Memory).)
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130 Node* can_see_stored_value(Node* st, PhaseTransform* phase) const;
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131
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132 #ifndef PRODUCT
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133 static void dump_adr_type(const Node* mem, const TypePtr* adr_type, outputStream *st);
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134 virtual void dump_spec(outputStream *st) const;
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135 #endif
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136 };
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137
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138 //------------------------------LoadNode---------------------------------------
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139 // Load value; requires Memory and Address
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140 class LoadNode : public MemNode {
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141 private:
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142 // On platforms with weak memory ordering (e.g., PPC, Ia64) we distinguish
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143 // loads that can be reordered, and such requiring acquire semantics to
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144 // adhere to the Java specification. The required behaviour is stored in
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145 // this field.
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146 const MemOrd _mo;
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147
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148 protected:
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149 virtual uint cmp(const Node &n) const;
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150 virtual uint size_of() const; // Size is bigger
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151 const Type* const _type; // What kind of value is loaded?
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152 public:
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153
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154 LoadNode(Node *c, Node *mem, Node *adr, const TypePtr* at, const Type *rt, MemOrd mo)
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155 : MemNode(c,mem,adr,at), _type(rt), _mo(mo) {
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156 init_class_id(Class_Load);
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157 }
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158 inline bool is_unordered() const { return !is_acquire(); }
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159 inline bool is_acquire() const {
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160 assert(_mo == unordered || _mo == acquire, "unexpected");
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161 return _mo == acquire;
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162 }
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163
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164 // Polymorphic factory method:
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165 static Node* make(PhaseGVN& gvn, Node *c, Node *mem, Node *adr,
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166 const TypePtr* at, const Type *rt, BasicType bt, MemOrd mo);
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167
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168 virtual uint hash() const; // Check the type
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169
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170 // Handle algebraic identities here. If we have an identity, return the Node
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171 // we are equivalent to. We look for Load of a Store.
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172 virtual Node *Identity( PhaseTransform *phase );
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173
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174 // If the load is from Field memory and the pointer is non-null, we can
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175 // zero out the control input.
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176 virtual Node *Ideal(PhaseGVN *phase, bool can_reshape);
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177
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178 // Split instance field load through Phi.
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179 Node* split_through_phi(PhaseGVN *phase);
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180
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181 // Recover original value from boxed values
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182 Node *eliminate_autobox(PhaseGVN *phase);
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183
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184 // Compute a new Type for this node. Basically we just do the pre-check,
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185 // then call the virtual add() to set the type.
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186 virtual const Type *Value( PhaseTransform *phase ) const;
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187
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188 // Common methods for LoadKlass and LoadNKlass nodes.
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189 const Type *klass_value_common( PhaseTransform *phase ) const;
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190 Node *klass_identity_common( PhaseTransform *phase );
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191
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192 virtual uint ideal_reg() const;
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193 virtual const Type *bottom_type() const;
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194 // Following method is copied from TypeNode:
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195 void set_type(const Type* t) {
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196 assert(t != NULL, "sanity");
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197 debug_only(uint check_hash = (VerifyHashTableKeys && _hash_lock) ? hash() : NO_HASH);
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198 *(const Type**)&_type = t; // cast away const-ness
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199 // If this node is in the hash table, make sure it doesn't need a rehash.
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200 assert(check_hash == NO_HASH || check_hash == hash(), "type change must preserve hash code");
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201 }
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202 const Type* type() const { assert(_type != NULL, "sanity"); return _type; };
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203
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204 // Do not match memory edge
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205 virtual uint match_edge(uint idx) const;
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206
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207 // Map a load opcode to its corresponding store opcode.
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208 virtual int store_Opcode() const = 0;
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209
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210 // Check if the load's memory input is a Phi node with the same control.
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211 bool is_instance_field_load_with_local_phi(Node* ctrl);
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212
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213 #ifndef PRODUCT
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214 virtual void dump_spec(outputStream *st) const;
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215 #endif
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216 #ifdef ASSERT
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217 // Helper function to allow a raw load without control edge for some cases
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218 static bool is_immutable_value(Node* adr);
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219 #endif
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220 protected:
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221 const Type* load_array_final_field(const TypeKlassPtr *tkls,
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222 ciKlass* klass) const;
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223 // depends_only_on_test is almost always true, and needs to be almost always
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224 // true to enable key hoisting & commoning optimizations. However, for the
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225 // special case of RawPtr loads from TLS top & end, and other loads performed by
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226 // GC barriers, the control edge carries the dependence preventing hoisting past
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227 // a Safepoint instead of the memory edge. (An unfortunate consequence of having
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228 // Safepoints not set Raw Memory; itself an unfortunate consequence of having Nodes
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229 // which produce results (new raw memory state) inside of loops preventing all
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230 // manner of other optimizations). Basically, it's ugly but so is the alternative.
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231 // See comment in macro.cpp, around line 125 expand_allocate_common().
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232 virtual bool depends_only_on_test() const { return adr_type() != TypeRawPtr::BOTTOM; }
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233
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234 };
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235
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236 //------------------------------LoadBNode--------------------------------------
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237 // Load a byte (8bits signed) from memory
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238 class LoadBNode : public LoadNode {
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239 public:
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240 LoadBNode(Node *c, Node *mem, Node *adr, const TypePtr* at, const TypeInt *ti, MemOrd mo)
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241 : LoadNode(c, mem, adr, at, ti, mo) {}
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242 virtual int Opcode() const;
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243 virtual uint ideal_reg() const { return Op_RegI; }
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244 virtual Node *Ideal(PhaseGVN *phase, bool can_reshape);
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245 virtual const Type *Value(PhaseTransform *phase) const;
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246 virtual int store_Opcode() const { return Op_StoreB; }
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247 virtual BasicType memory_type() const { return T_BYTE; }
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248 };
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249
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250 //------------------------------LoadUBNode-------------------------------------
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251 // Load a unsigned byte (8bits unsigned) from memory
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252 class LoadUBNode : public LoadNode {
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253 public:
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254 LoadUBNode(Node* c, Node* mem, Node* adr, const TypePtr* at, const TypeInt* ti, MemOrd mo)
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255 : LoadNode(c, mem, adr, at, ti, mo) {}
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256 virtual int Opcode() const;
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257 virtual uint ideal_reg() const { return Op_RegI; }
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258 virtual Node* Ideal(PhaseGVN *phase, bool can_reshape);
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259 virtual const Type *Value(PhaseTransform *phase) const;
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260 virtual int store_Opcode() const { return Op_StoreB; }
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261 virtual BasicType memory_type() const { return T_BYTE; }
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262 };
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263
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264 //------------------------------LoadUSNode-------------------------------------
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265 // Load an unsigned short/char (16bits unsigned) from memory
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266 class LoadUSNode : public LoadNode {
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267 public:
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268 LoadUSNode(Node *c, Node *mem, Node *adr, const TypePtr* at, const TypeInt *ti, MemOrd mo)
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269 : LoadNode(c, mem, adr, at, ti, mo) {}
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270 virtual int Opcode() const;
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271 virtual uint ideal_reg() const { return Op_RegI; }
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272 virtual Node *Ideal(PhaseGVN *phase, bool can_reshape);
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273 virtual const Type *Value(PhaseTransform *phase) const;
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274 virtual int store_Opcode() const { return Op_StoreC; }
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275 virtual BasicType memory_type() const { return T_CHAR; }
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276 };
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277
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278 //------------------------------LoadSNode--------------------------------------
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279 // Load a short (16bits signed) from memory
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280 class LoadSNode : public LoadNode {
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281 public:
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282 LoadSNode(Node *c, Node *mem, Node *adr, const TypePtr* at, const TypeInt *ti, MemOrd mo)
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283 : LoadNode(c, mem, adr, at, ti, mo) {}
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284 virtual int Opcode() const;
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285 virtual uint ideal_reg() const { return Op_RegI; }
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286 virtual Node *Ideal(PhaseGVN *phase, bool can_reshape);
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287 virtual const Type *Value(PhaseTransform *phase) const;
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288 virtual int store_Opcode() const { return Op_StoreC; }
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289 virtual BasicType memory_type() const { return T_SHORT; }
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290 };
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291
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292 //------------------------------LoadINode--------------------------------------
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293 // Load an integer from memory
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294 class LoadINode : public LoadNode {
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295 public:
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296 LoadINode(Node *c, Node *mem, Node *adr, const TypePtr* at, const TypeInt *ti, MemOrd mo)
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297 : LoadNode(c, mem, adr, at, ti, mo) {}
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298 virtual int Opcode() const;
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299 virtual uint ideal_reg() const { return Op_RegI; }
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300 virtual int store_Opcode() const { return Op_StoreI; }
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301 virtual BasicType memory_type() const { return T_INT; }
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302 };
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303
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304 //------------------------------LoadRangeNode----------------------------------
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305 // Load an array length from the array
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306 class LoadRangeNode : public LoadINode {
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307 public:
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308 LoadRangeNode(Node *c, Node *mem, Node *adr, const TypeInt *ti = TypeInt::POS)
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309 : LoadINode(c, mem, adr, TypeAryPtr::RANGE, ti, MemNode::unordered) {}
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310 virtual int Opcode() const;
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311 virtual const Type *Value( PhaseTransform *phase ) const;
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312 virtual Node *Identity( PhaseTransform *phase );
366
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313 virtual Node *Ideal(PhaseGVN *phase, bool can_reshape);
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314 };
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315
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316 //------------------------------LoadLNode--------------------------------------
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317 // Load a long from memory
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318 class LoadLNode : public LoadNode {
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319 virtual uint hash() const { return LoadNode::hash() + _require_atomic_access; }
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320 virtual uint cmp( const Node &n ) const {
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321 return _require_atomic_access == ((LoadLNode&)n)._require_atomic_access
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322 && LoadNode::cmp(n);
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323 }
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324 virtual uint size_of() const { return sizeof(*this); }
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325 const bool _require_atomic_access; // is piecewise load forbidden?
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326
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327 public:
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328 LoadLNode(Node *c, Node *mem, Node *adr, const TypePtr* at, const TypeLong *tl,
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329 MemOrd mo, bool require_atomic_access = false)
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330 : LoadNode(c, mem, adr, at, tl, mo), _require_atomic_access(require_atomic_access) {}
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331 virtual int Opcode() const;
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332 virtual uint ideal_reg() const { return Op_RegL; }
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333 virtual int store_Opcode() const { return Op_StoreL; }
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334 virtual BasicType memory_type() const { return T_LONG; }
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335 bool require_atomic_access() { return _require_atomic_access; }
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336 static LoadLNode* make_atomic(Compile *C, Node* ctl, Node* mem, Node* adr, const TypePtr* adr_type,
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337 const Type* rt, MemOrd mo);
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338 #ifndef PRODUCT
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339 virtual void dump_spec(outputStream *st) const {
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340 LoadNode::dump_spec(st);
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341 if (_require_atomic_access) st->print(" Atomic!");
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342 }
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343 #endif
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344 };
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345
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346 //------------------------------LoadL_unalignedNode----------------------------
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347 // Load a long from unaligned memory
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348 class LoadL_unalignedNode : public LoadLNode {
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349 public:
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350 LoadL_unalignedNode(Node *c, Node *mem, Node *adr, const TypePtr* at, MemOrd mo)
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351 : LoadLNode(c, mem, adr, at, TypeLong::LONG, mo) {}
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352 virtual int Opcode() const;
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353 };
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354
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355 //------------------------------LoadFNode--------------------------------------
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356 // Load a float (64 bits) from memory
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357 class LoadFNode : public LoadNode {
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358 public:
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359 LoadFNode(Node *c, Node *mem, Node *adr, const TypePtr* at, const Type *t, MemOrd mo)
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360 : LoadNode(c, mem, adr, at, t, mo) {}
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361 virtual int Opcode() const;
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362 virtual uint ideal_reg() const { return Op_RegF; }
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363 virtual int store_Opcode() const { return Op_StoreF; }
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364 virtual BasicType memory_type() const { return T_FLOAT; }
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365 };
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366
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367 //------------------------------LoadDNode--------------------------------------
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368 // Load a double (64 bits) from memory
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369 class LoadDNode : public LoadNode {
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370 public:
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371 LoadDNode(Node *c, Node *mem, Node *adr, const TypePtr* at, const Type *t, MemOrd mo)
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372 : LoadNode(c, mem, adr, at, t, mo) {}
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373 virtual int Opcode() const;
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374 virtual uint ideal_reg() const { return Op_RegD; }
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375 virtual int store_Opcode() const { return Op_StoreD; }
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376 virtual BasicType memory_type() const { return T_DOUBLE; }
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377 };
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378
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379 //------------------------------LoadD_unalignedNode----------------------------
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380 // Load a double from unaligned memory
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381 class LoadD_unalignedNode : public LoadDNode {
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382 public:
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383 LoadD_unalignedNode(Node *c, Node *mem, Node *adr, const TypePtr* at, MemOrd mo)
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384 : LoadDNode(c, mem, adr, at, Type::DOUBLE, mo) {}
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385 virtual int Opcode() const;
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386 };
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387
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388 //------------------------------LoadPNode--------------------------------------
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389 // Load a pointer from memory (either object or array)
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390 class LoadPNode : public LoadNode {
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391 public:
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392 LoadPNode(Node *c, Node *mem, Node *adr, const TypePtr *at, const TypePtr* t, MemOrd mo)
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393 : LoadNode(c, mem, adr, at, t, mo) {}
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394 virtual int Opcode() const;
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395 virtual uint ideal_reg() const { return Op_RegP; }
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396 virtual int store_Opcode() const { return Op_StoreP; }
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397 virtual BasicType memory_type() const { return T_ADDRESS; }
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398 };
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399
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400
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401 //------------------------------LoadNNode--------------------------------------
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402 // Load a narrow oop from memory (either object or array)
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403 class LoadNNode : public LoadNode {
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404 public:
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405 LoadNNode(Node *c, Node *mem, Node *adr, const TypePtr *at, const Type* t, MemOrd mo)
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406 : LoadNode(c, mem, adr, at, t, mo) {}
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407 virtual int Opcode() const;
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408 virtual uint ideal_reg() const { return Op_RegN; }
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409 virtual int store_Opcode() const { return Op_StoreN; }
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410 virtual BasicType memory_type() const { return T_NARROWOOP; }
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411 };
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412
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413 //------------------------------LoadKlassNode----------------------------------
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414 // Load a Klass from an object
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415 class LoadKlassNode : public LoadPNode {
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416 public:
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417 LoadKlassNode(Node *c, Node *mem, Node *adr, const TypePtr *at, const TypeKlassPtr *tk, MemOrd mo)
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418 : LoadPNode(c, mem, adr, at, tk, mo) {}
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419 virtual int Opcode() const;
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420 virtual const Type *Value( PhaseTransform *phase ) const;
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421 virtual Node *Identity( PhaseTransform *phase );
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422 virtual bool depends_only_on_test() const { return true; }
164
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423
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424 // Polymorphic factory method:
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425 static Node* make( PhaseGVN& gvn, Node *mem, Node *adr, const TypePtr* at,
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426 const TypeKlassPtr *tk = TypeKlassPtr::OBJECT );
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427 };
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428
164
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429 //------------------------------LoadNKlassNode---------------------------------
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430 // Load a narrow Klass from an object.
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431 class LoadNKlassNode : public LoadNNode {
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432 public:
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433 LoadNKlassNode(Node *c, Node *mem, Node *adr, const TypePtr *at, const TypeNarrowKlass *tk, MemOrd mo)
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434 : LoadNNode(c, mem, adr, at, tk, mo) {}
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435 virtual int Opcode() const;
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436 virtual uint ideal_reg() const { return Op_RegN; }
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437 virtual int store_Opcode() const { return Op_StoreNKlass; }
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438 virtual BasicType memory_type() const { return T_NARROWKLASS; }
164
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439
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440 virtual const Type *Value( PhaseTransform *phase ) const;
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441 virtual Node *Identity( PhaseTransform *phase );
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442 virtual bool depends_only_on_test() const { return true; }
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443 };
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444
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445
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446 //------------------------------StoreNode--------------------------------------
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447 // Store value; requires Store, Address and Value
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448 class StoreNode : public MemNode {
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449 private:
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450 // On platforms with weak memory ordering (e.g., PPC, Ia64) we distinguish
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451 // stores that can be reordered, and such requiring release semantics to
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452 // adhere to the Java specification. The required behaviour is stored in
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453 // this field.
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454 const MemOrd _mo;
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455 // Needed for proper cloning.
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456 virtual uint size_of() const { return sizeof(*this); }
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457 protected:
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458 virtual uint cmp( const Node &n ) const;
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459 virtual bool depends_only_on_test() const { return false; }
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460
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461 Node *Ideal_masked_input (PhaseGVN *phase, uint mask);
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462 Node *Ideal_sign_extended_input(PhaseGVN *phase, int num_bits);
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463
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464 public:
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465 // We must ensure that stores of object references will be visible
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466 // only after the object's initialization. So the callers of this
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467 // procedure must indicate that the store requires `release'
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468 // semantics, if the stored value is an object reference that might
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469 // point to a new object and may become externally visible.
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470 StoreNode(Node *c, Node *mem, Node *adr, const TypePtr* at, Node *val, MemOrd mo)
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471 : MemNode(c, mem, adr, at, val), _mo(mo) {
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472 init_class_id(Class_Store);
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473 }
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474 StoreNode(Node *c, Node *mem, Node *adr, const TypePtr* at, Node *val, Node *oop_store, MemOrd mo)
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475 : MemNode(c, mem, adr, at, val, oop_store), _mo(mo) {
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476 init_class_id(Class_Store);
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477 }
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478
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479 inline bool is_unordered() const { return !is_release(); }
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480 inline bool is_release() const {
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481 assert((_mo == unordered || _mo == release), "unexpected");
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482 return _mo == release;
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483 }
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484
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485 // Conservatively release stores of object references in order to
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486 // ensure visibility of object initialization.
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487 static inline MemOrd release_if_reference(const BasicType t) {
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488 const MemOrd mo = (t == T_ARRAY ||
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489 t == T_ADDRESS || // Might be the address of an object reference (`boxing').
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490 t == T_OBJECT) ? release : unordered;
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491 return mo;
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492 }
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493
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494 // Polymorphic factory method
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495 //
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496 // We must ensure that stores of object references will be visible
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497 // only after the object's initialization. So the callers of this
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498 // procedure must indicate that the store requires `release'
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499 // semantics, if the stored value is an object reference that might
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500 // point to a new object and may become externally visible.
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501 static StoreNode* make(PhaseGVN& gvn, Node *c, Node *mem, Node *adr,
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502 const TypePtr* at, Node *val, BasicType bt, MemOrd mo);
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503
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504 virtual uint hash() const; // Check the type
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505
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506 // If the store is to Field memory and the pointer is non-null, we can
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507 // zero out the control input.
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508 virtual Node *Ideal(PhaseGVN *phase, bool can_reshape);
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509
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510 // Compute a new Type for this node. Basically we just do the pre-check,
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511 // then call the virtual add() to set the type.
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512 virtual const Type *Value( PhaseTransform *phase ) const;
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513
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514 // Check for identity function on memory (Load then Store at same address)
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515 virtual Node *Identity( PhaseTransform *phase );
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516
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517 // Do not match memory edge
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518 virtual uint match_edge(uint idx) const;
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519
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520 virtual const Type *bottom_type() const; // returns Type::MEMORY
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521
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522 // Map a store opcode to its corresponding own opcode, trivially.
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523 virtual int store_Opcode() const { return Opcode(); }
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524
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525 // have all possible loads of the value stored been optimized away?
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526 bool value_never_loaded(PhaseTransform *phase) const;
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527 };
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528
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529 //------------------------------StoreBNode-------------------------------------
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530 // Store byte to memory
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531 class StoreBNode : public StoreNode {
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532 public:
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2113136690bc 8024921: PPC64 (part 113): Extend Load and Store nodes to know about memory ordering
goetz
parents: 10278
diff changeset
533 StoreBNode(Node *c, Node *mem, Node *adr, const TypePtr* at, Node *val, MemOrd mo)
2113136690bc 8024921: PPC64 (part 113): Extend Load and Store nodes to know about memory ordering
goetz
parents: 10278
diff changeset
534 : StoreNode(c, mem, adr, at, val, mo) {}
0
a61af66fc99e Initial load
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diff changeset
535 virtual int Opcode() const;
a61af66fc99e Initial load
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parents:
diff changeset
536 virtual Node *Ideal(PhaseGVN *phase, bool can_reshape);
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parents:
diff changeset
537 virtual BasicType memory_type() const { return T_BYTE; }
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diff changeset
538 };
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parents:
diff changeset
539
a61af66fc99e Initial load
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parents:
diff changeset
540 //------------------------------StoreCNode-------------------------------------
a61af66fc99e Initial load
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parents:
diff changeset
541 // Store char/short to memory
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parents:
diff changeset
542 class StoreCNode : public StoreNode {
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parents:
diff changeset
543 public:
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2113136690bc 8024921: PPC64 (part 113): Extend Load and Store nodes to know about memory ordering
goetz
parents: 10278
diff changeset
544 StoreCNode(Node *c, Node *mem, Node *adr, const TypePtr* at, Node *val, MemOrd mo)
2113136690bc 8024921: PPC64 (part 113): Extend Load and Store nodes to know about memory ordering
goetz
parents: 10278
diff changeset
545 : StoreNode(c, mem, adr, at, val, mo) {}
0
a61af66fc99e Initial load
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parents:
diff changeset
546 virtual int Opcode() const;
a61af66fc99e Initial load
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parents:
diff changeset
547 virtual Node *Ideal(PhaseGVN *phase, bool can_reshape);
a61af66fc99e Initial load
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parents:
diff changeset
548 virtual BasicType memory_type() const { return T_CHAR; }
a61af66fc99e Initial load
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parents:
diff changeset
549 };
a61af66fc99e Initial load
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parents:
diff changeset
550
a61af66fc99e Initial load
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parents:
diff changeset
551 //------------------------------StoreINode-------------------------------------
a61af66fc99e Initial load
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parents:
diff changeset
552 // Store int to memory
a61af66fc99e Initial load
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parents:
diff changeset
553 class StoreINode : public StoreNode {
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parents:
diff changeset
554 public:
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2113136690bc 8024921: PPC64 (part 113): Extend Load and Store nodes to know about memory ordering
goetz
parents: 10278
diff changeset
555 StoreINode(Node *c, Node *mem, Node *adr, const TypePtr* at, Node *val, MemOrd mo)
2113136690bc 8024921: PPC64 (part 113): Extend Load and Store nodes to know about memory ordering
goetz
parents: 10278
diff changeset
556 : StoreNode(c, mem, adr, at, val, mo) {}
0
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parents:
diff changeset
557 virtual int Opcode() const;
a61af66fc99e Initial load
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parents:
diff changeset
558 virtual BasicType memory_type() const { return T_INT; }
a61af66fc99e Initial load
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parents:
diff changeset
559 };
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parents:
diff changeset
560
a61af66fc99e Initial load
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parents:
diff changeset
561 //------------------------------StoreLNode-------------------------------------
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parents:
diff changeset
562 // Store long to memory
a61af66fc99e Initial load
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parents:
diff changeset
563 class StoreLNode : public StoreNode {
a61af66fc99e Initial load
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parents:
diff changeset
564 virtual uint hash() const { return StoreNode::hash() + _require_atomic_access; }
a61af66fc99e Initial load
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parents:
diff changeset
565 virtual uint cmp( const Node &n ) const {
a61af66fc99e Initial load
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parents:
diff changeset
566 return _require_atomic_access == ((StoreLNode&)n)._require_atomic_access
a61af66fc99e Initial load
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parents:
diff changeset
567 && StoreNode::cmp(n);
a61af66fc99e Initial load
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parents:
diff changeset
568 }
a61af66fc99e Initial load
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parents:
diff changeset
569 virtual uint size_of() const { return sizeof(*this); }
a61af66fc99e Initial load
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parents:
diff changeset
570 const bool _require_atomic_access; // is piecewise store forbidden?
a61af66fc99e Initial load
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parents:
diff changeset
571
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parents:
diff changeset
572 public:
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2113136690bc 8024921: PPC64 (part 113): Extend Load and Store nodes to know about memory ordering
goetz
parents: 10278
diff changeset
573 StoreLNode(Node *c, Node *mem, Node *adr, const TypePtr* at, Node *val, MemOrd mo, bool require_atomic_access = false)
2113136690bc 8024921: PPC64 (part 113): Extend Load and Store nodes to know about memory ordering
goetz
parents: 10278
diff changeset
574 : StoreNode(c, mem, adr, at, val, mo), _require_atomic_access(require_atomic_access) {}
0
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diff changeset
575 virtual int Opcode() const;
a61af66fc99e Initial load
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parents:
diff changeset
576 virtual BasicType memory_type() const { return T_LONG; }
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parents:
diff changeset
577 bool require_atomic_access() { return _require_atomic_access; }
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goetz
parents: 10278
diff changeset
578 static StoreLNode* make_atomic(Compile *C, Node* ctl, Node* mem, Node* adr, const TypePtr* adr_type, Node* val, MemOrd mo);
0
a61af66fc99e Initial load
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parents:
diff changeset
579 #ifndef PRODUCT
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diff changeset
580 virtual void dump_spec(outputStream *st) const {
a61af66fc99e Initial load
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parents:
diff changeset
581 StoreNode::dump_spec(st);
a61af66fc99e Initial load
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parents:
diff changeset
582 if (_require_atomic_access) st->print(" Atomic!");
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parents:
diff changeset
583 }
a61af66fc99e Initial load
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parents:
diff changeset
584 #endif
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parents:
diff changeset
585 };
a61af66fc99e Initial load
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parents:
diff changeset
586
a61af66fc99e Initial load
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parents:
diff changeset
587 //------------------------------StoreFNode-------------------------------------
a61af66fc99e Initial load
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parents:
diff changeset
588 // Store float to memory
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parents:
diff changeset
589 class StoreFNode : public StoreNode {
a61af66fc99e Initial load
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parents:
diff changeset
590 public:
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2113136690bc 8024921: PPC64 (part 113): Extend Load and Store nodes to know about memory ordering
goetz
parents: 10278
diff changeset
591 StoreFNode(Node *c, Node *mem, Node *adr, const TypePtr* at, Node *val, MemOrd mo)
2113136690bc 8024921: PPC64 (part 113): Extend Load and Store nodes to know about memory ordering
goetz
parents: 10278
diff changeset
592 : StoreNode(c, mem, adr, at, val, mo) {}
0
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parents:
diff changeset
593 virtual int Opcode() const;
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parents:
diff changeset
594 virtual BasicType memory_type() const { return T_FLOAT; }
a61af66fc99e Initial load
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parents:
diff changeset
595 };
a61af66fc99e Initial load
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parents:
diff changeset
596
a61af66fc99e Initial load
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parents:
diff changeset
597 //------------------------------StoreDNode-------------------------------------
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parents:
diff changeset
598 // Store double to memory
a61af66fc99e Initial load
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parents:
diff changeset
599 class StoreDNode : public StoreNode {
a61af66fc99e Initial load
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parents:
diff changeset
600 public:
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2113136690bc 8024921: PPC64 (part 113): Extend Load and Store nodes to know about memory ordering
goetz
parents: 10278
diff changeset
601 StoreDNode(Node *c, Node *mem, Node *adr, const TypePtr* at, Node *val, MemOrd mo)
2113136690bc 8024921: PPC64 (part 113): Extend Load and Store nodes to know about memory ordering
goetz
parents: 10278
diff changeset
602 : StoreNode(c, mem, adr, at, val, mo) {}
0
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parents:
diff changeset
603 virtual int Opcode() const;
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parents:
diff changeset
604 virtual BasicType memory_type() const { return T_DOUBLE; }
a61af66fc99e Initial load
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parents:
diff changeset
605 };
a61af66fc99e Initial load
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parents:
diff changeset
606
a61af66fc99e Initial load
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parents:
diff changeset
607 //------------------------------StorePNode-------------------------------------
a61af66fc99e Initial load
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parents:
diff changeset
608 // Store pointer to memory
a61af66fc99e Initial load
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parents:
diff changeset
609 class StorePNode : public StoreNode {
a61af66fc99e Initial load
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parents:
diff changeset
610 public:
14429
2113136690bc 8024921: PPC64 (part 113): Extend Load and Store nodes to know about memory ordering
goetz
parents: 10278
diff changeset
611 StorePNode(Node *c, Node *mem, Node *adr, const TypePtr* at, Node *val, MemOrd mo)
2113136690bc 8024921: PPC64 (part 113): Extend Load and Store nodes to know about memory ordering
goetz
parents: 10278
diff changeset
612 : StoreNode(c, mem, adr, at, val, mo) {}
0
a61af66fc99e Initial load
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parents:
diff changeset
613 virtual int Opcode() const;
a61af66fc99e Initial load
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parents:
diff changeset
614 virtual BasicType memory_type() const { return T_ADDRESS; }
a61af66fc99e Initial load
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parents:
diff changeset
615 };
a61af66fc99e Initial load
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parents:
diff changeset
616
113
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 74
diff changeset
617 //------------------------------StoreNNode-------------------------------------
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 74
diff changeset
618 // Store narrow oop to memory
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 74
diff changeset
619 class StoreNNode : public StoreNode {
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 74
diff changeset
620 public:
14429
2113136690bc 8024921: PPC64 (part 113): Extend Load and Store nodes to know about memory ordering
goetz
parents: 10278
diff changeset
621 StoreNNode(Node *c, Node *mem, Node *adr, const TypePtr* at, Node *val, MemOrd mo)
2113136690bc 8024921: PPC64 (part 113): Extend Load and Store nodes to know about memory ordering
goetz
parents: 10278
diff changeset
622 : StoreNode(c, mem, adr, at, val, mo) {}
113
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 74
diff changeset
623 virtual int Opcode() const;
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 74
diff changeset
624 virtual BasicType memory_type() const { return T_NARROWOOP; }
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 74
diff changeset
625 };
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 74
diff changeset
626
6848
8e47bac5643a 7054512: Compress class pointers after perm gen removal
roland
parents: 6795
diff changeset
627 //------------------------------StoreNKlassNode--------------------------------------
8e47bac5643a 7054512: Compress class pointers after perm gen removal
roland
parents: 6795
diff changeset
628 // Store narrow klass to memory
8e47bac5643a 7054512: Compress class pointers after perm gen removal
roland
parents: 6795
diff changeset
629 class StoreNKlassNode : public StoreNNode {
8e47bac5643a 7054512: Compress class pointers after perm gen removal
roland
parents: 6795
diff changeset
630 public:
14429
2113136690bc 8024921: PPC64 (part 113): Extend Load and Store nodes to know about memory ordering
goetz
parents: 10278
diff changeset
631 StoreNKlassNode(Node *c, Node *mem, Node *adr, const TypePtr* at, Node *val, MemOrd mo)
2113136690bc 8024921: PPC64 (part 113): Extend Load and Store nodes to know about memory ordering
goetz
parents: 10278
diff changeset
632 : StoreNNode(c, mem, adr, at, val, mo) {}
6848
8e47bac5643a 7054512: Compress class pointers after perm gen removal
roland
parents: 6795
diff changeset
633 virtual int Opcode() const;
8e47bac5643a 7054512: Compress class pointers after perm gen removal
roland
parents: 6795
diff changeset
634 virtual BasicType memory_type() const { return T_NARROWKLASS; }
8e47bac5643a 7054512: Compress class pointers after perm gen removal
roland
parents: 6795
diff changeset
635 };
8e47bac5643a 7054512: Compress class pointers after perm gen removal
roland
parents: 6795
diff changeset
636
0
a61af66fc99e Initial load
duke
parents:
diff changeset
637 //------------------------------StoreCMNode-----------------------------------
a61af66fc99e Initial load
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parents:
diff changeset
638 // Store card-mark byte to memory for CM
a61af66fc99e Initial load
duke
parents:
diff changeset
639 // The last StoreCM before a SafePoint must be preserved and occur after its "oop" store
a61af66fc99e Initial load
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parents:
diff changeset
640 // Preceeding equivalent StoreCMs may be eliminated.
a61af66fc99e Initial load
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parents:
diff changeset
641 class StoreCMNode : public StoreNode {
985
685e959d09ea 6877254: Server vm crashes with no branches off of store slice" when run with CMS and UseSuperWord(default)
cfang
parents: 681
diff changeset
642 private:
1198
8d9bfe6a446b 6920346: G1: "must avoid base_memory and AliasIdxTop"
never
parents: 1100
diff changeset
643 virtual uint hash() const { return StoreNode::hash() + _oop_alias_idx; }
8d9bfe6a446b 6920346: G1: "must avoid base_memory and AliasIdxTop"
never
parents: 1100
diff changeset
644 virtual uint cmp( const Node &n ) const {
8d9bfe6a446b 6920346: G1: "must avoid base_memory and AliasIdxTop"
never
parents: 1100
diff changeset
645 return _oop_alias_idx == ((StoreCMNode&)n)._oop_alias_idx
8d9bfe6a446b 6920346: G1: "must avoid base_memory and AliasIdxTop"
never
parents: 1100
diff changeset
646 && StoreNode::cmp(n);
8d9bfe6a446b 6920346: G1: "must avoid base_memory and AliasIdxTop"
never
parents: 1100
diff changeset
647 }
8d9bfe6a446b 6920346: G1: "must avoid base_memory and AliasIdxTop"
never
parents: 1100
diff changeset
648 virtual uint size_of() const { return sizeof(*this); }
985
685e959d09ea 6877254: Server vm crashes with no branches off of store slice" when run with CMS and UseSuperWord(default)
cfang
parents: 681
diff changeset
649 int _oop_alias_idx; // The alias_idx of OopStore
1198
8d9bfe6a446b 6920346: G1: "must avoid base_memory and AliasIdxTop"
never
parents: 1100
diff changeset
650
0
a61af66fc99e Initial load
duke
parents:
diff changeset
651 public:
1198
8d9bfe6a446b 6920346: G1: "must avoid base_memory and AliasIdxTop"
never
parents: 1100
diff changeset
652 StoreCMNode( Node *c, Node *mem, Node *adr, const TypePtr* at, Node *val, Node *oop_store, int oop_alias_idx ) :
14429
2113136690bc 8024921: PPC64 (part 113): Extend Load and Store nodes to know about memory ordering
goetz
parents: 10278
diff changeset
653 StoreNode(c, mem, adr, at, val, oop_store, MemNode::release),
1198
8d9bfe6a446b 6920346: G1: "must avoid base_memory and AliasIdxTop"
never
parents: 1100
diff changeset
654 _oop_alias_idx(oop_alias_idx) {
8d9bfe6a446b 6920346: G1: "must avoid base_memory and AliasIdxTop"
never
parents: 1100
diff changeset
655 assert(_oop_alias_idx >= Compile::AliasIdxRaw ||
8d9bfe6a446b 6920346: G1: "must avoid base_memory and AliasIdxTop"
never
parents: 1100
diff changeset
656 _oop_alias_idx == Compile::AliasIdxBot && Compile::current()->AliasLevel() == 0,
8d9bfe6a446b 6920346: G1: "must avoid base_memory and AliasIdxTop"
never
parents: 1100
diff changeset
657 "bad oop alias idx");
8d9bfe6a446b 6920346: G1: "must avoid base_memory and AliasIdxTop"
never
parents: 1100
diff changeset
658 }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
659 virtual int Opcode() const;
a61af66fc99e Initial load
duke
parents:
diff changeset
660 virtual Node *Identity( PhaseTransform *phase );
985
685e959d09ea 6877254: Server vm crashes with no branches off of store slice" when run with CMS and UseSuperWord(default)
cfang
parents: 681
diff changeset
661 virtual Node *Ideal(PhaseGVN *phase, bool can_reshape);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
662 virtual const Type *Value( PhaseTransform *phase ) const;
a61af66fc99e Initial load
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parents:
diff changeset
663 virtual BasicType memory_type() const { return T_VOID; } // unspecific
985
685e959d09ea 6877254: Server vm crashes with no branches off of store slice" when run with CMS and UseSuperWord(default)
cfang
parents: 681
diff changeset
664 int oop_alias_idx() const { return _oop_alias_idx; }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
665 };
a61af66fc99e Initial load
duke
parents:
diff changeset
666
a61af66fc99e Initial load
duke
parents:
diff changeset
667 //------------------------------LoadPLockedNode---------------------------------
a61af66fc99e Initial load
duke
parents:
diff changeset
668 // Load-locked a pointer from memory (either object or array).
a61af66fc99e Initial load
duke
parents:
diff changeset
669 // On Sparc & Intel this is implemented as a normal pointer load.
a61af66fc99e Initial load
duke
parents:
diff changeset
670 // On PowerPC and friends it's a real load-locked.
a61af66fc99e Initial load
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parents:
diff changeset
671 class LoadPLockedNode : public LoadPNode {
a61af66fc99e Initial load
duke
parents:
diff changeset
672 public:
14429
2113136690bc 8024921: PPC64 (part 113): Extend Load and Store nodes to know about memory ordering
goetz
parents: 10278
diff changeset
673 LoadPLockedNode(Node *c, Node *mem, Node *adr, MemOrd mo)
2113136690bc 8024921: PPC64 (part 113): Extend Load and Store nodes to know about memory ordering
goetz
parents: 10278
diff changeset
674 : LoadPNode(c, mem, adr, TypeRawPtr::BOTTOM, TypeRawPtr::BOTTOM, mo) {}
0
a61af66fc99e Initial load
duke
parents:
diff changeset
675 virtual int Opcode() const;
a61af66fc99e Initial load
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parents:
diff changeset
676 virtual int store_Opcode() const { return Op_StorePConditional; }
a61af66fc99e Initial load
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parents:
diff changeset
677 virtual bool depends_only_on_test() const { return true; }
a61af66fc99e Initial load
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parents:
diff changeset
678 };
a61af66fc99e Initial load
duke
parents:
diff changeset
679
a61af66fc99e Initial load
duke
parents:
diff changeset
680 //------------------------------SCMemProjNode---------------------------------------
a61af66fc99e Initial load
duke
parents:
diff changeset
681 // This class defines a projection of the memory state of a store conditional node.
a61af66fc99e Initial load
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parents:
diff changeset
682 // These nodes return a value, but also update memory.
a61af66fc99e Initial load
duke
parents:
diff changeset
683 class SCMemProjNode : public ProjNode {
a61af66fc99e Initial load
duke
parents:
diff changeset
684 public:
a61af66fc99e Initial load
duke
parents:
diff changeset
685 enum {SCMEMPROJCON = (uint)-2};
a61af66fc99e Initial load
duke
parents:
diff changeset
686 SCMemProjNode( Node *src) : ProjNode( src, SCMEMPROJCON) { }
a61af66fc99e Initial load
duke
parents:
diff changeset
687 virtual int Opcode() const;
a61af66fc99e Initial load
duke
parents:
diff changeset
688 virtual bool is_CFG() const { return false; }
a61af66fc99e Initial load
duke
parents:
diff changeset
689 virtual const Type *bottom_type() const {return Type::MEMORY;}
a61af66fc99e Initial load
duke
parents:
diff changeset
690 virtual const TypePtr *adr_type() const { return in(0)->in(MemNode::Memory)->adr_type();}
a61af66fc99e Initial load
duke
parents:
diff changeset
691 virtual uint ideal_reg() const { return 0;} // memory projections don't have a register
a61af66fc99e Initial load
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parents:
diff changeset
692 virtual const Type *Value( PhaseTransform *phase ) const;
a61af66fc99e Initial load
duke
parents:
diff changeset
693 #ifndef PRODUCT
a61af66fc99e Initial load
duke
parents:
diff changeset
694 virtual void dump_spec(outputStream *st) const {};
a61af66fc99e Initial load
duke
parents:
diff changeset
695 #endif
a61af66fc99e Initial load
duke
parents:
diff changeset
696 };
a61af66fc99e Initial load
duke
parents:
diff changeset
697
a61af66fc99e Initial load
duke
parents:
diff changeset
698 //------------------------------LoadStoreNode---------------------------
253
b0fe4deeb9fb 6726999: nsk/stress/jck12a/jck12a010 assert(n != null,"Bad immediate dominator info.")
kvn
parents: 196
diff changeset
699 // Note: is_Mem() method returns 'true' for this class.
0
a61af66fc99e Initial load
duke
parents:
diff changeset
700 class LoadStoreNode : public Node {
6795
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
701 private:
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
702 const Type* const _type; // What kind of value is loaded?
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
703 const TypePtr* _adr_type; // What kind of memory is being addressed?
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
704 virtual uint size_of() const; // Size is bigger
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
705 public:
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
706 LoadStoreNode( Node *c, Node *mem, Node *adr, Node *val, const TypePtr* at, const Type* rt, uint required );
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
707 virtual bool depends_only_on_test() const { return false; }
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
708 virtual uint match_edge(uint idx) const { return idx == MemNode::Address || idx == MemNode::ValueIn; }
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
709
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
710 virtual const Type *bottom_type() const { return _type; }
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
711 virtual uint ideal_reg() const;
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
712 virtual const class TypePtr *adr_type() const { return _adr_type; } // returns bottom_type of address
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
713
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
714 bool result_not_used() const;
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
715 };
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
716
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
717 class LoadStoreConditionalNode : public LoadStoreNode {
0
a61af66fc99e Initial load
duke
parents:
diff changeset
718 public:
a61af66fc99e Initial load
duke
parents:
diff changeset
719 enum {
a61af66fc99e Initial load
duke
parents:
diff changeset
720 ExpectedIn = MemNode::ValueIn+1 // One more input than MemNode
a61af66fc99e Initial load
duke
parents:
diff changeset
721 };
6795
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
722 LoadStoreConditionalNode(Node *c, Node *mem, Node *adr, Node *val, Node *ex);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
723 };
a61af66fc99e Initial load
duke
parents:
diff changeset
724
a61af66fc99e Initial load
duke
parents:
diff changeset
725 //------------------------------StorePConditionalNode---------------------------
a61af66fc99e Initial load
duke
parents:
diff changeset
726 // Conditionally store pointer to memory, if no change since prior
a61af66fc99e Initial load
duke
parents:
diff changeset
727 // load-locked. Sets flags for success or failure of the store.
6795
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
728 class StorePConditionalNode : public LoadStoreConditionalNode {
0
a61af66fc99e Initial load
duke
parents:
diff changeset
729 public:
6795
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
730 StorePConditionalNode( Node *c, Node *mem, Node *adr, Node *val, Node *ll ) : LoadStoreConditionalNode(c, mem, adr, val, ll) { }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
731 virtual int Opcode() const;
a61af66fc99e Initial load
duke
parents:
diff changeset
732 // Produces flags
a61af66fc99e Initial load
duke
parents:
diff changeset
733 virtual uint ideal_reg() const { return Op_RegFlags; }
a61af66fc99e Initial load
duke
parents:
diff changeset
734 };
a61af66fc99e Initial load
duke
parents:
diff changeset
735
420
a1980da045cc 6462850: generate biased locking code in C2 ideal graph
kvn
parents: 366
diff changeset
736 //------------------------------StoreIConditionalNode---------------------------
a1980da045cc 6462850: generate biased locking code in C2 ideal graph
kvn
parents: 366
diff changeset
737 // Conditionally store int to memory, if no change since prior
a1980da045cc 6462850: generate biased locking code in C2 ideal graph
kvn
parents: 366
diff changeset
738 // load-locked. Sets flags for success or failure of the store.
6795
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
739 class StoreIConditionalNode : public LoadStoreConditionalNode {
420
a1980da045cc 6462850: generate biased locking code in C2 ideal graph
kvn
parents: 366
diff changeset
740 public:
6795
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
741 StoreIConditionalNode( Node *c, Node *mem, Node *adr, Node *val, Node *ii ) : LoadStoreConditionalNode(c, mem, adr, val, ii) { }
420
a1980da045cc 6462850: generate biased locking code in C2 ideal graph
kvn
parents: 366
diff changeset
742 virtual int Opcode() const;
a1980da045cc 6462850: generate biased locking code in C2 ideal graph
kvn
parents: 366
diff changeset
743 // Produces flags
a1980da045cc 6462850: generate biased locking code in C2 ideal graph
kvn
parents: 366
diff changeset
744 virtual uint ideal_reg() const { return Op_RegFlags; }
a1980da045cc 6462850: generate biased locking code in C2 ideal graph
kvn
parents: 366
diff changeset
745 };
a1980da045cc 6462850: generate biased locking code in C2 ideal graph
kvn
parents: 366
diff changeset
746
0
a61af66fc99e Initial load
duke
parents:
diff changeset
747 //------------------------------StoreLConditionalNode---------------------------
a61af66fc99e Initial load
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parents:
diff changeset
748 // Conditionally store long to memory, if no change since prior
a61af66fc99e Initial load
duke
parents:
diff changeset
749 // load-locked. Sets flags for success or failure of the store.
6795
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
750 class StoreLConditionalNode : public LoadStoreConditionalNode {
0
a61af66fc99e Initial load
duke
parents:
diff changeset
751 public:
6795
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
752 StoreLConditionalNode( Node *c, Node *mem, Node *adr, Node *val, Node *ll ) : LoadStoreConditionalNode(c, mem, adr, val, ll) { }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
753 virtual int Opcode() const;
420
a1980da045cc 6462850: generate biased locking code in C2 ideal graph
kvn
parents: 366
diff changeset
754 // Produces flags
a1980da045cc 6462850: generate biased locking code in C2 ideal graph
kvn
parents: 366
diff changeset
755 virtual uint ideal_reg() const { return Op_RegFlags; }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
756 };
a61af66fc99e Initial load
duke
parents:
diff changeset
757
a61af66fc99e Initial load
duke
parents:
diff changeset
758
a61af66fc99e Initial load
duke
parents:
diff changeset
759 //------------------------------CompareAndSwapLNode---------------------------
6795
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
760 class CompareAndSwapLNode : public LoadStoreConditionalNode {
0
a61af66fc99e Initial load
duke
parents:
diff changeset
761 public:
6795
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
762 CompareAndSwapLNode( Node *c, Node *mem, Node *adr, Node *val, Node *ex) : LoadStoreConditionalNode(c, mem, adr, val, ex) { }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
763 virtual int Opcode() const;
a61af66fc99e Initial load
duke
parents:
diff changeset
764 };
a61af66fc99e Initial load
duke
parents:
diff changeset
765
a61af66fc99e Initial load
duke
parents:
diff changeset
766
a61af66fc99e Initial load
duke
parents:
diff changeset
767 //------------------------------CompareAndSwapINode---------------------------
6795
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
768 class CompareAndSwapINode : public LoadStoreConditionalNode {
0
a61af66fc99e Initial load
duke
parents:
diff changeset
769 public:
6795
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
770 CompareAndSwapINode( Node *c, Node *mem, Node *adr, Node *val, Node *ex) : LoadStoreConditionalNode(c, mem, adr, val, ex) { }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
771 virtual int Opcode() const;
a61af66fc99e Initial load
duke
parents:
diff changeset
772 };
a61af66fc99e Initial load
duke
parents:
diff changeset
773
a61af66fc99e Initial load
duke
parents:
diff changeset
774
a61af66fc99e Initial load
duke
parents:
diff changeset
775 //------------------------------CompareAndSwapPNode---------------------------
6795
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
776 class CompareAndSwapPNode : public LoadStoreConditionalNode {
0
a61af66fc99e Initial load
duke
parents:
diff changeset
777 public:
6795
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
778 CompareAndSwapPNode( Node *c, Node *mem, Node *adr, Node *val, Node *ex) : LoadStoreConditionalNode(c, mem, adr, val, ex) { }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
779 virtual int Opcode() const;
a61af66fc99e Initial load
duke
parents:
diff changeset
780 };
a61af66fc99e Initial load
duke
parents:
diff changeset
781
113
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 74
diff changeset
782 //------------------------------CompareAndSwapNNode---------------------------
6795
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
783 class CompareAndSwapNNode : public LoadStoreConditionalNode {
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
784 public:
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
785 CompareAndSwapNNode( Node *c, Node *mem, Node *adr, Node *val, Node *ex) : LoadStoreConditionalNode(c, mem, adr, val, ex) { }
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
786 virtual int Opcode() const;
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
787 };
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
788
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
789 //------------------------------GetAndAddINode---------------------------
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
790 class GetAndAddINode : public LoadStoreNode {
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
791 public:
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
792 GetAndAddINode( Node *c, Node *mem, Node *adr, Node *val, const TypePtr* at ) : LoadStoreNode(c, mem, adr, val, at, TypeInt::INT, 4) { }
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
793 virtual int Opcode() const;
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
794 };
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
795
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
796 //------------------------------GetAndAddLNode---------------------------
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
797 class GetAndAddLNode : public LoadStoreNode {
113
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 74
diff changeset
798 public:
6795
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
799 GetAndAddLNode( Node *c, Node *mem, Node *adr, Node *val, const TypePtr* at ) : LoadStoreNode(c, mem, adr, val, at, TypeLong::LONG, 4) { }
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
800 virtual int Opcode() const;
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
801 };
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
802
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
803
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
804 //------------------------------GetAndSetINode---------------------------
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
805 class GetAndSetINode : public LoadStoreNode {
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
806 public:
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
807 GetAndSetINode( Node *c, Node *mem, Node *adr, Node *val, const TypePtr* at ) : LoadStoreNode(c, mem, adr, val, at, TypeInt::INT, 4) { }
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
808 virtual int Opcode() const;
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
809 };
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
810
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
811 //------------------------------GetAndSetINode---------------------------
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
812 class GetAndSetLNode : public LoadStoreNode {
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
813 public:
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
814 GetAndSetLNode( Node *c, Node *mem, Node *adr, Node *val, const TypePtr* at ) : LoadStoreNode(c, mem, adr, val, at, TypeLong::LONG, 4) { }
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
815 virtual int Opcode() const;
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
816 };
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
817
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
818 //------------------------------GetAndSetPNode---------------------------
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
819 class GetAndSetPNode : public LoadStoreNode {
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
820 public:
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
821 GetAndSetPNode( Node *c, Node *mem, Node *adr, Node *val, const TypePtr* at, const Type* t ) : LoadStoreNode(c, mem, adr, val, at, t, 4) { }
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
822 virtual int Opcode() const;
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
823 };
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
824
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
825 //------------------------------GetAndSetNNode---------------------------
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
826 class GetAndSetNNode : public LoadStoreNode {
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
827 public:
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
828 GetAndSetNNode( Node *c, Node *mem, Node *adr, Node *val, const TypePtr* at, const Type* t ) : LoadStoreNode(c, mem, adr, val, at, t, 4) { }
113
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 74
diff changeset
829 virtual int Opcode() const;
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 74
diff changeset
830 };
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 74
diff changeset
831
0
a61af66fc99e Initial load
duke
parents:
diff changeset
832 //------------------------------ClearArray-------------------------------------
a61af66fc99e Initial load
duke
parents:
diff changeset
833 class ClearArrayNode: public Node {
a61af66fc99e Initial load
duke
parents:
diff changeset
834 public:
1100
f96a1a986f7b 6895383: JCK test throws NPE for method compiled with Escape Analysis
kvn
parents: 986
diff changeset
835 ClearArrayNode( Node *ctrl, Node *arymem, Node *word_cnt, Node *base )
f96a1a986f7b 6895383: JCK test throws NPE for method compiled with Escape Analysis
kvn
parents: 986
diff changeset
836 : Node(ctrl,arymem,word_cnt,base) {
f96a1a986f7b 6895383: JCK test throws NPE for method compiled with Escape Analysis
kvn
parents: 986
diff changeset
837 init_class_id(Class_ClearArray);
f96a1a986f7b 6895383: JCK test throws NPE for method compiled with Escape Analysis
kvn
parents: 986
diff changeset
838 }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
839 virtual int Opcode() const;
a61af66fc99e Initial load
duke
parents:
diff changeset
840 virtual const Type *bottom_type() const { return Type::MEMORY; }
a61af66fc99e Initial load
duke
parents:
diff changeset
841 // ClearArray modifies array elements, and so affects only the
a61af66fc99e Initial load
duke
parents:
diff changeset
842 // array memory addressed by the bottom_type of its base address.
a61af66fc99e Initial load
duke
parents:
diff changeset
843 virtual const class TypePtr *adr_type() const;
a61af66fc99e Initial load
duke
parents:
diff changeset
844 virtual Node *Identity( PhaseTransform *phase );
a61af66fc99e Initial load
duke
parents:
diff changeset
845 virtual Node *Ideal(PhaseGVN *phase, bool can_reshape);
a61af66fc99e Initial load
duke
parents:
diff changeset
846 virtual uint match_edge(uint idx) const;
a61af66fc99e Initial load
duke
parents:
diff changeset
847
a61af66fc99e Initial load
duke
parents:
diff changeset
848 // Clear the given area of an object or array.
a61af66fc99e Initial load
duke
parents:
diff changeset
849 // The start offset must always be aligned mod BytesPerInt.
a61af66fc99e Initial load
duke
parents:
diff changeset
850 // The end offset must always be aligned mod BytesPerLong.
a61af66fc99e Initial load
duke
parents:
diff changeset
851 // Return the new memory.
a61af66fc99e Initial load
duke
parents:
diff changeset
852 static Node* clear_memory(Node* control, Node* mem, Node* dest,
a61af66fc99e Initial load
duke
parents:
diff changeset
853 intptr_t start_offset,
a61af66fc99e Initial load
duke
parents:
diff changeset
854 intptr_t end_offset,
a61af66fc99e Initial load
duke
parents:
diff changeset
855 PhaseGVN* phase);
a61af66fc99e Initial load
duke
parents:
diff changeset
856 static Node* clear_memory(Node* control, Node* mem, Node* dest,
a61af66fc99e Initial load
duke
parents:
diff changeset
857 intptr_t start_offset,
a61af66fc99e Initial load
duke
parents:
diff changeset
858 Node* end_offset,
a61af66fc99e Initial load
duke
parents:
diff changeset
859 PhaseGVN* phase);
a61af66fc99e Initial load
duke
parents:
diff changeset
860 static Node* clear_memory(Node* control, Node* mem, Node* dest,
a61af66fc99e Initial load
duke
parents:
diff changeset
861 Node* start_offset,
a61af66fc99e Initial load
duke
parents:
diff changeset
862 Node* end_offset,
a61af66fc99e Initial load
duke
parents:
diff changeset
863 PhaseGVN* phase);
1100
f96a1a986f7b 6895383: JCK test throws NPE for method compiled with Escape Analysis
kvn
parents: 986
diff changeset
864 // Return allocation input memory edge if it is different instance
f96a1a986f7b 6895383: JCK test throws NPE for method compiled with Escape Analysis
kvn
parents: 986
diff changeset
865 // or itself if it is the one we are looking for.
f96a1a986f7b 6895383: JCK test throws NPE for method compiled with Escape Analysis
kvn
parents: 986
diff changeset
866 static bool step_through(Node** np, uint instance_id, PhaseTransform* phase);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
867 };
a61af66fc99e Initial load
duke
parents:
diff changeset
868
2412
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
869 //------------------------------StrIntrinsic-------------------------------
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
870 // Base class for Ideal nodes used in String instrinsic code.
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
871 class StrIntrinsicNode: public Node {
0
a61af66fc99e Initial load
duke
parents:
diff changeset
872 public:
2412
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
873 StrIntrinsicNode(Node* control, Node* char_array_mem,
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
874 Node* s1, Node* c1, Node* s2, Node* c2):
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
875 Node(control, char_array_mem, s1, c1, s2, c2) {
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
876 }
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
877
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
878 StrIntrinsicNode(Node* control, Node* char_array_mem,
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
879 Node* s1, Node* s2, Node* c):
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
880 Node(control, char_array_mem, s1, s2, c) {
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
881 }
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
882
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
883 StrIntrinsicNode(Node* control, Node* char_array_mem,
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
884 Node* s1, Node* s2):
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
885 Node(control, char_array_mem, s1, s2) {
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
886 }
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
887
0
a61af66fc99e Initial load
duke
parents:
diff changeset
888 virtual bool depends_only_on_test() const { return false; }
986
62001a362ce9 6827605: new String intrinsics may prevent EA scalar replacement
kvn
parents: 985
diff changeset
889 virtual const TypePtr* adr_type() const { return TypeAryPtr::CHARS; }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
890 virtual uint match_edge(uint idx) const;
a61af66fc99e Initial load
duke
parents:
diff changeset
891 virtual uint ideal_reg() const { return Op_RegI; }
a61af66fc99e Initial load
duke
parents:
diff changeset
892 virtual Node *Ideal(PhaseGVN *phase, bool can_reshape);
4115
1bd45abaa507 6890673: Eliminate allocations immediately after EA
kvn
parents: 3961
diff changeset
893 virtual const Type *Value(PhaseTransform *phase) const;
0
a61af66fc99e Initial load
duke
parents:
diff changeset
894 };
a61af66fc99e Initial load
duke
parents:
diff changeset
895
2412
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
896 //------------------------------StrComp-------------------------------------
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
897 class StrCompNode: public StrIntrinsicNode {
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
898 public:
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
899 StrCompNode(Node* control, Node* char_array_mem,
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
900 Node* s1, Node* c1, Node* s2, Node* c2):
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
901 StrIntrinsicNode(control, char_array_mem, s1, c1, s2, c2) {};
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
902 virtual int Opcode() const;
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
903 virtual const Type* bottom_type() const { return TypeInt::INT; }
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
904 };
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
905
681
fbde8ec322d0 6761600: Use sse 4.2 in intrinsics
cfang
parents: 628
diff changeset
906 //------------------------------StrEquals-------------------------------------
2412
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
907 class StrEqualsNode: public StrIntrinsicNode {
681
fbde8ec322d0 6761600: Use sse 4.2 in intrinsics
cfang
parents: 628
diff changeset
908 public:
986
62001a362ce9 6827605: new String intrinsics may prevent EA scalar replacement
kvn
parents: 985
diff changeset
909 StrEqualsNode(Node* control, Node* char_array_mem,
2412
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
910 Node* s1, Node* s2, Node* c):
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
911 StrIntrinsicNode(control, char_array_mem, s1, s2, c) {};
681
fbde8ec322d0 6761600: Use sse 4.2 in intrinsics
cfang
parents: 628
diff changeset
912 virtual int Opcode() const;
fbde8ec322d0 6761600: Use sse 4.2 in intrinsics
cfang
parents: 628
diff changeset
913 virtual const Type* bottom_type() const { return TypeInt::BOOL; }
fbde8ec322d0 6761600: Use sse 4.2 in intrinsics
cfang
parents: 628
diff changeset
914 };
fbde8ec322d0 6761600: Use sse 4.2 in intrinsics
cfang
parents: 628
diff changeset
915
fbde8ec322d0 6761600: Use sse 4.2 in intrinsics
cfang
parents: 628
diff changeset
916 //------------------------------StrIndexOf-------------------------------------
2412
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
917 class StrIndexOfNode: public StrIntrinsicNode {
681
fbde8ec322d0 6761600: Use sse 4.2 in intrinsics
cfang
parents: 628
diff changeset
918 public:
986
62001a362ce9 6827605: new String intrinsics may prevent EA scalar replacement
kvn
parents: 985
diff changeset
919 StrIndexOfNode(Node* control, Node* char_array_mem,
2412
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
920 Node* s1, Node* c1, Node* s2, Node* c2):
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
921 StrIntrinsicNode(control, char_array_mem, s1, c1, s2, c2) {};
681
fbde8ec322d0 6761600: Use sse 4.2 in intrinsics
cfang
parents: 628
diff changeset
922 virtual int Opcode() const;
fbde8ec322d0 6761600: Use sse 4.2 in intrinsics
cfang
parents: 628
diff changeset
923 virtual const Type* bottom_type() const { return TypeInt::INT; }
fbde8ec322d0 6761600: Use sse 4.2 in intrinsics
cfang
parents: 628
diff changeset
924 };
fbde8ec322d0 6761600: Use sse 4.2 in intrinsics
cfang
parents: 628
diff changeset
925
169
9148c65abefc 6695049: (coll) Create an x86 intrinsic for Arrays.equals
rasbold
parents: 164
diff changeset
926 //------------------------------AryEq---------------------------------------
2412
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
927 class AryEqNode: public StrIntrinsicNode {
169
9148c65abefc 6695049: (coll) Create an x86 intrinsic for Arrays.equals
rasbold
parents: 164
diff changeset
928 public:
2412
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
929 AryEqNode(Node* control, Node* char_array_mem, Node* s1, Node* s2):
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
930 StrIntrinsicNode(control, char_array_mem, s1, s2) {};
169
9148c65abefc 6695049: (coll) Create an x86 intrinsic for Arrays.equals
rasbold
parents: 164
diff changeset
931 virtual int Opcode() const;
9148c65abefc 6695049: (coll) Create an x86 intrinsic for Arrays.equals
rasbold
parents: 164
diff changeset
932 virtual const Type* bottom_type() const { return TypeInt::BOOL; }
9148c65abefc 6695049: (coll) Create an x86 intrinsic for Arrays.equals
rasbold
parents: 164
diff changeset
933 };
9148c65abefc 6695049: (coll) Create an x86 intrinsic for Arrays.equals
rasbold
parents: 164
diff changeset
934
7637
b30b3c2a0cf2 6896617: Optimize sun.nio.cs.ISO_8859_1$Encode.encodeArrayLoop() on x86
kvn
parents: 6853
diff changeset
935
b30b3c2a0cf2 6896617: Optimize sun.nio.cs.ISO_8859_1$Encode.encodeArrayLoop() on x86
kvn
parents: 6853
diff changeset
936 //------------------------------EncodeISOArray--------------------------------
b30b3c2a0cf2 6896617: Optimize sun.nio.cs.ISO_8859_1$Encode.encodeArrayLoop() on x86
kvn
parents: 6853
diff changeset
937 // encode char[] to byte[] in ISO_8859_1
b30b3c2a0cf2 6896617: Optimize sun.nio.cs.ISO_8859_1$Encode.encodeArrayLoop() on x86
kvn
parents: 6853
diff changeset
938 class EncodeISOArrayNode: public Node {
b30b3c2a0cf2 6896617: Optimize sun.nio.cs.ISO_8859_1$Encode.encodeArrayLoop() on x86
kvn
parents: 6853
diff changeset
939 public:
b30b3c2a0cf2 6896617: Optimize sun.nio.cs.ISO_8859_1$Encode.encodeArrayLoop() on x86
kvn
parents: 6853
diff changeset
940 EncodeISOArrayNode(Node *control, Node* arymem, Node* s1, Node* s2, Node* c): Node(control, arymem, s1, s2, c) {};
b30b3c2a0cf2 6896617: Optimize sun.nio.cs.ISO_8859_1$Encode.encodeArrayLoop() on x86
kvn
parents: 6853
diff changeset
941 virtual int Opcode() const;
b30b3c2a0cf2 6896617: Optimize sun.nio.cs.ISO_8859_1$Encode.encodeArrayLoop() on x86
kvn
parents: 6853
diff changeset
942 virtual bool depends_only_on_test() const { return false; }
b30b3c2a0cf2 6896617: Optimize sun.nio.cs.ISO_8859_1$Encode.encodeArrayLoop() on x86
kvn
parents: 6853
diff changeset
943 virtual const Type* bottom_type() const { return TypeInt::INT; }
b30b3c2a0cf2 6896617: Optimize sun.nio.cs.ISO_8859_1$Encode.encodeArrayLoop() on x86
kvn
parents: 6853
diff changeset
944 virtual const TypePtr* adr_type() const { return TypePtr::BOTTOM; }
b30b3c2a0cf2 6896617: Optimize sun.nio.cs.ISO_8859_1$Encode.encodeArrayLoop() on x86
kvn
parents: 6853
diff changeset
945 virtual uint match_edge(uint idx) const;
b30b3c2a0cf2 6896617: Optimize sun.nio.cs.ISO_8859_1$Encode.encodeArrayLoop() on x86
kvn
parents: 6853
diff changeset
946 virtual uint ideal_reg() const { return Op_RegI; }
b30b3c2a0cf2 6896617: Optimize sun.nio.cs.ISO_8859_1$Encode.encodeArrayLoop() on x86
kvn
parents: 6853
diff changeset
947 virtual Node *Ideal(PhaseGVN *phase, bool can_reshape);
b30b3c2a0cf2 6896617: Optimize sun.nio.cs.ISO_8859_1$Encode.encodeArrayLoop() on x86
kvn
parents: 6853
diff changeset
948 virtual const Type *Value(PhaseTransform *phase) const;
b30b3c2a0cf2 6896617: Optimize sun.nio.cs.ISO_8859_1$Encode.encodeArrayLoop() on x86
kvn
parents: 6853
diff changeset
949 };
b30b3c2a0cf2 6896617: Optimize sun.nio.cs.ISO_8859_1$Encode.encodeArrayLoop() on x86
kvn
parents: 6853
diff changeset
950
0
a61af66fc99e Initial load
duke
parents:
diff changeset
951 //------------------------------MemBar-----------------------------------------
a61af66fc99e Initial load
duke
parents:
diff changeset
952 // There are different flavors of Memory Barriers to match the Java Memory
a61af66fc99e Initial load
duke
parents:
diff changeset
953 // Model. Monitor-enter and volatile-load act as Aquires: no following ref
a61af66fc99e Initial load
duke
parents:
diff changeset
954 // can be moved to before them. We insert a MemBar-Acquire after a FastLock or
a61af66fc99e Initial load
duke
parents:
diff changeset
955 // volatile-load. Monitor-exit and volatile-store act as Release: no
605
98cb887364d3 6810672: Comment typos
twisti
parents: 558
diff changeset
956 // preceding ref can be moved to after them. We insert a MemBar-Release
0
a61af66fc99e Initial load
duke
parents:
diff changeset
957 // before a FastUnlock or volatile-store. All volatiles need to be
a61af66fc99e Initial load
duke
parents:
diff changeset
958 // serialized, so we follow all volatile-stores with a MemBar-Volatile to
605
98cb887364d3 6810672: Comment typos
twisti
parents: 558
diff changeset
959 // separate it from any following volatile-load.
0
a61af66fc99e Initial load
duke
parents:
diff changeset
960 class MemBarNode: public MultiNode {
a61af66fc99e Initial load
duke
parents:
diff changeset
961 virtual uint hash() const ; // { return NO_HASH; }
a61af66fc99e Initial load
duke
parents:
diff changeset
962 virtual uint cmp( const Node &n ) const ; // Always fail, except on self
a61af66fc99e Initial load
duke
parents:
diff changeset
963
a61af66fc99e Initial load
duke
parents:
diff changeset
964 virtual uint size_of() const { return sizeof(*this); }
a61af66fc99e Initial load
duke
parents:
diff changeset
965 // Memory type this node is serializing. Usually either rawptr or bottom.
a61af66fc99e Initial load
duke
parents:
diff changeset
966 const TypePtr* _adr_type;
a61af66fc99e Initial load
duke
parents:
diff changeset
967
a61af66fc99e Initial load
duke
parents:
diff changeset
968 public:
a61af66fc99e Initial load
duke
parents:
diff changeset
969 enum {
a61af66fc99e Initial load
duke
parents:
diff changeset
970 Precedent = TypeFunc::Parms // optional edge to force precedence
a61af66fc99e Initial load
duke
parents:
diff changeset
971 };
a61af66fc99e Initial load
duke
parents:
diff changeset
972 MemBarNode(Compile* C, int alias_idx, Node* precedent);
a61af66fc99e Initial load
duke
parents:
diff changeset
973 virtual int Opcode() const = 0;
a61af66fc99e Initial load
duke
parents:
diff changeset
974 virtual const class TypePtr *adr_type() const { return _adr_type; }
a61af66fc99e Initial load
duke
parents:
diff changeset
975 virtual const Type *Value( PhaseTransform *phase ) const;
a61af66fc99e Initial load
duke
parents:
diff changeset
976 virtual Node *Ideal(PhaseGVN *phase, bool can_reshape);
a61af66fc99e Initial load
duke
parents:
diff changeset
977 virtual uint match_edge(uint idx) const { return 0; }
a61af66fc99e Initial load
duke
parents:
diff changeset
978 virtual const Type *bottom_type() const { return TypeTuple::MEMBAR; }
a61af66fc99e Initial load
duke
parents:
diff changeset
979 virtual Node *match( const ProjNode *proj, const Matcher *m );
a61af66fc99e Initial load
duke
parents:
diff changeset
980 // Factory method. Builds a wide or narrow membar.
a61af66fc99e Initial load
duke
parents:
diff changeset
981 // Optional 'precedent' becomes an extra edge if not null.
a61af66fc99e Initial load
duke
parents:
diff changeset
982 static MemBarNode* make(Compile* C, int opcode,
a61af66fc99e Initial load
duke
parents:
diff changeset
983 int alias_idx = Compile::AliasIdxBot,
a61af66fc99e Initial load
duke
parents:
diff changeset
984 Node* precedent = NULL);
a61af66fc99e Initial load
duke
parents:
diff changeset
985 };
a61af66fc99e Initial load
duke
parents:
diff changeset
986
a61af66fc99e Initial load
duke
parents:
diff changeset
987 // "Acquire" - no following ref can move before (but earlier refs can
a61af66fc99e Initial load
duke
parents:
diff changeset
988 // follow, like an early Load stalled in cache). Requires multi-cpu
3849
f1c12354c3f7 7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents: 2426
diff changeset
989 // visibility. Inserted after a volatile load.
0
a61af66fc99e Initial load
duke
parents:
diff changeset
990 class MemBarAcquireNode: public MemBarNode {
a61af66fc99e Initial load
duke
parents:
diff changeset
991 public:
a61af66fc99e Initial load
duke
parents:
diff changeset
992 MemBarAcquireNode(Compile* C, int alias_idx, Node* precedent)
a61af66fc99e Initial load
duke
parents:
diff changeset
993 : MemBarNode(C, alias_idx, precedent) {}
a61af66fc99e Initial load
duke
parents:
diff changeset
994 virtual int Opcode() const;
a61af66fc99e Initial load
duke
parents:
diff changeset
995 };
a61af66fc99e Initial load
duke
parents:
diff changeset
996
14439
50fdb38839eb 8028515: PPPC64 (part 113.2): opto: Introduce LoadFence/StoreFence.
goetz
parents: 14435
diff changeset
997 // "Acquire" - no following ref can move before (but earlier refs can
50fdb38839eb 8028515: PPPC64 (part 113.2): opto: Introduce LoadFence/StoreFence.
goetz
parents: 14435
diff changeset
998 // follow, like an early Load stalled in cache). Requires multi-cpu
50fdb38839eb 8028515: PPPC64 (part 113.2): opto: Introduce LoadFence/StoreFence.
goetz
parents: 14435
diff changeset
999 // visibility. Inserted independ of any load, as required
50fdb38839eb 8028515: PPPC64 (part 113.2): opto: Introduce LoadFence/StoreFence.
goetz
parents: 14435
diff changeset
1000 // for intrinsic sun.misc.Unsafe.loadFence().
50fdb38839eb 8028515: PPPC64 (part 113.2): opto: Introduce LoadFence/StoreFence.
goetz
parents: 14435
diff changeset
1001 class LoadFenceNode: public MemBarNode {
50fdb38839eb 8028515: PPPC64 (part 113.2): opto: Introduce LoadFence/StoreFence.
goetz
parents: 14435
diff changeset
1002 public:
50fdb38839eb 8028515: PPPC64 (part 113.2): opto: Introduce LoadFence/StoreFence.
goetz
parents: 14435
diff changeset
1003 LoadFenceNode(Compile* C, int alias_idx, Node* precedent)
50fdb38839eb 8028515: PPPC64 (part 113.2): opto: Introduce LoadFence/StoreFence.
goetz
parents: 14435
diff changeset
1004 : MemBarNode(C, alias_idx, precedent) {}
50fdb38839eb 8028515: PPPC64 (part 113.2): opto: Introduce LoadFence/StoreFence.
goetz
parents: 14435
diff changeset
1005 virtual int Opcode() const;
50fdb38839eb 8028515: PPPC64 (part 113.2): opto: Introduce LoadFence/StoreFence.
goetz
parents: 14435
diff changeset
1006 };
50fdb38839eb 8028515: PPPC64 (part 113.2): opto: Introduce LoadFence/StoreFence.
goetz
parents: 14435
diff changeset
1007
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1008 // "Release" - no earlier ref can move after (but later refs can move
a61af66fc99e Initial load
duke
parents:
diff changeset
1009 // up, like a speculative pipelined cache-hitting Load). Requires
3849
f1c12354c3f7 7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents: 2426
diff changeset
1010 // multi-cpu visibility. Inserted before a volatile store.
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1011 class MemBarReleaseNode: public MemBarNode {
a61af66fc99e Initial load
duke
parents:
diff changeset
1012 public:
a61af66fc99e Initial load
duke
parents:
diff changeset
1013 MemBarReleaseNode(Compile* C, int alias_idx, Node* precedent)
a61af66fc99e Initial load
duke
parents:
diff changeset
1014 : MemBarNode(C, alias_idx, precedent) {}
a61af66fc99e Initial load
duke
parents:
diff changeset
1015 virtual int Opcode() const;
a61af66fc99e Initial load
duke
parents:
diff changeset
1016 };
a61af66fc99e Initial load
duke
parents:
diff changeset
1017
14439
50fdb38839eb 8028515: PPPC64 (part 113.2): opto: Introduce LoadFence/StoreFence.
goetz
parents: 14435
diff changeset
1018 // "Release" - no earlier ref can move after (but later refs can move
50fdb38839eb 8028515: PPPC64 (part 113.2): opto: Introduce LoadFence/StoreFence.
goetz
parents: 14435
diff changeset
1019 // up, like a speculative pipelined cache-hitting Load). Requires
50fdb38839eb 8028515: PPPC64 (part 113.2): opto: Introduce LoadFence/StoreFence.
goetz
parents: 14435
diff changeset
1020 // multi-cpu visibility. Inserted independent of any store, as required
50fdb38839eb 8028515: PPPC64 (part 113.2): opto: Introduce LoadFence/StoreFence.
goetz
parents: 14435
diff changeset
1021 // for intrinsic sun.misc.Unsafe.storeFence().
50fdb38839eb 8028515: PPPC64 (part 113.2): opto: Introduce LoadFence/StoreFence.
goetz
parents: 14435
diff changeset
1022 class StoreFenceNode: public MemBarNode {
50fdb38839eb 8028515: PPPC64 (part 113.2): opto: Introduce LoadFence/StoreFence.
goetz
parents: 14435
diff changeset
1023 public:
50fdb38839eb 8028515: PPPC64 (part 113.2): opto: Introduce LoadFence/StoreFence.
goetz
parents: 14435
diff changeset
1024 StoreFenceNode(Compile* C, int alias_idx, Node* precedent)
50fdb38839eb 8028515: PPPC64 (part 113.2): opto: Introduce LoadFence/StoreFence.
goetz
parents: 14435
diff changeset
1025 : MemBarNode(C, alias_idx, precedent) {}
50fdb38839eb 8028515: PPPC64 (part 113.2): opto: Introduce LoadFence/StoreFence.
goetz
parents: 14435
diff changeset
1026 virtual int Opcode() const;
50fdb38839eb 8028515: PPPC64 (part 113.2): opto: Introduce LoadFence/StoreFence.
goetz
parents: 14435
diff changeset
1027 };
50fdb38839eb 8028515: PPPC64 (part 113.2): opto: Introduce LoadFence/StoreFence.
goetz
parents: 14435
diff changeset
1028
3849
f1c12354c3f7 7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents: 2426
diff changeset
1029 // "Acquire" - no following ref can move before (but earlier refs can
f1c12354c3f7 7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents: 2426
diff changeset
1030 // follow, like an early Load stalled in cache). Requires multi-cpu
f1c12354c3f7 7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents: 2426
diff changeset
1031 // visibility. Inserted after a FastLock.
f1c12354c3f7 7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents: 2426
diff changeset
1032 class MemBarAcquireLockNode: public MemBarNode {
f1c12354c3f7 7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents: 2426
diff changeset
1033 public:
f1c12354c3f7 7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents: 2426
diff changeset
1034 MemBarAcquireLockNode(Compile* C, int alias_idx, Node* precedent)
f1c12354c3f7 7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents: 2426
diff changeset
1035 : MemBarNode(C, alias_idx, precedent) {}
f1c12354c3f7 7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents: 2426
diff changeset
1036 virtual int Opcode() const;
f1c12354c3f7 7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents: 2426
diff changeset
1037 };
f1c12354c3f7 7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents: 2426
diff changeset
1038
f1c12354c3f7 7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents: 2426
diff changeset
1039 // "Release" - no earlier ref can move after (but later refs can move
f1c12354c3f7 7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents: 2426
diff changeset
1040 // up, like a speculative pipelined cache-hitting Load). Requires
f1c12354c3f7 7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents: 2426
diff changeset
1041 // multi-cpu visibility. Inserted before a FastUnLock.
f1c12354c3f7 7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents: 2426
diff changeset
1042 class MemBarReleaseLockNode: public MemBarNode {
f1c12354c3f7 7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents: 2426
diff changeset
1043 public:
f1c12354c3f7 7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents: 2426
diff changeset
1044 MemBarReleaseLockNode(Compile* C, int alias_idx, Node* precedent)
f1c12354c3f7 7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents: 2426
diff changeset
1045 : MemBarNode(C, alias_idx, precedent) {}
f1c12354c3f7 7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents: 2426
diff changeset
1046 virtual int Opcode() const;
f1c12354c3f7 7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents: 2426
diff changeset
1047 };
f1c12354c3f7 7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents: 2426
diff changeset
1048
4763
1dc233a8c7fe 7121140: Allocation paths require explicit memory synchronization operations for RMO systems
roland
parents: 4115
diff changeset
1049 class MemBarStoreStoreNode: public MemBarNode {
1dc233a8c7fe 7121140: Allocation paths require explicit memory synchronization operations for RMO systems
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parents: 4115
diff changeset
1050 public:
1dc233a8c7fe 7121140: Allocation paths require explicit memory synchronization operations for RMO systems
roland
parents: 4115
diff changeset
1051 MemBarStoreStoreNode(Compile* C, int alias_idx, Node* precedent)
1dc233a8c7fe 7121140: Allocation paths require explicit memory synchronization operations for RMO systems
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parents: 4115
diff changeset
1052 : MemBarNode(C, alias_idx, precedent) {
1dc233a8c7fe 7121140: Allocation paths require explicit memory synchronization operations for RMO systems
roland
parents: 4115
diff changeset
1053 init_class_id(Class_MemBarStoreStore);
1dc233a8c7fe 7121140: Allocation paths require explicit memory synchronization operations for RMO systems
roland
parents: 4115
diff changeset
1054 }
1dc233a8c7fe 7121140: Allocation paths require explicit memory synchronization operations for RMO systems
roland
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diff changeset
1055 virtual int Opcode() const;
1dc233a8c7fe 7121140: Allocation paths require explicit memory synchronization operations for RMO systems
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diff changeset
1056 };
1dc233a8c7fe 7121140: Allocation paths require explicit memory synchronization operations for RMO systems
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diff changeset
1057
0
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1058 // Ordering between a volatile store and a following volatile load.
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diff changeset
1059 // Requires multi-CPU visibility?
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parents:
diff changeset
1060 class MemBarVolatileNode: public MemBarNode {
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parents:
diff changeset
1061 public:
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parents:
diff changeset
1062 MemBarVolatileNode(Compile* C, int alias_idx, Node* precedent)
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parents:
diff changeset
1063 : MemBarNode(C, alias_idx, precedent) {}
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parents:
diff changeset
1064 virtual int Opcode() const;
a61af66fc99e Initial load
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parents:
diff changeset
1065 };
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parents:
diff changeset
1066
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parents:
diff changeset
1067 // Ordering within the same CPU. Used to order unsafe memory references
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parents:
diff changeset
1068 // inside the compiler when we lack alias info. Not needed "outside" the
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parents:
diff changeset
1069 // compiler because the CPU does all the ordering for us.
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parents:
diff changeset
1070 class MemBarCPUOrderNode: public MemBarNode {
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parents:
diff changeset
1071 public:
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parents:
diff changeset
1072 MemBarCPUOrderNode(Compile* C, int alias_idx, Node* precedent)
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parents:
diff changeset
1073 : MemBarNode(C, alias_idx, precedent) {}
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parents:
diff changeset
1074 virtual int Opcode() const;
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parents:
diff changeset
1075 virtual uint ideal_reg() const { return 0; } // not matched in the AD file
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parents:
diff changeset
1076 };
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parents:
diff changeset
1077
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parents:
diff changeset
1078 // Isolation of object setup after an AllocateNode and before next safepoint.
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parents:
diff changeset
1079 // (See comment in memnode.cpp near InitializeNode::InitializeNode for semantics.)
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parents:
diff changeset
1080 class InitializeNode: public MemBarNode {
a61af66fc99e Initial load
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parents:
diff changeset
1081 friend class AllocateNode;
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parents:
diff changeset
1082
3961
a92cdbac8b9e 7081933: Use zeroing elimination optimization for large array
kvn
parents: 3854
diff changeset
1083 enum {
a92cdbac8b9e 7081933: Use zeroing elimination optimization for large array
kvn
parents: 3854
diff changeset
1084 Incomplete = 0,
a92cdbac8b9e 7081933: Use zeroing elimination optimization for large array
kvn
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diff changeset
1085 Complete = 1,
a92cdbac8b9e 7081933: Use zeroing elimination optimization for large array
kvn
parents: 3854
diff changeset
1086 WithArraycopy = 2
a92cdbac8b9e 7081933: Use zeroing elimination optimization for large array
kvn
parents: 3854
diff changeset
1087 };
a92cdbac8b9e 7081933: Use zeroing elimination optimization for large array
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parents: 3854
diff changeset
1088 int _is_complete;
0
a61af66fc99e Initial load
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parents:
diff changeset
1089
4763
1dc233a8c7fe 7121140: Allocation paths require explicit memory synchronization operations for RMO systems
roland
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diff changeset
1090 bool _does_not_escape;
1dc233a8c7fe 7121140: Allocation paths require explicit memory synchronization operations for RMO systems
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diff changeset
1091
0
a61af66fc99e Initial load
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parents:
diff changeset
1092 public:
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parents:
diff changeset
1093 enum {
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parents:
diff changeset
1094 Control = TypeFunc::Control,
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parents:
diff changeset
1095 Memory = TypeFunc::Memory, // MergeMem for states affected by this op
a61af66fc99e Initial load
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parents:
diff changeset
1096 RawAddress = TypeFunc::Parms+0, // the newly-allocated raw address
a61af66fc99e Initial load
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parents:
diff changeset
1097 RawStores = TypeFunc::Parms+1 // zero or more stores (or TOP)
a61af66fc99e Initial load
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parents:
diff changeset
1098 };
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parents:
diff changeset
1099
a61af66fc99e Initial load
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parents:
diff changeset
1100 InitializeNode(Compile* C, int adr_type, Node* rawoop);
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parents:
diff changeset
1101 virtual int Opcode() const;
a61af66fc99e Initial load
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parents:
diff changeset
1102 virtual uint size_of() const { return sizeof(*this); }
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parents:
diff changeset
1103 virtual uint ideal_reg() const { return 0; } // not matched in the AD file
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parents:
diff changeset
1104 virtual const RegMask &in_RegMask(uint) const; // mask for RawAddress
a61af66fc99e Initial load
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diff changeset
1105
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parents:
diff changeset
1106 // Manage incoming memory edges via a MergeMem on in(Memory):
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diff changeset
1107 Node* memory(uint alias_idx);
a61af66fc99e Initial load
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parents:
diff changeset
1108
a61af66fc99e Initial load
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parents:
diff changeset
1109 // The raw memory edge coming directly from the Allocation.
a61af66fc99e Initial load
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parents:
diff changeset
1110 // The contents of this memory are *always* all-zero-bits.
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diff changeset
1111 Node* zero_memory() { return memory(Compile::AliasIdxRaw); }
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1112
a61af66fc99e Initial load
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parents:
diff changeset
1113 // Return the corresponding allocation for this initialization (or null if none).
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parents:
diff changeset
1114 // (Note: Both InitializeNode::allocation and AllocateNode::initialization
a61af66fc99e Initial load
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parents:
diff changeset
1115 // are defined in graphKit.cpp, which sets up the bidirectional relation.)
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diff changeset
1116 AllocateNode* allocation();
a61af66fc99e Initial load
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1117
a61af66fc99e Initial load
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parents:
diff changeset
1118 // Anything other than zeroing in this init?
a61af66fc99e Initial load
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diff changeset
1119 bool is_non_zero();
a61af66fc99e Initial load
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diff changeset
1120
a61af66fc99e Initial load
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diff changeset
1121 // An InitializeNode must completed before macro expansion is done.
a61af66fc99e Initial load
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diff changeset
1122 // Completion requires that the AllocateNode must be followed by
a61af66fc99e Initial load
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diff changeset
1123 // initialization of the new memory to zero, then to any initializers.
3961
a92cdbac8b9e 7081933: Use zeroing elimination optimization for large array
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parents: 3854
diff changeset
1124 bool is_complete() { return _is_complete != Incomplete; }
a92cdbac8b9e 7081933: Use zeroing elimination optimization for large array
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diff changeset
1125 bool is_complete_with_arraycopy() { return (_is_complete & WithArraycopy) != 0; }
0
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1126
a61af66fc99e Initial load
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parents:
diff changeset
1127 // Mark complete. (Must not yet be complete.)
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diff changeset
1128 void set_complete(PhaseGVN* phase);
3961
a92cdbac8b9e 7081933: Use zeroing elimination optimization for large array
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diff changeset
1129 void set_complete_with_arraycopy() { _is_complete = Complete | WithArraycopy; }
0
a61af66fc99e Initial load
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parents:
diff changeset
1130
4763
1dc233a8c7fe 7121140: Allocation paths require explicit memory synchronization operations for RMO systems
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diff changeset
1131 bool does_not_escape() { return _does_not_escape; }
1dc233a8c7fe 7121140: Allocation paths require explicit memory synchronization operations for RMO systems
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diff changeset
1132 void set_does_not_escape() { _does_not_escape = true; }
1dc233a8c7fe 7121140: Allocation paths require explicit memory synchronization operations for RMO systems
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parents: 4115
diff changeset
1133
0
a61af66fc99e Initial load
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parents:
diff changeset
1134 #ifdef ASSERT
a61af66fc99e Initial load
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parents:
diff changeset
1135 // ensure all non-degenerate stores are ordered and non-overlapping
a61af66fc99e Initial load
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parents:
diff changeset
1136 bool stores_are_sane(PhaseTransform* phase);
a61af66fc99e Initial load
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parents:
diff changeset
1137 #endif //ASSERT
a61af66fc99e Initial load
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parents:
diff changeset
1138
a61af66fc99e Initial load
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parents:
diff changeset
1139 // See if this store can be captured; return offset where it initializes.
a61af66fc99e Initial load
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parents:
diff changeset
1140 // Return 0 if the store cannot be moved (any sort of problem).
8116
6931f425c517 8007294: ReduceFieldZeroing doesn't check for dependent load and can lead to incorrect execution
roland
parents: 7637
diff changeset
1141 intptr_t can_capture_store(StoreNode* st, PhaseTransform* phase, bool can_reshape);
0
a61af66fc99e Initial load
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parents:
diff changeset
1142
a61af66fc99e Initial load
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parents:
diff changeset
1143 // Capture another store; reformat it to write my internal raw memory.
a61af66fc99e Initial load
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parents:
diff changeset
1144 // Return the captured copy, else NULL if there is some sort of problem.
8116
6931f425c517 8007294: ReduceFieldZeroing doesn't check for dependent load and can lead to incorrect execution
roland
parents: 7637
diff changeset
1145 Node* capture_store(StoreNode* st, intptr_t start, PhaseTransform* phase, bool can_reshape);
0
a61af66fc99e Initial load
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parents:
diff changeset
1146
a61af66fc99e Initial load
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parents:
diff changeset
1147 // Find captured store which corresponds to the range [start..start+size).
a61af66fc99e Initial load
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parents:
diff changeset
1148 // Return my own memory projection (meaning the initial zero bits)
a61af66fc99e Initial load
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parents:
diff changeset
1149 // if there is no such store. Return NULL if there is a problem.
a61af66fc99e Initial load
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parents:
diff changeset
1150 Node* find_captured_store(intptr_t start, int size_in_bytes, PhaseTransform* phase);
a61af66fc99e Initial load
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parents:
diff changeset
1151
a61af66fc99e Initial load
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parents:
diff changeset
1152 // Called when the associated AllocateNode is expanded into CFG.
a61af66fc99e Initial load
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parents:
diff changeset
1153 Node* complete_stores(Node* rawctl, Node* rawmem, Node* rawptr,
a61af66fc99e Initial load
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parents:
diff changeset
1154 intptr_t header_size, Node* size_in_bytes,
a61af66fc99e Initial load
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parents:
diff changeset
1155 PhaseGVN* phase);
a61af66fc99e Initial load
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parents:
diff changeset
1156
a61af66fc99e Initial load
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parents:
diff changeset
1157 private:
a61af66fc99e Initial load
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parents:
diff changeset
1158 void remove_extra_zeroes();
a61af66fc99e Initial load
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parents:
diff changeset
1159
a61af66fc99e Initial load
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parents:
diff changeset
1160 // Find out where a captured store should be placed (or already is placed).
a61af66fc99e Initial load
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parents:
diff changeset
1161 int captured_store_insertion_point(intptr_t start, int size_in_bytes,
a61af66fc99e Initial load
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parents:
diff changeset
1162 PhaseTransform* phase);
a61af66fc99e Initial load
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parents:
diff changeset
1163
a61af66fc99e Initial load
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parents:
diff changeset
1164 static intptr_t get_store_offset(Node* st, PhaseTransform* phase);
a61af66fc99e Initial load
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parents:
diff changeset
1165
a61af66fc99e Initial load
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parents:
diff changeset
1166 Node* make_raw_address(intptr_t offset, PhaseTransform* phase);
a61af66fc99e Initial load
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parents:
diff changeset
1167
10278
6f3fd5150b67 6934604: enable parts of EliminateAutoBox by default
kvn
parents: 8116
diff changeset
1168 bool detect_init_independence(Node* n, int& count);
0
a61af66fc99e Initial load
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parents:
diff changeset
1169
a61af66fc99e Initial load
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parents:
diff changeset
1170 void coalesce_subword_stores(intptr_t header_size, Node* size_in_bytes,
a61af66fc99e Initial load
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parents:
diff changeset
1171 PhaseGVN* phase);
a61af66fc99e Initial load
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parents:
diff changeset
1172
a61af66fc99e Initial load
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parents:
diff changeset
1173 intptr_t find_next_fullword_store(uint i, PhaseGVN* phase);
a61af66fc99e Initial load
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parents:
diff changeset
1174 };
a61af66fc99e Initial load
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parents:
diff changeset
1175
a61af66fc99e Initial load
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parents:
diff changeset
1176 //------------------------------MergeMem---------------------------------------
a61af66fc99e Initial load
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parents:
diff changeset
1177 // (See comment in memnode.cpp near MergeMemNode::MergeMemNode for semantics.)
a61af66fc99e Initial load
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parents:
diff changeset
1178 class MergeMemNode: public Node {
a61af66fc99e Initial load
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parents:
diff changeset
1179 virtual uint hash() const ; // { return NO_HASH; }
a61af66fc99e Initial load
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parents:
diff changeset
1180 virtual uint cmp( const Node &n ) const ; // Always fail, except on self
a61af66fc99e Initial load
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parents:
diff changeset
1181 friend class MergeMemStream;
a61af66fc99e Initial load
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parents:
diff changeset
1182 MergeMemNode(Node* def); // clients use MergeMemNode::make
a61af66fc99e Initial load
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parents:
diff changeset
1183
a61af66fc99e Initial load
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parents:
diff changeset
1184 public:
a61af66fc99e Initial load
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parents:
diff changeset
1185 // If the input is a whole memory state, clone it with all its slices intact.
a61af66fc99e Initial load
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parents:
diff changeset
1186 // Otherwise, make a new memory state with just that base memory input.
a61af66fc99e Initial load
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parents:
diff changeset
1187 // In either case, the result is a newly created MergeMem.
a61af66fc99e Initial load
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parents:
diff changeset
1188 static MergeMemNode* make(Compile* C, Node* base_memory);
a61af66fc99e Initial load
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parents:
diff changeset
1189
a61af66fc99e Initial load
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parents:
diff changeset
1190 virtual int Opcode() const;
a61af66fc99e Initial load
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parents:
diff changeset
1191 virtual Node *Identity( PhaseTransform *phase );
a61af66fc99e Initial load
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parents:
diff changeset
1192 virtual Node *Ideal(PhaseGVN *phase, bool can_reshape);
a61af66fc99e Initial load
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parents:
diff changeset
1193 virtual uint ideal_reg() const { return NotAMachineReg; }
a61af66fc99e Initial load
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parents:
diff changeset
1194 virtual uint match_edge(uint idx) const { return 0; }
a61af66fc99e Initial load
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parents:
diff changeset
1195 virtual const RegMask &out_RegMask() const;
a61af66fc99e Initial load
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parents:
diff changeset
1196 virtual const Type *bottom_type() const { return Type::MEMORY; }
a61af66fc99e Initial load
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parents:
diff changeset
1197 virtual const TypePtr *adr_type() const { return TypePtr::BOTTOM; }
a61af66fc99e Initial load
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parents:
diff changeset
1198 // sparse accessors
a61af66fc99e Initial load
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parents:
diff changeset
1199 // Fetch the previously stored "set_memory_at", or else the base memory.
a61af66fc99e Initial load
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parents:
diff changeset
1200 // (Caller should clone it if it is a phi-nest.)
a61af66fc99e Initial load
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parents:
diff changeset
1201 Node* memory_at(uint alias_idx) const;
a61af66fc99e Initial load
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parents:
diff changeset
1202 // set the memory, regardless of its previous value
a61af66fc99e Initial load
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parents:
diff changeset
1203 void set_memory_at(uint alias_idx, Node* n);
a61af66fc99e Initial load
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parents:
diff changeset
1204 // the "base" is the memory that provides the non-finite support
a61af66fc99e Initial load
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parents:
diff changeset
1205 Node* base_memory() const { return in(Compile::AliasIdxBot); }
a61af66fc99e Initial load
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parents:
diff changeset
1206 // warning: setting the base can implicitly set any of the other slices too
a61af66fc99e Initial load
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parents:
diff changeset
1207 void set_base_memory(Node* def);
a61af66fc99e Initial load
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parents:
diff changeset
1208 // sentinel value which denotes a copy of the base memory:
a61af66fc99e Initial load
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parents:
diff changeset
1209 Node* empty_memory() const { return in(Compile::AliasIdxTop); }
a61af66fc99e Initial load
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parents:
diff changeset
1210 static Node* make_empty_memory(); // where the sentinel comes from
a61af66fc99e Initial load
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parents:
diff changeset
1211 bool is_empty_memory(Node* n) const { assert((n == empty_memory()) == n->is_top(), "sanity"); return n->is_top(); }
a61af66fc99e Initial load
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parents:
diff changeset
1212 // hook for the iterator, to perform any necessary setup
a61af66fc99e Initial load
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parents:
diff changeset
1213 void iteration_setup(const MergeMemNode* other = NULL);
a61af66fc99e Initial load
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parents:
diff changeset
1214 // push sentinels until I am at least as long as the other (semantic no-op)
a61af66fc99e Initial load
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parents:
diff changeset
1215 void grow_to_match(const MergeMemNode* other);
a61af66fc99e Initial load
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parents:
diff changeset
1216 bool verify_sparse() const PRODUCT_RETURN0;
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parents:
diff changeset
1217 #ifndef PRODUCT
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parents:
diff changeset
1218 virtual void dump_spec(outputStream *st) const;
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duke
parents:
diff changeset
1219 #endif
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parents:
diff changeset
1220 };
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parents:
diff changeset
1221
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parents:
diff changeset
1222 class MergeMemStream : public StackObj {
a61af66fc99e Initial load
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parents:
diff changeset
1223 private:
a61af66fc99e Initial load
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parents:
diff changeset
1224 MergeMemNode* _mm;
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parents:
diff changeset
1225 const MergeMemNode* _mm2; // optional second guy, contributes non-empty iterations
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parents:
diff changeset
1226 Node* _mm_base; // loop-invariant base memory of _mm
a61af66fc99e Initial load
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parents:
diff changeset
1227 int _idx;
a61af66fc99e Initial load
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parents:
diff changeset
1228 int _cnt;
a61af66fc99e Initial load
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parents:
diff changeset
1229 Node* _mem;
a61af66fc99e Initial load
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parents:
diff changeset
1230 Node* _mem2;
a61af66fc99e Initial load
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parents:
diff changeset
1231 int _cnt2;
a61af66fc99e Initial load
duke
parents:
diff changeset
1232
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parents:
diff changeset
1233 void init(MergeMemNode* mm, const MergeMemNode* mm2 = NULL) {
a61af66fc99e Initial load
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parents:
diff changeset
1234 // subsume_node will break sparseness at times, whenever a memory slice
a61af66fc99e Initial load
duke
parents:
diff changeset
1235 // folds down to a copy of the base ("fat") memory. In such a case,
a61af66fc99e Initial load
duke
parents:
diff changeset
1236 // the raw edge will update to base, although it should be top.
a61af66fc99e Initial load
duke
parents:
diff changeset
1237 // This iterator will recognize either top or base_memory as an
a61af66fc99e Initial load
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parents:
diff changeset
1238 // "empty" slice. See is_empty, is_empty2, and next below.
a61af66fc99e Initial load
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parents:
diff changeset
1239 //
a61af66fc99e Initial load
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parents:
diff changeset
1240 // The sparseness property is repaired in MergeMemNode::Ideal.
a61af66fc99e Initial load
duke
parents:
diff changeset
1241 // As long as access to a MergeMem goes through this iterator
a61af66fc99e Initial load
duke
parents:
diff changeset
1242 // or the memory_at accessor, flaws in the sparseness will
a61af66fc99e Initial load
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parents:
diff changeset
1243 // never be observed.
a61af66fc99e Initial load
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parents:
diff changeset
1244 //
a61af66fc99e Initial load
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parents:
diff changeset
1245 // Also, iteration_setup repairs sparseness.
a61af66fc99e Initial load
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parents:
diff changeset
1246 assert(mm->verify_sparse(), "please, no dups of base");
a61af66fc99e Initial load
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parents:
diff changeset
1247 assert(mm2==NULL || mm2->verify_sparse(), "please, no dups of base");
a61af66fc99e Initial load
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parents:
diff changeset
1248
a61af66fc99e Initial load
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parents:
diff changeset
1249 _mm = mm;
a61af66fc99e Initial load
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parents:
diff changeset
1250 _mm_base = mm->base_memory();
a61af66fc99e Initial load
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parents:
diff changeset
1251 _mm2 = mm2;
a61af66fc99e Initial load
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parents:
diff changeset
1252 _cnt = mm->req();
a61af66fc99e Initial load
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parents:
diff changeset
1253 _idx = Compile::AliasIdxBot-1; // start at the base memory
a61af66fc99e Initial load
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parents:
diff changeset
1254 _mem = NULL;
a61af66fc99e Initial load
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parents:
diff changeset
1255 _mem2 = NULL;
a61af66fc99e Initial load
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parents:
diff changeset
1256 }
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parents:
diff changeset
1257
a61af66fc99e Initial load
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parents:
diff changeset
1258 #ifdef ASSERT
a61af66fc99e Initial load
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parents:
diff changeset
1259 Node* check_memory() const {
a61af66fc99e Initial load
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parents:
diff changeset
1260 if (at_base_memory())
a61af66fc99e Initial load
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parents:
diff changeset
1261 return _mm->base_memory();
a61af66fc99e Initial load
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parents:
diff changeset
1262 else if ((uint)_idx < _mm->req() && !_mm->in(_idx)->is_top())
a61af66fc99e Initial load
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parents:
diff changeset
1263 return _mm->memory_at(_idx);
a61af66fc99e Initial load
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parents:
diff changeset
1264 else
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parents:
diff changeset
1265 return _mm_base;
a61af66fc99e Initial load
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parents:
diff changeset
1266 }
a61af66fc99e Initial load
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parents:
diff changeset
1267 Node* check_memory2() const {
a61af66fc99e Initial load
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parents:
diff changeset
1268 return at_base_memory()? _mm2->base_memory(): _mm2->memory_at(_idx);
a61af66fc99e Initial load
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parents:
diff changeset
1269 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1270 #endif
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parents:
diff changeset
1271
a61af66fc99e Initial load
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parents:
diff changeset
1272 static bool match_memory(Node* mem, const MergeMemNode* mm, int idx) PRODUCT_RETURN0;
a61af66fc99e Initial load
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parents:
diff changeset
1273 void assert_synch() const {
a61af66fc99e Initial load
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parents:
diff changeset
1274 assert(!_mem || _idx >= _cnt || match_memory(_mem, _mm, _idx),
a61af66fc99e Initial load
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parents:
diff changeset
1275 "no side-effects except through the stream");
a61af66fc99e Initial load
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parents:
diff changeset
1276 }
a61af66fc99e Initial load
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parents:
diff changeset
1277
a61af66fc99e Initial load
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parents:
diff changeset
1278 public:
a61af66fc99e Initial load
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parents:
diff changeset
1279
a61af66fc99e Initial load
duke
parents:
diff changeset
1280 // expected usages:
a61af66fc99e Initial load
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parents:
diff changeset
1281 // for (MergeMemStream mms(mem->is_MergeMem()); next_non_empty(); ) { ... }
a61af66fc99e Initial load
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parents:
diff changeset
1282 // for (MergeMemStream mms(mem1, mem2); next_non_empty2(); ) { ... }
a61af66fc99e Initial load
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parents:
diff changeset
1283
a61af66fc99e Initial load
duke
parents:
diff changeset
1284 // iterate over one merge
a61af66fc99e Initial load
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parents:
diff changeset
1285 MergeMemStream(MergeMemNode* mm) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1286 mm->iteration_setup();
a61af66fc99e Initial load
duke
parents:
diff changeset
1287 init(mm);
a61af66fc99e Initial load
duke
parents:
diff changeset
1288 debug_only(_cnt2 = 999);
a61af66fc99e Initial load
duke
parents:
diff changeset
1289 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1290 // iterate in parallel over two merges
a61af66fc99e Initial load
duke
parents:
diff changeset
1291 // only iterates through non-empty elements of mm2
a61af66fc99e Initial load
duke
parents:
diff changeset
1292 MergeMemStream(MergeMemNode* mm, const MergeMemNode* mm2) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1293 assert(mm2, "second argument must be a MergeMem also");
a61af66fc99e Initial load
duke
parents:
diff changeset
1294 ((MergeMemNode*)mm2)->iteration_setup(); // update hidden state
a61af66fc99e Initial load
duke
parents:
diff changeset
1295 mm->iteration_setup(mm2);
a61af66fc99e Initial load
duke
parents:
diff changeset
1296 init(mm, mm2);
a61af66fc99e Initial load
duke
parents:
diff changeset
1297 _cnt2 = mm2->req();
a61af66fc99e Initial load
duke
parents:
diff changeset
1298 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1299 #ifdef ASSERT
a61af66fc99e Initial load
duke
parents:
diff changeset
1300 ~MergeMemStream() {
a61af66fc99e Initial load
duke
parents:
diff changeset
1301 assert_synch();
a61af66fc99e Initial load
duke
parents:
diff changeset
1302 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1303 #endif
a61af66fc99e Initial load
duke
parents:
diff changeset
1304
a61af66fc99e Initial load
duke
parents:
diff changeset
1305 MergeMemNode* all_memory() const {
a61af66fc99e Initial load
duke
parents:
diff changeset
1306 return _mm;
a61af66fc99e Initial load
duke
parents:
diff changeset
1307 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1308 Node* base_memory() const {
a61af66fc99e Initial load
duke
parents:
diff changeset
1309 assert(_mm_base == _mm->base_memory(), "no update to base memory, please");
a61af66fc99e Initial load
duke
parents:
diff changeset
1310 return _mm_base;
a61af66fc99e Initial load
duke
parents:
diff changeset
1311 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1312 const MergeMemNode* all_memory2() const {
a61af66fc99e Initial load
duke
parents:
diff changeset
1313 assert(_mm2 != NULL, "");
a61af66fc99e Initial load
duke
parents:
diff changeset
1314 return _mm2;
a61af66fc99e Initial load
duke
parents:
diff changeset
1315 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1316 bool at_base_memory() const {
a61af66fc99e Initial load
duke
parents:
diff changeset
1317 return _idx == Compile::AliasIdxBot;
a61af66fc99e Initial load
duke
parents:
diff changeset
1318 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1319 int alias_idx() const {
a61af66fc99e Initial load
duke
parents:
diff changeset
1320 assert(_mem, "must call next 1st");
a61af66fc99e Initial load
duke
parents:
diff changeset
1321 return _idx;
a61af66fc99e Initial load
duke
parents:
diff changeset
1322 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1323
a61af66fc99e Initial load
duke
parents:
diff changeset
1324 const TypePtr* adr_type() const {
a61af66fc99e Initial load
duke
parents:
diff changeset
1325 return Compile::current()->get_adr_type(alias_idx());
a61af66fc99e Initial load
duke
parents:
diff changeset
1326 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1327
a61af66fc99e Initial load
duke
parents:
diff changeset
1328 const TypePtr* adr_type(Compile* C) const {
a61af66fc99e Initial load
duke
parents:
diff changeset
1329 return C->get_adr_type(alias_idx());
a61af66fc99e Initial load
duke
parents:
diff changeset
1330 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1331 bool is_empty() const {
a61af66fc99e Initial load
duke
parents:
diff changeset
1332 assert(_mem, "must call next 1st");
a61af66fc99e Initial load
duke
parents:
diff changeset
1333 assert(_mem->is_top() == (_mem==_mm->empty_memory()), "correct sentinel");
a61af66fc99e Initial load
duke
parents:
diff changeset
1334 return _mem->is_top();
a61af66fc99e Initial load
duke
parents:
diff changeset
1335 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1336 bool is_empty2() const {
a61af66fc99e Initial load
duke
parents:
diff changeset
1337 assert(_mem2, "must call next 1st");
a61af66fc99e Initial load
duke
parents:
diff changeset
1338 assert(_mem2->is_top() == (_mem2==_mm2->empty_memory()), "correct sentinel");
a61af66fc99e Initial load
duke
parents:
diff changeset
1339 return _mem2->is_top();
a61af66fc99e Initial load
duke
parents:
diff changeset
1340 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1341 Node* memory() const {
a61af66fc99e Initial load
duke
parents:
diff changeset
1342 assert(!is_empty(), "must not be empty");
a61af66fc99e Initial load
duke
parents:
diff changeset
1343 assert_synch();
a61af66fc99e Initial load
duke
parents:
diff changeset
1344 return _mem;
a61af66fc99e Initial load
duke
parents:
diff changeset
1345 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1346 // get the current memory, regardless of empty or non-empty status
a61af66fc99e Initial load
duke
parents:
diff changeset
1347 Node* force_memory() const {
a61af66fc99e Initial load
duke
parents:
diff changeset
1348 assert(!is_empty() || !at_base_memory(), "");
a61af66fc99e Initial load
duke
parents:
diff changeset
1349 // Use _mm_base to defend against updates to _mem->base_memory().
a61af66fc99e Initial load
duke
parents:
diff changeset
1350 Node *mem = _mem->is_top() ? _mm_base : _mem;
a61af66fc99e Initial load
duke
parents:
diff changeset
1351 assert(mem == check_memory(), "");
a61af66fc99e Initial load
duke
parents:
diff changeset
1352 return mem;
a61af66fc99e Initial load
duke
parents:
diff changeset
1353 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1354 Node* memory2() const {
a61af66fc99e Initial load
duke
parents:
diff changeset
1355 assert(_mem2 == check_memory2(), "");
a61af66fc99e Initial load
duke
parents:
diff changeset
1356 return _mem2;
a61af66fc99e Initial load
duke
parents:
diff changeset
1357 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1358 void set_memory(Node* mem) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1359 if (at_base_memory()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1360 // Note that this does not change the invariant _mm_base.
a61af66fc99e Initial load
duke
parents:
diff changeset
1361 _mm->set_base_memory(mem);
a61af66fc99e Initial load
duke
parents:
diff changeset
1362 } else {
a61af66fc99e Initial load
duke
parents:
diff changeset
1363 _mm->set_memory_at(_idx, mem);
a61af66fc99e Initial load
duke
parents:
diff changeset
1364 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1365 _mem = mem;
a61af66fc99e Initial load
duke
parents:
diff changeset
1366 assert_synch();
a61af66fc99e Initial load
duke
parents:
diff changeset
1367 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1368
a61af66fc99e Initial load
duke
parents:
diff changeset
1369 // Recover from a side effect to the MergeMemNode.
a61af66fc99e Initial load
duke
parents:
diff changeset
1370 void set_memory() {
a61af66fc99e Initial load
duke
parents:
diff changeset
1371 _mem = _mm->in(_idx);
a61af66fc99e Initial load
duke
parents:
diff changeset
1372 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1373
a61af66fc99e Initial load
duke
parents:
diff changeset
1374 bool next() { return next(false); }
a61af66fc99e Initial load
duke
parents:
diff changeset
1375 bool next2() { return next(true); }
a61af66fc99e Initial load
duke
parents:
diff changeset
1376
a61af66fc99e Initial load
duke
parents:
diff changeset
1377 bool next_non_empty() { return next_non_empty(false); }
a61af66fc99e Initial load
duke
parents:
diff changeset
1378 bool next_non_empty2() { return next_non_empty(true); }
a61af66fc99e Initial load
duke
parents:
diff changeset
1379 // next_non_empty2 can yield states where is_empty() is true
a61af66fc99e Initial load
duke
parents:
diff changeset
1380
a61af66fc99e Initial load
duke
parents:
diff changeset
1381 private:
a61af66fc99e Initial load
duke
parents:
diff changeset
1382 // find the next item, which might be empty
a61af66fc99e Initial load
duke
parents:
diff changeset
1383 bool next(bool have_mm2) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1384 assert((_mm2 != NULL) == have_mm2, "use other next");
a61af66fc99e Initial load
duke
parents:
diff changeset
1385 assert_synch();
a61af66fc99e Initial load
duke
parents:
diff changeset
1386 if (++_idx < _cnt) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1387 // Note: This iterator allows _mm to be non-sparse.
a61af66fc99e Initial load
duke
parents:
diff changeset
1388 // It behaves the same whether _mem is top or base_memory.
a61af66fc99e Initial load
duke
parents:
diff changeset
1389 _mem = _mm->in(_idx);
a61af66fc99e Initial load
duke
parents:
diff changeset
1390 if (have_mm2)
a61af66fc99e Initial load
duke
parents:
diff changeset
1391 _mem2 = _mm2->in((_idx < _cnt2) ? _idx : Compile::AliasIdxTop);
a61af66fc99e Initial load
duke
parents:
diff changeset
1392 return true;
a61af66fc99e Initial load
duke
parents:
diff changeset
1393 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1394 return false;
a61af66fc99e Initial load
duke
parents:
diff changeset
1395 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1396
a61af66fc99e Initial load
duke
parents:
diff changeset
1397 // find the next non-empty item
a61af66fc99e Initial load
duke
parents:
diff changeset
1398 bool next_non_empty(bool have_mm2) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1399 while (next(have_mm2)) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1400 if (!is_empty()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1401 // make sure _mem2 is filled in sensibly
a61af66fc99e Initial load
duke
parents:
diff changeset
1402 if (have_mm2 && _mem2->is_top()) _mem2 = _mm2->base_memory();
a61af66fc99e Initial load
duke
parents:
diff changeset
1403 return true;
a61af66fc99e Initial load
duke
parents:
diff changeset
1404 } else if (have_mm2 && !is_empty2()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1405 return true; // is_empty() == true
a61af66fc99e Initial load
duke
parents:
diff changeset
1406 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1407 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1408 return false;
a61af66fc99e Initial load
duke
parents:
diff changeset
1409 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1410 };
a61af66fc99e Initial load
duke
parents:
diff changeset
1411
a61af66fc99e Initial load
duke
parents:
diff changeset
1412 //------------------------------Prefetch---------------------------------------
a61af66fc99e Initial load
duke
parents:
diff changeset
1413
a61af66fc99e Initial load
duke
parents:
diff changeset
1414 // Non-faulting prefetch load. Prefetch for many reads.
a61af66fc99e Initial load
duke
parents:
diff changeset
1415 class PrefetchReadNode : public Node {
a61af66fc99e Initial load
duke
parents:
diff changeset
1416 public:
a61af66fc99e Initial load
duke
parents:
diff changeset
1417 PrefetchReadNode(Node *abio, Node *adr) : Node(0,abio,adr) {}
a61af66fc99e Initial load
duke
parents:
diff changeset
1418 virtual int Opcode() const;
a61af66fc99e Initial load
duke
parents:
diff changeset
1419 virtual uint ideal_reg() const { return NotAMachineReg; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1420 virtual uint match_edge(uint idx) const { return idx==2; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1421 virtual const Type *bottom_type() const { return Type::ABIO; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1422 };
a61af66fc99e Initial load
duke
parents:
diff changeset
1423
a61af66fc99e Initial load
duke
parents:
diff changeset
1424 // Non-faulting prefetch load. Prefetch for many reads & many writes.
a61af66fc99e Initial load
duke
parents:
diff changeset
1425 class PrefetchWriteNode : public Node {
a61af66fc99e Initial load
duke
parents:
diff changeset
1426 public:
a61af66fc99e Initial load
duke
parents:
diff changeset
1427 PrefetchWriteNode(Node *abio, Node *adr) : Node(0,abio,adr) {}
a61af66fc99e Initial load
duke
parents:
diff changeset
1428 virtual int Opcode() const;
a61af66fc99e Initial load
duke
parents:
diff changeset
1429 virtual uint ideal_reg() const { return NotAMachineReg; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1430 virtual uint match_edge(uint idx) const { return idx==2; }
3854
1af104d6cf99 7079329: Adjust allocation prefetching for T4
kvn
parents: 3849
diff changeset
1431 virtual const Type *bottom_type() const { return Type::ABIO; }
1af104d6cf99 7079329: Adjust allocation prefetching for T4
kvn
parents: 3849
diff changeset
1432 };
1af104d6cf99 7079329: Adjust allocation prefetching for T4
kvn
parents: 3849
diff changeset
1433
1af104d6cf99 7079329: Adjust allocation prefetching for T4
kvn
parents: 3849
diff changeset
1434 // Allocation prefetch which may fault, TLAB size have to be adjusted.
1af104d6cf99 7079329: Adjust allocation prefetching for T4
kvn
parents: 3849
diff changeset
1435 class PrefetchAllocationNode : public Node {
1af104d6cf99 7079329: Adjust allocation prefetching for T4
kvn
parents: 3849
diff changeset
1436 public:
1af104d6cf99 7079329: Adjust allocation prefetching for T4
kvn
parents: 3849
diff changeset
1437 PrefetchAllocationNode(Node *mem, Node *adr) : Node(0,mem,adr) {}
1af104d6cf99 7079329: Adjust allocation prefetching for T4
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1438 virtual int Opcode() const;
1af104d6cf99 7079329: Adjust allocation prefetching for T4
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1439 virtual uint ideal_reg() const { return NotAMachineReg; }
1af104d6cf99 7079329: Adjust allocation prefetching for T4
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1440 virtual uint match_edge(uint idx) const { return idx==2; }
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1441 virtual const Type *bottom_type() const { return ( AllocatePrefetchStyle == 3 ) ? Type::MEMORY : Type::ABIO; }
0
a61af66fc99e Initial load
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1442 };
1972
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1443
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1444 #endif // SHARE_VM_OPTO_MEMNODE_HPP