annotate src/share/vm/opto/memnode.hpp @ 17716:cdb71841f4bc

6498581: ThreadInterruptTest3 produces wrong output on Windows Summary: There is race condition between os::interrupt and os::is_interrupted on Windows. In JVM_Sleep(Thread.sleep), check if thread gets interrupted, it may see interrupted but not really interrupted so cause spurious waking up (early return from sleep). Fix by checking if interrupt event really gets set thus prevent false return. For intrinsic of _isInterrupted, on Windows, go fastpath only on bit not set. Reviewed-by: acorn, kvn Contributed-by: david.holmes@oracle.com, yumin.qi@oracle.com
author minqi
date Wed, 26 Feb 2014 15:20:41 -0800
parents 55fb97c4c58d
children abec000618bf
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1 /*
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2 * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved.
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3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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4 *
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5 * This code is free software; you can redistribute it and/or modify it
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6 * under the terms of the GNU General Public License version 2 only, as
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7 * published by the Free Software Foundation.
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8 *
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9 * This code is distributed in the hope that it will be useful, but WITHOUT
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10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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12 * version 2 for more details (a copy is included in the LICENSE file that
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13 * accompanied this code).
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14 *
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15 * You should have received a copy of the GNU General Public License version
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16 * 2 along with this work; if not, write to the Free Software Foundation,
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17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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18 *
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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20 * or visit www.oracle.com if you need additional information or have any
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21 * questions.
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22 *
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23 */
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24
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25 #ifndef SHARE_VM_OPTO_MEMNODE_HPP
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26 #define SHARE_VM_OPTO_MEMNODE_HPP
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27
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28 #include "opto/multnode.hpp"
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29 #include "opto/node.hpp"
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30 #include "opto/opcodes.hpp"
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31 #include "opto/type.hpp"
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32
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33 // Portions of code courtesy of Clifford Click
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34
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35 class MultiNode;
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36 class PhaseCCP;
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37 class PhaseTransform;
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38
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39 //------------------------------MemNode----------------------------------------
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40 // Load or Store, possibly throwing a NULL pointer exception
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41 class MemNode : public Node {
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42 protected:
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43 #ifdef ASSERT
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44 const TypePtr* _adr_type; // What kind of memory is being addressed?
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45 #endif
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46 virtual uint size_of() const; // Size is bigger (ASSERT only)
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47 public:
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48 enum { Control, // When is it safe to do this load?
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49 Memory, // Chunk of memory is being loaded from
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50 Address, // Actually address, derived from base
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51 ValueIn, // Value to store
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52 OopStore // Preceeding oop store, only in StoreCM
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53 };
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54 protected:
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55 MemNode( Node *c0, Node *c1, Node *c2, const TypePtr* at )
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56 : Node(c0,c1,c2 ) {
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57 init_class_id(Class_Mem);
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58 debug_only(_adr_type=at; adr_type();)
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59 }
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60 MemNode( Node *c0, Node *c1, Node *c2, const TypePtr* at, Node *c3 )
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61 : Node(c0,c1,c2,c3) {
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62 init_class_id(Class_Mem);
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63 debug_only(_adr_type=at; adr_type();)
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64 }
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65 MemNode( Node *c0, Node *c1, Node *c2, const TypePtr* at, Node *c3, Node *c4)
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66 : Node(c0,c1,c2,c3,c4) {
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67 init_class_id(Class_Mem);
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68 debug_only(_adr_type=at; adr_type();)
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69 }
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70
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71 public:
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72 // Helpers for the optimizer. Documented in memnode.cpp.
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73 static bool detect_ptr_independence(Node* p1, AllocateNode* a1,
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74 Node* p2, AllocateNode* a2,
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75 PhaseTransform* phase);
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76 static bool adr_phi_is_loop_invariant(Node* adr_phi, Node* cast);
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77
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78 static Node *optimize_simple_memory_chain(Node *mchain, const TypeOopPtr *t_oop, Node *load, PhaseGVN *phase);
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79 static Node *optimize_memory_chain(Node *mchain, const TypePtr *t_adr, Node *load, PhaseGVN *phase);
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80 // This one should probably be a phase-specific function:
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81 static bool all_controls_dominate(Node* dom, Node* sub);
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82
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83 // Find any cast-away of null-ness and keep its control.
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84 static Node *Ideal_common_DU_postCCP( PhaseCCP *ccp, Node* n, Node* adr );
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85 virtual Node *Ideal_DU_postCCP( PhaseCCP *ccp );
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86
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87 virtual const class TypePtr *adr_type() const; // returns bottom_type of address
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88
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89 // Shared code for Ideal methods:
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90 Node *Ideal_common(PhaseGVN *phase, bool can_reshape); // Return -1 for short-circuit NULL.
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91
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92 // Helper function for adr_type() implementations.
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93 static const TypePtr* calculate_adr_type(const Type* t, const TypePtr* cross_check = NULL);
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94
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95 // Raw access function, to allow copying of adr_type efficiently in
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96 // product builds and retain the debug info for debug builds.
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97 const TypePtr *raw_adr_type() const {
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98 #ifdef ASSERT
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99 return _adr_type;
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100 #else
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101 return 0;
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102 #endif
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103 }
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104
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105 // Map a load or store opcode to its corresponding store opcode.
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106 // (Return -1 if unknown.)
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107 virtual int store_Opcode() const { return -1; }
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108
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109 // What is the type of the value in memory? (T_VOID mean "unspecified".)
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110 virtual BasicType memory_type() const = 0;
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111 virtual int memory_size() const {
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112 #ifdef ASSERT
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113 return type2aelembytes(memory_type(), true);
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114 #else
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115 return type2aelembytes(memory_type());
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116 #endif
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117 }
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118
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119 // Search through memory states which precede this node (load or store).
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120 // Look for an exact match for the address, with no intervening
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121 // aliased stores.
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122 Node* find_previous_store(PhaseTransform* phase);
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123
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124 // Can this node (load or store) accurately see a stored value in
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125 // the given memory state? (The state may or may not be in(Memory).)
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126 Node* can_see_stored_value(Node* st, PhaseTransform* phase) const;
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127
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128 #ifndef PRODUCT
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129 static void dump_adr_type(const Node* mem, const TypePtr* adr_type, outputStream *st);
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130 virtual void dump_spec(outputStream *st) const;
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131 #endif
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132 };
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133
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134 //------------------------------LoadNode---------------------------------------
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135 // Load value; requires Memory and Address
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136 class LoadNode : public MemNode {
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137 protected:
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138 virtual uint cmp( const Node &n ) const;
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139 virtual uint size_of() const; // Size is bigger
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140 const Type* const _type; // What kind of value is loaded?
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141 public:
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142
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143 LoadNode( Node *c, Node *mem, Node *adr, const TypePtr* at, const Type *rt )
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144 : MemNode(c,mem,adr,at), _type(rt) {
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145 init_class_id(Class_Load);
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146 }
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147
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148 // Polymorphic factory method:
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149 static Node* make( PhaseGVN& gvn, Node *c, Node *mem, Node *adr,
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150 const TypePtr* at, const Type *rt, BasicType bt );
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151
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152 virtual uint hash() const; // Check the type
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153
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154 // Handle algebraic identities here. If we have an identity, return the Node
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155 // we are equivalent to. We look for Load of a Store.
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156 virtual Node *Identity( PhaseTransform *phase );
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157
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158 // If the load is from Field memory and the pointer is non-null, we can
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159 // zero out the control input.
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160 virtual Node *Ideal(PhaseGVN *phase, bool can_reshape);
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161
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162 // Split instance field load through Phi.
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163 Node* split_through_phi(PhaseGVN *phase);
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164
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165 // Recover original value from boxed values
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166 Node *eliminate_autobox(PhaseGVN *phase);
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167
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168 // Compute a new Type for this node. Basically we just do the pre-check,
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169 // then call the virtual add() to set the type.
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170 virtual const Type *Value( PhaseTransform *phase ) const;
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171
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172 // Common methods for LoadKlass and LoadNKlass nodes.
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173 const Type *klass_value_common( PhaseTransform *phase ) const;
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174 Node *klass_identity_common( PhaseTransform *phase );
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175
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176 virtual uint ideal_reg() const;
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177 virtual const Type *bottom_type() const;
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178 // Following method is copied from TypeNode:
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179 void set_type(const Type* t) {
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180 assert(t != NULL, "sanity");
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181 debug_only(uint check_hash = (VerifyHashTableKeys && _hash_lock) ? hash() : NO_HASH);
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182 *(const Type**)&_type = t; // cast away const-ness
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183 // If this node is in the hash table, make sure it doesn't need a rehash.
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184 assert(check_hash == NO_HASH || check_hash == hash(), "type change must preserve hash code");
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185 }
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186 const Type* type() const { assert(_type != NULL, "sanity"); return _type; };
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187
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188 // Do not match memory edge
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189 virtual uint match_edge(uint idx) const;
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190
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191 // Map a load opcode to its corresponding store opcode.
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192 virtual int store_Opcode() const = 0;
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193
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194 // Check if the load's memory input is a Phi node with the same control.
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195 bool is_instance_field_load_with_local_phi(Node* ctrl);
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196
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197 #ifndef PRODUCT
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198 virtual void dump_spec(outputStream *st) const;
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199 #endif
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200 #ifdef ASSERT
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201 // Helper function to allow a raw load without control edge for some cases
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202 static bool is_immutable_value(Node* adr);
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203 #endif
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204 protected:
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205 const Type* load_array_final_field(const TypeKlassPtr *tkls,
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206 ciKlass* klass) const;
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207 // depends_only_on_test is almost always true, and needs to be almost always
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208 // true to enable key hoisting & commoning optimizations. However, for the
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209 // special case of RawPtr loads from TLS top & end, and other loads performed by
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210 // GC barriers, the control edge carries the dependence preventing hoisting past
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211 // a Safepoint instead of the memory edge. (An unfortunate consequence of having
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212 // Safepoints not set Raw Memory; itself an unfortunate consequence of having Nodes
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213 // which produce results (new raw memory state) inside of loops preventing all
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214 // manner of other optimizations). Basically, it's ugly but so is the alternative.
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215 // See comment in macro.cpp, around line 125 expand_allocate_common().
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216 virtual bool depends_only_on_test() const { return adr_type() != TypeRawPtr::BOTTOM; }
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217
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218 };
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219
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220 //------------------------------LoadBNode--------------------------------------
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221 // Load a byte (8bits signed) from memory
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222 class LoadBNode : public LoadNode {
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223 public:
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224 LoadBNode( Node *c, Node *mem, Node *adr, const TypePtr* at, const TypeInt *ti = TypeInt::BYTE )
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225 : LoadNode(c,mem,adr,at,ti) {}
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226 virtual int Opcode() const;
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227 virtual uint ideal_reg() const { return Op_RegI; }
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228 virtual Node *Ideal(PhaseGVN *phase, bool can_reshape);
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229 virtual const Type *Value(PhaseTransform *phase) const;
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230 virtual int store_Opcode() const { return Op_StoreB; }
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231 virtual BasicType memory_type() const { return T_BYTE; }
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232 };
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233
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234 //------------------------------LoadUBNode-------------------------------------
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235 // Load a unsigned byte (8bits unsigned) from memory
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236 class LoadUBNode : public LoadNode {
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237 public:
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238 LoadUBNode(Node* c, Node* mem, Node* adr, const TypePtr* at, const TypeInt* ti = TypeInt::UBYTE )
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239 : LoadNode(c, mem, adr, at, ti) {}
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240 virtual int Opcode() const;
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241 virtual uint ideal_reg() const { return Op_RegI; }
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242 virtual Node* Ideal(PhaseGVN *phase, bool can_reshape);
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243 virtual const Type *Value(PhaseTransform *phase) const;
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244 virtual int store_Opcode() const { return Op_StoreB; }
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245 virtual BasicType memory_type() const { return T_BYTE; }
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246 };
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247
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248 //------------------------------LoadUSNode-------------------------------------
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249 // Load an unsigned short/char (16bits unsigned) from memory
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250 class LoadUSNode : public LoadNode {
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251 public:
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252 LoadUSNode( Node *c, Node *mem, Node *adr, const TypePtr* at, const TypeInt *ti = TypeInt::CHAR )
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253 : LoadNode(c,mem,adr,at,ti) {}
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254 virtual int Opcode() const;
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255 virtual uint ideal_reg() const { return Op_RegI; }
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256 virtual Node *Ideal(PhaseGVN *phase, bool can_reshape);
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257 virtual const Type *Value(PhaseTransform *phase) const;
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258 virtual int store_Opcode() const { return Op_StoreC; }
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259 virtual BasicType memory_type() const { return T_CHAR; }
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260 };
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261
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262 //------------------------------LoadSNode--------------------------------------
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263 // Load a short (16bits signed) from memory
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264 class LoadSNode : public LoadNode {
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265 public:
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266 LoadSNode( Node *c, Node *mem, Node *adr, const TypePtr* at, const TypeInt *ti = TypeInt::SHORT )
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267 : LoadNode(c,mem,adr,at,ti) {}
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268 virtual int Opcode() const;
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269 virtual uint ideal_reg() const { return Op_RegI; }
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270 virtual Node *Ideal(PhaseGVN *phase, bool can_reshape);
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271 virtual const Type *Value(PhaseTransform *phase) const;
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272 virtual int store_Opcode() const { return Op_StoreC; }
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273 virtual BasicType memory_type() const { return T_SHORT; }
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274 };
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275
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276 //------------------------------LoadINode--------------------------------------
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277 // Load an integer from memory
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278 class LoadINode : public LoadNode {
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279 public:
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280 LoadINode( Node *c, Node *mem, Node *adr, const TypePtr* at, const TypeInt *ti = TypeInt::INT )
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281 : LoadNode(c,mem,adr,at,ti) {}
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282 virtual int Opcode() const;
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283 virtual uint ideal_reg() const { return Op_RegI; }
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284 virtual int store_Opcode() const { return Op_StoreI; }
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285 virtual BasicType memory_type() const { return T_INT; }
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286 };
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287
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288 //------------------------------LoadRangeNode----------------------------------
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289 // Load an array length from the array
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290 class LoadRangeNode : public LoadINode {
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291 public:
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292 LoadRangeNode( Node *c, Node *mem, Node *adr, const TypeInt *ti = TypeInt::POS )
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293 : LoadINode(c,mem,adr,TypeAryPtr::RANGE,ti) {}
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294 virtual int Opcode() const;
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295 virtual const Type *Value( PhaseTransform *phase ) const;
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296 virtual Node *Identity( PhaseTransform *phase );
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297 virtual Node *Ideal(PhaseGVN *phase, bool can_reshape);
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298 };
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299
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300 //------------------------------LoadLNode--------------------------------------
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301 // Load a long from memory
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302 class LoadLNode : public LoadNode {
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303 virtual uint hash() const { return LoadNode::hash() + _require_atomic_access; }
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304 virtual uint cmp( const Node &n ) const {
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305 return _require_atomic_access == ((LoadLNode&)n)._require_atomic_access
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306 && LoadNode::cmp(n);
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307 }
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308 virtual uint size_of() const { return sizeof(*this); }
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309 const bool _require_atomic_access; // is piecewise load forbidden?
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310
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311 public:
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312 LoadLNode( Node *c, Node *mem, Node *adr, const TypePtr* at,
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313 const TypeLong *tl = TypeLong::LONG,
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314 bool require_atomic_access = false )
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315 : LoadNode(c,mem,adr,at,tl)
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316 , _require_atomic_access(require_atomic_access)
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317 {}
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318 virtual int Opcode() const;
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319 virtual uint ideal_reg() const { return Op_RegL; }
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320 virtual int store_Opcode() const { return Op_StoreL; }
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321 virtual BasicType memory_type() const { return T_LONG; }
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322 bool require_atomic_access() { return _require_atomic_access; }
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323 static LoadLNode* make_atomic(Compile *C, Node* ctl, Node* mem, Node* adr, const TypePtr* adr_type, const Type* rt);
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324 #ifndef PRODUCT
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325 virtual void dump_spec(outputStream *st) const {
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326 LoadNode::dump_spec(st);
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327 if (_require_atomic_access) st->print(" Atomic!");
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328 }
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329 #endif
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330 };
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331
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332 //------------------------------LoadL_unalignedNode----------------------------
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333 // Load a long from unaligned memory
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334 class LoadL_unalignedNode : public LoadLNode {
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335 public:
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336 LoadL_unalignedNode( Node *c, Node *mem, Node *adr, const TypePtr* at )
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337 : LoadLNode(c,mem,adr,at) {}
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338 virtual int Opcode() const;
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339 };
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340
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341 //------------------------------LoadFNode--------------------------------------
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342 // Load a float (64 bits) from memory
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343 class LoadFNode : public LoadNode {
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344 public:
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345 LoadFNode( Node *c, Node *mem, Node *adr, const TypePtr* at, const Type *t = Type::FLOAT )
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346 : LoadNode(c,mem,adr,at,t) {}
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347 virtual int Opcode() const;
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348 virtual uint ideal_reg() const { return Op_RegF; }
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349 virtual int store_Opcode() const { return Op_StoreF; }
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350 virtual BasicType memory_type() const { return T_FLOAT; }
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351 };
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352
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353 //------------------------------LoadDNode--------------------------------------
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354 // Load a double (64 bits) from memory
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355 class LoadDNode : public LoadNode {
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356 public:
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357 LoadDNode( Node *c, Node *mem, Node *adr, const TypePtr* at, const Type *t = Type::DOUBLE )
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358 : LoadNode(c,mem,adr,at,t) {}
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359 virtual int Opcode() const;
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360 virtual uint ideal_reg() const { return Op_RegD; }
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361 virtual int store_Opcode() const { return Op_StoreD; }
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362 virtual BasicType memory_type() const { return T_DOUBLE; }
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363 };
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364
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365 //------------------------------LoadD_unalignedNode----------------------------
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366 // Load a double from unaligned memory
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367 class LoadD_unalignedNode : public LoadDNode {
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368 public:
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369 LoadD_unalignedNode( Node *c, Node *mem, Node *adr, const TypePtr* at )
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370 : LoadDNode(c,mem,adr,at) {}
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371 virtual int Opcode() const;
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372 };
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373
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374 //------------------------------LoadPNode--------------------------------------
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375 // Load a pointer from memory (either object or array)
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376 class LoadPNode : public LoadNode {
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377 public:
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378 LoadPNode( Node *c, Node *mem, Node *adr, const TypePtr *at, const TypePtr* t )
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379 : LoadNode(c,mem,adr,at,t) {}
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380 virtual int Opcode() const;
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381 virtual uint ideal_reg() const { return Op_RegP; }
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382 virtual int store_Opcode() const { return Op_StoreP; }
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383 virtual BasicType memory_type() const { return T_ADDRESS; }
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384 };
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385
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386
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387 //------------------------------LoadNNode--------------------------------------
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388 // Load a narrow oop from memory (either object or array)
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389 class LoadNNode : public LoadNode {
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390 public:
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391 LoadNNode( Node *c, Node *mem, Node *adr, const TypePtr *at, const Type* t )
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392 : LoadNode(c,mem,adr,at,t) {}
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393 virtual int Opcode() const;
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394 virtual uint ideal_reg() const { return Op_RegN; }
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395 virtual int store_Opcode() const { return Op_StoreN; }
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396 virtual BasicType memory_type() const { return T_NARROWOOP; }
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397 };
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398
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399 //------------------------------LoadKlassNode----------------------------------
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400 // Load a Klass from an object
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401 class LoadKlassNode : public LoadPNode {
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402 public:
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403 LoadKlassNode( Node *c, Node *mem, Node *adr, const TypePtr *at, const TypeKlassPtr *tk )
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404 : LoadPNode(c,mem,adr,at,tk) {}
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405 virtual int Opcode() const;
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406 virtual const Type *Value( PhaseTransform *phase ) const;
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407 virtual Node *Identity( PhaseTransform *phase );
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408 virtual bool depends_only_on_test() const { return true; }
164
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409
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410 // Polymorphic factory method:
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411 static Node* make( PhaseGVN& gvn, Node *mem, Node *adr, const TypePtr* at,
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412 const TypeKlassPtr *tk = TypeKlassPtr::OBJECT );
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413 };
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414
164
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415 //------------------------------LoadNKlassNode---------------------------------
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416 // Load a narrow Klass from an object.
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417 class LoadNKlassNode : public LoadNNode {
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418 public:
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419 LoadNKlassNode( Node *c, Node *mem, Node *adr, const TypePtr *at, const TypeNarrowKlass *tk )
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420 : LoadNNode(c,mem,adr,at,tk) {}
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421 virtual int Opcode() const;
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422 virtual uint ideal_reg() const { return Op_RegN; }
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423 virtual int store_Opcode() const { return Op_StoreNKlass; }
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424 virtual BasicType memory_type() const { return T_NARROWKLASS; }
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425
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426 virtual const Type *Value( PhaseTransform *phase ) const;
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427 virtual Node *Identity( PhaseTransform *phase );
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428 virtual bool depends_only_on_test() const { return true; }
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429 };
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430
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431
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432 //------------------------------StoreNode--------------------------------------
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433 // Store value; requires Store, Address and Value
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434 class StoreNode : public MemNode {
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435 protected:
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436 virtual uint cmp( const Node &n ) const;
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437 virtual bool depends_only_on_test() const { return false; }
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438
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439 Node *Ideal_masked_input (PhaseGVN *phase, uint mask);
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440 Node *Ideal_sign_extended_input(PhaseGVN *phase, int num_bits);
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441
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442 public:
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443 StoreNode( Node *c, Node *mem, Node *adr, const TypePtr* at, Node *val )
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444 : MemNode(c,mem,adr,at,val) {
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445 init_class_id(Class_Store);
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446 }
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447 StoreNode( Node *c, Node *mem, Node *adr, const TypePtr* at, Node *val, Node *oop_store )
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448 : MemNode(c,mem,adr,at,val,oop_store) {
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449 init_class_id(Class_Store);
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450 }
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451
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452 // Polymorphic factory method:
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453 static StoreNode* make( PhaseGVN& gvn, Node *c, Node *mem, Node *adr,
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454 const TypePtr* at, Node *val, BasicType bt );
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455
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456 virtual uint hash() const; // Check the type
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457
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458 // If the store is to Field memory and the pointer is non-null, we can
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459 // zero out the control input.
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460 virtual Node *Ideal(PhaseGVN *phase, bool can_reshape);
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461
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462 // Compute a new Type for this node. Basically we just do the pre-check,
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463 // then call the virtual add() to set the type.
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464 virtual const Type *Value( PhaseTransform *phase ) const;
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465
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466 // Check for identity function on memory (Load then Store at same address)
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467 virtual Node *Identity( PhaseTransform *phase );
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468
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469 // Do not match memory edge
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470 virtual uint match_edge(uint idx) const;
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471
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472 virtual const Type *bottom_type() const; // returns Type::MEMORY
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473
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474 // Map a store opcode to its corresponding own opcode, trivially.
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475 virtual int store_Opcode() const { return Opcode(); }
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476
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477 // have all possible loads of the value stored been optimized away?
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478 bool value_never_loaded(PhaseTransform *phase) const;
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479 };
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480
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481 //------------------------------StoreBNode-------------------------------------
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482 // Store byte to memory
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483 class StoreBNode : public StoreNode {
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484 public:
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485 StoreBNode( Node *c, Node *mem, Node *adr, const TypePtr* at, Node *val ) : StoreNode(c,mem,adr,at,val) {}
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486 virtual int Opcode() const;
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487 virtual Node *Ideal(PhaseGVN *phase, bool can_reshape);
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488 virtual BasicType memory_type() const { return T_BYTE; }
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489 };
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490
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491 //------------------------------StoreCNode-------------------------------------
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492 // Store char/short to memory
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493 class StoreCNode : public StoreNode {
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494 public:
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495 StoreCNode( Node *c, Node *mem, Node *adr, const TypePtr* at, Node *val ) : StoreNode(c,mem,adr,at,val) {}
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496 virtual int Opcode() const;
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497 virtual Node *Ideal(PhaseGVN *phase, bool can_reshape);
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498 virtual BasicType memory_type() const { return T_CHAR; }
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499 };
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500
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501 //------------------------------StoreINode-------------------------------------
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502 // Store int to memory
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503 class StoreINode : public StoreNode {
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504 public:
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505 StoreINode( Node *c, Node *mem, Node *adr, const TypePtr* at, Node *val ) : StoreNode(c,mem,adr,at,val) {}
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506 virtual int Opcode() const;
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507 virtual BasicType memory_type() const { return T_INT; }
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508 };
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509
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510 //------------------------------StoreLNode-------------------------------------
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511 // Store long to memory
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512 class StoreLNode : public StoreNode {
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513 virtual uint hash() const { return StoreNode::hash() + _require_atomic_access; }
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514 virtual uint cmp( const Node &n ) const {
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515 return _require_atomic_access == ((StoreLNode&)n)._require_atomic_access
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516 && StoreNode::cmp(n);
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517 }
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518 virtual uint size_of() const { return sizeof(*this); }
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519 const bool _require_atomic_access; // is piecewise store forbidden?
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520
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521 public:
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522 StoreLNode( Node *c, Node *mem, Node *adr, const TypePtr* at, Node *val,
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523 bool require_atomic_access = false )
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524 : StoreNode(c,mem,adr,at,val)
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525 , _require_atomic_access(require_atomic_access)
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526 {}
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527 virtual int Opcode() const;
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528 virtual BasicType memory_type() const { return T_LONG; }
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529 bool require_atomic_access() { return _require_atomic_access; }
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530 static StoreLNode* make_atomic(Compile *C, Node* ctl, Node* mem, Node* adr, const TypePtr* adr_type, Node* val);
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531 #ifndef PRODUCT
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532 virtual void dump_spec(outputStream *st) const {
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533 StoreNode::dump_spec(st);
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534 if (_require_atomic_access) st->print(" Atomic!");
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535 }
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536 #endif
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537 };
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538
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539 //------------------------------StoreFNode-------------------------------------
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540 // Store float to memory
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541 class StoreFNode : public StoreNode {
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542 public:
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543 StoreFNode( Node *c, Node *mem, Node *adr, const TypePtr* at, Node *val ) : StoreNode(c,mem,adr,at,val) {}
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544 virtual int Opcode() const;
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545 virtual BasicType memory_type() const { return T_FLOAT; }
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546 };
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547
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548 //------------------------------StoreDNode-------------------------------------
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549 // Store double to memory
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550 class StoreDNode : public StoreNode {
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551 public:
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552 StoreDNode( Node *c, Node *mem, Node *adr, const TypePtr* at, Node *val ) : StoreNode(c,mem,adr,at,val) {}
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553 virtual int Opcode() const;
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554 virtual BasicType memory_type() const { return T_DOUBLE; }
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555 };
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556
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557 //------------------------------StorePNode-------------------------------------
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558 // Store pointer to memory
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559 class StorePNode : public StoreNode {
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560 public:
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561 StorePNode( Node *c, Node *mem, Node *adr, const TypePtr* at, Node *val ) : StoreNode(c,mem,adr,at,val) {}
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562 virtual int Opcode() const;
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563 virtual BasicType memory_type() const { return T_ADDRESS; }
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564 };
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565
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566 //------------------------------StoreNNode-------------------------------------
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567 // Store narrow oop to memory
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568 class StoreNNode : public StoreNode {
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569 public:
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570 StoreNNode( Node *c, Node *mem, Node *adr, const TypePtr* at, Node *val ) : StoreNode(c,mem,adr,at,val) {}
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571 virtual int Opcode() const;
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572 virtual BasicType memory_type() const { return T_NARROWOOP; }
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573 };
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diff changeset
574
6848
8e47bac5643a 7054512: Compress class pointers after perm gen removal
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parents: 6795
diff changeset
575 //------------------------------StoreNKlassNode--------------------------------------
8e47bac5643a 7054512: Compress class pointers after perm gen removal
roland
parents: 6795
diff changeset
576 // Store narrow klass to memory
8e47bac5643a 7054512: Compress class pointers after perm gen removal
roland
parents: 6795
diff changeset
577 class StoreNKlassNode : public StoreNNode {
8e47bac5643a 7054512: Compress class pointers after perm gen removal
roland
parents: 6795
diff changeset
578 public:
8e47bac5643a 7054512: Compress class pointers after perm gen removal
roland
parents: 6795
diff changeset
579 StoreNKlassNode( Node *c, Node *mem, Node *adr, const TypePtr* at, Node *val ) : StoreNNode(c,mem,adr,at,val) {}
8e47bac5643a 7054512: Compress class pointers after perm gen removal
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diff changeset
580 virtual int Opcode() const;
8e47bac5643a 7054512: Compress class pointers after perm gen removal
roland
parents: 6795
diff changeset
581 virtual BasicType memory_type() const { return T_NARROWKLASS; }
8e47bac5643a 7054512: Compress class pointers after perm gen removal
roland
parents: 6795
diff changeset
582 };
8e47bac5643a 7054512: Compress class pointers after perm gen removal
roland
parents: 6795
diff changeset
583
0
a61af66fc99e Initial load
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parents:
diff changeset
584 //------------------------------StoreCMNode-----------------------------------
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parents:
diff changeset
585 // Store card-mark byte to memory for CM
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parents:
diff changeset
586 // The last StoreCM before a SafePoint must be preserved and occur after its "oop" store
a61af66fc99e Initial load
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parents:
diff changeset
587 // Preceeding equivalent StoreCMs may be eliminated.
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parents:
diff changeset
588 class StoreCMNode : public StoreNode {
985
685e959d09ea 6877254: Server vm crashes with no branches off of store slice" when run with CMS and UseSuperWord(default)
cfang
parents: 681
diff changeset
589 private:
1198
8d9bfe6a446b 6920346: G1: "must avoid base_memory and AliasIdxTop"
never
parents: 1100
diff changeset
590 virtual uint hash() const { return StoreNode::hash() + _oop_alias_idx; }
8d9bfe6a446b 6920346: G1: "must avoid base_memory and AliasIdxTop"
never
parents: 1100
diff changeset
591 virtual uint cmp( const Node &n ) const {
8d9bfe6a446b 6920346: G1: "must avoid base_memory and AliasIdxTop"
never
parents: 1100
diff changeset
592 return _oop_alias_idx == ((StoreCMNode&)n)._oop_alias_idx
8d9bfe6a446b 6920346: G1: "must avoid base_memory and AliasIdxTop"
never
parents: 1100
diff changeset
593 && StoreNode::cmp(n);
8d9bfe6a446b 6920346: G1: "must avoid base_memory and AliasIdxTop"
never
parents: 1100
diff changeset
594 }
8d9bfe6a446b 6920346: G1: "must avoid base_memory and AliasIdxTop"
never
parents: 1100
diff changeset
595 virtual uint size_of() const { return sizeof(*this); }
985
685e959d09ea 6877254: Server vm crashes with no branches off of store slice" when run with CMS and UseSuperWord(default)
cfang
parents: 681
diff changeset
596 int _oop_alias_idx; // The alias_idx of OopStore
1198
8d9bfe6a446b 6920346: G1: "must avoid base_memory and AliasIdxTop"
never
parents: 1100
diff changeset
597
0
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parents:
diff changeset
598 public:
1198
8d9bfe6a446b 6920346: G1: "must avoid base_memory and AliasIdxTop"
never
parents: 1100
diff changeset
599 StoreCMNode( Node *c, Node *mem, Node *adr, const TypePtr* at, Node *val, Node *oop_store, int oop_alias_idx ) :
8d9bfe6a446b 6920346: G1: "must avoid base_memory and AliasIdxTop"
never
parents: 1100
diff changeset
600 StoreNode(c,mem,adr,at,val,oop_store),
8d9bfe6a446b 6920346: G1: "must avoid base_memory and AliasIdxTop"
never
parents: 1100
diff changeset
601 _oop_alias_idx(oop_alias_idx) {
8d9bfe6a446b 6920346: G1: "must avoid base_memory and AliasIdxTop"
never
parents: 1100
diff changeset
602 assert(_oop_alias_idx >= Compile::AliasIdxRaw ||
8d9bfe6a446b 6920346: G1: "must avoid base_memory and AliasIdxTop"
never
parents: 1100
diff changeset
603 _oop_alias_idx == Compile::AliasIdxBot && Compile::current()->AliasLevel() == 0,
8d9bfe6a446b 6920346: G1: "must avoid base_memory and AliasIdxTop"
never
parents: 1100
diff changeset
604 "bad oop alias idx");
8d9bfe6a446b 6920346: G1: "must avoid base_memory and AliasIdxTop"
never
parents: 1100
diff changeset
605 }
0
a61af66fc99e Initial load
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parents:
diff changeset
606 virtual int Opcode() const;
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diff changeset
607 virtual Node *Identity( PhaseTransform *phase );
985
685e959d09ea 6877254: Server vm crashes with no branches off of store slice" when run with CMS and UseSuperWord(default)
cfang
parents: 681
diff changeset
608 virtual Node *Ideal(PhaseGVN *phase, bool can_reshape);
0
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parents:
diff changeset
609 virtual const Type *Value( PhaseTransform *phase ) const;
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diff changeset
610 virtual BasicType memory_type() const { return T_VOID; } // unspecific
985
685e959d09ea 6877254: Server vm crashes with no branches off of store slice" when run with CMS and UseSuperWord(default)
cfang
parents: 681
diff changeset
611 int oop_alias_idx() const { return _oop_alias_idx; }
0
a61af66fc99e Initial load
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parents:
diff changeset
612 };
a61af66fc99e Initial load
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parents:
diff changeset
613
a61af66fc99e Initial load
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parents:
diff changeset
614 //------------------------------LoadPLockedNode---------------------------------
a61af66fc99e Initial load
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parents:
diff changeset
615 // Load-locked a pointer from memory (either object or array).
a61af66fc99e Initial load
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parents:
diff changeset
616 // On Sparc & Intel this is implemented as a normal pointer load.
a61af66fc99e Initial load
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parents:
diff changeset
617 // On PowerPC and friends it's a real load-locked.
a61af66fc99e Initial load
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parents:
diff changeset
618 class LoadPLockedNode : public LoadPNode {
a61af66fc99e Initial load
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parents:
diff changeset
619 public:
a61af66fc99e Initial load
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parents:
diff changeset
620 LoadPLockedNode( Node *c, Node *mem, Node *adr )
a61af66fc99e Initial load
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diff changeset
621 : LoadPNode(c,mem,adr,TypeRawPtr::BOTTOM, TypeRawPtr::BOTTOM) {}
a61af66fc99e Initial load
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parents:
diff changeset
622 virtual int Opcode() const;
a61af66fc99e Initial load
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parents:
diff changeset
623 virtual int store_Opcode() const { return Op_StorePConditional; }
a61af66fc99e Initial load
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diff changeset
624 virtual bool depends_only_on_test() const { return true; }
a61af66fc99e Initial load
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parents:
diff changeset
625 };
a61af66fc99e Initial load
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parents:
diff changeset
626
a61af66fc99e Initial load
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parents:
diff changeset
627 //------------------------------SCMemProjNode---------------------------------------
a61af66fc99e Initial load
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parents:
diff changeset
628 // This class defines a projection of the memory state of a store conditional node.
a61af66fc99e Initial load
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parents:
diff changeset
629 // These nodes return a value, but also update memory.
a61af66fc99e Initial load
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parents:
diff changeset
630 class SCMemProjNode : public ProjNode {
a61af66fc99e Initial load
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parents:
diff changeset
631 public:
a61af66fc99e Initial load
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parents:
diff changeset
632 enum {SCMEMPROJCON = (uint)-2};
a61af66fc99e Initial load
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parents:
diff changeset
633 SCMemProjNode( Node *src) : ProjNode( src, SCMEMPROJCON) { }
a61af66fc99e Initial load
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parents:
diff changeset
634 virtual int Opcode() const;
a61af66fc99e Initial load
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parents:
diff changeset
635 virtual bool is_CFG() const { return false; }
a61af66fc99e Initial load
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parents:
diff changeset
636 virtual const Type *bottom_type() const {return Type::MEMORY;}
a61af66fc99e Initial load
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parents:
diff changeset
637 virtual const TypePtr *adr_type() const { return in(0)->in(MemNode::Memory)->adr_type();}
a61af66fc99e Initial load
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parents:
diff changeset
638 virtual uint ideal_reg() const { return 0;} // memory projections don't have a register
a61af66fc99e Initial load
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parents:
diff changeset
639 virtual const Type *Value( PhaseTransform *phase ) const;
a61af66fc99e Initial load
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parents:
diff changeset
640 #ifndef PRODUCT
a61af66fc99e Initial load
duke
parents:
diff changeset
641 virtual void dump_spec(outputStream *st) const {};
a61af66fc99e Initial load
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parents:
diff changeset
642 #endif
a61af66fc99e Initial load
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parents:
diff changeset
643 };
a61af66fc99e Initial load
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parents:
diff changeset
644
a61af66fc99e Initial load
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parents:
diff changeset
645 //------------------------------LoadStoreNode---------------------------
253
b0fe4deeb9fb 6726999: nsk/stress/jck12a/jck12a010 assert(n != null,"Bad immediate dominator info.")
kvn
parents: 196
diff changeset
646 // Note: is_Mem() method returns 'true' for this class.
0
a61af66fc99e Initial load
duke
parents:
diff changeset
647 class LoadStoreNode : public Node {
6795
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
648 private:
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
649 const Type* const _type; // What kind of value is loaded?
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
650 const TypePtr* _adr_type; // What kind of memory is being addressed?
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
651 virtual uint size_of() const; // Size is bigger
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
652 public:
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
653 LoadStoreNode( Node *c, Node *mem, Node *adr, Node *val, const TypePtr* at, const Type* rt, uint required );
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
654 virtual bool depends_only_on_test() const { return false; }
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
655 virtual uint match_edge(uint idx) const { return idx == MemNode::Address || idx == MemNode::ValueIn; }
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
656
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
657 virtual const Type *bottom_type() const { return _type; }
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
658 virtual uint ideal_reg() const;
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
659 virtual const class TypePtr *adr_type() const { return _adr_type; } // returns bottom_type of address
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
660
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
661 bool result_not_used() const;
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
662 };
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
663
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
664 class LoadStoreConditionalNode : public LoadStoreNode {
0
a61af66fc99e Initial load
duke
parents:
diff changeset
665 public:
a61af66fc99e Initial load
duke
parents:
diff changeset
666 enum {
a61af66fc99e Initial load
duke
parents:
diff changeset
667 ExpectedIn = MemNode::ValueIn+1 // One more input than MemNode
a61af66fc99e Initial load
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parents:
diff changeset
668 };
6795
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
669 LoadStoreConditionalNode(Node *c, Node *mem, Node *adr, Node *val, Node *ex);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
670 };
a61af66fc99e Initial load
duke
parents:
diff changeset
671
a61af66fc99e Initial load
duke
parents:
diff changeset
672 //------------------------------StorePConditionalNode---------------------------
a61af66fc99e Initial load
duke
parents:
diff changeset
673 // Conditionally store pointer to memory, if no change since prior
a61af66fc99e Initial load
duke
parents:
diff changeset
674 // load-locked. Sets flags for success or failure of the store.
6795
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
675 class StorePConditionalNode : public LoadStoreConditionalNode {
0
a61af66fc99e Initial load
duke
parents:
diff changeset
676 public:
6795
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
677 StorePConditionalNode( Node *c, Node *mem, Node *adr, Node *val, Node *ll ) : LoadStoreConditionalNode(c, mem, adr, val, ll) { }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
678 virtual int Opcode() const;
a61af66fc99e Initial load
duke
parents:
diff changeset
679 // Produces flags
a61af66fc99e Initial load
duke
parents:
diff changeset
680 virtual uint ideal_reg() const { return Op_RegFlags; }
a61af66fc99e Initial load
duke
parents:
diff changeset
681 };
a61af66fc99e Initial load
duke
parents:
diff changeset
682
420
a1980da045cc 6462850: generate biased locking code in C2 ideal graph
kvn
parents: 366
diff changeset
683 //------------------------------StoreIConditionalNode---------------------------
a1980da045cc 6462850: generate biased locking code in C2 ideal graph
kvn
parents: 366
diff changeset
684 // Conditionally store int to memory, if no change since prior
a1980da045cc 6462850: generate biased locking code in C2 ideal graph
kvn
parents: 366
diff changeset
685 // load-locked. Sets flags for success or failure of the store.
6795
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
686 class StoreIConditionalNode : public LoadStoreConditionalNode {
420
a1980da045cc 6462850: generate biased locking code in C2 ideal graph
kvn
parents: 366
diff changeset
687 public:
6795
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
688 StoreIConditionalNode( Node *c, Node *mem, Node *adr, Node *val, Node *ii ) : LoadStoreConditionalNode(c, mem, adr, val, ii) { }
420
a1980da045cc 6462850: generate biased locking code in C2 ideal graph
kvn
parents: 366
diff changeset
689 virtual int Opcode() const;
a1980da045cc 6462850: generate biased locking code in C2 ideal graph
kvn
parents: 366
diff changeset
690 // Produces flags
a1980da045cc 6462850: generate biased locking code in C2 ideal graph
kvn
parents: 366
diff changeset
691 virtual uint ideal_reg() const { return Op_RegFlags; }
a1980da045cc 6462850: generate biased locking code in C2 ideal graph
kvn
parents: 366
diff changeset
692 };
a1980da045cc 6462850: generate biased locking code in C2 ideal graph
kvn
parents: 366
diff changeset
693
0
a61af66fc99e Initial load
duke
parents:
diff changeset
694 //------------------------------StoreLConditionalNode---------------------------
a61af66fc99e Initial load
duke
parents:
diff changeset
695 // Conditionally store long to memory, if no change since prior
a61af66fc99e Initial load
duke
parents:
diff changeset
696 // load-locked. Sets flags for success or failure of the store.
6795
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
697 class StoreLConditionalNode : public LoadStoreConditionalNode {
0
a61af66fc99e Initial load
duke
parents:
diff changeset
698 public:
6795
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
699 StoreLConditionalNode( Node *c, Node *mem, Node *adr, Node *val, Node *ll ) : LoadStoreConditionalNode(c, mem, adr, val, ll) { }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
700 virtual int Opcode() const;
420
a1980da045cc 6462850: generate biased locking code in C2 ideal graph
kvn
parents: 366
diff changeset
701 // Produces flags
a1980da045cc 6462850: generate biased locking code in C2 ideal graph
kvn
parents: 366
diff changeset
702 virtual uint ideal_reg() const { return Op_RegFlags; }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
703 };
a61af66fc99e Initial load
duke
parents:
diff changeset
704
a61af66fc99e Initial load
duke
parents:
diff changeset
705
a61af66fc99e Initial load
duke
parents:
diff changeset
706 //------------------------------CompareAndSwapLNode---------------------------
6795
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
707 class CompareAndSwapLNode : public LoadStoreConditionalNode {
0
a61af66fc99e Initial load
duke
parents:
diff changeset
708 public:
6795
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
709 CompareAndSwapLNode( Node *c, Node *mem, Node *adr, Node *val, Node *ex) : LoadStoreConditionalNode(c, mem, adr, val, ex) { }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
710 virtual int Opcode() const;
a61af66fc99e Initial load
duke
parents:
diff changeset
711 };
a61af66fc99e Initial load
duke
parents:
diff changeset
712
a61af66fc99e Initial load
duke
parents:
diff changeset
713
a61af66fc99e Initial load
duke
parents:
diff changeset
714 //------------------------------CompareAndSwapINode---------------------------
6795
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
715 class CompareAndSwapINode : public LoadStoreConditionalNode {
0
a61af66fc99e Initial load
duke
parents:
diff changeset
716 public:
6795
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
717 CompareAndSwapINode( Node *c, Node *mem, Node *adr, Node *val, Node *ex) : LoadStoreConditionalNode(c, mem, adr, val, ex) { }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
718 virtual int Opcode() const;
a61af66fc99e Initial load
duke
parents:
diff changeset
719 };
a61af66fc99e Initial load
duke
parents:
diff changeset
720
a61af66fc99e Initial load
duke
parents:
diff changeset
721
a61af66fc99e Initial load
duke
parents:
diff changeset
722 //------------------------------CompareAndSwapPNode---------------------------
6795
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
723 class CompareAndSwapPNode : public LoadStoreConditionalNode {
0
a61af66fc99e Initial load
duke
parents:
diff changeset
724 public:
6795
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
725 CompareAndSwapPNode( Node *c, Node *mem, Node *adr, Node *val, Node *ex) : LoadStoreConditionalNode(c, mem, adr, val, ex) { }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
726 virtual int Opcode() const;
a61af66fc99e Initial load
duke
parents:
diff changeset
727 };
a61af66fc99e Initial load
duke
parents:
diff changeset
728
113
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 74
diff changeset
729 //------------------------------CompareAndSwapNNode---------------------------
6795
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
730 class CompareAndSwapNNode : public LoadStoreConditionalNode {
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
731 public:
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
732 CompareAndSwapNNode( Node *c, Node *mem, Node *adr, Node *val, Node *ex) : LoadStoreConditionalNode(c, mem, adr, val, ex) { }
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
733 virtual int Opcode() const;
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
734 };
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
735
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
736 //------------------------------GetAndAddINode---------------------------
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
737 class GetAndAddINode : public LoadStoreNode {
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
738 public:
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
739 GetAndAddINode( Node *c, Node *mem, Node *adr, Node *val, const TypePtr* at ) : LoadStoreNode(c, mem, adr, val, at, TypeInt::INT, 4) { }
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
740 virtual int Opcode() const;
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
741 };
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
742
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
743 //------------------------------GetAndAddLNode---------------------------
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
744 class GetAndAddLNode : public LoadStoreNode {
113
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 74
diff changeset
745 public:
6795
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
746 GetAndAddLNode( Node *c, Node *mem, Node *adr, Node *val, const TypePtr* at ) : LoadStoreNode(c, mem, adr, val, at, TypeLong::LONG, 4) { }
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
747 virtual int Opcode() const;
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
748 };
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
749
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
750
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
751 //------------------------------GetAndSetINode---------------------------
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
752 class GetAndSetINode : public LoadStoreNode {
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
753 public:
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
754 GetAndSetINode( Node *c, Node *mem, Node *adr, Node *val, const TypePtr* at ) : LoadStoreNode(c, mem, adr, val, at, TypeInt::INT, 4) { }
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
755 virtual int Opcode() const;
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
756 };
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
757
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
758 //------------------------------GetAndSetINode---------------------------
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
759 class GetAndSetLNode : public LoadStoreNode {
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
760 public:
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
761 GetAndSetLNode( Node *c, Node *mem, Node *adr, Node *val, const TypePtr* at ) : LoadStoreNode(c, mem, adr, val, at, TypeLong::LONG, 4) { }
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
762 virtual int Opcode() const;
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
763 };
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
764
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
765 //------------------------------GetAndSetPNode---------------------------
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
766 class GetAndSetPNode : public LoadStoreNode {
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
767 public:
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
768 GetAndSetPNode( Node *c, Node *mem, Node *adr, Node *val, const TypePtr* at, const Type* t ) : LoadStoreNode(c, mem, adr, val, at, t, 4) { }
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
769 virtual int Opcode() const;
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
770 };
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
771
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
772 //------------------------------GetAndSetNNode---------------------------
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
773 class GetAndSetNNode : public LoadStoreNode {
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
774 public:
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6143
diff changeset
775 GetAndSetNNode( Node *c, Node *mem, Node *adr, Node *val, const TypePtr* at, const Type* t ) : LoadStoreNode(c, mem, adr, val, at, t, 4) { }
113
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 74
diff changeset
776 virtual int Opcode() const;
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 74
diff changeset
777 };
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 74
diff changeset
778
0
a61af66fc99e Initial load
duke
parents:
diff changeset
779 //------------------------------ClearArray-------------------------------------
a61af66fc99e Initial load
duke
parents:
diff changeset
780 class ClearArrayNode: public Node {
a61af66fc99e Initial load
duke
parents:
diff changeset
781 public:
1100
f96a1a986f7b 6895383: JCK test throws NPE for method compiled with Escape Analysis
kvn
parents: 986
diff changeset
782 ClearArrayNode( Node *ctrl, Node *arymem, Node *word_cnt, Node *base )
f96a1a986f7b 6895383: JCK test throws NPE for method compiled with Escape Analysis
kvn
parents: 986
diff changeset
783 : Node(ctrl,arymem,word_cnt,base) {
f96a1a986f7b 6895383: JCK test throws NPE for method compiled with Escape Analysis
kvn
parents: 986
diff changeset
784 init_class_id(Class_ClearArray);
f96a1a986f7b 6895383: JCK test throws NPE for method compiled with Escape Analysis
kvn
parents: 986
diff changeset
785 }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
786 virtual int Opcode() const;
a61af66fc99e Initial load
duke
parents:
diff changeset
787 virtual const Type *bottom_type() const { return Type::MEMORY; }
a61af66fc99e Initial load
duke
parents:
diff changeset
788 // ClearArray modifies array elements, and so affects only the
a61af66fc99e Initial load
duke
parents:
diff changeset
789 // array memory addressed by the bottom_type of its base address.
a61af66fc99e Initial load
duke
parents:
diff changeset
790 virtual const class TypePtr *adr_type() const;
a61af66fc99e Initial load
duke
parents:
diff changeset
791 virtual Node *Identity( PhaseTransform *phase );
a61af66fc99e Initial load
duke
parents:
diff changeset
792 virtual Node *Ideal(PhaseGVN *phase, bool can_reshape);
a61af66fc99e Initial load
duke
parents:
diff changeset
793 virtual uint match_edge(uint idx) const;
a61af66fc99e Initial load
duke
parents:
diff changeset
794
a61af66fc99e Initial load
duke
parents:
diff changeset
795 // Clear the given area of an object or array.
a61af66fc99e Initial load
duke
parents:
diff changeset
796 // The start offset must always be aligned mod BytesPerInt.
a61af66fc99e Initial load
duke
parents:
diff changeset
797 // The end offset must always be aligned mod BytesPerLong.
a61af66fc99e Initial load
duke
parents:
diff changeset
798 // Return the new memory.
a61af66fc99e Initial load
duke
parents:
diff changeset
799 static Node* clear_memory(Node* control, Node* mem, Node* dest,
a61af66fc99e Initial load
duke
parents:
diff changeset
800 intptr_t start_offset,
a61af66fc99e Initial load
duke
parents:
diff changeset
801 intptr_t end_offset,
a61af66fc99e Initial load
duke
parents:
diff changeset
802 PhaseGVN* phase);
a61af66fc99e Initial load
duke
parents:
diff changeset
803 static Node* clear_memory(Node* control, Node* mem, Node* dest,
a61af66fc99e Initial load
duke
parents:
diff changeset
804 intptr_t start_offset,
a61af66fc99e Initial load
duke
parents:
diff changeset
805 Node* end_offset,
a61af66fc99e Initial load
duke
parents:
diff changeset
806 PhaseGVN* phase);
a61af66fc99e Initial load
duke
parents:
diff changeset
807 static Node* clear_memory(Node* control, Node* mem, Node* dest,
a61af66fc99e Initial load
duke
parents:
diff changeset
808 Node* start_offset,
a61af66fc99e Initial load
duke
parents:
diff changeset
809 Node* end_offset,
a61af66fc99e Initial load
duke
parents:
diff changeset
810 PhaseGVN* phase);
1100
f96a1a986f7b 6895383: JCK test throws NPE for method compiled with Escape Analysis
kvn
parents: 986
diff changeset
811 // Return allocation input memory edge if it is different instance
f96a1a986f7b 6895383: JCK test throws NPE for method compiled with Escape Analysis
kvn
parents: 986
diff changeset
812 // or itself if it is the one we are looking for.
f96a1a986f7b 6895383: JCK test throws NPE for method compiled with Escape Analysis
kvn
parents: 986
diff changeset
813 static bool step_through(Node** np, uint instance_id, PhaseTransform* phase);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
814 };
a61af66fc99e Initial load
duke
parents:
diff changeset
815
2412
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
816 //------------------------------StrIntrinsic-------------------------------
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
817 // Base class for Ideal nodes used in String instrinsic code.
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
818 class StrIntrinsicNode: public Node {
0
a61af66fc99e Initial load
duke
parents:
diff changeset
819 public:
2412
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
820 StrIntrinsicNode(Node* control, Node* char_array_mem,
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
821 Node* s1, Node* c1, Node* s2, Node* c2):
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
822 Node(control, char_array_mem, s1, c1, s2, c2) {
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
823 }
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
824
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
825 StrIntrinsicNode(Node* control, Node* char_array_mem,
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
826 Node* s1, Node* s2, Node* c):
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
827 Node(control, char_array_mem, s1, s2, c) {
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
828 }
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
829
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
830 StrIntrinsicNode(Node* control, Node* char_array_mem,
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
831 Node* s1, Node* s2):
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
832 Node(control, char_array_mem, s1, s2) {
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
833 }
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
834
0
a61af66fc99e Initial load
duke
parents:
diff changeset
835 virtual bool depends_only_on_test() const { return false; }
986
62001a362ce9 6827605: new String intrinsics may prevent EA scalar replacement
kvn
parents: 985
diff changeset
836 virtual const TypePtr* adr_type() const { return TypeAryPtr::CHARS; }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
837 virtual uint match_edge(uint idx) const;
a61af66fc99e Initial load
duke
parents:
diff changeset
838 virtual uint ideal_reg() const { return Op_RegI; }
a61af66fc99e Initial load
duke
parents:
diff changeset
839 virtual Node *Ideal(PhaseGVN *phase, bool can_reshape);
4115
1bd45abaa507 6890673: Eliminate allocations immediately after EA
kvn
parents: 3961
diff changeset
840 virtual const Type *Value(PhaseTransform *phase) const;
0
a61af66fc99e Initial load
duke
parents:
diff changeset
841 };
a61af66fc99e Initial load
duke
parents:
diff changeset
842
2412
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
843 //------------------------------StrComp-------------------------------------
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
844 class StrCompNode: public StrIntrinsicNode {
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
845 public:
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
846 StrCompNode(Node* control, Node* char_array_mem,
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
847 Node* s1, Node* c1, Node* s2, Node* c2):
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
848 StrIntrinsicNode(control, char_array_mem, s1, c1, s2, c2) {};
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
849 virtual int Opcode() const;
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
850 virtual const Type* bottom_type() const { return TypeInt::INT; }
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
851 };
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
852
681
fbde8ec322d0 6761600: Use sse 4.2 in intrinsics
cfang
parents: 628
diff changeset
853 //------------------------------StrEquals-------------------------------------
2412
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
854 class StrEqualsNode: public StrIntrinsicNode {
681
fbde8ec322d0 6761600: Use sse 4.2 in intrinsics
cfang
parents: 628
diff changeset
855 public:
986
62001a362ce9 6827605: new String intrinsics may prevent EA scalar replacement
kvn
parents: 985
diff changeset
856 StrEqualsNode(Node* control, Node* char_array_mem,
2412
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
857 Node* s1, Node* s2, Node* c):
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
858 StrIntrinsicNode(control, char_array_mem, s1, s2, c) {};
681
fbde8ec322d0 6761600: Use sse 4.2 in intrinsics
cfang
parents: 628
diff changeset
859 virtual int Opcode() const;
fbde8ec322d0 6761600: Use sse 4.2 in intrinsics
cfang
parents: 628
diff changeset
860 virtual const Type* bottom_type() const { return TypeInt::BOOL; }
fbde8ec322d0 6761600: Use sse 4.2 in intrinsics
cfang
parents: 628
diff changeset
861 };
fbde8ec322d0 6761600: Use sse 4.2 in intrinsics
cfang
parents: 628
diff changeset
862
fbde8ec322d0 6761600: Use sse 4.2 in intrinsics
cfang
parents: 628
diff changeset
863 //------------------------------StrIndexOf-------------------------------------
2412
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
864 class StrIndexOfNode: public StrIntrinsicNode {
681
fbde8ec322d0 6761600: Use sse 4.2 in intrinsics
cfang
parents: 628
diff changeset
865 public:
986
62001a362ce9 6827605: new String intrinsics may prevent EA scalar replacement
kvn
parents: 985
diff changeset
866 StrIndexOfNode(Node* control, Node* char_array_mem,
2412
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
867 Node* s1, Node* c1, Node* s2, Node* c2):
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
868 StrIntrinsicNode(control, char_array_mem, s1, c1, s2, c2) {};
681
fbde8ec322d0 6761600: Use sse 4.2 in intrinsics
cfang
parents: 628
diff changeset
869 virtual int Opcode() const;
fbde8ec322d0 6761600: Use sse 4.2 in intrinsics
cfang
parents: 628
diff changeset
870 virtual const Type* bottom_type() const { return TypeInt::INT; }
fbde8ec322d0 6761600: Use sse 4.2 in intrinsics
cfang
parents: 628
diff changeset
871 };
fbde8ec322d0 6761600: Use sse 4.2 in intrinsics
cfang
parents: 628
diff changeset
872
169
9148c65abefc 6695049: (coll) Create an x86 intrinsic for Arrays.equals
rasbold
parents: 164
diff changeset
873 //------------------------------AryEq---------------------------------------
2412
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
874 class AryEqNode: public StrIntrinsicNode {
169
9148c65abefc 6695049: (coll) Create an x86 intrinsic for Arrays.equals
rasbold
parents: 164
diff changeset
875 public:
2412
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
876 AryEqNode(Node* control, Node* char_array_mem, Node* s1, Node* s2):
f9424955eb18 7029152: Ideal nodes for String intrinsics miss memory edge optimization
kvn
parents: 1972
diff changeset
877 StrIntrinsicNode(control, char_array_mem, s1, s2) {};
169
9148c65abefc 6695049: (coll) Create an x86 intrinsic for Arrays.equals
rasbold
parents: 164
diff changeset
878 virtual int Opcode() const;
9148c65abefc 6695049: (coll) Create an x86 intrinsic for Arrays.equals
rasbold
parents: 164
diff changeset
879 virtual const Type* bottom_type() const { return TypeInt::BOOL; }
9148c65abefc 6695049: (coll) Create an x86 intrinsic for Arrays.equals
rasbold
parents: 164
diff changeset
880 };
9148c65abefc 6695049: (coll) Create an x86 intrinsic for Arrays.equals
rasbold
parents: 164
diff changeset
881
7637
b30b3c2a0cf2 6896617: Optimize sun.nio.cs.ISO_8859_1$Encode.encodeArrayLoop() on x86
kvn
parents: 6853
diff changeset
882
b30b3c2a0cf2 6896617: Optimize sun.nio.cs.ISO_8859_1$Encode.encodeArrayLoop() on x86
kvn
parents: 6853
diff changeset
883 //------------------------------EncodeISOArray--------------------------------
b30b3c2a0cf2 6896617: Optimize sun.nio.cs.ISO_8859_1$Encode.encodeArrayLoop() on x86
kvn
parents: 6853
diff changeset
884 // encode char[] to byte[] in ISO_8859_1
b30b3c2a0cf2 6896617: Optimize sun.nio.cs.ISO_8859_1$Encode.encodeArrayLoop() on x86
kvn
parents: 6853
diff changeset
885 class EncodeISOArrayNode: public Node {
b30b3c2a0cf2 6896617: Optimize sun.nio.cs.ISO_8859_1$Encode.encodeArrayLoop() on x86
kvn
parents: 6853
diff changeset
886 public:
b30b3c2a0cf2 6896617: Optimize sun.nio.cs.ISO_8859_1$Encode.encodeArrayLoop() on x86
kvn
parents: 6853
diff changeset
887 EncodeISOArrayNode(Node *control, Node* arymem, Node* s1, Node* s2, Node* c): Node(control, arymem, s1, s2, c) {};
b30b3c2a0cf2 6896617: Optimize sun.nio.cs.ISO_8859_1$Encode.encodeArrayLoop() on x86
kvn
parents: 6853
diff changeset
888 virtual int Opcode() const;
b30b3c2a0cf2 6896617: Optimize sun.nio.cs.ISO_8859_1$Encode.encodeArrayLoop() on x86
kvn
parents: 6853
diff changeset
889 virtual bool depends_only_on_test() const { return false; }
b30b3c2a0cf2 6896617: Optimize sun.nio.cs.ISO_8859_1$Encode.encodeArrayLoop() on x86
kvn
parents: 6853
diff changeset
890 virtual const Type* bottom_type() const { return TypeInt::INT; }
b30b3c2a0cf2 6896617: Optimize sun.nio.cs.ISO_8859_1$Encode.encodeArrayLoop() on x86
kvn
parents: 6853
diff changeset
891 virtual const TypePtr* adr_type() const { return TypePtr::BOTTOM; }
b30b3c2a0cf2 6896617: Optimize sun.nio.cs.ISO_8859_1$Encode.encodeArrayLoop() on x86
kvn
parents: 6853
diff changeset
892 virtual uint match_edge(uint idx) const;
b30b3c2a0cf2 6896617: Optimize sun.nio.cs.ISO_8859_1$Encode.encodeArrayLoop() on x86
kvn
parents: 6853
diff changeset
893 virtual uint ideal_reg() const { return Op_RegI; }
b30b3c2a0cf2 6896617: Optimize sun.nio.cs.ISO_8859_1$Encode.encodeArrayLoop() on x86
kvn
parents: 6853
diff changeset
894 virtual Node *Ideal(PhaseGVN *phase, bool can_reshape);
b30b3c2a0cf2 6896617: Optimize sun.nio.cs.ISO_8859_1$Encode.encodeArrayLoop() on x86
kvn
parents: 6853
diff changeset
895 virtual const Type *Value(PhaseTransform *phase) const;
b30b3c2a0cf2 6896617: Optimize sun.nio.cs.ISO_8859_1$Encode.encodeArrayLoop() on x86
kvn
parents: 6853
diff changeset
896 };
b30b3c2a0cf2 6896617: Optimize sun.nio.cs.ISO_8859_1$Encode.encodeArrayLoop() on x86
kvn
parents: 6853
diff changeset
897
0
a61af66fc99e Initial load
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parents:
diff changeset
898 //------------------------------MemBar-----------------------------------------
a61af66fc99e Initial load
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parents:
diff changeset
899 // There are different flavors of Memory Barriers to match the Java Memory
a61af66fc99e Initial load
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parents:
diff changeset
900 // Model. Monitor-enter and volatile-load act as Aquires: no following ref
a61af66fc99e Initial load
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parents:
diff changeset
901 // can be moved to before them. We insert a MemBar-Acquire after a FastLock or
a61af66fc99e Initial load
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parents:
diff changeset
902 // volatile-load. Monitor-exit and volatile-store act as Release: no
605
98cb887364d3 6810672: Comment typos
twisti
parents: 558
diff changeset
903 // preceding ref can be moved to after them. We insert a MemBar-Release
0
a61af66fc99e Initial load
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parents:
diff changeset
904 // before a FastUnlock or volatile-store. All volatiles need to be
a61af66fc99e Initial load
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parents:
diff changeset
905 // serialized, so we follow all volatile-stores with a MemBar-Volatile to
605
98cb887364d3 6810672: Comment typos
twisti
parents: 558
diff changeset
906 // separate it from any following volatile-load.
0
a61af66fc99e Initial load
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parents:
diff changeset
907 class MemBarNode: public MultiNode {
a61af66fc99e Initial load
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parents:
diff changeset
908 virtual uint hash() const ; // { return NO_HASH; }
a61af66fc99e Initial load
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parents:
diff changeset
909 virtual uint cmp( const Node &n ) const ; // Always fail, except on self
a61af66fc99e Initial load
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parents:
diff changeset
910
a61af66fc99e Initial load
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parents:
diff changeset
911 virtual uint size_of() const { return sizeof(*this); }
a61af66fc99e Initial load
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parents:
diff changeset
912 // Memory type this node is serializing. Usually either rawptr or bottom.
a61af66fc99e Initial load
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parents:
diff changeset
913 const TypePtr* _adr_type;
a61af66fc99e Initial load
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parents:
diff changeset
914
a61af66fc99e Initial load
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parents:
diff changeset
915 public:
a61af66fc99e Initial load
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parents:
diff changeset
916 enum {
a61af66fc99e Initial load
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parents:
diff changeset
917 Precedent = TypeFunc::Parms // optional edge to force precedence
a61af66fc99e Initial load
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parents:
diff changeset
918 };
a61af66fc99e Initial load
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parents:
diff changeset
919 MemBarNode(Compile* C, int alias_idx, Node* precedent);
a61af66fc99e Initial load
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parents:
diff changeset
920 virtual int Opcode() const = 0;
a61af66fc99e Initial load
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parents:
diff changeset
921 virtual const class TypePtr *adr_type() const { return _adr_type; }
a61af66fc99e Initial load
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parents:
diff changeset
922 virtual const Type *Value( PhaseTransform *phase ) const;
a61af66fc99e Initial load
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parents:
diff changeset
923 virtual Node *Ideal(PhaseGVN *phase, bool can_reshape);
a61af66fc99e Initial load
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parents:
diff changeset
924 virtual uint match_edge(uint idx) const { return 0; }
a61af66fc99e Initial load
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parents:
diff changeset
925 virtual const Type *bottom_type() const { return TypeTuple::MEMBAR; }
a61af66fc99e Initial load
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parents:
diff changeset
926 virtual Node *match( const ProjNode *proj, const Matcher *m );
a61af66fc99e Initial load
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parents:
diff changeset
927 // Factory method. Builds a wide or narrow membar.
a61af66fc99e Initial load
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parents:
diff changeset
928 // Optional 'precedent' becomes an extra edge if not null.
a61af66fc99e Initial load
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parents:
diff changeset
929 static MemBarNode* make(Compile* C, int opcode,
a61af66fc99e Initial load
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parents:
diff changeset
930 int alias_idx = Compile::AliasIdxBot,
a61af66fc99e Initial load
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parents:
diff changeset
931 Node* precedent = NULL);
a61af66fc99e Initial load
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parents:
diff changeset
932 };
a61af66fc99e Initial load
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parents:
diff changeset
933
a61af66fc99e Initial load
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parents:
diff changeset
934 // "Acquire" - no following ref can move before (but earlier refs can
a61af66fc99e Initial load
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parents:
diff changeset
935 // follow, like an early Load stalled in cache). Requires multi-cpu
3849
f1c12354c3f7 7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents: 2426
diff changeset
936 // visibility. Inserted after a volatile load.
0
a61af66fc99e Initial load
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parents:
diff changeset
937 class MemBarAcquireNode: public MemBarNode {
a61af66fc99e Initial load
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parents:
diff changeset
938 public:
a61af66fc99e Initial load
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parents:
diff changeset
939 MemBarAcquireNode(Compile* C, int alias_idx, Node* precedent)
a61af66fc99e Initial load
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parents:
diff changeset
940 : MemBarNode(C, alias_idx, precedent) {}
a61af66fc99e Initial load
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parents:
diff changeset
941 virtual int Opcode() const;
a61af66fc99e Initial load
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parents:
diff changeset
942 };
a61af66fc99e Initial load
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parents:
diff changeset
943
a61af66fc99e Initial load
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parents:
diff changeset
944 // "Release" - no earlier ref can move after (but later refs can move
a61af66fc99e Initial load
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parents:
diff changeset
945 // up, like a speculative pipelined cache-hitting Load). Requires
3849
f1c12354c3f7 7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents: 2426
diff changeset
946 // multi-cpu visibility. Inserted before a volatile store.
0
a61af66fc99e Initial load
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parents:
diff changeset
947 class MemBarReleaseNode: public MemBarNode {
a61af66fc99e Initial load
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parents:
diff changeset
948 public:
a61af66fc99e Initial load
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parents:
diff changeset
949 MemBarReleaseNode(Compile* C, int alias_idx, Node* precedent)
a61af66fc99e Initial load
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parents:
diff changeset
950 : MemBarNode(C, alias_idx, precedent) {}
a61af66fc99e Initial load
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parents:
diff changeset
951 virtual int Opcode() const;
a61af66fc99e Initial load
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parents:
diff changeset
952 };
a61af66fc99e Initial load
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parents:
diff changeset
953
3849
f1c12354c3f7 7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents: 2426
diff changeset
954 // "Acquire" - no following ref can move before (but earlier refs can
f1c12354c3f7 7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents: 2426
diff changeset
955 // follow, like an early Load stalled in cache). Requires multi-cpu
f1c12354c3f7 7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents: 2426
diff changeset
956 // visibility. Inserted after a FastLock.
f1c12354c3f7 7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents: 2426
diff changeset
957 class MemBarAcquireLockNode: public MemBarNode {
f1c12354c3f7 7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents: 2426
diff changeset
958 public:
f1c12354c3f7 7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents: 2426
diff changeset
959 MemBarAcquireLockNode(Compile* C, int alias_idx, Node* precedent)
f1c12354c3f7 7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents: 2426
diff changeset
960 : MemBarNode(C, alias_idx, precedent) {}
f1c12354c3f7 7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents: 2426
diff changeset
961 virtual int Opcode() const;
f1c12354c3f7 7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents: 2426
diff changeset
962 };
f1c12354c3f7 7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents: 2426
diff changeset
963
f1c12354c3f7 7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents: 2426
diff changeset
964 // "Release" - no earlier ref can move after (but later refs can move
f1c12354c3f7 7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents: 2426
diff changeset
965 // up, like a speculative pipelined cache-hitting Load). Requires
f1c12354c3f7 7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents: 2426
diff changeset
966 // multi-cpu visibility. Inserted before a FastUnLock.
f1c12354c3f7 7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents: 2426
diff changeset
967 class MemBarReleaseLockNode: public MemBarNode {
f1c12354c3f7 7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents: 2426
diff changeset
968 public:
f1c12354c3f7 7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents: 2426
diff changeset
969 MemBarReleaseLockNode(Compile* C, int alias_idx, Node* precedent)
f1c12354c3f7 7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents: 2426
diff changeset
970 : MemBarNode(C, alias_idx, precedent) {}
f1c12354c3f7 7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents: 2426
diff changeset
971 virtual int Opcode() const;
f1c12354c3f7 7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents: 2426
diff changeset
972 };
f1c12354c3f7 7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
roland
parents: 2426
diff changeset
973
4763
1dc233a8c7fe 7121140: Allocation paths require explicit memory synchronization operations for RMO systems
roland
parents: 4115
diff changeset
974 class MemBarStoreStoreNode: public MemBarNode {
1dc233a8c7fe 7121140: Allocation paths require explicit memory synchronization operations for RMO systems
roland
parents: 4115
diff changeset
975 public:
1dc233a8c7fe 7121140: Allocation paths require explicit memory synchronization operations for RMO systems
roland
parents: 4115
diff changeset
976 MemBarStoreStoreNode(Compile* C, int alias_idx, Node* precedent)
1dc233a8c7fe 7121140: Allocation paths require explicit memory synchronization operations for RMO systems
roland
parents: 4115
diff changeset
977 : MemBarNode(C, alias_idx, precedent) {
1dc233a8c7fe 7121140: Allocation paths require explicit memory synchronization operations for RMO systems
roland
parents: 4115
diff changeset
978 init_class_id(Class_MemBarStoreStore);
1dc233a8c7fe 7121140: Allocation paths require explicit memory synchronization operations for RMO systems
roland
parents: 4115
diff changeset
979 }
1dc233a8c7fe 7121140: Allocation paths require explicit memory synchronization operations for RMO systems
roland
parents: 4115
diff changeset
980 virtual int Opcode() const;
1dc233a8c7fe 7121140: Allocation paths require explicit memory synchronization operations for RMO systems
roland
parents: 4115
diff changeset
981 };
1dc233a8c7fe 7121140: Allocation paths require explicit memory synchronization operations for RMO systems
roland
parents: 4115
diff changeset
982
0
a61af66fc99e Initial load
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parents:
diff changeset
983 // Ordering between a volatile store and a following volatile load.
a61af66fc99e Initial load
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parents:
diff changeset
984 // Requires multi-CPU visibility?
a61af66fc99e Initial load
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parents:
diff changeset
985 class MemBarVolatileNode: public MemBarNode {
a61af66fc99e Initial load
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parents:
diff changeset
986 public:
a61af66fc99e Initial load
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parents:
diff changeset
987 MemBarVolatileNode(Compile* C, int alias_idx, Node* precedent)
a61af66fc99e Initial load
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parents:
diff changeset
988 : MemBarNode(C, alias_idx, precedent) {}
a61af66fc99e Initial load
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parents:
diff changeset
989 virtual int Opcode() const;
a61af66fc99e Initial load
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parents:
diff changeset
990 };
a61af66fc99e Initial load
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parents:
diff changeset
991
a61af66fc99e Initial load
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parents:
diff changeset
992 // Ordering within the same CPU. Used to order unsafe memory references
a61af66fc99e Initial load
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parents:
diff changeset
993 // inside the compiler when we lack alias info. Not needed "outside" the
a61af66fc99e Initial load
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parents:
diff changeset
994 // compiler because the CPU does all the ordering for us.
a61af66fc99e Initial load
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parents:
diff changeset
995 class MemBarCPUOrderNode: public MemBarNode {
a61af66fc99e Initial load
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parents:
diff changeset
996 public:
a61af66fc99e Initial load
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parents:
diff changeset
997 MemBarCPUOrderNode(Compile* C, int alias_idx, Node* precedent)
a61af66fc99e Initial load
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parents:
diff changeset
998 : MemBarNode(C, alias_idx, precedent) {}
a61af66fc99e Initial load
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parents:
diff changeset
999 virtual int Opcode() const;
a61af66fc99e Initial load
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parents:
diff changeset
1000 virtual uint ideal_reg() const { return 0; } // not matched in the AD file
a61af66fc99e Initial load
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parents:
diff changeset
1001 };
a61af66fc99e Initial load
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parents:
diff changeset
1002
a61af66fc99e Initial load
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parents:
diff changeset
1003 // Isolation of object setup after an AllocateNode and before next safepoint.
a61af66fc99e Initial load
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parents:
diff changeset
1004 // (See comment in memnode.cpp near InitializeNode::InitializeNode for semantics.)
a61af66fc99e Initial load
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parents:
diff changeset
1005 class InitializeNode: public MemBarNode {
a61af66fc99e Initial load
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parents:
diff changeset
1006 friend class AllocateNode;
a61af66fc99e Initial load
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parents:
diff changeset
1007
3961
a92cdbac8b9e 7081933: Use zeroing elimination optimization for large array
kvn
parents: 3854
diff changeset
1008 enum {
a92cdbac8b9e 7081933: Use zeroing elimination optimization for large array
kvn
parents: 3854
diff changeset
1009 Incomplete = 0,
a92cdbac8b9e 7081933: Use zeroing elimination optimization for large array
kvn
parents: 3854
diff changeset
1010 Complete = 1,
a92cdbac8b9e 7081933: Use zeroing elimination optimization for large array
kvn
parents: 3854
diff changeset
1011 WithArraycopy = 2
a92cdbac8b9e 7081933: Use zeroing elimination optimization for large array
kvn
parents: 3854
diff changeset
1012 };
a92cdbac8b9e 7081933: Use zeroing elimination optimization for large array
kvn
parents: 3854
diff changeset
1013 int _is_complete;
0
a61af66fc99e Initial load
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parents:
diff changeset
1014
4763
1dc233a8c7fe 7121140: Allocation paths require explicit memory synchronization operations for RMO systems
roland
parents: 4115
diff changeset
1015 bool _does_not_escape;
1dc233a8c7fe 7121140: Allocation paths require explicit memory synchronization operations for RMO systems
roland
parents: 4115
diff changeset
1016
0
a61af66fc99e Initial load
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parents:
diff changeset
1017 public:
a61af66fc99e Initial load
duke
parents:
diff changeset
1018 enum {
a61af66fc99e Initial load
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parents:
diff changeset
1019 Control = TypeFunc::Control,
a61af66fc99e Initial load
duke
parents:
diff changeset
1020 Memory = TypeFunc::Memory, // MergeMem for states affected by this op
a61af66fc99e Initial load
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parents:
diff changeset
1021 RawAddress = TypeFunc::Parms+0, // the newly-allocated raw address
a61af66fc99e Initial load
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parents:
diff changeset
1022 RawStores = TypeFunc::Parms+1 // zero or more stores (or TOP)
a61af66fc99e Initial load
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parents:
diff changeset
1023 };
a61af66fc99e Initial load
duke
parents:
diff changeset
1024
a61af66fc99e Initial load
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parents:
diff changeset
1025 InitializeNode(Compile* C, int adr_type, Node* rawoop);
a61af66fc99e Initial load
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parents:
diff changeset
1026 virtual int Opcode() const;
a61af66fc99e Initial load
duke
parents:
diff changeset
1027 virtual uint size_of() const { return sizeof(*this); }
a61af66fc99e Initial load
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parents:
diff changeset
1028 virtual uint ideal_reg() const { return 0; } // not matched in the AD file
a61af66fc99e Initial load
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parents:
diff changeset
1029 virtual const RegMask &in_RegMask(uint) const; // mask for RawAddress
a61af66fc99e Initial load
duke
parents:
diff changeset
1030
a61af66fc99e Initial load
duke
parents:
diff changeset
1031 // Manage incoming memory edges via a MergeMem on in(Memory):
a61af66fc99e Initial load
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parents:
diff changeset
1032 Node* memory(uint alias_idx);
a61af66fc99e Initial load
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parents:
diff changeset
1033
a61af66fc99e Initial load
duke
parents:
diff changeset
1034 // The raw memory edge coming directly from the Allocation.
a61af66fc99e Initial load
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parents:
diff changeset
1035 // The contents of this memory are *always* all-zero-bits.
a61af66fc99e Initial load
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parents:
diff changeset
1036 Node* zero_memory() { return memory(Compile::AliasIdxRaw); }
a61af66fc99e Initial load
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parents:
diff changeset
1037
a61af66fc99e Initial load
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parents:
diff changeset
1038 // Return the corresponding allocation for this initialization (or null if none).
a61af66fc99e Initial load
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parents:
diff changeset
1039 // (Note: Both InitializeNode::allocation and AllocateNode::initialization
a61af66fc99e Initial load
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parents:
diff changeset
1040 // are defined in graphKit.cpp, which sets up the bidirectional relation.)
a61af66fc99e Initial load
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parents:
diff changeset
1041 AllocateNode* allocation();
a61af66fc99e Initial load
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parents:
diff changeset
1042
a61af66fc99e Initial load
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parents:
diff changeset
1043 // Anything other than zeroing in this init?
a61af66fc99e Initial load
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parents:
diff changeset
1044 bool is_non_zero();
a61af66fc99e Initial load
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parents:
diff changeset
1045
a61af66fc99e Initial load
duke
parents:
diff changeset
1046 // An InitializeNode must completed before macro expansion is done.
a61af66fc99e Initial load
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parents:
diff changeset
1047 // Completion requires that the AllocateNode must be followed by
a61af66fc99e Initial load
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parents:
diff changeset
1048 // initialization of the new memory to zero, then to any initializers.
3961
a92cdbac8b9e 7081933: Use zeroing elimination optimization for large array
kvn
parents: 3854
diff changeset
1049 bool is_complete() { return _is_complete != Incomplete; }
a92cdbac8b9e 7081933: Use zeroing elimination optimization for large array
kvn
parents: 3854
diff changeset
1050 bool is_complete_with_arraycopy() { return (_is_complete & WithArraycopy) != 0; }
0
a61af66fc99e Initial load
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parents:
diff changeset
1051
a61af66fc99e Initial load
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parents:
diff changeset
1052 // Mark complete. (Must not yet be complete.)
a61af66fc99e Initial load
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parents:
diff changeset
1053 void set_complete(PhaseGVN* phase);
3961
a92cdbac8b9e 7081933: Use zeroing elimination optimization for large array
kvn
parents: 3854
diff changeset
1054 void set_complete_with_arraycopy() { _is_complete = Complete | WithArraycopy; }
0
a61af66fc99e Initial load
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parents:
diff changeset
1055
4763
1dc233a8c7fe 7121140: Allocation paths require explicit memory synchronization operations for RMO systems
roland
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diff changeset
1056 bool does_not_escape() { return _does_not_escape; }
1dc233a8c7fe 7121140: Allocation paths require explicit memory synchronization operations for RMO systems
roland
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diff changeset
1057 void set_does_not_escape() { _does_not_escape = true; }
1dc233a8c7fe 7121140: Allocation paths require explicit memory synchronization operations for RMO systems
roland
parents: 4115
diff changeset
1058
0
a61af66fc99e Initial load
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parents:
diff changeset
1059 #ifdef ASSERT
a61af66fc99e Initial load
duke
parents:
diff changeset
1060 // ensure all non-degenerate stores are ordered and non-overlapping
a61af66fc99e Initial load
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parents:
diff changeset
1061 bool stores_are_sane(PhaseTransform* phase);
a61af66fc99e Initial load
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parents:
diff changeset
1062 #endif //ASSERT
a61af66fc99e Initial load
duke
parents:
diff changeset
1063
a61af66fc99e Initial load
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parents:
diff changeset
1064 // See if this store can be captured; return offset where it initializes.
a61af66fc99e Initial load
duke
parents:
diff changeset
1065 // Return 0 if the store cannot be moved (any sort of problem).
8116
6931f425c517 8007294: ReduceFieldZeroing doesn't check for dependent load and can lead to incorrect execution
roland
parents: 7637
diff changeset
1066 intptr_t can_capture_store(StoreNode* st, PhaseTransform* phase, bool can_reshape);
0
a61af66fc99e Initial load
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parents:
diff changeset
1067
a61af66fc99e Initial load
duke
parents:
diff changeset
1068 // Capture another store; reformat it to write my internal raw memory.
a61af66fc99e Initial load
duke
parents:
diff changeset
1069 // Return the captured copy, else NULL if there is some sort of problem.
8116
6931f425c517 8007294: ReduceFieldZeroing doesn't check for dependent load and can lead to incorrect execution
roland
parents: 7637
diff changeset
1070 Node* capture_store(StoreNode* st, intptr_t start, PhaseTransform* phase, bool can_reshape);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1071
a61af66fc99e Initial load
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parents:
diff changeset
1072 // Find captured store which corresponds to the range [start..start+size).
a61af66fc99e Initial load
duke
parents:
diff changeset
1073 // Return my own memory projection (meaning the initial zero bits)
a61af66fc99e Initial load
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parents:
diff changeset
1074 // if there is no such store. Return NULL if there is a problem.
a61af66fc99e Initial load
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parents:
diff changeset
1075 Node* find_captured_store(intptr_t start, int size_in_bytes, PhaseTransform* phase);
a61af66fc99e Initial load
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parents:
diff changeset
1076
a61af66fc99e Initial load
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parents:
diff changeset
1077 // Called when the associated AllocateNode is expanded into CFG.
a61af66fc99e Initial load
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parents:
diff changeset
1078 Node* complete_stores(Node* rawctl, Node* rawmem, Node* rawptr,
a61af66fc99e Initial load
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parents:
diff changeset
1079 intptr_t header_size, Node* size_in_bytes,
a61af66fc99e Initial load
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parents:
diff changeset
1080 PhaseGVN* phase);
a61af66fc99e Initial load
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parents:
diff changeset
1081
a61af66fc99e Initial load
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parents:
diff changeset
1082 private:
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diff changeset
1083 void remove_extra_zeroes();
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diff changeset
1084
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diff changeset
1085 // Find out where a captured store should be placed (or already is placed).
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diff changeset
1086 int captured_store_insertion_point(intptr_t start, int size_in_bytes,
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diff changeset
1087 PhaseTransform* phase);
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parents:
diff changeset
1088
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parents:
diff changeset
1089 static intptr_t get_store_offset(Node* st, PhaseTransform* phase);
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diff changeset
1090
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diff changeset
1091 Node* make_raw_address(intptr_t offset, PhaseTransform* phase);
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diff changeset
1092
10278
6f3fd5150b67 6934604: enable parts of EliminateAutoBox by default
kvn
parents: 8116
diff changeset
1093 bool detect_init_independence(Node* n, int& count);
0
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diff changeset
1094
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diff changeset
1095 void coalesce_subword_stores(intptr_t header_size, Node* size_in_bytes,
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diff changeset
1096 PhaseGVN* phase);
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parents:
diff changeset
1097
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parents:
diff changeset
1098 intptr_t find_next_fullword_store(uint i, PhaseGVN* phase);
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diff changeset
1099 };
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diff changeset
1100
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diff changeset
1101 //------------------------------MergeMem---------------------------------------
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diff changeset
1102 // (See comment in memnode.cpp near MergeMemNode::MergeMemNode for semantics.)
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diff changeset
1103 class MergeMemNode: public Node {
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parents:
diff changeset
1104 virtual uint hash() const ; // { return NO_HASH; }
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parents:
diff changeset
1105 virtual uint cmp( const Node &n ) const ; // Always fail, except on self
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parents:
diff changeset
1106 friend class MergeMemStream;
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parents:
diff changeset
1107 MergeMemNode(Node* def); // clients use MergeMemNode::make
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parents:
diff changeset
1108
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diff changeset
1109 public:
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parents:
diff changeset
1110 // If the input is a whole memory state, clone it with all its slices intact.
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diff changeset
1111 // Otherwise, make a new memory state with just that base memory input.
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parents:
diff changeset
1112 // In either case, the result is a newly created MergeMem.
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diff changeset
1113 static MergeMemNode* make(Compile* C, Node* base_memory);
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diff changeset
1114
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parents:
diff changeset
1115 virtual int Opcode() const;
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diff changeset
1116 virtual Node *Identity( PhaseTransform *phase );
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diff changeset
1117 virtual Node *Ideal(PhaseGVN *phase, bool can_reshape);
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diff changeset
1118 virtual uint ideal_reg() const { return NotAMachineReg; }
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diff changeset
1119 virtual uint match_edge(uint idx) const { return 0; }
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diff changeset
1120 virtual const RegMask &out_RegMask() const;
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parents:
diff changeset
1121 virtual const Type *bottom_type() const { return Type::MEMORY; }
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diff changeset
1122 virtual const TypePtr *adr_type() const { return TypePtr::BOTTOM; }
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diff changeset
1123 // sparse accessors
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diff changeset
1124 // Fetch the previously stored "set_memory_at", or else the base memory.
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diff changeset
1125 // (Caller should clone it if it is a phi-nest.)
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1126 Node* memory_at(uint alias_idx) const;
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diff changeset
1127 // set the memory, regardless of its previous value
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diff changeset
1128 void set_memory_at(uint alias_idx, Node* n);
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diff changeset
1129 // the "base" is the memory that provides the non-finite support
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diff changeset
1130 Node* base_memory() const { return in(Compile::AliasIdxBot); }
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diff changeset
1131 // warning: setting the base can implicitly set any of the other slices too
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1132 void set_base_memory(Node* def);
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diff changeset
1133 // sentinel value which denotes a copy of the base memory:
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diff changeset
1134 Node* empty_memory() const { return in(Compile::AliasIdxTop); }
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diff changeset
1135 static Node* make_empty_memory(); // where the sentinel comes from
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1136 bool is_empty_memory(Node* n) const { assert((n == empty_memory()) == n->is_top(), "sanity"); return n->is_top(); }
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parents:
diff changeset
1137 // hook for the iterator, to perform any necessary setup
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diff changeset
1138 void iteration_setup(const MergeMemNode* other = NULL);
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parents:
diff changeset
1139 // push sentinels until I am at least as long as the other (semantic no-op)
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diff changeset
1140 void grow_to_match(const MergeMemNode* other);
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diff changeset
1141 bool verify_sparse() const PRODUCT_RETURN0;
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parents:
diff changeset
1142 #ifndef PRODUCT
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parents:
diff changeset
1143 virtual void dump_spec(outputStream *st) const;
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parents:
diff changeset
1144 #endif
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parents:
diff changeset
1145 };
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parents:
diff changeset
1146
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parents:
diff changeset
1147 class MergeMemStream : public StackObj {
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diff changeset
1148 private:
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parents:
diff changeset
1149 MergeMemNode* _mm;
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diff changeset
1150 const MergeMemNode* _mm2; // optional second guy, contributes non-empty iterations
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diff changeset
1151 Node* _mm_base; // loop-invariant base memory of _mm
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diff changeset
1152 int _idx;
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parents:
diff changeset
1153 int _cnt;
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diff changeset
1154 Node* _mem;
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diff changeset
1155 Node* _mem2;
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parents:
diff changeset
1156 int _cnt2;
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parents:
diff changeset
1157
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parents:
diff changeset
1158 void init(MergeMemNode* mm, const MergeMemNode* mm2 = NULL) {
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parents:
diff changeset
1159 // subsume_node will break sparseness at times, whenever a memory slice
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diff changeset
1160 // folds down to a copy of the base ("fat") memory. In such a case,
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parents:
diff changeset
1161 // the raw edge will update to base, although it should be top.
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diff changeset
1162 // This iterator will recognize either top or base_memory as an
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diff changeset
1163 // "empty" slice. See is_empty, is_empty2, and next below.
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parents:
diff changeset
1164 //
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parents:
diff changeset
1165 // The sparseness property is repaired in MergeMemNode::Ideal.
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diff changeset
1166 // As long as access to a MergeMem goes through this iterator
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parents:
diff changeset
1167 // or the memory_at accessor, flaws in the sparseness will
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parents:
diff changeset
1168 // never be observed.
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parents:
diff changeset
1169 //
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parents:
diff changeset
1170 // Also, iteration_setup repairs sparseness.
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parents:
diff changeset
1171 assert(mm->verify_sparse(), "please, no dups of base");
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parents:
diff changeset
1172 assert(mm2==NULL || mm2->verify_sparse(), "please, no dups of base");
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diff changeset
1173
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parents:
diff changeset
1174 _mm = mm;
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parents:
diff changeset
1175 _mm_base = mm->base_memory();
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parents:
diff changeset
1176 _mm2 = mm2;
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parents:
diff changeset
1177 _cnt = mm->req();
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parents:
diff changeset
1178 _idx = Compile::AliasIdxBot-1; // start at the base memory
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parents:
diff changeset
1179 _mem = NULL;
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parents:
diff changeset
1180 _mem2 = NULL;
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parents:
diff changeset
1181 }
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parents:
diff changeset
1182
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parents:
diff changeset
1183 #ifdef ASSERT
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parents:
diff changeset
1184 Node* check_memory() const {
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parents:
diff changeset
1185 if (at_base_memory())
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parents:
diff changeset
1186 return _mm->base_memory();
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parents:
diff changeset
1187 else if ((uint)_idx < _mm->req() && !_mm->in(_idx)->is_top())
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parents:
diff changeset
1188 return _mm->memory_at(_idx);
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parents:
diff changeset
1189 else
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diff changeset
1190 return _mm_base;
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parents:
diff changeset
1191 }
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parents:
diff changeset
1192 Node* check_memory2() const {
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parents:
diff changeset
1193 return at_base_memory()? _mm2->base_memory(): _mm2->memory_at(_idx);
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diff changeset
1194 }
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parents:
diff changeset
1195 #endif
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parents:
diff changeset
1196
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diff changeset
1197 static bool match_memory(Node* mem, const MergeMemNode* mm, int idx) PRODUCT_RETURN0;
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diff changeset
1198 void assert_synch() const {
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parents:
diff changeset
1199 assert(!_mem || _idx >= _cnt || match_memory(_mem, _mm, _idx),
a61af66fc99e Initial load
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parents:
diff changeset
1200 "no side-effects except through the stream");
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parents:
diff changeset
1201 }
a61af66fc99e Initial load
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parents:
diff changeset
1202
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parents:
diff changeset
1203 public:
a61af66fc99e Initial load
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diff changeset
1204
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parents:
diff changeset
1205 // expected usages:
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parents:
diff changeset
1206 // for (MergeMemStream mms(mem->is_MergeMem()); next_non_empty(); ) { ... }
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parents:
diff changeset
1207 // for (MergeMemStream mms(mem1, mem2); next_non_empty2(); ) { ... }
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diff changeset
1208
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parents:
diff changeset
1209 // iterate over one merge
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parents:
diff changeset
1210 MergeMemStream(MergeMemNode* mm) {
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parents:
diff changeset
1211 mm->iteration_setup();
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parents:
diff changeset
1212 init(mm);
a61af66fc99e Initial load
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parents:
diff changeset
1213 debug_only(_cnt2 = 999);
a61af66fc99e Initial load
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parents:
diff changeset
1214 }
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parents:
diff changeset
1215 // iterate in parallel over two merges
a61af66fc99e Initial load
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parents:
diff changeset
1216 // only iterates through non-empty elements of mm2
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parents:
diff changeset
1217 MergeMemStream(MergeMemNode* mm, const MergeMemNode* mm2) {
a61af66fc99e Initial load
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parents:
diff changeset
1218 assert(mm2, "second argument must be a MergeMem also");
a61af66fc99e Initial load
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parents:
diff changeset
1219 ((MergeMemNode*)mm2)->iteration_setup(); // update hidden state
a61af66fc99e Initial load
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parents:
diff changeset
1220 mm->iteration_setup(mm2);
a61af66fc99e Initial load
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parents:
diff changeset
1221 init(mm, mm2);
a61af66fc99e Initial load
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parents:
diff changeset
1222 _cnt2 = mm2->req();
a61af66fc99e Initial load
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parents:
diff changeset
1223 }
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parents:
diff changeset
1224 #ifdef ASSERT
a61af66fc99e Initial load
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parents:
diff changeset
1225 ~MergeMemStream() {
a61af66fc99e Initial load
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parents:
diff changeset
1226 assert_synch();
a61af66fc99e Initial load
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parents:
diff changeset
1227 }
a61af66fc99e Initial load
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parents:
diff changeset
1228 #endif
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parents:
diff changeset
1229
a61af66fc99e Initial load
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parents:
diff changeset
1230 MergeMemNode* all_memory() const {
a61af66fc99e Initial load
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parents:
diff changeset
1231 return _mm;
a61af66fc99e Initial load
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parents:
diff changeset
1232 }
a61af66fc99e Initial load
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parents:
diff changeset
1233 Node* base_memory() const {
a61af66fc99e Initial load
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parents:
diff changeset
1234 assert(_mm_base == _mm->base_memory(), "no update to base memory, please");
a61af66fc99e Initial load
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parents:
diff changeset
1235 return _mm_base;
a61af66fc99e Initial load
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parents:
diff changeset
1236 }
a61af66fc99e Initial load
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parents:
diff changeset
1237 const MergeMemNode* all_memory2() const {
a61af66fc99e Initial load
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parents:
diff changeset
1238 assert(_mm2 != NULL, "");
a61af66fc99e Initial load
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parents:
diff changeset
1239 return _mm2;
a61af66fc99e Initial load
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parents:
diff changeset
1240 }
a61af66fc99e Initial load
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parents:
diff changeset
1241 bool at_base_memory() const {
a61af66fc99e Initial load
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parents:
diff changeset
1242 return _idx == Compile::AliasIdxBot;
a61af66fc99e Initial load
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parents:
diff changeset
1243 }
a61af66fc99e Initial load
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parents:
diff changeset
1244 int alias_idx() const {
a61af66fc99e Initial load
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parents:
diff changeset
1245 assert(_mem, "must call next 1st");
a61af66fc99e Initial load
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parents:
diff changeset
1246 return _idx;
a61af66fc99e Initial load
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parents:
diff changeset
1247 }
a61af66fc99e Initial load
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parents:
diff changeset
1248
a61af66fc99e Initial load
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parents:
diff changeset
1249 const TypePtr* adr_type() const {
a61af66fc99e Initial load
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parents:
diff changeset
1250 return Compile::current()->get_adr_type(alias_idx());
a61af66fc99e Initial load
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parents:
diff changeset
1251 }
a61af66fc99e Initial load
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parents:
diff changeset
1252
a61af66fc99e Initial load
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parents:
diff changeset
1253 const TypePtr* adr_type(Compile* C) const {
a61af66fc99e Initial load
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parents:
diff changeset
1254 return C->get_adr_type(alias_idx());
a61af66fc99e Initial load
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parents:
diff changeset
1255 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1256 bool is_empty() const {
a61af66fc99e Initial load
duke
parents:
diff changeset
1257 assert(_mem, "must call next 1st");
a61af66fc99e Initial load
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parents:
diff changeset
1258 assert(_mem->is_top() == (_mem==_mm->empty_memory()), "correct sentinel");
a61af66fc99e Initial load
duke
parents:
diff changeset
1259 return _mem->is_top();
a61af66fc99e Initial load
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parents:
diff changeset
1260 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1261 bool is_empty2() const {
a61af66fc99e Initial load
duke
parents:
diff changeset
1262 assert(_mem2, "must call next 1st");
a61af66fc99e Initial load
duke
parents:
diff changeset
1263 assert(_mem2->is_top() == (_mem2==_mm2->empty_memory()), "correct sentinel");
a61af66fc99e Initial load
duke
parents:
diff changeset
1264 return _mem2->is_top();
a61af66fc99e Initial load
duke
parents:
diff changeset
1265 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1266 Node* memory() const {
a61af66fc99e Initial load
duke
parents:
diff changeset
1267 assert(!is_empty(), "must not be empty");
a61af66fc99e Initial load
duke
parents:
diff changeset
1268 assert_synch();
a61af66fc99e Initial load
duke
parents:
diff changeset
1269 return _mem;
a61af66fc99e Initial load
duke
parents:
diff changeset
1270 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1271 // get the current memory, regardless of empty or non-empty status
a61af66fc99e Initial load
duke
parents:
diff changeset
1272 Node* force_memory() const {
a61af66fc99e Initial load
duke
parents:
diff changeset
1273 assert(!is_empty() || !at_base_memory(), "");
a61af66fc99e Initial load
duke
parents:
diff changeset
1274 // Use _mm_base to defend against updates to _mem->base_memory().
a61af66fc99e Initial load
duke
parents:
diff changeset
1275 Node *mem = _mem->is_top() ? _mm_base : _mem;
a61af66fc99e Initial load
duke
parents:
diff changeset
1276 assert(mem == check_memory(), "");
a61af66fc99e Initial load
duke
parents:
diff changeset
1277 return mem;
a61af66fc99e Initial load
duke
parents:
diff changeset
1278 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1279 Node* memory2() const {
a61af66fc99e Initial load
duke
parents:
diff changeset
1280 assert(_mem2 == check_memory2(), "");
a61af66fc99e Initial load
duke
parents:
diff changeset
1281 return _mem2;
a61af66fc99e Initial load
duke
parents:
diff changeset
1282 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1283 void set_memory(Node* mem) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1284 if (at_base_memory()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1285 // Note that this does not change the invariant _mm_base.
a61af66fc99e Initial load
duke
parents:
diff changeset
1286 _mm->set_base_memory(mem);
a61af66fc99e Initial load
duke
parents:
diff changeset
1287 } else {
a61af66fc99e Initial load
duke
parents:
diff changeset
1288 _mm->set_memory_at(_idx, mem);
a61af66fc99e Initial load
duke
parents:
diff changeset
1289 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1290 _mem = mem;
a61af66fc99e Initial load
duke
parents:
diff changeset
1291 assert_synch();
a61af66fc99e Initial load
duke
parents:
diff changeset
1292 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1293
a61af66fc99e Initial load
duke
parents:
diff changeset
1294 // Recover from a side effect to the MergeMemNode.
a61af66fc99e Initial load
duke
parents:
diff changeset
1295 void set_memory() {
a61af66fc99e Initial load
duke
parents:
diff changeset
1296 _mem = _mm->in(_idx);
a61af66fc99e Initial load
duke
parents:
diff changeset
1297 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1298
a61af66fc99e Initial load
duke
parents:
diff changeset
1299 bool next() { return next(false); }
a61af66fc99e Initial load
duke
parents:
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1300 bool next2() { return next(true); }
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1301
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1302 bool next_non_empty() { return next_non_empty(false); }
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1303 bool next_non_empty2() { return next_non_empty(true); }
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1304 // next_non_empty2 can yield states where is_empty() is true
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1305
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1306 private:
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1307 // find the next item, which might be empty
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1308 bool next(bool have_mm2) {
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1309 assert((_mm2 != NULL) == have_mm2, "use other next");
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1310 assert_synch();
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1311 if (++_idx < _cnt) {
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1312 // Note: This iterator allows _mm to be non-sparse.
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1313 // It behaves the same whether _mem is top or base_memory.
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1314 _mem = _mm->in(_idx);
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1315 if (have_mm2)
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1316 _mem2 = _mm2->in((_idx < _cnt2) ? _idx : Compile::AliasIdxTop);
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1317 return true;
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1318 }
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1319 return false;
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1320 }
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1321
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1322 // find the next non-empty item
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1323 bool next_non_empty(bool have_mm2) {
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1324 while (next(have_mm2)) {
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1325 if (!is_empty()) {
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1326 // make sure _mem2 is filled in sensibly
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1327 if (have_mm2 && _mem2->is_top()) _mem2 = _mm2->base_memory();
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1328 return true;
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1329 } else if (have_mm2 && !is_empty2()) {
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1330 return true; // is_empty() == true
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1331 }
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1332 }
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1333 return false;
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1334 }
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1335 };
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1336
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1337 //------------------------------Prefetch---------------------------------------
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1338
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1339 // Non-faulting prefetch load. Prefetch for many reads.
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1340 class PrefetchReadNode : public Node {
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1341 public:
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1342 PrefetchReadNode(Node *abio, Node *adr) : Node(0,abio,adr) {}
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1343 virtual int Opcode() const;
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1344 virtual uint ideal_reg() const { return NotAMachineReg; }
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1345 virtual uint match_edge(uint idx) const { return idx==2; }
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1346 virtual const Type *bottom_type() const { return Type::ABIO; }
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1347 };
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1348
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1349 // Non-faulting prefetch load. Prefetch for many reads & many writes.
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1350 class PrefetchWriteNode : public Node {
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1351 public:
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1352 PrefetchWriteNode(Node *abio, Node *adr) : Node(0,abio,adr) {}
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1353 virtual int Opcode() const;
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1354 virtual uint ideal_reg() const { return NotAMachineReg; }
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1355 virtual uint match_edge(uint idx) const { return idx==2; }
3854
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1356 virtual const Type *bottom_type() const { return Type::ABIO; }
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1357 };
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1358
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1359 // Allocation prefetch which may fault, TLAB size have to be adjusted.
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1360 class PrefetchAllocationNode : public Node {
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1361 public:
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1362 PrefetchAllocationNode(Node *mem, Node *adr) : Node(0,mem,adr) {}
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1363 virtual int Opcode() const;
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1364 virtual uint ideal_reg() const { return NotAMachineReg; }
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1365 virtual uint match_edge(uint idx) const { return idx==2; }
1367
9e321dcfa5b7 6940726: Use BIS instruction for allocation prefetch on Sparc
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1366 virtual const Type *bottom_type() const { return ( AllocatePrefetchStyle == 3 ) ? Type::MEMORY : Type::ABIO; }
0
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1367 };
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1368
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1369 #endif // SHARE_VM_OPTO_MEMNODE_HPP