Mercurial > hg > truffle
annotate src/cpu/x86/vm/assembler_x86.cpp @ 13512:8085ce95b6f5
reloc info for safepoint polls includes whether the poison page is far or near
author | Doug Simon <doug.simon@oracle.com> |
---|---|
date | Mon, 06 Jan 2014 13:41:59 +0100 |
parents | 096c224171c4 |
children | fa5180b3c18e |
rev | line source |
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0 | 1 /* |
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2 * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved. |
0 | 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
4 * | |
5 * This code is free software; you can redistribute it and/or modify it | |
6 * under the terms of the GNU General Public License version 2 only, as | |
7 * published by the Free Software Foundation. | |
8 * | |
9 * This code is distributed in the hope that it will be useful, but WITHOUT | |
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
12 * version 2 for more details (a copy is included in the LICENSE file that | |
13 * accompanied this code). | |
14 * | |
15 * You should have received a copy of the GNU General Public License version | |
16 * 2 along with this work; if not, write to the Free Software Foundation, | |
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
18 * | |
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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20 * or visit www.oracle.com if you need additional information or have any |
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21 * questions. |
0 | 22 * |
23 */ | |
24 | |
1972 | 25 #include "precompiled.hpp" |
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26 #include "asm/assembler.hpp" |
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27 #include "asm/assembler.inline.hpp" |
1972 | 28 #include "gc_interface/collectedHeap.inline.hpp" |
29 #include "interpreter/interpreter.hpp" | |
30 #include "memory/cardTableModRefBS.hpp" | |
31 #include "memory/resourceArea.hpp" | |
32 #include "prims/methodHandles.hpp" | |
33 #include "runtime/biasedLocking.hpp" | |
34 #include "runtime/interfaceSupport.hpp" | |
35 #include "runtime/objectMonitor.hpp" | |
36 #include "runtime/os.hpp" | |
37 #include "runtime/sharedRuntime.hpp" | |
38 #include "runtime/stubRoutines.hpp" | |
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39 #include "utilities/macros.hpp" |
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40 #if INCLUDE_ALL_GCS |
1972 | 41 #include "gc_implementation/g1/g1CollectedHeap.inline.hpp" |
42 #include "gc_implementation/g1/g1SATBCardTableModRefBS.hpp" | |
43 #include "gc_implementation/g1/heapRegion.hpp" | |
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44 #endif // INCLUDE_ALL_GCS |
0 | 45 |
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46 #ifdef PRODUCT |
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47 #define BLOCK_COMMENT(str) /* nothing */ |
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48 #define STOP(error) stop(error) |
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49 #else |
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50 #define BLOCK_COMMENT(str) block_comment(str) |
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51 #define STOP(error) block_comment(error); stop(error) |
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52 #endif |
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53 |
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54 #define BIND(label) bind(label); BLOCK_COMMENT(#label ":") |
0 | 55 // Implementation of AddressLiteral |
56 | |
57 AddressLiteral::AddressLiteral(address target, relocInfo::relocType rtype) { | |
58 _is_lval = false; | |
59 _target = target; | |
60 switch (rtype) { | |
61 case relocInfo::oop_type: | |
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62 case relocInfo::metadata_type: |
0 | 63 // Oops are a special case. Normally they would be their own section |
64 // but in cases like icBuffer they are literals in the code stream that | |
65 // we don't have a section for. We use none so that we get a literal address | |
66 // which is always patchable. | |
67 break; | |
68 case relocInfo::external_word_type: | |
69 _rspec = external_word_Relocation::spec(target); | |
70 break; | |
71 case relocInfo::internal_word_type: | |
72 _rspec = internal_word_Relocation::spec(target); | |
73 break; | |
74 case relocInfo::opt_virtual_call_type: | |
75 _rspec = opt_virtual_call_Relocation::spec(); | |
76 break; | |
77 case relocInfo::static_call_type: | |
78 _rspec = static_call_Relocation::spec(); | |
79 break; | |
80 case relocInfo::runtime_call_type: | |
81 _rspec = runtime_call_Relocation::spec(); | |
82 break; | |
83 case relocInfo::poll_type: | |
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84 _rspec = poll_Relocation::spec(Assembler::is_polling_page_far() ? poll_Relocation::far : poll_Relocation::near); |
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85 break; |
0 | 86 case relocInfo::poll_return_type: |
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87 _rspec = poll_return_Relocation::spec(Assembler::is_polling_page_far() ? poll_Relocation::far : poll_Relocation::near); |
0 | 88 break; |
89 case relocInfo::none: | |
90 break; | |
91 default: | |
92 ShouldNotReachHere(); | |
93 break; | |
94 } | |
95 } | |
96 | |
97 // Implementation of Address | |
98 | |
304 | 99 #ifdef _LP64 |
100 | |
0 | 101 Address Address::make_array(ArrayAddress adr) { |
102 // Not implementable on 64bit machines | |
103 // Should have been handled higher up the call chain. | |
104 ShouldNotReachHere(); | |
304 | 105 return Address(); |
106 } | |
107 | |
108 // exceedingly dangerous constructor | |
109 Address::Address(int disp, address loc, relocInfo::relocType rtype) { | |
110 _base = noreg; | |
111 _index = noreg; | |
112 _scale = no_scale; | |
113 _disp = disp; | |
114 switch (rtype) { | |
115 case relocInfo::external_word_type: | |
116 _rspec = external_word_Relocation::spec(loc); | |
117 break; | |
118 case relocInfo::internal_word_type: | |
119 _rspec = internal_word_Relocation::spec(loc); | |
120 break; | |
121 case relocInfo::runtime_call_type: | |
122 // HMM | |
123 _rspec = runtime_call_Relocation::spec(); | |
124 break; | |
125 case relocInfo::poll_type: | |
126 case relocInfo::poll_return_type: | |
127 _rspec = Relocation::spec_simple(rtype); | |
128 break; | |
129 case relocInfo::none: | |
130 break; | |
131 default: | |
132 ShouldNotReachHere(); | |
133 } | |
134 } | |
135 #else // LP64 | |
136 | |
137 Address Address::make_array(ArrayAddress adr) { | |
0 | 138 AddressLiteral base = adr.base(); |
139 Address index = adr.index(); | |
140 assert(index._disp == 0, "must not have disp"); // maybe it can? | |
141 Address array(index._base, index._index, index._scale, (intptr_t) base.target()); | |
142 array._rspec = base._rspec; | |
143 return array; | |
304 | 144 } |
0 | 145 |
146 // exceedingly dangerous constructor | |
147 Address::Address(address loc, RelocationHolder spec) { | |
148 _base = noreg; | |
149 _index = noreg; | |
150 _scale = no_scale; | |
151 _disp = (intptr_t) loc; | |
152 _rspec = spec; | |
153 } | |
304 | 154 |
0 | 155 #endif // _LP64 |
156 | |
304 | 157 |
158 | |
0 | 159 // Convert the raw encoding form into the form expected by the constructor for |
160 // Address. An index of 4 (rsp) corresponds to having no index, so convert | |
161 // that to noreg for the Address constructor. | |
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162 Address Address::make_raw(int base, int index, int scale, int disp, relocInfo::relocType disp_reloc) { |
624 | 163 RelocationHolder rspec; |
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164 if (disp_reloc != relocInfo::none) { |
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165 rspec = Relocation::spec_simple(disp_reloc); |
624 | 166 } |
0 | 167 bool valid_index = index != rsp->encoding(); |
168 if (valid_index) { | |
169 Address madr(as_Register(base), as_Register(index), (Address::ScaleFactor)scale, in_ByteSize(disp)); | |
624 | 170 madr._rspec = rspec; |
0 | 171 return madr; |
172 } else { | |
173 Address madr(as_Register(base), noreg, Address::no_scale, in_ByteSize(disp)); | |
624 | 174 madr._rspec = rspec; |
0 | 175 return madr; |
176 } | |
177 } | |
178 | |
179 // Implementation of Assembler | |
180 | |
181 int AbstractAssembler::code_fill_byte() { | |
182 return (u_char)'\xF4'; // hlt | |
183 } | |
184 | |
185 // make this go away someday | |
186 void Assembler::emit_data(jint data, relocInfo::relocType rtype, int format) { | |
187 if (rtype == relocInfo::none) | |
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188 emit_int32(data); |
0 | 189 else emit_data(data, Relocation::spec_simple(rtype), format); |
190 } | |
191 | |
192 void Assembler::emit_data(jint data, RelocationHolder const& rspec, int format) { | |
304 | 193 assert(imm_operand == 0, "default format must be immediate in this file"); |
0 | 194 assert(inst_mark() != NULL, "must be inside InstructionMark"); |
195 if (rspec.type() != relocInfo::none) { | |
196 #ifdef ASSERT | |
197 check_relocation(rspec, format); | |
198 #endif | |
199 // Do not use AbstractAssembler::relocate, which is not intended for | |
200 // embedded words. Instead, relocate to the enclosing instruction. | |
201 | |
202 // hack. call32 is too wide for mask so use disp32 | |
203 if (format == call32_operand) | |
204 code_section()->relocate(inst_mark(), rspec, disp32_operand); | |
205 else | |
206 code_section()->relocate(inst_mark(), rspec, format); | |
207 } | |
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208 emit_int32(data); |
0 | 209 } |
210 | |
304 | 211 static int encode(Register r) { |
212 int enc = r->encoding(); | |
213 if (enc >= 8) { | |
214 enc -= 8; | |
215 } | |
216 return enc; | |
217 } | |
218 | |
0 | 219 void Assembler::emit_arith_b(int op1, int op2, Register dst, int imm8) { |
220 assert(dst->has_byte_register(), "must have byte register"); | |
221 assert(isByte(op1) && isByte(op2), "wrong opcode"); | |
222 assert(isByte(imm8), "not a byte"); | |
223 assert((op1 & 0x01) == 0, "should be 8bit operation"); | |
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224 emit_int8(op1); |
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225 emit_int8(op2 | encode(dst)); |
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226 emit_int8(imm8); |
0 | 227 } |
228 | |
229 | |
304 | 230 void Assembler::emit_arith(int op1, int op2, Register dst, int32_t imm32) { |
0 | 231 assert(isByte(op1) && isByte(op2), "wrong opcode"); |
232 assert((op1 & 0x01) == 1, "should be 32bit operation"); | |
233 assert((op1 & 0x02) == 0, "sign-extension bit should not be set"); | |
234 if (is8bit(imm32)) { | |
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235 emit_int8(op1 | 0x02); // set sign bit |
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236 emit_int8(op2 | encode(dst)); |
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237 emit_int8(imm32 & 0xFF); |
0 | 238 } else { |
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239 emit_int8(op1); |
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240 emit_int8(op2 | encode(dst)); |
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241 emit_int32(imm32); |
0 | 242 } |
243 } | |
244 | |
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245 // Force generation of a 4 byte immediate value even if it fits into 8bit |
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246 void Assembler::emit_arith_imm32(int op1, int op2, Register dst, int32_t imm32) { |
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247 assert(isByte(op1) && isByte(op2), "wrong opcode"); |
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248 assert((op1 & 0x01) == 1, "should be 32bit operation"); |
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249 assert((op1 & 0x02) == 0, "sign-extension bit should not be set"); |
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250 emit_int8(op1); |
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251 emit_int8(op2 | encode(dst)); |
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252 emit_int32(imm32); |
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253 } |
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254 |
0 | 255 // immediate-to-memory forms |
304 | 256 void Assembler::emit_arith_operand(int op1, Register rm, Address adr, int32_t imm32) { |
0 | 257 assert((op1 & 0x01) == 1, "should be 32bit operation"); |
258 assert((op1 & 0x02) == 0, "sign-extension bit should not be set"); | |
259 if (is8bit(imm32)) { | |
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260 emit_int8(op1 | 0x02); // set sign bit |
304 | 261 emit_operand(rm, adr, 1); |
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262 emit_int8(imm32 & 0xFF); |
0 | 263 } else { |
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264 emit_int8(op1); |
304 | 265 emit_operand(rm, adr, 4); |
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266 emit_int32(imm32); |
0 | 267 } |
268 } | |
269 | |
270 | |
271 void Assembler::emit_arith(int op1, int op2, Register dst, Register src) { | |
272 assert(isByte(op1) && isByte(op2), "wrong opcode"); | |
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273 emit_int8(op1); |
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274 emit_int8(op2 | encode(dst) << 3 | encode(src)); |
304 | 275 } |
276 | |
277 | |
278 void Assembler::emit_operand(Register reg, Register base, Register index, | |
279 Address::ScaleFactor scale, int disp, | |
280 RelocationHolder const& rspec, | |
281 int rip_relative_correction) { | |
0 | 282 relocInfo::relocType rtype = (relocInfo::relocType) rspec.type(); |
304 | 283 |
284 // Encode the registers as needed in the fields they are used in | |
285 | |
286 int regenc = encode(reg) << 3; | |
287 int indexenc = index->is_valid() ? encode(index) << 3 : 0; | |
288 int baseenc = base->is_valid() ? encode(base) : 0; | |
289 | |
0 | 290 if (base->is_valid()) { |
291 if (index->is_valid()) { | |
292 assert(scale != Address::no_scale, "inconsistent address"); | |
293 // [base + index*scale + disp] | |
304 | 294 if (disp == 0 && rtype == relocInfo::none && |
295 base != rbp LP64_ONLY(&& base != r13)) { | |
0 | 296 // [base + index*scale] |
297 // [00 reg 100][ss index base] | |
298 assert(index != rsp, "illegal addressing mode"); | |
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299 emit_int8(0x04 | regenc); |
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300 emit_int8(scale << 6 | indexenc | baseenc); |
0 | 301 } else if (is8bit(disp) && rtype == relocInfo::none) { |
302 // [base + index*scale + imm8] | |
303 // [01 reg 100][ss index base] imm8 | |
304 assert(index != rsp, "illegal addressing mode"); | |
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305 emit_int8(0x44 | regenc); |
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306 emit_int8(scale << 6 | indexenc | baseenc); |
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307 emit_int8(disp & 0xFF); |
0 | 308 } else { |
304 | 309 // [base + index*scale + disp32] |
310 // [10 reg 100][ss index base] disp32 | |
0 | 311 assert(index != rsp, "illegal addressing mode"); |
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312 emit_int8(0x84 | regenc); |
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313 emit_int8(scale << 6 | indexenc | baseenc); |
0 | 314 emit_data(disp, rspec, disp32_operand); |
315 } | |
304 | 316 } else if (base == rsp LP64_ONLY(|| base == r12)) { |
317 // [rsp + disp] | |
0 | 318 if (disp == 0 && rtype == relocInfo::none) { |
304 | 319 // [rsp] |
0 | 320 // [00 reg 100][00 100 100] |
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321 emit_int8(0x04 | regenc); |
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322 emit_int8(0x24); |
0 | 323 } else if (is8bit(disp) && rtype == relocInfo::none) { |
304 | 324 // [rsp + imm8] |
325 // [01 reg 100][00 100 100] disp8 | |
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326 emit_int8(0x44 | regenc); |
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327 emit_int8(0x24); |
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328 emit_int8(disp & 0xFF); |
0 | 329 } else { |
304 | 330 // [rsp + imm32] |
331 // [10 reg 100][00 100 100] disp32 | |
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332 emit_int8(0x84 | regenc); |
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333 emit_int8(0x24); |
0 | 334 emit_data(disp, rspec, disp32_operand); |
335 } | |
336 } else { | |
337 // [base + disp] | |
304 | 338 assert(base != rsp LP64_ONLY(&& base != r12), "illegal addressing mode"); |
339 if (disp == 0 && rtype == relocInfo::none && | |
340 base != rbp LP64_ONLY(&& base != r13)) { | |
0 | 341 // [base] |
342 // [00 reg base] | |
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343 emit_int8(0x00 | regenc | baseenc); |
0 | 344 } else if (is8bit(disp) && rtype == relocInfo::none) { |
304 | 345 // [base + disp8] |
346 // [01 reg base] disp8 | |
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347 emit_int8(0x40 | regenc | baseenc); |
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348 emit_int8(disp & 0xFF); |
0 | 349 } else { |
304 | 350 // [base + disp32] |
351 // [10 reg base] disp32 | |
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352 emit_int8(0x80 | regenc | baseenc); |
0 | 353 emit_data(disp, rspec, disp32_operand); |
354 } | |
355 } | |
356 } else { | |
357 if (index->is_valid()) { | |
358 assert(scale != Address::no_scale, "inconsistent address"); | |
359 // [index*scale + disp] | |
304 | 360 // [00 reg 100][ss index 101] disp32 |
0 | 361 assert(index != rsp, "illegal addressing mode"); |
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362 emit_int8(0x04 | regenc); |
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363 emit_int8(scale << 6 | indexenc | 0x05); |
0 | 364 emit_data(disp, rspec, disp32_operand); |
304 | 365 } else if (rtype != relocInfo::none ) { |
366 // [disp] (64bit) RIP-RELATIVE (32bit) abs | |
367 // [00 000 101] disp32 | |
368 | |
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369 emit_int8(0x05 | regenc); |
304 | 370 // Note that the RIP-rel. correction applies to the generated |
371 // disp field, but _not_ to the target address in the rspec. | |
372 | |
373 // disp was created by converting the target address minus the pc | |
374 // at the start of the instruction. That needs more correction here. | |
375 // intptr_t disp = target - next_ip; | |
376 assert(inst_mark() != NULL, "must be inside InstructionMark"); | |
377 address next_ip = pc() + sizeof(int32_t) + rip_relative_correction; | |
378 int64_t adjusted = disp; | |
379 // Do rip-rel adjustment for 64bit | |
380 LP64_ONLY(adjusted -= (next_ip - inst_mark())); | |
381 assert(is_simm32(adjusted), | |
382 "must be 32bit offset (RIP relative address)"); | |
383 emit_data((int32_t) adjusted, rspec, disp32_operand); | |
384 | |
0 | 385 } else { |
304 | 386 // 32bit never did this, did everything as the rip-rel/disp code above |
387 // [disp] ABSOLUTE | |
388 // [00 reg 100][00 100 101] disp32 | |
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389 emit_int8(0x04 | regenc); |
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390 emit_int8(0x25); |
0 | 391 emit_data(disp, rspec, disp32_operand); |
392 } | |
393 } | |
394 } | |
395 | |
304 | 396 void Assembler::emit_operand(XMMRegister reg, Register base, Register index, |
397 Address::ScaleFactor scale, int disp, | |
398 RelocationHolder const& rspec) { | |
399 emit_operand((Register)reg, base, index, scale, disp, rspec); | |
400 } | |
401 | |
0 | 402 // Secret local extension to Assembler::WhichOperand: |
403 #define end_pc_operand (_WhichOperand_limit) | |
404 | |
405 address Assembler::locate_operand(address inst, WhichOperand which) { | |
406 // Decode the given instruction, and return the address of | |
407 // an embedded 32-bit operand word. | |
408 | |
409 // If "which" is disp32_operand, selects the displacement portion | |
410 // of an effective address specifier. | |
304 | 411 // If "which" is imm64_operand, selects the trailing immediate constant. |
0 | 412 // If "which" is call32_operand, selects the displacement of a call or jump. |
413 // Caller is responsible for ensuring that there is such an operand, | |
304 | 414 // and that it is 32/64 bits wide. |
0 | 415 |
416 // If "which" is end_pc_operand, find the end of the instruction. | |
417 | |
418 address ip = inst; | |
304 | 419 bool is_64bit = false; |
420 | |
421 debug_only(bool has_disp32 = false); | |
422 int tail_size = 0; // other random bytes (#32, #16, etc.) at end of insn | |
423 | |
424 again_after_prefix: | |
0 | 425 switch (0xFF & *ip++) { |
426 | |
427 // These convenience macros generate groups of "case" labels for the switch. | |
304 | 428 #define REP4(x) (x)+0: case (x)+1: case (x)+2: case (x)+3 |
429 #define REP8(x) (x)+0: case (x)+1: case (x)+2: case (x)+3: \ | |
0 | 430 case (x)+4: case (x)+5: case (x)+6: case (x)+7 |
304 | 431 #define REP16(x) REP8((x)+0): \ |
0 | 432 case REP8((x)+8) |
433 | |
434 case CS_segment: | |
435 case SS_segment: | |
436 case DS_segment: | |
437 case ES_segment: | |
438 case FS_segment: | |
439 case GS_segment: | |
304 | 440 // Seems dubious |
441 LP64_ONLY(assert(false, "shouldn't have that prefix")); | |
0 | 442 assert(ip == inst+1, "only one prefix allowed"); |
443 goto again_after_prefix; | |
444 | |
304 | 445 case 0x67: |
446 case REX: | |
447 case REX_B: | |
448 case REX_X: | |
449 case REX_XB: | |
450 case REX_R: | |
451 case REX_RB: | |
452 case REX_RX: | |
453 case REX_RXB: | |
454 NOT_LP64(assert(false, "64bit prefixes")); | |
455 goto again_after_prefix; | |
456 | |
457 case REX_W: | |
458 case REX_WB: | |
459 case REX_WX: | |
460 case REX_WXB: | |
461 case REX_WR: | |
462 case REX_WRB: | |
463 case REX_WRX: | |
464 case REX_WRXB: | |
465 NOT_LP64(assert(false, "64bit prefixes")); | |
466 is_64bit = true; | |
467 goto again_after_prefix; | |
468 | |
469 case 0xFF: // pushq a; decl a; incl a; call a; jmp a | |
0 | 470 case 0x88: // movb a, r |
471 case 0x89: // movl a, r | |
472 case 0x8A: // movb r, a | |
473 case 0x8B: // movl r, a | |
474 case 0x8F: // popl a | |
304 | 475 debug_only(has_disp32 = true); |
0 | 476 break; |
477 | |
304 | 478 case 0x68: // pushq #32 |
479 if (which == end_pc_operand) { | |
480 return ip + 4; | |
481 } | |
482 assert(which == imm_operand && !is_64bit, "pushl has no disp32 or 64bit immediate"); | |
0 | 483 return ip; // not produced by emit_operand |
484 | |
485 case 0x66: // movw ... (size prefix) | |
304 | 486 again_after_size_prefix2: |
0 | 487 switch (0xFF & *ip++) { |
304 | 488 case REX: |
489 case REX_B: | |
490 case REX_X: | |
491 case REX_XB: | |
492 case REX_R: | |
493 case REX_RB: | |
494 case REX_RX: | |
495 case REX_RXB: | |
496 case REX_W: | |
497 case REX_WB: | |
498 case REX_WX: | |
499 case REX_WXB: | |
500 case REX_WR: | |
501 case REX_WRB: | |
502 case REX_WRX: | |
503 case REX_WRXB: | |
504 NOT_LP64(assert(false, "64bit prefix found")); | |
505 goto again_after_size_prefix2; | |
0 | 506 case 0x8B: // movw r, a |
507 case 0x89: // movw a, r | |
304 | 508 debug_only(has_disp32 = true); |
0 | 509 break; |
510 case 0xC7: // movw a, #16 | |
304 | 511 debug_only(has_disp32 = true); |
0 | 512 tail_size = 2; // the imm16 |
513 break; | |
514 case 0x0F: // several SSE/SSE2 variants | |
515 ip--; // reparse the 0x0F | |
516 goto again_after_prefix; | |
517 default: | |
518 ShouldNotReachHere(); | |
519 } | |
520 break; | |
521 | |
304 | 522 case REP8(0xB8): // movl/q r, #32/#64(oop?) |
523 if (which == end_pc_operand) return ip + (is_64bit ? 8 : 4); | |
524 // these asserts are somewhat nonsensical | |
525 #ifndef _LP64 | |
5984 | 526 assert(which == imm_operand || which == disp32_operand, |
527 err_msg("which %d is_64_bit %d ip " INTPTR_FORMAT, which, is_64bit, ip)); | |
304 | 528 #else |
529 assert((which == call32_operand || which == imm_operand) && is_64bit || | |
5984 | 530 which == narrow_oop_operand && !is_64bit, |
531 err_msg("which %d is_64_bit %d ip " INTPTR_FORMAT, which, is_64bit, ip)); | |
304 | 532 #endif // _LP64 |
0 | 533 return ip; |
534 | |
535 case 0x69: // imul r, a, #32 | |
536 case 0xC7: // movl a, #32(oop?) | |
537 tail_size = 4; | |
304 | 538 debug_only(has_disp32 = true); // has both kinds of operands! |
0 | 539 break; |
540 | |
541 case 0x0F: // movx..., etc. | |
542 switch (0xFF & *ip++) { | |
4759 | 543 case 0x3A: // pcmpestri |
544 tail_size = 1; | |
545 case 0x38: // ptest, pmovzxbw | |
546 ip++; // skip opcode | |
547 debug_only(has_disp32 = true); // has both kinds of operands! | |
548 break; | |
549 | |
550 case 0x70: // pshufd r, r/a, #8 | |
551 debug_only(has_disp32 = true); // has both kinds of operands! | |
552 case 0x73: // psrldq r, #8 | |
553 tail_size = 1; | |
554 break; | |
555 | |
0 | 556 case 0x12: // movlps |
557 case 0x28: // movaps | |
558 case 0x2E: // ucomiss | |
559 case 0x2F: // comiss | |
560 case 0x54: // andps | |
561 case 0x55: // andnps | |
562 case 0x56: // orps | |
563 case 0x57: // xorps | |
564 case 0x6E: // movd | |
565 case 0x7E: // movd | |
4759 | 566 case 0xAE: // ldmxcsr, stmxcsr, fxrstor, fxsave, clflush |
304 | 567 debug_only(has_disp32 = true); |
0 | 568 break; |
569 | |
570 case 0xAD: // shrd r, a, %cl | |
571 case 0xAF: // imul r, a | |
304 | 572 case 0xBE: // movsbl r, a (movsxb) |
573 case 0xBF: // movswl r, a (movsxw) | |
574 case 0xB6: // movzbl r, a (movzxb) | |
575 case 0xB7: // movzwl r, a (movzxw) | |
0 | 576 case REP16(0x40): // cmovl cc, r, a |
577 case 0xB0: // cmpxchgb | |
578 case 0xB1: // cmpxchg | |
579 case 0xC1: // xaddl | |
580 case 0xC7: // cmpxchg8 | |
581 case REP16(0x90): // setcc a | |
304 | 582 debug_only(has_disp32 = true); |
0 | 583 // fall out of the switch to decode the address |
584 break; | |
304 | 585 |
4759 | 586 case 0xC4: // pinsrw r, a, #8 |
587 debug_only(has_disp32 = true); | |
588 case 0xC5: // pextrw r, r, #8 | |
589 tail_size = 1; // the imm8 | |
590 break; | |
591 | |
0 | 592 case 0xAC: // shrd r, a, #8 |
304 | 593 debug_only(has_disp32 = true); |
0 | 594 tail_size = 1; // the imm8 |
595 break; | |
304 | 596 |
0 | 597 case REP16(0x80): // jcc rdisp32 |
598 if (which == end_pc_operand) return ip + 4; | |
304 | 599 assert(which == call32_operand, "jcc has no disp32 or imm"); |
0 | 600 return ip; |
601 default: | |
602 ShouldNotReachHere(); | |
603 } | |
604 break; | |
605 | |
606 case 0x81: // addl a, #32; addl r, #32 | |
607 // also: orl, adcl, sbbl, andl, subl, xorl, cmpl | |
304 | 608 // on 32bit in the case of cmpl, the imm might be an oop |
0 | 609 tail_size = 4; |
304 | 610 debug_only(has_disp32 = true); // has both kinds of operands! |
0 | 611 break; |
612 | |
613 case 0x83: // addl a, #8; addl r, #8 | |
614 // also: orl, adcl, sbbl, andl, subl, xorl, cmpl | |
304 | 615 debug_only(has_disp32 = true); // has both kinds of operands! |
0 | 616 tail_size = 1; |
617 break; | |
618 | |
619 case 0x9B: | |
620 switch (0xFF & *ip++) { | |
621 case 0xD9: // fnstcw a | |
304 | 622 debug_only(has_disp32 = true); |
0 | 623 break; |
624 default: | |
625 ShouldNotReachHere(); | |
626 } | |
627 break; | |
628 | |
629 case REP4(0x00): // addb a, r; addl a, r; addb r, a; addl r, a | |
630 case REP4(0x10): // adc... | |
631 case REP4(0x20): // and... | |
632 case REP4(0x30): // xor... | |
633 case REP4(0x08): // or... | |
634 case REP4(0x18): // sbb... | |
635 case REP4(0x28): // sub... | |
304 | 636 case 0xF7: // mull a |
637 case 0x8D: // lea r, a | |
638 case 0x87: // xchg r, a | |
0 | 639 case REP4(0x38): // cmp... |
304 | 640 case 0x85: // test r, a |
641 debug_only(has_disp32 = true); // has both kinds of operands! | |
0 | 642 break; |
643 | |
644 case 0xC1: // sal a, #8; sar a, #8; shl a, #8; shr a, #8 | |
645 case 0xC6: // movb a, #8 | |
646 case 0x80: // cmpb a, #8 | |
647 case 0x6B: // imul r, a, #8 | |
304 | 648 debug_only(has_disp32 = true); // has both kinds of operands! |
0 | 649 tail_size = 1; // the imm8 |
650 break; | |
651 | |
4759 | 652 case 0xC4: // VEX_3bytes |
653 case 0xC5: // VEX_2bytes | |
654 assert((UseAVX > 0), "shouldn't have VEX prefix"); | |
655 assert(ip == inst+1, "no prefixes allowed"); | |
656 // C4 and C5 are also used as opcodes for PINSRW and PEXTRW instructions | |
657 // but they have prefix 0x0F and processed when 0x0F processed above. | |
658 // | |
659 // In 32-bit mode the VEX first byte C4 and C5 alias onto LDS and LES | |
660 // instructions (these instructions are not supported in 64-bit mode). | |
661 // To distinguish them bits [7:6] are set in the VEX second byte since | |
662 // ModRM byte can not be of the form 11xxxxxx in 32-bit mode. To set | |
663 // those VEX bits REX and vvvv bits are inverted. | |
664 // | |
665 // Fortunately C2 doesn't generate these instructions so we don't need | |
666 // to check for them in product version. | |
667 | |
668 // Check second byte | |
669 NOT_LP64(assert((0xC0 & *ip) == 0xC0, "shouldn't have LDS and LES instructions")); | |
670 | |
671 // First byte | |
672 if ((0xFF & *inst) == VEX_3bytes) { | |
673 ip++; // third byte | |
674 is_64bit = ((VEX_W & *ip) == VEX_W); | |
675 } | |
676 ip++; // opcode | |
677 // To find the end of instruction (which == end_pc_operand). | |
678 switch (0xFF & *ip) { | |
679 case 0x61: // pcmpestri r, r/a, #8 | |
680 case 0x70: // pshufd r, r/a, #8 | |
681 case 0x73: // psrldq r, #8 | |
682 tail_size = 1; // the imm8 | |
683 break; | |
684 default: | |
685 break; | |
686 } | |
687 ip++; // skip opcode | |
688 debug_only(has_disp32 = true); // has both kinds of operands! | |
689 break; | |
0 | 690 |
691 case 0xD1: // sal a, 1; sar a, 1; shl a, 1; shr a, 1 | |
692 case 0xD3: // sal a, %cl; sar a, %cl; shl a, %cl; shr a, %cl | |
693 case 0xD9: // fld_s a; fst_s a; fstp_s a; fldcw a | |
694 case 0xDD: // fld_d a; fst_d a; fstp_d a | |
695 case 0xDB: // fild_s a; fistp_s a; fld_x a; fstp_x a | |
696 case 0xDF: // fild_d a; fistp_d a | |
697 case 0xD8: // fadd_s a; fsubr_s a; fmul_s a; fdivr_s a; fcomp_s a | |
698 case 0xDC: // fadd_d a; fsubr_d a; fmul_d a; fdivr_d a; fcomp_d a | |
699 case 0xDE: // faddp_d a; fsubrp_d a; fmulp_d a; fdivrp_d a; fcompp_d a | |
304 | 700 debug_only(has_disp32 = true); |
0 | 701 break; |
702 | |
4759 | 703 case 0xE8: // call rdisp32 |
704 case 0xE9: // jmp rdisp32 | |
705 if (which == end_pc_operand) return ip + 4; | |
706 assert(which == call32_operand, "call has no disp32 or imm"); | |
707 return ip; | |
708 | |
420
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709 case 0xF0: // Lock |
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710 assert(os::is_MP(), "only on MP"); |
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711 goto again_after_prefix; |
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712 |
0 | 713 case 0xF3: // For SSE |
714 case 0xF2: // For SSE2 | |
304 | 715 switch (0xFF & *ip++) { |
716 case REX: | |
717 case REX_B: | |
718 case REX_X: | |
719 case REX_XB: | |
720 case REX_R: | |
721 case REX_RB: | |
722 case REX_RX: | |
723 case REX_RXB: | |
724 case REX_W: | |
725 case REX_WB: | |
726 case REX_WX: | |
727 case REX_WXB: | |
728 case REX_WR: | |
729 case REX_WRB: | |
730 case REX_WRX: | |
731 case REX_WRXB: | |
732 NOT_LP64(assert(false, "found 64bit prefix")); | |
733 ip++; | |
734 default: | |
735 ip++; | |
736 } | |
737 debug_only(has_disp32 = true); // has both kinds of operands! | |
0 | 738 break; |
739 | |
740 default: | |
741 ShouldNotReachHere(); | |
742 | |
304 | 743 #undef REP8 |
744 #undef REP16 | |
0 | 745 } |
746 | |
747 assert(which != call32_operand, "instruction is not a call, jmp, or jcc"); | |
304 | 748 #ifdef _LP64 |
749 assert(which != imm_operand, "instruction is not a movq reg, imm64"); | |
750 #else | |
751 // assert(which != imm_operand || has_imm32, "instruction has no imm32 field"); | |
752 assert(which != imm_operand || has_disp32, "instruction has no imm32 field"); | |
753 #endif // LP64 | |
754 assert(which != disp32_operand || has_disp32, "instruction has no disp32 field"); | |
0 | 755 |
756 // parse the output of emit_operand | |
757 int op2 = 0xFF & *ip++; | |
758 int base = op2 & 0x07; | |
759 int op3 = -1; | |
760 const int b100 = 4; | |
761 const int b101 = 5; | |
762 if (base == b100 && (op2 >> 6) != 3) { | |
763 op3 = 0xFF & *ip++; | |
764 base = op3 & 0x07; // refetch the base | |
765 } | |
766 // now ip points at the disp (if any) | |
767 | |
768 switch (op2 >> 6) { | |
769 case 0: | |
770 // [00 reg 100][ss index base] | |
304 | 771 // [00 reg 100][00 100 esp] |
0 | 772 // [00 reg base] |
773 // [00 reg 100][ss index 101][disp32] | |
774 // [00 reg 101] [disp32] | |
775 | |
776 if (base == b101) { | |
777 if (which == disp32_operand) | |
778 return ip; // caller wants the disp32 | |
779 ip += 4; // skip the disp32 | |
780 } | |
781 break; | |
782 | |
783 case 1: | |
784 // [01 reg 100][ss index base][disp8] | |
304 | 785 // [01 reg 100][00 100 esp][disp8] |
0 | 786 // [01 reg base] [disp8] |
787 ip += 1; // skip the disp8 | |
788 break; | |
789 | |
790 case 2: | |
791 // [10 reg 100][ss index base][disp32] | |
304 | 792 // [10 reg 100][00 100 esp][disp32] |
0 | 793 // [10 reg base] [disp32] |
794 if (which == disp32_operand) | |
795 return ip; // caller wants the disp32 | |
796 ip += 4; // skip the disp32 | |
797 break; | |
798 | |
799 case 3: | |
800 // [11 reg base] (not a memory addressing mode) | |
801 break; | |
802 } | |
803 | |
804 if (which == end_pc_operand) { | |
805 return ip + tail_size; | |
806 } | |
807 | |
304 | 808 #ifdef _LP64 |
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809 assert(which == narrow_oop_operand && !is_64bit, "instruction is not a movl adr, imm32"); |
304 | 810 #else |
811 assert(which == imm_operand, "instruction has only an imm field"); | |
812 #endif // LP64 | |
0 | 813 return ip; |
814 } | |
815 | |
816 address Assembler::locate_next_instruction(address inst) { | |
817 // Secretly share code with locate_operand: | |
818 return locate_operand(inst, end_pc_operand); | |
819 } | |
820 | |
821 | |
822 #ifdef ASSERT | |
823 void Assembler::check_relocation(RelocationHolder const& rspec, int format) { | |
824 address inst = inst_mark(); | |
825 assert(inst != NULL && inst < pc(), "must point to beginning of instruction"); | |
826 address opnd; | |
827 | |
828 Relocation* r = rspec.reloc(); | |
829 if (r->type() == relocInfo::none) { | |
830 return; | |
831 } else if (r->is_call() || format == call32_operand) { | |
832 // assert(format == imm32_operand, "cannot specify a nonzero format"); | |
833 opnd = locate_operand(inst, call32_operand); | |
834 } else if (r->is_data()) { | |
304 | 835 assert(format == imm_operand || format == disp32_operand |
836 LP64_ONLY(|| format == narrow_oop_operand), "format ok"); | |
0 | 837 opnd = locate_operand(inst, (WhichOperand)format); |
838 } else { | |
304 | 839 assert(format == imm_operand, "cannot specify a format"); |
0 | 840 return; |
841 } | |
842 assert(opnd == pc(), "must put operand where relocs can find it"); | |
843 } | |
304 | 844 #endif // ASSERT |
845 | |
846 void Assembler::emit_operand32(Register reg, Address adr) { | |
847 assert(reg->encoding() < 8, "no extended registers"); | |
848 assert(!adr.base_needs_rex() && !adr.index_needs_rex(), "no extended registers"); | |
849 emit_operand(reg, adr._base, adr._index, adr._scale, adr._disp, | |
850 adr._rspec); | |
851 } | |
852 | |
853 void Assembler::emit_operand(Register reg, Address adr, | |
854 int rip_relative_correction) { | |
855 emit_operand(reg, adr._base, adr._index, adr._scale, adr._disp, | |
856 adr._rspec, | |
857 rip_relative_correction); | |
858 } | |
859 | |
860 void Assembler::emit_operand(XMMRegister reg, Address adr) { | |
861 emit_operand(reg, adr._base, adr._index, adr._scale, adr._disp, | |
862 adr._rspec); | |
863 } | |
864 | |
865 // MMX operations | |
866 void Assembler::emit_operand(MMXRegister reg, Address adr) { | |
867 assert(!adr.base_needs_rex() && !adr.index_needs_rex(), "no extended registers"); | |
868 emit_operand((Register)reg, adr._base, adr._index, adr._scale, adr._disp, adr._rspec); | |
869 } | |
870 | |
871 // work around gcc (3.2.1-7a) bug | |
872 void Assembler::emit_operand(Address adr, MMXRegister reg) { | |
873 assert(!adr.base_needs_rex() && !adr.index_needs_rex(), "no extended registers"); | |
874 emit_operand((Register)reg, adr._base, adr._index, adr._scale, adr._disp, adr._rspec); | |
0 | 875 } |
876 | |
877 | |
878 void Assembler::emit_farith(int b1, int b2, int i) { | |
879 assert(isByte(b1) && isByte(b2), "wrong opcode"); | |
880 assert(0 <= i && i < 8, "illegal stack offset"); | |
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881 emit_int8(b1); |
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882 emit_int8(b2 + i); |
0 | 883 } |
884 | |
885 | |
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886 // Now the Assembler instructions (identical for 32/64 bits) |
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887 |
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888 void Assembler::adcl(Address dst, int32_t imm32) { |
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889 InstructionMark im(this); |
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890 prefix(dst); |
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891 emit_arith_operand(0x81, rdx, dst, imm32); |
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892 } |
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893 |
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894 void Assembler::adcl(Address dst, Register src) { |
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895 InstructionMark im(this); |
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896 prefix(dst, src); |
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897 emit_int8(0x11); |
2100
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898 emit_operand(src, dst); |
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899 } |
304 | 900 |
901 void Assembler::adcl(Register dst, int32_t imm32) { | |
902 prefix(dst); | |
0 | 903 emit_arith(0x81, 0xD0, dst, imm32); |
904 } | |
905 | |
906 void Assembler::adcl(Register dst, Address src) { | |
907 InstructionMark im(this); | |
304 | 908 prefix(src, dst); |
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909 emit_int8(0x13); |
0 | 910 emit_operand(dst, src); |
911 } | |
912 | |
913 void Assembler::adcl(Register dst, Register src) { | |
304 | 914 (void) prefix_and_encode(dst->encoding(), src->encoding()); |
0 | 915 emit_arith(0x13, 0xC0, dst, src); |
916 } | |
917 | |
304 | 918 void Assembler::addl(Address dst, int32_t imm32) { |
919 InstructionMark im(this); | |
920 prefix(dst); | |
921 emit_arith_operand(0x81, rax, dst, imm32); | |
922 } | |
0 | 923 |
924 void Assembler::addl(Address dst, Register src) { | |
925 InstructionMark im(this); | |
304 | 926 prefix(dst, src); |
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927 emit_int8(0x01); |
0 | 928 emit_operand(src, dst); |
929 } | |
930 | |
304 | 931 void Assembler::addl(Register dst, int32_t imm32) { |
932 prefix(dst); | |
0 | 933 emit_arith(0x81, 0xC0, dst, imm32); |
934 } | |
935 | |
936 void Assembler::addl(Register dst, Address src) { | |
937 InstructionMark im(this); | |
304 | 938 prefix(src, dst); |
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939 emit_int8(0x03); |
0 | 940 emit_operand(dst, src); |
941 } | |
942 | |
943 void Assembler::addl(Register dst, Register src) { | |
304 | 944 (void) prefix_and_encode(dst->encoding(), src->encoding()); |
0 | 945 emit_arith(0x03, 0xC0, dst, src); |
946 } | |
947 | |
948 void Assembler::addr_nop_4() { | |
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949 assert(UseAddressNop, "no CPU support"); |
0 | 950 // 4 bytes: NOP DWORD PTR [EAX+0] |
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951 emit_int8(0x0F); |
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952 emit_int8(0x1F); |
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953 emit_int8(0x40); // emit_rm(cbuf, 0x1, EAX_enc, EAX_enc); |
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954 emit_int8(0); // 8-bits offset (1 byte) |
0 | 955 } |
956 | |
957 void Assembler::addr_nop_5() { | |
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958 assert(UseAddressNop, "no CPU support"); |
0 | 959 // 5 bytes: NOP DWORD PTR [EAX+EAX*0+0] 8-bits offset |
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960 emit_int8(0x0F); |
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961 emit_int8(0x1F); |
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962 emit_int8(0x44); // emit_rm(cbuf, 0x1, EAX_enc, 0x4); |
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963 emit_int8(0x00); // emit_rm(cbuf, 0x0, EAX_enc, EAX_enc); |
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964 emit_int8(0); // 8-bits offset (1 byte) |
0 | 965 } |
966 | |
967 void Assembler::addr_nop_7() { | |
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968 assert(UseAddressNop, "no CPU support"); |
0 | 969 // 7 bytes: NOP DWORD PTR [EAX+0] 32-bits offset |
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970 emit_int8(0x0F); |
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971 emit_int8(0x1F); |
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972 emit_int8((unsigned char)0x80); |
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973 // emit_rm(cbuf, 0x2, EAX_enc, EAX_enc); |
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974 emit_int32(0); // 32-bits offset (4 bytes) |
0 | 975 } |
976 | |
977 void Assembler::addr_nop_8() { | |
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978 assert(UseAddressNop, "no CPU support"); |
0 | 979 // 8 bytes: NOP DWORD PTR [EAX+EAX*0+0] 32-bits offset |
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980 emit_int8(0x0F); |
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981 emit_int8(0x1F); |
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982 emit_int8((unsigned char)0x84); |
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983 // emit_rm(cbuf, 0x2, EAX_enc, 0x4); |
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984 emit_int8(0x00); // emit_rm(cbuf, 0x0, EAX_enc, EAX_enc); |
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985 emit_int32(0); // 32-bits offset (4 bytes) |
0 | 986 } |
987 | |
304 | 988 void Assembler::addsd(XMMRegister dst, XMMRegister src) { |
989 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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990 emit_simd_arith(0x58, dst, src, VEX_SIMD_F2); |
304 | 991 } |
992 | |
993 void Assembler::addsd(XMMRegister dst, Address src) { | |
994 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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995 emit_simd_arith(0x58, dst, src, VEX_SIMD_F2); |
304 | 996 } |
997 | |
998 void Assembler::addss(XMMRegister dst, XMMRegister src) { | |
999 NOT_LP64(assert(VM_Version::supports_sse(), "")); | |
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1000 emit_simd_arith(0x58, dst, src, VEX_SIMD_F3); |
304 | 1001 } |
1002 | |
1003 void Assembler::addss(XMMRegister dst, Address src) { | |
1004 NOT_LP64(assert(VM_Version::supports_sse(), "")); | |
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1005 emit_simd_arith(0x58, dst, src, VEX_SIMD_F3); |
304 | 1006 } |
1007 | |
6894 | 1008 void Assembler::aesdec(XMMRegister dst, Address src) { |
1009 assert(VM_Version::supports_aes(), ""); | |
1010 InstructionMark im(this); | |
1011 simd_prefix(dst, dst, src, VEX_SIMD_66, VEX_OPCODE_0F_38); | |
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1012 emit_int8((unsigned char)0xDE); |
6894 | 1013 emit_operand(dst, src); |
1014 } | |
1015 | |
1016 void Assembler::aesdec(XMMRegister dst, XMMRegister src) { | |
1017 assert(VM_Version::supports_aes(), ""); | |
1018 int encode = simd_prefix_and_encode(dst, dst, src, VEX_SIMD_66, VEX_OPCODE_0F_38); | |
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1019 emit_int8((unsigned char)0xDE); |
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1020 emit_int8(0xC0 | encode); |
6894 | 1021 } |
1022 | |
1023 void Assembler::aesdeclast(XMMRegister dst, Address src) { | |
1024 assert(VM_Version::supports_aes(), ""); | |
1025 InstructionMark im(this); | |
1026 simd_prefix(dst, dst, src, VEX_SIMD_66, VEX_OPCODE_0F_38); | |
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1027 emit_int8((unsigned char)0xDF); |
6894 | 1028 emit_operand(dst, src); |
1029 } | |
1030 | |
1031 void Assembler::aesdeclast(XMMRegister dst, XMMRegister src) { | |
1032 assert(VM_Version::supports_aes(), ""); | |
1033 int encode = simd_prefix_and_encode(dst, dst, src, VEX_SIMD_66, VEX_OPCODE_0F_38); | |
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1034 emit_int8((unsigned char)0xDF); |
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1035 emit_int8((unsigned char)(0xC0 | encode)); |
6894 | 1036 } |
1037 | |
1038 void Assembler::aesenc(XMMRegister dst, Address src) { | |
1039 assert(VM_Version::supports_aes(), ""); | |
1040 InstructionMark im(this); | |
1041 simd_prefix(dst, dst, src, VEX_SIMD_66, VEX_OPCODE_0F_38); | |
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1042 emit_int8((unsigned char)0xDC); |
6894 | 1043 emit_operand(dst, src); |
1044 } | |
1045 | |
1046 void Assembler::aesenc(XMMRegister dst, XMMRegister src) { | |
1047 assert(VM_Version::supports_aes(), ""); | |
1048 int encode = simd_prefix_and_encode(dst, dst, src, VEX_SIMD_66, VEX_OPCODE_0F_38); | |
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1049 emit_int8((unsigned char)0xDC); |
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1050 emit_int8(0xC0 | encode); |
6894 | 1051 } |
1052 | |
1053 void Assembler::aesenclast(XMMRegister dst, Address src) { | |
1054 assert(VM_Version::supports_aes(), ""); | |
1055 InstructionMark im(this); | |
1056 simd_prefix(dst, dst, src, VEX_SIMD_66, VEX_OPCODE_0F_38); | |
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1057 emit_int8((unsigned char)0xDD); |
6894 | 1058 emit_operand(dst, src); |
1059 } | |
1060 | |
1061 void Assembler::aesenclast(XMMRegister dst, XMMRegister src) { | |
1062 assert(VM_Version::supports_aes(), ""); | |
1063 int encode = simd_prefix_and_encode(dst, dst, src, VEX_SIMD_66, VEX_OPCODE_0F_38); | |
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1064 emit_int8((unsigned char)0xDD); |
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1065 emit_int8((unsigned char)(0xC0 | encode)); |
6894 | 1066 } |
1067 | |
1068 | |
4759 | 1069 void Assembler::andl(Address dst, int32_t imm32) { |
1070 InstructionMark im(this); | |
1071 prefix(dst); | |
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1072 emit_int8((unsigned char)0x81); |
4759 | 1073 emit_operand(rsp, dst, 4); |
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1074 emit_int32(imm32); |
4759 | 1075 } |
1076 | |
304 | 1077 void Assembler::andl(Register dst, int32_t imm32) { |
1078 prefix(dst); | |
1079 emit_arith(0x81, 0xE0, dst, imm32); | |
1080 } | |
1081 | |
1082 void Assembler::andl(Register dst, Address src) { | |
1083 InstructionMark im(this); | |
1084 prefix(src, dst); | |
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1085 emit_int8(0x23); |
304 | 1086 emit_operand(dst, src); |
1087 } | |
1088 | |
1089 void Assembler::andl(Register dst, Register src) { | |
1090 (void) prefix_and_encode(dst->encoding(), src->encoding()); | |
1091 emit_arith(0x23, 0xC0, dst, src); | |
1092 } | |
1093 | |
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1094 void Assembler::bsfl(Register dst, Register src) { |
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1095 int encode = prefix_and_encode(dst->encoding(), src->encoding()); |
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1096 emit_int8(0x0F); |
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1097 emit_int8((unsigned char)0xBC); |
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1098 emit_int8((unsigned char)(0xC0 | encode)); |
775
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1099 } |
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1100 |
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1101 void Assembler::bsrl(Register dst, Register src) { |
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1102 assert(!VM_Version::supports_lzcnt(), "encoding is treated as LZCNT"); |
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1103 int encode = prefix_and_encode(dst->encoding(), src->encoding()); |
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1104 emit_int8(0x0F); |
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1105 emit_int8((unsigned char)0xBD); |
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1106 emit_int8((unsigned char)(0xC0 | encode)); |
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1107 } |
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1108 |
304 | 1109 void Assembler::bswapl(Register reg) { // bswap |
1110 int encode = prefix_and_encode(reg->encoding()); | |
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1111 emit_int8(0x0F); |
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1112 emit_int8((unsigned char)(0xC8 | encode)); |
304 | 1113 } |
1114 | |
1115 void Assembler::call(Label& L, relocInfo::relocType rtype) { | |
1116 // suspect disp32 is always good | |
1117 int operand = LP64_ONLY(disp32_operand) NOT_LP64(imm_operand); | |
1118 | |
1119 if (L.is_bound()) { | |
1120 const int long_size = 5; | |
1121 int offs = (int)( target(L) - pc() ); | |
1122 assert(offs <= 0, "assembler error"); | |
1123 InstructionMark im(this); | |
1124 // 1110 1000 #32-bit disp | |
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1125 emit_int8((unsigned char)0xE8); |
304 | 1126 emit_data(offs - long_size, rtype, operand); |
1127 } else { | |
1128 InstructionMark im(this); | |
1129 // 1110 1000 #32-bit disp | |
1130 L.add_patch_at(code(), locator()); | |
1131 | |
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1132 emit_int8((unsigned char)0xE8); |
304 | 1133 emit_data(int(0), rtype, operand); |
1134 } | |
1135 } | |
1136 | |
1137 void Assembler::call(Register dst) { | |
4759 | 1138 int encode = prefix_and_encode(dst->encoding()); |
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1139 emit_int8((unsigned char)0xFF); |
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1140 emit_int8((unsigned char)(0xD0 | encode)); |
304 | 1141 } |
1142 | |
1143 | |
1144 void Assembler::call(Address adr) { | |
1145 InstructionMark im(this); | |
1146 prefix(adr); | |
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1147 emit_int8((unsigned char)0xFF); |
304 | 1148 emit_operand(rdx, adr); |
1149 } | |
1150 | |
1151 void Assembler::call_literal(address entry, RelocationHolder const& rspec) { | |
1152 assert(entry != NULL, "call most probably wrong"); | |
1153 InstructionMark im(this); | |
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1154 emit_int8((unsigned char)0xE8); |
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1155 intptr_t disp = entry - (pc() + sizeof(int32_t)); |
304 | 1156 assert(is_simm32(disp), "must be 32bit offset (call2)"); |
1157 // Technically, should use call32_operand, but this format is | |
1158 // implied by the fact that we're emitting a call instruction. | |
1159 | |
1160 int operand = LP64_ONLY(disp32_operand) NOT_LP64(call32_operand); | |
1161 emit_data((int) disp, rspec, operand); | |
1162 } | |
1163 | |
1164 void Assembler::cdql() { | |
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1165 emit_int8((unsigned char)0x99); |
304 | 1166 } |
1167 | |
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1168 void Assembler::cld() { |
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1169 emit_int8((unsigned char)0xFC); |
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1170 } |
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1171 |
304 | 1172 void Assembler::cmovl(Condition cc, Register dst, Register src) { |
1173 NOT_LP64(guarantee(VM_Version::supports_cmov(), "illegal instruction")); | |
1174 int encode = prefix_and_encode(dst->encoding(), src->encoding()); | |
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1175 emit_int8(0x0F); |
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1176 emit_int8(0x40 | cc); |
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1177 emit_int8((unsigned char)(0xC0 | encode)); |
304 | 1178 } |
1179 | |
1180 | |
1181 void Assembler::cmovl(Condition cc, Register dst, Address src) { | |
1182 NOT_LP64(guarantee(VM_Version::supports_cmov(), "illegal instruction")); | |
1183 prefix(src, dst); | |
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1184 emit_int8(0x0F); |
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1185 emit_int8(0x40 | cc); |
304 | 1186 emit_operand(dst, src); |
1187 } | |
1188 | |
1189 void Assembler::cmpb(Address dst, int imm8) { | |
1190 InstructionMark im(this); | |
1191 prefix(dst); | |
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1192 emit_int8((unsigned char)0x80); |
304 | 1193 emit_operand(rdi, dst, 1); |
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1194 emit_int8(imm8); |
304 | 1195 } |
1196 | |
1197 void Assembler::cmpl(Address dst, int32_t imm32) { | |
1198 InstructionMark im(this); | |
1199 prefix(dst); | |
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1200 emit_int8((unsigned char)0x81); |
304 | 1201 emit_operand(rdi, dst, 4); |
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1202 emit_int32(imm32); |
304 | 1203 } |
1204 | |
1205 void Assembler::cmpl(Register dst, int32_t imm32) { | |
1206 prefix(dst); | |
1207 emit_arith(0x81, 0xF8, dst, imm32); | |
1208 } | |
1209 | |
1210 void Assembler::cmpl(Register dst, Register src) { | |
1211 (void) prefix_and_encode(dst->encoding(), src->encoding()); | |
1212 emit_arith(0x3B, 0xC0, dst, src); | |
1213 } | |
1214 | |
1215 | |
1216 void Assembler::cmpl(Register dst, Address src) { | |
1217 InstructionMark im(this); | |
1218 prefix(src, dst); | |
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1219 emit_int8((unsigned char)0x3B); |
304 | 1220 emit_operand(dst, src); |
1221 } | |
1222 | |
1223 void Assembler::cmpw(Address dst, int imm16) { | |
1224 InstructionMark im(this); | |
1225 assert(!dst.base_needs_rex() && !dst.index_needs_rex(), "no extended registers"); | |
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1226 emit_int8(0x66); |
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1227 emit_int8((unsigned char)0x81); |
304 | 1228 emit_operand(rdi, dst, 2); |
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1229 emit_int16(imm16); |
304 | 1230 } |
1231 | |
1232 // The 32-bit cmpxchg compares the value at adr with the contents of rax, | |
1233 // and stores reg into adr if so; otherwise, the value at adr is loaded into rax,. | |
1234 // The ZF is set if the compared values were equal, and cleared otherwise. | |
1235 void Assembler::cmpxchgl(Register reg, Address adr) { // cmpxchg | |
6834 | 1236 InstructionMark im(this); |
1237 prefix(adr, reg); | |
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1238 emit_int8(0x0F); |
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1239 emit_int8((unsigned char)0xB1); |
6834 | 1240 emit_operand(reg, adr); |
304 | 1241 } |
1242 | |
1243 void Assembler::comisd(XMMRegister dst, Address src) { | |
1244 // NOTE: dbx seems to decode this as comiss even though the | |
1245 // 0x66 is there. Strangly ucomisd comes out correct | |
1246 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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1247 emit_simd_arith_nonds(0x2F, dst, src, VEX_SIMD_66); |
4759 | 1248 } |
1249 | |
1250 void Assembler::comisd(XMMRegister dst, XMMRegister src) { | |
1251 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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1252 emit_simd_arith_nonds(0x2F, dst, src, VEX_SIMD_66); |
304 | 1253 } |
1254 | |
1255 void Assembler::comiss(XMMRegister dst, Address src) { | |
1256 NOT_LP64(assert(VM_Version::supports_sse(), "")); | |
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1257 emit_simd_arith_nonds(0x2F, dst, src, VEX_SIMD_NONE); |
304 | 1258 } |
1259 | |
4759 | 1260 void Assembler::comiss(XMMRegister dst, XMMRegister src) { |
1261 NOT_LP64(assert(VM_Version::supports_sse(), "")); | |
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1262 emit_simd_arith_nonds(0x2F, dst, src, VEX_SIMD_NONE); |
4759 | 1263 } |
1264 | |
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1265 void Assembler::cpuid() { |
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1266 emit_int8(0x0F); |
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1267 emit_int8((unsigned char)0xA2); |
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1268 } |
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1269 |
304 | 1270 void Assembler::cvtdq2pd(XMMRegister dst, XMMRegister src) { |
1271 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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1272 emit_simd_arith_nonds(0xE6, dst, src, VEX_SIMD_F3); |
304 | 1273 } |
1274 | |
1275 void Assembler::cvtdq2ps(XMMRegister dst, XMMRegister src) { | |
1276 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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1277 emit_simd_arith_nonds(0x5B, dst, src, VEX_SIMD_NONE); |
304 | 1278 } |
1279 | |
1280 void Assembler::cvtsd2ss(XMMRegister dst, XMMRegister src) { | |
1281 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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1282 emit_simd_arith(0x5A, dst, src, VEX_SIMD_F2); |
304 | 1283 } |
1284 | |
4759 | 1285 void Assembler::cvtsd2ss(XMMRegister dst, Address src) { |
1286 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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1287 emit_simd_arith(0x5A, dst, src, VEX_SIMD_F2); |
4759 | 1288 } |
1289 | |
304 | 1290 void Assembler::cvtsi2sdl(XMMRegister dst, Register src) { |
1291 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
4759 | 1292 int encode = simd_prefix_and_encode(dst, dst, src, VEX_SIMD_F2); |
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1293 emit_int8(0x2A); |
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1294 emit_int8((unsigned char)(0xC0 | encode)); |
304 | 1295 } |
1296 | |
4759 | 1297 void Assembler::cvtsi2sdl(XMMRegister dst, Address src) { |
1298 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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1299 emit_simd_arith(0x2A, dst, src, VEX_SIMD_F2); |
4759 | 1300 } |
1301 | |
304 | 1302 void Assembler::cvtsi2ssl(XMMRegister dst, Register src) { |
1303 NOT_LP64(assert(VM_Version::supports_sse(), "")); | |
4759 | 1304 int encode = simd_prefix_and_encode(dst, dst, src, VEX_SIMD_F3); |
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1305 emit_int8(0x2A); |
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1306 emit_int8((unsigned char)(0xC0 | encode)); |
304 | 1307 } |
1308 | |
4759 | 1309 void Assembler::cvtsi2ssl(XMMRegister dst, Address src) { |
1310 NOT_LP64(assert(VM_Version::supports_sse(), "")); | |
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1311 emit_simd_arith(0x2A, dst, src, VEX_SIMD_F3); |
4759 | 1312 } |
1313 | |
304 | 1314 void Assembler::cvtss2sd(XMMRegister dst, XMMRegister src) { |
1315 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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1316 emit_simd_arith(0x5A, dst, src, VEX_SIMD_F3); |
304 | 1317 } |
1318 | |
4759 | 1319 void Assembler::cvtss2sd(XMMRegister dst, Address src) { |
1320 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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1321 emit_simd_arith(0x5A, dst, src, VEX_SIMD_F3); |
4759 | 1322 } |
1323 | |
1324 | |
304 | 1325 void Assembler::cvttsd2sil(Register dst, XMMRegister src) { |
1326 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
4759 | 1327 int encode = simd_prefix_and_encode(dst, src, VEX_SIMD_F2); |
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1328 emit_int8(0x2C); |
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1329 emit_int8((unsigned char)(0xC0 | encode)); |
304 | 1330 } |
1331 | |
1332 void Assembler::cvttss2sil(Register dst, XMMRegister src) { | |
1333 NOT_LP64(assert(VM_Version::supports_sse(), "")); | |
4759 | 1334 int encode = simd_prefix_and_encode(dst, src, VEX_SIMD_F3); |
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1335 emit_int8(0x2C); |
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1336 emit_int8((unsigned char)(0xC0 | encode)); |
304 | 1337 } |
1338 | |
1339 void Assembler::decl(Address dst) { | |
1340 // Don't use it directly. Use MacroAssembler::decrement() instead. | |
1341 InstructionMark im(this); | |
1342 prefix(dst); | |
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1343 emit_int8((unsigned char)0xFF); |
304 | 1344 emit_operand(rcx, dst); |
1345 } | |
1346 | |
1347 void Assembler::divsd(XMMRegister dst, Address src) { | |
1348 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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1349 emit_simd_arith(0x5E, dst, src, VEX_SIMD_F2); |
304 | 1350 } |
1351 | |
1352 void Assembler::divsd(XMMRegister dst, XMMRegister src) { | |
1353 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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1354 emit_simd_arith(0x5E, dst, src, VEX_SIMD_F2); |
304 | 1355 } |
1356 | |
1357 void Assembler::divss(XMMRegister dst, Address src) { | |
1358 NOT_LP64(assert(VM_Version::supports_sse(), "")); | |
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1359 emit_simd_arith(0x5E, dst, src, VEX_SIMD_F3); |
304 | 1360 } |
1361 | |
1362 void Assembler::divss(XMMRegister dst, XMMRegister src) { | |
1363 NOT_LP64(assert(VM_Version::supports_sse(), "")); | |
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1364 emit_simd_arith(0x5E, dst, src, VEX_SIMD_F3); |
304 | 1365 } |
1366 | |
1367 void Assembler::emms() { | |
1368 NOT_LP64(assert(VM_Version::supports_mmx(), "")); | |
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1369 emit_int8(0x0F); |
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1370 emit_int8(0x77); |
304 | 1371 } |
1372 | |
1373 void Assembler::hlt() { | |
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1374 emit_int8((unsigned char)0xF4); |
304 | 1375 } |
1376 | |
1377 void Assembler::idivl(Register src) { | |
1378 int encode = prefix_and_encode(src->encoding()); | |
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1379 emit_int8((unsigned char)0xF7); |
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1380 emit_int8((unsigned char)(0xF8 | encode)); |
304 | 1381 } |
1382 | |
1920 | 1383 void Assembler::divl(Register src) { // Unsigned |
1384 int encode = prefix_and_encode(src->encoding()); | |
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1385 emit_int8((unsigned char)0xF7); |
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1386 emit_int8((unsigned char)(0xF0 | encode)); |
1920 | 1387 } |
1388 | |
304 | 1389 void Assembler::imull(Register dst, Register src) { |
1390 int encode = prefix_and_encode(dst->encoding(), src->encoding()); | |
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1391 emit_int8(0x0F); |
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1392 emit_int8((unsigned char)0xAF); |
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1393 emit_int8((unsigned char)(0xC0 | encode)); |
304 | 1394 } |
1395 | |
1396 | |
1397 void Assembler::imull(Register dst, Register src, int value) { | |
1398 int encode = prefix_and_encode(dst->encoding(), src->encoding()); | |
1399 if (is8bit(value)) { | |
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1400 emit_int8(0x6B); |
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1401 emit_int8((unsigned char)(0xC0 | encode)); |
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1402 emit_int8(value & 0xFF); |
304 | 1403 } else { |
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1404 emit_int8(0x69); |
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1405 emit_int8((unsigned char)(0xC0 | encode)); |
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1406 emit_int32(value); |
304 | 1407 } |
1408 } | |
1409 | |
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1410 void Assembler::imull(Register dst, Address src) { |
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1411 InstructionMark im(this); |
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1412 prefix(src, dst); |
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1413 emit_int8(0x0F); |
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1414 emit_int8((unsigned char) 0xAF); |
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1415 emit_operand(dst, src); |
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1416 } |
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1417 |
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1418 |
304 | 1419 void Assembler::incl(Address dst) { |
1420 // Don't use it directly. Use MacroAssembler::increment() instead. | |
1421 InstructionMark im(this); | |
1422 prefix(dst); | |
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1423 emit_int8((unsigned char)0xFF); |
304 | 1424 emit_operand(rax, dst); |
1425 } | |
1426 | |
3851 | 1427 void Assembler::jcc(Condition cc, Label& L, bool maybe_short) { |
1428 InstructionMark im(this); | |
304 | 1429 assert((0 <= cc) && (cc < 16), "illegal cc"); |
1430 if (L.is_bound()) { | |
1431 address dst = target(L); | |
1432 assert(dst != NULL, "jcc most probably wrong"); | |
1433 | |
1434 const int short_size = 2; | |
1435 const int long_size = 6; | |
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1436 intptr_t offs = (intptr_t)dst - (intptr_t)pc(); |
3851 | 1437 if (maybe_short && is8bit(offs - short_size)) { |
304 | 1438 // 0111 tttn #8-bit disp |
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1439 emit_int8(0x70 | cc); |
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1440 emit_int8((offs - short_size) & 0xFF); |
304 | 1441 } else { |
1442 // 0000 1111 1000 tttn #32-bit disp | |
1443 assert(is_simm32(offs - long_size), | |
1444 "must be 32bit offset (call4)"); | |
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1445 emit_int8(0x0F); |
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1446 emit_int8((unsigned char)(0x80 | cc)); |
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1447 emit_int32(offs - long_size); |
304 | 1448 } |
1449 } else { | |
1450 // Note: could eliminate cond. jumps to this jump if condition | |
1451 // is the same however, seems to be rather unlikely case. | |
1452 // Note: use jccb() if label to be bound is very close to get | |
1453 // an 8-bit displacement | |
1454 L.add_patch_at(code(), locator()); | |
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1455 emit_int8(0x0F); |
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1456 emit_int8((unsigned char)(0x80 | cc)); |
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1457 emit_int32(0); |
304 | 1458 } |
1459 } | |
1460 | |
1461 void Assembler::jccb(Condition cc, Label& L) { | |
1462 if (L.is_bound()) { | |
1463 const int short_size = 2; | |
1464 address entry = target(L); | |
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1465 #ifdef ASSERT |
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1466 intptr_t dist = (intptr_t)entry - ((intptr_t)pc() + short_size); |
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1467 intptr_t delta = short_branch_delta(); |
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1468 if (delta != 0) { |
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1469 dist += (dist < 0 ? (-delta) :delta); |
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1470 } |
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1471 assert(is8bit(dist), "Dispacement too large for a short jmp"); |
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1472 #endif |
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1473 intptr_t offs = (intptr_t)entry - (intptr_t)pc(); |
304 | 1474 // 0111 tttn #8-bit disp |
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1475 emit_int8(0x70 | cc); |
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1476 emit_int8((offs - short_size) & 0xFF); |
304 | 1477 } else { |
1478 InstructionMark im(this); | |
1479 L.add_patch_at(code(), locator()); | |
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1480 emit_int8(0x70 | cc); |
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1481 emit_int8(0); |
304 | 1482 } |
1483 } | |
1484 | |
1485 void Assembler::jmp(Address adr) { | |
1486 InstructionMark im(this); | |
1487 prefix(adr); | |
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1488 emit_int8((unsigned char)0xFF); |
304 | 1489 emit_operand(rsp, adr); |
1490 } | |
1491 | |
3851 | 1492 void Assembler::jmp(Label& L, bool maybe_short) { |
304 | 1493 if (L.is_bound()) { |
1494 address entry = target(L); | |
1495 assert(entry != NULL, "jmp most probably wrong"); | |
1496 InstructionMark im(this); | |
1497 const int short_size = 2; | |
1498 const int long_size = 5; | |
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1499 intptr_t offs = entry - pc(); |
3851 | 1500 if (maybe_short && is8bit(offs - short_size)) { |
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1501 emit_int8((unsigned char)0xEB); |
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1502 emit_int8((offs - short_size) & 0xFF); |
304 | 1503 } else { |
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1504 emit_int8((unsigned char)0xE9); |
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1505 emit_int32(offs - long_size); |
304 | 1506 } |
1507 } else { | |
1508 // By default, forward jumps are always 32-bit displacements, since | |
1509 // we can't yet know where the label will be bound. If you're sure that | |
1510 // the forward jump will not run beyond 256 bytes, use jmpb to | |
1511 // force an 8-bit displacement. | |
1512 InstructionMark im(this); | |
1513 L.add_patch_at(code(), locator()); | |
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1514 emit_int8((unsigned char)0xE9); |
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1515 emit_int32(0); |
304 | 1516 } |
1517 } | |
1518 | |
1519 void Assembler::jmp(Register entry) { | |
1520 int encode = prefix_and_encode(entry->encoding()); | |
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1521 emit_int8((unsigned char)0xFF); |
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1522 emit_int8((unsigned char)(0xE0 | encode)); |
304 | 1523 } |
1524 | |
1525 void Assembler::jmp_literal(address dest, RelocationHolder const& rspec) { | |
1526 InstructionMark im(this); | |
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1527 emit_int8((unsigned char)0xE9); |
304 | 1528 assert(dest != NULL, "must have a target"); |
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1529 intptr_t disp = dest - (pc() + sizeof(int32_t)); |
304 | 1530 assert(is_simm32(disp), "must be 32bit offset (jmp)"); |
1531 emit_data(disp, rspec.reloc(), call32_operand); | |
1532 } | |
1533 | |
1534 void Assembler::jmpb(Label& L) { | |
1535 if (L.is_bound()) { | |
1536 const int short_size = 2; | |
1537 address entry = target(L); | |
1538 assert(entry != NULL, "jmp most probably wrong"); | |
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1539 #ifdef ASSERT |
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1540 intptr_t dist = (intptr_t)entry - ((intptr_t)pc() + short_size); |
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1541 intptr_t delta = short_branch_delta(); |
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1542 if (delta != 0) { |
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1543 dist += (dist < 0 ? (-delta) :delta); |
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1544 } |
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1545 assert(is8bit(dist), "Dispacement too large for a short jmp"); |
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1546 #endif |
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1547 intptr_t offs = entry - pc(); |
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1548 emit_int8((unsigned char)0xEB); |
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1549 emit_int8((offs - short_size) & 0xFF); |
304 | 1550 } else { |
1551 InstructionMark im(this); | |
1552 L.add_patch_at(code(), locator()); | |
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1553 emit_int8((unsigned char)0xEB); |
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1554 emit_int8(0); |
304 | 1555 } |
1556 } | |
1557 | |
1558 void Assembler::ldmxcsr( Address src) { | |
1559 NOT_LP64(assert(VM_Version::supports_sse(), "")); | |
1560 InstructionMark im(this); | |
1561 prefix(src); | |
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1562 emit_int8(0x0F); |
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1563 emit_int8((unsigned char)0xAE); |
304 | 1564 emit_operand(as_Register(2), src); |
1565 } | |
1566 | |
1567 void Assembler::leal(Register dst, Address src) { | |
1568 InstructionMark im(this); | |
1569 #ifdef _LP64 | |
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1570 emit_int8(0x67); // addr32 |
304 | 1571 prefix(src, dst); |
1572 #endif // LP64 | |
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1573 emit_int8((unsigned char)0x8D); |
304 | 1574 emit_operand(dst, src); |
1575 } | |
1576 | |
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1577 void Assembler::lfence() { |
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1578 emit_int8(0x0F); |
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1579 emit_int8((unsigned char)0xAE); |
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1580 emit_int8((unsigned char)0xE8); |
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1581 } |
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1582 |
304 | 1583 void Assembler::lock() { |
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1584 emit_int8((unsigned char)0xF0); |
304 | 1585 } |
1586 | |
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1587 void Assembler::lzcntl(Register dst, Register src) { |
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1588 assert(VM_Version::supports_lzcnt(), "encoding is treated as BSR"); |
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1589 emit_int8((unsigned char)0xF3); |
775
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1590 int encode = prefix_and_encode(dst->encoding(), src->encoding()); |
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1591 emit_int8(0x0F); |
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1592 emit_int8((unsigned char)0xBD); |
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1593 emit_int8((unsigned char)(0xC0 | encode)); |
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1594 } |
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1595 |
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1596 // Emit mfence instruction |
304 | 1597 void Assembler::mfence() { |
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1598 NOT_LP64(assert(VM_Version::supports_sse2(), "unsupported");) |
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1599 emit_int8(0x0F); |
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1600 emit_int8((unsigned char)0xAE); |
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1601 emit_int8((unsigned char)0xF0); |
304 | 1602 } |
1603 | |
1604 void Assembler::mov(Register dst, Register src) { | |
1605 LP64_ONLY(movq(dst, src)) NOT_LP64(movl(dst, src)); | |
1606 } | |
1607 | |
1608 void Assembler::movapd(XMMRegister dst, XMMRegister src) { | |
1609 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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1610 emit_simd_arith_nonds(0x28, dst, src, VEX_SIMD_66); |
304 | 1611 } |
1612 | |
1613 void Assembler::movaps(XMMRegister dst, XMMRegister src) { | |
1614 NOT_LP64(assert(VM_Version::supports_sse(), "")); | |
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1615 emit_simd_arith_nonds(0x28, dst, src, VEX_SIMD_NONE); |
304 | 1616 } |
1617 | |
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1618 void Assembler::movlhps(XMMRegister dst, XMMRegister src) { |
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1619 NOT_LP64(assert(VM_Version::supports_sse(), "")); |
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1620 int encode = simd_prefix_and_encode(dst, src, src, VEX_SIMD_NONE); |
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1621 emit_int8(0x16); |
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1622 emit_int8((unsigned char)(0xC0 | encode)); |
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1623 } |
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1624 |
304 | 1625 void Assembler::movb(Register dst, Address src) { |
1626 NOT_LP64(assert(dst->has_byte_register(), "must have byte register")); | |
1627 InstructionMark im(this); | |
1628 prefix(src, dst, true); | |
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1629 emit_int8((unsigned char)0x8A); |
304 | 1630 emit_operand(dst, src); |
1631 } | |
1632 | |
1633 | |
1634 void Assembler::movb(Address dst, int imm8) { | |
1635 InstructionMark im(this); | |
1636 prefix(dst); | |
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1637 emit_int8((unsigned char)0xC6); |
304 | 1638 emit_operand(rax, dst, 1); |
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1639 emit_int8(imm8); |
304 | 1640 } |
1641 | |
1642 | |
1643 void Assembler::movb(Address dst, Register src) { | |
1644 assert(src->has_byte_register(), "must have byte register"); | |
1645 InstructionMark im(this); | |
1646 prefix(dst, src, true); | |
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1647 emit_int8((unsigned char)0x88); |
304 | 1648 emit_operand(src, dst); |
1649 } | |
1650 | |
1651 void Assembler::movdl(XMMRegister dst, Register src) { | |
1652 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
4759 | 1653 int encode = simd_prefix_and_encode(dst, src, VEX_SIMD_66); |
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1654 emit_int8(0x6E); |
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1655 emit_int8((unsigned char)(0xC0 | encode)); |
304 | 1656 } |
1657 | |
1658 void Assembler::movdl(Register dst, XMMRegister src) { | |
1659 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
1660 // swap src/dst to get correct prefix | |
4759 | 1661 int encode = simd_prefix_and_encode(src, dst, VEX_SIMD_66); |
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1662 emit_int8(0x7E); |
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1663 emit_int8((unsigned char)(0xC0 | encode)); |
304 | 1664 } |
1665 | |
2320
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1666 void Assembler::movdl(XMMRegister dst, Address src) { |
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1667 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
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1668 InstructionMark im(this); |
4759 | 1669 simd_prefix(dst, src, VEX_SIMD_66); |
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1670 emit_int8(0x6E); |
2320
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1671 emit_operand(dst, src); |
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|
1672 } |
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1673 |
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1674 void Assembler::movdl(Address dst, XMMRegister src) { |
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1675 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
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1676 InstructionMark im(this); |
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1677 simd_prefix(dst, src, VEX_SIMD_66); |
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1678 emit_int8(0x7E); |
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|
1679 emit_operand(src, dst); |
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|
1680 } |
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|
1681 |
304 | 1682 void Assembler::movdqa(XMMRegister dst, XMMRegister src) { |
1683 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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1684 emit_simd_arith_nonds(0x6F, dst, src, VEX_SIMD_66); |
304 | 1685 } |
1686 | |
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1687 void Assembler::movdqa(XMMRegister dst, Address src) { |
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1688 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
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1689 emit_simd_arith_nonds(0x6F, dst, src, VEX_SIMD_66); |
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1690 } |
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|
1691 |
405 | 1692 void Assembler::movdqu(XMMRegister dst, Address src) { |
1693 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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1694 emit_simd_arith_nonds(0x6F, dst, src, VEX_SIMD_F3); |
405 | 1695 } |
1696 | |
1697 void Assembler::movdqu(XMMRegister dst, XMMRegister src) { | |
1698 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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1699 emit_simd_arith_nonds(0x6F, dst, src, VEX_SIMD_F3); |
405 | 1700 } |
1701 | |
1702 void Assembler::movdqu(Address dst, XMMRegister src) { | |
1703 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
1704 InstructionMark im(this); | |
4759 | 1705 simd_prefix(dst, src, VEX_SIMD_F3); |
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1706 emit_int8(0x7F); |
405 | 1707 emit_operand(src, dst); |
1708 } | |
1709 | |
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1710 // Move Unaligned 256bit Vector |
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1711 void Assembler::vmovdqu(XMMRegister dst, XMMRegister src) { |
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1712 assert(UseAVX, ""); |
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1713 bool vector256 = true; |
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1714 int encode = vex_prefix_and_encode(dst, xnoreg, src, VEX_SIMD_F3, vector256); |
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1715 emit_int8(0x6F); |
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1716 emit_int8((unsigned char)(0xC0 | encode)); |
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1717 } |
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1718 |
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1719 void Assembler::vmovdqu(XMMRegister dst, Address src) { |
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1720 assert(UseAVX, ""); |
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|
1721 InstructionMark im(this); |
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1722 bool vector256 = true; |
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1723 vex_prefix(dst, xnoreg, src, VEX_SIMD_F3, vector256); |
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1724 emit_int8(0x6F); |
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1725 emit_operand(dst, src); |
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1726 } |
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1727 |
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1728 void Assembler::vmovdqu(Address dst, XMMRegister src) { |
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1729 assert(UseAVX, ""); |
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|
1730 InstructionMark im(this); |
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|
1731 bool vector256 = true; |
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|
1732 // swap src<->dst for encoding |
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1733 assert(src != xnoreg, "sanity"); |
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|
1734 vex_prefix(src, xnoreg, dst, VEX_SIMD_F3, vector256); |
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1735 emit_int8(0x7F); |
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1736 emit_operand(src, dst); |
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1737 } |
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1738 |
304 | 1739 // Uses zero extension on 64bit |
1740 | |
1741 void Assembler::movl(Register dst, int32_t imm32) { | |
1742 int encode = prefix_and_encode(dst->encoding()); | |
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1743 emit_int8((unsigned char)(0xB8 | encode)); |
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1744 emit_int32(imm32); |
304 | 1745 } |
1746 | |
1747 void Assembler::movl(Register dst, Register src) { | |
1748 int encode = prefix_and_encode(dst->encoding(), src->encoding()); | |
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1749 emit_int8((unsigned char)0x8B); |
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1750 emit_int8((unsigned char)(0xC0 | encode)); |
304 | 1751 } |
1752 | |
1753 void Assembler::movl(Register dst, Address src) { | |
1754 InstructionMark im(this); | |
1755 prefix(src, dst); | |
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1756 emit_int8((unsigned char)0x8B); |
304 | 1757 emit_operand(dst, src); |
1758 } | |
1759 | |
1760 void Assembler::movl(Address dst, int32_t imm32) { | |
1761 InstructionMark im(this); | |
1762 prefix(dst); | |
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1763 emit_int8((unsigned char)0xC7); |
304 | 1764 emit_operand(rax, dst, 4); |
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1765 emit_int32(imm32); |
304 | 1766 } |
1767 | |
1768 void Assembler::movl(Address dst, Register src) { | |
1769 InstructionMark im(this); | |
1770 prefix(dst, src); | |
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1771 emit_int8((unsigned char)0x89); |
304 | 1772 emit_operand(src, dst); |
1773 } | |
1774 | |
1775 // New cpus require to use movsd and movss to avoid partial register stall | |
1776 // when loading from memory. But for old Opteron use movlpd instead of movsd. | |
1777 // The selection is done in MacroAssembler::movdbl() and movflt(). | |
1778 void Assembler::movlpd(XMMRegister dst, Address src) { | |
1779 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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1780 emit_simd_arith(0x12, dst, src, VEX_SIMD_66); |
304 | 1781 } |
1782 | |
1783 void Assembler::movq( MMXRegister dst, Address src ) { | |
1784 assert( VM_Version::supports_mmx(), "" ); | |
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1785 emit_int8(0x0F); |
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1786 emit_int8(0x6F); |
304 | 1787 emit_operand(dst, src); |
1788 } | |
1789 | |
1790 void Assembler::movq( Address dst, MMXRegister src ) { | |
1791 assert( VM_Version::supports_mmx(), "" ); | |
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1792 emit_int8(0x0F); |
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1793 emit_int8(0x7F); |
304 | 1794 // workaround gcc (3.2.1-7a) bug |
1795 // In that version of gcc with only an emit_operand(MMX, Address) | |
1796 // gcc will tail jump and try and reverse the parameters completely | |
1797 // obliterating dst in the process. By having a version available | |
1798 // that doesn't need to swap the args at the tail jump the bug is | |
1799 // avoided. | |
1800 emit_operand(dst, src); | |
1801 } | |
1802 | |
1803 void Assembler::movq(XMMRegister dst, Address src) { | |
1804 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
1805 InstructionMark im(this); | |
4759 | 1806 simd_prefix(dst, src, VEX_SIMD_F3); |
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1807 emit_int8(0x7E); |
304 | 1808 emit_operand(dst, src); |
1809 } | |
1810 | |
1811 void Assembler::movq(Address dst, XMMRegister src) { | |
1812 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
1813 InstructionMark im(this); | |
4759 | 1814 simd_prefix(dst, src, VEX_SIMD_66); |
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1815 emit_int8((unsigned char)0xD6); |
304 | 1816 emit_operand(src, dst); |
1817 } | |
1818 | |
1819 void Assembler::movsbl(Register dst, Address src) { // movsxb | |
1820 InstructionMark im(this); | |
1821 prefix(src, dst); | |
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1822 emit_int8(0x0F); |
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1823 emit_int8((unsigned char)0xBE); |
304 | 1824 emit_operand(dst, src); |
1825 } | |
1826 | |
1827 void Assembler::movsbl(Register dst, Register src) { // movsxb | |
1828 NOT_LP64(assert(src->has_byte_register(), "must have byte register")); | |
1829 int encode = prefix_and_encode(dst->encoding(), src->encoding(), true); | |
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1830 emit_int8(0x0F); |
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1831 emit_int8((unsigned char)0xBE); |
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1832 emit_int8((unsigned char)(0xC0 | encode)); |
304 | 1833 } |
1834 | |
1835 void Assembler::movsd(XMMRegister dst, XMMRegister src) { | |
1836 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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1837 emit_simd_arith(0x10, dst, src, VEX_SIMD_F2); |
304 | 1838 } |
1839 | |
1840 void Assembler::movsd(XMMRegister dst, Address src) { | |
1841 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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1842 emit_simd_arith_nonds(0x10, dst, src, VEX_SIMD_F2); |
304 | 1843 } |
1844 | |
1845 void Assembler::movsd(Address dst, XMMRegister src) { | |
1846 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
1847 InstructionMark im(this); | |
4759 | 1848 simd_prefix(dst, src, VEX_SIMD_F2); |
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1849 emit_int8(0x11); |
304 | 1850 emit_operand(src, dst); |
1851 } | |
1852 | |
1853 void Assembler::movss(XMMRegister dst, XMMRegister src) { | |
1854 NOT_LP64(assert(VM_Version::supports_sse(), "")); | |
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1855 emit_simd_arith(0x10, dst, src, VEX_SIMD_F3); |
304 | 1856 } |
1857 | |
1858 void Assembler::movss(XMMRegister dst, Address src) { | |
1859 NOT_LP64(assert(VM_Version::supports_sse(), "")); | |
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1860 emit_simd_arith_nonds(0x10, dst, src, VEX_SIMD_F3); |
304 | 1861 } |
1862 | |
1863 void Assembler::movss(Address dst, XMMRegister src) { | |
1864 NOT_LP64(assert(VM_Version::supports_sse(), "")); | |
1865 InstructionMark im(this); | |
4759 | 1866 simd_prefix(dst, src, VEX_SIMD_F3); |
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1867 emit_int8(0x11); |
304 | 1868 emit_operand(src, dst); |
1869 } | |
1870 | |
1871 void Assembler::movswl(Register dst, Address src) { // movsxw | |
1872 InstructionMark im(this); | |
1873 prefix(src, dst); | |
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1874 emit_int8(0x0F); |
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1875 emit_int8((unsigned char)0xBF); |
304 | 1876 emit_operand(dst, src); |
1877 } | |
1878 | |
1879 void Assembler::movswl(Register dst, Register src) { // movsxw | |
1880 int encode = prefix_and_encode(dst->encoding(), src->encoding()); | |
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1881 emit_int8(0x0F); |
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1882 emit_int8((unsigned char)0xBF); |
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1883 emit_int8((unsigned char)(0xC0 | encode)); |
304 | 1884 } |
1885 | |
1886 void Assembler::movw(Address dst, int imm16) { | |
1887 InstructionMark im(this); | |
1888 | |
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1889 emit_int8(0x66); // switch to 16-bit mode |
304 | 1890 prefix(dst); |
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1891 emit_int8((unsigned char)0xC7); |
304 | 1892 emit_operand(rax, dst, 2); |
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1893 emit_int16(imm16); |
304 | 1894 } |
1895 | |
1896 void Assembler::movw(Register dst, Address src) { | |
1897 InstructionMark im(this); | |
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1898 emit_int8(0x66); |
304 | 1899 prefix(src, dst); |
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1900 emit_int8((unsigned char)0x8B); |
304 | 1901 emit_operand(dst, src); |
1902 } | |
1903 | |
1904 void Assembler::movw(Address dst, Register src) { | |
1905 InstructionMark im(this); | |
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1906 emit_int8(0x66); |
304 | 1907 prefix(dst, src); |
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1908 emit_int8((unsigned char)0x89); |
304 | 1909 emit_operand(src, dst); |
1910 } | |
1911 | |
1912 void Assembler::movzbl(Register dst, Address src) { // movzxb | |
1913 InstructionMark im(this); | |
1914 prefix(src, dst); | |
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1915 emit_int8(0x0F); |
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1916 emit_int8((unsigned char)0xB6); |
304 | 1917 emit_operand(dst, src); |
1918 } | |
1919 | |
1920 void Assembler::movzbl(Register dst, Register src) { // movzxb | |
1921 NOT_LP64(assert(src->has_byte_register(), "must have byte register")); | |
1922 int encode = prefix_and_encode(dst->encoding(), src->encoding(), true); | |
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1923 emit_int8(0x0F); |
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1924 emit_int8((unsigned char)0xB6); |
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1925 emit_int8(0xC0 | encode); |
304 | 1926 } |
1927 | |
1928 void Assembler::movzwl(Register dst, Address src) { // movzxw | |
1929 InstructionMark im(this); | |
1930 prefix(src, dst); | |
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1931 emit_int8(0x0F); |
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1932 emit_int8((unsigned char)0xB7); |
304 | 1933 emit_operand(dst, src); |
1934 } | |
1935 | |
1936 void Assembler::movzwl(Register dst, Register src) { // movzxw | |
1937 int encode = prefix_and_encode(dst->encoding(), src->encoding()); | |
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1938 emit_int8(0x0F); |
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1939 emit_int8((unsigned char)0xB7); |
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1940 emit_int8(0xC0 | encode); |
304 | 1941 } |
1942 | |
1943 void Assembler::mull(Address src) { | |
1944 InstructionMark im(this); | |
1945 prefix(src); | |
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1946 emit_int8((unsigned char)0xF7); |
304 | 1947 emit_operand(rsp, src); |
1948 } | |
1949 | |
1950 void Assembler::mull(Register src) { | |
1951 int encode = prefix_and_encode(src->encoding()); | |
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1952 emit_int8((unsigned char)0xF7); |
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1953 emit_int8((unsigned char)(0xE0 | encode)); |
304 | 1954 } |
1955 | |
1956 void Assembler::mulsd(XMMRegister dst, Address src) { | |
1957 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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1958 emit_simd_arith(0x59, dst, src, VEX_SIMD_F2); |
304 | 1959 } |
1960 | |
1961 void Assembler::mulsd(XMMRegister dst, XMMRegister src) { | |
1962 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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1963 emit_simd_arith(0x59, dst, src, VEX_SIMD_F2); |
304 | 1964 } |
1965 | |
1966 void Assembler::mulss(XMMRegister dst, Address src) { | |
1967 NOT_LP64(assert(VM_Version::supports_sse(), "")); | |
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1968 emit_simd_arith(0x59, dst, src, VEX_SIMD_F3); |
304 | 1969 } |
1970 | |
1971 void Assembler::mulss(XMMRegister dst, XMMRegister src) { | |
1972 NOT_LP64(assert(VM_Version::supports_sse(), "")); | |
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1973 emit_simd_arith(0x59, dst, src, VEX_SIMD_F3); |
304 | 1974 } |
1975 | |
1976 void Assembler::negl(Register dst) { | |
1977 int encode = prefix_and_encode(dst->encoding()); | |
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1978 emit_int8((unsigned char)0xF7); |
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1979 emit_int8((unsigned char)(0xD8 | encode)); |
304 | 1980 } |
1981 | |
0 | 1982 void Assembler::nop(int i) { |
304 | 1983 #ifdef ASSERT |
0 | 1984 assert(i > 0, " "); |
304 | 1985 // The fancy nops aren't currently recognized by debuggers making it a |
1986 // pain to disassemble code while debugging. If asserts are on clearly | |
1987 // speed is not an issue so simply use the single byte traditional nop | |
1988 // to do alignment. | |
1989 | |
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1990 for (; i > 0 ; i--) emit_int8((unsigned char)0x90); |
304 | 1991 return; |
1992 | |
1993 #endif // ASSERT | |
1994 | |
0 | 1995 if (UseAddressNop && VM_Version::is_intel()) { |
1996 // | |
1997 // Using multi-bytes nops "0x0F 0x1F [address]" for Intel | |
1998 // 1: 0x90 | |
1999 // 2: 0x66 0x90 | |
2000 // 3: 0x66 0x66 0x90 (don't use "0x0F 0x1F 0x00" - need patching safe padding) | |
2001 // 4: 0x0F 0x1F 0x40 0x00 | |
2002 // 5: 0x0F 0x1F 0x44 0x00 0x00 | |
2003 // 6: 0x66 0x0F 0x1F 0x44 0x00 0x00 | |
2004 // 7: 0x0F 0x1F 0x80 0x00 0x00 0x00 0x00 | |
2005 // 8: 0x0F 0x1F 0x84 0x00 0x00 0x00 0x00 0x00 | |
2006 // 9: 0x66 0x0F 0x1F 0x84 0x00 0x00 0x00 0x00 0x00 | |
2007 // 10: 0x66 0x66 0x0F 0x1F 0x84 0x00 0x00 0x00 0x00 0x00 | |
2008 // 11: 0x66 0x66 0x66 0x0F 0x1F 0x84 0x00 0x00 0x00 0x00 0x00 | |
2009 | |
2010 // The rest coding is Intel specific - don't use consecutive address nops | |
2011 | |
2012 // 12: 0x0F 0x1F 0x84 0x00 0x00 0x00 0x00 0x00 0x66 0x66 0x66 0x90 | |
2013 // 13: 0x66 0x0F 0x1F 0x84 0x00 0x00 0x00 0x00 0x00 0x66 0x66 0x66 0x90 | |
2014 // 14: 0x66 0x66 0x0F 0x1F 0x84 0x00 0x00 0x00 0x00 0x00 0x66 0x66 0x66 0x90 | |
2015 // 15: 0x66 0x66 0x66 0x0F 0x1F 0x84 0x00 0x00 0x00 0x00 0x00 0x66 0x66 0x66 0x90 | |
2016 | |
2017 while(i >= 15) { | |
2018 // For Intel don't generate consecutive addess nops (mix with regular nops) | |
2019 i -= 15; | |
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2020 emit_int8(0x66); // size prefix |
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2021 emit_int8(0x66); // size prefix |
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2022 emit_int8(0x66); // size prefix |
0 | 2023 addr_nop_8(); |
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2024 emit_int8(0x66); // size prefix |
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2025 emit_int8(0x66); // size prefix |
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2026 emit_int8(0x66); // size prefix |
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2027 emit_int8((unsigned char)0x90); |
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2028 // nop |
0 | 2029 } |
2030 switch (i) { | |
2031 case 14: | |
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2032 emit_int8(0x66); // size prefix |
0 | 2033 case 13: |
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2034 emit_int8(0x66); // size prefix |
0 | 2035 case 12: |
2036 addr_nop_8(); | |
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2037 emit_int8(0x66); // size prefix |
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2038 emit_int8(0x66); // size prefix |
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2039 emit_int8(0x66); // size prefix |
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2040 emit_int8((unsigned char)0x90); |
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2041 // nop |
0 | 2042 break; |
2043 case 11: | |
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2044 emit_int8(0x66); // size prefix |
0 | 2045 case 10: |
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2046 emit_int8(0x66); // size prefix |
0 | 2047 case 9: |
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2048 emit_int8(0x66); // size prefix |
0 | 2049 case 8: |
2050 addr_nop_8(); | |
2051 break; | |
2052 case 7: | |
2053 addr_nop_7(); | |
2054 break; | |
2055 case 6: | |
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2056 emit_int8(0x66); // size prefix |
0 | 2057 case 5: |
2058 addr_nop_5(); | |
2059 break; | |
2060 case 4: | |
2061 addr_nop_4(); | |
2062 break; | |
2063 case 3: | |
2064 // Don't use "0x0F 0x1F 0x00" - need patching safe padding | |
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2065 emit_int8(0x66); // size prefix |
0 | 2066 case 2: |
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2067 emit_int8(0x66); // size prefix |
0 | 2068 case 1: |
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2069 emit_int8((unsigned char)0x90); |
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2070 // nop |
0 | 2071 break; |
2072 default: | |
2073 assert(i == 0, " "); | |
2074 } | |
2075 return; | |
2076 } | |
2077 if (UseAddressNop && VM_Version::is_amd()) { | |
2078 // | |
2079 // Using multi-bytes nops "0x0F 0x1F [address]" for AMD. | |
2080 // 1: 0x90 | |
2081 // 2: 0x66 0x90 | |
2082 // 3: 0x66 0x66 0x90 (don't use "0x0F 0x1F 0x00" - need patching safe padding) | |
2083 // 4: 0x0F 0x1F 0x40 0x00 | |
2084 // 5: 0x0F 0x1F 0x44 0x00 0x00 | |
2085 // 6: 0x66 0x0F 0x1F 0x44 0x00 0x00 | |
2086 // 7: 0x0F 0x1F 0x80 0x00 0x00 0x00 0x00 | |
2087 // 8: 0x0F 0x1F 0x84 0x00 0x00 0x00 0x00 0x00 | |
2088 // 9: 0x66 0x0F 0x1F 0x84 0x00 0x00 0x00 0x00 0x00 | |
2089 // 10: 0x66 0x66 0x0F 0x1F 0x84 0x00 0x00 0x00 0x00 0x00 | |
2090 // 11: 0x66 0x66 0x66 0x0F 0x1F 0x84 0x00 0x00 0x00 0x00 0x00 | |
2091 | |
2092 // The rest coding is AMD specific - use consecutive address nops | |
2093 | |
2094 // 12: 0x66 0x0F 0x1F 0x44 0x00 0x00 0x66 0x0F 0x1F 0x44 0x00 0x00 | |
2095 // 13: 0x0F 0x1F 0x80 0x00 0x00 0x00 0x00 0x66 0x0F 0x1F 0x44 0x00 0x00 | |
2096 // 14: 0x0F 0x1F 0x80 0x00 0x00 0x00 0x00 0x0F 0x1F 0x80 0x00 0x00 0x00 0x00 | |
2097 // 15: 0x0F 0x1F 0x84 0x00 0x00 0x00 0x00 0x00 0x0F 0x1F 0x80 0x00 0x00 0x00 0x00 | |
2098 // 16: 0x0F 0x1F 0x84 0x00 0x00 0x00 0x00 0x00 0x0F 0x1F 0x84 0x00 0x00 0x00 0x00 0x00 | |
2099 // Size prefixes (0x66) are added for larger sizes | |
2100 | |
2101 while(i >= 22) { | |
2102 i -= 11; | |
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2103 emit_int8(0x66); // size prefix |
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2104 emit_int8(0x66); // size prefix |
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2105 emit_int8(0x66); // size prefix |
0 | 2106 addr_nop_8(); |
2107 } | |
2108 // Generate first nop for size between 21-12 | |
2109 switch (i) { | |
2110 case 21: | |
2111 i -= 1; | |
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2112 emit_int8(0x66); // size prefix |
0 | 2113 case 20: |
2114 case 19: | |
2115 i -= 1; | |
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2116 emit_int8(0x66); // size prefix |
0 | 2117 case 18: |
2118 case 17: | |
2119 i -= 1; | |
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2120 emit_int8(0x66); // size prefix |
0 | 2121 case 16: |
2122 case 15: | |
2123 i -= 8; | |
2124 addr_nop_8(); | |
2125 break; | |
2126 case 14: | |
2127 case 13: | |
2128 i -= 7; | |
2129 addr_nop_7(); | |
2130 break; | |
2131 case 12: | |
2132 i -= 6; | |
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2133 emit_int8(0x66); // size prefix |
0 | 2134 addr_nop_5(); |
2135 break; | |
2136 default: | |
2137 assert(i < 12, " "); | |
2138 } | |
2139 | |
2140 // Generate second nop for size between 11-1 | |
2141 switch (i) { | |
2142 case 11: | |
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2143 emit_int8(0x66); // size prefix |
0 | 2144 case 10: |
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2145 emit_int8(0x66); // size prefix |
0 | 2146 case 9: |
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2147 emit_int8(0x66); // size prefix |
0 | 2148 case 8: |
2149 addr_nop_8(); | |
2150 break; | |
2151 case 7: | |
2152 addr_nop_7(); | |
2153 break; | |
2154 case 6: | |
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2155 emit_int8(0x66); // size prefix |
0 | 2156 case 5: |
2157 addr_nop_5(); | |
2158 break; | |
2159 case 4: | |
2160 addr_nop_4(); | |
2161 break; | |
2162 case 3: | |
2163 // Don't use "0x0F 0x1F 0x00" - need patching safe padding | |
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2164 emit_int8(0x66); // size prefix |
0 | 2165 case 2: |
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2166 emit_int8(0x66); // size prefix |
0 | 2167 case 1: |
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2168 emit_int8((unsigned char)0x90); |
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2169 // nop |
0 | 2170 break; |
2171 default: | |
2172 assert(i == 0, " "); | |
2173 } | |
2174 return; | |
2175 } | |
2176 | |
2177 // Using nops with size prefixes "0x66 0x90". | |
2178 // From AMD Optimization Guide: | |
2179 // 1: 0x90 | |
2180 // 2: 0x66 0x90 | |
2181 // 3: 0x66 0x66 0x90 | |
2182 // 4: 0x66 0x66 0x66 0x90 | |
2183 // 5: 0x66 0x66 0x90 0x66 0x90 | |
2184 // 6: 0x66 0x66 0x90 0x66 0x66 0x90 | |
2185 // 7: 0x66 0x66 0x66 0x90 0x66 0x66 0x90 | |
2186 // 8: 0x66 0x66 0x66 0x90 0x66 0x66 0x66 0x90 | |
2187 // 9: 0x66 0x66 0x90 0x66 0x66 0x90 0x66 0x66 0x90 | |
2188 // 10: 0x66 0x66 0x66 0x90 0x66 0x66 0x90 0x66 0x66 0x90 | |
2189 // | |
2190 while(i > 12) { | |
2191 i -= 4; | |
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2192 emit_int8(0x66); // size prefix |
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2193 emit_int8(0x66); |
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2194 emit_int8(0x66); |
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2195 emit_int8((unsigned char)0x90); |
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2196 // nop |
0 | 2197 } |
2198 // 1 - 12 nops | |
2199 if(i > 8) { | |
2200 if(i > 9) { | |
2201 i -= 1; | |
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2202 emit_int8(0x66); |
0 | 2203 } |
2204 i -= 3; | |
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2205 emit_int8(0x66); |
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2206 emit_int8(0x66); |
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2207 emit_int8((unsigned char)0x90); |
0 | 2208 } |
2209 // 1 - 8 nops | |
2210 if(i > 4) { | |
2211 if(i > 6) { | |
2212 i -= 1; | |
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2213 emit_int8(0x66); |
0 | 2214 } |
2215 i -= 3; | |
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2216 emit_int8(0x66); |
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2217 emit_int8(0x66); |
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2218 emit_int8((unsigned char)0x90); |
0 | 2219 } |
2220 switch (i) { | |
2221 case 4: | |
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2222 emit_int8(0x66); |
0 | 2223 case 3: |
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2224 emit_int8(0x66); |
0 | 2225 case 2: |
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2226 emit_int8(0x66); |
0 | 2227 case 1: |
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2228 emit_int8((unsigned char)0x90); |
0 | 2229 break; |
2230 default: | |
2231 assert(i == 0, " "); | |
2232 } | |
2233 } | |
2234 | |
304 | 2235 void Assembler::notl(Register dst) { |
2236 int encode = prefix_and_encode(dst->encoding()); | |
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2237 emit_int8((unsigned char)0xF7); |
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2238 emit_int8((unsigned char)(0xD0 | encode)); |
304 | 2239 } |
2240 | |
2241 void Assembler::orl(Address dst, int32_t imm32) { | |
2242 InstructionMark im(this); | |
2243 prefix(dst); | |
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2244 emit_arith_operand(0x81, rcx, dst, imm32); |
304 | 2245 } |
2246 | |
2247 void Assembler::orl(Register dst, int32_t imm32) { | |
2248 prefix(dst); | |
2249 emit_arith(0x81, 0xC8, dst, imm32); | |
2250 } | |
2251 | |
2252 void Assembler::orl(Register dst, Address src) { | |
2253 InstructionMark im(this); | |
2254 prefix(src, dst); | |
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2255 emit_int8(0x0B); |
304 | 2256 emit_operand(dst, src); |
2257 } | |
2258 | |
2259 void Assembler::orl(Register dst, Register src) { | |
2260 (void) prefix_and_encode(dst->encoding(), src->encoding()); | |
2261 emit_arith(0x0B, 0xC0, dst, src); | |
2262 } | |
2263 | |
4759 | 2264 void Assembler::packuswb(XMMRegister dst, Address src) { |
2265 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
2266 assert((UseAVX > 0), "SSE mode requires address alignment 16 bytes"); | |
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2267 emit_simd_arith(0x67, dst, src, VEX_SIMD_66); |
4759 | 2268 } |
2269 | |
2270 void Assembler::packuswb(XMMRegister dst, XMMRegister src) { | |
2271 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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2272 emit_simd_arith(0x67, dst, src, VEX_SIMD_66); |
4759 | 2273 } |
2274 | |
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2275 void Assembler::vpackuswb(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
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2276 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
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2277 emit_vex_arith(0x67, dst, nds, src, VEX_SIMD_66, vector256); |
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2278 } |
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|
2279 |
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2280 void Assembler::vpermq(XMMRegister dst, XMMRegister src, int imm8, bool vector256) { |
8042
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2281 assert(VM_Version::supports_avx2(), ""); |
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2282 int encode = simd_prefix_and_encode(dst, xnoreg, src, VEX_SIMD_66, VEX_OPCODE_0F_3A, true, vector256); |
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2283 emit_int8(0x00); |
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|
2284 emit_int8(0xC0 | encode); |
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|
2285 emit_int8(imm8); |
7637
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2286 } |
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2287 |
681 | 2288 void Assembler::pcmpestri(XMMRegister dst, Address src, int imm8) { |
2289 assert(VM_Version::supports_sse4_2(), ""); | |
4759 | 2290 InstructionMark im(this); |
2291 simd_prefix(dst, src, VEX_SIMD_66, VEX_OPCODE_0F_3A); | |
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|
2292 emit_int8(0x61); |
681 | 2293 emit_operand(dst, src); |
7430
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|
2294 emit_int8(imm8); |
681 | 2295 } |
2296 | |
2297 void Assembler::pcmpestri(XMMRegister dst, XMMRegister src, int imm8) { | |
2298 assert(VM_Version::supports_sse4_2(), ""); | |
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2299 int encode = simd_prefix_and_encode(dst, xnoreg, src, VEX_SIMD_66, VEX_OPCODE_0F_3A); |
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|
2300 emit_int8(0x61); |
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|
2301 emit_int8((unsigned char)(0xC0 | encode)); |
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|
2302 emit_int8(imm8); |
681 | 2303 } |
2304 | |
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2305 void Assembler::pextrd(Register dst, XMMRegister src, int imm8) { |
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2306 assert(VM_Version::supports_sse4_1(), ""); |
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|
2307 int encode = simd_prefix_and_encode(as_XMMRegister(dst->encoding()), xnoreg, src, VEX_SIMD_66, VEX_OPCODE_0F_3A, false); |
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|
2308 emit_int8(0x16); |
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|
2309 emit_int8((unsigned char)(0xC0 | encode)); |
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|
2310 emit_int8(imm8); |
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2311 } |
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|
2312 |
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2313 void Assembler::pextrq(Register dst, XMMRegister src, int imm8) { |
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|
2314 assert(VM_Version::supports_sse4_1(), ""); |
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2315 int encode = simd_prefix_and_encode(as_XMMRegister(dst->encoding()), xnoreg, src, VEX_SIMD_66, VEX_OPCODE_0F_3A, true); |
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|
2316 emit_int8(0x16); |
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|
2317 emit_int8((unsigned char)(0xC0 | encode)); |
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|
2318 emit_int8(imm8); |
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|
2319 } |
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|
2320 |
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2321 void Assembler::pinsrd(XMMRegister dst, Register src, int imm8) { |
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|
2322 assert(VM_Version::supports_sse4_1(), ""); |
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|
2323 int encode = simd_prefix_and_encode(dst, dst, as_XMMRegister(src->encoding()), VEX_SIMD_66, VEX_OPCODE_0F_3A, false); |
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|
2324 emit_int8(0x22); |
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7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
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|
2325 emit_int8((unsigned char)(0xC0 | encode)); |
b800986664f4
7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
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|
2326 emit_int8(imm8); |
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|
2327 } |
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|
2328 |
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|
2329 void Assembler::pinsrq(XMMRegister dst, Register src, int imm8) { |
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7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
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|
2330 assert(VM_Version::supports_sse4_1(), ""); |
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7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
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|
2331 int encode = simd_prefix_and_encode(dst, dst, as_XMMRegister(src->encoding()), VEX_SIMD_66, VEX_OPCODE_0F_3A, true); |
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|
2332 emit_int8(0x22); |
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changeset
|
2333 emit_int8((unsigned char)(0xC0 | encode)); |
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|
2334 emit_int8(imm8); |
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|
2335 } |
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|
2336 |
4759 | 2337 void Assembler::pmovzxbw(XMMRegister dst, Address src) { |
2338 assert(VM_Version::supports_sse4_1(), ""); | |
2339 InstructionMark im(this); | |
2340 simd_prefix(dst, src, VEX_SIMD_66, VEX_OPCODE_0F_38); | |
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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7427
diff
changeset
|
2341 emit_int8(0x30); |
4759 | 2342 emit_operand(dst, src); |
2343 } | |
2344 | |
2345 void Assembler::pmovzxbw(XMMRegister dst, XMMRegister src) { | |
2346 assert(VM_Version::supports_sse4_1(), ""); | |
6614
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|
2347 int encode = simd_prefix_and_encode(dst, xnoreg, src, VEX_SIMD_66, VEX_OPCODE_0F_38); |
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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diff
changeset
|
2348 emit_int8(0x30); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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7427
diff
changeset
|
2349 emit_int8((unsigned char)(0xC0 | encode)); |
4759 | 2350 } |
2351 | |
304 | 2352 // generic |
2353 void Assembler::pop(Register dst) { | |
2354 int encode = prefix_and_encode(dst->encoding()); | |
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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parents:
7427
diff
changeset
|
2355 emit_int8(0x58 | encode); |
304 | 2356 } |
2357 | |
643
c771b7f43bbf
6378821: bitCount() should use POPC on SPARC processors and AMD+10h
twisti
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642
diff
changeset
|
2358 void Assembler::popcntl(Register dst, Address src) { |
c771b7f43bbf
6378821: bitCount() should use POPC on SPARC processors and AMD+10h
twisti
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642
diff
changeset
|
2359 assert(VM_Version::supports_popcnt(), "must support"); |
c771b7f43bbf
6378821: bitCount() should use POPC on SPARC processors and AMD+10h
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parents:
642
diff
changeset
|
2360 InstructionMark im(this); |
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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diff
changeset
|
2361 emit_int8((unsigned char)0xF3); |
643
c771b7f43bbf
6378821: bitCount() should use POPC on SPARC processors and AMD+10h
twisti
parents:
642
diff
changeset
|
2362 prefix(src, dst); |
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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diff
changeset
|
2363 emit_int8(0x0F); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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7427
diff
changeset
|
2364 emit_int8((unsigned char)0xB8); |
643
c771b7f43bbf
6378821: bitCount() should use POPC on SPARC processors and AMD+10h
twisti
parents:
642
diff
changeset
|
2365 emit_operand(dst, src); |
c771b7f43bbf
6378821: bitCount() should use POPC on SPARC processors and AMD+10h
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642
diff
changeset
|
2366 } |
c771b7f43bbf
6378821: bitCount() should use POPC on SPARC processors and AMD+10h
twisti
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642
diff
changeset
|
2367 |
c771b7f43bbf
6378821: bitCount() should use POPC on SPARC processors and AMD+10h
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diff
changeset
|
2368 void Assembler::popcntl(Register dst, Register src) { |
c771b7f43bbf
6378821: bitCount() should use POPC on SPARC processors and AMD+10h
twisti
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642
diff
changeset
|
2369 assert(VM_Version::supports_popcnt(), "must support"); |
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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diff
changeset
|
2370 emit_int8((unsigned char)0xF3); |
643
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6378821: bitCount() should use POPC on SPARC processors and AMD+10h
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parents:
642
diff
changeset
|
2371 int encode = prefix_and_encode(dst->encoding(), src->encoding()); |
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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diff
changeset
|
2372 emit_int8(0x0F); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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parents:
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diff
changeset
|
2373 emit_int8((unsigned char)0xB8); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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parents:
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diff
changeset
|
2374 emit_int8((unsigned char)(0xC0 | encode)); |
643
c771b7f43bbf
6378821: bitCount() should use POPC on SPARC processors and AMD+10h
twisti
parents:
642
diff
changeset
|
2375 } |
c771b7f43bbf
6378821: bitCount() should use POPC on SPARC processors and AMD+10h
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diff
changeset
|
2376 |
304 | 2377 void Assembler::popf() { |
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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parents:
7427
diff
changeset
|
2378 emit_int8((unsigned char)0x9D); |
304 | 2379 } |
2380 | |
1060 | 2381 #ifndef _LP64 // no 32bit push/pop on amd64 |
304 | 2382 void Assembler::popl(Address dst) { |
2383 // NOTE: this will adjust stack by 8byte on 64bits | |
2384 InstructionMark im(this); | |
2385 prefix(dst); | |
7430
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changeset
|
2386 emit_int8((unsigned char)0x8F); |
304 | 2387 emit_operand(rax, dst); |
2388 } | |
1060 | 2389 #endif |
304 | 2390 |
2391 void Assembler::prefetch_prefix(Address src) { | |
2392 prefix(src); | |
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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changeset
|
2393 emit_int8(0x0F); |
304 | 2394 } |
2395 | |
2396 void Assembler::prefetchnta(Address src) { | |
3873
a594deb1d6dc
7081926: assert(VM_Version::supports_sse2()) failed: must support
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3855
diff
changeset
|
2397 NOT_LP64(assert(VM_Version::supports_sse(), "must support")); |
304 | 2398 InstructionMark im(this); |
2399 prefetch_prefix(src); | |
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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diff
changeset
|
2400 emit_int8(0x18); |
304 | 2401 emit_operand(rax, src); // 0, src |
2402 } | |
2403 | |
2404 void Assembler::prefetchr(Address src) { | |
3854 | 2405 assert(VM_Version::supports_3dnow_prefetch(), "must support"); |
304 | 2406 InstructionMark im(this); |
2407 prefetch_prefix(src); | |
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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changeset
|
2408 emit_int8(0x0D); |
304 | 2409 emit_operand(rax, src); // 0, src |
2410 } | |
2411 | |
2412 void Assembler::prefetcht0(Address src) { | |
2413 NOT_LP64(assert(VM_Version::supports_sse(), "must support")); | |
2414 InstructionMark im(this); | |
2415 prefetch_prefix(src); | |
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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changeset
|
2416 emit_int8(0x18); |
304 | 2417 emit_operand(rcx, src); // 1, src |
2418 } | |
2419 | |
2420 void Assembler::prefetcht1(Address src) { | |
2421 NOT_LP64(assert(VM_Version::supports_sse(), "must support")); | |
2422 InstructionMark im(this); | |
2423 prefetch_prefix(src); | |
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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changeset
|
2424 emit_int8(0x18); |
304 | 2425 emit_operand(rdx, src); // 2, src |
2426 } | |
2427 | |
2428 void Assembler::prefetcht2(Address src) { | |
2429 NOT_LP64(assert(VM_Version::supports_sse(), "must support")); | |
2430 InstructionMark im(this); | |
2431 prefetch_prefix(src); | |
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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changeset
|
2432 emit_int8(0x18); |
304 | 2433 emit_operand(rbx, src); // 3, src |
2434 } | |
2435 | |
2436 void Assembler::prefetchw(Address src) { | |
3854 | 2437 assert(VM_Version::supports_3dnow_prefetch(), "must support"); |
304 | 2438 InstructionMark im(this); |
2439 prefetch_prefix(src); | |
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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changeset
|
2440 emit_int8(0x0D); |
304 | 2441 emit_operand(rcx, src); // 1, src |
2442 } | |
2443 | |
2444 void Assembler::prefix(Prefix p) { | |
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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changeset
|
2445 emit_int8(p); |
304 | 2446 } |
2447 | |
6894 | 2448 void Assembler::pshufb(XMMRegister dst, XMMRegister src) { |
2449 assert(VM_Version::supports_ssse3(), ""); | |
2450 int encode = simd_prefix_and_encode(dst, dst, src, VEX_SIMD_66, VEX_OPCODE_0F_38); | |
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changeset
|
2451 emit_int8(0x00); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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changeset
|
2452 emit_int8((unsigned char)(0xC0 | encode)); |
6894 | 2453 } |
2454 | |
2455 void Assembler::pshufb(XMMRegister dst, Address src) { | |
2456 assert(VM_Version::supports_ssse3(), ""); | |
2457 InstructionMark im(this); | |
2458 simd_prefix(dst, dst, src, VEX_SIMD_66, VEX_OPCODE_0F_38); | |
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changeset
|
2459 emit_int8(0x00); |
6894 | 2460 emit_operand(dst, src); |
2461 } | |
2462 | |
304 | 2463 void Assembler::pshufd(XMMRegister dst, XMMRegister src, int mode) { |
2464 assert(isByte(mode), "invalid value"); | |
2465 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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|
2466 emit_simd_arith_nonds(0x70, dst, src, VEX_SIMD_66); |
7430
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changeset
|
2467 emit_int8(mode & 0xFF); |
304 | 2468 |
2469 } | |
2470 | |
2471 void Assembler::pshufd(XMMRegister dst, Address src, int mode) { | |
2472 assert(isByte(mode), "invalid value"); | |
2473 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
4759 | 2474 assert((UseAVX > 0), "SSE mode requires address alignment 16 bytes"); |
2475 InstructionMark im(this); | |
2476 simd_prefix(dst, src, VEX_SIMD_66); | |
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2477 emit_int8(0x70); |
304 | 2478 emit_operand(dst, src); |
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2479 emit_int8(mode & 0xFF); |
304 | 2480 } |
2481 | |
2482 void Assembler::pshuflw(XMMRegister dst, XMMRegister src, int mode) { | |
2483 assert(isByte(mode), "invalid value"); | |
2484 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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2485 emit_simd_arith_nonds(0x70, dst, src, VEX_SIMD_F2); |
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2486 emit_int8(mode & 0xFF); |
304 | 2487 } |
2488 | |
2489 void Assembler::pshuflw(XMMRegister dst, Address src, int mode) { | |
2490 assert(isByte(mode), "invalid value"); | |
2491 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
4759 | 2492 assert((UseAVX > 0), "SSE mode requires address alignment 16 bytes"); |
2493 InstructionMark im(this); | |
2494 simd_prefix(dst, src, VEX_SIMD_F2); | |
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2495 emit_int8(0x70); |
304 | 2496 emit_operand(dst, src); |
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2497 emit_int8(mode & 0xFF); |
304 | 2498 } |
2499 | |
2320
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2500 void Assembler::psrldq(XMMRegister dst, int shift) { |
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2501 // Shift 128 bit value in xmm register by number of bytes. |
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2502 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
4759 | 2503 int encode = simd_prefix_and_encode(xmm3, dst, dst, VEX_SIMD_66); |
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2504 emit_int8(0x73); |
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2505 emit_int8((unsigned char)(0xC0 | encode)); |
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2506 emit_int8(shift); |
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2507 } |
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2508 |
681 | 2509 void Assembler::ptest(XMMRegister dst, Address src) { |
2510 assert(VM_Version::supports_sse4_1(), ""); | |
4759 | 2511 assert((UseAVX > 0), "SSE mode requires address alignment 16 bytes"); |
2512 InstructionMark im(this); | |
2513 simd_prefix(dst, src, VEX_SIMD_66, VEX_OPCODE_0F_38); | |
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2514 emit_int8(0x17); |
681 | 2515 emit_operand(dst, src); |
2516 } | |
2517 | |
2518 void Assembler::ptest(XMMRegister dst, XMMRegister src) { | |
2519 assert(VM_Version::supports_sse4_1(), ""); | |
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2520 int encode = simd_prefix_and_encode(dst, xnoreg, src, VEX_SIMD_66, VEX_OPCODE_0F_38); |
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2521 emit_int8(0x17); |
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2522 emit_int8((unsigned char)(0xC0 | encode)); |
681 | 2523 } |
2524 | |
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2525 void Assembler::vptest(XMMRegister dst, Address src) { |
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2526 assert(VM_Version::supports_avx(), ""); |
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2527 InstructionMark im(this); |
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2528 bool vector256 = true; |
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2529 assert(dst != xnoreg, "sanity"); |
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2530 int dst_enc = dst->encoding(); |
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2531 // swap src<->dst for encoding |
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2532 vex_prefix(src, 0, dst_enc, VEX_SIMD_66, VEX_OPCODE_0F_38, false, vector256); |
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2533 emit_int8(0x17); |
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2534 emit_operand(dst, src); |
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|
2535 } |
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|
2536 |
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2537 void Assembler::vptest(XMMRegister dst, XMMRegister src) { |
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2538 assert(VM_Version::supports_avx(), ""); |
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2539 bool vector256 = true; |
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2540 int encode = vex_prefix_and_encode(dst, xnoreg, src, VEX_SIMD_66, vector256, VEX_OPCODE_0F_38); |
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2541 emit_int8(0x17); |
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2542 emit_int8((unsigned char)(0xC0 | encode)); |
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2543 } |
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2544 |
4759 | 2545 void Assembler::punpcklbw(XMMRegister dst, Address src) { |
2546 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
2547 assert((UseAVX > 0), "SSE mode requires address alignment 16 bytes"); | |
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2548 emit_simd_arith(0x60, dst, src, VEX_SIMD_66); |
4759 | 2549 } |
2550 | |
304 | 2551 void Assembler::punpcklbw(XMMRegister dst, XMMRegister src) { |
2552 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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2553 emit_simd_arith(0x60, dst, src, VEX_SIMD_66); |
304 | 2554 } |
2555 | |
4759 | 2556 void Assembler::punpckldq(XMMRegister dst, Address src) { |
2557 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
2558 assert((UseAVX > 0), "SSE mode requires address alignment 16 bytes"); | |
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2559 emit_simd_arith(0x62, dst, src, VEX_SIMD_66); |
4759 | 2560 } |
2561 | |
2562 void Assembler::punpckldq(XMMRegister dst, XMMRegister src) { | |
2563 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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2564 emit_simd_arith(0x62, dst, src, VEX_SIMD_66); |
4759 | 2565 } |
2566 | |
6225 | 2567 void Assembler::punpcklqdq(XMMRegister dst, XMMRegister src) { |
2568 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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2569 emit_simd_arith(0x6C, dst, src, VEX_SIMD_66); |
6225 | 2570 } |
2571 | |
304 | 2572 void Assembler::push(int32_t imm32) { |
2573 // in 64bits we push 64bits onto the stack but only | |
2574 // take a 32bit immediate | |
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2575 emit_int8(0x68); |
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2576 emit_int32(imm32); |
304 | 2577 } |
2578 | |
2579 void Assembler::push(Register src) { | |
2580 int encode = prefix_and_encode(src->encoding()); | |
2581 | |
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2582 emit_int8(0x50 | encode); |
304 | 2583 } |
2584 | |
2585 void Assembler::pushf() { | |
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2586 emit_int8((unsigned char)0x9C); |
304 | 2587 } |
2588 | |
1060 | 2589 #ifndef _LP64 // no 32bit push/pop on amd64 |
304 | 2590 void Assembler::pushl(Address src) { |
2591 // Note this will push 64bit on 64bit | |
2592 InstructionMark im(this); | |
2593 prefix(src); | |
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2594 emit_int8((unsigned char)0xFF); |
304 | 2595 emit_operand(rsi, src); |
2596 } | |
1060 | 2597 #endif |
304 | 2598 |
2599 void Assembler::rcll(Register dst, int imm8) { | |
2600 assert(isShiftCount(imm8), "illegal shift count"); | |
2601 int encode = prefix_and_encode(dst->encoding()); | |
2602 if (imm8 == 1) { | |
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2603 emit_int8((unsigned char)0xD1); |
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2604 emit_int8((unsigned char)(0xD0 | encode)); |
304 | 2605 } else { |
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|
2606 emit_int8((unsigned char)0xC1); |
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|
2607 emit_int8((unsigned char)0xD0 | encode); |
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2608 emit_int8(imm8); |
304 | 2609 } |
2610 } | |
2611 | |
2612 // copies data from [esi] to [edi] using rcx pointer sized words | |
2613 // generic | |
2614 void Assembler::rep_mov() { | |
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2615 emit_int8((unsigned char)0xF3); |
304 | 2616 // MOVSQ |
2617 LP64_ONLY(prefix(REX_W)); | |
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2618 emit_int8((unsigned char)0xA5); |
304 | 2619 } |
2620 | |
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2621 // sets rcx bytes with rax, value at [edi] |
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2622 void Assembler::rep_stosb() { |
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2623 emit_int8((unsigned char)0xF3); // REP |
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2624 LP64_ONLY(prefix(REX_W)); |
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2625 emit_int8((unsigned char)0xAA); // STOSB |
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2626 } |
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2627 |
304 | 2628 // sets rcx pointer sized words with rax, value at [edi] |
2629 // generic | |
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2630 void Assembler::rep_stos() { |
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2631 emit_int8((unsigned char)0xF3); // REP |
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2632 LP64_ONLY(prefix(REX_W)); // LP64:STOSQ, LP32:STOSD |
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2633 emit_int8((unsigned char)0xAB); |
304 | 2634 } |
2635 | |
2636 // scans rcx pointer sized words at [edi] for occurance of rax, | |
2637 // generic | |
2638 void Assembler::repne_scan() { // repne_scan | |
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2639 emit_int8((unsigned char)0xF2); |
304 | 2640 // SCASQ |
2641 LP64_ONLY(prefix(REX_W)); | |
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2642 emit_int8((unsigned char)0xAF); |
304 | 2643 } |
2644 | |
2645 #ifdef _LP64 | |
2646 // scans rcx 4 byte words at [edi] for occurance of rax, | |
2647 // generic | |
2648 void Assembler::repne_scanl() { // repne_scan | |
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|
2649 emit_int8((unsigned char)0xF2); |
304 | 2650 // SCASL |
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2651 emit_int8((unsigned char)0xAF); |
304 | 2652 } |
2653 #endif | |
2654 | |
0 | 2655 void Assembler::ret(int imm16) { |
2656 if (imm16 == 0) { | |
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2657 emit_int8((unsigned char)0xC3); |
0 | 2658 } else { |
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|
2659 emit_int8((unsigned char)0xC2); |
7424
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2660 emit_int16(imm16); |
0 | 2661 } |
2662 } | |
2663 | |
304 | 2664 void Assembler::sahf() { |
2665 #ifdef _LP64 | |
2666 // Not supported in 64bit mode | |
2667 ShouldNotReachHere(); | |
2668 #endif | |
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2669 emit_int8((unsigned char)0x9E); |
304 | 2670 } |
2671 | |
2672 void Assembler::sarl(Register dst, int imm8) { | |
2673 int encode = prefix_and_encode(dst->encoding()); | |
2674 assert(isShiftCount(imm8), "illegal shift count"); | |
2675 if (imm8 == 1) { | |
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2676 emit_int8((unsigned char)0xD1); |
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|
2677 emit_int8((unsigned char)(0xF8 | encode)); |
304 | 2678 } else { |
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|
2679 emit_int8((unsigned char)0xC1); |
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|
2680 emit_int8((unsigned char)(0xF8 | encode)); |
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|
2681 emit_int8(imm8); |
304 | 2682 } |
2683 } | |
2684 | |
2685 void Assembler::sarl(Register dst) { | |
2686 int encode = prefix_and_encode(dst->encoding()); | |
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|
2687 emit_int8((unsigned char)0xD3); |
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|
2688 emit_int8((unsigned char)(0xF8 | encode)); |
304 | 2689 } |
2690 | |
2691 void Assembler::sbbl(Address dst, int32_t imm32) { | |
2692 InstructionMark im(this); | |
2693 prefix(dst); | |
2694 emit_arith_operand(0x81, rbx, dst, imm32); | |
2695 } | |
2696 | |
2697 void Assembler::sbbl(Register dst, int32_t imm32) { | |
2698 prefix(dst); | |
2699 emit_arith(0x81, 0xD8, dst, imm32); | |
2700 } | |
2701 | |
2702 | |
2703 void Assembler::sbbl(Register dst, Address src) { | |
2704 InstructionMark im(this); | |
2705 prefix(src, dst); | |
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2706 emit_int8(0x1B); |
304 | 2707 emit_operand(dst, src); |
2708 } | |
2709 | |
2710 void Assembler::sbbl(Register dst, Register src) { | |
2711 (void) prefix_and_encode(dst->encoding(), src->encoding()); | |
2712 emit_arith(0x1B, 0xC0, dst, src); | |
2713 } | |
2714 | |
2715 void Assembler::setb(Condition cc, Register dst) { | |
2716 assert(0 <= cc && cc < 16, "illegal cc"); | |
2717 int encode = prefix_and_encode(dst->encoding(), true); | |
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|
2718 emit_int8(0x0F); |
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|
2719 emit_int8((unsigned char)0x90 | cc); |
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2720 emit_int8((unsigned char)(0xC0 | encode)); |
304 | 2721 } |
2722 | |
2723 void Assembler::shll(Register dst, int imm8) { | |
2724 assert(isShiftCount(imm8), "illegal shift count"); | |
2725 int encode = prefix_and_encode(dst->encoding()); | |
2726 if (imm8 == 1 ) { | |
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|
2727 emit_int8((unsigned char)0xD1); |
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2728 emit_int8((unsigned char)(0xE0 | encode)); |
304 | 2729 } else { |
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|
2730 emit_int8((unsigned char)0xC1); |
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|
2731 emit_int8((unsigned char)(0xE0 | encode)); |
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2732 emit_int8(imm8); |
304 | 2733 } |
2734 } | |
2735 | |
2736 void Assembler::shll(Register dst) { | |
2737 int encode = prefix_and_encode(dst->encoding()); | |
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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|
2738 emit_int8((unsigned char)0xD3); |
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changeset
|
2739 emit_int8((unsigned char)(0xE0 | encode)); |
304 | 2740 } |
2741 | |
2742 void Assembler::shrl(Register dst, int imm8) { | |
2743 assert(isShiftCount(imm8), "illegal shift count"); | |
2744 int encode = prefix_and_encode(dst->encoding()); | |
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|
2745 emit_int8((unsigned char)0xC1); |
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|
2746 emit_int8((unsigned char)(0xE8 | encode)); |
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|
2747 emit_int8(imm8); |
304 | 2748 } |
2749 | |
2750 void Assembler::shrl(Register dst) { | |
2751 int encode = prefix_and_encode(dst->encoding()); | |
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|
2752 emit_int8((unsigned char)0xD3); |
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changeset
|
2753 emit_int8((unsigned char)(0xE8 | encode)); |
304 | 2754 } |
0 | 2755 |
2756 // copies a single word from [esi] to [edi] | |
2757 void Assembler::smovl() { | |
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|
2758 emit_int8((unsigned char)0xA5); |
0 | 2759 } |
2760 | |
304 | 2761 void Assembler::sqrtsd(XMMRegister dst, XMMRegister src) { |
2762 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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|
2763 emit_simd_arith(0x51, dst, src, VEX_SIMD_F2); |
304 | 2764 } |
2765 | |
2008 | 2766 void Assembler::sqrtsd(XMMRegister dst, Address src) { |
2767 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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|
2768 emit_simd_arith(0x51, dst, src, VEX_SIMD_F2); |
2008 | 2769 } |
2770 | |
2771 void Assembler::sqrtss(XMMRegister dst, XMMRegister src) { | |
4759 | 2772 NOT_LP64(assert(VM_Version::supports_sse(), "")); |
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|
2773 emit_simd_arith(0x51, dst, src, VEX_SIMD_F3); |
2008 | 2774 } |
2775 | |
7199
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|
2776 void Assembler::std() { |
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|
2777 emit_int8((unsigned char)0xFD); |
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|
2778 } |
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|
2779 |
2008 | 2780 void Assembler::sqrtss(XMMRegister dst, Address src) { |
4759 | 2781 NOT_LP64(assert(VM_Version::supports_sse(), "")); |
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|
2782 emit_simd_arith(0x51, dst, src, VEX_SIMD_F3); |
2008 | 2783 } |
2784 | |
304 | 2785 void Assembler::stmxcsr( Address dst) { |
2786 NOT_LP64(assert(VM_Version::supports_sse(), "")); | |
2787 InstructionMark im(this); | |
2788 prefix(dst); | |
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|
2789 emit_int8(0x0F); |
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|
2790 emit_int8((unsigned char)0xAE); |
304 | 2791 emit_operand(as_Register(3), dst); |
2792 } | |
2793 | |
2794 void Assembler::subl(Address dst, int32_t imm32) { | |
2795 InstructionMark im(this); | |
2796 prefix(dst); | |
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changeset
|
2797 emit_arith_operand(0x81, rbp, dst, imm32); |
304 | 2798 } |
2799 | |
2800 void Assembler::subl(Address dst, Register src) { | |
2801 InstructionMark im(this); | |
2802 prefix(dst, src); | |
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|
2803 emit_int8(0x29); |
304 | 2804 emit_operand(src, dst); |
2805 } | |
2806 | |
2100
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7003271: Hotspot should track cumulative Java heap bytes allocated on a per-thread basis
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diff
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|
2807 void Assembler::subl(Register dst, int32_t imm32) { |
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|
2808 prefix(dst); |
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changeset
|
2809 emit_arith(0x81, 0xE8, dst, imm32); |
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|
2810 } |
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diff
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|
2811 |
4947
fd8114661503
7125136: SIGILL on linux amd64 in gc/ArrayJuggle/Juggle29
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changeset
|
2812 // Force generation of a 4 byte immediate value even if it fits into 8bit |
fd8114661503
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|
2813 void Assembler::subl_imm32(Register dst, int32_t imm32) { |
fd8114661503
7125136: SIGILL on linux amd64 in gc/ArrayJuggle/Juggle29
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changeset
|
2814 prefix(dst); |
fd8114661503
7125136: SIGILL on linux amd64 in gc/ArrayJuggle/Juggle29
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changeset
|
2815 emit_arith_imm32(0x81, 0xE8, dst, imm32); |
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|
2816 } |
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|
2817 |
304 | 2818 void Assembler::subl(Register dst, Address src) { |
2819 InstructionMark im(this); | |
2820 prefix(src, dst); | |
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changeset
|
2821 emit_int8(0x2B); |
304 | 2822 emit_operand(dst, src); |
2823 } | |
2824 | |
2825 void Assembler::subl(Register dst, Register src) { | |
2826 (void) prefix_and_encode(dst->encoding(), src->encoding()); | |
2827 emit_arith(0x2B, 0xC0, dst, src); | |
2828 } | |
2829 | |
2830 void Assembler::subsd(XMMRegister dst, XMMRegister src) { | |
2831 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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|
2832 emit_simd_arith(0x5C, dst, src, VEX_SIMD_F2); |
304 | 2833 } |
2834 | |
2835 void Assembler::subsd(XMMRegister dst, Address src) { | |
2836 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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|
2837 emit_simd_arith(0x5C, dst, src, VEX_SIMD_F2); |
304 | 2838 } |
2839 | |
2840 void Assembler::subss(XMMRegister dst, XMMRegister src) { | |
2841 NOT_LP64(assert(VM_Version::supports_sse(), "")); | |
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|
2842 emit_simd_arith(0x5C, dst, src, VEX_SIMD_F3); |
304 | 2843 } |
2844 | |
2845 void Assembler::subss(XMMRegister dst, Address src) { | |
2846 NOT_LP64(assert(VM_Version::supports_sse(), "")); | |
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|
2847 emit_simd_arith(0x5C, dst, src, VEX_SIMD_F3); |
304 | 2848 } |
2849 | |
2850 void Assembler::testb(Register dst, int imm8) { | |
2851 NOT_LP64(assert(dst->has_byte_register(), "must have byte register")); | |
2852 (void) prefix_and_encode(dst->encoding(), true); | |
2853 emit_arith_b(0xF6, 0xC0, dst, imm8); | |
2854 } | |
2855 | |
2856 void Assembler::testl(Register dst, int32_t imm32) { | |
2857 // not using emit_arith because test | |
2858 // doesn't support sign-extension of | |
2859 // 8bit operands | |
2860 int encode = dst->encoding(); | |
2861 if (encode == 0) { | |
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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|
2862 emit_int8((unsigned char)0xA9); |
304 | 2863 } else { |
2864 encode = prefix_and_encode(encode); | |
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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|
2865 emit_int8((unsigned char)0xF7); |
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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changeset
|
2866 emit_int8((unsigned char)(0xC0 | encode)); |
304 | 2867 } |
7476
ffa87474d7a4
8004537: replace AbstractAssembler emit_long with emit_int32
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7475
diff
changeset
|
2868 emit_int32(imm32); |
304 | 2869 } |
2870 | |
2871 void Assembler::testl(Register dst, Register src) { | |
2872 (void) prefix_and_encode(dst->encoding(), src->encoding()); | |
2873 emit_arith(0x85, 0xC0, dst, src); | |
2874 } | |
2875 | |
2876 void Assembler::testl(Register dst, Address src) { | |
2877 InstructionMark im(this); | |
2878 prefix(src, dst); | |
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changeset
|
2879 emit_int8((unsigned char)0x85); |
304 | 2880 emit_operand(dst, src); |
2881 } | |
2882 | |
2883 void Assembler::ucomisd(XMMRegister dst, Address src) { | |
2884 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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|
2885 emit_simd_arith_nonds(0x2E, dst, src, VEX_SIMD_66); |
304 | 2886 } |
2887 | |
2888 void Assembler::ucomisd(XMMRegister dst, XMMRegister src) { | |
2889 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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|
2890 emit_simd_arith_nonds(0x2E, dst, src, VEX_SIMD_66); |
304 | 2891 } |
2892 | |
2893 void Assembler::ucomiss(XMMRegister dst, Address src) { | |
2894 NOT_LP64(assert(VM_Version::supports_sse(), "")); | |
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|
2895 emit_simd_arith_nonds(0x2E, dst, src, VEX_SIMD_NONE); |
304 | 2896 } |
2897 | |
2898 void Assembler::ucomiss(XMMRegister dst, XMMRegister src) { | |
2899 NOT_LP64(assert(VM_Version::supports_sse(), "")); | |
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|
2900 emit_simd_arith_nonds(0x2E, dst, src, VEX_SIMD_NONE); |
304 | 2901 } |
2902 | |
2903 | |
2904 void Assembler::xaddl(Address dst, Register src) { | |
2905 InstructionMark im(this); | |
2906 prefix(dst, src); | |
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|
2907 emit_int8(0x0F); |
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|
2908 emit_int8((unsigned char)0xC1); |
304 | 2909 emit_operand(src, dst); |
2910 } | |
2911 | |
2912 void Assembler::xchgl(Register dst, Address src) { // xchg | |
2913 InstructionMark im(this); | |
2914 prefix(src, dst); | |
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|
2915 emit_int8((unsigned char)0x87); |
304 | 2916 emit_operand(dst, src); |
2917 } | |
2918 | |
2919 void Assembler::xchgl(Register dst, Register src) { | |
2920 int encode = prefix_and_encode(dst->encoding(), src->encoding()); | |
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|
2921 emit_int8((unsigned char)0x87); |
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|
2922 emit_int8((unsigned char)(0xC0 | encode)); |
304 | 2923 } |
2924 | |
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|
2925 void Assembler::xgetbv() { |
7430
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|
2926 emit_int8(0x0F); |
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|
2927 emit_int8(0x01); |
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|
2928 emit_int8((unsigned char)0xD0); |
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|
2929 } |
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|
2930 |
304 | 2931 void Assembler::xorl(Register dst, int32_t imm32) { |
2932 prefix(dst); | |
2933 emit_arith(0x81, 0xF0, dst, imm32); | |
2934 } | |
2935 | |
2936 void Assembler::xorl(Register dst, Address src) { | |
2937 InstructionMark im(this); | |
2938 prefix(src, dst); | |
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changeset
|
2939 emit_int8(0x33); |
304 | 2940 emit_operand(dst, src); |
2941 } | |
2942 | |
2943 void Assembler::xorl(Register dst, Register src) { | |
2944 (void) prefix_and_encode(dst->encoding(), src->encoding()); | |
2945 emit_arith(0x33, 0xC0, dst, src); | |
2946 } | |
2947 | |
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|
2948 |
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|
2949 // AVX 3-operands scalar float-point arithmetic instructions |
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|
2950 |
65149e74c706
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|
2951 void Assembler::vaddsd(XMMRegister dst, XMMRegister nds, Address src) { |
65149e74c706
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|
2952 assert(VM_Version::supports_avx(), ""); |
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|
2953 emit_vex_arith(0x58, dst, nds, src, VEX_SIMD_F2, /* vector256 */ false); |
4761
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2954 } |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2955 |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2956 void Assembler::vaddsd(XMMRegister dst, XMMRegister nds, XMMRegister src) { |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2957 assert(VM_Version::supports_avx(), ""); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
2958 emit_vex_arith(0x58, dst, nds, src, VEX_SIMD_F2, /* vector256 */ false); |
4761
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2959 } |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2960 |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2961 void Assembler::vaddss(XMMRegister dst, XMMRegister nds, Address src) { |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2962 assert(VM_Version::supports_avx(), ""); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
2963 emit_vex_arith(0x58, dst, nds, src, VEX_SIMD_F3, /* vector256 */ false); |
4761
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2964 } |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2965 |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2966 void Assembler::vaddss(XMMRegister dst, XMMRegister nds, XMMRegister src) { |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2967 assert(VM_Version::supports_avx(), ""); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
2968 emit_vex_arith(0x58, dst, nds, src, VEX_SIMD_F3, /* vector256 */ false); |
4761
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2969 } |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2970 |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2971 void Assembler::vdivsd(XMMRegister dst, XMMRegister nds, Address src) { |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2972 assert(VM_Version::supports_avx(), ""); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
2973 emit_vex_arith(0x5E, dst, nds, src, VEX_SIMD_F2, /* vector256 */ false); |
4761
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2974 } |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2975 |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2976 void Assembler::vdivsd(XMMRegister dst, XMMRegister nds, XMMRegister src) { |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2977 assert(VM_Version::supports_avx(), ""); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
2978 emit_vex_arith(0x5E, dst, nds, src, VEX_SIMD_F2, /* vector256 */ false); |
4761
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2979 } |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2980 |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2981 void Assembler::vdivss(XMMRegister dst, XMMRegister nds, Address src) { |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2982 assert(VM_Version::supports_avx(), ""); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
2983 emit_vex_arith(0x5E, dst, nds, src, VEX_SIMD_F3, /* vector256 */ false); |
4761
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2984 } |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2985 |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2986 void Assembler::vdivss(XMMRegister dst, XMMRegister nds, XMMRegister src) { |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2987 assert(VM_Version::supports_avx(), ""); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
2988 emit_vex_arith(0x5E, dst, nds, src, VEX_SIMD_F3, /* vector256 */ false); |
4761
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2989 } |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2990 |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2991 void Assembler::vmulsd(XMMRegister dst, XMMRegister nds, Address src) { |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2992 assert(VM_Version::supports_avx(), ""); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
2993 emit_vex_arith(0x59, dst, nds, src, VEX_SIMD_F2, /* vector256 */ false); |
4761
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2994 } |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2995 |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2996 void Assembler::vmulsd(XMMRegister dst, XMMRegister nds, XMMRegister src) { |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2997 assert(VM_Version::supports_avx(), ""); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
2998 emit_vex_arith(0x59, dst, nds, src, VEX_SIMD_F2, /* vector256 */ false); |
4761
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2999 } |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
3000 |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
3001 void Assembler::vmulss(XMMRegister dst, XMMRegister nds, Address src) { |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3002 assert(VM_Version::supports_avx(), ""); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3003 emit_vex_arith(0x59, dst, nds, src, VEX_SIMD_F3, /* vector256 */ false); |
4761
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
3004 } |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
3005 |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
3006 void Assembler::vmulss(XMMRegister dst, XMMRegister nds, XMMRegister src) { |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
3007 assert(VM_Version::supports_avx(), ""); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3008 emit_vex_arith(0x59, dst, nds, src, VEX_SIMD_F3, /* vector256 */ false); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3009 } |
4761
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
3010 |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
3011 void Assembler::vsubsd(XMMRegister dst, XMMRegister nds, Address src) { |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
3012 assert(VM_Version::supports_avx(), ""); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3013 emit_vex_arith(0x5C, dst, nds, src, VEX_SIMD_F2, /* vector256 */ false); |
4761
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
3014 } |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
3015 |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
3016 void Assembler::vsubsd(XMMRegister dst, XMMRegister nds, XMMRegister src) { |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
3017 assert(VM_Version::supports_avx(), ""); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3018 emit_vex_arith(0x5C, dst, nds, src, VEX_SIMD_F2, /* vector256 */ false); |
4761
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
3019 } |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
3020 |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
3021 void Assembler::vsubss(XMMRegister dst, XMMRegister nds, Address src) { |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
3022 assert(VM_Version::supports_avx(), ""); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3023 emit_vex_arith(0x5C, dst, nds, src, VEX_SIMD_F3, /* vector256 */ false); |
4761
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
3024 } |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
3025 |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
3026 void Assembler::vsubss(XMMRegister dst, XMMRegister nds, XMMRegister src) { |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
3027 assert(VM_Version::supports_avx(), ""); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3028 emit_vex_arith(0x5C, dst, nds, src, VEX_SIMD_F3, /* vector256 */ false); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3029 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3030 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3031 //====================VECTOR ARITHMETIC===================================== |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3032 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3033 // Float-point vector arithmetic |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3034 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3035 void Assembler::addpd(XMMRegister dst, XMMRegister src) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3036 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3037 emit_simd_arith(0x58, dst, src, VEX_SIMD_66); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3038 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3039 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3040 void Assembler::addps(XMMRegister dst, XMMRegister src) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3041 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3042 emit_simd_arith(0x58, dst, src, VEX_SIMD_NONE); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3043 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3044 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3045 void Assembler::vaddpd(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3046 assert(VM_Version::supports_avx(), ""); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3047 emit_vex_arith(0x58, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3048 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3049 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3050 void Assembler::vaddps(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3051 assert(VM_Version::supports_avx(), ""); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3052 emit_vex_arith(0x58, dst, nds, src, VEX_SIMD_NONE, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3053 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3054 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3055 void Assembler::vaddpd(XMMRegister dst, XMMRegister nds, Address src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3056 assert(VM_Version::supports_avx(), ""); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3057 emit_vex_arith(0x58, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3058 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3059 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3060 void Assembler::vaddps(XMMRegister dst, XMMRegister nds, Address src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3061 assert(VM_Version::supports_avx(), ""); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3062 emit_vex_arith(0x58, dst, nds, src, VEX_SIMD_NONE, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3063 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3064 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3065 void Assembler::subpd(XMMRegister dst, XMMRegister src) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3066 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3067 emit_simd_arith(0x5C, dst, src, VEX_SIMD_66); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3068 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3069 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3070 void Assembler::subps(XMMRegister dst, XMMRegister src) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3071 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3072 emit_simd_arith(0x5C, dst, src, VEX_SIMD_NONE); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3073 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3074 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3075 void Assembler::vsubpd(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3076 assert(VM_Version::supports_avx(), ""); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3077 emit_vex_arith(0x5C, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3078 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3079 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3080 void Assembler::vsubps(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3081 assert(VM_Version::supports_avx(), ""); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3082 emit_vex_arith(0x5C, dst, nds, src, VEX_SIMD_NONE, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3083 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3084 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3085 void Assembler::vsubpd(XMMRegister dst, XMMRegister nds, Address src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3086 assert(VM_Version::supports_avx(), ""); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3087 emit_vex_arith(0x5C, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3088 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3089 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3090 void Assembler::vsubps(XMMRegister dst, XMMRegister nds, Address src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3091 assert(VM_Version::supports_avx(), ""); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3092 emit_vex_arith(0x5C, dst, nds, src, VEX_SIMD_NONE, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3093 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3094 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3095 void Assembler::mulpd(XMMRegister dst, XMMRegister src) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3096 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3097 emit_simd_arith(0x59, dst, src, VEX_SIMD_66); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3098 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3099 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3100 void Assembler::mulps(XMMRegister dst, XMMRegister src) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3101 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3102 emit_simd_arith(0x59, dst, src, VEX_SIMD_NONE); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3103 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3104 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3105 void Assembler::vmulpd(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3106 assert(VM_Version::supports_avx(), ""); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3107 emit_vex_arith(0x59, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3108 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3109 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3110 void Assembler::vmulps(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3111 assert(VM_Version::supports_avx(), ""); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3112 emit_vex_arith(0x59, dst, nds, src, VEX_SIMD_NONE, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3113 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3114 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3115 void Assembler::vmulpd(XMMRegister dst, XMMRegister nds, Address src, bool vector256) { |
4761
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
3116 assert(VM_Version::supports_avx(), ""); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3117 emit_vex_arith(0x59, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3118 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3119 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3120 void Assembler::vmulps(XMMRegister dst, XMMRegister nds, Address src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3121 assert(VM_Version::supports_avx(), ""); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3122 emit_vex_arith(0x59, dst, nds, src, VEX_SIMD_NONE, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3123 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3124 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3125 void Assembler::divpd(XMMRegister dst, XMMRegister src) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3126 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3127 emit_simd_arith(0x5E, dst, src, VEX_SIMD_66); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3128 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3129 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3130 void Assembler::divps(XMMRegister dst, XMMRegister src) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3131 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3132 emit_simd_arith(0x5E, dst, src, VEX_SIMD_NONE); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3133 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3134 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3135 void Assembler::vdivpd(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3136 assert(VM_Version::supports_avx(), ""); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3137 emit_vex_arith(0x5E, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3138 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3139 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3140 void Assembler::vdivps(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3141 assert(VM_Version::supports_avx(), ""); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3142 emit_vex_arith(0x5E, dst, nds, src, VEX_SIMD_NONE, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3143 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3144 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3145 void Assembler::vdivpd(XMMRegister dst, XMMRegister nds, Address src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3146 assert(VM_Version::supports_avx(), ""); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3147 emit_vex_arith(0x5E, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3148 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3149 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3150 void Assembler::vdivps(XMMRegister dst, XMMRegister nds, Address src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3151 assert(VM_Version::supports_avx(), ""); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3152 emit_vex_arith(0x5E, dst, nds, src, VEX_SIMD_NONE, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3153 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3154 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3155 void Assembler::andpd(XMMRegister dst, XMMRegister src) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3156 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3157 emit_simd_arith(0x54, dst, src, VEX_SIMD_66); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3158 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3159 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3160 void Assembler::andps(XMMRegister dst, XMMRegister src) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3161 NOT_LP64(assert(VM_Version::supports_sse(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3162 emit_simd_arith(0x54, dst, src, VEX_SIMD_NONE); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3163 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3164 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3165 void Assembler::andps(XMMRegister dst, Address src) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3166 NOT_LP64(assert(VM_Version::supports_sse(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3167 emit_simd_arith(0x54, dst, src, VEX_SIMD_NONE); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3168 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3169 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3170 void Assembler::andpd(XMMRegister dst, Address src) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3171 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3172 emit_simd_arith(0x54, dst, src, VEX_SIMD_66); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3173 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3174 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3175 void Assembler::vandpd(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3176 assert(VM_Version::supports_avx(), ""); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3177 emit_vex_arith(0x54, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3178 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3179 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3180 void Assembler::vandps(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3181 assert(VM_Version::supports_avx(), ""); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3182 emit_vex_arith(0x54, dst, nds, src, VEX_SIMD_NONE, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3183 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3184 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3185 void Assembler::vandpd(XMMRegister dst, XMMRegister nds, Address src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3186 assert(VM_Version::supports_avx(), ""); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3187 emit_vex_arith(0x54, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3188 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3189 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3190 void Assembler::vandps(XMMRegister dst, XMMRegister nds, Address src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3191 assert(VM_Version::supports_avx(), ""); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3192 emit_vex_arith(0x54, dst, nds, src, VEX_SIMD_NONE, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3193 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3194 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3195 void Assembler::xorpd(XMMRegister dst, XMMRegister src) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3196 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3197 emit_simd_arith(0x57, dst, src, VEX_SIMD_66); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3198 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3199 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3200 void Assembler::xorps(XMMRegister dst, XMMRegister src) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3201 NOT_LP64(assert(VM_Version::supports_sse(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3202 emit_simd_arith(0x57, dst, src, VEX_SIMD_NONE); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3203 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3204 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3205 void Assembler::xorpd(XMMRegister dst, Address src) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3206 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3207 emit_simd_arith(0x57, dst, src, VEX_SIMD_66); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3208 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3209 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3210 void Assembler::xorps(XMMRegister dst, Address src) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3211 NOT_LP64(assert(VM_Version::supports_sse(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3212 emit_simd_arith(0x57, dst, src, VEX_SIMD_NONE); |
4761
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
3213 } |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
3214 |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
6141
diff
changeset
|
3215 void Assembler::vxorpd(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
6141
diff
changeset
|
3216 assert(VM_Version::supports_avx(), ""); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3217 emit_vex_arith(0x57, dst, nds, src, VEX_SIMD_66, vector256); |
4761
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
3218 } |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
3219 |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
6141
diff
changeset
|
3220 void Assembler::vxorps(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
6141
diff
changeset
|
3221 assert(VM_Version::supports_avx(), ""); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3222 emit_vex_arith(0x57, dst, nds, src, VEX_SIMD_NONE, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3223 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3224 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3225 void Assembler::vxorpd(XMMRegister dst, XMMRegister nds, Address src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3226 assert(VM_Version::supports_avx(), ""); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3227 emit_vex_arith(0x57, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3228 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3229 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3230 void Assembler::vxorps(XMMRegister dst, XMMRegister nds, Address src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3231 assert(VM_Version::supports_avx(), ""); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3232 emit_vex_arith(0x57, dst, nds, src, VEX_SIMD_NONE, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3233 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3234 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3235 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3236 // Integer vector arithmetic |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3237 void Assembler::paddb(XMMRegister dst, XMMRegister src) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3238 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3239 emit_simd_arith(0xFC, dst, src, VEX_SIMD_66); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3240 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3241 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3242 void Assembler::paddw(XMMRegister dst, XMMRegister src) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3243 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3244 emit_simd_arith(0xFD, dst, src, VEX_SIMD_66); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3245 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3246 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3247 void Assembler::paddd(XMMRegister dst, XMMRegister src) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3248 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3249 emit_simd_arith(0xFE, dst, src, VEX_SIMD_66); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3250 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3251 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3252 void Assembler::paddq(XMMRegister dst, XMMRegister src) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3253 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3254 emit_simd_arith(0xD4, dst, src, VEX_SIMD_66); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3255 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3256 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3257 void Assembler::vpaddb(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3258 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3259 emit_vex_arith(0xFC, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3260 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3261 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3262 void Assembler::vpaddw(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3263 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3264 emit_vex_arith(0xFD, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3265 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3266 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3267 void Assembler::vpaddd(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3268 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3269 emit_vex_arith(0xFE, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3270 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3271 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3272 void Assembler::vpaddq(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3273 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3274 emit_vex_arith(0xD4, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3275 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3276 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3277 void Assembler::vpaddb(XMMRegister dst, XMMRegister nds, Address src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3278 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3279 emit_vex_arith(0xFC, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3280 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3281 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3282 void Assembler::vpaddw(XMMRegister dst, XMMRegister nds, Address src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3283 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3284 emit_vex_arith(0xFD, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3285 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3286 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3287 void Assembler::vpaddd(XMMRegister dst, XMMRegister nds, Address src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3288 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3289 emit_vex_arith(0xFE, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3290 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3291 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3292 void Assembler::vpaddq(XMMRegister dst, XMMRegister nds, Address src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3293 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3294 emit_vex_arith(0xD4, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3295 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3296 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3297 void Assembler::psubb(XMMRegister dst, XMMRegister src) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3298 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3299 emit_simd_arith(0xF8, dst, src, VEX_SIMD_66); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3300 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3301 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3302 void Assembler::psubw(XMMRegister dst, XMMRegister src) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3303 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3304 emit_simd_arith(0xF9, dst, src, VEX_SIMD_66); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3305 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3306 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3307 void Assembler::psubd(XMMRegister dst, XMMRegister src) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3308 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3309 emit_simd_arith(0xFA, dst, src, VEX_SIMD_66); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3310 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3311 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3312 void Assembler::psubq(XMMRegister dst, XMMRegister src) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3313 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3314 emit_simd_arith(0xFB, dst, src, VEX_SIMD_66); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3315 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3316 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3317 void Assembler::vpsubb(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3318 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3319 emit_vex_arith(0xF8, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3320 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3321 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3322 void Assembler::vpsubw(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3323 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3324 emit_vex_arith(0xF9, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3325 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3326 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3327 void Assembler::vpsubd(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3328 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3329 emit_vex_arith(0xFA, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3330 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3331 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3332 void Assembler::vpsubq(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3333 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3334 emit_vex_arith(0xFB, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3335 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3336 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3337 void Assembler::vpsubb(XMMRegister dst, XMMRegister nds, Address src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3338 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3339 emit_vex_arith(0xF8, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3340 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3341 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3342 void Assembler::vpsubw(XMMRegister dst, XMMRegister nds, Address src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3343 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3344 emit_vex_arith(0xF9, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3345 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3346 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3347 void Assembler::vpsubd(XMMRegister dst, XMMRegister nds, Address src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3348 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3349 emit_vex_arith(0xFA, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3350 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3351 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3352 void Assembler::vpsubq(XMMRegister dst, XMMRegister nds, Address src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3353 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3354 emit_vex_arith(0xFB, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3355 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3356 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3357 void Assembler::pmullw(XMMRegister dst, XMMRegister src) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3358 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3359 emit_simd_arith(0xD5, dst, src, VEX_SIMD_66); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3360 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3361 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3362 void Assembler::pmulld(XMMRegister dst, XMMRegister src) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3363 assert(VM_Version::supports_sse4_1(), ""); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3364 int encode = simd_prefix_and_encode(dst, dst, src, VEX_SIMD_66, VEX_OPCODE_0F_38); |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3365 emit_int8(0x40); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3366 emit_int8((unsigned char)(0xC0 | encode)); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3367 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3368 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3369 void Assembler::vpmullw(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3370 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3371 emit_vex_arith(0xD5, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3372 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3373 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3374 void Assembler::vpmulld(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3375 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3376 int encode = vex_prefix_and_encode(dst, nds, src, VEX_SIMD_66, vector256, VEX_OPCODE_0F_38); |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3377 emit_int8(0x40); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3378 emit_int8((unsigned char)(0xC0 | encode)); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3379 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3380 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3381 void Assembler::vpmullw(XMMRegister dst, XMMRegister nds, Address src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3382 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3383 emit_vex_arith(0xD5, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3384 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3385 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3386 void Assembler::vpmulld(XMMRegister dst, XMMRegister nds, Address src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3387 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3388 InstructionMark im(this); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3389 int dst_enc = dst->encoding(); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3390 int nds_enc = nds->is_valid() ? nds->encoding() : 0; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3391 vex_prefix(src, nds_enc, dst_enc, VEX_SIMD_66, VEX_OPCODE_0F_38, false, vector256); |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3392 emit_int8(0x40); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3393 emit_operand(dst, src); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3394 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3395 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3396 // Shift packed integers left by specified number of bits. |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3397 void Assembler::psllw(XMMRegister dst, int shift) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3398 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3399 // XMM6 is for /6 encoding: 66 0F 71 /6 ib |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3400 int encode = simd_prefix_and_encode(xmm6, dst, dst, VEX_SIMD_66); |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3401 emit_int8(0x71); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3402 emit_int8((unsigned char)(0xC0 | encode)); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3403 emit_int8(shift & 0xFF); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3404 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3405 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3406 void Assembler::pslld(XMMRegister dst, int shift) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3407 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3408 // XMM6 is for /6 encoding: 66 0F 72 /6 ib |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3409 int encode = simd_prefix_and_encode(xmm6, dst, dst, VEX_SIMD_66); |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3410 emit_int8(0x72); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3411 emit_int8((unsigned char)(0xC0 | encode)); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3412 emit_int8(shift & 0xFF); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3413 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3414 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3415 void Assembler::psllq(XMMRegister dst, int shift) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3416 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3417 // XMM6 is for /6 encoding: 66 0F 73 /6 ib |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3418 int encode = simd_prefix_and_encode(xmm6, dst, dst, VEX_SIMD_66); |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3419 emit_int8(0x73); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3420 emit_int8((unsigned char)(0xC0 | encode)); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3421 emit_int8(shift & 0xFF); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3422 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3423 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3424 void Assembler::psllw(XMMRegister dst, XMMRegister shift) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3425 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3426 emit_simd_arith(0xF1, dst, shift, VEX_SIMD_66); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3427 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3428 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3429 void Assembler::pslld(XMMRegister dst, XMMRegister shift) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3430 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3431 emit_simd_arith(0xF2, dst, shift, VEX_SIMD_66); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3432 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3433 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3434 void Assembler::psllq(XMMRegister dst, XMMRegister shift) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3435 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3436 emit_simd_arith(0xF3, dst, shift, VEX_SIMD_66); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3437 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3438 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3439 void Assembler::vpsllw(XMMRegister dst, XMMRegister src, int shift, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3440 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3441 // XMM6 is for /6 encoding: 66 0F 71 /6 ib |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3442 emit_vex_arith(0x71, xmm6, dst, src, VEX_SIMD_66, vector256); |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3443 emit_int8(shift & 0xFF); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3444 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3445 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3446 void Assembler::vpslld(XMMRegister dst, XMMRegister src, int shift, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3447 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3448 // XMM6 is for /6 encoding: 66 0F 72 /6 ib |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3449 emit_vex_arith(0x72, xmm6, dst, src, VEX_SIMD_66, vector256); |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3450 emit_int8(shift & 0xFF); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3451 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3452 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3453 void Assembler::vpsllq(XMMRegister dst, XMMRegister src, int shift, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3454 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3455 // XMM6 is for /6 encoding: 66 0F 73 /6 ib |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3456 emit_vex_arith(0x73, xmm6, dst, src, VEX_SIMD_66, vector256); |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3457 emit_int8(shift & 0xFF); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3458 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3459 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3460 void Assembler::vpsllw(XMMRegister dst, XMMRegister src, XMMRegister shift, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3461 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3462 emit_vex_arith(0xF1, dst, src, shift, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3463 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3464 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3465 void Assembler::vpslld(XMMRegister dst, XMMRegister src, XMMRegister shift, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3466 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3467 emit_vex_arith(0xF2, dst, src, shift, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3468 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3469 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3470 void Assembler::vpsllq(XMMRegister dst, XMMRegister src, XMMRegister shift, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3471 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3472 emit_vex_arith(0xF3, dst, src, shift, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3473 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3474 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3475 // Shift packed integers logically right by specified number of bits. |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3476 void Assembler::psrlw(XMMRegister dst, int shift) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3477 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3478 // XMM2 is for /2 encoding: 66 0F 71 /2 ib |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3479 int encode = simd_prefix_and_encode(xmm2, dst, dst, VEX_SIMD_66); |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3480 emit_int8(0x71); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3481 emit_int8((unsigned char)(0xC0 | encode)); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3482 emit_int8(shift & 0xFF); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3483 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3484 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3485 void Assembler::psrld(XMMRegister dst, int shift) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3486 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3487 // XMM2 is for /2 encoding: 66 0F 72 /2 ib |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3488 int encode = simd_prefix_and_encode(xmm2, dst, dst, VEX_SIMD_66); |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3489 emit_int8(0x72); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3490 emit_int8((unsigned char)(0xC0 | encode)); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3491 emit_int8(shift & 0xFF); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3492 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3493 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3494 void Assembler::psrlq(XMMRegister dst, int shift) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3495 // Do not confuse it with psrldq SSE2 instruction which |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3496 // shifts 128 bit value in xmm register by number of bytes. |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3497 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3498 // XMM2 is for /2 encoding: 66 0F 73 /2 ib |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3499 int encode = simd_prefix_and_encode(xmm2, dst, dst, VEX_SIMD_66); |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3500 emit_int8(0x73); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3501 emit_int8((unsigned char)(0xC0 | encode)); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3502 emit_int8(shift & 0xFF); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3503 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3504 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3505 void Assembler::psrlw(XMMRegister dst, XMMRegister shift) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3506 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3507 emit_simd_arith(0xD1, dst, shift, VEX_SIMD_66); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3508 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3509 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3510 void Assembler::psrld(XMMRegister dst, XMMRegister shift) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3511 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3512 emit_simd_arith(0xD2, dst, shift, VEX_SIMD_66); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3513 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3514 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3515 void Assembler::psrlq(XMMRegister dst, XMMRegister shift) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3516 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3517 emit_simd_arith(0xD3, dst, shift, VEX_SIMD_66); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3518 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3519 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3520 void Assembler::vpsrlw(XMMRegister dst, XMMRegister src, int shift, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3521 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3522 // XMM2 is for /2 encoding: 66 0F 73 /2 ib |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3523 emit_vex_arith(0x71, xmm2, dst, src, VEX_SIMD_66, vector256); |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3524 emit_int8(shift & 0xFF); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3525 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3526 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3527 void Assembler::vpsrld(XMMRegister dst, XMMRegister src, int shift, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3528 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3529 // XMM2 is for /2 encoding: 66 0F 73 /2 ib |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3530 emit_vex_arith(0x72, xmm2, dst, src, VEX_SIMD_66, vector256); |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3531 emit_int8(shift & 0xFF); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3532 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3533 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3534 void Assembler::vpsrlq(XMMRegister dst, XMMRegister src, int shift, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3535 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3536 // XMM2 is for /2 encoding: 66 0F 73 /2 ib |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3537 emit_vex_arith(0x73, xmm2, dst, src, VEX_SIMD_66, vector256); |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3538 emit_int8(shift & 0xFF); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3539 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3540 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3541 void Assembler::vpsrlw(XMMRegister dst, XMMRegister src, XMMRegister shift, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3542 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3543 emit_vex_arith(0xD1, dst, src, shift, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3544 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3545 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3546 void Assembler::vpsrld(XMMRegister dst, XMMRegister src, XMMRegister shift, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3547 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3548 emit_vex_arith(0xD2, dst, src, shift, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3549 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3550 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3551 void Assembler::vpsrlq(XMMRegister dst, XMMRegister src, XMMRegister shift, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3552 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3553 emit_vex_arith(0xD3, dst, src, shift, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3554 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3555 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3556 // Shift packed integers arithmetically right by specified number of bits. |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3557 void Assembler::psraw(XMMRegister dst, int shift) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3558 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3559 // XMM4 is for /4 encoding: 66 0F 71 /4 ib |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3560 int encode = simd_prefix_and_encode(xmm4, dst, dst, VEX_SIMD_66); |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3561 emit_int8(0x71); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3562 emit_int8((unsigned char)(0xC0 | encode)); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3563 emit_int8(shift & 0xFF); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3564 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3565 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3566 void Assembler::psrad(XMMRegister dst, int shift) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3567 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3568 // XMM4 is for /4 encoding: 66 0F 72 /4 ib |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3569 int encode = simd_prefix_and_encode(xmm4, dst, dst, VEX_SIMD_66); |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3570 emit_int8(0x72); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3571 emit_int8((unsigned char)(0xC0 | encode)); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3572 emit_int8(shift & 0xFF); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3573 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3574 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3575 void Assembler::psraw(XMMRegister dst, XMMRegister shift) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3576 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3577 emit_simd_arith(0xE1, dst, shift, VEX_SIMD_66); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3578 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3579 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3580 void Assembler::psrad(XMMRegister dst, XMMRegister shift) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3581 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3582 emit_simd_arith(0xE2, dst, shift, VEX_SIMD_66); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3583 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3584 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3585 void Assembler::vpsraw(XMMRegister dst, XMMRegister src, int shift, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3586 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3587 // XMM4 is for /4 encoding: 66 0F 71 /4 ib |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3588 emit_vex_arith(0x71, xmm4, dst, src, VEX_SIMD_66, vector256); |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3589 emit_int8(shift & 0xFF); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3590 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3591 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3592 void Assembler::vpsrad(XMMRegister dst, XMMRegister src, int shift, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3593 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3594 // XMM4 is for /4 encoding: 66 0F 71 /4 ib |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3595 emit_vex_arith(0x72, xmm4, dst, src, VEX_SIMD_66, vector256); |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3596 emit_int8(shift & 0xFF); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3597 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3598 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3599 void Assembler::vpsraw(XMMRegister dst, XMMRegister src, XMMRegister shift, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3600 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3601 emit_vex_arith(0xE1, dst, src, shift, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3602 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3603 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3604 void Assembler::vpsrad(XMMRegister dst, XMMRegister src, XMMRegister shift, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3605 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3606 emit_vex_arith(0xE2, dst, src, shift, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3607 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3608 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3609 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3610 // AND packed integers |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3611 void Assembler::pand(XMMRegister dst, XMMRegister src) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3612 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3613 emit_simd_arith(0xDB, dst, src, VEX_SIMD_66); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3614 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3615 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3616 void Assembler::vpand(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3617 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3618 emit_vex_arith(0xDB, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3619 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3620 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3621 void Assembler::vpand(XMMRegister dst, XMMRegister nds, Address src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3622 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3623 emit_vex_arith(0xDB, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3624 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3625 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3626 void Assembler::por(XMMRegister dst, XMMRegister src) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3627 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3628 emit_simd_arith(0xEB, dst, src, VEX_SIMD_66); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3629 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3630 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3631 void Assembler::vpor(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3632 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3633 emit_vex_arith(0xEB, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3634 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3635 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3636 void Assembler::vpor(XMMRegister dst, XMMRegister nds, Address src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3637 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3638 emit_vex_arith(0xEB, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3639 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3640 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3641 void Assembler::pxor(XMMRegister dst, XMMRegister src) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3642 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3643 emit_simd_arith(0xEF, dst, src, VEX_SIMD_66); |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
6141
diff
changeset
|
3644 } |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
6141
diff
changeset
|
3645 |
6225 | 3646 void Assembler::vpxor(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3647 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3648 emit_vex_arith(0xEF, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3649 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3650 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3651 void Assembler::vpxor(XMMRegister dst, XMMRegister nds, Address src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3652 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3653 emit_vex_arith(0xEF, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3654 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3655 |
6225 | 3656 |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
6141
diff
changeset
|
3657 void Assembler::vinsertf128h(XMMRegister dst, XMMRegister nds, XMMRegister src) { |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
6141
diff
changeset
|
3658 assert(VM_Version::supports_avx(), ""); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
6141
diff
changeset
|
3659 bool vector256 = true; |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
6141
diff
changeset
|
3660 int encode = vex_prefix_and_encode(dst, nds, src, VEX_SIMD_66, vector256, VEX_OPCODE_0F_3A); |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3661 emit_int8(0x18); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3662 emit_int8((unsigned char)(0xC0 | encode)); |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
6141
diff
changeset
|
3663 // 0x00 - insert into lower 128 bits |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
6141
diff
changeset
|
3664 // 0x01 - insert into upper 128 bits |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3665 emit_int8(0x01); |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
6141
diff
changeset
|
3666 } |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
6141
diff
changeset
|
3667 |
6792
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3668 void Assembler::vinsertf128h(XMMRegister dst, Address src) { |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3669 assert(VM_Version::supports_avx(), ""); |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3670 InstructionMark im(this); |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3671 bool vector256 = true; |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3672 assert(dst != xnoreg, "sanity"); |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3673 int dst_enc = dst->encoding(); |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3674 // swap src<->dst for encoding |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3675 vex_prefix(src, dst_enc, dst_enc, VEX_SIMD_66, VEX_OPCODE_0F_3A, false, vector256); |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3676 emit_int8(0x18); |
6792
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3677 emit_operand(dst, src); |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3678 // 0x01 - insert into upper 128 bits |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3679 emit_int8(0x01); |
6792
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3680 } |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3681 |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3682 void Assembler::vextractf128h(Address dst, XMMRegister src) { |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3683 assert(VM_Version::supports_avx(), ""); |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3684 InstructionMark im(this); |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3685 bool vector256 = true; |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3686 assert(src != xnoreg, "sanity"); |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3687 int src_enc = src->encoding(); |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3688 vex_prefix(dst, 0, src_enc, VEX_SIMD_66, VEX_OPCODE_0F_3A, false, vector256); |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3689 emit_int8(0x19); |
6792
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3690 emit_operand(src, dst); |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3691 // 0x01 - extract from upper 128 bits |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3692 emit_int8(0x01); |
6792
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3693 } |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3694 |
6225 | 3695 void Assembler::vinserti128h(XMMRegister dst, XMMRegister nds, XMMRegister src) { |
3696 assert(VM_Version::supports_avx2(), ""); | |
3697 bool vector256 = true; | |
3698 int encode = vex_prefix_and_encode(dst, nds, src, VEX_SIMD_66, vector256, VEX_OPCODE_0F_3A); | |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3699 emit_int8(0x38); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3700 emit_int8((unsigned char)(0xC0 | encode)); |
6225 | 3701 // 0x00 - insert into lower 128 bits |
3702 // 0x01 - insert into upper 128 bits | |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3703 emit_int8(0x01); |
6225 | 3704 } |
3705 | |
6792
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3706 void Assembler::vinserti128h(XMMRegister dst, Address src) { |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3707 assert(VM_Version::supports_avx2(), ""); |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3708 InstructionMark im(this); |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3709 bool vector256 = true; |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3710 assert(dst != xnoreg, "sanity"); |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3711 int dst_enc = dst->encoding(); |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3712 // swap src<->dst for encoding |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3713 vex_prefix(src, dst_enc, dst_enc, VEX_SIMD_66, VEX_OPCODE_0F_3A, false, vector256); |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3714 emit_int8(0x38); |
6792
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3715 emit_operand(dst, src); |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3716 // 0x01 - insert into upper 128 bits |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3717 emit_int8(0x01); |
6792
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3718 } |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3719 |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3720 void Assembler::vextracti128h(Address dst, XMMRegister src) { |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3721 assert(VM_Version::supports_avx2(), ""); |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3722 InstructionMark im(this); |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3723 bool vector256 = true; |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3724 assert(src != xnoreg, "sanity"); |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3725 int src_enc = src->encoding(); |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3726 vex_prefix(dst, 0, src_enc, VEX_SIMD_66, VEX_OPCODE_0F_3A, false, vector256); |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3727 emit_int8(0x39); |
6792
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3728 emit_operand(src, dst); |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3729 // 0x01 - extract from upper 128 bits |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3730 emit_int8(0x01); |
6792
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3731 } |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3732 |
7475
e2e6bf86682c
8005544: Use 256bit YMM registers in arraycopy stubs on x86
kvn
parents:
7474
diff
changeset
|
3733 // duplicate 4-bytes integer data from src into 8 locations in dest |
e2e6bf86682c
8005544: Use 256bit YMM registers in arraycopy stubs on x86
kvn
parents:
7474
diff
changeset
|
3734 void Assembler::vpbroadcastd(XMMRegister dst, XMMRegister src) { |
e2e6bf86682c
8005544: Use 256bit YMM registers in arraycopy stubs on x86
kvn
parents:
7474
diff
changeset
|
3735 assert(VM_Version::supports_avx2(), ""); |
e2e6bf86682c
8005544: Use 256bit YMM registers in arraycopy stubs on x86
kvn
parents:
7474
diff
changeset
|
3736 bool vector256 = true; |
e2e6bf86682c
8005544: Use 256bit YMM registers in arraycopy stubs on x86
kvn
parents:
7474
diff
changeset
|
3737 int encode = vex_prefix_and_encode(dst, xnoreg, src, VEX_SIMD_66, vector256, VEX_OPCODE_0F_38); |
e2e6bf86682c
8005544: Use 256bit YMM registers in arraycopy stubs on x86
kvn
parents:
7474
diff
changeset
|
3738 emit_int8(0x58); |
e2e6bf86682c
8005544: Use 256bit YMM registers in arraycopy stubs on x86
kvn
parents:
7474
diff
changeset
|
3739 emit_int8((unsigned char)(0xC0 | encode)); |
e2e6bf86682c
8005544: Use 256bit YMM registers in arraycopy stubs on x86
kvn
parents:
7474
diff
changeset
|
3740 } |
e2e6bf86682c
8005544: Use 256bit YMM registers in arraycopy stubs on x86
kvn
parents:
7474
diff
changeset
|
3741 |
11080
b800986664f4
7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents:
9060
diff
changeset
|
3742 // Carry-Less Multiplication Quadword |
b800986664f4
7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents:
9060
diff
changeset
|
3743 void Assembler::vpclmulqdq(XMMRegister dst, XMMRegister nds, XMMRegister src, int mask) { |
b800986664f4
7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents:
9060
diff
changeset
|
3744 assert(VM_Version::supports_avx() && VM_Version::supports_clmul(), ""); |
b800986664f4
7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents:
9060
diff
changeset
|
3745 bool vector256 = false; |
b800986664f4
7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents:
9060
diff
changeset
|
3746 int encode = vex_prefix_and_encode(dst, nds, src, VEX_SIMD_66, vector256, VEX_OPCODE_0F_3A); |
b800986664f4
7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents:
9060
diff
changeset
|
3747 emit_int8(0x44); |
b800986664f4
7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents:
9060
diff
changeset
|
3748 emit_int8((unsigned char)(0xC0 | encode)); |
b800986664f4
7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents:
9060
diff
changeset
|
3749 emit_int8((unsigned char)mask); |
b800986664f4
7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents:
9060
diff
changeset
|
3750 } |
b800986664f4
7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents:
9060
diff
changeset
|
3751 |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
6141
diff
changeset
|
3752 void Assembler::vzeroupper() { |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
6141
diff
changeset
|
3753 assert(VM_Version::supports_avx(), ""); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
6141
diff
changeset
|
3754 (void)vex_prefix_and_encode(xmm0, xmm0, xmm0, VEX_SIMD_NONE); |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3755 emit_int8(0x77); |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
6141
diff
changeset
|
3756 } |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
6141
diff
changeset
|
3757 |
4761
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
3758 |
304 | 3759 #ifndef _LP64 |
3760 // 32bit only pieces of the assembler | |
3761 | |
3762 void Assembler::cmp_literal32(Register src1, int32_t imm32, RelocationHolder const& rspec) { | |
3763 // NO PREFIX AS NEVER 64BIT | |
3764 InstructionMark im(this); | |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3765 emit_int8((unsigned char)0x81); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3766 emit_int8((unsigned char)(0xF8 | src1->encoding())); |
304 | 3767 emit_data(imm32, rspec, 0); |
3768 } | |
3769 | |
3770 void Assembler::cmp_literal32(Address src1, int32_t imm32, RelocationHolder const& rspec) { | |
3771 // NO PREFIX AS NEVER 64BIT (not even 32bit versions of 64bit regs | |
3772 InstructionMark im(this); | |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3773 emit_int8((unsigned char)0x81); |
304 | 3774 emit_operand(rdi, src1); |
3775 emit_data(imm32, rspec, 0); | |
3776 } | |
3777 | |
3778 // The 64-bit (32bit platform) cmpxchg compares the value at adr with the contents of rdx:rax, | |
3779 // and stores rcx:rbx into adr if so; otherwise, the value at adr is loaded | |
3780 // into rdx:rax. The ZF is set if the compared values were equal, and cleared otherwise. | |
3781 void Assembler::cmpxchg8(Address adr) { | |
3782 InstructionMark im(this); | |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3783 emit_int8(0x0F); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3784 emit_int8((unsigned char)0xC7); |
304 | 3785 emit_operand(rcx, adr); |
3786 } | |
3787 | |
3788 void Assembler::decl(Register dst) { | |
3789 // Don't use it directly. Use MacroAssembler::decrementl() instead. | |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3790 emit_int8(0x48 | dst->encoding()); |
304 | 3791 } |
3792 | |
3793 #endif // _LP64 | |
3794 | |
3795 // 64bit typically doesn't use the x87 but needs to for the trig funcs | |
3796 | |
3797 void Assembler::fabs() { | |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3798 emit_int8((unsigned char)0xD9); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3799 emit_int8((unsigned char)0xE1); |
304 | 3800 } |
3801 | |
3802 void Assembler::fadd(int i) { | |
3803 emit_farith(0xD8, 0xC0, i); | |
3804 } | |
3805 | |
3806 void Assembler::fadd_d(Address src) { | |
3807 InstructionMark im(this); | |
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changeset
|
3808 emit_int8((unsigned char)0xDC); |
304 | 3809 emit_operand32(rax, src); |
3810 } | |
3811 | |
3812 void Assembler::fadd_s(Address src) { | |
3813 InstructionMark im(this); | |
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changeset
|
3814 emit_int8((unsigned char)0xD8); |
304 | 3815 emit_operand32(rax, src); |
3816 } | |
3817 | |
3818 void Assembler::fadda(int i) { | |
3819 emit_farith(0xDC, 0xC0, i); | |
3820 } | |
3821 | |
3822 void Assembler::faddp(int i) { | |
3823 emit_farith(0xDE, 0xC0, i); | |
3824 } | |
3825 | |
3826 void Assembler::fchs() { | |
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|
3827 emit_int8((unsigned char)0xD9); |
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changeset
|
3828 emit_int8((unsigned char)0xE0); |
304 | 3829 } |
3830 | |
3831 void Assembler::fcom(int i) { | |
3832 emit_farith(0xD8, 0xD0, i); | |
3833 } | |
3834 | |
3835 void Assembler::fcomp(int i) { | |
3836 emit_farith(0xD8, 0xD8, i); | |
3837 } | |
3838 | |
3839 void Assembler::fcomp_d(Address src) { | |
3840 InstructionMark im(this); | |
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changeset
|
3841 emit_int8((unsigned char)0xDC); |
304 | 3842 emit_operand32(rbx, src); |
3843 } | |
3844 | |
3845 void Assembler::fcomp_s(Address src) { | |
3846 InstructionMark im(this); | |
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changeset
|
3847 emit_int8((unsigned char)0xD8); |
304 | 3848 emit_operand32(rbx, src); |
3849 } | |
3850 | |
3851 void Assembler::fcompp() { | |
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changeset
|
3852 emit_int8((unsigned char)0xDE); |
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changeset
|
3853 emit_int8((unsigned char)0xD9); |
304 | 3854 } |
3855 | |
3856 void Assembler::fcos() { | |
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changeset
|
3857 emit_int8((unsigned char)0xD9); |
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changeset
|
3858 emit_int8((unsigned char)0xFF); |
304 | 3859 } |
3860 | |
3861 void Assembler::fdecstp() { | |
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changeset
|
3862 emit_int8((unsigned char)0xD9); |
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changeset
|
3863 emit_int8((unsigned char)0xF6); |
304 | 3864 } |
3865 | |
3866 void Assembler::fdiv(int i) { | |
3867 emit_farith(0xD8, 0xF0, i); | |
3868 } | |
3869 | |
3870 void Assembler::fdiv_d(Address src) { | |
3871 InstructionMark im(this); | |
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changeset
|
3872 emit_int8((unsigned char)0xDC); |
304 | 3873 emit_operand32(rsi, src); |
3874 } | |
3875 | |
3876 void Assembler::fdiv_s(Address src) { | |
3877 InstructionMark im(this); | |
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changeset
|
3878 emit_int8((unsigned char)0xD8); |
304 | 3879 emit_operand32(rsi, src); |
3880 } | |
3881 | |
3882 void Assembler::fdiva(int i) { | |
3883 emit_farith(0xDC, 0xF8, i); | |
3884 } | |
3885 | |
3886 // Note: The Intel manual (Pentium Processor User's Manual, Vol.3, 1994) | |
3887 // is erroneous for some of the floating-point instructions below. | |
3888 | |
3889 void Assembler::fdivp(int i) { | |
3890 emit_farith(0xDE, 0xF8, i); // ST(0) <- ST(0) / ST(1) and pop (Intel manual wrong) | |
3891 } | |
3892 | |
3893 void Assembler::fdivr(int i) { | |
3894 emit_farith(0xD8, 0xF8, i); | |
3895 } | |
3896 | |
3897 void Assembler::fdivr_d(Address src) { | |
3898 InstructionMark im(this); | |
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changeset
|
3899 emit_int8((unsigned char)0xDC); |
304 | 3900 emit_operand32(rdi, src); |
3901 } | |
3902 | |
3903 void Assembler::fdivr_s(Address src) { | |
3904 InstructionMark im(this); | |
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changeset
|
3905 emit_int8((unsigned char)0xD8); |
304 | 3906 emit_operand32(rdi, src); |
3907 } | |
3908 | |
3909 void Assembler::fdivra(int i) { | |
3910 emit_farith(0xDC, 0xF0, i); | |
3911 } | |
3912 | |
3913 void Assembler::fdivrp(int i) { | |
3914 emit_farith(0xDE, 0xF0, i); // ST(0) <- ST(1) / ST(0) and pop (Intel manual wrong) | |
3915 } | |
3916 | |
3917 void Assembler::ffree(int i) { | |
3918 emit_farith(0xDD, 0xC0, i); | |
3919 } | |
3920 | |
3921 void Assembler::fild_d(Address adr) { | |
3922 InstructionMark im(this); | |
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changeset
|
3923 emit_int8((unsigned char)0xDF); |
304 | 3924 emit_operand32(rbp, adr); |
3925 } | |
3926 | |
3927 void Assembler::fild_s(Address adr) { | |
3928 InstructionMark im(this); | |
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|
3929 emit_int8((unsigned char)0xDB); |
304 | 3930 emit_operand32(rax, adr); |
3931 } | |
3932 | |
3933 void Assembler::fincstp() { | |
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changeset
|
3934 emit_int8((unsigned char)0xD9); |
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changeset
|
3935 emit_int8((unsigned char)0xF7); |
304 | 3936 } |
3937 | |
3938 void Assembler::finit() { | |
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changeset
|
3939 emit_int8((unsigned char)0x9B); |
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changeset
|
3940 emit_int8((unsigned char)0xDB); |
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changeset
|
3941 emit_int8((unsigned char)0xE3); |
304 | 3942 } |
3943 | |
3944 void Assembler::fist_s(Address adr) { | |
3945 InstructionMark im(this); | |
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changeset
|
3946 emit_int8((unsigned char)0xDB); |
304 | 3947 emit_operand32(rdx, adr); |
3948 } | |
3949 | |
3950 void Assembler::fistp_d(Address adr) { | |
3951 InstructionMark im(this); | |
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changeset
|
3952 emit_int8((unsigned char)0xDF); |
304 | 3953 emit_operand32(rdi, adr); |
3954 } | |
3955 | |
3956 void Assembler::fistp_s(Address adr) { | |
3957 InstructionMark im(this); | |
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changeset
|
3958 emit_int8((unsigned char)0xDB); |
304 | 3959 emit_operand32(rbx, adr); |
3960 } | |
0 | 3961 |
3962 void Assembler::fld1() { | |
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changeset
|
3963 emit_int8((unsigned char)0xD9); |
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changeset
|
3964 emit_int8((unsigned char)0xE8); |
0 | 3965 } |
3966 | |
304 | 3967 void Assembler::fld_d(Address adr) { |
3968 InstructionMark im(this); | |
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changeset
|
3969 emit_int8((unsigned char)0xDD); |
304 | 3970 emit_operand32(rax, adr); |
3971 } | |
0 | 3972 |
3973 void Assembler::fld_s(Address adr) { | |
3974 InstructionMark im(this); | |
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|
3975 emit_int8((unsigned char)0xD9); |
304 | 3976 emit_operand32(rax, adr); |
3977 } | |
3978 | |
3979 | |
3980 void Assembler::fld_s(int index) { | |
0 | 3981 emit_farith(0xD9, 0xC0, index); |
3982 } | |
3983 | |
3984 void Assembler::fld_x(Address adr) { | |
3985 InstructionMark im(this); | |
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changeset
|
3986 emit_int8((unsigned char)0xDB); |
304 | 3987 emit_operand32(rbp, adr); |
3988 } | |
3989 | |
3990 void Assembler::fldcw(Address src) { | |
3991 InstructionMark im(this); | |
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|
3992 emit_int8((unsigned char)0xD9); |
304 | 3993 emit_operand32(rbp, src); |
3994 } | |
3995 | |
3996 void Assembler::fldenv(Address src) { | |
0 | 3997 InstructionMark im(this); |
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changeset
|
3998 emit_int8((unsigned char)0xD9); |
304 | 3999 emit_operand32(rsp, src); |
4000 } | |
4001 | |
4002 void Assembler::fldlg2() { | |
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changeset
|
4003 emit_int8((unsigned char)0xD9); |
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changeset
|
4004 emit_int8((unsigned char)0xEC); |
304 | 4005 } |
0 | 4006 |
4007 void Assembler::fldln2() { | |
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changeset
|
4008 emit_int8((unsigned char)0xD9); |
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changeset
|
4009 emit_int8((unsigned char)0xED); |
0 | 4010 } |
4011 | |
304 | 4012 void Assembler::fldz() { |
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changeset
|
4013 emit_int8((unsigned char)0xD9); |
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changeset
|
4014 emit_int8((unsigned char)0xEE); |
304 | 4015 } |
0 | 4016 |
4017 void Assembler::flog() { | |
4018 fldln2(); | |
4019 fxch(); | |
4020 fyl2x(); | |
4021 } | |
4022 | |
4023 void Assembler::flog10() { | |
4024 fldlg2(); | |
4025 fxch(); | |
4026 fyl2x(); | |
4027 } | |
4028 | |
304 | 4029 void Assembler::fmul(int i) { |
4030 emit_farith(0xD8, 0xC8, i); | |
4031 } | |
4032 | |
4033 void Assembler::fmul_d(Address src) { | |
4034 InstructionMark im(this); | |
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changeset
|
4035 emit_int8((unsigned char)0xDC); |
304 | 4036 emit_operand32(rcx, src); |
4037 } | |
4038 | |
4039 void Assembler::fmul_s(Address src) { | |
4040 InstructionMark im(this); | |
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changeset
|
4041 emit_int8((unsigned char)0xD8); |
304 | 4042 emit_operand32(rcx, src); |
4043 } | |
4044 | |
4045 void Assembler::fmula(int i) { | |
4046 emit_farith(0xDC, 0xC8, i); | |
4047 } | |
4048 | |
4049 void Assembler::fmulp(int i) { | |
4050 emit_farith(0xDE, 0xC8, i); | |
4051 } | |
4052 | |
4053 void Assembler::fnsave(Address dst) { | |
4054 InstructionMark im(this); | |
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changeset
|
4055 emit_int8((unsigned char)0xDD); |
304 | 4056 emit_operand32(rsi, dst); |
4057 } | |
4058 | |
4059 void Assembler::fnstcw(Address src) { | |
4060 InstructionMark im(this); | |
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changeset
|
4061 emit_int8((unsigned char)0x9B); |
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changeset
|
4062 emit_int8((unsigned char)0xD9); |
304 | 4063 emit_operand32(rdi, src); |
4064 } | |
4065 | |
4066 void Assembler::fnstsw_ax() { | |
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changeset
|
4067 emit_int8((unsigned char)0xDF); |
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changeset
|
4068 emit_int8((unsigned char)0xE0); |
304 | 4069 } |
4070 | |
4071 void Assembler::fprem() { | |
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changeset
|
4072 emit_int8((unsigned char)0xD9); |
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changeset
|
4073 emit_int8((unsigned char)0xF8); |
304 | 4074 } |
4075 | |
4076 void Assembler::fprem1() { | |
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changeset
|
4077 emit_int8((unsigned char)0xD9); |
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changeset
|
4078 emit_int8((unsigned char)0xF5); |
304 | 4079 } |
4080 | |
4081 void Assembler::frstor(Address src) { | |
4082 InstructionMark im(this); | |
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changeset
|
4083 emit_int8((unsigned char)0xDD); |
304 | 4084 emit_operand32(rsp, src); |
4085 } | |
0 | 4086 |
4087 void Assembler::fsin() { | |
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changeset
|
4088 emit_int8((unsigned char)0xD9); |
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changeset
|
4089 emit_int8((unsigned char)0xFE); |
0 | 4090 } |
4091 | |
304 | 4092 void Assembler::fsqrt() { |
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changeset
|
4093 emit_int8((unsigned char)0xD9); |
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changeset
|
4094 emit_int8((unsigned char)0xFA); |
304 | 4095 } |
4096 | |
4097 void Assembler::fst_d(Address adr) { | |
4098 InstructionMark im(this); | |
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changeset
|
4099 emit_int8((unsigned char)0xDD); |
304 | 4100 emit_operand32(rdx, adr); |
4101 } | |
4102 | |
4103 void Assembler::fst_s(Address adr) { | |
4104 InstructionMark im(this); | |
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changeset
|
4105 emit_int8((unsigned char)0xD9); |
304 | 4106 emit_operand32(rdx, adr); |
4107 } | |
4108 | |
4109 void Assembler::fstp_d(Address adr) { | |
4110 InstructionMark im(this); | |
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changeset
|
4111 emit_int8((unsigned char)0xDD); |
304 | 4112 emit_operand32(rbx, adr); |
4113 } | |
4114 | |
4115 void Assembler::fstp_d(int index) { | |
4116 emit_farith(0xDD, 0xD8, index); | |
4117 } | |
4118 | |
4119 void Assembler::fstp_s(Address adr) { | |
4120 InstructionMark im(this); | |
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changeset
|
4121 emit_int8((unsigned char)0xD9); |
304 | 4122 emit_operand32(rbx, adr); |
4123 } | |
4124 | |
4125 void Assembler::fstp_x(Address adr) { | |
4126 InstructionMark im(this); | |
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changeset
|
4127 emit_int8((unsigned char)0xDB); |
304 | 4128 emit_operand32(rdi, adr); |
4129 } | |
4130 | |
4131 void Assembler::fsub(int i) { | |
4132 emit_farith(0xD8, 0xE0, i); | |
4133 } | |
4134 | |
4135 void Assembler::fsub_d(Address src) { | |
4136 InstructionMark im(this); | |
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4137 emit_int8((unsigned char)0xDC); |
304 | 4138 emit_operand32(rsp, src); |
4139 } | |
4140 | |
4141 void Assembler::fsub_s(Address src) { | |
4142 InstructionMark im(this); | |
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4143 emit_int8((unsigned char)0xD8); |
304 | 4144 emit_operand32(rsp, src); |
4145 } | |
4146 | |
4147 void Assembler::fsuba(int i) { | |
4148 emit_farith(0xDC, 0xE8, i); | |
4149 } | |
4150 | |
4151 void Assembler::fsubp(int i) { | |
4152 emit_farith(0xDE, 0xE8, i); // ST(0) <- ST(0) - ST(1) and pop (Intel manual wrong) | |
4153 } | |
4154 | |
4155 void Assembler::fsubr(int i) { | |
4156 emit_farith(0xD8, 0xE8, i); | |
4157 } | |
4158 | |
4159 void Assembler::fsubr_d(Address src) { | |
4160 InstructionMark im(this); | |
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4161 emit_int8((unsigned char)0xDC); |
304 | 4162 emit_operand32(rbp, src); |
4163 } | |
4164 | |
4165 void Assembler::fsubr_s(Address src) { | |
4166 InstructionMark im(this); | |
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4167 emit_int8((unsigned char)0xD8); |
304 | 4168 emit_operand32(rbp, src); |
4169 } | |
4170 | |
4171 void Assembler::fsubra(int i) { | |
4172 emit_farith(0xDC, 0xE0, i); | |
4173 } | |
4174 | |
4175 void Assembler::fsubrp(int i) { | |
4176 emit_farith(0xDE, 0xE0, i); // ST(0) <- ST(1) - ST(0) and pop (Intel manual wrong) | |
0 | 4177 } |
4178 | |
4179 void Assembler::ftan() { | |
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4180 emit_int8((unsigned char)0xD9); |
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4181 emit_int8((unsigned char)0xF2); |
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4182 emit_int8((unsigned char)0xDD); |
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4183 emit_int8((unsigned char)0xD8); |
0 | 4184 } |
4185 | |
304 | 4186 void Assembler::ftst() { |
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4187 emit_int8((unsigned char)0xD9); |
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4188 emit_int8((unsigned char)0xE4); |
304 | 4189 } |
0 | 4190 |
4191 void Assembler::fucomi(int i) { | |
4192 // make sure the instruction is supported (introduced for P6, together with cmov) | |
4193 guarantee(VM_Version::supports_cmov(), "illegal instruction"); | |
4194 emit_farith(0xDB, 0xE8, i); | |
4195 } | |
4196 | |
4197 void Assembler::fucomip(int i) { | |
4198 // make sure the instruction is supported (introduced for P6, together with cmov) | |
4199 guarantee(VM_Version::supports_cmov(), "illegal instruction"); | |
4200 emit_farith(0xDF, 0xE8, i); | |
4201 } | |
4202 | |
4203 void Assembler::fwait() { | |
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4204 emit_int8((unsigned char)0x9B); |
0 | 4205 } |
4206 | |
304 | 4207 void Assembler::fxch(int i) { |
4208 emit_farith(0xD9, 0xC8, i); | |
4209 } | |
4210 | |
4211 void Assembler::fyl2x() { | |
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4212 emit_int8((unsigned char)0xD9); |
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4213 emit_int8((unsigned char)0xF1); |
304 | 4214 } |
4215 | |
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4216 void Assembler::frndint() { |
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4217 emit_int8((unsigned char)0xD9); |
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4218 emit_int8((unsigned char)0xFC); |
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|
4219 } |
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4220 |
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4221 void Assembler::f2xm1() { |
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4222 emit_int8((unsigned char)0xD9); |
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4223 emit_int8((unsigned char)0xF0); |
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|
4224 } |
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|
4225 |
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4226 void Assembler::fldl2e() { |
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4227 emit_int8((unsigned char)0xD9); |
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4228 emit_int8((unsigned char)0xEA); |
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|
4229 } |
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4230 |
4759 | 4231 // SSE SIMD prefix byte values corresponding to VexSimdPrefix encoding. |
4232 static int simd_pre[4] = { 0, 0x66, 0xF3, 0xF2 }; | |
4233 // SSE opcode second byte values (first is 0x0F) corresponding to VexOpcode encoding. | |
4234 static int simd_opc[4] = { 0, 0, 0x38, 0x3A }; | |
4235 | |
4236 // Generate SSE legacy REX prefix and SIMD opcode based on VEX encoding. | |
4237 void Assembler::rex_prefix(Address adr, XMMRegister xreg, VexSimdPrefix pre, VexOpcode opc, bool rex_w) { | |
4238 if (pre > 0) { | |
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4239 emit_int8(simd_pre[pre]); |
4759 | 4240 } |
4241 if (rex_w) { | |
4242 prefixq(adr, xreg); | |
4243 } else { | |
4244 prefix(adr, xreg); | |
4245 } | |
4246 if (opc > 0) { | |
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4247 emit_int8(0x0F); |
4759 | 4248 int opc2 = simd_opc[opc]; |
4249 if (opc2 > 0) { | |
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4250 emit_int8(opc2); |
4759 | 4251 } |
4252 } | |
4253 } | |
4254 | |
4255 int Assembler::rex_prefix_and_encode(int dst_enc, int src_enc, VexSimdPrefix pre, VexOpcode opc, bool rex_w) { | |
4256 if (pre > 0) { | |
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4257 emit_int8(simd_pre[pre]); |
4759 | 4258 } |
4259 int encode = (rex_w) ? prefixq_and_encode(dst_enc, src_enc) : | |
4260 prefix_and_encode(dst_enc, src_enc); | |
4261 if (opc > 0) { | |
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4262 emit_int8(0x0F); |
4759 | 4263 int opc2 = simd_opc[opc]; |
4264 if (opc2 > 0) { | |
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4265 emit_int8(opc2); |
4759 | 4266 } |
4267 } | |
4268 return encode; | |
4269 } | |
4270 | |
4271 | |
4272 void Assembler::vex_prefix(bool vex_r, bool vex_b, bool vex_x, bool vex_w, int nds_enc, VexSimdPrefix pre, VexOpcode opc, bool vector256) { | |
4273 if (vex_b || vex_x || vex_w || (opc == VEX_OPCODE_0F_38) || (opc == VEX_OPCODE_0F_3A)) { | |
4274 prefix(VEX_3bytes); | |
4275 | |
4276 int byte1 = (vex_r ? VEX_R : 0) | (vex_x ? VEX_X : 0) | (vex_b ? VEX_B : 0); | |
4277 byte1 = (~byte1) & 0xE0; | |
4278 byte1 |= opc; | |
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4279 emit_int8(byte1); |
4759 | 4280 |
4281 int byte2 = ((~nds_enc) & 0xf) << 3; | |
4282 byte2 |= (vex_w ? VEX_W : 0) | (vector256 ? 4 : 0) | pre; | |
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4283 emit_int8(byte2); |
4759 | 4284 } else { |
4285 prefix(VEX_2bytes); | |
4286 | |
4287 int byte1 = vex_r ? VEX_R : 0; | |
4288 byte1 = (~byte1) & 0x80; | |
4289 byte1 |= ((~nds_enc) & 0xf) << 3; | |
4290 byte1 |= (vector256 ? 4 : 0) | pre; | |
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|
4291 emit_int8(byte1); |
4759 | 4292 } |
4293 } | |
4294 | |
4295 void Assembler::vex_prefix(Address adr, int nds_enc, int xreg_enc, VexSimdPrefix pre, VexOpcode opc, bool vex_w, bool vector256){ | |
4296 bool vex_r = (xreg_enc >= 8); | |
4297 bool vex_b = adr.base_needs_rex(); | |
4298 bool vex_x = adr.index_needs_rex(); | |
4299 vex_prefix(vex_r, vex_b, vex_x, vex_w, nds_enc, pre, opc, vector256); | |
4300 } | |
4301 | |
4302 int Assembler::vex_prefix_and_encode(int dst_enc, int nds_enc, int src_enc, VexSimdPrefix pre, VexOpcode opc, bool vex_w, bool vector256) { | |
4303 bool vex_r = (dst_enc >= 8); | |
4304 bool vex_b = (src_enc >= 8); | |
4305 bool vex_x = false; | |
4306 vex_prefix(vex_r, vex_b, vex_x, vex_w, nds_enc, pre, opc, vector256); | |
4307 return (((dst_enc & 7) << 3) | (src_enc & 7)); | |
4308 } | |
4309 | |
4310 | |
4311 void Assembler::simd_prefix(XMMRegister xreg, XMMRegister nds, Address adr, VexSimdPrefix pre, VexOpcode opc, bool rex_w, bool vector256) { | |
4312 if (UseAVX > 0) { | |
4313 int xreg_enc = xreg->encoding(); | |
4314 int nds_enc = nds->is_valid() ? nds->encoding() : 0; | |
4315 vex_prefix(adr, nds_enc, xreg_enc, pre, opc, rex_w, vector256); | |
4316 } else { | |
4317 assert((nds == xreg) || (nds == xnoreg), "wrong sse encoding"); | |
4318 rex_prefix(adr, xreg, pre, opc, rex_w); | |
4319 } | |
4320 } | |
4321 | |
4322 int Assembler::simd_prefix_and_encode(XMMRegister dst, XMMRegister nds, XMMRegister src, VexSimdPrefix pre, VexOpcode opc, bool rex_w, bool vector256) { | |
4323 int dst_enc = dst->encoding(); | |
4324 int src_enc = src->encoding(); | |
4325 if (UseAVX > 0) { | |
4326 int nds_enc = nds->is_valid() ? nds->encoding() : 0; | |
4327 return vex_prefix_and_encode(dst_enc, nds_enc, src_enc, pre, opc, rex_w, vector256); | |
4328 } else { | |
4329 assert((nds == dst) || (nds == src) || (nds == xnoreg), "wrong sse encoding"); | |
4330 return rex_prefix_and_encode(dst_enc, src_enc, pre, opc, rex_w); | |
4331 } | |
4332 } | |
304 | 4333 |
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4334 void Assembler::emit_simd_arith(int opcode, XMMRegister dst, Address src, VexSimdPrefix pre) { |
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4335 InstructionMark im(this); |
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4336 simd_prefix(dst, dst, src, pre); |
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|
4337 emit_int8(opcode); |
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|
4338 emit_operand(dst, src); |
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|
4339 } |
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|
4340 |
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|
4341 void Assembler::emit_simd_arith(int opcode, XMMRegister dst, XMMRegister src, VexSimdPrefix pre) { |
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4342 int encode = simd_prefix_and_encode(dst, dst, src, pre); |
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|
4343 emit_int8(opcode); |
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4344 emit_int8((unsigned char)(0xC0 | encode)); |
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|
4345 } |
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|
4346 |
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|
4347 // Versions with no second source register (non-destructive source). |
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4348 void Assembler::emit_simd_arith_nonds(int opcode, XMMRegister dst, Address src, VexSimdPrefix pre) { |
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4349 InstructionMark im(this); |
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4350 simd_prefix(dst, xnoreg, src, pre); |
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|
4351 emit_int8(opcode); |
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|
4352 emit_operand(dst, src); |
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|
4353 } |
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|
4354 |
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4355 void Assembler::emit_simd_arith_nonds(int opcode, XMMRegister dst, XMMRegister src, VexSimdPrefix pre) { |
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4356 int encode = simd_prefix_and_encode(dst, xnoreg, src, pre); |
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|
4357 emit_int8(opcode); |
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4358 emit_int8((unsigned char)(0xC0 | encode)); |
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4359 } |
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|
4360 |
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|
4361 // 3-operands AVX instructions |
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4362 void Assembler::emit_vex_arith(int opcode, XMMRegister dst, XMMRegister nds, |
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4363 Address src, VexSimdPrefix pre, bool vector256) { |
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4364 InstructionMark im(this); |
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4365 vex_prefix(dst, nds, src, pre, vector256); |
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4366 emit_int8(opcode); |
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4367 emit_operand(dst, src); |
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4368 } |
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|
4369 |
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4370 void Assembler::emit_vex_arith(int opcode, XMMRegister dst, XMMRegister nds, |
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4371 XMMRegister src, VexSimdPrefix pre, bool vector256) { |
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4372 int encode = vex_prefix_and_encode(dst, nds, src, pre, vector256); |
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4373 emit_int8(opcode); |
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4374 emit_int8((unsigned char)(0xC0 | encode)); |
6614
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4375 } |
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4376 |
304 | 4377 #ifndef _LP64 |
4378 | |
4379 void Assembler::incl(Register dst) { | |
4380 // Don't use it directly. Use MacroAssembler::incrementl() instead. | |
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4381 emit_int8(0x40 | dst->encoding()); |
304 | 4382 } |
4383 | |
4384 void Assembler::lea(Register dst, Address src) { | |
4385 leal(dst, src); | |
4386 } | |
4387 | |
4388 void Assembler::mov_literal32(Address dst, int32_t imm32, RelocationHolder const& rspec) { | |
4389 InstructionMark im(this); | |
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4390 emit_int8((unsigned char)0xC7); |
304 | 4391 emit_operand(rax, dst); |
4392 emit_data((int)imm32, rspec, 0); | |
4393 } | |
4394 | |
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4395 void Assembler::mov_literal32(Register dst, int32_t imm32, RelocationHolder const& rspec) { |
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4396 InstructionMark im(this); |
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4397 int encode = prefix_and_encode(dst->encoding()); |
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4398 emit_int8((unsigned char)(0xB8 | encode)); |
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4399 emit_data((int)imm32, rspec, 0); |
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4400 } |
304 | 4401 |
4402 void Assembler::popa() { // 32bit | |
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4403 emit_int8(0x61); |
304 | 4404 } |
4405 | |
4406 void Assembler::push_literal32(int32_t imm32, RelocationHolder const& rspec) { | |
4407 InstructionMark im(this); | |
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4408 emit_int8(0x68); |
304 | 4409 emit_data(imm32, rspec, 0); |
4410 } | |
4411 | |
4412 void Assembler::pusha() { // 32bit | |
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4413 emit_int8(0x60); |
304 | 4414 } |
4415 | |
4416 void Assembler::set_byte_if_not_zero(Register dst) { | |
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4417 emit_int8(0x0F); |
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4418 emit_int8((unsigned char)0x95); |
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4419 emit_int8((unsigned char)(0xE0 | dst->encoding())); |
304 | 4420 } |
4421 | |
4422 void Assembler::shldl(Register dst, Register src) { | |
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4423 emit_int8(0x0F); |
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4424 emit_int8((unsigned char)0xA5); |
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4425 emit_int8((unsigned char)(0xC0 | src->encoding() << 3 | dst->encoding())); |
304 | 4426 } |
4427 | |
4428 void Assembler::shrdl(Register dst, Register src) { | |
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4429 emit_int8(0x0F); |
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4430 emit_int8((unsigned char)0xAD); |
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4431 emit_int8((unsigned char)(0xC0 | src->encoding() << 3 | dst->encoding())); |
304 | 4432 } |
4433 | |
4434 #else // LP64 | |
4435 | |
1369 | 4436 void Assembler::set_byte_if_not_zero(Register dst) { |
4437 int enc = prefix_and_encode(dst->encoding(), true); | |
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4438 emit_int8(0x0F); |
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4439 emit_int8((unsigned char)0x95); |
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4440 emit_int8((unsigned char)(0xE0 | enc)); |
1369 | 4441 } |
4442 | |
304 | 4443 // 64bit only pieces of the assembler |
4444 // This should only be used by 64bit instructions that can use rip-relative | |
4445 // it cannot be used by instructions that want an immediate value. | |
4446 | |
4447 bool Assembler::reachable(AddressLiteral adr) { | |
4448 int64_t disp; | |
4449 // None will force a 64bit literal to the code stream. Likely a placeholder | |
4450 // for something that will be patched later and we need to certain it will | |
4451 // always be reachable. | |
4452 if (adr.reloc() == relocInfo::none) { | |
4453 return false; | |
4454 } | |
4455 if (adr.reloc() == relocInfo::internal_word_type) { | |
4456 // This should be rip relative and easily reachable. | |
4457 return true; | |
4458 } | |
4459 if (adr.reloc() == relocInfo::virtual_call_type || | |
4460 adr.reloc() == relocInfo::opt_virtual_call_type || | |
4461 adr.reloc() == relocInfo::static_call_type || | |
4462 adr.reloc() == relocInfo::static_stub_type ) { | |
4463 // This should be rip relative within the code cache and easily | |
4464 // reachable until we get huge code caches. (At which point | |
4465 // ic code is going to have issues). | |
4466 return true; | |
4467 } | |
4468 if (adr.reloc() != relocInfo::external_word_type && | |
4469 adr.reloc() != relocInfo::poll_return_type && // these are really external_word but need special | |
4470 adr.reloc() != relocInfo::poll_type && // relocs to identify them | |
4471 adr.reloc() != relocInfo::runtime_call_type ) { | |
4472 return false; | |
4473 } | |
4474 | |
4475 // Stress the correction code | |
4476 if (ForceUnreachable) { | |
4477 // Must be runtimecall reloc, see if it is in the codecache | |
4478 // Flipping stuff in the codecache to be unreachable causes issues | |
4479 // with things like inline caches where the additional instructions | |
4480 // are not handled. | |
4481 if (CodeCache::find_blob(adr._target) == NULL) { | |
4482 return false; | |
4483 } | |
4484 } | |
4485 // For external_word_type/runtime_call_type if it is reachable from where we | |
4486 // are now (possibly a temp buffer) and where we might end up | |
4487 // anywhere in the codeCache then we are always reachable. | |
4488 // This would have to change if we ever save/restore shared code | |
4489 // to be more pessimistic. | |
4490 disp = (int64_t)adr._target - ((int64_t)CodeCache::low_bound() + sizeof(int)); | |
4491 if (!is_simm32(disp)) return false; | |
4492 disp = (int64_t)adr._target - ((int64_t)CodeCache::high_bound() + sizeof(int)); | |
4493 if (!is_simm32(disp)) return false; | |
4494 | |
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4495 disp = (int64_t)adr._target - ((int64_t)pc() + sizeof(int)); |
304 | 4496 |
4497 // Because rip relative is a disp + address_of_next_instruction and we | |
4498 // don't know the value of address_of_next_instruction we apply a fudge factor | |
4499 // to make sure we will be ok no matter the size of the instruction we get placed into. | |
4500 // We don't have to fudge the checks above here because they are already worst case. | |
4501 | |
4502 // 12 == override/rex byte, opcode byte, rm byte, sib byte, a 4-byte disp , 4-byte literal | |
4503 // + 4 because better safe than sorry. | |
4504 const int fudge = 12 + 4; | |
4505 if (disp < 0) { | |
4506 disp -= fudge; | |
4507 } else { | |
4508 disp += fudge; | |
4509 } | |
4510 return is_simm32(disp); | |
4511 } | |
4512 | |
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4513 // Check if the polling page is not reachable from the code cache using rip-relative |
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4514 // addressing. |
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4515 bool Assembler::is_polling_page_far() { |
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4516 intptr_t addr = (intptr_t)os::get_polling_page(); |
4118
59bc0d4d9ea3
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4517 return ForceUnreachable || |
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4518 !is_simm32(addr - (intptr_t)CodeCache::low_bound()) || |
2404
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4519 !is_simm32(addr - (intptr_t)CodeCache::high_bound()); |
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4520 } |
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4521 |
304 | 4522 void Assembler::emit_data64(jlong data, |
4523 relocInfo::relocType rtype, | |
4524 int format) { | |
4525 if (rtype == relocInfo::none) { | |
7198
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4526 emit_int64(data); |
304 | 4527 } else { |
4528 emit_data64(data, Relocation::spec_simple(rtype), format); | |
4529 } | |
4530 } | |
4531 | |
4532 void Assembler::emit_data64(jlong data, | |
4533 RelocationHolder const& rspec, | |
4534 int format) { | |
4535 assert(imm_operand == 0, "default format must be immediate in this file"); | |
4536 assert(imm_operand == format, "must be immediate"); | |
4537 assert(inst_mark() != NULL, "must be inside InstructionMark"); | |
4538 // Do not use AbstractAssembler::relocate, which is not intended for | |
4539 // embedded words. Instead, relocate to the enclosing instruction. | |
4540 code_section()->relocate(inst_mark(), rspec, format); | |
4541 #ifdef ASSERT | |
4542 check_relocation(rspec, format); | |
4543 #endif | |
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4544 emit_int64(data); |
304 | 4545 } |
4546 | |
4547 int Assembler::prefix_and_encode(int reg_enc, bool byteinst) { | |
4548 if (reg_enc >= 8) { | |
4549 prefix(REX_B); | |
4550 reg_enc -= 8; | |
4551 } else if (byteinst && reg_enc >= 4) { | |
4552 prefix(REX); | |
4553 } | |
4554 return reg_enc; | |
4555 } | |
4556 | |
4557 int Assembler::prefixq_and_encode(int reg_enc) { | |
4558 if (reg_enc < 8) { | |
4559 prefix(REX_W); | |
4560 } else { | |
4561 prefix(REX_WB); | |
4562 reg_enc -= 8; | |
4563 } | |
4564 return reg_enc; | |
4565 } | |
4566 | |
4567 int Assembler::prefix_and_encode(int dst_enc, int src_enc, bool byteinst) { | |
4568 if (dst_enc < 8) { | |
4569 if (src_enc >= 8) { | |
4570 prefix(REX_B); | |
4571 src_enc -= 8; | |
4572 } else if (byteinst && src_enc >= 4) { | |
4573 prefix(REX); | |
4574 } | |
4575 } else { | |
4576 if (src_enc < 8) { | |
4577 prefix(REX_R); | |
4578 } else { | |
4579 prefix(REX_RB); | |
4580 src_enc -= 8; | |
4581 } | |
4582 dst_enc -= 8; | |
4583 } | |
4584 return dst_enc << 3 | src_enc; | |
4585 } | |
4586 | |
4587 int Assembler::prefixq_and_encode(int dst_enc, int src_enc) { | |
4588 if (dst_enc < 8) { | |
4589 if (src_enc < 8) { | |
4590 prefix(REX_W); | |
4591 } else { | |
4592 prefix(REX_WB); | |
4593 src_enc -= 8; | |
4594 } | |
4595 } else { | |
4596 if (src_enc < 8) { | |
4597 prefix(REX_WR); | |
4598 } else { | |
4599 prefix(REX_WRB); | |
4600 src_enc -= 8; | |
4601 } | |
4602 dst_enc -= 8; | |
4603 } | |
4604 return dst_enc << 3 | src_enc; | |
4605 } | |
4606 | |
4607 void Assembler::prefix(Register reg) { | |
4608 if (reg->encoding() >= 8) { | |
4609 prefix(REX_B); | |
4610 } | |
4611 } | |
4612 | |
4613 void Assembler::prefix(Address adr) { | |
4614 if (adr.base_needs_rex()) { | |
4615 if (adr.index_needs_rex()) { | |
4616 prefix(REX_XB); | |
4617 } else { | |
4618 prefix(REX_B); | |
4619 } | |
4620 } else { | |
4621 if (adr.index_needs_rex()) { | |
4622 prefix(REX_X); | |
4623 } | |
4624 } | |
4625 } | |
4626 | |
4627 void Assembler::prefixq(Address adr) { | |
4628 if (adr.base_needs_rex()) { | |
4629 if (adr.index_needs_rex()) { | |
4630 prefix(REX_WXB); | |
4631 } else { | |
4632 prefix(REX_WB); | |
4633 } | |
4634 } else { | |
4635 if (adr.index_needs_rex()) { | |
4636 prefix(REX_WX); | |
4637 } else { | |
4638 prefix(REX_W); | |
4639 } | |
4640 } | |
4641 } | |
4642 | |
4643 | |
4644 void Assembler::prefix(Address adr, Register reg, bool byteinst) { | |
4645 if (reg->encoding() < 8) { | |
4646 if (adr.base_needs_rex()) { | |
4647 if (adr.index_needs_rex()) { | |
4648 prefix(REX_XB); | |
4649 } else { | |
4650 prefix(REX_B); | |
4651 } | |
4652 } else { | |
4653 if (adr.index_needs_rex()) { | |
4654 prefix(REX_X); | |
3855 | 4655 } else if (byteinst && reg->encoding() >= 4 ) { |
304 | 4656 prefix(REX); |
4657 } | |
4658 } | |
4659 } else { | |
4660 if (adr.base_needs_rex()) { | |
4661 if (adr.index_needs_rex()) { | |
4662 prefix(REX_RXB); | |
4663 } else { | |
4664 prefix(REX_RB); | |
4665 } | |
4666 } else { | |
4667 if (adr.index_needs_rex()) { | |
4668 prefix(REX_RX); | |
4669 } else { | |
4670 prefix(REX_R); | |
4671 } | |
4672 } | |
4673 } | |
4674 } | |
4675 | |
4676 void Assembler::prefixq(Address adr, Register src) { | |
4677 if (src->encoding() < 8) { | |
4678 if (adr.base_needs_rex()) { | |
4679 if (adr.index_needs_rex()) { | |
4680 prefix(REX_WXB); | |
4681 } else { | |
4682 prefix(REX_WB); | |
4683 } | |
4684 } else { | |
4685 if (adr.index_needs_rex()) { | |
4686 prefix(REX_WX); | |
4687 } else { | |
4688 prefix(REX_W); | |
4689 } | |
4690 } | |
4691 } else { | |
4692 if (adr.base_needs_rex()) { | |
4693 if (adr.index_needs_rex()) { | |
4694 prefix(REX_WRXB); | |
4695 } else { | |
4696 prefix(REX_WRB); | |
4697 } | |
4698 } else { | |
4699 if (adr.index_needs_rex()) { | |
4700 prefix(REX_WRX); | |
4701 } else { | |
4702 prefix(REX_WR); | |
4703 } | |
4704 } | |
4705 } | |
4706 } | |
4707 | |
4708 void Assembler::prefix(Address adr, XMMRegister reg) { | |
4709 if (reg->encoding() < 8) { | |
4710 if (adr.base_needs_rex()) { | |
4711 if (adr.index_needs_rex()) { | |
4712 prefix(REX_XB); | |
4713 } else { | |
4714 prefix(REX_B); | |
4715 } | |
4716 } else { | |
4717 if (adr.index_needs_rex()) { | |
4718 prefix(REX_X); | |
4719 } | |
4720 } | |
4721 } else { | |
4722 if (adr.base_needs_rex()) { | |
4723 if (adr.index_needs_rex()) { | |
4724 prefix(REX_RXB); | |
4725 } else { | |
4726 prefix(REX_RB); | |
4727 } | |
4728 } else { | |
4729 if (adr.index_needs_rex()) { | |
4730 prefix(REX_RX); | |
4731 } else { | |
4732 prefix(REX_R); | |
4733 } | |
4734 } | |
4735 } | |
4736 } | |
4737 | |
4759 | 4738 void Assembler::prefixq(Address adr, XMMRegister src) { |
4739 if (src->encoding() < 8) { | |
4740 if (adr.base_needs_rex()) { | |
4741 if (adr.index_needs_rex()) { | |
4742 prefix(REX_WXB); | |
4743 } else { | |
4744 prefix(REX_WB); | |
4745 } | |
4746 } else { | |
4747 if (adr.index_needs_rex()) { | |
4748 prefix(REX_WX); | |
4749 } else { | |
4750 prefix(REX_W); | |
4751 } | |
4752 } | |
4753 } else { | |
4754 if (adr.base_needs_rex()) { | |
4755 if (adr.index_needs_rex()) { | |
4756 prefix(REX_WRXB); | |
4757 } else { | |
4758 prefix(REX_WRB); | |
4759 } | |
4760 } else { | |
4761 if (adr.index_needs_rex()) { | |
4762 prefix(REX_WRX); | |
4763 } else { | |
4764 prefix(REX_WR); | |
4765 } | |
4766 } | |
4767 } | |
4768 } | |
4769 | |
304 | 4770 void Assembler::adcq(Register dst, int32_t imm32) { |
4771 (void) prefixq_and_encode(dst->encoding()); | |
4772 emit_arith(0x81, 0xD0, dst, imm32); | |
4773 } | |
4774 | |
4775 void Assembler::adcq(Register dst, Address src) { | |
4776 InstructionMark im(this); | |
4777 prefixq(src, dst); | |
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|
4778 emit_int8(0x13); |
304 | 4779 emit_operand(dst, src); |
4780 } | |
4781 | |
4782 void Assembler::adcq(Register dst, Register src) { | |
12329 | 4783 (void) prefixq_and_encode(dst->encoding(), src->encoding()); |
304 | 4784 emit_arith(0x13, 0xC0, dst, src); |
4785 } | |
4786 | |
4787 void Assembler::addq(Address dst, int32_t imm32) { | |
4788 InstructionMark im(this); | |
4789 prefixq(dst); | |
4790 emit_arith_operand(0x81, rax, dst,imm32); | |
4791 } | |
4792 | |
4793 void Assembler::addq(Address dst, Register src) { | |
4794 InstructionMark im(this); | |
4795 prefixq(dst, src); | |
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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changeset
|
4796 emit_int8(0x01); |
304 | 4797 emit_operand(src, dst); |
4798 } | |
4799 | |
4800 void Assembler::addq(Register dst, int32_t imm32) { | |
4801 (void) prefixq_and_encode(dst->encoding()); | |
4802 emit_arith(0x81, 0xC0, dst, imm32); | |
4803 } | |
4804 | |
4805 void Assembler::addq(Register dst, Address src) { | |
4806 InstructionMark im(this); | |
4807 prefixq(src, dst); | |
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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diff
changeset
|
4808 emit_int8(0x03); |
304 | 4809 emit_operand(dst, src); |
4810 } | |
4811 | |
4812 void Assembler::addq(Register dst, Register src) { | |
4813 (void) prefixq_and_encode(dst->encoding(), src->encoding()); | |
4814 emit_arith(0x03, 0xC0, dst, src); | |
4815 } | |
4816 | |
3457 | 4817 void Assembler::andq(Address dst, int32_t imm32) { |
4818 InstructionMark im(this); | |
4819 prefixq(dst); | |
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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changeset
|
4820 emit_int8((unsigned char)0x81); |
3457 | 4821 emit_operand(rsp, dst, 4); |
7476
ffa87474d7a4
8004537: replace AbstractAssembler emit_long with emit_int32
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7475
diff
changeset
|
4822 emit_int32(imm32); |
3457 | 4823 } |
4824 | |
304 | 4825 void Assembler::andq(Register dst, int32_t imm32) { |
4826 (void) prefixq_and_encode(dst->encoding()); | |
4827 emit_arith(0x81, 0xE0, dst, imm32); | |
4828 } | |
4829 | |
4830 void Assembler::andq(Register dst, Address src) { | |
4831 InstructionMark im(this); | |
4832 prefixq(src, dst); | |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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diff
changeset
|
4833 emit_int8(0x23); |
304 | 4834 emit_operand(dst, src); |
4835 } | |
4836 | |
4837 void Assembler::andq(Register dst, Register src) { | |
12329 | 4838 (void) prefixq_and_encode(dst->encoding(), src->encoding()); |
304 | 4839 emit_arith(0x23, 0xC0, dst, src); |
4840 } | |
4841 | |
775
93c14e5562c4
6823354: Add intrinsics for {Integer,Long}.{numberOfLeadingZeros,numberOfTrailingZeros}()
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710
diff
changeset
|
4842 void Assembler::bsfq(Register dst, Register src) { |
93c14e5562c4
6823354: Add intrinsics for {Integer,Long}.{numberOfLeadingZeros,numberOfTrailingZeros}()
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diff
changeset
|
4843 int encode = prefixq_and_encode(dst->encoding(), src->encoding()); |
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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changeset
|
4844 emit_int8(0x0F); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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diff
changeset
|
4845 emit_int8((unsigned char)0xBC); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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diff
changeset
|
4846 emit_int8((unsigned char)(0xC0 | encode)); |
775
93c14e5562c4
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diff
changeset
|
4847 } |
93c14e5562c4
6823354: Add intrinsics for {Integer,Long}.{numberOfLeadingZeros,numberOfTrailingZeros}()
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diff
changeset
|
4848 |
93c14e5562c4
6823354: Add intrinsics for {Integer,Long}.{numberOfLeadingZeros,numberOfTrailingZeros}()
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diff
changeset
|
4849 void Assembler::bsrq(Register dst, Register src) { |
93c14e5562c4
6823354: Add intrinsics for {Integer,Long}.{numberOfLeadingZeros,numberOfTrailingZeros}()
twisti
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diff
changeset
|
4850 assert(!VM_Version::supports_lzcnt(), "encoding is treated as LZCNT"); |
93c14e5562c4
6823354: Add intrinsics for {Integer,Long}.{numberOfLeadingZeros,numberOfTrailingZeros}()
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diff
changeset
|
4851 int encode = prefixq_and_encode(dst->encoding(), src->encoding()); |
7430
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diff
changeset
|
4852 emit_int8(0x0F); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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diff
changeset
|
4853 emit_int8((unsigned char)0xBD); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
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7427
diff
changeset
|
4854 emit_int8((unsigned char)(0xC0 | encode)); |
775
93c14e5562c4
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twisti
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710
diff
changeset
|
4855 } |
93c14e5562c4
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twisti
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diff
changeset
|
4856 |
304 | 4857 void Assembler::bswapq(Register reg) { |
4858 int encode = prefixq_and_encode(reg->encoding()); | |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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diff
changeset
|
4859 emit_int8(0x0F); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
4860 emit_int8((unsigned char)(0xC8 | encode)); |
304 | 4861 } |
4862 | |
4863 void Assembler::cdqq() { | |
4864 prefix(REX_W); | |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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diff
changeset
|
4865 emit_int8((unsigned char)0x99); |
304 | 4866 } |
4867 | |
4868 void Assembler::clflush(Address adr) { | |
4869 prefix(adr); | |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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7427
diff
changeset
|
4870 emit_int8(0x0F); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
4871 emit_int8((unsigned char)0xAE); |
304 | 4872 emit_operand(rdi, adr); |
4873 } | |
4874 | |
4875 void Assembler::cmovq(Condition cc, Register dst, Register src) { | |
4876 int encode = prefixq_and_encode(dst->encoding(), src->encoding()); | |
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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7427
diff
changeset
|
4877 emit_int8(0x0F); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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parents:
7427
diff
changeset
|
4878 emit_int8(0x40 | cc); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
4879 emit_int8((unsigned char)(0xC0 | encode)); |
304 | 4880 } |
4881 | |
4882 void Assembler::cmovq(Condition cc, Register dst, Address src) { | |
4883 InstructionMark im(this); | |
4884 prefixq(src, dst); | |
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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7427
diff
changeset
|
4885 emit_int8(0x0F); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
4886 emit_int8(0x40 | cc); |
304 | 4887 emit_operand(dst, src); |
4888 } | |
4889 | |
4890 void Assembler::cmpq(Address dst, int32_t imm32) { | |
4891 InstructionMark im(this); | |
4892 prefixq(dst); | |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
4893 emit_int8((unsigned char)0x81); |
304 | 4894 emit_operand(rdi, dst, 4); |
7476
ffa87474d7a4
8004537: replace AbstractAssembler emit_long with emit_int32
twisti
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7475
diff
changeset
|
4895 emit_int32(imm32); |
304 | 4896 } |
4897 | |
4898 void Assembler::cmpq(Register dst, int32_t imm32) { | |
4899 (void) prefixq_and_encode(dst->encoding()); | |
4900 emit_arith(0x81, 0xF8, dst, imm32); | |
4901 } | |
4902 | |
4903 void Assembler::cmpq(Address dst, Register src) { | |
4904 InstructionMark im(this); | |
4905 prefixq(dst, src); | |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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parents:
7427
diff
changeset
|
4906 emit_int8(0x3B); |
304 | 4907 emit_operand(src, dst); |
4908 } | |
4909 | |
4910 void Assembler::cmpq(Register dst, Register src) { | |
4911 (void) prefixq_and_encode(dst->encoding(), src->encoding()); | |
4912 emit_arith(0x3B, 0xC0, dst, src); | |
4913 } | |
4914 | |
4915 void Assembler::cmpq(Register dst, Address src) { | |
4916 InstructionMark im(this); | |
4917 prefixq(src, dst); | |
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d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
4918 emit_int8(0x3B); |
304 | 4919 emit_operand(dst, src); |
4920 } | |
4921 | |
4922 void Assembler::cmpxchgq(Register reg, Address adr) { | |
4923 InstructionMark im(this); | |
4924 prefixq(adr, reg); | |
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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parents:
7427
diff
changeset
|
4925 emit_int8(0x0F); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
4926 emit_int8((unsigned char)0xB1); |
304 | 4927 emit_operand(reg, adr); |
4928 } | |
4929 | |
4930 void Assembler::cvtsi2sdq(XMMRegister dst, Register src) { | |
4931 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
4759 | 4932 int encode = simd_prefix_and_encode_q(dst, dst, src, VEX_SIMD_F2); |
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
4933 emit_int8(0x2A); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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parents:
7427
diff
changeset
|
4934 emit_int8((unsigned char)(0xC0 | encode)); |
304 | 4935 } |
4936 | |
4759 | 4937 void Assembler::cvtsi2sdq(XMMRegister dst, Address src) { |
4938 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
4939 InstructionMark im(this); | |
4940 simd_prefix_q(dst, dst, src, VEX_SIMD_F2); | |
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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7427
diff
changeset
|
4941 emit_int8(0x2A); |
4759 | 4942 emit_operand(dst, src); |
4943 } | |
4944 | |
304 | 4945 void Assembler::cvtsi2ssq(XMMRegister dst, Register src) { |
4946 NOT_LP64(assert(VM_Version::supports_sse(), "")); | |
4759 | 4947 int encode = simd_prefix_and_encode_q(dst, dst, src, VEX_SIMD_F3); |
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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parents:
7427
diff
changeset
|
4948 emit_int8(0x2A); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
4949 emit_int8((unsigned char)(0xC0 | encode)); |
304 | 4950 } |
4951 | |
4759 | 4952 void Assembler::cvtsi2ssq(XMMRegister dst, Address src) { |
4953 NOT_LP64(assert(VM_Version::supports_sse(), "")); | |
4954 InstructionMark im(this); | |
4955 simd_prefix_q(dst, dst, src, VEX_SIMD_F3); | |
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
4956 emit_int8(0x2A); |
4759 | 4957 emit_operand(dst, src); |
4958 } | |
4959 | |
304 | 4960 void Assembler::cvttsd2siq(Register dst, XMMRegister src) { |
4961 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
4759 | 4962 int encode = simd_prefix_and_encode_q(dst, src, VEX_SIMD_F2); |
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
4963 emit_int8(0x2C); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
4964 emit_int8((unsigned char)(0xC0 | encode)); |
304 | 4965 } |
4966 | |
4967 void Assembler::cvttss2siq(Register dst, XMMRegister src) { | |
4968 NOT_LP64(assert(VM_Version::supports_sse(), "")); | |
4759 | 4969 int encode = simd_prefix_and_encode_q(dst, src, VEX_SIMD_F3); |
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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parents:
7427
diff
changeset
|
4970 emit_int8(0x2C); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
4971 emit_int8((unsigned char)(0xC0 | encode)); |
304 | 4972 } |
4973 | |
4974 void Assembler::decl(Register dst) { | |
4975 // Don't use it directly. Use MacroAssembler::decrementl() instead. | |
4976 // Use two-byte form (one-byte form is a REX prefix in 64-bit mode) | |
4977 int encode = prefix_and_encode(dst->encoding()); | |
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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7427
diff
changeset
|
4978 emit_int8((unsigned char)0xFF); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
4979 emit_int8((unsigned char)(0xC8 | encode)); |
304 | 4980 } |
4981 | |
4982 void Assembler::decq(Register dst) { | |
4983 // Don't use it directly. Use MacroAssembler::decrementq() instead. | |
4984 // Use two-byte form (one-byte from is a REX prefix in 64-bit mode) | |
4985 int encode = prefixq_and_encode(dst->encoding()); | |
7430
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diff
changeset
|
4986 emit_int8((unsigned char)0xFF); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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7427
diff
changeset
|
4987 emit_int8(0xC8 | encode); |
304 | 4988 } |
4989 | |
4990 void Assembler::decq(Address dst) { | |
4991 // Don't use it directly. Use MacroAssembler::decrementq() instead. | |
4992 InstructionMark im(this); | |
4993 prefixq(dst); | |
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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diff
changeset
|
4994 emit_int8((unsigned char)0xFF); |
304 | 4995 emit_operand(rcx, dst); |
4996 } | |
4997 | |
4998 void Assembler::fxrstor(Address src) { | |
4999 prefixq(src); | |
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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diff
changeset
|
5000 emit_int8(0x0F); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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diff
changeset
|
5001 emit_int8((unsigned char)0xAE); |
304 | 5002 emit_operand(as_Register(1), src); |
5003 } | |
5004 | |
5005 void Assembler::fxsave(Address dst) { | |
5006 prefixq(dst); | |
7430
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diff
changeset
|
5007 emit_int8(0x0F); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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7427
diff
changeset
|
5008 emit_int8((unsigned char)0xAE); |
304 | 5009 emit_operand(as_Register(0), dst); |
5010 } | |
5011 | |
5012 void Assembler::idivq(Register src) { | |
5013 int encode = prefixq_and_encode(src->encoding()); | |
7430
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diff
changeset
|
5014 emit_int8((unsigned char)0xF7); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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7427
diff
changeset
|
5015 emit_int8((unsigned char)(0xF8 | encode)); |
304 | 5016 } |
5017 | |
5018 void Assembler::imulq(Register dst, Register src) { | |
5019 int encode = prefixq_and_encode(dst->encoding(), src->encoding()); | |
7430
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diff
changeset
|
5020 emit_int8(0x0F); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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diff
changeset
|
5021 emit_int8((unsigned char)0xAF); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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7427
diff
changeset
|
5022 emit_int8((unsigned char)(0xC0 | encode)); |
304 | 5023 } |
5024 | |
5025 void Assembler::imulq(Register dst, Register src, int value) { | |
5026 int encode = prefixq_and_encode(dst->encoding(), src->encoding()); | |
5027 if (is8bit(value)) { | |
7430
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twisti
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7427
diff
changeset
|
5028 emit_int8(0x6B); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
5029 emit_int8((unsigned char)(0xC0 | encode)); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
5030 emit_int8(value & 0xFF); |
304 | 5031 } else { |
7430
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diff
changeset
|
5032 emit_int8(0x69); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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7427
diff
changeset
|
5033 emit_int8((unsigned char)(0xC0 | encode)); |
7476
ffa87474d7a4
8004537: replace AbstractAssembler emit_long with emit_int32
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7475
diff
changeset
|
5034 emit_int32(value); |
304 | 5035 } |
5036 } | |
5037 | |
12972
59e8ad757e19
8026844: Various Math functions needs intrinsification
rbackman
parents:
12329
diff
changeset
|
5038 void Assembler::imulq(Register dst, Address src) { |
59e8ad757e19
8026844: Various Math functions needs intrinsification
rbackman
parents:
12329
diff
changeset
|
5039 InstructionMark im(this); |
59e8ad757e19
8026844: Various Math functions needs intrinsification
rbackman
parents:
12329
diff
changeset
|
5040 prefixq(src, dst); |
59e8ad757e19
8026844: Various Math functions needs intrinsification
rbackman
parents:
12329
diff
changeset
|
5041 emit_int8(0x0F); |
59e8ad757e19
8026844: Various Math functions needs intrinsification
rbackman
parents:
12329
diff
changeset
|
5042 emit_int8((unsigned char) 0xAF); |
59e8ad757e19
8026844: Various Math functions needs intrinsification
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12329
diff
changeset
|
5043 emit_operand(dst, src); |
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12329
diff
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|
5044 } |
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|
5045 |
304 | 5046 void Assembler::incl(Register dst) { |
5047 // Don't use it directly. Use MacroAssembler::incrementl() instead. | |
5048 // Use two-byte form (one-byte from is a REX prefix in 64-bit mode) | |
5049 int encode = prefix_and_encode(dst->encoding()); | |
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|
5050 emit_int8((unsigned char)0xFF); |
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changeset
|
5051 emit_int8((unsigned char)(0xC0 | encode)); |
304 | 5052 } |
5053 | |
5054 void Assembler::incq(Register dst) { | |
5055 // Don't use it directly. Use MacroAssembler::incrementq() instead. | |
5056 // Use two-byte form (one-byte from is a REX prefix in 64-bit mode) | |
5057 int encode = prefixq_and_encode(dst->encoding()); | |
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|
5058 emit_int8((unsigned char)0xFF); |
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changeset
|
5059 emit_int8((unsigned char)(0xC0 | encode)); |
304 | 5060 } |
5061 | |
5062 void Assembler::incq(Address dst) { | |
5063 // Don't use it directly. Use MacroAssembler::incrementq() instead. | |
5064 InstructionMark im(this); | |
5065 prefixq(dst); | |
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changeset
|
5066 emit_int8((unsigned char)0xFF); |
304 | 5067 emit_operand(rax, dst); |
5068 } | |
5069 | |
5070 void Assembler::lea(Register dst, Address src) { | |
5071 leaq(dst, src); | |
5072 } | |
5073 | |
5074 void Assembler::leaq(Register dst, Address src) { | |
5075 InstructionMark im(this); | |
5076 prefixq(src, dst); | |
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changeset
|
5077 emit_int8((unsigned char)0x8D); |
304 | 5078 emit_operand(dst, src); |
5079 } | |
5080 | |
5081 void Assembler::mov64(Register dst, int64_t imm64) { | |
5082 InstructionMark im(this); | |
5083 int encode = prefixq_and_encode(dst->encoding()); | |
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changeset
|
5084 emit_int8((unsigned char)(0xB8 | encode)); |
7198
6ab62ad83507
8003195: AbstractAssembler should not store code pointers but use the CodeSection directly
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diff
changeset
|
5085 emit_int64(imm64); |
304 | 5086 } |
5087 | |
5088 void Assembler::mov_literal64(Register dst, intptr_t imm64, RelocationHolder const& rspec) { | |
5089 InstructionMark im(this); | |
5090 int encode = prefixq_and_encode(dst->encoding()); | |
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changeset
|
5091 emit_int8(0xB8 | encode); |
304 | 5092 emit_data64(imm64, rspec); |
5093 } | |
5094 | |
642
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changeset
|
5095 void Assembler::mov_narrow_oop(Register dst, int32_t imm32, RelocationHolder const& rspec) { |
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|
5096 InstructionMark im(this); |
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|
5097 int encode = prefix_and_encode(dst->encoding()); |
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|
5098 emit_int8((unsigned char)(0xB8 | encode)); |
642
660978a2a31a
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changeset
|
5099 emit_data((int)imm32, rspec, narrow_oop_operand); |
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|
5100 } |
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changeset
|
5101 |
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changeset
|
5102 void Assembler::mov_narrow_oop(Address dst, int32_t imm32, RelocationHolder const& rspec) { |
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changeset
|
5103 InstructionMark im(this); |
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changeset
|
5104 prefix(dst); |
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|
5105 emit_int8((unsigned char)0xC7); |
642
660978a2a31a
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diff
changeset
|
5106 emit_operand(rax, dst, 4); |
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changeset
|
5107 emit_data((int)imm32, rspec, narrow_oop_operand); |
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changeset
|
5108 } |
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diff
changeset
|
5109 |
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diff
changeset
|
5110 void Assembler::cmp_narrow_oop(Register src1, int32_t imm32, RelocationHolder const& rspec) { |
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changeset
|
5111 InstructionMark im(this); |
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diff
changeset
|
5112 int encode = prefix_and_encode(src1->encoding()); |
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changeset
|
5113 emit_int8((unsigned char)0x81); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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changeset
|
5114 emit_int8((unsigned char)(0xF8 | encode)); |
642
660978a2a31a
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624
diff
changeset
|
5115 emit_data((int)imm32, rspec, narrow_oop_operand); |
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diff
changeset
|
5116 } |
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diff
changeset
|
5117 |
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diff
changeset
|
5118 void Assembler::cmp_narrow_oop(Address src1, int32_t imm32, RelocationHolder const& rspec) { |
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diff
changeset
|
5119 InstructionMark im(this); |
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diff
changeset
|
5120 prefix(src1); |
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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changeset
|
5121 emit_int8((unsigned char)0x81); |
642
660978a2a31a
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changeset
|
5122 emit_operand(rax, src1, 4); |
660978a2a31a
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diff
changeset
|
5123 emit_data((int)imm32, rspec, narrow_oop_operand); |
660978a2a31a
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diff
changeset
|
5124 } |
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diff
changeset
|
5125 |
775
93c14e5562c4
6823354: Add intrinsics for {Integer,Long}.{numberOfLeadingZeros,numberOfTrailingZeros}()
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710
diff
changeset
|
5126 void Assembler::lzcntq(Register dst, Register src) { |
93c14e5562c4
6823354: Add intrinsics for {Integer,Long}.{numberOfLeadingZeros,numberOfTrailingZeros}()
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710
diff
changeset
|
5127 assert(VM_Version::supports_lzcnt(), "encoding is treated as BSR"); |
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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changeset
|
5128 emit_int8((unsigned char)0xF3); |
775
93c14e5562c4
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parents:
710
diff
changeset
|
5129 int encode = prefixq_and_encode(dst->encoding(), src->encoding()); |
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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diff
changeset
|
5130 emit_int8(0x0F); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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7427
diff
changeset
|
5131 emit_int8((unsigned char)0xBD); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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7427
diff
changeset
|
5132 emit_int8((unsigned char)(0xC0 | encode)); |
775
93c14e5562c4
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twisti
parents:
710
diff
changeset
|
5133 } |
93c14e5562c4
6823354: Add intrinsics for {Integer,Long}.{numberOfLeadingZeros,numberOfTrailingZeros}()
twisti
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710
diff
changeset
|
5134 |
304 | 5135 void Assembler::movdq(XMMRegister dst, Register src) { |
5136 // table D-1 says MMX/SSE2 | |
4759 | 5137 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
5138 int encode = simd_prefix_and_encode_q(dst, src, VEX_SIMD_66); | |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
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7427
diff
changeset
|
5139 emit_int8(0x6E); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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parents:
7427
diff
changeset
|
5140 emit_int8((unsigned char)(0xC0 | encode)); |
304 | 5141 } |
5142 | |
5143 void Assembler::movdq(Register dst, XMMRegister src) { | |
5144 // table D-1 says MMX/SSE2 | |
4759 | 5145 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
304 | 5146 // swap src/dst to get correct prefix |
4759 | 5147 int encode = simd_prefix_and_encode_q(src, dst, VEX_SIMD_66); |
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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parents:
7427
diff
changeset
|
5148 emit_int8(0x7E); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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parents:
7427
diff
changeset
|
5149 emit_int8((unsigned char)(0xC0 | encode)); |
304 | 5150 } |
5151 | |
5152 void Assembler::movq(Register dst, Register src) { | |
5153 int encode = prefixq_and_encode(dst->encoding(), src->encoding()); | |
7430
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diff
changeset
|
5154 emit_int8((unsigned char)0x8B); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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parents:
7427
diff
changeset
|
5155 emit_int8((unsigned char)(0xC0 | encode)); |
304 | 5156 } |
5157 | |
5158 void Assembler::movq(Register dst, Address src) { | |
5159 InstructionMark im(this); | |
5160 prefixq(src, dst); | |
7430
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7427
diff
changeset
|
5161 emit_int8((unsigned char)0x8B); |
304 | 5162 emit_operand(dst, src); |
5163 } | |
5164 | |
5165 void Assembler::movq(Address dst, Register src) { | |
5166 InstructionMark im(this); | |
5167 prefixq(dst, src); | |
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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7427
diff
changeset
|
5168 emit_int8((unsigned char)0x89); |
304 | 5169 emit_operand(src, dst); |
5170 } | |
5171 | |
624 | 5172 void Assembler::movsbq(Register dst, Address src) { |
5173 InstructionMark im(this); | |
5174 prefixq(src, dst); | |
7430
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7427
diff
changeset
|
5175 emit_int8(0x0F); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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7427
diff
changeset
|
5176 emit_int8((unsigned char)0xBE); |
624 | 5177 emit_operand(dst, src); |
5178 } | |
5179 | |
5180 void Assembler::movsbq(Register dst, Register src) { | |
5181 int encode = prefixq_and_encode(dst->encoding(), src->encoding()); | |
7430
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diff
changeset
|
5182 emit_int8(0x0F); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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7427
diff
changeset
|
5183 emit_int8((unsigned char)0xBE); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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parents:
7427
diff
changeset
|
5184 emit_int8((unsigned char)(0xC0 | encode)); |
624 | 5185 } |
5186 | |
304 | 5187 void Assembler::movslq(Register dst, int32_t imm32) { |
5188 // dbx shows movslq(rcx, 3) as movq $0x0000000049000000,(%rbx) | |
5189 // and movslq(r8, 3); as movl $0x0000000048000000,(%rbx) | |
5190 // as a result we shouldn't use until tested at runtime... | |
5191 ShouldNotReachHere(); | |
5192 InstructionMark im(this); | |
5193 int encode = prefixq_and_encode(dst->encoding()); | |
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diff
changeset
|
5194 emit_int8((unsigned char)(0xC7 | encode)); |
7476
ffa87474d7a4
8004537: replace AbstractAssembler emit_long with emit_int32
twisti
parents:
7475
diff
changeset
|
5195 emit_int32(imm32); |
304 | 5196 } |
5197 | |
5198 void Assembler::movslq(Address dst, int32_t imm32) { | |
5199 assert(is_simm32(imm32), "lost bits"); | |
5200 InstructionMark im(this); | |
5201 prefixq(dst); | |
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changeset
|
5202 emit_int8((unsigned char)0xC7); |
304 | 5203 emit_operand(rax, dst, 4); |
7476
ffa87474d7a4
8004537: replace AbstractAssembler emit_long with emit_int32
twisti
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7475
diff
changeset
|
5204 emit_int32(imm32); |
304 | 5205 } |
5206 | |
5207 void Assembler::movslq(Register dst, Address src) { | |
5208 InstructionMark im(this); | |
5209 prefixq(src, dst); | |
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changeset
|
5210 emit_int8(0x63); |
304 | 5211 emit_operand(dst, src); |
5212 } | |
5213 | |
5214 void Assembler::movslq(Register dst, Register src) { | |
5215 int encode = prefixq_and_encode(dst->encoding(), src->encoding()); | |
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changeset
|
5216 emit_int8(0x63); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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changeset
|
5217 emit_int8((unsigned char)(0xC0 | encode)); |
304 | 5218 } |
5219 | |
624 | 5220 void Assembler::movswq(Register dst, Address src) { |
5221 InstructionMark im(this); | |
5222 prefixq(src, dst); | |
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changeset
|
5223 emit_int8(0x0F); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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changeset
|
5224 emit_int8((unsigned char)0xBF); |
624 | 5225 emit_operand(dst, src); |
5226 } | |
5227 | |
5228 void Assembler::movswq(Register dst, Register src) { | |
5229 int encode = prefixq_and_encode(dst->encoding(), src->encoding()); | |
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changeset
|
5230 emit_int8((unsigned char)0x0F); |
d02120b7a34f
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changeset
|
5231 emit_int8((unsigned char)0xBF); |
d02120b7a34f
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diff
changeset
|
5232 emit_int8((unsigned char)(0xC0 | encode)); |
624 | 5233 } |
5234 | |
5235 void Assembler::movzbq(Register dst, Address src) { | |
5236 InstructionMark im(this); | |
5237 prefixq(src, dst); | |
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changeset
|
5238 emit_int8((unsigned char)0x0F); |
d02120b7a34f
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changeset
|
5239 emit_int8((unsigned char)0xB6); |
624 | 5240 emit_operand(dst, src); |
5241 } | |
5242 | |
5243 void Assembler::movzbq(Register dst, Register src) { | |
5244 int encode = prefixq_and_encode(dst->encoding(), src->encoding()); | |
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changeset
|
5245 emit_int8(0x0F); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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diff
changeset
|
5246 emit_int8((unsigned char)0xB6); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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7427
diff
changeset
|
5247 emit_int8(0xC0 | encode); |
624 | 5248 } |
5249 | |
5250 void Assembler::movzwq(Register dst, Address src) { | |
5251 InstructionMark im(this); | |
5252 prefixq(src, dst); | |
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changeset
|
5253 emit_int8((unsigned char)0x0F); |
d02120b7a34f
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changeset
|
5254 emit_int8((unsigned char)0xB7); |
624 | 5255 emit_operand(dst, src); |
5256 } | |
5257 | |
5258 void Assembler::movzwq(Register dst, Register src) { | |
5259 int encode = prefixq_and_encode(dst->encoding(), src->encoding()); | |
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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changeset
|
5260 emit_int8((unsigned char)0x0F); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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diff
changeset
|
5261 emit_int8((unsigned char)0xB7); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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diff
changeset
|
5262 emit_int8((unsigned char)(0xC0 | encode)); |
624 | 5263 } |
5264 | |
304 | 5265 void Assembler::negq(Register dst) { |
5266 int encode = prefixq_and_encode(dst->encoding()); | |
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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diff
changeset
|
5267 emit_int8((unsigned char)0xF7); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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7427
diff
changeset
|
5268 emit_int8((unsigned char)(0xD8 | encode)); |
304 | 5269 } |
5270 | |
5271 void Assembler::notq(Register dst) { | |
5272 int encode = prefixq_and_encode(dst->encoding()); | |
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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changeset
|
5273 emit_int8((unsigned char)0xF7); |
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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diff
changeset
|
5274 emit_int8((unsigned char)(0xD0 | encode)); |
304 | 5275 } |
5276 | |
5277 void Assembler::orq(Address dst, int32_t imm32) { | |
5278 InstructionMark im(this); | |
5279 prefixq(dst); | |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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changeset
|
5280 emit_int8((unsigned char)0x81); |
304 | 5281 emit_operand(rcx, dst, 4); |
7476
ffa87474d7a4
8004537: replace AbstractAssembler emit_long with emit_int32
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7475
diff
changeset
|
5282 emit_int32(imm32); |
304 | 5283 } |
5284 | |
5285 void Assembler::orq(Register dst, int32_t imm32) { | |
5286 (void) prefixq_and_encode(dst->encoding()); | |
5287 emit_arith(0x81, 0xC8, dst, imm32); | |
5288 } | |
5289 | |
5290 void Assembler::orq(Register dst, Address src) { | |
5291 InstructionMark im(this); | |
5292 prefixq(src, dst); | |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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diff
changeset
|
5293 emit_int8(0x0B); |
304 | 5294 emit_operand(dst, src); |
5295 } | |
5296 | |
5297 void Assembler::orq(Register dst, Register src) { | |
5298 (void) prefixq_and_encode(dst->encoding(), src->encoding()); | |
5299 emit_arith(0x0B, 0xC0, dst, src); | |
5300 } | |
5301 | |
5302 void Assembler::popa() { // 64bit | |
5303 movq(r15, Address(rsp, 0)); | |
5304 movq(r14, Address(rsp, wordSize)); | |
5305 movq(r13, Address(rsp, 2 * wordSize)); | |
5306 movq(r12, Address(rsp, 3 * wordSize)); | |
5307 movq(r11, Address(rsp, 4 * wordSize)); | |
5308 movq(r10, Address(rsp, 5 * wordSize)); | |
5309 movq(r9, Address(rsp, 6 * wordSize)); | |
5310 movq(r8, Address(rsp, 7 * wordSize)); | |
5311 movq(rdi, Address(rsp, 8 * wordSize)); | |
5312 movq(rsi, Address(rsp, 9 * wordSize)); | |
5313 movq(rbp, Address(rsp, 10 * wordSize)); | |
5314 // skip rsp | |
5315 movq(rbx, Address(rsp, 12 * wordSize)); | |
5316 movq(rdx, Address(rsp, 13 * wordSize)); | |
5317 movq(rcx, Address(rsp, 14 * wordSize)); | |
5318 movq(rax, Address(rsp, 15 * wordSize)); | |
5319 | |
5320 addq(rsp, 16 * wordSize); | |
5321 } | |
5322 | |
643
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6378821: bitCount() should use POPC on SPARC processors and AMD+10h
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642
diff
changeset
|
5323 void Assembler::popcntq(Register dst, Address src) { |
c771b7f43bbf
6378821: bitCount() should use POPC on SPARC processors and AMD+10h
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642
diff
changeset
|
5324 assert(VM_Version::supports_popcnt(), "must support"); |
c771b7f43bbf
6378821: bitCount() should use POPC on SPARC processors and AMD+10h
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diff
changeset
|
5325 InstructionMark im(this); |
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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changeset
|
5326 emit_int8((unsigned char)0xF3); |
643
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6378821: bitCount() should use POPC on SPARC processors and AMD+10h
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642
diff
changeset
|
5327 prefixq(src, dst); |
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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changeset
|
5328 emit_int8((unsigned char)0x0F); |
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changeset
|
5329 emit_int8((unsigned char)0xB8); |
643
c771b7f43bbf
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642
diff
changeset
|
5330 emit_operand(dst, src); |
c771b7f43bbf
6378821: bitCount() should use POPC on SPARC processors and AMD+10h
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642
diff
changeset
|
5331 } |
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6378821: bitCount() should use POPC on SPARC processors and AMD+10h
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diff
changeset
|
5332 |
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6378821: bitCount() should use POPC on SPARC processors and AMD+10h
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642
diff
changeset
|
5333 void Assembler::popcntq(Register dst, Register src) { |
c771b7f43bbf
6378821: bitCount() should use POPC on SPARC processors and AMD+10h
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642
diff
changeset
|
5334 assert(VM_Version::supports_popcnt(), "must support"); |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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7427
diff
changeset
|
5335 emit_int8((unsigned char)0xF3); |
643
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6378821: bitCount() should use POPC on SPARC processors and AMD+10h
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642
diff
changeset
|
5336 int encode = prefixq_and_encode(dst->encoding(), src->encoding()); |
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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7427
diff
changeset
|
5337 emit_int8((unsigned char)0x0F); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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7427
diff
changeset
|
5338 emit_int8((unsigned char)0xB8); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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7427
diff
changeset
|
5339 emit_int8((unsigned char)(0xC0 | encode)); |
643
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642
diff
changeset
|
5340 } |
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6378821: bitCount() should use POPC on SPARC processors and AMD+10h
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diff
changeset
|
5341 |
304 | 5342 void Assembler::popq(Address dst) { |
5343 InstructionMark im(this); | |
5344 prefixq(dst); | |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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diff
changeset
|
5345 emit_int8((unsigned char)0x8F); |
304 | 5346 emit_operand(rax, dst); |
5347 } | |
5348 | |
5349 void Assembler::pusha() { // 64bit | |
5350 // we have to store original rsp. ABI says that 128 bytes | |
5351 // below rsp are local scratch. | |
5352 movq(Address(rsp, -5 * wordSize), rsp); | |
5353 | |
5354 subq(rsp, 16 * wordSize); | |
5355 | |
5356 movq(Address(rsp, 15 * wordSize), rax); | |
5357 movq(Address(rsp, 14 * wordSize), rcx); | |
5358 movq(Address(rsp, 13 * wordSize), rdx); | |
5359 movq(Address(rsp, 12 * wordSize), rbx); | |
5360 // skip rsp | |
5361 movq(Address(rsp, 10 * wordSize), rbp); | |
5362 movq(Address(rsp, 9 * wordSize), rsi); | |
5363 movq(Address(rsp, 8 * wordSize), rdi); | |
5364 movq(Address(rsp, 7 * wordSize), r8); | |
5365 movq(Address(rsp, 6 * wordSize), r9); | |
5366 movq(Address(rsp, 5 * wordSize), r10); | |
5367 movq(Address(rsp, 4 * wordSize), r11); | |
5368 movq(Address(rsp, 3 * wordSize), r12); | |
5369 movq(Address(rsp, 2 * wordSize), r13); | |
5370 movq(Address(rsp, wordSize), r14); | |
5371 movq(Address(rsp, 0), r15); | |
5372 } | |
5373 | |
5374 void Assembler::pushq(Address src) { | |
5375 InstructionMark im(this); | |
5376 prefixq(src); | |
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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diff
changeset
|
5377 emit_int8((unsigned char)0xFF); |
304 | 5378 emit_operand(rsi, src); |
5379 } | |
5380 | |
5381 void Assembler::rclq(Register dst, int imm8) { | |
5382 assert(isShiftCount(imm8 >> 1), "illegal shift count"); | |
5383 int encode = prefixq_and_encode(dst->encoding()); | |
5384 if (imm8 == 1) { | |
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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diff
changeset
|
5385 emit_int8((unsigned char)0xD1); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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diff
changeset
|
5386 emit_int8((unsigned char)(0xD0 | encode)); |
304 | 5387 } else { |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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changeset
|
5388 emit_int8((unsigned char)0xC1); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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diff
changeset
|
5389 emit_int8((unsigned char)(0xD0 | encode)); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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7427
diff
changeset
|
5390 emit_int8(imm8); |
304 | 5391 } |
5392 } | |
5393 void Assembler::sarq(Register dst, int imm8) { | |
5394 assert(isShiftCount(imm8 >> 1), "illegal shift count"); | |
5395 int encode = prefixq_and_encode(dst->encoding()); | |
5396 if (imm8 == 1) { | |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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diff
changeset
|
5397 emit_int8((unsigned char)0xD1); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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diff
changeset
|
5398 emit_int8((unsigned char)(0xF8 | encode)); |
304 | 5399 } else { |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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changeset
|
5400 emit_int8((unsigned char)0xC1); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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diff
changeset
|
5401 emit_int8((unsigned char)(0xF8 | encode)); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
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7427
diff
changeset
|
5402 emit_int8(imm8); |
304 | 5403 } |
5404 } | |
5405 | |
5406 void Assembler::sarq(Register dst) { | |
5407 int encode = prefixq_and_encode(dst->encoding()); | |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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diff
changeset
|
5408 emit_int8((unsigned char)0xD3); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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diff
changeset
|
5409 emit_int8((unsigned char)(0xF8 | encode)); |
304 | 5410 } |
2100
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parents:
2014
diff
changeset
|
5411 |
304 | 5412 void Assembler::sbbq(Address dst, int32_t imm32) { |
5413 InstructionMark im(this); | |
5414 prefixq(dst); | |
5415 emit_arith_operand(0x81, rbx, dst, imm32); | |
5416 } | |
5417 | |
5418 void Assembler::sbbq(Register dst, int32_t imm32) { | |
5419 (void) prefixq_and_encode(dst->encoding()); | |
5420 emit_arith(0x81, 0xD8, dst, imm32); | |
5421 } | |
5422 | |
5423 void Assembler::sbbq(Register dst, Address src) { | |
5424 InstructionMark im(this); | |
5425 prefixq(src, dst); | |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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7427
diff
changeset
|
5426 emit_int8(0x1B); |
304 | 5427 emit_operand(dst, src); |
5428 } | |
5429 | |
5430 void Assembler::sbbq(Register dst, Register src) { | |
5431 (void) prefixq_and_encode(dst->encoding(), src->encoding()); | |
5432 emit_arith(0x1B, 0xC0, dst, src); | |
5433 } | |
5434 | |
5435 void Assembler::shlq(Register dst, int imm8) { | |
5436 assert(isShiftCount(imm8 >> 1), "illegal shift count"); | |
5437 int encode = prefixq_and_encode(dst->encoding()); | |
5438 if (imm8 == 1) { | |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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diff
changeset
|
5439 emit_int8((unsigned char)0xD1); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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diff
changeset
|
5440 emit_int8((unsigned char)(0xE0 | encode)); |
304 | 5441 } else { |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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diff
changeset
|
5442 emit_int8((unsigned char)0xC1); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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7427
diff
changeset
|
5443 emit_int8((unsigned char)(0xE0 | encode)); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
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7427
diff
changeset
|
5444 emit_int8(imm8); |
304 | 5445 } |
5446 } | |
5447 | |
5448 void Assembler::shlq(Register dst) { | |
5449 int encode = prefixq_and_encode(dst->encoding()); | |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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diff
changeset
|
5450 emit_int8((unsigned char)0xD3); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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7427
diff
changeset
|
5451 emit_int8((unsigned char)(0xE0 | encode)); |
304 | 5452 } |
5453 | |
5454 void Assembler::shrq(Register dst, int imm8) { | |
5455 assert(isShiftCount(imm8 >> 1), "illegal shift count"); | |
5456 int encode = prefixq_and_encode(dst->encoding()); | |
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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changeset
|
5457 emit_int8((unsigned char)0xC1); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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changeset
|
5458 emit_int8((unsigned char)(0xE8 | encode)); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
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7427
diff
changeset
|
5459 emit_int8(imm8); |
304 | 5460 } |
5461 | |
5462 void Assembler::shrq(Register dst) { | |
5463 int encode = prefixq_and_encode(dst->encoding()); | |
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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changeset
|
5464 emit_int8((unsigned char)0xD3); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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changeset
|
5465 emit_int8(0xE8 | encode); |
304 | 5466 } |
5467 | |
5468 void Assembler::subq(Address dst, int32_t imm32) { | |
5469 InstructionMark im(this); | |
5470 prefixq(dst); | |
2100
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diff
changeset
|
5471 emit_arith_operand(0x81, rbp, dst, imm32); |
304 | 5472 } |
5473 | |
5474 void Assembler::subq(Address dst, Register src) { | |
5475 InstructionMark im(this); | |
5476 prefixq(dst, src); | |
7430
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changeset
|
5477 emit_int8(0x29); |
304 | 5478 emit_operand(src, dst); |
5479 } | |
5480 | |
2100
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diff
changeset
|
5481 void Assembler::subq(Register dst, int32_t imm32) { |
b1a2afa37ec4
7003271: Hotspot should track cumulative Java heap bytes allocated on a per-thread basis
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diff
changeset
|
5482 (void) prefixq_and_encode(dst->encoding()); |
b1a2afa37ec4
7003271: Hotspot should track cumulative Java heap bytes allocated on a per-thread basis
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diff
changeset
|
5483 emit_arith(0x81, 0xE8, dst, imm32); |
b1a2afa37ec4
7003271: Hotspot should track cumulative Java heap bytes allocated on a per-thread basis
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|
5484 } |
b1a2afa37ec4
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diff
changeset
|
5485 |
4947
fd8114661503
7125136: SIGILL on linux amd64 in gc/ArrayJuggle/Juggle29
kvn
parents:
4770
diff
changeset
|
5486 // Force generation of a 4 byte immediate value even if it fits into 8bit |
fd8114661503
7125136: SIGILL on linux amd64 in gc/ArrayJuggle/Juggle29
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4770
diff
changeset
|
5487 void Assembler::subq_imm32(Register dst, int32_t imm32) { |
fd8114661503
7125136: SIGILL on linux amd64 in gc/ArrayJuggle/Juggle29
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diff
changeset
|
5488 (void) prefixq_and_encode(dst->encoding()); |
fd8114661503
7125136: SIGILL on linux amd64 in gc/ArrayJuggle/Juggle29
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4770
diff
changeset
|
5489 emit_arith_imm32(0x81, 0xE8, dst, imm32); |
fd8114661503
7125136: SIGILL on linux amd64 in gc/ArrayJuggle/Juggle29
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parents:
4770
diff
changeset
|
5490 } |
fd8114661503
7125136: SIGILL on linux amd64 in gc/ArrayJuggle/Juggle29
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diff
changeset
|
5491 |
304 | 5492 void Assembler::subq(Register dst, Address src) { |
5493 InstructionMark im(this); | |
5494 prefixq(src, dst); | |
7430
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7427
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changeset
|
5495 emit_int8(0x2B); |
304 | 5496 emit_operand(dst, src); |
5497 } | |
5498 | |
5499 void Assembler::subq(Register dst, Register src) { | |
5500 (void) prefixq_and_encode(dst->encoding(), src->encoding()); | |
5501 emit_arith(0x2B, 0xC0, dst, src); | |
5502 } | |
5503 | |
5504 void Assembler::testq(Register dst, int32_t imm32) { | |
5505 // not using emit_arith because test | |
5506 // doesn't support sign-extension of | |
5507 // 8bit operands | |
5508 int encode = dst->encoding(); | |
5509 if (encode == 0) { | |
5510 prefix(REX_W); | |
7430
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7427
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changeset
|
5511 emit_int8((unsigned char)0xA9); |
304 | 5512 } else { |
5513 encode = prefixq_and_encode(encode); | |
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5514 emit_int8((unsigned char)0xF7); |
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5515 emit_int8((unsigned char)(0xC0 | encode)); |
304 | 5516 } |
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5517 emit_int32(imm32); |
304 | 5518 } |
5519 | |
5520 void Assembler::testq(Register dst, Register src) { | |
5521 (void) prefixq_and_encode(dst->encoding(), src->encoding()); | |
5522 emit_arith(0x85, 0xC0, dst, src); | |
5523 } | |
5524 | |
5525 void Assembler::xaddq(Address dst, Register src) { | |
5526 InstructionMark im(this); | |
5527 prefixq(dst, src); | |
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5528 emit_int8(0x0F); |
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5529 emit_int8((unsigned char)0xC1); |
304 | 5530 emit_operand(src, dst); |
5531 } | |
5532 | |
5533 void Assembler::xchgq(Register dst, Address src) { | |
5534 InstructionMark im(this); | |
5535 prefixq(src, dst); | |
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5536 emit_int8((unsigned char)0x87); |
304 | 5537 emit_operand(dst, src); |
5538 } | |
5539 | |
5540 void Assembler::xchgq(Register dst, Register src) { | |
5541 int encode = prefixq_and_encode(dst->encoding(), src->encoding()); | |
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5542 emit_int8((unsigned char)0x87); |
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5543 emit_int8((unsigned char)(0xc0 | encode)); |
304 | 5544 } |
5545 | |
5546 void Assembler::xorq(Register dst, Register src) { | |
5547 (void) prefixq_and_encode(dst->encoding(), src->encoding()); | |
5548 emit_arith(0x33, 0xC0, dst, src); | |
5549 } | |
5550 | |
5551 void Assembler::xorq(Register dst, Address src) { | |
5552 InstructionMark im(this); | |
5553 prefixq(src, dst); | |
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5554 emit_int8(0x33); |
304 | 5555 emit_operand(dst, src); |
5556 } | |
5557 | |
5558 #endif // !LP64 |