Mercurial > hg > truffle
annotate src/cpu/x86/vm/assembler_x86.cpp @ 16064:03eda0a202e9
Better fix for prefix byte for AMD64 byte instructions
| author | Christian Wimmer <christian.wimmer@oracle.com> |
|---|---|
| date | Fri, 06 Jun 2014 11:06:42 -0700 |
| parents | 692c25719837 |
| children | 77cb0f0e5e3f |
| rev | line source |
|---|---|
| 0 | 1 /* |
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2 * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved. |
| 0 | 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
| 4 * | |
| 5 * This code is free software; you can redistribute it and/or modify it | |
| 6 * under the terms of the GNU General Public License version 2 only, as | |
| 7 * published by the Free Software Foundation. | |
| 8 * | |
| 9 * This code is distributed in the hope that it will be useful, but WITHOUT | |
| 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
| 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
| 12 * version 2 for more details (a copy is included in the LICENSE file that | |
| 13 * accompanied this code). | |
| 14 * | |
| 15 * You should have received a copy of the GNU General Public License version | |
| 16 * 2 along with this work; if not, write to the Free Software Foundation, | |
| 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
| 18 * | |
|
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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20 * or visit www.oracle.com if you need additional information or have any |
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21 * questions. |
| 0 | 22 * |
| 23 */ | |
| 24 | |
| 1972 | 25 #include "precompiled.hpp" |
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26 #include "asm/assembler.hpp" |
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27 #include "asm/assembler.inline.hpp" |
| 1972 | 28 #include "gc_interface/collectedHeap.inline.hpp" |
| 29 #include "interpreter/interpreter.hpp" | |
| 30 #include "memory/cardTableModRefBS.hpp" | |
| 31 #include "memory/resourceArea.hpp" | |
| 32 #include "prims/methodHandles.hpp" | |
| 33 #include "runtime/biasedLocking.hpp" | |
| 34 #include "runtime/interfaceSupport.hpp" | |
| 35 #include "runtime/objectMonitor.hpp" | |
| 36 #include "runtime/os.hpp" | |
| 37 #include "runtime/sharedRuntime.hpp" | |
| 38 #include "runtime/stubRoutines.hpp" | |
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39 #include "utilities/macros.hpp" |
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40 #if INCLUDE_ALL_GCS |
| 1972 | 41 #include "gc_implementation/g1/g1CollectedHeap.inline.hpp" |
| 42 #include "gc_implementation/g1/g1SATBCardTableModRefBS.hpp" | |
| 43 #include "gc_implementation/g1/heapRegion.hpp" | |
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44 #endif // INCLUDE_ALL_GCS |
| 0 | 45 |
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46 #ifdef PRODUCT |
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47 #define BLOCK_COMMENT(str) /* nothing */ |
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48 #define STOP(error) stop(error) |
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49 #else |
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50 #define BLOCK_COMMENT(str) block_comment(str) |
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51 #define STOP(error) block_comment(error); stop(error) |
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52 #endif |
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53 |
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54 #define BIND(label) bind(label); BLOCK_COMMENT(#label ":") |
| 0 | 55 // Implementation of AddressLiteral |
| 56 | |
| 57 AddressLiteral::AddressLiteral(address target, relocInfo::relocType rtype) { | |
| 58 _is_lval = false; | |
| 59 _target = target; | |
| 60 switch (rtype) { | |
| 61 case relocInfo::oop_type: | |
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62 case relocInfo::metadata_type: |
| 0 | 63 // Oops are a special case. Normally they would be their own section |
| 64 // but in cases like icBuffer they are literals in the code stream that | |
| 65 // we don't have a section for. We use none so that we get a literal address | |
| 66 // which is always patchable. | |
| 67 break; | |
| 68 case relocInfo::external_word_type: | |
| 69 _rspec = external_word_Relocation::spec(target); | |
| 70 break; | |
| 71 case relocInfo::internal_word_type: | |
| 72 _rspec = internal_word_Relocation::spec(target); | |
| 73 break; | |
| 74 case relocInfo::opt_virtual_call_type: | |
| 75 _rspec = opt_virtual_call_Relocation::spec(); | |
| 76 break; | |
| 77 case relocInfo::static_call_type: | |
| 78 _rspec = static_call_Relocation::spec(); | |
| 79 break; | |
| 80 case relocInfo::runtime_call_type: | |
| 81 _rspec = runtime_call_Relocation::spec(); | |
| 82 break; | |
| 83 case relocInfo::poll_type: | |
| 84 case relocInfo::poll_return_type: | |
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85 _rspec = Relocation::spec_simple(rtype); |
| 0 | 86 break; |
| 87 case relocInfo::none: | |
| 88 break; | |
| 89 default: | |
| 90 ShouldNotReachHere(); | |
| 91 break; | |
| 92 } | |
| 93 } | |
| 94 | |
| 95 // Implementation of Address | |
| 96 | |
| 304 | 97 #ifdef _LP64 |
| 98 | |
| 0 | 99 Address Address::make_array(ArrayAddress adr) { |
| 100 // Not implementable on 64bit machines | |
| 101 // Should have been handled higher up the call chain. | |
| 102 ShouldNotReachHere(); | |
| 304 | 103 return Address(); |
| 104 } | |
| 105 | |
| 106 // exceedingly dangerous constructor | |
| 107 Address::Address(int disp, address loc, relocInfo::relocType rtype) { | |
| 108 _base = noreg; | |
| 109 _index = noreg; | |
| 110 _scale = no_scale; | |
| 111 _disp = disp; | |
| 112 switch (rtype) { | |
| 113 case relocInfo::external_word_type: | |
| 114 _rspec = external_word_Relocation::spec(loc); | |
| 115 break; | |
| 116 case relocInfo::internal_word_type: | |
| 117 _rspec = internal_word_Relocation::spec(loc); | |
| 118 break; | |
| 119 case relocInfo::runtime_call_type: | |
| 120 // HMM | |
| 121 _rspec = runtime_call_Relocation::spec(); | |
| 122 break; | |
| 123 case relocInfo::poll_type: | |
| 124 case relocInfo::poll_return_type: | |
| 125 _rspec = Relocation::spec_simple(rtype); | |
| 126 break; | |
| 127 case relocInfo::none: | |
| 128 break; | |
| 129 default: | |
| 130 ShouldNotReachHere(); | |
| 131 } | |
| 132 } | |
| 133 #else // LP64 | |
| 134 | |
| 135 Address Address::make_array(ArrayAddress adr) { | |
| 0 | 136 AddressLiteral base = adr.base(); |
| 137 Address index = adr.index(); | |
| 138 assert(index._disp == 0, "must not have disp"); // maybe it can? | |
| 139 Address array(index._base, index._index, index._scale, (intptr_t) base.target()); | |
| 140 array._rspec = base._rspec; | |
| 141 return array; | |
| 304 | 142 } |
| 0 | 143 |
| 144 // exceedingly dangerous constructor | |
| 145 Address::Address(address loc, RelocationHolder spec) { | |
| 146 _base = noreg; | |
| 147 _index = noreg; | |
| 148 _scale = no_scale; | |
| 149 _disp = (intptr_t) loc; | |
| 150 _rspec = spec; | |
| 151 } | |
| 304 | 152 |
| 0 | 153 #endif // _LP64 |
| 154 | |
| 304 | 155 |
| 156 | |
| 0 | 157 // Convert the raw encoding form into the form expected by the constructor for |
| 158 // Address. An index of 4 (rsp) corresponds to having no index, so convert | |
| 159 // that to noreg for the Address constructor. | |
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160 Address Address::make_raw(int base, int index, int scale, int disp, relocInfo::relocType disp_reloc) { |
| 624 | 161 RelocationHolder rspec; |
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162 if (disp_reloc != relocInfo::none) { |
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163 rspec = Relocation::spec_simple(disp_reloc); |
| 624 | 164 } |
| 0 | 165 bool valid_index = index != rsp->encoding(); |
| 166 if (valid_index) { | |
| 167 Address madr(as_Register(base), as_Register(index), (Address::ScaleFactor)scale, in_ByteSize(disp)); | |
| 624 | 168 madr._rspec = rspec; |
| 0 | 169 return madr; |
| 170 } else { | |
| 171 Address madr(as_Register(base), noreg, Address::no_scale, in_ByteSize(disp)); | |
| 624 | 172 madr._rspec = rspec; |
| 0 | 173 return madr; |
| 174 } | |
| 175 } | |
| 176 | |
| 177 // Implementation of Assembler | |
| 178 | |
| 179 int AbstractAssembler::code_fill_byte() { | |
| 180 return (u_char)'\xF4'; // hlt | |
| 181 } | |
| 182 | |
| 183 // make this go away someday | |
| 184 void Assembler::emit_data(jint data, relocInfo::relocType rtype, int format) { | |
| 185 if (rtype == relocInfo::none) | |
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186 emit_int32(data); |
| 0 | 187 else emit_data(data, Relocation::spec_simple(rtype), format); |
| 188 } | |
| 189 | |
| 190 void Assembler::emit_data(jint data, RelocationHolder const& rspec, int format) { | |
| 304 | 191 assert(imm_operand == 0, "default format must be immediate in this file"); |
| 0 | 192 assert(inst_mark() != NULL, "must be inside InstructionMark"); |
| 193 if (rspec.type() != relocInfo::none) { | |
| 194 #ifdef ASSERT | |
| 195 check_relocation(rspec, format); | |
| 196 #endif | |
| 197 // Do not use AbstractAssembler::relocate, which is not intended for | |
| 198 // embedded words. Instead, relocate to the enclosing instruction. | |
| 199 | |
| 200 // hack. call32 is too wide for mask so use disp32 | |
| 201 if (format == call32_operand) | |
| 202 code_section()->relocate(inst_mark(), rspec, disp32_operand); | |
| 203 else | |
| 204 code_section()->relocate(inst_mark(), rspec, format); | |
| 205 } | |
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206 emit_int32(data); |
| 0 | 207 } |
| 208 | |
| 304 | 209 static int encode(Register r) { |
| 210 int enc = r->encoding(); | |
| 211 if (enc >= 8) { | |
| 212 enc -= 8; | |
| 213 } | |
| 214 return enc; | |
| 215 } | |
| 216 | |
| 0 | 217 void Assembler::emit_arith_b(int op1, int op2, Register dst, int imm8) { |
| 218 assert(dst->has_byte_register(), "must have byte register"); | |
| 219 assert(isByte(op1) && isByte(op2), "wrong opcode"); | |
| 220 assert(isByte(imm8), "not a byte"); | |
| 221 assert((op1 & 0x01) == 0, "should be 8bit operation"); | |
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222 emit_int8(op1); |
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223 emit_int8(op2 | encode(dst)); |
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224 emit_int8(imm8); |
| 0 | 225 } |
| 226 | |
| 227 | |
| 304 | 228 void Assembler::emit_arith(int op1, int op2, Register dst, int32_t imm32) { |
| 0 | 229 assert(isByte(op1) && isByte(op2), "wrong opcode"); |
| 230 assert((op1 & 0x01) == 1, "should be 32bit operation"); | |
| 231 assert((op1 & 0x02) == 0, "sign-extension bit should not be set"); | |
| 232 if (is8bit(imm32)) { | |
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233 emit_int8(op1 | 0x02); // set sign bit |
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234 emit_int8(op2 | encode(dst)); |
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235 emit_int8(imm32 & 0xFF); |
| 0 | 236 } else { |
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237 emit_int8(op1); |
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238 emit_int8(op2 | encode(dst)); |
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239 emit_int32(imm32); |
| 0 | 240 } |
| 241 } | |
| 242 | |
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243 // Force generation of a 4 byte immediate value even if it fits into 8bit |
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244 void Assembler::emit_arith_imm32(int op1, int op2, Register dst, int32_t imm32) { |
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245 assert(isByte(op1) && isByte(op2), "wrong opcode"); |
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246 assert((op1 & 0x01) == 1, "should be 32bit operation"); |
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247 assert((op1 & 0x02) == 0, "sign-extension bit should not be set"); |
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248 emit_int8(op1); |
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249 emit_int8(op2 | encode(dst)); |
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250 emit_int32(imm32); |
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251 } |
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252 |
| 0 | 253 // immediate-to-memory forms |
| 304 | 254 void Assembler::emit_arith_operand(int op1, Register rm, Address adr, int32_t imm32) { |
| 0 | 255 assert((op1 & 0x01) == 1, "should be 32bit operation"); |
| 256 assert((op1 & 0x02) == 0, "sign-extension bit should not be set"); | |
| 257 if (is8bit(imm32)) { | |
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258 emit_int8(op1 | 0x02); // set sign bit |
| 304 | 259 emit_operand(rm, adr, 1); |
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260 emit_int8(imm32 & 0xFF); |
| 0 | 261 } else { |
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262 emit_int8(op1); |
| 304 | 263 emit_operand(rm, adr, 4); |
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264 emit_int32(imm32); |
| 0 | 265 } |
| 266 } | |
| 267 | |
| 268 | |
| 269 void Assembler::emit_arith(int op1, int op2, Register dst, Register src) { | |
| 270 assert(isByte(op1) && isByte(op2), "wrong opcode"); | |
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271 emit_int8(op1); |
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272 emit_int8(op2 | encode(dst) << 3 | encode(src)); |
| 304 | 273 } |
| 274 | |
| 275 | |
| 276 void Assembler::emit_operand(Register reg, Register base, Register index, | |
| 277 Address::ScaleFactor scale, int disp, | |
| 278 RelocationHolder const& rspec, | |
| 279 int rip_relative_correction) { | |
| 0 | 280 relocInfo::relocType rtype = (relocInfo::relocType) rspec.type(); |
| 304 | 281 |
| 282 // Encode the registers as needed in the fields they are used in | |
| 283 | |
| 284 int regenc = encode(reg) << 3; | |
| 285 int indexenc = index->is_valid() ? encode(index) << 3 : 0; | |
| 286 int baseenc = base->is_valid() ? encode(base) : 0; | |
| 287 | |
| 0 | 288 if (base->is_valid()) { |
| 289 if (index->is_valid()) { | |
| 290 assert(scale != Address::no_scale, "inconsistent address"); | |
| 291 // [base + index*scale + disp] | |
| 304 | 292 if (disp == 0 && rtype == relocInfo::none && |
| 293 base != rbp LP64_ONLY(&& base != r13)) { | |
| 0 | 294 // [base + index*scale] |
| 295 // [00 reg 100][ss index base] | |
| 296 assert(index != rsp, "illegal addressing mode"); | |
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297 emit_int8(0x04 | regenc); |
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298 emit_int8(scale << 6 | indexenc | baseenc); |
| 0 | 299 } else if (is8bit(disp) && rtype == relocInfo::none) { |
| 300 // [base + index*scale + imm8] | |
| 301 // [01 reg 100][ss index base] imm8 | |
| 302 assert(index != rsp, "illegal addressing mode"); | |
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303 emit_int8(0x44 | regenc); |
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304 emit_int8(scale << 6 | indexenc | baseenc); |
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305 emit_int8(disp & 0xFF); |
| 0 | 306 } else { |
| 304 | 307 // [base + index*scale + disp32] |
| 308 // [10 reg 100][ss index base] disp32 | |
| 0 | 309 assert(index != rsp, "illegal addressing mode"); |
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310 emit_int8(0x84 | regenc); |
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311 emit_int8(scale << 6 | indexenc | baseenc); |
| 0 | 312 emit_data(disp, rspec, disp32_operand); |
| 313 } | |
| 304 | 314 } else if (base == rsp LP64_ONLY(|| base == r12)) { |
| 315 // [rsp + disp] | |
| 0 | 316 if (disp == 0 && rtype == relocInfo::none) { |
| 304 | 317 // [rsp] |
| 0 | 318 // [00 reg 100][00 100 100] |
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319 emit_int8(0x04 | regenc); |
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320 emit_int8(0x24); |
| 0 | 321 } else if (is8bit(disp) && rtype == relocInfo::none) { |
| 304 | 322 // [rsp + imm8] |
| 323 // [01 reg 100][00 100 100] disp8 | |
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324 emit_int8(0x44 | regenc); |
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325 emit_int8(0x24); |
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326 emit_int8(disp & 0xFF); |
| 0 | 327 } else { |
| 304 | 328 // [rsp + imm32] |
| 329 // [10 reg 100][00 100 100] disp32 | |
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330 emit_int8(0x84 | regenc); |
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331 emit_int8(0x24); |
| 0 | 332 emit_data(disp, rspec, disp32_operand); |
| 333 } | |
| 334 } else { | |
| 335 // [base + disp] | |
| 304 | 336 assert(base != rsp LP64_ONLY(&& base != r12), "illegal addressing mode"); |
| 337 if (disp == 0 && rtype == relocInfo::none && | |
| 338 base != rbp LP64_ONLY(&& base != r13)) { | |
| 0 | 339 // [base] |
| 340 // [00 reg base] | |
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341 emit_int8(0x00 | regenc | baseenc); |
| 0 | 342 } else if (is8bit(disp) && rtype == relocInfo::none) { |
| 304 | 343 // [base + disp8] |
| 344 // [01 reg base] disp8 | |
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345 emit_int8(0x40 | regenc | baseenc); |
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346 emit_int8(disp & 0xFF); |
| 0 | 347 } else { |
| 304 | 348 // [base + disp32] |
| 349 // [10 reg base] disp32 | |
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350 emit_int8(0x80 | regenc | baseenc); |
| 0 | 351 emit_data(disp, rspec, disp32_operand); |
| 352 } | |
| 353 } | |
| 354 } else { | |
| 355 if (index->is_valid()) { | |
| 356 assert(scale != Address::no_scale, "inconsistent address"); | |
| 357 // [index*scale + disp] | |
| 304 | 358 // [00 reg 100][ss index 101] disp32 |
| 0 | 359 assert(index != rsp, "illegal addressing mode"); |
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360 emit_int8(0x04 | regenc); |
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361 emit_int8(scale << 6 | indexenc | 0x05); |
| 0 | 362 emit_data(disp, rspec, disp32_operand); |
| 304 | 363 } else if (rtype != relocInfo::none ) { |
| 364 // [disp] (64bit) RIP-RELATIVE (32bit) abs | |
| 365 // [00 000 101] disp32 | |
| 366 | |
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367 emit_int8(0x05 | regenc); |
| 304 | 368 // Note that the RIP-rel. correction applies to the generated |
| 369 // disp field, but _not_ to the target address in the rspec. | |
| 370 | |
| 371 // disp was created by converting the target address minus the pc | |
| 372 // at the start of the instruction. That needs more correction here. | |
| 373 // intptr_t disp = target - next_ip; | |
| 374 assert(inst_mark() != NULL, "must be inside InstructionMark"); | |
| 375 address next_ip = pc() + sizeof(int32_t) + rip_relative_correction; | |
| 376 int64_t adjusted = disp; | |
| 377 // Do rip-rel adjustment for 64bit | |
| 378 LP64_ONLY(adjusted -= (next_ip - inst_mark())); | |
| 379 assert(is_simm32(adjusted), | |
| 380 "must be 32bit offset (RIP relative address)"); | |
| 381 emit_data((int32_t) adjusted, rspec, disp32_operand); | |
| 382 | |
| 0 | 383 } else { |
| 304 | 384 // 32bit never did this, did everything as the rip-rel/disp code above |
| 385 // [disp] ABSOLUTE | |
| 386 // [00 reg 100][00 100 101] disp32 | |
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387 emit_int8(0x04 | regenc); |
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388 emit_int8(0x25); |
| 0 | 389 emit_data(disp, rspec, disp32_operand); |
| 390 } | |
| 391 } | |
| 392 } | |
| 393 | |
| 304 | 394 void Assembler::emit_operand(XMMRegister reg, Register base, Register index, |
| 395 Address::ScaleFactor scale, int disp, | |
| 396 RelocationHolder const& rspec) { | |
| 397 emit_operand((Register)reg, base, index, scale, disp, rspec); | |
| 398 } | |
| 399 | |
| 0 | 400 // Secret local extension to Assembler::WhichOperand: |
| 401 #define end_pc_operand (_WhichOperand_limit) | |
| 402 | |
| 403 address Assembler::locate_operand(address inst, WhichOperand which) { | |
| 404 // Decode the given instruction, and return the address of | |
| 405 // an embedded 32-bit operand word. | |
| 406 | |
| 407 // If "which" is disp32_operand, selects the displacement portion | |
| 408 // of an effective address specifier. | |
| 304 | 409 // If "which" is imm64_operand, selects the trailing immediate constant. |
| 0 | 410 // If "which" is call32_operand, selects the displacement of a call or jump. |
| 411 // Caller is responsible for ensuring that there is such an operand, | |
| 304 | 412 // and that it is 32/64 bits wide. |
| 0 | 413 |
| 414 // If "which" is end_pc_operand, find the end of the instruction. | |
| 415 | |
| 416 address ip = inst; | |
| 304 | 417 bool is_64bit = false; |
| 418 | |
| 419 debug_only(bool has_disp32 = false); | |
| 420 int tail_size = 0; // other random bytes (#32, #16, etc.) at end of insn | |
| 421 | |
| 422 again_after_prefix: | |
| 0 | 423 switch (0xFF & *ip++) { |
| 424 | |
| 425 // These convenience macros generate groups of "case" labels for the switch. | |
| 304 | 426 #define REP4(x) (x)+0: case (x)+1: case (x)+2: case (x)+3 |
| 427 #define REP8(x) (x)+0: case (x)+1: case (x)+2: case (x)+3: \ | |
| 0 | 428 case (x)+4: case (x)+5: case (x)+6: case (x)+7 |
| 304 | 429 #define REP16(x) REP8((x)+0): \ |
| 0 | 430 case REP8((x)+8) |
| 431 | |
| 432 case CS_segment: | |
| 433 case SS_segment: | |
| 434 case DS_segment: | |
| 435 case ES_segment: | |
| 436 case FS_segment: | |
| 437 case GS_segment: | |
| 304 | 438 // Seems dubious |
| 439 LP64_ONLY(assert(false, "shouldn't have that prefix")); | |
| 0 | 440 assert(ip == inst+1, "only one prefix allowed"); |
| 441 goto again_after_prefix; | |
| 442 | |
| 304 | 443 case 0x67: |
| 444 case REX: | |
| 445 case REX_B: | |
| 446 case REX_X: | |
| 447 case REX_XB: | |
| 448 case REX_R: | |
| 449 case REX_RB: | |
| 450 case REX_RX: | |
| 451 case REX_RXB: | |
| 452 NOT_LP64(assert(false, "64bit prefixes")); | |
| 453 goto again_after_prefix; | |
| 454 | |
| 455 case REX_W: | |
| 456 case REX_WB: | |
| 457 case REX_WX: | |
| 458 case REX_WXB: | |
| 459 case REX_WR: | |
| 460 case REX_WRB: | |
| 461 case REX_WRX: | |
| 462 case REX_WRXB: | |
| 463 NOT_LP64(assert(false, "64bit prefixes")); | |
| 464 is_64bit = true; | |
| 465 goto again_after_prefix; | |
| 466 | |
| 467 case 0xFF: // pushq a; decl a; incl a; call a; jmp a | |
| 0 | 468 case 0x88: // movb a, r |
| 469 case 0x89: // movl a, r | |
| 470 case 0x8A: // movb r, a | |
| 471 case 0x8B: // movl r, a | |
| 472 case 0x8F: // popl a | |
| 304 | 473 debug_only(has_disp32 = true); |
| 0 | 474 break; |
| 475 | |
| 304 | 476 case 0x68: // pushq #32 |
| 477 if (which == end_pc_operand) { | |
| 478 return ip + 4; | |
| 479 } | |
| 480 assert(which == imm_operand && !is_64bit, "pushl has no disp32 or 64bit immediate"); | |
| 0 | 481 return ip; // not produced by emit_operand |
| 482 | |
| 483 case 0x66: // movw ... (size prefix) | |
| 304 | 484 again_after_size_prefix2: |
| 0 | 485 switch (0xFF & *ip++) { |
| 304 | 486 case REX: |
| 487 case REX_B: | |
| 488 case REX_X: | |
| 489 case REX_XB: | |
| 490 case REX_R: | |
| 491 case REX_RB: | |
| 492 case REX_RX: | |
| 493 case REX_RXB: | |
| 494 case REX_W: | |
| 495 case REX_WB: | |
| 496 case REX_WX: | |
| 497 case REX_WXB: | |
| 498 case REX_WR: | |
| 499 case REX_WRB: | |
| 500 case REX_WRX: | |
| 501 case REX_WRXB: | |
| 502 NOT_LP64(assert(false, "64bit prefix found")); | |
| 503 goto again_after_size_prefix2; | |
| 0 | 504 case 0x8B: // movw r, a |
| 505 case 0x89: // movw a, r | |
| 304 | 506 debug_only(has_disp32 = true); |
| 0 | 507 break; |
| 508 case 0xC7: // movw a, #16 | |
| 304 | 509 debug_only(has_disp32 = true); |
| 0 | 510 tail_size = 2; // the imm16 |
| 511 break; | |
| 512 case 0x0F: // several SSE/SSE2 variants | |
| 513 ip--; // reparse the 0x0F | |
| 514 goto again_after_prefix; | |
| 515 default: | |
| 516 ShouldNotReachHere(); | |
| 517 } | |
| 518 break; | |
| 519 | |
| 304 | 520 case REP8(0xB8): // movl/q r, #32/#64(oop?) |
| 521 if (which == end_pc_operand) return ip + (is_64bit ? 8 : 4); | |
| 522 // these asserts are somewhat nonsensical | |
| 523 #ifndef _LP64 | |
| 5984 | 524 assert(which == imm_operand || which == disp32_operand, |
| 525 err_msg("which %d is_64_bit %d ip " INTPTR_FORMAT, which, is_64bit, ip)); | |
| 304 | 526 #else |
| 527 assert((which == call32_operand || which == imm_operand) && is_64bit || | |
| 5984 | 528 which == narrow_oop_operand && !is_64bit, |
| 529 err_msg("which %d is_64_bit %d ip " INTPTR_FORMAT, which, is_64bit, ip)); | |
| 304 | 530 #endif // _LP64 |
| 0 | 531 return ip; |
| 532 | |
| 533 case 0x69: // imul r, a, #32 | |
| 534 case 0xC7: // movl a, #32(oop?) | |
| 535 tail_size = 4; | |
| 304 | 536 debug_only(has_disp32 = true); // has both kinds of operands! |
| 0 | 537 break; |
| 538 | |
| 539 case 0x0F: // movx..., etc. | |
| 540 switch (0xFF & *ip++) { | |
| 4759 | 541 case 0x3A: // pcmpestri |
| 542 tail_size = 1; | |
| 543 case 0x38: // ptest, pmovzxbw | |
| 544 ip++; // skip opcode | |
| 545 debug_only(has_disp32 = true); // has both kinds of operands! | |
| 546 break; | |
| 547 | |
| 548 case 0x70: // pshufd r, r/a, #8 | |
| 549 debug_only(has_disp32 = true); // has both kinds of operands! | |
| 550 case 0x73: // psrldq r, #8 | |
| 551 tail_size = 1; | |
| 552 break; | |
| 553 | |
| 0 | 554 case 0x12: // movlps |
| 555 case 0x28: // movaps | |
| 556 case 0x2E: // ucomiss | |
| 557 case 0x2F: // comiss | |
| 558 case 0x54: // andps | |
| 559 case 0x55: // andnps | |
| 560 case 0x56: // orps | |
| 561 case 0x57: // xorps | |
| 562 case 0x6E: // movd | |
| 563 case 0x7E: // movd | |
| 4759 | 564 case 0xAE: // ldmxcsr, stmxcsr, fxrstor, fxsave, clflush |
| 304 | 565 debug_only(has_disp32 = true); |
| 0 | 566 break; |
| 567 | |
| 568 case 0xAD: // shrd r, a, %cl | |
| 569 case 0xAF: // imul r, a | |
| 304 | 570 case 0xBE: // movsbl r, a (movsxb) |
| 571 case 0xBF: // movswl r, a (movsxw) | |
| 572 case 0xB6: // movzbl r, a (movzxb) | |
| 573 case 0xB7: // movzwl r, a (movzxw) | |
| 0 | 574 case REP16(0x40): // cmovl cc, r, a |
| 575 case 0xB0: // cmpxchgb | |
| 576 case 0xB1: // cmpxchg | |
| 577 case 0xC1: // xaddl | |
| 578 case 0xC7: // cmpxchg8 | |
| 579 case REP16(0x90): // setcc a | |
| 304 | 580 debug_only(has_disp32 = true); |
| 0 | 581 // fall out of the switch to decode the address |
| 582 break; | |
| 304 | 583 |
| 4759 | 584 case 0xC4: // pinsrw r, a, #8 |
| 585 debug_only(has_disp32 = true); | |
| 586 case 0xC5: // pextrw r, r, #8 | |
| 587 tail_size = 1; // the imm8 | |
| 588 break; | |
| 589 | |
| 0 | 590 case 0xAC: // shrd r, a, #8 |
| 304 | 591 debug_only(has_disp32 = true); |
| 0 | 592 tail_size = 1; // the imm8 |
| 593 break; | |
| 304 | 594 |
| 0 | 595 case REP16(0x80): // jcc rdisp32 |
| 596 if (which == end_pc_operand) return ip + 4; | |
| 304 | 597 assert(which == call32_operand, "jcc has no disp32 or imm"); |
| 0 | 598 return ip; |
| 599 default: | |
| 600 ShouldNotReachHere(); | |
| 601 } | |
| 602 break; | |
| 603 | |
| 604 case 0x81: // addl a, #32; addl r, #32 | |
| 605 // also: orl, adcl, sbbl, andl, subl, xorl, cmpl | |
| 304 | 606 // on 32bit in the case of cmpl, the imm might be an oop |
| 0 | 607 tail_size = 4; |
| 304 | 608 debug_only(has_disp32 = true); // has both kinds of operands! |
| 0 | 609 break; |
| 610 | |
| 611 case 0x83: // addl a, #8; addl r, #8 | |
| 612 // also: orl, adcl, sbbl, andl, subl, xorl, cmpl | |
| 304 | 613 debug_only(has_disp32 = true); // has both kinds of operands! |
| 0 | 614 tail_size = 1; |
| 615 break; | |
| 616 | |
| 617 case 0x9B: | |
| 618 switch (0xFF & *ip++) { | |
| 619 case 0xD9: // fnstcw a | |
| 304 | 620 debug_only(has_disp32 = true); |
| 0 | 621 break; |
| 622 default: | |
| 623 ShouldNotReachHere(); | |
| 624 } | |
| 625 break; | |
| 626 | |
| 627 case REP4(0x00): // addb a, r; addl a, r; addb r, a; addl r, a | |
| 628 case REP4(0x10): // adc... | |
| 629 case REP4(0x20): // and... | |
| 630 case REP4(0x30): // xor... | |
| 631 case REP4(0x08): // or... | |
| 632 case REP4(0x18): // sbb... | |
| 633 case REP4(0x28): // sub... | |
| 304 | 634 case 0xF7: // mull a |
| 635 case 0x8D: // lea r, a | |
| 636 case 0x87: // xchg r, a | |
| 0 | 637 case REP4(0x38): // cmp... |
| 304 | 638 case 0x85: // test r, a |
| 639 debug_only(has_disp32 = true); // has both kinds of operands! | |
| 0 | 640 break; |
| 641 | |
| 642 case 0xC1: // sal a, #8; sar a, #8; shl a, #8; shr a, #8 | |
| 643 case 0xC6: // movb a, #8 | |
| 644 case 0x80: // cmpb a, #8 | |
| 645 case 0x6B: // imul r, a, #8 | |
| 304 | 646 debug_only(has_disp32 = true); // has both kinds of operands! |
| 0 | 647 tail_size = 1; // the imm8 |
| 648 break; | |
| 649 | |
| 4759 | 650 case 0xC4: // VEX_3bytes |
| 651 case 0xC5: // VEX_2bytes | |
| 652 assert((UseAVX > 0), "shouldn't have VEX prefix"); | |
| 653 assert(ip == inst+1, "no prefixes allowed"); | |
| 654 // C4 and C5 are also used as opcodes for PINSRW and PEXTRW instructions | |
| 655 // but they have prefix 0x0F and processed when 0x0F processed above. | |
| 656 // | |
| 657 // In 32-bit mode the VEX first byte C4 and C5 alias onto LDS and LES | |
| 658 // instructions (these instructions are not supported in 64-bit mode). | |
| 659 // To distinguish them bits [7:6] are set in the VEX second byte since | |
| 660 // ModRM byte can not be of the form 11xxxxxx in 32-bit mode. To set | |
| 661 // those VEX bits REX and vvvv bits are inverted. | |
| 662 // | |
| 663 // Fortunately C2 doesn't generate these instructions so we don't need | |
| 664 // to check for them in product version. | |
| 665 | |
| 666 // Check second byte | |
| 667 NOT_LP64(assert((0xC0 & *ip) == 0xC0, "shouldn't have LDS and LES instructions")); | |
| 668 | |
| 669 // First byte | |
| 670 if ((0xFF & *inst) == VEX_3bytes) { | |
| 671 ip++; // third byte | |
| 672 is_64bit = ((VEX_W & *ip) == VEX_W); | |
| 673 } | |
| 674 ip++; // opcode | |
| 675 // To find the end of instruction (which == end_pc_operand). | |
| 676 switch (0xFF & *ip) { | |
| 677 case 0x61: // pcmpestri r, r/a, #8 | |
| 678 case 0x70: // pshufd r, r/a, #8 | |
| 679 case 0x73: // psrldq r, #8 | |
| 680 tail_size = 1; // the imm8 | |
| 681 break; | |
| 682 default: | |
| 683 break; | |
| 684 } | |
| 685 ip++; // skip opcode | |
| 686 debug_only(has_disp32 = true); // has both kinds of operands! | |
| 687 break; | |
| 0 | 688 |
| 689 case 0xD1: // sal a, 1; sar a, 1; shl a, 1; shr a, 1 | |
| 690 case 0xD3: // sal a, %cl; sar a, %cl; shl a, %cl; shr a, %cl | |
| 691 case 0xD9: // fld_s a; fst_s a; fstp_s a; fldcw a | |
| 692 case 0xDD: // fld_d a; fst_d a; fstp_d a | |
| 693 case 0xDB: // fild_s a; fistp_s a; fld_x a; fstp_x a | |
| 694 case 0xDF: // fild_d a; fistp_d a | |
| 695 case 0xD8: // fadd_s a; fsubr_s a; fmul_s a; fdivr_s a; fcomp_s a | |
| 696 case 0xDC: // fadd_d a; fsubr_d a; fmul_d a; fdivr_d a; fcomp_d a | |
| 697 case 0xDE: // faddp_d a; fsubrp_d a; fmulp_d a; fdivrp_d a; fcompp_d a | |
| 304 | 698 debug_only(has_disp32 = true); |
| 0 | 699 break; |
| 700 | |
| 4759 | 701 case 0xE8: // call rdisp32 |
| 702 case 0xE9: // jmp rdisp32 | |
| 703 if (which == end_pc_operand) return ip + 4; | |
| 704 assert(which == call32_operand, "call has no disp32 or imm"); | |
| 705 return ip; | |
| 706 | |
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707 case 0xF0: // Lock |
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708 assert(os::is_MP(), "only on MP"); |
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709 goto again_after_prefix; |
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710 |
| 0 | 711 case 0xF3: // For SSE |
| 712 case 0xF2: // For SSE2 | |
| 304 | 713 switch (0xFF & *ip++) { |
| 714 case REX: | |
| 715 case REX_B: | |
| 716 case REX_X: | |
| 717 case REX_XB: | |
| 718 case REX_R: | |
| 719 case REX_RB: | |
| 720 case REX_RX: | |
| 721 case REX_RXB: | |
| 722 case REX_W: | |
| 723 case REX_WB: | |
| 724 case REX_WX: | |
| 725 case REX_WXB: | |
| 726 case REX_WR: | |
| 727 case REX_WRB: | |
| 728 case REX_WRX: | |
| 729 case REX_WRXB: | |
| 730 NOT_LP64(assert(false, "found 64bit prefix")); | |
| 731 ip++; | |
| 732 default: | |
| 733 ip++; | |
| 734 } | |
| 735 debug_only(has_disp32 = true); // has both kinds of operands! | |
| 0 | 736 break; |
| 737 | |
| 738 default: | |
| 739 ShouldNotReachHere(); | |
| 740 | |
| 304 | 741 #undef REP8 |
| 742 #undef REP16 | |
| 0 | 743 } |
| 744 | |
| 745 assert(which != call32_operand, "instruction is not a call, jmp, or jcc"); | |
| 304 | 746 #ifdef _LP64 |
| 747 assert(which != imm_operand, "instruction is not a movq reg, imm64"); | |
| 748 #else | |
| 749 // assert(which != imm_operand || has_imm32, "instruction has no imm32 field"); | |
| 750 assert(which != imm_operand || has_disp32, "instruction has no imm32 field"); | |
| 751 #endif // LP64 | |
| 752 assert(which != disp32_operand || has_disp32, "instruction has no disp32 field"); | |
| 0 | 753 |
| 754 // parse the output of emit_operand | |
| 755 int op2 = 0xFF & *ip++; | |
| 756 int base = op2 & 0x07; | |
| 757 int op3 = -1; | |
| 758 const int b100 = 4; | |
| 759 const int b101 = 5; | |
| 760 if (base == b100 && (op2 >> 6) != 3) { | |
| 761 op3 = 0xFF & *ip++; | |
| 762 base = op3 & 0x07; // refetch the base | |
| 763 } | |
| 764 // now ip points at the disp (if any) | |
| 765 | |
| 766 switch (op2 >> 6) { | |
| 767 case 0: | |
| 768 // [00 reg 100][ss index base] | |
| 304 | 769 // [00 reg 100][00 100 esp] |
| 0 | 770 // [00 reg base] |
| 771 // [00 reg 100][ss index 101][disp32] | |
| 772 // [00 reg 101] [disp32] | |
| 773 | |
| 774 if (base == b101) { | |
| 775 if (which == disp32_operand) | |
| 776 return ip; // caller wants the disp32 | |
| 777 ip += 4; // skip the disp32 | |
| 778 } | |
| 779 break; | |
| 780 | |
| 781 case 1: | |
| 782 // [01 reg 100][ss index base][disp8] | |
| 304 | 783 // [01 reg 100][00 100 esp][disp8] |
| 0 | 784 // [01 reg base] [disp8] |
| 785 ip += 1; // skip the disp8 | |
| 786 break; | |
| 787 | |
| 788 case 2: | |
| 789 // [10 reg 100][ss index base][disp32] | |
| 304 | 790 // [10 reg 100][00 100 esp][disp32] |
| 0 | 791 // [10 reg base] [disp32] |
| 792 if (which == disp32_operand) | |
| 793 return ip; // caller wants the disp32 | |
| 794 ip += 4; // skip the disp32 | |
| 795 break; | |
| 796 | |
| 797 case 3: | |
| 798 // [11 reg base] (not a memory addressing mode) | |
| 799 break; | |
| 800 } | |
| 801 | |
| 802 if (which == end_pc_operand) { | |
| 803 return ip + tail_size; | |
| 804 } | |
| 805 | |
| 304 | 806 #ifdef _LP64 |
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807 assert(which == narrow_oop_operand && !is_64bit, "instruction is not a movl adr, imm32"); |
| 304 | 808 #else |
| 809 assert(which == imm_operand, "instruction has only an imm field"); | |
| 810 #endif // LP64 | |
| 0 | 811 return ip; |
| 812 } | |
| 813 | |
| 814 address Assembler::locate_next_instruction(address inst) { | |
| 815 // Secretly share code with locate_operand: | |
| 816 return locate_operand(inst, end_pc_operand); | |
| 817 } | |
| 818 | |
| 819 | |
| 820 #ifdef ASSERT | |
| 821 void Assembler::check_relocation(RelocationHolder const& rspec, int format) { | |
| 822 address inst = inst_mark(); | |
| 823 assert(inst != NULL && inst < pc(), "must point to beginning of instruction"); | |
| 824 address opnd; | |
| 825 | |
| 826 Relocation* r = rspec.reloc(); | |
| 827 if (r->type() == relocInfo::none) { | |
| 828 return; | |
| 829 } else if (r->is_call() || format == call32_operand) { | |
| 830 // assert(format == imm32_operand, "cannot specify a nonzero format"); | |
| 831 opnd = locate_operand(inst, call32_operand); | |
| 832 } else if (r->is_data()) { | |
| 304 | 833 assert(format == imm_operand || format == disp32_operand |
| 834 LP64_ONLY(|| format == narrow_oop_operand), "format ok"); | |
| 0 | 835 opnd = locate_operand(inst, (WhichOperand)format); |
| 836 } else { | |
| 304 | 837 assert(format == imm_operand, "cannot specify a format"); |
| 0 | 838 return; |
| 839 } | |
| 840 assert(opnd == pc(), "must put operand where relocs can find it"); | |
| 841 } | |
| 304 | 842 #endif // ASSERT |
| 843 | |
| 844 void Assembler::emit_operand32(Register reg, Address adr) { | |
| 845 assert(reg->encoding() < 8, "no extended registers"); | |
| 846 assert(!adr.base_needs_rex() && !adr.index_needs_rex(), "no extended registers"); | |
| 847 emit_operand(reg, adr._base, adr._index, adr._scale, adr._disp, | |
| 848 adr._rspec); | |
| 849 } | |
| 850 | |
| 851 void Assembler::emit_operand(Register reg, Address adr, | |
| 852 int rip_relative_correction) { | |
| 853 emit_operand(reg, adr._base, adr._index, adr._scale, adr._disp, | |
| 854 adr._rspec, | |
| 855 rip_relative_correction); | |
| 856 } | |
| 857 | |
| 858 void Assembler::emit_operand(XMMRegister reg, Address adr) { | |
| 859 emit_operand(reg, adr._base, adr._index, adr._scale, adr._disp, | |
| 860 adr._rspec); | |
| 861 } | |
| 862 | |
| 863 // MMX operations | |
| 864 void Assembler::emit_operand(MMXRegister reg, Address adr) { | |
| 865 assert(!adr.base_needs_rex() && !adr.index_needs_rex(), "no extended registers"); | |
| 866 emit_operand((Register)reg, adr._base, adr._index, adr._scale, adr._disp, adr._rspec); | |
| 867 } | |
| 868 | |
| 869 // work around gcc (3.2.1-7a) bug | |
| 870 void Assembler::emit_operand(Address adr, MMXRegister reg) { | |
| 871 assert(!adr.base_needs_rex() && !adr.index_needs_rex(), "no extended registers"); | |
| 872 emit_operand((Register)reg, adr._base, adr._index, adr._scale, adr._disp, adr._rspec); | |
| 0 | 873 } |
| 874 | |
| 875 | |
| 876 void Assembler::emit_farith(int b1, int b2, int i) { | |
| 877 assert(isByte(b1) && isByte(b2), "wrong opcode"); | |
| 878 assert(0 <= i && i < 8, "illegal stack offset"); | |
|
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879 emit_int8(b1); |
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880 emit_int8(b2 + i); |
| 0 | 881 } |
| 882 | |
| 883 | |
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884 // Now the Assembler instructions (identical for 32/64 bits) |
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885 |
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886 void Assembler::adcl(Address dst, int32_t imm32) { |
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887 InstructionMark im(this); |
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888 prefix(dst); |
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889 emit_arith_operand(0x81, rdx, dst, imm32); |
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890 } |
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891 |
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892 void Assembler::adcl(Address dst, Register src) { |
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893 InstructionMark im(this); |
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894 prefix(dst, src); |
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895 emit_int8(0x11); |
|
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896 emit_operand(src, dst); |
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897 } |
| 304 | 898 |
| 899 void Assembler::adcl(Register dst, int32_t imm32) { | |
| 900 prefix(dst); | |
| 0 | 901 emit_arith(0x81, 0xD0, dst, imm32); |
| 902 } | |
| 903 | |
| 904 void Assembler::adcl(Register dst, Address src) { | |
| 905 InstructionMark im(this); | |
| 304 | 906 prefix(src, dst); |
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907 emit_int8(0x13); |
| 0 | 908 emit_operand(dst, src); |
| 909 } | |
| 910 | |
| 911 void Assembler::adcl(Register dst, Register src) { | |
| 304 | 912 (void) prefix_and_encode(dst->encoding(), src->encoding()); |
| 0 | 913 emit_arith(0x13, 0xC0, dst, src); |
| 914 } | |
| 915 | |
| 304 | 916 void Assembler::addl(Address dst, int32_t imm32) { |
| 917 InstructionMark im(this); | |
| 918 prefix(dst); | |
| 919 emit_arith_operand(0x81, rax, dst, imm32); | |
| 920 } | |
| 0 | 921 |
| 922 void Assembler::addl(Address dst, Register src) { | |
| 923 InstructionMark im(this); | |
| 304 | 924 prefix(dst, src); |
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925 emit_int8(0x01); |
| 0 | 926 emit_operand(src, dst); |
| 927 } | |
| 928 | |
| 304 | 929 void Assembler::addl(Register dst, int32_t imm32) { |
| 930 prefix(dst); | |
| 0 | 931 emit_arith(0x81, 0xC0, dst, imm32); |
| 932 } | |
| 933 | |
| 934 void Assembler::addl(Register dst, Address src) { | |
| 935 InstructionMark im(this); | |
| 304 | 936 prefix(src, dst); |
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937 emit_int8(0x03); |
| 0 | 938 emit_operand(dst, src); |
| 939 } | |
| 940 | |
| 941 void Assembler::addl(Register dst, Register src) { | |
| 304 | 942 (void) prefix_and_encode(dst->encoding(), src->encoding()); |
| 0 | 943 emit_arith(0x03, 0xC0, dst, src); |
| 944 } | |
| 945 | |
| 946 void Assembler::addr_nop_4() { | |
|
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947 assert(UseAddressNop, "no CPU support"); |
| 0 | 948 // 4 bytes: NOP DWORD PTR [EAX+0] |
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949 emit_int8(0x0F); |
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950 emit_int8(0x1F); |
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951 emit_int8(0x40); // emit_rm(cbuf, 0x1, EAX_enc, EAX_enc); |
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952 emit_int8(0); // 8-bits offset (1 byte) |
| 0 | 953 } |
| 954 | |
| 955 void Assembler::addr_nop_5() { | |
|
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956 assert(UseAddressNop, "no CPU support"); |
| 0 | 957 // 5 bytes: NOP DWORD PTR [EAX+EAX*0+0] 8-bits offset |
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958 emit_int8(0x0F); |
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959 emit_int8(0x1F); |
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960 emit_int8(0x44); // emit_rm(cbuf, 0x1, EAX_enc, 0x4); |
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961 emit_int8(0x00); // emit_rm(cbuf, 0x0, EAX_enc, EAX_enc); |
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962 emit_int8(0); // 8-bits offset (1 byte) |
| 0 | 963 } |
| 964 | |
| 965 void Assembler::addr_nop_7() { | |
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966 assert(UseAddressNop, "no CPU support"); |
| 0 | 967 // 7 bytes: NOP DWORD PTR [EAX+0] 32-bits offset |
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968 emit_int8(0x0F); |
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969 emit_int8(0x1F); |
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970 emit_int8((unsigned char)0x80); |
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971 // emit_rm(cbuf, 0x2, EAX_enc, EAX_enc); |
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972 emit_int32(0); // 32-bits offset (4 bytes) |
| 0 | 973 } |
| 974 | |
| 975 void Assembler::addr_nop_8() { | |
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976 assert(UseAddressNop, "no CPU support"); |
| 0 | 977 // 8 bytes: NOP DWORD PTR [EAX+EAX*0+0] 32-bits offset |
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978 emit_int8(0x0F); |
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979 emit_int8(0x1F); |
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980 emit_int8((unsigned char)0x84); |
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981 // emit_rm(cbuf, 0x2, EAX_enc, 0x4); |
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982 emit_int8(0x00); // emit_rm(cbuf, 0x0, EAX_enc, EAX_enc); |
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983 emit_int32(0); // 32-bits offset (4 bytes) |
| 0 | 984 } |
| 985 | |
| 304 | 986 void Assembler::addsd(XMMRegister dst, XMMRegister src) { |
| 987 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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988 emit_simd_arith(0x58, dst, src, VEX_SIMD_F2); |
| 304 | 989 } |
| 990 | |
| 991 void Assembler::addsd(XMMRegister dst, Address src) { | |
| 992 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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993 emit_simd_arith(0x58, dst, src, VEX_SIMD_F2); |
| 304 | 994 } |
| 995 | |
| 996 void Assembler::addss(XMMRegister dst, XMMRegister src) { | |
| 997 NOT_LP64(assert(VM_Version::supports_sse(), "")); | |
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998 emit_simd_arith(0x58, dst, src, VEX_SIMD_F3); |
| 304 | 999 } |
| 1000 | |
| 1001 void Assembler::addss(XMMRegister dst, Address src) { | |
| 1002 NOT_LP64(assert(VM_Version::supports_sse(), "")); | |
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1003 emit_simd_arith(0x58, dst, src, VEX_SIMD_F3); |
| 304 | 1004 } |
| 1005 | |
| 6894 | 1006 void Assembler::aesdec(XMMRegister dst, Address src) { |
| 1007 assert(VM_Version::supports_aes(), ""); | |
| 1008 InstructionMark im(this); | |
| 1009 simd_prefix(dst, dst, src, VEX_SIMD_66, VEX_OPCODE_0F_38); | |
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1010 emit_int8((unsigned char)0xDE); |
| 6894 | 1011 emit_operand(dst, src); |
| 1012 } | |
| 1013 | |
| 1014 void Assembler::aesdec(XMMRegister dst, XMMRegister src) { | |
| 1015 assert(VM_Version::supports_aes(), ""); | |
| 1016 int encode = simd_prefix_and_encode(dst, dst, src, VEX_SIMD_66, VEX_OPCODE_0F_38); | |
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1017 emit_int8((unsigned char)0xDE); |
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1018 emit_int8(0xC0 | encode); |
| 6894 | 1019 } |
| 1020 | |
| 1021 void Assembler::aesdeclast(XMMRegister dst, Address src) { | |
| 1022 assert(VM_Version::supports_aes(), ""); | |
| 1023 InstructionMark im(this); | |
| 1024 simd_prefix(dst, dst, src, VEX_SIMD_66, VEX_OPCODE_0F_38); | |
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1025 emit_int8((unsigned char)0xDF); |
| 6894 | 1026 emit_operand(dst, src); |
| 1027 } | |
| 1028 | |
| 1029 void Assembler::aesdeclast(XMMRegister dst, XMMRegister src) { | |
| 1030 assert(VM_Version::supports_aes(), ""); | |
| 1031 int encode = simd_prefix_and_encode(dst, dst, src, VEX_SIMD_66, VEX_OPCODE_0F_38); | |
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1032 emit_int8((unsigned char)0xDF); |
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1033 emit_int8((unsigned char)(0xC0 | encode)); |
| 6894 | 1034 } |
| 1035 | |
| 1036 void Assembler::aesenc(XMMRegister dst, Address src) { | |
| 1037 assert(VM_Version::supports_aes(), ""); | |
| 1038 InstructionMark im(this); | |
| 1039 simd_prefix(dst, dst, src, VEX_SIMD_66, VEX_OPCODE_0F_38); | |
|
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1040 emit_int8((unsigned char)0xDC); |
| 6894 | 1041 emit_operand(dst, src); |
| 1042 } | |
| 1043 | |
| 1044 void Assembler::aesenc(XMMRegister dst, XMMRegister src) { | |
| 1045 assert(VM_Version::supports_aes(), ""); | |
| 1046 int encode = simd_prefix_and_encode(dst, dst, src, VEX_SIMD_66, VEX_OPCODE_0F_38); | |
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1047 emit_int8((unsigned char)0xDC); |
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1048 emit_int8(0xC0 | encode); |
| 6894 | 1049 } |
| 1050 | |
| 1051 void Assembler::aesenclast(XMMRegister dst, Address src) { | |
| 1052 assert(VM_Version::supports_aes(), ""); | |
| 1053 InstructionMark im(this); | |
| 1054 simd_prefix(dst, dst, src, VEX_SIMD_66, VEX_OPCODE_0F_38); | |
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1055 emit_int8((unsigned char)0xDD); |
| 6894 | 1056 emit_operand(dst, src); |
| 1057 } | |
| 1058 | |
| 1059 void Assembler::aesenclast(XMMRegister dst, XMMRegister src) { | |
| 1060 assert(VM_Version::supports_aes(), ""); | |
| 1061 int encode = simd_prefix_and_encode(dst, dst, src, VEX_SIMD_66, VEX_OPCODE_0F_38); | |
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1062 emit_int8((unsigned char)0xDD); |
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1063 emit_int8((unsigned char)(0xC0 | encode)); |
| 6894 | 1064 } |
| 1065 | |
| 1066 | |
| 4759 | 1067 void Assembler::andl(Address dst, int32_t imm32) { |
| 1068 InstructionMark im(this); | |
| 1069 prefix(dst); | |
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1070 emit_int8((unsigned char)0x81); |
| 4759 | 1071 emit_operand(rsp, dst, 4); |
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1072 emit_int32(imm32); |
| 4759 | 1073 } |
| 1074 | |
| 304 | 1075 void Assembler::andl(Register dst, int32_t imm32) { |
| 1076 prefix(dst); | |
| 1077 emit_arith(0x81, 0xE0, dst, imm32); | |
| 1078 } | |
| 1079 | |
| 1080 void Assembler::andl(Register dst, Address src) { | |
| 1081 InstructionMark im(this); | |
| 1082 prefix(src, dst); | |
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1083 emit_int8(0x23); |
| 304 | 1084 emit_operand(dst, src); |
| 1085 } | |
| 1086 | |
| 1087 void Assembler::andl(Register dst, Register src) { | |
| 1088 (void) prefix_and_encode(dst->encoding(), src->encoding()); | |
| 1089 emit_arith(0x23, 0xC0, dst, src); | |
| 1090 } | |
| 1091 | |
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1092 void Assembler::bsfl(Register dst, Register src) { |
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1093 int encode = prefix_and_encode(dst->encoding(), src->encoding()); |
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1094 emit_int8(0x0F); |
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1095 emit_int8((unsigned char)0xBC); |
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1096 emit_int8((unsigned char)(0xC0 | encode)); |
|
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1097 } |
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1098 |
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1099 void Assembler::bsrl(Register dst, Register src) { |
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1100 assert(!VM_Version::supports_lzcnt(), "encoding is treated as LZCNT"); |
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1101 int encode = prefix_and_encode(dst->encoding(), src->encoding()); |
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1102 emit_int8(0x0F); |
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1103 emit_int8((unsigned char)0xBD); |
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1104 emit_int8((unsigned char)(0xC0 | encode)); |
|
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1105 } |
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1106 |
| 304 | 1107 void Assembler::bswapl(Register reg) { // bswap |
| 1108 int encode = prefix_and_encode(reg->encoding()); | |
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1109 emit_int8(0x0F); |
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1110 emit_int8((unsigned char)(0xC8 | encode)); |
| 304 | 1111 } |
| 1112 | |
| 1113 void Assembler::call(Label& L, relocInfo::relocType rtype) { | |
| 1114 // suspect disp32 is always good | |
| 1115 int operand = LP64_ONLY(disp32_operand) NOT_LP64(imm_operand); | |
| 1116 | |
| 1117 if (L.is_bound()) { | |
| 1118 const int long_size = 5; | |
| 1119 int offs = (int)( target(L) - pc() ); | |
| 1120 assert(offs <= 0, "assembler error"); | |
| 1121 InstructionMark im(this); | |
| 1122 // 1110 1000 #32-bit disp | |
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1123 emit_int8((unsigned char)0xE8); |
| 304 | 1124 emit_data(offs - long_size, rtype, operand); |
| 1125 } else { | |
| 1126 InstructionMark im(this); | |
| 1127 // 1110 1000 #32-bit disp | |
| 1128 L.add_patch_at(code(), locator()); | |
| 1129 | |
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1130 emit_int8((unsigned char)0xE8); |
| 304 | 1131 emit_data(int(0), rtype, operand); |
| 1132 } | |
| 1133 } | |
| 1134 | |
| 1135 void Assembler::call(Register dst) { | |
| 4759 | 1136 int encode = prefix_and_encode(dst->encoding()); |
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1137 emit_int8((unsigned char)0xFF); |
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1138 emit_int8((unsigned char)(0xD0 | encode)); |
| 304 | 1139 } |
| 1140 | |
| 1141 | |
| 1142 void Assembler::call(Address adr) { | |
| 1143 InstructionMark im(this); | |
| 1144 prefix(adr); | |
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1145 emit_int8((unsigned char)0xFF); |
| 304 | 1146 emit_operand(rdx, adr); |
| 1147 } | |
| 1148 | |
| 1149 void Assembler::call_literal(address entry, RelocationHolder const& rspec) { | |
| 1150 assert(entry != NULL, "call most probably wrong"); | |
| 1151 InstructionMark im(this); | |
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1152 emit_int8((unsigned char)0xE8); |
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1153 intptr_t disp = entry - (pc() + sizeof(int32_t)); |
| 304 | 1154 assert(is_simm32(disp), "must be 32bit offset (call2)"); |
| 1155 // Technically, should use call32_operand, but this format is | |
| 1156 // implied by the fact that we're emitting a call instruction. | |
| 1157 | |
| 1158 int operand = LP64_ONLY(disp32_operand) NOT_LP64(call32_operand); | |
| 1159 emit_data((int) disp, rspec, operand); | |
| 1160 } | |
| 1161 | |
| 1162 void Assembler::cdql() { | |
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1163 emit_int8((unsigned char)0x99); |
| 304 | 1164 } |
| 1165 | |
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1166 void Assembler::cld() { |
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1167 emit_int8((unsigned char)0xFC); |
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1168 } |
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1169 |
| 304 | 1170 void Assembler::cmovl(Condition cc, Register dst, Register src) { |
| 1171 NOT_LP64(guarantee(VM_Version::supports_cmov(), "illegal instruction")); | |
| 1172 int encode = prefix_and_encode(dst->encoding(), src->encoding()); | |
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1173 emit_int8(0x0F); |
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1174 emit_int8(0x40 | cc); |
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1175 emit_int8((unsigned char)(0xC0 | encode)); |
| 304 | 1176 } |
| 1177 | |
| 1178 | |
| 1179 void Assembler::cmovl(Condition cc, Register dst, Address src) { | |
| 1180 NOT_LP64(guarantee(VM_Version::supports_cmov(), "illegal instruction")); | |
| 1181 prefix(src, dst); | |
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1182 emit_int8(0x0F); |
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1183 emit_int8(0x40 | cc); |
| 304 | 1184 emit_operand(dst, src); |
| 1185 } | |
| 1186 | |
| 1187 void Assembler::cmpb(Address dst, int imm8) { | |
| 1188 InstructionMark im(this); | |
| 1189 prefix(dst); | |
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1190 emit_int8((unsigned char)0x80); |
| 304 | 1191 emit_operand(rdi, dst, 1); |
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1192 emit_int8(imm8); |
| 304 | 1193 } |
| 1194 | |
| 1195 void Assembler::cmpl(Address dst, int32_t imm32) { | |
| 1196 InstructionMark im(this); | |
| 1197 prefix(dst); | |
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1198 emit_int8((unsigned char)0x81); |
| 304 | 1199 emit_operand(rdi, dst, 4); |
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1200 emit_int32(imm32); |
| 304 | 1201 } |
| 1202 | |
| 1203 void Assembler::cmpl(Register dst, int32_t imm32) { | |
| 1204 prefix(dst); | |
| 1205 emit_arith(0x81, 0xF8, dst, imm32); | |
| 1206 } | |
| 1207 | |
| 1208 void Assembler::cmpl(Register dst, Register src) { | |
| 1209 (void) prefix_and_encode(dst->encoding(), src->encoding()); | |
| 1210 emit_arith(0x3B, 0xC0, dst, src); | |
| 1211 } | |
| 1212 | |
| 1213 | |
| 1214 void Assembler::cmpl(Register dst, Address src) { | |
| 1215 InstructionMark im(this); | |
| 1216 prefix(src, dst); | |
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1217 emit_int8((unsigned char)0x3B); |
| 304 | 1218 emit_operand(dst, src); |
| 1219 } | |
| 1220 | |
| 1221 void Assembler::cmpw(Address dst, int imm16) { | |
| 1222 InstructionMark im(this); | |
| 1223 assert(!dst.base_needs_rex() && !dst.index_needs_rex(), "no extended registers"); | |
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1224 emit_int8(0x66); |
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1225 emit_int8((unsigned char)0x81); |
| 304 | 1226 emit_operand(rdi, dst, 2); |
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1227 emit_int16(imm16); |
| 304 | 1228 } |
| 1229 | |
| 1230 // The 32-bit cmpxchg compares the value at adr with the contents of rax, | |
| 1231 // and stores reg into adr if so; otherwise, the value at adr is loaded into rax,. | |
| 1232 // The ZF is set if the compared values were equal, and cleared otherwise. | |
| 1233 void Assembler::cmpxchgl(Register reg, Address adr) { // cmpxchg | |
| 6834 | 1234 InstructionMark im(this); |
| 1235 prefix(adr, reg); | |
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1236 emit_int8(0x0F); |
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1237 emit_int8((unsigned char)0xB1); |
| 6834 | 1238 emit_operand(reg, adr); |
| 304 | 1239 } |
| 1240 | |
| 1241 void Assembler::comisd(XMMRegister dst, Address src) { | |
| 1242 // NOTE: dbx seems to decode this as comiss even though the | |
| 1243 // 0x66 is there. Strangly ucomisd comes out correct | |
| 1244 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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1245 emit_simd_arith_nonds(0x2F, dst, src, VEX_SIMD_66); |
| 4759 | 1246 } |
| 1247 | |
| 1248 void Assembler::comisd(XMMRegister dst, XMMRegister src) { | |
| 1249 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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1250 emit_simd_arith_nonds(0x2F, dst, src, VEX_SIMD_66); |
| 304 | 1251 } |
| 1252 | |
| 1253 void Assembler::comiss(XMMRegister dst, Address src) { | |
| 1254 NOT_LP64(assert(VM_Version::supports_sse(), "")); | |
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1255 emit_simd_arith_nonds(0x2F, dst, src, VEX_SIMD_NONE); |
| 304 | 1256 } |
| 1257 | |
| 4759 | 1258 void Assembler::comiss(XMMRegister dst, XMMRegister src) { |
| 1259 NOT_LP64(assert(VM_Version::supports_sse(), "")); | |
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1260 emit_simd_arith_nonds(0x2F, dst, src, VEX_SIMD_NONE); |
| 4759 | 1261 } |
| 1262 | |
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1263 void Assembler::cpuid() { |
|
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1264 emit_int8(0x0F); |
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1265 emit_int8((unsigned char)0xA2); |
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1266 } |
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1267 |
| 304 | 1268 void Assembler::cvtdq2pd(XMMRegister dst, XMMRegister src) { |
| 1269 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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1270 emit_simd_arith_nonds(0xE6, dst, src, VEX_SIMD_F3); |
| 304 | 1271 } |
| 1272 | |
| 1273 void Assembler::cvtdq2ps(XMMRegister dst, XMMRegister src) { | |
| 1274 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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1275 emit_simd_arith_nonds(0x5B, dst, src, VEX_SIMD_NONE); |
| 304 | 1276 } |
| 1277 | |
| 1278 void Assembler::cvtsd2ss(XMMRegister dst, XMMRegister src) { | |
| 1279 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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1280 emit_simd_arith(0x5A, dst, src, VEX_SIMD_F2); |
| 304 | 1281 } |
| 1282 | |
| 4759 | 1283 void Assembler::cvtsd2ss(XMMRegister dst, Address src) { |
| 1284 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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1285 emit_simd_arith(0x5A, dst, src, VEX_SIMD_F2); |
| 4759 | 1286 } |
| 1287 | |
| 304 | 1288 void Assembler::cvtsi2sdl(XMMRegister dst, Register src) { |
| 1289 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
| 4759 | 1290 int encode = simd_prefix_and_encode(dst, dst, src, VEX_SIMD_F2); |
|
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1291 emit_int8(0x2A); |
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1292 emit_int8((unsigned char)(0xC0 | encode)); |
| 304 | 1293 } |
| 1294 | |
| 4759 | 1295 void Assembler::cvtsi2sdl(XMMRegister dst, Address src) { |
| 1296 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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1297 emit_simd_arith(0x2A, dst, src, VEX_SIMD_F2); |
| 4759 | 1298 } |
| 1299 | |
| 304 | 1300 void Assembler::cvtsi2ssl(XMMRegister dst, Register src) { |
| 1301 NOT_LP64(assert(VM_Version::supports_sse(), "")); | |
| 4759 | 1302 int encode = simd_prefix_and_encode(dst, dst, src, VEX_SIMD_F3); |
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1303 emit_int8(0x2A); |
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1304 emit_int8((unsigned char)(0xC0 | encode)); |
| 304 | 1305 } |
| 1306 | |
| 4759 | 1307 void Assembler::cvtsi2ssl(XMMRegister dst, Address src) { |
| 1308 NOT_LP64(assert(VM_Version::supports_sse(), "")); | |
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1309 emit_simd_arith(0x2A, dst, src, VEX_SIMD_F3); |
| 4759 | 1310 } |
| 1311 | |
| 304 | 1312 void Assembler::cvtss2sd(XMMRegister dst, XMMRegister src) { |
| 1313 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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1314 emit_simd_arith(0x5A, dst, src, VEX_SIMD_F3); |
| 304 | 1315 } |
| 1316 | |
| 4759 | 1317 void Assembler::cvtss2sd(XMMRegister dst, Address src) { |
| 1318 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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1319 emit_simd_arith(0x5A, dst, src, VEX_SIMD_F3); |
| 4759 | 1320 } |
| 1321 | |
| 1322 | |
| 304 | 1323 void Assembler::cvttsd2sil(Register dst, XMMRegister src) { |
| 1324 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
| 4759 | 1325 int encode = simd_prefix_and_encode(dst, src, VEX_SIMD_F2); |
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1326 emit_int8(0x2C); |
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1327 emit_int8((unsigned char)(0xC0 | encode)); |
| 304 | 1328 } |
| 1329 | |
| 1330 void Assembler::cvttss2sil(Register dst, XMMRegister src) { | |
| 1331 NOT_LP64(assert(VM_Version::supports_sse(), "")); | |
| 4759 | 1332 int encode = simd_prefix_and_encode(dst, src, VEX_SIMD_F3); |
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1333 emit_int8(0x2C); |
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1334 emit_int8((unsigned char)(0xC0 | encode)); |
| 304 | 1335 } |
| 1336 | |
| 1337 void Assembler::decl(Address dst) { | |
| 1338 // Don't use it directly. Use MacroAssembler::decrement() instead. | |
| 1339 InstructionMark im(this); | |
| 1340 prefix(dst); | |
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1341 emit_int8((unsigned char)0xFF); |
| 304 | 1342 emit_operand(rcx, dst); |
| 1343 } | |
| 1344 | |
| 1345 void Assembler::divsd(XMMRegister dst, Address src) { | |
| 1346 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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1347 emit_simd_arith(0x5E, dst, src, VEX_SIMD_F2); |
| 304 | 1348 } |
| 1349 | |
| 1350 void Assembler::divsd(XMMRegister dst, XMMRegister src) { | |
| 1351 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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1352 emit_simd_arith(0x5E, dst, src, VEX_SIMD_F2); |
| 304 | 1353 } |
| 1354 | |
| 1355 void Assembler::divss(XMMRegister dst, Address src) { | |
| 1356 NOT_LP64(assert(VM_Version::supports_sse(), "")); | |
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1357 emit_simd_arith(0x5E, dst, src, VEX_SIMD_F3); |
| 304 | 1358 } |
| 1359 | |
| 1360 void Assembler::divss(XMMRegister dst, XMMRegister src) { | |
| 1361 NOT_LP64(assert(VM_Version::supports_sse(), "")); | |
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1362 emit_simd_arith(0x5E, dst, src, VEX_SIMD_F3); |
| 304 | 1363 } |
| 1364 | |
| 1365 void Assembler::emms() { | |
| 1366 NOT_LP64(assert(VM_Version::supports_mmx(), "")); | |
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1367 emit_int8(0x0F); |
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1368 emit_int8(0x77); |
| 304 | 1369 } |
| 1370 | |
| 1371 void Assembler::hlt() { | |
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1372 emit_int8((unsigned char)0xF4); |
| 304 | 1373 } |
| 1374 | |
| 1375 void Assembler::idivl(Register src) { | |
| 1376 int encode = prefix_and_encode(src->encoding()); | |
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1377 emit_int8((unsigned char)0xF7); |
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1378 emit_int8((unsigned char)(0xF8 | encode)); |
| 304 | 1379 } |
| 1380 | |
| 1920 | 1381 void Assembler::divl(Register src) { // Unsigned |
| 1382 int encode = prefix_and_encode(src->encoding()); | |
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1383 emit_int8((unsigned char)0xF7); |
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1384 emit_int8((unsigned char)(0xF0 | encode)); |
| 1920 | 1385 } |
| 1386 | |
| 304 | 1387 void Assembler::imull(Register dst, Register src) { |
| 1388 int encode = prefix_and_encode(dst->encoding(), src->encoding()); | |
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1389 emit_int8(0x0F); |
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1390 emit_int8((unsigned char)0xAF); |
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1391 emit_int8((unsigned char)(0xC0 | encode)); |
| 304 | 1392 } |
| 1393 | |
| 1394 | |
| 1395 void Assembler::imull(Register dst, Register src, int value) { | |
| 1396 int encode = prefix_and_encode(dst->encoding(), src->encoding()); | |
| 1397 if (is8bit(value)) { | |
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1398 emit_int8(0x6B); |
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1399 emit_int8((unsigned char)(0xC0 | encode)); |
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1400 emit_int8(value & 0xFF); |
| 304 | 1401 } else { |
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1402 emit_int8(0x69); |
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1403 emit_int8((unsigned char)(0xC0 | encode)); |
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1404 emit_int32(value); |
| 304 | 1405 } |
| 1406 } | |
| 1407 | |
|
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1408 void Assembler::imull(Register dst, Address src) { |
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1409 InstructionMark im(this); |
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1410 prefix(src, dst); |
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1411 emit_int8(0x0F); |
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1412 emit_int8((unsigned char) 0xAF); |
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1413 emit_operand(dst, src); |
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1414 } |
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1415 |
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1416 |
| 304 | 1417 void Assembler::incl(Address dst) { |
| 1418 // Don't use it directly. Use MacroAssembler::increment() instead. | |
| 1419 InstructionMark im(this); | |
| 1420 prefix(dst); | |
|
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1421 emit_int8((unsigned char)0xFF); |
| 304 | 1422 emit_operand(rax, dst); |
| 1423 } | |
| 1424 | |
| 3851 | 1425 void Assembler::jcc(Condition cc, Label& L, bool maybe_short) { |
| 1426 InstructionMark im(this); | |
| 304 | 1427 assert((0 <= cc) && (cc < 16), "illegal cc"); |
| 1428 if (L.is_bound()) { | |
| 1429 address dst = target(L); | |
| 1430 assert(dst != NULL, "jcc most probably wrong"); | |
| 1431 | |
| 1432 const int short_size = 2; | |
| 1433 const int long_size = 6; | |
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1434 intptr_t offs = (intptr_t)dst - (intptr_t)pc(); |
| 3851 | 1435 if (maybe_short && is8bit(offs - short_size)) { |
| 304 | 1436 // 0111 tttn #8-bit disp |
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1437 emit_int8(0x70 | cc); |
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1438 emit_int8((offs - short_size) & 0xFF); |
| 304 | 1439 } else { |
| 1440 // 0000 1111 1000 tttn #32-bit disp | |
| 1441 assert(is_simm32(offs - long_size), | |
| 1442 "must be 32bit offset (call4)"); | |
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1443 emit_int8(0x0F); |
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1444 emit_int8((unsigned char)(0x80 | cc)); |
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1445 emit_int32(offs - long_size); |
| 304 | 1446 } |
| 1447 } else { | |
| 1448 // Note: could eliminate cond. jumps to this jump if condition | |
| 1449 // is the same however, seems to be rather unlikely case. | |
| 1450 // Note: use jccb() if label to be bound is very close to get | |
| 1451 // an 8-bit displacement | |
| 1452 L.add_patch_at(code(), locator()); | |
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1453 emit_int8(0x0F); |
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1454 emit_int8((unsigned char)(0x80 | cc)); |
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1455 emit_int32(0); |
| 304 | 1456 } |
| 1457 } | |
| 1458 | |
| 1459 void Assembler::jccb(Condition cc, Label& L) { | |
| 1460 if (L.is_bound()) { | |
| 1461 const int short_size = 2; | |
| 1462 address entry = target(L); | |
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1463 #ifdef ASSERT |
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1464 intptr_t dist = (intptr_t)entry - ((intptr_t)pc() + short_size); |
|
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1465 intptr_t delta = short_branch_delta(); |
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1466 if (delta != 0) { |
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1467 dist += (dist < 0 ? (-delta) :delta); |
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1468 } |
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1469 assert(is8bit(dist), "Dispacement too large for a short jmp"); |
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1470 #endif |
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1471 intptr_t offs = (intptr_t)entry - (intptr_t)pc(); |
| 304 | 1472 // 0111 tttn #8-bit disp |
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1473 emit_int8(0x70 | cc); |
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1474 emit_int8((offs - short_size) & 0xFF); |
| 304 | 1475 } else { |
| 1476 InstructionMark im(this); | |
| 1477 L.add_patch_at(code(), locator()); | |
|
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1478 emit_int8(0x70 | cc); |
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1479 emit_int8(0); |
| 304 | 1480 } |
| 1481 } | |
| 1482 | |
| 1483 void Assembler::jmp(Address adr) { | |
| 1484 InstructionMark im(this); | |
| 1485 prefix(adr); | |
|
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1486 emit_int8((unsigned char)0xFF); |
| 304 | 1487 emit_operand(rsp, adr); |
| 1488 } | |
| 1489 | |
| 3851 | 1490 void Assembler::jmp(Label& L, bool maybe_short) { |
| 304 | 1491 if (L.is_bound()) { |
| 1492 address entry = target(L); | |
| 1493 assert(entry != NULL, "jmp most probably wrong"); | |
| 1494 InstructionMark im(this); | |
| 1495 const int short_size = 2; | |
| 1496 const int long_size = 5; | |
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1497 intptr_t offs = entry - pc(); |
| 3851 | 1498 if (maybe_short && is8bit(offs - short_size)) { |
|
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changeset
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1499 emit_int8((unsigned char)0xEB); |
|
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1500 emit_int8((offs - short_size) & 0xFF); |
| 304 | 1501 } else { |
|
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|
1502 emit_int8((unsigned char)0xE9); |
|
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1503 emit_int32(offs - long_size); |
| 304 | 1504 } |
| 1505 } else { | |
| 1506 // By default, forward jumps are always 32-bit displacements, since | |
| 1507 // we can't yet know where the label will be bound. If you're sure that | |
| 1508 // the forward jump will not run beyond 256 bytes, use jmpb to | |
| 1509 // force an 8-bit displacement. | |
| 1510 InstructionMark im(this); | |
| 1511 L.add_patch_at(code(), locator()); | |
|
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|
1512 emit_int8((unsigned char)0xE9); |
|
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1513 emit_int32(0); |
| 304 | 1514 } |
| 1515 } | |
| 1516 | |
| 1517 void Assembler::jmp(Register entry) { | |
| 1518 int encode = prefix_and_encode(entry->encoding()); | |
|
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1519 emit_int8((unsigned char)0xFF); |
|
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1520 emit_int8((unsigned char)(0xE0 | encode)); |
| 304 | 1521 } |
| 1522 | |
| 1523 void Assembler::jmp_literal(address dest, RelocationHolder const& rspec) { | |
| 1524 InstructionMark im(this); | |
|
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1525 emit_int8((unsigned char)0xE9); |
| 304 | 1526 assert(dest != NULL, "must have a target"); |
|
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1527 intptr_t disp = dest - (pc() + sizeof(int32_t)); |
| 304 | 1528 assert(is_simm32(disp), "must be 32bit offset (jmp)"); |
| 1529 emit_data(disp, rspec.reloc(), call32_operand); | |
| 1530 } | |
| 1531 | |
| 1532 void Assembler::jmpb(Label& L) { | |
| 1533 if (L.is_bound()) { | |
| 1534 const int short_size = 2; | |
| 1535 address entry = target(L); | |
| 1536 assert(entry != NULL, "jmp most probably wrong"); | |
|
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1537 #ifdef ASSERT |
|
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1538 intptr_t dist = (intptr_t)entry - ((intptr_t)pc() + short_size); |
|
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1539 intptr_t delta = short_branch_delta(); |
|
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1540 if (delta != 0) { |
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1541 dist += (dist < 0 ? (-delta) :delta); |
|
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1542 } |
|
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1543 assert(is8bit(dist), "Dispacement too large for a short jmp"); |
|
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1544 #endif |
|
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1545 intptr_t offs = entry - pc(); |
|
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1546 emit_int8((unsigned char)0xEB); |
|
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1547 emit_int8((offs - short_size) & 0xFF); |
| 304 | 1548 } else { |
| 1549 InstructionMark im(this); | |
| 1550 L.add_patch_at(code(), locator()); | |
|
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|
1551 emit_int8((unsigned char)0xEB); |
|
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|
1552 emit_int8(0); |
| 304 | 1553 } |
| 1554 } | |
| 1555 | |
| 1556 void Assembler::ldmxcsr( Address src) { | |
| 1557 NOT_LP64(assert(VM_Version::supports_sse(), "")); | |
| 1558 InstructionMark im(this); | |
| 1559 prefix(src); | |
|
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1560 emit_int8(0x0F); |
|
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1561 emit_int8((unsigned char)0xAE); |
| 304 | 1562 emit_operand(as_Register(2), src); |
| 1563 } | |
| 1564 | |
| 1565 void Assembler::leal(Register dst, Address src) { | |
| 1566 InstructionMark im(this); | |
| 1567 #ifdef _LP64 | |
|
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1568 emit_int8(0x67); // addr32 |
| 304 | 1569 prefix(src, dst); |
| 1570 #endif // LP64 | |
|
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1571 emit_int8((unsigned char)0x8D); |
| 304 | 1572 emit_operand(dst, src); |
| 1573 } | |
| 1574 | |
|
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1575 void Assembler::lfence() { |
|
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1576 emit_int8(0x0F); |
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1577 emit_int8((unsigned char)0xAE); |
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1578 emit_int8((unsigned char)0xE8); |
|
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1579 } |
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1580 |
| 304 | 1581 void Assembler::lock() { |
|
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1582 emit_int8((unsigned char)0xF0); |
| 304 | 1583 } |
| 1584 | |
|
775
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1585 void Assembler::lzcntl(Register dst, Register src) { |
|
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1586 assert(VM_Version::supports_lzcnt(), "encoding is treated as BSR"); |
|
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|
1587 emit_int8((unsigned char)0xF3); |
|
775
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|
1588 int encode = prefix_and_encode(dst->encoding(), src->encoding()); |
|
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|
1589 emit_int8(0x0F); |
|
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1590 emit_int8((unsigned char)0xBD); |
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1591 emit_int8((unsigned char)(0xC0 | encode)); |
|
775
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|
1592 } |
|
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1593 |
|
671
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|
1594 // Emit mfence instruction |
| 304 | 1595 void Assembler::mfence() { |
|
671
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|
1596 NOT_LP64(assert(VM_Version::supports_sse2(), "unsupported");) |
|
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1597 emit_int8(0x0F); |
|
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|
1598 emit_int8((unsigned char)0xAE); |
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|
1599 emit_int8((unsigned char)0xF0); |
| 304 | 1600 } |
| 1601 | |
| 1602 void Assembler::mov(Register dst, Register src) { | |
| 1603 LP64_ONLY(movq(dst, src)) NOT_LP64(movl(dst, src)); | |
| 1604 } | |
| 1605 | |
| 1606 void Assembler::movapd(XMMRegister dst, XMMRegister src) { | |
| 1607 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
|
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1608 emit_simd_arith_nonds(0x28, dst, src, VEX_SIMD_66); |
| 304 | 1609 } |
| 1610 | |
| 1611 void Assembler::movaps(XMMRegister dst, XMMRegister src) { | |
| 1612 NOT_LP64(assert(VM_Version::supports_sse(), "")); | |
|
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1613 emit_simd_arith_nonds(0x28, dst, src, VEX_SIMD_NONE); |
| 304 | 1614 } |
| 1615 | |
|
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1616 void Assembler::movlhps(XMMRegister dst, XMMRegister src) { |
|
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|
1617 NOT_LP64(assert(VM_Version::supports_sse(), "")); |
|
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1618 int encode = simd_prefix_and_encode(dst, src, src, VEX_SIMD_NONE); |
|
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|
1619 emit_int8(0x16); |
|
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|
1620 emit_int8((unsigned char)(0xC0 | encode)); |
|
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1621 } |
|
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1622 |
| 304 | 1623 void Assembler::movb(Register dst, Address src) { |
| 1624 NOT_LP64(assert(dst->has_byte_register(), "must have byte register")); | |
| 1625 InstructionMark im(this); | |
| 1626 prefix(src, dst, true); | |
|
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|
1627 emit_int8((unsigned char)0x8A); |
| 304 | 1628 emit_operand(dst, src); |
| 1629 } | |
| 1630 | |
| 1631 | |
| 1632 void Assembler::movb(Address dst, int imm8) { | |
| 1633 InstructionMark im(this); | |
| 1634 prefix(dst); | |
|
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|
1635 emit_int8((unsigned char)0xC6); |
| 304 | 1636 emit_operand(rax, dst, 1); |
|
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|
1637 emit_int8(imm8); |
| 304 | 1638 } |
| 1639 | |
| 1640 | |
| 1641 void Assembler::movb(Address dst, Register src) { | |
| 1642 assert(src->has_byte_register(), "must have byte register"); | |
| 1643 InstructionMark im(this); | |
| 1644 prefix(dst, src, true); | |
|
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|
1645 emit_int8((unsigned char)0x88); |
| 304 | 1646 emit_operand(src, dst); |
| 1647 } | |
| 1648 | |
| 1649 void Assembler::movdl(XMMRegister dst, Register src) { | |
| 1650 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
| 4759 | 1651 int encode = simd_prefix_and_encode(dst, src, VEX_SIMD_66); |
|
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|
1652 emit_int8(0x6E); |
|
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changeset
|
1653 emit_int8((unsigned char)(0xC0 | encode)); |
| 304 | 1654 } |
| 1655 | |
| 1656 void Assembler::movdl(Register dst, XMMRegister src) { | |
| 1657 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
| 1658 // swap src/dst to get correct prefix | |
| 4759 | 1659 int encode = simd_prefix_and_encode(src, dst, VEX_SIMD_66); |
|
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changeset
|
1660 emit_int8(0x7E); |
|
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|
1661 emit_int8((unsigned char)(0xC0 | encode)); |
| 304 | 1662 } |
| 1663 | |
|
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|
1664 void Assembler::movdl(XMMRegister dst, Address src) { |
|
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|
1665 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
|
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|
1666 InstructionMark im(this); |
| 4759 | 1667 simd_prefix(dst, src, VEX_SIMD_66); |
|
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|
1668 emit_int8(0x6E); |
|
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|
1669 emit_operand(dst, src); |
|
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|
1670 } |
|
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|
1671 |
|
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|
1672 void Assembler::movdl(Address dst, XMMRegister src) { |
|
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|
1673 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
|
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|
1674 InstructionMark im(this); |
|
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|
1675 simd_prefix(dst, src, VEX_SIMD_66); |
|
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|
1676 emit_int8(0x7E); |
|
6179
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changeset
|
1677 emit_operand(src, dst); |
|
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|
1678 } |
|
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|
1679 |
| 304 | 1680 void Assembler::movdqa(XMMRegister dst, XMMRegister src) { |
| 1681 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
|
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|
1682 emit_simd_arith_nonds(0x6F, dst, src, VEX_SIMD_66); |
| 304 | 1683 } |
| 1684 | |
|
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|
1685 void Assembler::movdqa(XMMRegister dst, Address src) { |
|
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|
1686 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
|
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|
1687 emit_simd_arith_nonds(0x6F, dst, src, VEX_SIMD_66); |
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1688 } |
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1689 |
| 405 | 1690 void Assembler::movdqu(XMMRegister dst, Address src) { |
| 1691 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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1692 emit_simd_arith_nonds(0x6F, dst, src, VEX_SIMD_F3); |
| 405 | 1693 } |
| 1694 | |
| 1695 void Assembler::movdqu(XMMRegister dst, XMMRegister src) { | |
| 1696 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
|
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1697 emit_simd_arith_nonds(0x6F, dst, src, VEX_SIMD_F3); |
| 405 | 1698 } |
| 1699 | |
| 1700 void Assembler::movdqu(Address dst, XMMRegister src) { | |
| 1701 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
| 1702 InstructionMark im(this); | |
| 4759 | 1703 simd_prefix(dst, src, VEX_SIMD_F3); |
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1704 emit_int8(0x7F); |
| 405 | 1705 emit_operand(src, dst); |
| 1706 } | |
| 1707 | |
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1708 // Move Unaligned 256bit Vector |
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1709 void Assembler::vmovdqu(XMMRegister dst, XMMRegister src) { |
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1710 assert(UseAVX, ""); |
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1711 bool vector256 = true; |
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1712 int encode = vex_prefix_and_encode(dst, xnoreg, src, VEX_SIMD_F3, vector256); |
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1713 emit_int8(0x6F); |
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1714 emit_int8((unsigned char)(0xC0 | encode)); |
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1715 } |
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1716 |
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1717 void Assembler::vmovdqu(XMMRegister dst, Address src) { |
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1718 assert(UseAVX, ""); |
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1719 InstructionMark im(this); |
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1720 bool vector256 = true; |
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1721 vex_prefix(dst, xnoreg, src, VEX_SIMD_F3, vector256); |
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1722 emit_int8(0x6F); |
|
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1723 emit_operand(dst, src); |
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1724 } |
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1725 |
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1726 void Assembler::vmovdqu(Address dst, XMMRegister src) { |
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1727 assert(UseAVX, ""); |
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1728 InstructionMark im(this); |
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1729 bool vector256 = true; |
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1730 // swap src<->dst for encoding |
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1731 assert(src != xnoreg, "sanity"); |
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1732 vex_prefix(src, xnoreg, dst, VEX_SIMD_F3, vector256); |
|
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1733 emit_int8(0x7F); |
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1734 emit_operand(src, dst); |
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1735 } |
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1736 |
| 304 | 1737 // Uses zero extension on 64bit |
| 1738 | |
| 1739 void Assembler::movl(Register dst, int32_t imm32) { | |
| 1740 int encode = prefix_and_encode(dst->encoding()); | |
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1741 emit_int8((unsigned char)(0xB8 | encode)); |
|
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1742 emit_int32(imm32); |
| 304 | 1743 } |
| 1744 | |
| 1745 void Assembler::movl(Register dst, Register src) { | |
| 1746 int encode = prefix_and_encode(dst->encoding(), src->encoding()); | |
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1747 emit_int8((unsigned char)0x8B); |
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1748 emit_int8((unsigned char)(0xC0 | encode)); |
| 304 | 1749 } |
| 1750 | |
| 1751 void Assembler::movl(Register dst, Address src) { | |
| 1752 InstructionMark im(this); | |
| 1753 prefix(src, dst); | |
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1754 emit_int8((unsigned char)0x8B); |
| 304 | 1755 emit_operand(dst, src); |
| 1756 } | |
| 1757 | |
| 1758 void Assembler::movl(Address dst, int32_t imm32) { | |
| 1759 InstructionMark im(this); | |
| 1760 prefix(dst); | |
|
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1761 emit_int8((unsigned char)0xC7); |
| 304 | 1762 emit_operand(rax, dst, 4); |
|
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1763 emit_int32(imm32); |
| 304 | 1764 } |
| 1765 | |
| 1766 void Assembler::movl(Address dst, Register src) { | |
| 1767 InstructionMark im(this); | |
| 1768 prefix(dst, src); | |
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1769 emit_int8((unsigned char)0x89); |
| 304 | 1770 emit_operand(src, dst); |
| 1771 } | |
| 1772 | |
| 1773 // New cpus require to use movsd and movss to avoid partial register stall | |
| 1774 // when loading from memory. But for old Opteron use movlpd instead of movsd. | |
| 1775 // The selection is done in MacroAssembler::movdbl() and movflt(). | |
| 1776 void Assembler::movlpd(XMMRegister dst, Address src) { | |
| 1777 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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1778 emit_simd_arith(0x12, dst, src, VEX_SIMD_66); |
| 304 | 1779 } |
| 1780 | |
| 1781 void Assembler::movq( MMXRegister dst, Address src ) { | |
| 1782 assert( VM_Version::supports_mmx(), "" ); | |
|
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1783 emit_int8(0x0F); |
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1784 emit_int8(0x6F); |
| 304 | 1785 emit_operand(dst, src); |
| 1786 } | |
| 1787 | |
| 1788 void Assembler::movq( Address dst, MMXRegister src ) { | |
| 1789 assert( VM_Version::supports_mmx(), "" ); | |
|
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1790 emit_int8(0x0F); |
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1791 emit_int8(0x7F); |
| 304 | 1792 // workaround gcc (3.2.1-7a) bug |
| 1793 // In that version of gcc with only an emit_operand(MMX, Address) | |
| 1794 // gcc will tail jump and try and reverse the parameters completely | |
| 1795 // obliterating dst in the process. By having a version available | |
| 1796 // that doesn't need to swap the args at the tail jump the bug is | |
| 1797 // avoided. | |
| 1798 emit_operand(dst, src); | |
| 1799 } | |
| 1800 | |
| 1801 void Assembler::movq(XMMRegister dst, Address src) { | |
| 1802 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
| 1803 InstructionMark im(this); | |
| 4759 | 1804 simd_prefix(dst, src, VEX_SIMD_F3); |
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1805 emit_int8(0x7E); |
| 304 | 1806 emit_operand(dst, src); |
| 1807 } | |
| 1808 | |
| 1809 void Assembler::movq(Address dst, XMMRegister src) { | |
| 1810 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
| 1811 InstructionMark im(this); | |
| 4759 | 1812 simd_prefix(dst, src, VEX_SIMD_66); |
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1813 emit_int8((unsigned char)0xD6); |
| 304 | 1814 emit_operand(src, dst); |
| 1815 } | |
| 1816 | |
| 1817 void Assembler::movsbl(Register dst, Address src) { // movsxb | |
| 1818 InstructionMark im(this); | |
| 1819 prefix(src, dst); | |
|
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1820 emit_int8(0x0F); |
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1821 emit_int8((unsigned char)0xBE); |
| 304 | 1822 emit_operand(dst, src); |
| 1823 } | |
| 1824 | |
| 1825 void Assembler::movsbl(Register dst, Register src) { // movsxb | |
| 1826 NOT_LP64(assert(src->has_byte_register(), "must have byte register")); | |
|
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1827 int encode = prefix_and_encode(dst->encoding(), false, src->encoding(), true); |
|
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1828 emit_int8(0x0F); |
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1829 emit_int8((unsigned char)0xBE); |
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1830 emit_int8((unsigned char)(0xC0 | encode)); |
| 304 | 1831 } |
| 1832 | |
| 1833 void Assembler::movsd(XMMRegister dst, XMMRegister src) { | |
| 1834 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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1835 emit_simd_arith(0x10, dst, src, VEX_SIMD_F2); |
| 304 | 1836 } |
| 1837 | |
| 1838 void Assembler::movsd(XMMRegister dst, Address src) { | |
| 1839 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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1840 emit_simd_arith_nonds(0x10, dst, src, VEX_SIMD_F2); |
| 304 | 1841 } |
| 1842 | |
| 1843 void Assembler::movsd(Address dst, XMMRegister src) { | |
| 1844 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
| 1845 InstructionMark im(this); | |
| 4759 | 1846 simd_prefix(dst, src, VEX_SIMD_F2); |
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|
1847 emit_int8(0x11); |
| 304 | 1848 emit_operand(src, dst); |
| 1849 } | |
| 1850 | |
| 1851 void Assembler::movss(XMMRegister dst, XMMRegister src) { | |
| 1852 NOT_LP64(assert(VM_Version::supports_sse(), "")); | |
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1853 emit_simd_arith(0x10, dst, src, VEX_SIMD_F3); |
| 304 | 1854 } |
| 1855 | |
| 1856 void Assembler::movss(XMMRegister dst, Address src) { | |
| 1857 NOT_LP64(assert(VM_Version::supports_sse(), "")); | |
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1858 emit_simd_arith_nonds(0x10, dst, src, VEX_SIMD_F3); |
| 304 | 1859 } |
| 1860 | |
| 1861 void Assembler::movss(Address dst, XMMRegister src) { | |
| 1862 NOT_LP64(assert(VM_Version::supports_sse(), "")); | |
| 1863 InstructionMark im(this); | |
| 4759 | 1864 simd_prefix(dst, src, VEX_SIMD_F3); |
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|
1865 emit_int8(0x11); |
| 304 | 1866 emit_operand(src, dst); |
| 1867 } | |
| 1868 | |
| 1869 void Assembler::movswl(Register dst, Address src) { // movsxw | |
| 1870 InstructionMark im(this); | |
| 1871 prefix(src, dst); | |
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1872 emit_int8(0x0F); |
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1873 emit_int8((unsigned char)0xBF); |
| 304 | 1874 emit_operand(dst, src); |
| 1875 } | |
| 1876 | |
| 1877 void Assembler::movswl(Register dst, Register src) { // movsxw | |
| 1878 int encode = prefix_and_encode(dst->encoding(), src->encoding()); | |
|
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1879 emit_int8(0x0F); |
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1880 emit_int8((unsigned char)0xBF); |
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|
1881 emit_int8((unsigned char)(0xC0 | encode)); |
| 304 | 1882 } |
| 1883 | |
| 1884 void Assembler::movw(Address dst, int imm16) { | |
| 1885 InstructionMark im(this); | |
| 1886 | |
|
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|
1887 emit_int8(0x66); // switch to 16-bit mode |
| 304 | 1888 prefix(dst); |
|
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1889 emit_int8((unsigned char)0xC7); |
| 304 | 1890 emit_operand(rax, dst, 2); |
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1891 emit_int16(imm16); |
| 304 | 1892 } |
| 1893 | |
| 1894 void Assembler::movw(Register dst, Address src) { | |
| 1895 InstructionMark im(this); | |
|
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1896 emit_int8(0x66); |
| 304 | 1897 prefix(src, dst); |
|
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|
1898 emit_int8((unsigned char)0x8B); |
| 304 | 1899 emit_operand(dst, src); |
| 1900 } | |
| 1901 | |
| 1902 void Assembler::movw(Address dst, Register src) { | |
| 1903 InstructionMark im(this); | |
|
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1904 emit_int8(0x66); |
| 304 | 1905 prefix(dst, src); |
|
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|
1906 emit_int8((unsigned char)0x89); |
| 304 | 1907 emit_operand(src, dst); |
| 1908 } | |
| 1909 | |
| 1910 void Assembler::movzbl(Register dst, Address src) { // movzxb | |
| 1911 InstructionMark im(this); | |
| 1912 prefix(src, dst); | |
|
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1913 emit_int8(0x0F); |
|
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1914 emit_int8((unsigned char)0xB6); |
| 304 | 1915 emit_operand(dst, src); |
| 1916 } | |
| 1917 | |
| 1918 void Assembler::movzbl(Register dst, Register src) { // movzxb | |
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1919 #ifdef _LP64 |
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1920 // Requires the REX.W prefix to be able to access source register rsi and rdi |
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1921 int encode = prefixq_and_encode(dst->encoding(), src->encoding()); |
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1922 #else |
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1923 assert(src->has_byte_register(), "must have byte register"); |
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1924 int encode = prefix_and_encode(dst->encoding(), src->encoding()); |
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1925 #endif |
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1926 emit_int8(0x0F); |
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1927 emit_int8((unsigned char)0xB6); |
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1928 emit_int8(0xC0 | encode); |
| 304 | 1929 } |
| 1930 | |
| 1931 void Assembler::movzwl(Register dst, Address src) { // movzxw | |
| 1932 InstructionMark im(this); | |
| 1933 prefix(src, dst); | |
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1934 emit_int8(0x0F); |
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1935 emit_int8((unsigned char)0xB7); |
| 304 | 1936 emit_operand(dst, src); |
| 1937 } | |
| 1938 | |
| 1939 void Assembler::movzwl(Register dst, Register src) { // movzxw | |
| 1940 int encode = prefix_and_encode(dst->encoding(), src->encoding()); | |
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1941 emit_int8(0x0F); |
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1942 emit_int8((unsigned char)0xB7); |
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1943 emit_int8(0xC0 | encode); |
| 304 | 1944 } |
| 1945 | |
| 1946 void Assembler::mull(Address src) { | |
| 1947 InstructionMark im(this); | |
| 1948 prefix(src); | |
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1949 emit_int8((unsigned char)0xF7); |
| 304 | 1950 emit_operand(rsp, src); |
| 1951 } | |
| 1952 | |
| 1953 void Assembler::mull(Register src) { | |
| 1954 int encode = prefix_and_encode(src->encoding()); | |
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1955 emit_int8((unsigned char)0xF7); |
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1956 emit_int8((unsigned char)(0xE0 | encode)); |
| 304 | 1957 } |
| 1958 | |
| 1959 void Assembler::mulsd(XMMRegister dst, Address src) { | |
| 1960 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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1961 emit_simd_arith(0x59, dst, src, VEX_SIMD_F2); |
| 304 | 1962 } |
| 1963 | |
| 1964 void Assembler::mulsd(XMMRegister dst, XMMRegister src) { | |
| 1965 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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1966 emit_simd_arith(0x59, dst, src, VEX_SIMD_F2); |
| 304 | 1967 } |
| 1968 | |
| 1969 void Assembler::mulss(XMMRegister dst, Address src) { | |
| 1970 NOT_LP64(assert(VM_Version::supports_sse(), "")); | |
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1971 emit_simd_arith(0x59, dst, src, VEX_SIMD_F3); |
| 304 | 1972 } |
| 1973 | |
| 1974 void Assembler::mulss(XMMRegister dst, XMMRegister src) { | |
| 1975 NOT_LP64(assert(VM_Version::supports_sse(), "")); | |
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1976 emit_simd_arith(0x59, dst, src, VEX_SIMD_F3); |
| 304 | 1977 } |
| 1978 | |
| 1979 void Assembler::negl(Register dst) { | |
| 1980 int encode = prefix_and_encode(dst->encoding()); | |
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1981 emit_int8((unsigned char)0xF7); |
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1982 emit_int8((unsigned char)(0xD8 | encode)); |
| 304 | 1983 } |
| 1984 | |
| 0 | 1985 void Assembler::nop(int i) { |
| 304 | 1986 #ifdef ASSERT |
| 0 | 1987 assert(i > 0, " "); |
| 304 | 1988 // The fancy nops aren't currently recognized by debuggers making it a |
| 1989 // pain to disassemble code while debugging. If asserts are on clearly | |
| 1990 // speed is not an issue so simply use the single byte traditional nop | |
| 1991 // to do alignment. | |
| 1992 | |
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1993 for (; i > 0 ; i--) emit_int8((unsigned char)0x90); |
| 304 | 1994 return; |
| 1995 | |
| 1996 #endif // ASSERT | |
| 1997 | |
| 0 | 1998 if (UseAddressNop && VM_Version::is_intel()) { |
| 1999 // | |
| 2000 // Using multi-bytes nops "0x0F 0x1F [address]" for Intel | |
| 2001 // 1: 0x90 | |
| 2002 // 2: 0x66 0x90 | |
| 2003 // 3: 0x66 0x66 0x90 (don't use "0x0F 0x1F 0x00" - need patching safe padding) | |
| 2004 // 4: 0x0F 0x1F 0x40 0x00 | |
| 2005 // 5: 0x0F 0x1F 0x44 0x00 0x00 | |
| 2006 // 6: 0x66 0x0F 0x1F 0x44 0x00 0x00 | |
| 2007 // 7: 0x0F 0x1F 0x80 0x00 0x00 0x00 0x00 | |
| 2008 // 8: 0x0F 0x1F 0x84 0x00 0x00 0x00 0x00 0x00 | |
| 2009 // 9: 0x66 0x0F 0x1F 0x84 0x00 0x00 0x00 0x00 0x00 | |
| 2010 // 10: 0x66 0x66 0x0F 0x1F 0x84 0x00 0x00 0x00 0x00 0x00 | |
| 2011 // 11: 0x66 0x66 0x66 0x0F 0x1F 0x84 0x00 0x00 0x00 0x00 0x00 | |
| 2012 | |
| 2013 // The rest coding is Intel specific - don't use consecutive address nops | |
| 2014 | |
| 2015 // 12: 0x0F 0x1F 0x84 0x00 0x00 0x00 0x00 0x00 0x66 0x66 0x66 0x90 | |
| 2016 // 13: 0x66 0x0F 0x1F 0x84 0x00 0x00 0x00 0x00 0x00 0x66 0x66 0x66 0x90 | |
| 2017 // 14: 0x66 0x66 0x0F 0x1F 0x84 0x00 0x00 0x00 0x00 0x00 0x66 0x66 0x66 0x90 | |
| 2018 // 15: 0x66 0x66 0x66 0x0F 0x1F 0x84 0x00 0x00 0x00 0x00 0x00 0x66 0x66 0x66 0x90 | |
| 2019 | |
| 2020 while(i >= 15) { | |
| 2021 // For Intel don't generate consecutive addess nops (mix with regular nops) | |
| 2022 i -= 15; | |
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2023 emit_int8(0x66); // size prefix |
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2024 emit_int8(0x66); // size prefix |
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2025 emit_int8(0x66); // size prefix |
| 0 | 2026 addr_nop_8(); |
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2027 emit_int8(0x66); // size prefix |
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2028 emit_int8(0x66); // size prefix |
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2029 emit_int8(0x66); // size prefix |
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2030 emit_int8((unsigned char)0x90); |
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2031 // nop |
| 0 | 2032 } |
| 2033 switch (i) { | |
| 2034 case 14: | |
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2035 emit_int8(0x66); // size prefix |
| 0 | 2036 case 13: |
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2037 emit_int8(0x66); // size prefix |
| 0 | 2038 case 12: |
| 2039 addr_nop_8(); | |
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2040 emit_int8(0x66); // size prefix |
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2041 emit_int8(0x66); // size prefix |
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2042 emit_int8(0x66); // size prefix |
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2043 emit_int8((unsigned char)0x90); |
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2044 // nop |
| 0 | 2045 break; |
| 2046 case 11: | |
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2047 emit_int8(0x66); // size prefix |
| 0 | 2048 case 10: |
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2049 emit_int8(0x66); // size prefix |
| 0 | 2050 case 9: |
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2051 emit_int8(0x66); // size prefix |
| 0 | 2052 case 8: |
| 2053 addr_nop_8(); | |
| 2054 break; | |
| 2055 case 7: | |
| 2056 addr_nop_7(); | |
| 2057 break; | |
| 2058 case 6: | |
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2059 emit_int8(0x66); // size prefix |
| 0 | 2060 case 5: |
| 2061 addr_nop_5(); | |
| 2062 break; | |
| 2063 case 4: | |
| 2064 addr_nop_4(); | |
| 2065 break; | |
| 2066 case 3: | |
| 2067 // Don't use "0x0F 0x1F 0x00" - need patching safe padding | |
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2068 emit_int8(0x66); // size prefix |
| 0 | 2069 case 2: |
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2070 emit_int8(0x66); // size prefix |
| 0 | 2071 case 1: |
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2072 emit_int8((unsigned char)0x90); |
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2073 // nop |
| 0 | 2074 break; |
| 2075 default: | |
| 2076 assert(i == 0, " "); | |
| 2077 } | |
| 2078 return; | |
| 2079 } | |
| 2080 if (UseAddressNop && VM_Version::is_amd()) { | |
| 2081 // | |
| 2082 // Using multi-bytes nops "0x0F 0x1F [address]" for AMD. | |
| 2083 // 1: 0x90 | |
| 2084 // 2: 0x66 0x90 | |
| 2085 // 3: 0x66 0x66 0x90 (don't use "0x0F 0x1F 0x00" - need patching safe padding) | |
| 2086 // 4: 0x0F 0x1F 0x40 0x00 | |
| 2087 // 5: 0x0F 0x1F 0x44 0x00 0x00 | |
| 2088 // 6: 0x66 0x0F 0x1F 0x44 0x00 0x00 | |
| 2089 // 7: 0x0F 0x1F 0x80 0x00 0x00 0x00 0x00 | |
| 2090 // 8: 0x0F 0x1F 0x84 0x00 0x00 0x00 0x00 0x00 | |
| 2091 // 9: 0x66 0x0F 0x1F 0x84 0x00 0x00 0x00 0x00 0x00 | |
| 2092 // 10: 0x66 0x66 0x0F 0x1F 0x84 0x00 0x00 0x00 0x00 0x00 | |
| 2093 // 11: 0x66 0x66 0x66 0x0F 0x1F 0x84 0x00 0x00 0x00 0x00 0x00 | |
| 2094 | |
| 2095 // The rest coding is AMD specific - use consecutive address nops | |
| 2096 | |
| 2097 // 12: 0x66 0x0F 0x1F 0x44 0x00 0x00 0x66 0x0F 0x1F 0x44 0x00 0x00 | |
| 2098 // 13: 0x0F 0x1F 0x80 0x00 0x00 0x00 0x00 0x66 0x0F 0x1F 0x44 0x00 0x00 | |
| 2099 // 14: 0x0F 0x1F 0x80 0x00 0x00 0x00 0x00 0x0F 0x1F 0x80 0x00 0x00 0x00 0x00 | |
| 2100 // 15: 0x0F 0x1F 0x84 0x00 0x00 0x00 0x00 0x00 0x0F 0x1F 0x80 0x00 0x00 0x00 0x00 | |
| 2101 // 16: 0x0F 0x1F 0x84 0x00 0x00 0x00 0x00 0x00 0x0F 0x1F 0x84 0x00 0x00 0x00 0x00 0x00 | |
| 2102 // Size prefixes (0x66) are added for larger sizes | |
| 2103 | |
| 2104 while(i >= 22) { | |
| 2105 i -= 11; | |
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2106 emit_int8(0x66); // size prefix |
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2107 emit_int8(0x66); // size prefix |
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2108 emit_int8(0x66); // size prefix |
| 0 | 2109 addr_nop_8(); |
| 2110 } | |
| 2111 // Generate first nop for size between 21-12 | |
| 2112 switch (i) { | |
| 2113 case 21: | |
| 2114 i -= 1; | |
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2115 emit_int8(0x66); // size prefix |
| 0 | 2116 case 20: |
| 2117 case 19: | |
| 2118 i -= 1; | |
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2119 emit_int8(0x66); // size prefix |
| 0 | 2120 case 18: |
| 2121 case 17: | |
| 2122 i -= 1; | |
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2123 emit_int8(0x66); // size prefix |
| 0 | 2124 case 16: |
| 2125 case 15: | |
| 2126 i -= 8; | |
| 2127 addr_nop_8(); | |
| 2128 break; | |
| 2129 case 14: | |
| 2130 case 13: | |
| 2131 i -= 7; | |
| 2132 addr_nop_7(); | |
| 2133 break; | |
| 2134 case 12: | |
| 2135 i -= 6; | |
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2136 emit_int8(0x66); // size prefix |
| 0 | 2137 addr_nop_5(); |
| 2138 break; | |
| 2139 default: | |
| 2140 assert(i < 12, " "); | |
| 2141 } | |
| 2142 | |
| 2143 // Generate second nop for size between 11-1 | |
| 2144 switch (i) { | |
| 2145 case 11: | |
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2146 emit_int8(0x66); // size prefix |
| 0 | 2147 case 10: |
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2148 emit_int8(0x66); // size prefix |
| 0 | 2149 case 9: |
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2150 emit_int8(0x66); // size prefix |
| 0 | 2151 case 8: |
| 2152 addr_nop_8(); | |
| 2153 break; | |
| 2154 case 7: | |
| 2155 addr_nop_7(); | |
| 2156 break; | |
| 2157 case 6: | |
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2158 emit_int8(0x66); // size prefix |
| 0 | 2159 case 5: |
| 2160 addr_nop_5(); | |
| 2161 break; | |
| 2162 case 4: | |
| 2163 addr_nop_4(); | |
| 2164 break; | |
| 2165 case 3: | |
| 2166 // Don't use "0x0F 0x1F 0x00" - need patching safe padding | |
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2167 emit_int8(0x66); // size prefix |
| 0 | 2168 case 2: |
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|
2169 emit_int8(0x66); // size prefix |
| 0 | 2170 case 1: |
|
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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|
2171 emit_int8((unsigned char)0x90); |
|
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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|
2172 // nop |
| 0 | 2173 break; |
| 2174 default: | |
| 2175 assert(i == 0, " "); | |
| 2176 } | |
| 2177 return; | |
| 2178 } | |
| 2179 | |
| 2180 // Using nops with size prefixes "0x66 0x90". | |
| 2181 // From AMD Optimization Guide: | |
| 2182 // 1: 0x90 | |
| 2183 // 2: 0x66 0x90 | |
| 2184 // 3: 0x66 0x66 0x90 | |
| 2185 // 4: 0x66 0x66 0x66 0x90 | |
| 2186 // 5: 0x66 0x66 0x90 0x66 0x90 | |
| 2187 // 6: 0x66 0x66 0x90 0x66 0x66 0x90 | |
| 2188 // 7: 0x66 0x66 0x66 0x90 0x66 0x66 0x90 | |
| 2189 // 8: 0x66 0x66 0x66 0x90 0x66 0x66 0x66 0x90 | |
| 2190 // 9: 0x66 0x66 0x90 0x66 0x66 0x90 0x66 0x66 0x90 | |
| 2191 // 10: 0x66 0x66 0x66 0x90 0x66 0x66 0x90 0x66 0x66 0x90 | |
| 2192 // | |
| 2193 while(i > 12) { | |
| 2194 i -= 4; | |
|
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|
2195 emit_int8(0x66); // size prefix |
|
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diff
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|
2196 emit_int8(0x66); |
|
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|
2197 emit_int8(0x66); |
|
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|
2198 emit_int8((unsigned char)0x90); |
|
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changeset
|
2199 // nop |
| 0 | 2200 } |
| 2201 // 1 - 12 nops | |
| 2202 if(i > 8) { | |
| 2203 if(i > 9) { | |
| 2204 i -= 1; | |
|
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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|
2205 emit_int8(0x66); |
| 0 | 2206 } |
| 2207 i -= 3; | |
|
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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changeset
|
2208 emit_int8(0x66); |
|
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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|
2209 emit_int8(0x66); |
|
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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changeset
|
2210 emit_int8((unsigned char)0x90); |
| 0 | 2211 } |
| 2212 // 1 - 8 nops | |
| 2213 if(i > 4) { | |
| 2214 if(i > 6) { | |
| 2215 i -= 1; | |
|
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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changeset
|
2216 emit_int8(0x66); |
| 0 | 2217 } |
| 2218 i -= 3; | |
|
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d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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changeset
|
2219 emit_int8(0x66); |
|
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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changeset
|
2220 emit_int8(0x66); |
|
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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changeset
|
2221 emit_int8((unsigned char)0x90); |
| 0 | 2222 } |
| 2223 switch (i) { | |
| 2224 case 4: | |
|
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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changeset
|
2225 emit_int8(0x66); |
| 0 | 2226 case 3: |
|
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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changeset
|
2227 emit_int8(0x66); |
| 0 | 2228 case 2: |
|
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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changeset
|
2229 emit_int8(0x66); |
| 0 | 2230 case 1: |
|
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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diff
changeset
|
2231 emit_int8((unsigned char)0x90); |
| 0 | 2232 break; |
| 2233 default: | |
| 2234 assert(i == 0, " "); | |
| 2235 } | |
| 2236 } | |
| 2237 | |
| 304 | 2238 void Assembler::notl(Register dst) { |
| 2239 int encode = prefix_and_encode(dst->encoding()); | |
|
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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changeset
|
2240 emit_int8((unsigned char)0xF7); |
|
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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changeset
|
2241 emit_int8((unsigned char)(0xD0 | encode)); |
| 304 | 2242 } |
| 2243 | |
| 2244 void Assembler::orl(Address dst, int32_t imm32) { | |
| 2245 InstructionMark im(this); | |
| 2246 prefix(dst); | |
|
2100
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7003271: Hotspot should track cumulative Java heap bytes allocated on a per-thread basis
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diff
changeset
|
2247 emit_arith_operand(0x81, rcx, dst, imm32); |
| 304 | 2248 } |
| 2249 | |
| 2250 void Assembler::orl(Register dst, int32_t imm32) { | |
| 2251 prefix(dst); | |
| 2252 emit_arith(0x81, 0xC8, dst, imm32); | |
| 2253 } | |
| 2254 | |
| 2255 void Assembler::orl(Register dst, Address src) { | |
| 2256 InstructionMark im(this); | |
| 2257 prefix(src, dst); | |
|
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changeset
|
2258 emit_int8(0x0B); |
| 304 | 2259 emit_operand(dst, src); |
| 2260 } | |
| 2261 | |
| 2262 void Assembler::orl(Register dst, Register src) { | |
| 2263 (void) prefix_and_encode(dst->encoding(), src->encoding()); | |
| 2264 emit_arith(0x0B, 0xC0, dst, src); | |
| 2265 } | |
| 2266 | |
| 4759 | 2267 void Assembler::packuswb(XMMRegister dst, Address src) { |
| 2268 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
| 2269 assert((UseAVX > 0), "SSE mode requires address alignment 16 bytes"); | |
|
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changeset
|
2270 emit_simd_arith(0x67, dst, src, VEX_SIMD_66); |
| 4759 | 2271 } |
| 2272 | |
| 2273 void Assembler::packuswb(XMMRegister dst, XMMRegister src) { | |
| 2274 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
|
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|
2275 emit_simd_arith(0x67, dst, src, VEX_SIMD_66); |
| 4759 | 2276 } |
| 2277 | |
|
7637
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changeset
|
2278 void Assembler::vpackuswb(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
|
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6896617: Optimize sun.nio.cs.ISO_8859_1$Encode.encodeArrayLoop() on x86
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|
2279 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
|
b30b3c2a0cf2
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changeset
|
2280 emit_vex_arith(0x67, dst, nds, src, VEX_SIMD_66, vector256); |
|
b30b3c2a0cf2
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|
2281 } |
|
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|
2282 |
|
b30b3c2a0cf2
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|
2283 void Assembler::vpermq(XMMRegister dst, XMMRegister src, int imm8, bool vector256) { |
|
8042
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changeset
|
2284 assert(VM_Version::supports_avx2(), ""); |
|
91a23b11d8dc
8007708: compiler/6855215 assert(VM_Version::supports_sse4_2())
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changeset
|
2285 int encode = simd_prefix_and_encode(dst, xnoreg, src, VEX_SIMD_66, VEX_OPCODE_0F_3A, true, vector256); |
|
91a23b11d8dc
8007708: compiler/6855215 assert(VM_Version::supports_sse4_2())
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changeset
|
2286 emit_int8(0x00); |
|
91a23b11d8dc
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changeset
|
2287 emit_int8(0xC0 | encode); |
|
91a23b11d8dc
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|
2288 emit_int8(imm8); |
|
7637
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|
2289 } |
|
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|
2290 |
| 681 | 2291 void Assembler::pcmpestri(XMMRegister dst, Address src, int imm8) { |
| 2292 assert(VM_Version::supports_sse4_2(), ""); | |
| 4759 | 2293 InstructionMark im(this); |
| 2294 simd_prefix(dst, src, VEX_SIMD_66, VEX_OPCODE_0F_3A); | |
|
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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changeset
|
2295 emit_int8(0x61); |
| 681 | 2296 emit_operand(dst, src); |
|
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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changeset
|
2297 emit_int8(imm8); |
| 681 | 2298 } |
| 2299 | |
| 2300 void Assembler::pcmpestri(XMMRegister dst, XMMRegister src, int imm8) { | |
| 2301 assert(VM_Version::supports_sse4_2(), ""); | |
|
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changeset
|
2302 int encode = simd_prefix_and_encode(dst, xnoreg, src, VEX_SIMD_66, VEX_OPCODE_0F_3A); |
|
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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changeset
|
2303 emit_int8(0x61); |
|
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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changeset
|
2304 emit_int8((unsigned char)(0xC0 | encode)); |
|
d02120b7a34f
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changeset
|
2305 emit_int8(imm8); |
| 681 | 2306 } |
| 2307 | |
|
11080
b800986664f4
7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
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|
2308 void Assembler::pextrd(Register dst, XMMRegister src, int imm8) { |
|
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|
2309 assert(VM_Version::supports_sse4_1(), ""); |
|
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changeset
|
2310 int encode = simd_prefix_and_encode(as_XMMRegister(dst->encoding()), xnoreg, src, VEX_SIMD_66, VEX_OPCODE_0F_3A, false); |
|
b800986664f4
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changeset
|
2311 emit_int8(0x16); |
|
b800986664f4
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|
2312 emit_int8((unsigned char)(0xC0 | encode)); |
|
b800986664f4
7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
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changeset
|
2313 emit_int8(imm8); |
|
b800986664f4
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changeset
|
2314 } |
|
b800986664f4
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changeset
|
2315 |
|
b800986664f4
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|
2316 void Assembler::pextrq(Register dst, XMMRegister src, int imm8) { |
|
b800986664f4
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|
2317 assert(VM_Version::supports_sse4_1(), ""); |
|
b800986664f4
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changeset
|
2318 int encode = simd_prefix_and_encode(as_XMMRegister(dst->encoding()), xnoreg, src, VEX_SIMD_66, VEX_OPCODE_0F_3A, true); |
|
b800986664f4
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changeset
|
2319 emit_int8(0x16); |
|
b800986664f4
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changeset
|
2320 emit_int8((unsigned char)(0xC0 | encode)); |
|
b800986664f4
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changeset
|
2321 emit_int8(imm8); |
|
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|
2322 } |
|
b800986664f4
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|
2323 |
|
b800986664f4
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|
2324 void Assembler::pinsrd(XMMRegister dst, Register src, int imm8) { |
|
b800986664f4
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changeset
|
2325 assert(VM_Version::supports_sse4_1(), ""); |
|
b800986664f4
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9060
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changeset
|
2326 int encode = simd_prefix_and_encode(dst, dst, as_XMMRegister(src->encoding()), VEX_SIMD_66, VEX_OPCODE_0F_3A, false); |
|
b800986664f4
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changeset
|
2327 emit_int8(0x22); |
|
b800986664f4
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diff
changeset
|
2328 emit_int8((unsigned char)(0xC0 | encode)); |
|
b800986664f4
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changeset
|
2329 emit_int8(imm8); |
|
b800986664f4
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|
2330 } |
|
b800986664f4
7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
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|
2331 |
|
b800986664f4
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|
2332 void Assembler::pinsrq(XMMRegister dst, Register src, int imm8) { |
|
b800986664f4
7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
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changeset
|
2333 assert(VM_Version::supports_sse4_1(), ""); |
|
b800986664f4
7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
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changeset
|
2334 int encode = simd_prefix_and_encode(dst, dst, as_XMMRegister(src->encoding()), VEX_SIMD_66, VEX_OPCODE_0F_3A, true); |
|
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7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
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changeset
|
2335 emit_int8(0x22); |
|
b800986664f4
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changeset
|
2336 emit_int8((unsigned char)(0xC0 | encode)); |
|
b800986664f4
7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
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changeset
|
2337 emit_int8(imm8); |
|
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changeset
|
2338 } |
|
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|
2339 |
| 4759 | 2340 void Assembler::pmovzxbw(XMMRegister dst, Address src) { |
| 2341 assert(VM_Version::supports_sse4_1(), ""); | |
| 2342 InstructionMark im(this); | |
| 2343 simd_prefix(dst, src, VEX_SIMD_66, VEX_OPCODE_0F_38); | |
|
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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changeset
|
2344 emit_int8(0x30); |
| 4759 | 2345 emit_operand(dst, src); |
| 2346 } | |
| 2347 | |
| 2348 void Assembler::pmovzxbw(XMMRegister dst, XMMRegister src) { | |
| 2349 assert(VM_Version::supports_sse4_1(), ""); | |
|
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changeset
|
2350 int encode = simd_prefix_and_encode(dst, xnoreg, src, VEX_SIMD_66, VEX_OPCODE_0F_38); |
|
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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changeset
|
2351 emit_int8(0x30); |
|
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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changeset
|
2352 emit_int8((unsigned char)(0xC0 | encode)); |
| 4759 | 2353 } |
| 2354 | |
| 304 | 2355 // generic |
| 2356 void Assembler::pop(Register dst) { | |
| 2357 int encode = prefix_and_encode(dst->encoding()); | |
|
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2358 emit_int8(0x58 | encode); |
| 304 | 2359 } |
| 2360 | |
|
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2361 void Assembler::popcntl(Register dst, Address src) { |
|
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|
2362 assert(VM_Version::supports_popcnt(), "must support"); |
|
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|
2363 InstructionMark im(this); |
|
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|
2364 emit_int8((unsigned char)0xF3); |
|
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|
2365 prefix(src, dst); |
|
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|
2366 emit_int8(0x0F); |
|
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|
2367 emit_int8((unsigned char)0xB8); |
|
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|
2368 emit_operand(dst, src); |
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|
2369 } |
|
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|
2370 |
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|
2371 void Assembler::popcntl(Register dst, Register src) { |
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|
2372 assert(VM_Version::supports_popcnt(), "must support"); |
|
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|
2373 emit_int8((unsigned char)0xF3); |
|
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|
2374 int encode = prefix_and_encode(dst->encoding(), src->encoding()); |
|
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|
2375 emit_int8(0x0F); |
|
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|
2376 emit_int8((unsigned char)0xB8); |
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|
2377 emit_int8((unsigned char)(0xC0 | encode)); |
|
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|
2378 } |
|
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|
2379 |
| 304 | 2380 void Assembler::popf() { |
|
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|
2381 emit_int8((unsigned char)0x9D); |
| 304 | 2382 } |
| 2383 | |
| 1060 | 2384 #ifndef _LP64 // no 32bit push/pop on amd64 |
| 304 | 2385 void Assembler::popl(Address dst) { |
| 2386 // NOTE: this will adjust stack by 8byte on 64bits | |
| 2387 InstructionMark im(this); | |
| 2388 prefix(dst); | |
|
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|
2389 emit_int8((unsigned char)0x8F); |
| 304 | 2390 emit_operand(rax, dst); |
| 2391 } | |
| 1060 | 2392 #endif |
| 304 | 2393 |
| 2394 void Assembler::prefetch_prefix(Address src) { | |
| 2395 prefix(src); | |
|
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|
2396 emit_int8(0x0F); |
| 304 | 2397 } |
| 2398 | |
| 2399 void Assembler::prefetchnta(Address src) { | |
|
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|
2400 NOT_LP64(assert(VM_Version::supports_sse(), "must support")); |
| 304 | 2401 InstructionMark im(this); |
| 2402 prefetch_prefix(src); | |
|
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|
2403 emit_int8(0x18); |
| 304 | 2404 emit_operand(rax, src); // 0, src |
| 2405 } | |
| 2406 | |
| 2407 void Assembler::prefetchr(Address src) { | |
| 3854 | 2408 assert(VM_Version::supports_3dnow_prefetch(), "must support"); |
| 304 | 2409 InstructionMark im(this); |
| 2410 prefetch_prefix(src); | |
|
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|
2411 emit_int8(0x0D); |
| 304 | 2412 emit_operand(rax, src); // 0, src |
| 2413 } | |
| 2414 | |
| 2415 void Assembler::prefetcht0(Address src) { | |
| 2416 NOT_LP64(assert(VM_Version::supports_sse(), "must support")); | |
| 2417 InstructionMark im(this); | |
| 2418 prefetch_prefix(src); | |
|
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changeset
|
2419 emit_int8(0x18); |
| 304 | 2420 emit_operand(rcx, src); // 1, src |
| 2421 } | |
| 2422 | |
| 2423 void Assembler::prefetcht1(Address src) { | |
| 2424 NOT_LP64(assert(VM_Version::supports_sse(), "must support")); | |
| 2425 InstructionMark im(this); | |
| 2426 prefetch_prefix(src); | |
|
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|
2427 emit_int8(0x18); |
| 304 | 2428 emit_operand(rdx, src); // 2, src |
| 2429 } | |
| 2430 | |
| 2431 void Assembler::prefetcht2(Address src) { | |
| 2432 NOT_LP64(assert(VM_Version::supports_sse(), "must support")); | |
| 2433 InstructionMark im(this); | |
| 2434 prefetch_prefix(src); | |
|
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changeset
|
2435 emit_int8(0x18); |
| 304 | 2436 emit_operand(rbx, src); // 3, src |
| 2437 } | |
| 2438 | |
| 2439 void Assembler::prefetchw(Address src) { | |
| 3854 | 2440 assert(VM_Version::supports_3dnow_prefetch(), "must support"); |
| 304 | 2441 InstructionMark im(this); |
| 2442 prefetch_prefix(src); | |
|
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|
2443 emit_int8(0x0D); |
| 304 | 2444 emit_operand(rcx, src); // 1, src |
| 2445 } | |
| 2446 | |
| 2447 void Assembler::prefix(Prefix p) { | |
|
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|
2448 emit_int8(p); |
| 304 | 2449 } |
| 2450 | |
| 6894 | 2451 void Assembler::pshufb(XMMRegister dst, XMMRegister src) { |
| 2452 assert(VM_Version::supports_ssse3(), ""); | |
| 2453 int encode = simd_prefix_and_encode(dst, dst, src, VEX_SIMD_66, VEX_OPCODE_0F_38); | |
|
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|
2454 emit_int8(0x00); |
|
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changeset
|
2455 emit_int8((unsigned char)(0xC0 | encode)); |
| 6894 | 2456 } |
| 2457 | |
| 2458 void Assembler::pshufb(XMMRegister dst, Address src) { | |
| 2459 assert(VM_Version::supports_ssse3(), ""); | |
| 2460 InstructionMark im(this); | |
| 2461 simd_prefix(dst, dst, src, VEX_SIMD_66, VEX_OPCODE_0F_38); | |
|
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changeset
|
2462 emit_int8(0x00); |
| 6894 | 2463 emit_operand(dst, src); |
| 2464 } | |
| 2465 | |
| 304 | 2466 void Assembler::pshufd(XMMRegister dst, XMMRegister src, int mode) { |
| 2467 assert(isByte(mode), "invalid value"); | |
| 2468 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
|
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|
2469 emit_simd_arith_nonds(0x70, dst, src, VEX_SIMD_66); |
|
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|
2470 emit_int8(mode & 0xFF); |
| 304 | 2471 |
| 2472 } | |
| 2473 | |
| 2474 void Assembler::pshufd(XMMRegister dst, Address src, int mode) { | |
| 2475 assert(isByte(mode), "invalid value"); | |
| 2476 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
| 4759 | 2477 assert((UseAVX > 0), "SSE mode requires address alignment 16 bytes"); |
| 2478 InstructionMark im(this); | |
| 2479 simd_prefix(dst, src, VEX_SIMD_66); | |
|
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|
2480 emit_int8(0x70); |
| 304 | 2481 emit_operand(dst, src); |
|
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changeset
|
2482 emit_int8(mode & 0xFF); |
| 304 | 2483 } |
| 2484 | |
| 2485 void Assembler::pshuflw(XMMRegister dst, XMMRegister src, int mode) { | |
| 2486 assert(isByte(mode), "invalid value"); | |
| 2487 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
|
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|
2488 emit_simd_arith_nonds(0x70, dst, src, VEX_SIMD_F2); |
|
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|
2489 emit_int8(mode & 0xFF); |
| 304 | 2490 } |
| 2491 | |
| 2492 void Assembler::pshuflw(XMMRegister dst, Address src, int mode) { | |
| 2493 assert(isByte(mode), "invalid value"); | |
| 2494 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
| 4759 | 2495 assert((UseAVX > 0), "SSE mode requires address alignment 16 bytes"); |
| 2496 InstructionMark im(this); | |
| 2497 simd_prefix(dst, src, VEX_SIMD_F2); | |
|
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changeset
|
2498 emit_int8(0x70); |
| 304 | 2499 emit_operand(dst, src); |
|
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|
2500 emit_int8(mode & 0xFF); |
| 304 | 2501 } |
| 2502 | |
|
2320
41d4973cf100
6942326: x86 code in string_indexof() could read beyond reserved heap space
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|
2503 void Assembler::psrldq(XMMRegister dst, int shift) { |
|
41d4973cf100
6942326: x86 code in string_indexof() could read beyond reserved heap space
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changeset
|
2504 // Shift 128 bit value in xmm register by number of bytes. |
|
41d4973cf100
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changeset
|
2505 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
| 4759 | 2506 int encode = simd_prefix_and_encode(xmm3, dst, dst, VEX_SIMD_66); |
|
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changeset
|
2507 emit_int8(0x73); |
|
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diff
changeset
|
2508 emit_int8((unsigned char)(0xC0 | encode)); |
|
d02120b7a34f
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diff
changeset
|
2509 emit_int8(shift); |
|
2320
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|
2510 } |
|
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|
2511 |
| 681 | 2512 void Assembler::ptest(XMMRegister dst, Address src) { |
| 2513 assert(VM_Version::supports_sse4_1(), ""); | |
| 4759 | 2514 assert((UseAVX > 0), "SSE mode requires address alignment 16 bytes"); |
| 2515 InstructionMark im(this); | |
| 2516 simd_prefix(dst, src, VEX_SIMD_66, VEX_OPCODE_0F_38); | |
|
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changeset
|
2517 emit_int8(0x17); |
| 681 | 2518 emit_operand(dst, src); |
| 2519 } | |
| 2520 | |
| 2521 void Assembler::ptest(XMMRegister dst, XMMRegister src) { | |
| 2522 assert(VM_Version::supports_sse4_1(), ""); | |
|
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|
2523 int encode = simd_prefix_and_encode(dst, xnoreg, src, VEX_SIMD_66, VEX_OPCODE_0F_38); |
|
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changeset
|
2524 emit_int8(0x17); |
|
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changeset
|
2525 emit_int8((unsigned char)(0xC0 | encode)); |
| 681 | 2526 } |
| 2527 | |
|
7477
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|
2528 void Assembler::vptest(XMMRegister dst, Address src) { |
|
038dd2875b94
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changeset
|
2529 assert(VM_Version::supports_avx(), ""); |
|
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changeset
|
2530 InstructionMark im(this); |
|
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changeset
|
2531 bool vector256 = true; |
|
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changeset
|
2532 assert(dst != xnoreg, "sanity"); |
|
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|
2533 int dst_enc = dst->encoding(); |
|
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changeset
|
2534 // swap src<->dst for encoding |
|
7637
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|
2535 vex_prefix(src, 0, dst_enc, VEX_SIMD_66, VEX_OPCODE_0F_38, false, vector256); |
|
7477
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|
2536 emit_int8(0x17); |
|
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|
2537 emit_operand(dst, src); |
|
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|
2538 } |
|
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|
2539 |
|
038dd2875b94
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|
2540 void Assembler::vptest(XMMRegister dst, XMMRegister src) { |
|
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changeset
|
2541 assert(VM_Version::supports_avx(), ""); |
|
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changeset
|
2542 bool vector256 = true; |
|
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changeset
|
2543 int encode = vex_prefix_and_encode(dst, xnoreg, src, VEX_SIMD_66, vector256, VEX_OPCODE_0F_38); |
|
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changeset
|
2544 emit_int8(0x17); |
|
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changeset
|
2545 emit_int8((unsigned char)(0xC0 | encode)); |
|
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|
2546 } |
|
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|
2547 |
| 4759 | 2548 void Assembler::punpcklbw(XMMRegister dst, Address src) { |
| 2549 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
| 2550 assert((UseAVX > 0), "SSE mode requires address alignment 16 bytes"); | |
|
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|
2551 emit_simd_arith(0x60, dst, src, VEX_SIMD_66); |
| 4759 | 2552 } |
| 2553 | |
| 304 | 2554 void Assembler::punpcklbw(XMMRegister dst, XMMRegister src) { |
| 2555 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
|
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changeset
|
2556 emit_simd_arith(0x60, dst, src, VEX_SIMD_66); |
| 304 | 2557 } |
| 2558 | |
| 4759 | 2559 void Assembler::punpckldq(XMMRegister dst, Address src) { |
| 2560 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
| 2561 assert((UseAVX > 0), "SSE mode requires address alignment 16 bytes"); | |
|
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changeset
|
2562 emit_simd_arith(0x62, dst, src, VEX_SIMD_66); |
| 4759 | 2563 } |
| 2564 | |
| 2565 void Assembler::punpckldq(XMMRegister dst, XMMRegister src) { | |
| 2566 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
|
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2567 emit_simd_arith(0x62, dst, src, VEX_SIMD_66); |
| 4759 | 2568 } |
| 2569 | |
| 6225 | 2570 void Assembler::punpcklqdq(XMMRegister dst, XMMRegister src) { |
| 2571 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
|
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2572 emit_simd_arith(0x6C, dst, src, VEX_SIMD_66); |
| 6225 | 2573 } |
| 2574 | |
| 304 | 2575 void Assembler::push(int32_t imm32) { |
| 2576 // in 64bits we push 64bits onto the stack but only | |
| 2577 // take a 32bit immediate | |
|
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|
2578 emit_int8(0x68); |
|
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|
2579 emit_int32(imm32); |
| 304 | 2580 } |
| 2581 | |
| 2582 void Assembler::push(Register src) { | |
| 2583 int encode = prefix_and_encode(src->encoding()); | |
| 2584 | |
|
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|
2585 emit_int8(0x50 | encode); |
| 304 | 2586 } |
| 2587 | |
| 2588 void Assembler::pushf() { | |
|
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|
2589 emit_int8((unsigned char)0x9C); |
| 304 | 2590 } |
| 2591 | |
| 1060 | 2592 #ifndef _LP64 // no 32bit push/pop on amd64 |
| 304 | 2593 void Assembler::pushl(Address src) { |
| 2594 // Note this will push 64bit on 64bit | |
| 2595 InstructionMark im(this); | |
| 2596 prefix(src); | |
|
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|
2597 emit_int8((unsigned char)0xFF); |
| 304 | 2598 emit_operand(rsi, src); |
| 2599 } | |
| 1060 | 2600 #endif |
| 304 | 2601 |
| 2602 void Assembler::rcll(Register dst, int imm8) { | |
| 2603 assert(isShiftCount(imm8), "illegal shift count"); | |
| 2604 int encode = prefix_and_encode(dst->encoding()); | |
| 2605 if (imm8 == 1) { | |
|
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|
2606 emit_int8((unsigned char)0xD1); |
|
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|
2607 emit_int8((unsigned char)(0xD0 | encode)); |
| 304 | 2608 } else { |
|
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|
2609 emit_int8((unsigned char)0xC1); |
|
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|
2610 emit_int8((unsigned char)0xD0 | encode); |
|
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|
2611 emit_int8(imm8); |
| 304 | 2612 } |
| 2613 } | |
| 2614 | |
| 2615 // copies data from [esi] to [edi] using rcx pointer sized words | |
| 2616 // generic | |
| 2617 void Assembler::rep_mov() { | |
|
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|
2618 emit_int8((unsigned char)0xF3); |
| 304 | 2619 // MOVSQ |
| 2620 LP64_ONLY(prefix(REX_W)); | |
|
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|
2621 emit_int8((unsigned char)0xA5); |
| 304 | 2622 } |
| 2623 | |
|
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|
2624 // sets rcx bytes with rax, value at [edi] |
|
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|
2625 void Assembler::rep_stosb() { |
|
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|
2626 emit_int8((unsigned char)0xF3); // REP |
|
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|
2627 LP64_ONLY(prefix(REX_W)); |
|
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|
2628 emit_int8((unsigned char)0xAA); // STOSB |
|
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|
2629 } |
|
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|
2630 |
| 304 | 2631 // sets rcx pointer sized words with rax, value at [edi] |
| 2632 // generic | |
|
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|
2633 void Assembler::rep_stos() { |
|
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|
2634 emit_int8((unsigned char)0xF3); // REP |
|
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|
2635 LP64_ONLY(prefix(REX_W)); // LP64:STOSQ, LP32:STOSD |
|
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|
2636 emit_int8((unsigned char)0xAB); |
| 304 | 2637 } |
| 2638 | |
| 2639 // scans rcx pointer sized words at [edi] for occurance of rax, | |
| 2640 // generic | |
| 2641 void Assembler::repne_scan() { // repne_scan | |
|
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|
2642 emit_int8((unsigned char)0xF2); |
| 304 | 2643 // SCASQ |
| 2644 LP64_ONLY(prefix(REX_W)); | |
|
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|
2645 emit_int8((unsigned char)0xAF); |
| 304 | 2646 } |
| 2647 | |
| 2648 #ifdef _LP64 | |
| 2649 // scans rcx 4 byte words at [edi] for occurance of rax, | |
| 2650 // generic | |
| 2651 void Assembler::repne_scanl() { // repne_scan | |
|
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|
2652 emit_int8((unsigned char)0xF2); |
| 304 | 2653 // SCASL |
|
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|
2654 emit_int8((unsigned char)0xAF); |
| 304 | 2655 } |
| 2656 #endif | |
| 2657 | |
| 0 | 2658 void Assembler::ret(int imm16) { |
| 2659 if (imm16 == 0) { | |
|
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|
2660 emit_int8((unsigned char)0xC3); |
| 0 | 2661 } else { |
|
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|
2662 emit_int8((unsigned char)0xC2); |
|
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|
2663 emit_int16(imm16); |
| 0 | 2664 } |
| 2665 } | |
| 2666 | |
| 304 | 2667 void Assembler::sahf() { |
| 2668 #ifdef _LP64 | |
| 2669 // Not supported in 64bit mode | |
| 2670 ShouldNotReachHere(); | |
| 2671 #endif | |
|
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|
2672 emit_int8((unsigned char)0x9E); |
| 304 | 2673 } |
| 2674 | |
| 2675 void Assembler::sarl(Register dst, int imm8) { | |
| 2676 int encode = prefix_and_encode(dst->encoding()); | |
| 2677 assert(isShiftCount(imm8), "illegal shift count"); | |
| 2678 if (imm8 == 1) { | |
|
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|
2679 emit_int8((unsigned char)0xD1); |
|
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|
2680 emit_int8((unsigned char)(0xF8 | encode)); |
| 304 | 2681 } else { |
|
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|
2682 emit_int8((unsigned char)0xC1); |
|
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|
2683 emit_int8((unsigned char)(0xF8 | encode)); |
|
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|
2684 emit_int8(imm8); |
| 304 | 2685 } |
| 2686 } | |
| 2687 | |
| 2688 void Assembler::sarl(Register dst) { | |
| 2689 int encode = prefix_and_encode(dst->encoding()); | |
|
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|
2690 emit_int8((unsigned char)0xD3); |
|
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|
2691 emit_int8((unsigned char)(0xF8 | encode)); |
| 304 | 2692 } |
| 2693 | |
| 2694 void Assembler::sbbl(Address dst, int32_t imm32) { | |
| 2695 InstructionMark im(this); | |
| 2696 prefix(dst); | |
| 2697 emit_arith_operand(0x81, rbx, dst, imm32); | |
| 2698 } | |
| 2699 | |
| 2700 void Assembler::sbbl(Register dst, int32_t imm32) { | |
| 2701 prefix(dst); | |
| 2702 emit_arith(0x81, 0xD8, dst, imm32); | |
| 2703 } | |
| 2704 | |
| 2705 | |
| 2706 void Assembler::sbbl(Register dst, Address src) { | |
| 2707 InstructionMark im(this); | |
| 2708 prefix(src, dst); | |
|
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changeset
|
2709 emit_int8(0x1B); |
| 304 | 2710 emit_operand(dst, src); |
| 2711 } | |
| 2712 | |
| 2713 void Assembler::sbbl(Register dst, Register src) { | |
| 2714 (void) prefix_and_encode(dst->encoding(), src->encoding()); | |
| 2715 emit_arith(0x1B, 0xC0, dst, src); | |
| 2716 } | |
| 2717 | |
| 2718 void Assembler::setb(Condition cc, Register dst) { | |
| 2719 assert(0 <= cc && cc < 16, "illegal cc"); | |
| 2720 int encode = prefix_and_encode(dst->encoding(), true); | |
|
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|
2721 emit_int8(0x0F); |
|
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|
2722 emit_int8((unsigned char)0x90 | cc); |
|
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|
2723 emit_int8((unsigned char)(0xC0 | encode)); |
| 304 | 2724 } |
| 2725 | |
| 2726 void Assembler::shll(Register dst, int imm8) { | |
| 2727 assert(isShiftCount(imm8), "illegal shift count"); | |
| 2728 int encode = prefix_and_encode(dst->encoding()); | |
| 2729 if (imm8 == 1 ) { | |
|
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changeset
|
2730 emit_int8((unsigned char)0xD1); |
|
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|
2731 emit_int8((unsigned char)(0xE0 | encode)); |
| 304 | 2732 } else { |
|
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changeset
|
2733 emit_int8((unsigned char)0xC1); |
|
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changeset
|
2734 emit_int8((unsigned char)(0xE0 | encode)); |
|
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changeset
|
2735 emit_int8(imm8); |
| 304 | 2736 } |
| 2737 } | |
| 2738 | |
| 2739 void Assembler::shll(Register dst) { | |
| 2740 int encode = prefix_and_encode(dst->encoding()); | |
|
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changeset
|
2741 emit_int8((unsigned char)0xD3); |
|
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|
2742 emit_int8((unsigned char)(0xE0 | encode)); |
| 304 | 2743 } |
| 2744 | |
| 2745 void Assembler::shrl(Register dst, int imm8) { | |
| 2746 assert(isShiftCount(imm8), "illegal shift count"); | |
| 2747 int encode = prefix_and_encode(dst->encoding()); | |
|
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|
2748 emit_int8((unsigned char)0xC1); |
|
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|
2749 emit_int8((unsigned char)(0xE8 | encode)); |
|
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|
2750 emit_int8(imm8); |
| 304 | 2751 } |
| 2752 | |
| 2753 void Assembler::shrl(Register dst) { | |
| 2754 int encode = prefix_and_encode(dst->encoding()); | |
|
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|
2755 emit_int8((unsigned char)0xD3); |
|
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|
2756 emit_int8((unsigned char)(0xE8 | encode)); |
| 304 | 2757 } |
| 0 | 2758 |
| 2759 // copies a single word from [esi] to [edi] | |
| 2760 void Assembler::smovl() { | |
|
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|
2761 emit_int8((unsigned char)0xA5); |
| 0 | 2762 } |
| 2763 | |
| 304 | 2764 void Assembler::sqrtsd(XMMRegister dst, XMMRegister src) { |
| 2765 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
|
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|
2766 emit_simd_arith(0x51, dst, src, VEX_SIMD_F2); |
| 304 | 2767 } |
| 2768 | |
| 2008 | 2769 void Assembler::sqrtsd(XMMRegister dst, Address src) { |
| 2770 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
|
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|
2771 emit_simd_arith(0x51, dst, src, VEX_SIMD_F2); |
| 2008 | 2772 } |
| 2773 | |
| 2774 void Assembler::sqrtss(XMMRegister dst, XMMRegister src) { | |
| 4759 | 2775 NOT_LP64(assert(VM_Version::supports_sse(), "")); |
|
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|
2776 emit_simd_arith(0x51, dst, src, VEX_SIMD_F3); |
| 2008 | 2777 } |
| 2778 | |
|
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|
2779 void Assembler::std() { |
|
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|
2780 emit_int8((unsigned char)0xFD); |
|
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|
2781 } |
|
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|
2782 |
| 2008 | 2783 void Assembler::sqrtss(XMMRegister dst, Address src) { |
| 4759 | 2784 NOT_LP64(assert(VM_Version::supports_sse(), "")); |
|
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|
2785 emit_simd_arith(0x51, dst, src, VEX_SIMD_F3); |
| 2008 | 2786 } |
| 2787 | |
| 304 | 2788 void Assembler::stmxcsr( Address dst) { |
| 2789 NOT_LP64(assert(VM_Version::supports_sse(), "")); | |
| 2790 InstructionMark im(this); | |
| 2791 prefix(dst); | |
|
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|
2792 emit_int8(0x0F); |
|
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|
2793 emit_int8((unsigned char)0xAE); |
| 304 | 2794 emit_operand(as_Register(3), dst); |
| 2795 } | |
| 2796 | |
| 2797 void Assembler::subl(Address dst, int32_t imm32) { | |
| 2798 InstructionMark im(this); | |
| 2799 prefix(dst); | |
|
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|
2800 emit_arith_operand(0x81, rbp, dst, imm32); |
| 304 | 2801 } |
| 2802 | |
| 2803 void Assembler::subl(Address dst, Register src) { | |
| 2804 InstructionMark im(this); | |
| 2805 prefix(dst, src); | |
|
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|
2806 emit_int8(0x29); |
| 304 | 2807 emit_operand(src, dst); |
| 2808 } | |
| 2809 | |
|
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changeset
|
2810 void Assembler::subl(Register dst, int32_t imm32) { |
|
b1a2afa37ec4
7003271: Hotspot should track cumulative Java heap bytes allocated on a per-thread basis
phh
parents:
2014
diff
changeset
|
2811 prefix(dst); |
|
b1a2afa37ec4
7003271: Hotspot should track cumulative Java heap bytes allocated on a per-thread basis
phh
parents:
2014
diff
changeset
|
2812 emit_arith(0x81, 0xE8, dst, imm32); |
|
b1a2afa37ec4
7003271: Hotspot should track cumulative Java heap bytes allocated on a per-thread basis
phh
parents:
2014
diff
changeset
|
2813 } |
|
b1a2afa37ec4
7003271: Hotspot should track cumulative Java heap bytes allocated on a per-thread basis
phh
parents:
2014
diff
changeset
|
2814 |
|
4947
fd8114661503
7125136: SIGILL on linux amd64 in gc/ArrayJuggle/Juggle29
kvn
parents:
4770
diff
changeset
|
2815 // Force generation of a 4 byte immediate value even if it fits into 8bit |
|
fd8114661503
7125136: SIGILL on linux amd64 in gc/ArrayJuggle/Juggle29
kvn
parents:
4770
diff
changeset
|
2816 void Assembler::subl_imm32(Register dst, int32_t imm32) { |
|
fd8114661503
7125136: SIGILL on linux amd64 in gc/ArrayJuggle/Juggle29
kvn
parents:
4770
diff
changeset
|
2817 prefix(dst); |
|
fd8114661503
7125136: SIGILL on linux amd64 in gc/ArrayJuggle/Juggle29
kvn
parents:
4770
diff
changeset
|
2818 emit_arith_imm32(0x81, 0xE8, dst, imm32); |
|
fd8114661503
7125136: SIGILL on linux amd64 in gc/ArrayJuggle/Juggle29
kvn
parents:
4770
diff
changeset
|
2819 } |
|
fd8114661503
7125136: SIGILL on linux amd64 in gc/ArrayJuggle/Juggle29
kvn
parents:
4770
diff
changeset
|
2820 |
| 304 | 2821 void Assembler::subl(Register dst, Address src) { |
| 2822 InstructionMark im(this); | |
| 2823 prefix(src, dst); | |
|
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
2824 emit_int8(0x2B); |
| 304 | 2825 emit_operand(dst, src); |
| 2826 } | |
| 2827 | |
| 2828 void Assembler::subl(Register dst, Register src) { | |
| 2829 (void) prefix_and_encode(dst->encoding(), src->encoding()); | |
| 2830 emit_arith(0x2B, 0xC0, dst, src); | |
| 2831 } | |
| 2832 | |
| 2833 void Assembler::subsd(XMMRegister dst, XMMRegister src) { | |
| 2834 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
|
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
2835 emit_simd_arith(0x5C, dst, src, VEX_SIMD_F2); |
| 304 | 2836 } |
| 2837 | |
| 2838 void Assembler::subsd(XMMRegister dst, Address src) { | |
| 2839 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
|
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
2840 emit_simd_arith(0x5C, dst, src, VEX_SIMD_F2); |
| 304 | 2841 } |
| 2842 | |
| 2843 void Assembler::subss(XMMRegister dst, XMMRegister src) { | |
| 2844 NOT_LP64(assert(VM_Version::supports_sse(), "")); | |
|
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
2845 emit_simd_arith(0x5C, dst, src, VEX_SIMD_F3); |
| 304 | 2846 } |
| 2847 | |
| 2848 void Assembler::subss(XMMRegister dst, Address src) { | |
| 2849 NOT_LP64(assert(VM_Version::supports_sse(), "")); | |
|
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
2850 emit_simd_arith(0x5C, dst, src, VEX_SIMD_F3); |
| 304 | 2851 } |
| 2852 | |
| 2853 void Assembler::testb(Register dst, int imm8) { | |
| 2854 NOT_LP64(assert(dst->has_byte_register(), "must have byte register")); | |
| 2855 (void) prefix_and_encode(dst->encoding(), true); | |
| 2856 emit_arith_b(0xF6, 0xC0, dst, imm8); | |
| 2857 } | |
| 2858 | |
| 2859 void Assembler::testl(Register dst, int32_t imm32) { | |
| 2860 // not using emit_arith because test | |
| 2861 // doesn't support sign-extension of | |
| 2862 // 8bit operands | |
| 2863 int encode = dst->encoding(); | |
| 2864 if (encode == 0) { | |
|
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
2865 emit_int8((unsigned char)0xA9); |
| 304 | 2866 } else { |
| 2867 encode = prefix_and_encode(encode); | |
|
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
2868 emit_int8((unsigned char)0xF7); |
|
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
2869 emit_int8((unsigned char)(0xC0 | encode)); |
| 304 | 2870 } |
|
7476
ffa87474d7a4
8004537: replace AbstractAssembler emit_long with emit_int32
twisti
parents:
7475
diff
changeset
|
2871 emit_int32(imm32); |
| 304 | 2872 } |
| 2873 | |
| 2874 void Assembler::testl(Register dst, Register src) { | |
| 2875 (void) prefix_and_encode(dst->encoding(), src->encoding()); | |
| 2876 emit_arith(0x85, 0xC0, dst, src); | |
| 2877 } | |
| 2878 | |
| 2879 void Assembler::testl(Register dst, Address src) { | |
| 2880 InstructionMark im(this); | |
| 2881 prefix(src, dst); | |
|
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
2882 emit_int8((unsigned char)0x85); |
| 304 | 2883 emit_operand(dst, src); |
| 2884 } | |
| 2885 | |
| 2886 void Assembler::ucomisd(XMMRegister dst, Address src) { | |
| 2887 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
|
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
2888 emit_simd_arith_nonds(0x2E, dst, src, VEX_SIMD_66); |
| 304 | 2889 } |
| 2890 | |
| 2891 void Assembler::ucomisd(XMMRegister dst, XMMRegister src) { | |
| 2892 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
|
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
2893 emit_simd_arith_nonds(0x2E, dst, src, VEX_SIMD_66); |
| 304 | 2894 } |
| 2895 | |
| 2896 void Assembler::ucomiss(XMMRegister dst, Address src) { | |
| 2897 NOT_LP64(assert(VM_Version::supports_sse(), "")); | |
|
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
2898 emit_simd_arith_nonds(0x2E, dst, src, VEX_SIMD_NONE); |
| 304 | 2899 } |
| 2900 | |
| 2901 void Assembler::ucomiss(XMMRegister dst, XMMRegister src) { | |
| 2902 NOT_LP64(assert(VM_Version::supports_sse(), "")); | |
|
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
2903 emit_simd_arith_nonds(0x2E, dst, src, VEX_SIMD_NONE); |
| 304 | 2904 } |
| 2905 | |
| 2906 | |
| 2907 void Assembler::xaddl(Address dst, Register src) { | |
| 2908 InstructionMark im(this); | |
| 2909 prefix(dst, src); | |
|
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
2910 emit_int8(0x0F); |
|
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
2911 emit_int8((unsigned char)0xC1); |
| 304 | 2912 emit_operand(src, dst); |
| 2913 } | |
| 2914 | |
| 2915 void Assembler::xchgl(Register dst, Address src) { // xchg | |
| 2916 InstructionMark im(this); | |
| 2917 prefix(src, dst); | |
|
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
2918 emit_int8((unsigned char)0x87); |
| 304 | 2919 emit_operand(dst, src); |
| 2920 } | |
| 2921 | |
| 2922 void Assembler::xchgl(Register dst, Register src) { | |
| 2923 int encode = prefix_and_encode(dst->encoding(), src->encoding()); | |
|
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
2924 emit_int8((unsigned char)0x87); |
|
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
2925 emit_int8((unsigned char)(0xC0 | encode)); |
| 304 | 2926 } |
| 2927 | |
|
7199
cd3d6a6b95d9
8003240: x86: move MacroAssembler into separate file
twisti
parents:
7198
diff
changeset
|
2928 void Assembler::xgetbv() { |
|
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
2929 emit_int8(0x0F); |
|
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
2930 emit_int8(0x01); |
|
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
2931 emit_int8((unsigned char)0xD0); |
|
7199
cd3d6a6b95d9
8003240: x86: move MacroAssembler into separate file
twisti
parents:
7198
diff
changeset
|
2932 } |
|
cd3d6a6b95d9
8003240: x86: move MacroAssembler into separate file
twisti
parents:
7198
diff
changeset
|
2933 |
| 304 | 2934 void Assembler::xorl(Register dst, int32_t imm32) { |
| 2935 prefix(dst); | |
| 2936 emit_arith(0x81, 0xF0, dst, imm32); | |
| 2937 } | |
| 2938 | |
| 2939 void Assembler::xorl(Register dst, Address src) { | |
| 2940 InstructionMark im(this); | |
| 2941 prefix(src, dst); | |
|
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
2942 emit_int8(0x33); |
| 304 | 2943 emit_operand(dst, src); |
| 2944 } | |
| 2945 | |
| 2946 void Assembler::xorl(Register dst, Register src) { | |
| 2947 (void) prefix_and_encode(dst->encoding(), src->encoding()); | |
| 2948 emit_arith(0x33, 0xC0, dst, src); | |
| 2949 } | |
| 2950 | |
|
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
2951 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
2952 // AVX 3-operands scalar float-point arithmetic instructions |
|
4761
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2953 |
|
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2954 void Assembler::vaddsd(XMMRegister dst, XMMRegister nds, Address src) { |
|
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2955 assert(VM_Version::supports_avx(), ""); |
|
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
2956 emit_vex_arith(0x58, dst, nds, src, VEX_SIMD_F2, /* vector256 */ false); |
|
4761
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2957 } |
|
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2958 |
|
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2959 void Assembler::vaddsd(XMMRegister dst, XMMRegister nds, XMMRegister src) { |
|
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2960 assert(VM_Version::supports_avx(), ""); |
|
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
2961 emit_vex_arith(0x58, dst, nds, src, VEX_SIMD_F2, /* vector256 */ false); |
|
4761
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2962 } |
|
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2963 |
|
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2964 void Assembler::vaddss(XMMRegister dst, XMMRegister nds, Address src) { |
|
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2965 assert(VM_Version::supports_avx(), ""); |
|
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
2966 emit_vex_arith(0x58, dst, nds, src, VEX_SIMD_F3, /* vector256 */ false); |
|
4761
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2967 } |
|
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2968 |
|
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2969 void Assembler::vaddss(XMMRegister dst, XMMRegister nds, XMMRegister src) { |
|
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2970 assert(VM_Version::supports_avx(), ""); |
|
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
2971 emit_vex_arith(0x58, dst, nds, src, VEX_SIMD_F3, /* vector256 */ false); |
|
4761
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2972 } |
|
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2973 |
|
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2974 void Assembler::vdivsd(XMMRegister dst, XMMRegister nds, Address src) { |
|
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2975 assert(VM_Version::supports_avx(), ""); |
|
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
2976 emit_vex_arith(0x5E, dst, nds, src, VEX_SIMD_F2, /* vector256 */ false); |
|
4761
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2977 } |
|
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2978 |
|
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2979 void Assembler::vdivsd(XMMRegister dst, XMMRegister nds, XMMRegister src) { |
|
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2980 assert(VM_Version::supports_avx(), ""); |
|
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
2981 emit_vex_arith(0x5E, dst, nds, src, VEX_SIMD_F2, /* vector256 */ false); |
|
4761
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2982 } |
|
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2983 |
|
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2984 void Assembler::vdivss(XMMRegister dst, XMMRegister nds, Address src) { |
|
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2985 assert(VM_Version::supports_avx(), ""); |
|
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
2986 emit_vex_arith(0x5E, dst, nds, src, VEX_SIMD_F3, /* vector256 */ false); |
|
4761
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2987 } |
|
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2988 |
|
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2989 void Assembler::vdivss(XMMRegister dst, XMMRegister nds, XMMRegister src) { |
|
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2990 assert(VM_Version::supports_avx(), ""); |
|
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
2991 emit_vex_arith(0x5E, dst, nds, src, VEX_SIMD_F3, /* vector256 */ false); |
|
4761
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2992 } |
|
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2993 |
|
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2994 void Assembler::vmulsd(XMMRegister dst, XMMRegister nds, Address src) { |
|
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2995 assert(VM_Version::supports_avx(), ""); |
|
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
2996 emit_vex_arith(0x59, dst, nds, src, VEX_SIMD_F2, /* vector256 */ false); |
|
4761
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2997 } |
|
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2998 |
|
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2999 void Assembler::vmulsd(XMMRegister dst, XMMRegister nds, XMMRegister src) { |
|
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
3000 assert(VM_Version::supports_avx(), ""); |
|
6614
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6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3001 emit_vex_arith(0x59, dst, nds, src, VEX_SIMD_F2, /* vector256 */ false); |
|
4761
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
3002 } |
|
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
3003 |
|
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
3004 void Assembler::vmulss(XMMRegister dst, XMMRegister nds, Address src) { |
|
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3005 assert(VM_Version::supports_avx(), ""); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3006 emit_vex_arith(0x59, dst, nds, src, VEX_SIMD_F3, /* vector256 */ false); |
|
4761
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
3007 } |
|
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
3008 |
|
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
3009 void Assembler::vmulss(XMMRegister dst, XMMRegister nds, XMMRegister src) { |
|
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
3010 assert(VM_Version::supports_avx(), ""); |
|
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3011 emit_vex_arith(0x59, dst, nds, src, VEX_SIMD_F3, /* vector256 */ false); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3012 } |
|
4761
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
3013 |
|
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
3014 void Assembler::vsubsd(XMMRegister dst, XMMRegister nds, Address src) { |
|
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
3015 assert(VM_Version::supports_avx(), ""); |
|
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3016 emit_vex_arith(0x5C, dst, nds, src, VEX_SIMD_F2, /* vector256 */ false); |
|
4761
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
3017 } |
|
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
3018 |
|
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
3019 void Assembler::vsubsd(XMMRegister dst, XMMRegister nds, XMMRegister src) { |
|
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
3020 assert(VM_Version::supports_avx(), ""); |
|
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3021 emit_vex_arith(0x5C, dst, nds, src, VEX_SIMD_F2, /* vector256 */ false); |
|
4761
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
3022 } |
|
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
3023 |
|
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
3024 void Assembler::vsubss(XMMRegister dst, XMMRegister nds, Address src) { |
|
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
3025 assert(VM_Version::supports_avx(), ""); |
|
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3026 emit_vex_arith(0x5C, dst, nds, src, VEX_SIMD_F3, /* vector256 */ false); |
|
4761
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
3027 } |
|
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
3028 |
|
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
3029 void Assembler::vsubss(XMMRegister dst, XMMRegister nds, XMMRegister src) { |
|
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
3030 assert(VM_Version::supports_avx(), ""); |
|
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3031 emit_vex_arith(0x5C, dst, nds, src, VEX_SIMD_F3, /* vector256 */ false); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3032 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3033 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3034 //====================VECTOR ARITHMETIC===================================== |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3035 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3036 // Float-point vector arithmetic |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3037 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3038 void Assembler::addpd(XMMRegister dst, XMMRegister src) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3039 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3040 emit_simd_arith(0x58, dst, src, VEX_SIMD_66); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3041 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3042 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3043 void Assembler::addps(XMMRegister dst, XMMRegister src) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3044 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3045 emit_simd_arith(0x58, dst, src, VEX_SIMD_NONE); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3046 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3047 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3048 void Assembler::vaddpd(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3049 assert(VM_Version::supports_avx(), ""); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3050 emit_vex_arith(0x58, dst, nds, src, VEX_SIMD_66, vector256); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3051 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3052 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3053 void Assembler::vaddps(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3054 assert(VM_Version::supports_avx(), ""); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3055 emit_vex_arith(0x58, dst, nds, src, VEX_SIMD_NONE, vector256); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3056 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3057 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3058 void Assembler::vaddpd(XMMRegister dst, XMMRegister nds, Address src, bool vector256) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3059 assert(VM_Version::supports_avx(), ""); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3060 emit_vex_arith(0x58, dst, nds, src, VEX_SIMD_66, vector256); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3061 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3062 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3063 void Assembler::vaddps(XMMRegister dst, XMMRegister nds, Address src, bool vector256) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3064 assert(VM_Version::supports_avx(), ""); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3065 emit_vex_arith(0x58, dst, nds, src, VEX_SIMD_NONE, vector256); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3066 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3067 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3068 void Assembler::subpd(XMMRegister dst, XMMRegister src) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3069 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3070 emit_simd_arith(0x5C, dst, src, VEX_SIMD_66); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3071 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3072 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3073 void Assembler::subps(XMMRegister dst, XMMRegister src) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3074 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3075 emit_simd_arith(0x5C, dst, src, VEX_SIMD_NONE); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3076 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3077 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3078 void Assembler::vsubpd(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3079 assert(VM_Version::supports_avx(), ""); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3080 emit_vex_arith(0x5C, dst, nds, src, VEX_SIMD_66, vector256); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3081 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3082 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3083 void Assembler::vsubps(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3084 assert(VM_Version::supports_avx(), ""); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3085 emit_vex_arith(0x5C, dst, nds, src, VEX_SIMD_NONE, vector256); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3086 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3087 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3088 void Assembler::vsubpd(XMMRegister dst, XMMRegister nds, Address src, bool vector256) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3089 assert(VM_Version::supports_avx(), ""); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3090 emit_vex_arith(0x5C, dst, nds, src, VEX_SIMD_66, vector256); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3091 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3092 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3093 void Assembler::vsubps(XMMRegister dst, XMMRegister nds, Address src, bool vector256) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3094 assert(VM_Version::supports_avx(), ""); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3095 emit_vex_arith(0x5C, dst, nds, src, VEX_SIMD_NONE, vector256); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3096 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3097 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3098 void Assembler::mulpd(XMMRegister dst, XMMRegister src) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3099 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3100 emit_simd_arith(0x59, dst, src, VEX_SIMD_66); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3101 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3102 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3103 void Assembler::mulps(XMMRegister dst, XMMRegister src) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3104 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3105 emit_simd_arith(0x59, dst, src, VEX_SIMD_NONE); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3106 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3107 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3108 void Assembler::vmulpd(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3109 assert(VM_Version::supports_avx(), ""); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3110 emit_vex_arith(0x59, dst, nds, src, VEX_SIMD_66, vector256); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3111 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3112 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3113 void Assembler::vmulps(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3114 assert(VM_Version::supports_avx(), ""); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3115 emit_vex_arith(0x59, dst, nds, src, VEX_SIMD_NONE, vector256); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3116 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3117 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3118 void Assembler::vmulpd(XMMRegister dst, XMMRegister nds, Address src, bool vector256) { |
|
4761
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
3119 assert(VM_Version::supports_avx(), ""); |
|
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3120 emit_vex_arith(0x59, dst, nds, src, VEX_SIMD_66, vector256); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3121 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3122 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3123 void Assembler::vmulps(XMMRegister dst, XMMRegister nds, Address src, bool vector256) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3124 assert(VM_Version::supports_avx(), ""); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3125 emit_vex_arith(0x59, dst, nds, src, VEX_SIMD_NONE, vector256); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3126 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3127 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3128 void Assembler::divpd(XMMRegister dst, XMMRegister src) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3129 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3130 emit_simd_arith(0x5E, dst, src, VEX_SIMD_66); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3131 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3132 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3133 void Assembler::divps(XMMRegister dst, XMMRegister src) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3134 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3135 emit_simd_arith(0x5E, dst, src, VEX_SIMD_NONE); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3136 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3137 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3138 void Assembler::vdivpd(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3139 assert(VM_Version::supports_avx(), ""); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3140 emit_vex_arith(0x5E, dst, nds, src, VEX_SIMD_66, vector256); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3141 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3142 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3143 void Assembler::vdivps(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3144 assert(VM_Version::supports_avx(), ""); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3145 emit_vex_arith(0x5E, dst, nds, src, VEX_SIMD_NONE, vector256); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3146 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3147 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3148 void Assembler::vdivpd(XMMRegister dst, XMMRegister nds, Address src, bool vector256) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3149 assert(VM_Version::supports_avx(), ""); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3150 emit_vex_arith(0x5E, dst, nds, src, VEX_SIMD_66, vector256); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3151 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3152 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3153 void Assembler::vdivps(XMMRegister dst, XMMRegister nds, Address src, bool vector256) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3154 assert(VM_Version::supports_avx(), ""); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3155 emit_vex_arith(0x5E, dst, nds, src, VEX_SIMD_NONE, vector256); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3156 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3157 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3158 void Assembler::andpd(XMMRegister dst, XMMRegister src) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3159 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3160 emit_simd_arith(0x54, dst, src, VEX_SIMD_66); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3161 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3162 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3163 void Assembler::andps(XMMRegister dst, XMMRegister src) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3164 NOT_LP64(assert(VM_Version::supports_sse(), "")); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3165 emit_simd_arith(0x54, dst, src, VEX_SIMD_NONE); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3166 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3167 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3168 void Assembler::andps(XMMRegister dst, Address src) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3169 NOT_LP64(assert(VM_Version::supports_sse(), "")); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3170 emit_simd_arith(0x54, dst, src, VEX_SIMD_NONE); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3171 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3172 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3173 void Assembler::andpd(XMMRegister dst, Address src) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3174 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3175 emit_simd_arith(0x54, dst, src, VEX_SIMD_66); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3176 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3177 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3178 void Assembler::vandpd(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3179 assert(VM_Version::supports_avx(), ""); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3180 emit_vex_arith(0x54, dst, nds, src, VEX_SIMD_66, vector256); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3181 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3182 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3183 void Assembler::vandps(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3184 assert(VM_Version::supports_avx(), ""); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3185 emit_vex_arith(0x54, dst, nds, src, VEX_SIMD_NONE, vector256); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3186 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3187 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3188 void Assembler::vandpd(XMMRegister dst, XMMRegister nds, Address src, bool vector256) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3189 assert(VM_Version::supports_avx(), ""); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3190 emit_vex_arith(0x54, dst, nds, src, VEX_SIMD_66, vector256); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3191 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3192 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3193 void Assembler::vandps(XMMRegister dst, XMMRegister nds, Address src, bool vector256) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3194 assert(VM_Version::supports_avx(), ""); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3195 emit_vex_arith(0x54, dst, nds, src, VEX_SIMD_NONE, vector256); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3196 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3197 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3198 void Assembler::xorpd(XMMRegister dst, XMMRegister src) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3199 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3200 emit_simd_arith(0x57, dst, src, VEX_SIMD_66); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3201 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3202 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3203 void Assembler::xorps(XMMRegister dst, XMMRegister src) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3204 NOT_LP64(assert(VM_Version::supports_sse(), "")); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3205 emit_simd_arith(0x57, dst, src, VEX_SIMD_NONE); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3206 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3207 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3208 void Assembler::xorpd(XMMRegister dst, Address src) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3209 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3210 emit_simd_arith(0x57, dst, src, VEX_SIMD_66); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3211 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3212 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3213 void Assembler::xorps(XMMRegister dst, Address src) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3214 NOT_LP64(assert(VM_Version::supports_sse(), "")); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3215 emit_simd_arith(0x57, dst, src, VEX_SIMD_NONE); |
|
4761
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
3216 } |
|
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
3217 |
|
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
6141
diff
changeset
|
3218 void Assembler::vxorpd(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
|
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
6141
diff
changeset
|
3219 assert(VM_Version::supports_avx(), ""); |
|
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3220 emit_vex_arith(0x57, dst, nds, src, VEX_SIMD_66, vector256); |
|
4761
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
3221 } |
|
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
3222 |
|
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
6141
diff
changeset
|
3223 void Assembler::vxorps(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
|
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
6141
diff
changeset
|
3224 assert(VM_Version::supports_avx(), ""); |
|
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3225 emit_vex_arith(0x57, dst, nds, src, VEX_SIMD_NONE, vector256); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3226 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3227 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3228 void Assembler::vxorpd(XMMRegister dst, XMMRegister nds, Address src, bool vector256) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3229 assert(VM_Version::supports_avx(), ""); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3230 emit_vex_arith(0x57, dst, nds, src, VEX_SIMD_66, vector256); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3231 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3232 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3233 void Assembler::vxorps(XMMRegister dst, XMMRegister nds, Address src, bool vector256) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3234 assert(VM_Version::supports_avx(), ""); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3235 emit_vex_arith(0x57, dst, nds, src, VEX_SIMD_NONE, vector256); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3236 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3237 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3238 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3239 // Integer vector arithmetic |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3240 void Assembler::paddb(XMMRegister dst, XMMRegister src) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3241 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3242 emit_simd_arith(0xFC, dst, src, VEX_SIMD_66); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3243 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3244 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3245 void Assembler::paddw(XMMRegister dst, XMMRegister src) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3246 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3247 emit_simd_arith(0xFD, dst, src, VEX_SIMD_66); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3248 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3249 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3250 void Assembler::paddd(XMMRegister dst, XMMRegister src) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3251 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3252 emit_simd_arith(0xFE, dst, src, VEX_SIMD_66); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3253 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3254 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3255 void Assembler::paddq(XMMRegister dst, XMMRegister src) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3256 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3257 emit_simd_arith(0xD4, dst, src, VEX_SIMD_66); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3258 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3259 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3260 void Assembler::vpaddb(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3261 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3262 emit_vex_arith(0xFC, dst, nds, src, VEX_SIMD_66, vector256); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3263 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3264 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3265 void Assembler::vpaddw(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3266 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3267 emit_vex_arith(0xFD, dst, nds, src, VEX_SIMD_66, vector256); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3268 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3269 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3270 void Assembler::vpaddd(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3271 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3272 emit_vex_arith(0xFE, dst, nds, src, VEX_SIMD_66, vector256); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3273 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3274 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3275 void Assembler::vpaddq(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3276 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3277 emit_vex_arith(0xD4, dst, nds, src, VEX_SIMD_66, vector256); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3278 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3279 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3280 void Assembler::vpaddb(XMMRegister dst, XMMRegister nds, Address src, bool vector256) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3281 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3282 emit_vex_arith(0xFC, dst, nds, src, VEX_SIMD_66, vector256); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3283 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3284 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3285 void Assembler::vpaddw(XMMRegister dst, XMMRegister nds, Address src, bool vector256) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3286 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3287 emit_vex_arith(0xFD, dst, nds, src, VEX_SIMD_66, vector256); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3288 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3289 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3290 void Assembler::vpaddd(XMMRegister dst, XMMRegister nds, Address src, bool vector256) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3291 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3292 emit_vex_arith(0xFE, dst, nds, src, VEX_SIMD_66, vector256); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3293 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3294 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3295 void Assembler::vpaddq(XMMRegister dst, XMMRegister nds, Address src, bool vector256) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3296 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3297 emit_vex_arith(0xD4, dst, nds, src, VEX_SIMD_66, vector256); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3298 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3299 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3300 void Assembler::psubb(XMMRegister dst, XMMRegister src) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3301 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3302 emit_simd_arith(0xF8, dst, src, VEX_SIMD_66); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3303 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3304 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3305 void Assembler::psubw(XMMRegister dst, XMMRegister src) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3306 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3307 emit_simd_arith(0xF9, dst, src, VEX_SIMD_66); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3308 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3309 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3310 void Assembler::psubd(XMMRegister dst, XMMRegister src) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3311 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3312 emit_simd_arith(0xFA, dst, src, VEX_SIMD_66); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3313 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3314 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3315 void Assembler::psubq(XMMRegister dst, XMMRegister src) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3316 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3317 emit_simd_arith(0xFB, dst, src, VEX_SIMD_66); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3318 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3319 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3320 void Assembler::vpsubb(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3321 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3322 emit_vex_arith(0xF8, dst, nds, src, VEX_SIMD_66, vector256); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3323 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3324 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3325 void Assembler::vpsubw(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3326 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3327 emit_vex_arith(0xF9, dst, nds, src, VEX_SIMD_66, vector256); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3328 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3329 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3330 void Assembler::vpsubd(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3331 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3332 emit_vex_arith(0xFA, dst, nds, src, VEX_SIMD_66, vector256); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3333 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3334 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3335 void Assembler::vpsubq(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3336 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3337 emit_vex_arith(0xFB, dst, nds, src, VEX_SIMD_66, vector256); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3338 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3339 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3340 void Assembler::vpsubb(XMMRegister dst, XMMRegister nds, Address src, bool vector256) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3341 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3342 emit_vex_arith(0xF8, dst, nds, src, VEX_SIMD_66, vector256); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3343 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3344 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3345 void Assembler::vpsubw(XMMRegister dst, XMMRegister nds, Address src, bool vector256) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3346 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3347 emit_vex_arith(0xF9, dst, nds, src, VEX_SIMD_66, vector256); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3348 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3349 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3350 void Assembler::vpsubd(XMMRegister dst, XMMRegister nds, Address src, bool vector256) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3351 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3352 emit_vex_arith(0xFA, dst, nds, src, VEX_SIMD_66, vector256); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3353 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3354 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3355 void Assembler::vpsubq(XMMRegister dst, XMMRegister nds, Address src, bool vector256) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3356 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3357 emit_vex_arith(0xFB, dst, nds, src, VEX_SIMD_66, vector256); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3358 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3359 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3360 void Assembler::pmullw(XMMRegister dst, XMMRegister src) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3361 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3362 emit_simd_arith(0xD5, dst, src, VEX_SIMD_66); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3363 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3364 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3365 void Assembler::pmulld(XMMRegister dst, XMMRegister src) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3366 assert(VM_Version::supports_sse4_1(), ""); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3367 int encode = simd_prefix_and_encode(dst, dst, src, VEX_SIMD_66, VEX_OPCODE_0F_38); |
|
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3368 emit_int8(0x40); |
|
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3369 emit_int8((unsigned char)(0xC0 | encode)); |
|
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3370 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3371 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3372 void Assembler::vpmullw(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3373 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3374 emit_vex_arith(0xD5, dst, nds, src, VEX_SIMD_66, vector256); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3375 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3376 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3377 void Assembler::vpmulld(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3378 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3379 int encode = vex_prefix_and_encode(dst, nds, src, VEX_SIMD_66, vector256, VEX_OPCODE_0F_38); |
|
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3380 emit_int8(0x40); |
|
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3381 emit_int8((unsigned char)(0xC0 | encode)); |
|
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3382 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3383 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3384 void Assembler::vpmullw(XMMRegister dst, XMMRegister nds, Address src, bool vector256) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3385 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3386 emit_vex_arith(0xD5, dst, nds, src, VEX_SIMD_66, vector256); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3387 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3388 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3389 void Assembler::vpmulld(XMMRegister dst, XMMRegister nds, Address src, bool vector256) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3390 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3391 InstructionMark im(this); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3392 int dst_enc = dst->encoding(); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3393 int nds_enc = nds->is_valid() ? nds->encoding() : 0; |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3394 vex_prefix(src, nds_enc, dst_enc, VEX_SIMD_66, VEX_OPCODE_0F_38, false, vector256); |
|
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3395 emit_int8(0x40); |
|
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3396 emit_operand(dst, src); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3397 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3398 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3399 // Shift packed integers left by specified number of bits. |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3400 void Assembler::psllw(XMMRegister dst, int shift) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3401 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3402 // XMM6 is for /6 encoding: 66 0F 71 /6 ib |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3403 int encode = simd_prefix_and_encode(xmm6, dst, dst, VEX_SIMD_66); |
|
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3404 emit_int8(0x71); |
|
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3405 emit_int8((unsigned char)(0xC0 | encode)); |
|
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3406 emit_int8(shift & 0xFF); |
|
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3407 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3408 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3409 void Assembler::pslld(XMMRegister dst, int shift) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3410 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3411 // XMM6 is for /6 encoding: 66 0F 72 /6 ib |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3412 int encode = simd_prefix_and_encode(xmm6, dst, dst, VEX_SIMD_66); |
|
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3413 emit_int8(0x72); |
|
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3414 emit_int8((unsigned char)(0xC0 | encode)); |
|
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3415 emit_int8(shift & 0xFF); |
|
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3416 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3417 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3418 void Assembler::psllq(XMMRegister dst, int shift) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3419 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3420 // XMM6 is for /6 encoding: 66 0F 73 /6 ib |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3421 int encode = simd_prefix_and_encode(xmm6, dst, dst, VEX_SIMD_66); |
|
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3422 emit_int8(0x73); |
|
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3423 emit_int8((unsigned char)(0xC0 | encode)); |
|
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3424 emit_int8(shift & 0xFF); |
|
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3425 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3426 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3427 void Assembler::psllw(XMMRegister dst, XMMRegister shift) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3428 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3429 emit_simd_arith(0xF1, dst, shift, VEX_SIMD_66); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3430 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3431 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3432 void Assembler::pslld(XMMRegister dst, XMMRegister shift) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3433 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3434 emit_simd_arith(0xF2, dst, shift, VEX_SIMD_66); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3435 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3436 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3437 void Assembler::psllq(XMMRegister dst, XMMRegister shift) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3438 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3439 emit_simd_arith(0xF3, dst, shift, VEX_SIMD_66); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3440 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3441 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3442 void Assembler::vpsllw(XMMRegister dst, XMMRegister src, int shift, bool vector256) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3443 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3444 // XMM6 is for /6 encoding: 66 0F 71 /6 ib |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3445 emit_vex_arith(0x71, xmm6, dst, src, VEX_SIMD_66, vector256); |
|
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3446 emit_int8(shift & 0xFF); |
|
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3447 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3448 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3449 void Assembler::vpslld(XMMRegister dst, XMMRegister src, int shift, bool vector256) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3450 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3451 // XMM6 is for /6 encoding: 66 0F 72 /6 ib |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3452 emit_vex_arith(0x72, xmm6, dst, src, VEX_SIMD_66, vector256); |
|
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3453 emit_int8(shift & 0xFF); |
|
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3454 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3455 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3456 void Assembler::vpsllq(XMMRegister dst, XMMRegister src, int shift, bool vector256) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3457 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3458 // XMM6 is for /6 encoding: 66 0F 73 /6 ib |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3459 emit_vex_arith(0x73, xmm6, dst, src, VEX_SIMD_66, vector256); |
|
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3460 emit_int8(shift & 0xFF); |
|
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3461 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3462 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3463 void Assembler::vpsllw(XMMRegister dst, XMMRegister src, XMMRegister shift, bool vector256) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3464 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3465 emit_vex_arith(0xF1, dst, src, shift, VEX_SIMD_66, vector256); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3466 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3467 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3468 void Assembler::vpslld(XMMRegister dst, XMMRegister src, XMMRegister shift, bool vector256) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3469 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3470 emit_vex_arith(0xF2, dst, src, shift, VEX_SIMD_66, vector256); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3471 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3472 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3473 void Assembler::vpsllq(XMMRegister dst, XMMRegister src, XMMRegister shift, bool vector256) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3474 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3475 emit_vex_arith(0xF3, dst, src, shift, VEX_SIMD_66, vector256); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3476 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3477 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3478 // Shift packed integers logically right by specified number of bits. |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3479 void Assembler::psrlw(XMMRegister dst, int shift) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3480 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3481 // XMM2 is for /2 encoding: 66 0F 71 /2 ib |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3482 int encode = simd_prefix_and_encode(xmm2, dst, dst, VEX_SIMD_66); |
|
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3483 emit_int8(0x71); |
|
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3484 emit_int8((unsigned char)(0xC0 | encode)); |
|
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3485 emit_int8(shift & 0xFF); |
|
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3486 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3487 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3488 void Assembler::psrld(XMMRegister dst, int shift) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3489 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3490 // XMM2 is for /2 encoding: 66 0F 72 /2 ib |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3491 int encode = simd_prefix_and_encode(xmm2, dst, dst, VEX_SIMD_66); |
|
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3492 emit_int8(0x72); |
|
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3493 emit_int8((unsigned char)(0xC0 | encode)); |
|
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3494 emit_int8(shift & 0xFF); |
|
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3495 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3496 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3497 void Assembler::psrlq(XMMRegister dst, int shift) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3498 // Do not confuse it with psrldq SSE2 instruction which |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3499 // shifts 128 bit value in xmm register by number of bytes. |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3500 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3501 // XMM2 is for /2 encoding: 66 0F 73 /2 ib |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3502 int encode = simd_prefix_and_encode(xmm2, dst, dst, VEX_SIMD_66); |
|
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3503 emit_int8(0x73); |
|
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3504 emit_int8((unsigned char)(0xC0 | encode)); |
|
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3505 emit_int8(shift & 0xFF); |
|
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3506 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3507 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3508 void Assembler::psrlw(XMMRegister dst, XMMRegister shift) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3509 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3510 emit_simd_arith(0xD1, dst, shift, VEX_SIMD_66); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3511 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3512 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3513 void Assembler::psrld(XMMRegister dst, XMMRegister shift) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3514 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3515 emit_simd_arith(0xD2, dst, shift, VEX_SIMD_66); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3516 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3517 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3518 void Assembler::psrlq(XMMRegister dst, XMMRegister shift) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3519 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3520 emit_simd_arith(0xD3, dst, shift, VEX_SIMD_66); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3521 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3522 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3523 void Assembler::vpsrlw(XMMRegister dst, XMMRegister src, int shift, bool vector256) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3524 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3525 // XMM2 is for /2 encoding: 66 0F 73 /2 ib |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3526 emit_vex_arith(0x71, xmm2, dst, src, VEX_SIMD_66, vector256); |
|
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3527 emit_int8(shift & 0xFF); |
|
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3528 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3529 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3530 void Assembler::vpsrld(XMMRegister dst, XMMRegister src, int shift, bool vector256) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3531 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3532 // XMM2 is for /2 encoding: 66 0F 73 /2 ib |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3533 emit_vex_arith(0x72, xmm2, dst, src, VEX_SIMD_66, vector256); |
|
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3534 emit_int8(shift & 0xFF); |
|
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3535 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3536 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3537 void Assembler::vpsrlq(XMMRegister dst, XMMRegister src, int shift, bool vector256) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3538 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3539 // XMM2 is for /2 encoding: 66 0F 73 /2 ib |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3540 emit_vex_arith(0x73, xmm2, dst, src, VEX_SIMD_66, vector256); |
|
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3541 emit_int8(shift & 0xFF); |
|
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3542 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3543 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3544 void Assembler::vpsrlw(XMMRegister dst, XMMRegister src, XMMRegister shift, bool vector256) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3545 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3546 emit_vex_arith(0xD1, dst, src, shift, VEX_SIMD_66, vector256); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3547 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3548 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3549 void Assembler::vpsrld(XMMRegister dst, XMMRegister src, XMMRegister shift, bool vector256) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3550 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3551 emit_vex_arith(0xD2, dst, src, shift, VEX_SIMD_66, vector256); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3552 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3553 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3554 void Assembler::vpsrlq(XMMRegister dst, XMMRegister src, XMMRegister shift, bool vector256) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3555 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3556 emit_vex_arith(0xD3, dst, src, shift, VEX_SIMD_66, vector256); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3557 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3558 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3559 // Shift packed integers arithmetically right by specified number of bits. |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3560 void Assembler::psraw(XMMRegister dst, int shift) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3561 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3562 // XMM4 is for /4 encoding: 66 0F 71 /4 ib |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3563 int encode = simd_prefix_and_encode(xmm4, dst, dst, VEX_SIMD_66); |
|
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3564 emit_int8(0x71); |
|
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3565 emit_int8((unsigned char)(0xC0 | encode)); |
|
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3566 emit_int8(shift & 0xFF); |
|
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3567 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3568 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3569 void Assembler::psrad(XMMRegister dst, int shift) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3570 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3571 // XMM4 is for /4 encoding: 66 0F 72 /4 ib |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3572 int encode = simd_prefix_and_encode(xmm4, dst, dst, VEX_SIMD_66); |
|
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3573 emit_int8(0x72); |
|
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3574 emit_int8((unsigned char)(0xC0 | encode)); |
|
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3575 emit_int8(shift & 0xFF); |
|
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3576 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3577 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3578 void Assembler::psraw(XMMRegister dst, XMMRegister shift) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3579 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3580 emit_simd_arith(0xE1, dst, shift, VEX_SIMD_66); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3581 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3582 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3583 void Assembler::psrad(XMMRegister dst, XMMRegister shift) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3584 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3585 emit_simd_arith(0xE2, dst, shift, VEX_SIMD_66); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3586 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3587 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3588 void Assembler::vpsraw(XMMRegister dst, XMMRegister src, int shift, bool vector256) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3589 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3590 // XMM4 is for /4 encoding: 66 0F 71 /4 ib |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3591 emit_vex_arith(0x71, xmm4, dst, src, VEX_SIMD_66, vector256); |
|
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3592 emit_int8(shift & 0xFF); |
|
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3593 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3594 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3595 void Assembler::vpsrad(XMMRegister dst, XMMRegister src, int shift, bool vector256) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3596 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3597 // XMM4 is for /4 encoding: 66 0F 71 /4 ib |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3598 emit_vex_arith(0x72, xmm4, dst, src, VEX_SIMD_66, vector256); |
|
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3599 emit_int8(shift & 0xFF); |
|
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3600 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3601 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3602 void Assembler::vpsraw(XMMRegister dst, XMMRegister src, XMMRegister shift, bool vector256) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3603 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3604 emit_vex_arith(0xE1, dst, src, shift, VEX_SIMD_66, vector256); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3605 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3606 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3607 void Assembler::vpsrad(XMMRegister dst, XMMRegister src, XMMRegister shift, bool vector256) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3608 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3609 emit_vex_arith(0xE2, dst, src, shift, VEX_SIMD_66, vector256); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3610 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3611 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3612 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3613 // AND packed integers |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3614 void Assembler::pand(XMMRegister dst, XMMRegister src) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3615 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3616 emit_simd_arith(0xDB, dst, src, VEX_SIMD_66); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3617 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3618 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3619 void Assembler::vpand(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3620 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3621 emit_vex_arith(0xDB, dst, nds, src, VEX_SIMD_66, vector256); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3622 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3623 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3624 void Assembler::vpand(XMMRegister dst, XMMRegister nds, Address src, bool vector256) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3625 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3626 emit_vex_arith(0xDB, dst, nds, src, VEX_SIMD_66, vector256); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3627 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3628 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3629 void Assembler::por(XMMRegister dst, XMMRegister src) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3630 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3631 emit_simd_arith(0xEB, dst, src, VEX_SIMD_66); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3632 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3633 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3634 void Assembler::vpor(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3635 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3636 emit_vex_arith(0xEB, dst, nds, src, VEX_SIMD_66, vector256); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3637 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3638 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3639 void Assembler::vpor(XMMRegister dst, XMMRegister nds, Address src, bool vector256) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3640 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3641 emit_vex_arith(0xEB, dst, nds, src, VEX_SIMD_66, vector256); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3642 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3643 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3644 void Assembler::pxor(XMMRegister dst, XMMRegister src) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3645 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3646 emit_simd_arith(0xEF, dst, src, VEX_SIMD_66); |
|
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
6141
diff
changeset
|
3647 } |
|
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
6141
diff
changeset
|
3648 |
| 6225 | 3649 void Assembler::vpxor(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
|
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3650 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3651 emit_vex_arith(0xEF, dst, nds, src, VEX_SIMD_66, vector256); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3652 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3653 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3654 void Assembler::vpxor(XMMRegister dst, XMMRegister nds, Address src, bool vector256) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3655 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3656 emit_vex_arith(0xEF, dst, nds, src, VEX_SIMD_66, vector256); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3657 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3658 |
| 6225 | 3659 |
|
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
6141
diff
changeset
|
3660 void Assembler::vinsertf128h(XMMRegister dst, XMMRegister nds, XMMRegister src) { |
|
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
6141
diff
changeset
|
3661 assert(VM_Version::supports_avx(), ""); |
|
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
6141
diff
changeset
|
3662 bool vector256 = true; |
|
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
6141
diff
changeset
|
3663 int encode = vex_prefix_and_encode(dst, nds, src, VEX_SIMD_66, vector256, VEX_OPCODE_0F_3A); |
|
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3664 emit_int8(0x18); |
|
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3665 emit_int8((unsigned char)(0xC0 | encode)); |
|
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
6141
diff
changeset
|
3666 // 0x00 - insert into lower 128 bits |
|
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
6141
diff
changeset
|
3667 // 0x01 - insert into upper 128 bits |
|
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3668 emit_int8(0x01); |
|
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
6141
diff
changeset
|
3669 } |
|
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
6141
diff
changeset
|
3670 |
|
6792
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3671 void Assembler::vinsertf128h(XMMRegister dst, Address src) { |
|
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3672 assert(VM_Version::supports_avx(), ""); |
|
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3673 InstructionMark im(this); |
|
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3674 bool vector256 = true; |
|
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3675 assert(dst != xnoreg, "sanity"); |
|
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3676 int dst_enc = dst->encoding(); |
|
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3677 // swap src<->dst for encoding |
|
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3678 vex_prefix(src, dst_enc, dst_enc, VEX_SIMD_66, VEX_OPCODE_0F_3A, false, vector256); |
|
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3679 emit_int8(0x18); |
|
6792
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3680 emit_operand(dst, src); |
|
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3681 // 0x01 - insert into upper 128 bits |
|
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3682 emit_int8(0x01); |
|
6792
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3683 } |
|
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3684 |
|
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3685 void Assembler::vextractf128h(Address dst, XMMRegister src) { |
|
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3686 assert(VM_Version::supports_avx(), ""); |
|
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3687 InstructionMark im(this); |
|
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3688 bool vector256 = true; |
|
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3689 assert(src != xnoreg, "sanity"); |
|
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3690 int src_enc = src->encoding(); |
|
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3691 vex_prefix(dst, 0, src_enc, VEX_SIMD_66, VEX_OPCODE_0F_3A, false, vector256); |
|
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3692 emit_int8(0x19); |
|
6792
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3693 emit_operand(src, dst); |
|
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3694 // 0x01 - extract from upper 128 bits |
|
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3695 emit_int8(0x01); |
|
6792
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3696 } |
|
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3697 |
| 6225 | 3698 void Assembler::vinserti128h(XMMRegister dst, XMMRegister nds, XMMRegister src) { |
| 3699 assert(VM_Version::supports_avx2(), ""); | |
| 3700 bool vector256 = true; | |
| 3701 int encode = vex_prefix_and_encode(dst, nds, src, VEX_SIMD_66, vector256, VEX_OPCODE_0F_3A); | |
|
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3702 emit_int8(0x38); |
|
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3703 emit_int8((unsigned char)(0xC0 | encode)); |
| 6225 | 3704 // 0x00 - insert into lower 128 bits |
| 3705 // 0x01 - insert into upper 128 bits | |
|
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3706 emit_int8(0x01); |
| 6225 | 3707 } |
| 3708 | |
|
6792
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3709 void Assembler::vinserti128h(XMMRegister dst, Address src) { |
|
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3710 assert(VM_Version::supports_avx2(), ""); |
|
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3711 InstructionMark im(this); |
|
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3712 bool vector256 = true; |
|
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3713 assert(dst != xnoreg, "sanity"); |
|
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3714 int dst_enc = dst->encoding(); |
|
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3715 // swap src<->dst for encoding |
|
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3716 vex_prefix(src, dst_enc, dst_enc, VEX_SIMD_66, VEX_OPCODE_0F_3A, false, vector256); |
|
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3717 emit_int8(0x38); |
|
6792
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3718 emit_operand(dst, src); |
|
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3719 // 0x01 - insert into upper 128 bits |
|
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3720 emit_int8(0x01); |
|
6792
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3721 } |
|
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3722 |
|
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3723 void Assembler::vextracti128h(Address dst, XMMRegister src) { |
|
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3724 assert(VM_Version::supports_avx2(), ""); |
|
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3725 InstructionMark im(this); |
|
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3726 bool vector256 = true; |
|
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3727 assert(src != xnoreg, "sanity"); |
|
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3728 int src_enc = src->encoding(); |
|
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3729 vex_prefix(dst, 0, src_enc, VEX_SIMD_66, VEX_OPCODE_0F_3A, false, vector256); |
|
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3730 emit_int8(0x39); |
|
6792
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3731 emit_operand(src, dst); |
|
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3732 // 0x01 - extract from upper 128 bits |
|
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3733 emit_int8(0x01); |
|
6792
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3734 } |
|
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3735 |
|
7475
e2e6bf86682c
8005544: Use 256bit YMM registers in arraycopy stubs on x86
kvn
parents:
7474
diff
changeset
|
3736 // duplicate 4-bytes integer data from src into 8 locations in dest |
|
e2e6bf86682c
8005544: Use 256bit YMM registers in arraycopy stubs on x86
kvn
parents:
7474
diff
changeset
|
3737 void Assembler::vpbroadcastd(XMMRegister dst, XMMRegister src) { |
|
e2e6bf86682c
8005544: Use 256bit YMM registers in arraycopy stubs on x86
kvn
parents:
7474
diff
changeset
|
3738 assert(VM_Version::supports_avx2(), ""); |
|
e2e6bf86682c
8005544: Use 256bit YMM registers in arraycopy stubs on x86
kvn
parents:
7474
diff
changeset
|
3739 bool vector256 = true; |
|
e2e6bf86682c
8005544: Use 256bit YMM registers in arraycopy stubs on x86
kvn
parents:
7474
diff
changeset
|
3740 int encode = vex_prefix_and_encode(dst, xnoreg, src, VEX_SIMD_66, vector256, VEX_OPCODE_0F_38); |
|
e2e6bf86682c
8005544: Use 256bit YMM registers in arraycopy stubs on x86
kvn
parents:
7474
diff
changeset
|
3741 emit_int8(0x58); |
|
e2e6bf86682c
8005544: Use 256bit YMM registers in arraycopy stubs on x86
kvn
parents:
7474
diff
changeset
|
3742 emit_int8((unsigned char)(0xC0 | encode)); |
|
e2e6bf86682c
8005544: Use 256bit YMM registers in arraycopy stubs on x86
kvn
parents:
7474
diff
changeset
|
3743 } |
|
e2e6bf86682c
8005544: Use 256bit YMM registers in arraycopy stubs on x86
kvn
parents:
7474
diff
changeset
|
3744 |
|
11080
b800986664f4
7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents:
9060
diff
changeset
|
3745 // Carry-Less Multiplication Quadword |
|
b800986664f4
7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents:
9060
diff
changeset
|
3746 void Assembler::vpclmulqdq(XMMRegister dst, XMMRegister nds, XMMRegister src, int mask) { |
|
b800986664f4
7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents:
9060
diff
changeset
|
3747 assert(VM_Version::supports_avx() && VM_Version::supports_clmul(), ""); |
|
b800986664f4
7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents:
9060
diff
changeset
|
3748 bool vector256 = false; |
|
b800986664f4
7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents:
9060
diff
changeset
|
3749 int encode = vex_prefix_and_encode(dst, nds, src, VEX_SIMD_66, vector256, VEX_OPCODE_0F_3A); |
|
b800986664f4
7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents:
9060
diff
changeset
|
3750 emit_int8(0x44); |
|
b800986664f4
7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents:
9060
diff
changeset
|
3751 emit_int8((unsigned char)(0xC0 | encode)); |
|
b800986664f4
7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents:
9060
diff
changeset
|
3752 emit_int8((unsigned char)mask); |
|
b800986664f4
7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents:
9060
diff
changeset
|
3753 } |
|
b800986664f4
7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents:
9060
diff
changeset
|
3754 |
|
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
6141
diff
changeset
|
3755 void Assembler::vzeroupper() { |
|
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
6141
diff
changeset
|
3756 assert(VM_Version::supports_avx(), ""); |
|
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
6141
diff
changeset
|
3757 (void)vex_prefix_and_encode(xmm0, xmm0, xmm0, VEX_SIMD_NONE); |
|
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3758 emit_int8(0x77); |
|
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
6141
diff
changeset
|
3759 } |
|
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
6141
diff
changeset
|
3760 |
|
4761
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
3761 |
| 304 | 3762 #ifndef _LP64 |
| 3763 // 32bit only pieces of the assembler | |
| 3764 | |
| 3765 void Assembler::cmp_literal32(Register src1, int32_t imm32, RelocationHolder const& rspec) { | |
| 3766 // NO PREFIX AS NEVER 64BIT | |
| 3767 InstructionMark im(this); | |
|
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3768 emit_int8((unsigned char)0x81); |
|
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3769 emit_int8((unsigned char)(0xF8 | src1->encoding())); |
| 304 | 3770 emit_data(imm32, rspec, 0); |
| 3771 } | |
| 3772 | |
| 3773 void Assembler::cmp_literal32(Address src1, int32_t imm32, RelocationHolder const& rspec) { | |
| 3774 // NO PREFIX AS NEVER 64BIT (not even 32bit versions of 64bit regs | |
| 3775 InstructionMark im(this); | |
|
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3776 emit_int8((unsigned char)0x81); |
| 304 | 3777 emit_operand(rdi, src1); |
| 3778 emit_data(imm32, rspec, 0); | |
| 3779 } | |
| 3780 | |
| 3781 // The 64-bit (32bit platform) cmpxchg compares the value at adr with the contents of rdx:rax, | |
| 3782 // and stores rcx:rbx into adr if so; otherwise, the value at adr is loaded | |
| 3783 // into rdx:rax. The ZF is set if the compared values were equal, and cleared otherwise. | |
| 3784 void Assembler::cmpxchg8(Address adr) { | |
| 3785 InstructionMark im(this); | |
|
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3786 emit_int8(0x0F); |
|
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3787 emit_int8((unsigned char)0xC7); |
| 304 | 3788 emit_operand(rcx, adr); |
| 3789 } | |
| 3790 | |
| 3791 void Assembler::decl(Register dst) { | |
| 3792 // Don't use it directly. Use MacroAssembler::decrementl() instead. | |
|
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3793 emit_int8(0x48 | dst->encoding()); |
| 304 | 3794 } |
| 3795 | |
| 3796 #endif // _LP64 | |
| 3797 | |
| 3798 // 64bit typically doesn't use the x87 but needs to for the trig funcs | |
| 3799 | |
| 3800 void Assembler::fabs() { | |
|
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3801 emit_int8((unsigned char)0xD9); |
|
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3802 emit_int8((unsigned char)0xE1); |
| 304 | 3803 } |
| 3804 | |
| 3805 void Assembler::fadd(int i) { | |
| 3806 emit_farith(0xD8, 0xC0, i); | |
| 3807 } | |
| 3808 | |
| 3809 void Assembler::fadd_d(Address src) { | |
| 3810 InstructionMark im(this); | |
|
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3811 emit_int8((unsigned char)0xDC); |
| 304 | 3812 emit_operand32(rax, src); |
| 3813 } | |
| 3814 | |
| 3815 void Assembler::fadd_s(Address src) { | |
| 3816 InstructionMark im(this); | |
|
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3817 emit_int8((unsigned char)0xD8); |
| 304 | 3818 emit_operand32(rax, src); |
| 3819 } | |
| 3820 | |
| 3821 void Assembler::fadda(int i) { | |
| 3822 emit_farith(0xDC, 0xC0, i); | |
| 3823 } | |
| 3824 | |
| 3825 void Assembler::faddp(int i) { | |
| 3826 emit_farith(0xDE, 0xC0, i); | |
| 3827 } | |
| 3828 | |
| 3829 void Assembler::fchs() { | |
|
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3830 emit_int8((unsigned char)0xD9); |
|
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3831 emit_int8((unsigned char)0xE0); |
| 304 | 3832 } |
| 3833 | |
| 3834 void Assembler::fcom(int i) { | |
| 3835 emit_farith(0xD8, 0xD0, i); | |
| 3836 } | |
| 3837 | |
| 3838 void Assembler::fcomp(int i) { | |
| 3839 emit_farith(0xD8, 0xD8, i); | |
| 3840 } | |
| 3841 | |
| 3842 void Assembler::fcomp_d(Address src) { | |
| 3843 InstructionMark im(this); | |
|
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3844 emit_int8((unsigned char)0xDC); |
| 304 | 3845 emit_operand32(rbx, src); |
| 3846 } | |
| 3847 | |
| 3848 void Assembler::fcomp_s(Address src) { | |
| 3849 InstructionMark im(this); | |
|
7430
d02120b7a34f
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changeset
|
3850 emit_int8((unsigned char)0xD8); |
| 304 | 3851 emit_operand32(rbx, src); |
| 3852 } | |
| 3853 | |
| 3854 void Assembler::fcompp() { | |
|
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changeset
|
3855 emit_int8((unsigned char)0xDE); |
|
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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changeset
|
3856 emit_int8((unsigned char)0xD9); |
| 304 | 3857 } |
| 3858 | |
| 3859 void Assembler::fcos() { | |
|
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changeset
|
3860 emit_int8((unsigned char)0xD9); |
|
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changeset
|
3861 emit_int8((unsigned char)0xFF); |
| 304 | 3862 } |
| 3863 | |
| 3864 void Assembler::fdecstp() { | |
|
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changeset
|
3865 emit_int8((unsigned char)0xD9); |
|
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changeset
|
3866 emit_int8((unsigned char)0xF6); |
| 304 | 3867 } |
| 3868 | |
| 3869 void Assembler::fdiv(int i) { | |
| 3870 emit_farith(0xD8, 0xF0, i); | |
| 3871 } | |
| 3872 | |
| 3873 void Assembler::fdiv_d(Address src) { | |
| 3874 InstructionMark im(this); | |
|
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changeset
|
3875 emit_int8((unsigned char)0xDC); |
| 304 | 3876 emit_operand32(rsi, src); |
| 3877 } | |
| 3878 | |
| 3879 void Assembler::fdiv_s(Address src) { | |
| 3880 InstructionMark im(this); | |
|
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changeset
|
3881 emit_int8((unsigned char)0xD8); |
| 304 | 3882 emit_operand32(rsi, src); |
| 3883 } | |
| 3884 | |
| 3885 void Assembler::fdiva(int i) { | |
| 3886 emit_farith(0xDC, 0xF8, i); | |
| 3887 } | |
| 3888 | |
| 3889 // Note: The Intel manual (Pentium Processor User's Manual, Vol.3, 1994) | |
| 3890 // is erroneous for some of the floating-point instructions below. | |
| 3891 | |
| 3892 void Assembler::fdivp(int i) { | |
| 3893 emit_farith(0xDE, 0xF8, i); // ST(0) <- ST(0) / ST(1) and pop (Intel manual wrong) | |
| 3894 } | |
| 3895 | |
| 3896 void Assembler::fdivr(int i) { | |
| 3897 emit_farith(0xD8, 0xF8, i); | |
| 3898 } | |
| 3899 | |
| 3900 void Assembler::fdivr_d(Address src) { | |
| 3901 InstructionMark im(this); | |
|
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changeset
|
3902 emit_int8((unsigned char)0xDC); |
| 304 | 3903 emit_operand32(rdi, src); |
| 3904 } | |
| 3905 | |
| 3906 void Assembler::fdivr_s(Address src) { | |
| 3907 InstructionMark im(this); | |
|
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changeset
|
3908 emit_int8((unsigned char)0xD8); |
| 304 | 3909 emit_operand32(rdi, src); |
| 3910 } | |
| 3911 | |
| 3912 void Assembler::fdivra(int i) { | |
| 3913 emit_farith(0xDC, 0xF0, i); | |
| 3914 } | |
| 3915 | |
| 3916 void Assembler::fdivrp(int i) { | |
| 3917 emit_farith(0xDE, 0xF0, i); // ST(0) <- ST(1) / ST(0) and pop (Intel manual wrong) | |
| 3918 } | |
| 3919 | |
| 3920 void Assembler::ffree(int i) { | |
| 3921 emit_farith(0xDD, 0xC0, i); | |
| 3922 } | |
| 3923 | |
| 3924 void Assembler::fild_d(Address adr) { | |
| 3925 InstructionMark im(this); | |
|
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|
3926 emit_int8((unsigned char)0xDF); |
| 304 | 3927 emit_operand32(rbp, adr); |
| 3928 } | |
| 3929 | |
| 3930 void Assembler::fild_s(Address adr) { | |
| 3931 InstructionMark im(this); | |
|
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|
3932 emit_int8((unsigned char)0xDB); |
| 304 | 3933 emit_operand32(rax, adr); |
| 3934 } | |
| 3935 | |
| 3936 void Assembler::fincstp() { | |
|
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changeset
|
3937 emit_int8((unsigned char)0xD9); |
|
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changeset
|
3938 emit_int8((unsigned char)0xF7); |
| 304 | 3939 } |
| 3940 | |
| 3941 void Assembler::finit() { | |
|
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changeset
|
3942 emit_int8((unsigned char)0x9B); |
|
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changeset
|
3943 emit_int8((unsigned char)0xDB); |
|
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|
3944 emit_int8((unsigned char)0xE3); |
| 304 | 3945 } |
| 3946 | |
| 3947 void Assembler::fist_s(Address adr) { | |
| 3948 InstructionMark im(this); | |
|
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changeset
|
3949 emit_int8((unsigned char)0xDB); |
| 304 | 3950 emit_operand32(rdx, adr); |
| 3951 } | |
| 3952 | |
| 3953 void Assembler::fistp_d(Address adr) { | |
| 3954 InstructionMark im(this); | |
|
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changeset
|
3955 emit_int8((unsigned char)0xDF); |
| 304 | 3956 emit_operand32(rdi, adr); |
| 3957 } | |
| 3958 | |
| 3959 void Assembler::fistp_s(Address adr) { | |
| 3960 InstructionMark im(this); | |
|
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changeset
|
3961 emit_int8((unsigned char)0xDB); |
| 304 | 3962 emit_operand32(rbx, adr); |
| 3963 } | |
| 0 | 3964 |
| 3965 void Assembler::fld1() { | |
|
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changeset
|
3966 emit_int8((unsigned char)0xD9); |
|
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changeset
|
3967 emit_int8((unsigned char)0xE8); |
| 0 | 3968 } |
| 3969 | |
| 304 | 3970 void Assembler::fld_d(Address adr) { |
| 3971 InstructionMark im(this); | |
|
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changeset
|
3972 emit_int8((unsigned char)0xDD); |
| 304 | 3973 emit_operand32(rax, adr); |
| 3974 } | |
| 0 | 3975 |
| 3976 void Assembler::fld_s(Address adr) { | |
| 3977 InstructionMark im(this); | |
|
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changeset
|
3978 emit_int8((unsigned char)0xD9); |
| 304 | 3979 emit_operand32(rax, adr); |
| 3980 } | |
| 3981 | |
| 3982 | |
| 3983 void Assembler::fld_s(int index) { | |
| 0 | 3984 emit_farith(0xD9, 0xC0, index); |
| 3985 } | |
| 3986 | |
| 3987 void Assembler::fld_x(Address adr) { | |
| 3988 InstructionMark im(this); | |
|
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changeset
|
3989 emit_int8((unsigned char)0xDB); |
| 304 | 3990 emit_operand32(rbp, adr); |
| 3991 } | |
| 3992 | |
| 3993 void Assembler::fldcw(Address src) { | |
| 3994 InstructionMark im(this); | |
|
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changeset
|
3995 emit_int8((unsigned char)0xD9); |
| 304 | 3996 emit_operand32(rbp, src); |
| 3997 } | |
| 3998 | |
| 3999 void Assembler::fldenv(Address src) { | |
| 0 | 4000 InstructionMark im(this); |
|
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changeset
|
4001 emit_int8((unsigned char)0xD9); |
| 304 | 4002 emit_operand32(rsp, src); |
| 4003 } | |
| 4004 | |
| 4005 void Assembler::fldlg2() { | |
|
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changeset
|
4006 emit_int8((unsigned char)0xD9); |
|
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changeset
|
4007 emit_int8((unsigned char)0xEC); |
| 304 | 4008 } |
| 0 | 4009 |
| 4010 void Assembler::fldln2() { | |
|
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changeset
|
4011 emit_int8((unsigned char)0xD9); |
|
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changeset
|
4012 emit_int8((unsigned char)0xED); |
| 0 | 4013 } |
| 4014 | |
| 304 | 4015 void Assembler::fldz() { |
|
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changeset
|
4016 emit_int8((unsigned char)0xD9); |
|
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changeset
|
4017 emit_int8((unsigned char)0xEE); |
| 304 | 4018 } |
| 0 | 4019 |
| 4020 void Assembler::flog() { | |
| 4021 fldln2(); | |
| 4022 fxch(); | |
| 4023 fyl2x(); | |
| 4024 } | |
| 4025 | |
| 4026 void Assembler::flog10() { | |
| 4027 fldlg2(); | |
| 4028 fxch(); | |
| 4029 fyl2x(); | |
| 4030 } | |
| 4031 | |
| 304 | 4032 void Assembler::fmul(int i) { |
| 4033 emit_farith(0xD8, 0xC8, i); | |
| 4034 } | |
| 4035 | |
| 4036 void Assembler::fmul_d(Address src) { | |
| 4037 InstructionMark im(this); | |
|
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changeset
|
4038 emit_int8((unsigned char)0xDC); |
| 304 | 4039 emit_operand32(rcx, src); |
| 4040 } | |
| 4041 | |
| 4042 void Assembler::fmul_s(Address src) { | |
| 4043 InstructionMark im(this); | |
|
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changeset
|
4044 emit_int8((unsigned char)0xD8); |
| 304 | 4045 emit_operand32(rcx, src); |
| 4046 } | |
| 4047 | |
| 4048 void Assembler::fmula(int i) { | |
| 4049 emit_farith(0xDC, 0xC8, i); | |
| 4050 } | |
| 4051 | |
| 4052 void Assembler::fmulp(int i) { | |
| 4053 emit_farith(0xDE, 0xC8, i); | |
| 4054 } | |
| 4055 | |
| 4056 void Assembler::fnsave(Address dst) { | |
| 4057 InstructionMark im(this); | |
|
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changeset
|
4058 emit_int8((unsigned char)0xDD); |
| 304 | 4059 emit_operand32(rsi, dst); |
| 4060 } | |
| 4061 | |
| 4062 void Assembler::fnstcw(Address src) { | |
| 4063 InstructionMark im(this); | |
|
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changeset
|
4064 emit_int8((unsigned char)0x9B); |
|
d02120b7a34f
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changeset
|
4065 emit_int8((unsigned char)0xD9); |
| 304 | 4066 emit_operand32(rdi, src); |
| 4067 } | |
| 4068 | |
| 4069 void Assembler::fnstsw_ax() { | |
|
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changeset
|
4070 emit_int8((unsigned char)0xDF); |
|
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changeset
|
4071 emit_int8((unsigned char)0xE0); |
| 304 | 4072 } |
| 4073 | |
| 4074 void Assembler::fprem() { | |
|
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changeset
|
4075 emit_int8((unsigned char)0xD9); |
|
d02120b7a34f
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changeset
|
4076 emit_int8((unsigned char)0xF8); |
| 304 | 4077 } |
| 4078 | |
| 4079 void Assembler::fprem1() { | |
|
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changeset
|
4080 emit_int8((unsigned char)0xD9); |
|
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changeset
|
4081 emit_int8((unsigned char)0xF5); |
| 304 | 4082 } |
| 4083 | |
| 4084 void Assembler::frstor(Address src) { | |
| 4085 InstructionMark im(this); | |
|
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changeset
|
4086 emit_int8((unsigned char)0xDD); |
| 304 | 4087 emit_operand32(rsp, src); |
| 4088 } | |
| 0 | 4089 |
| 4090 void Assembler::fsin() { | |
|
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changeset
|
4091 emit_int8((unsigned char)0xD9); |
|
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changeset
|
4092 emit_int8((unsigned char)0xFE); |
| 0 | 4093 } |
| 4094 | |
| 304 | 4095 void Assembler::fsqrt() { |
|
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changeset
|
4096 emit_int8((unsigned char)0xD9); |
|
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changeset
|
4097 emit_int8((unsigned char)0xFA); |
| 304 | 4098 } |
| 4099 | |
| 4100 void Assembler::fst_d(Address adr) { | |
| 4101 InstructionMark im(this); | |
|
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changeset
|
4102 emit_int8((unsigned char)0xDD); |
| 304 | 4103 emit_operand32(rdx, adr); |
| 4104 } | |
| 4105 | |
| 4106 void Assembler::fst_s(Address adr) { | |
| 4107 InstructionMark im(this); | |
|
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changeset
|
4108 emit_int8((unsigned char)0xD9); |
| 304 | 4109 emit_operand32(rdx, adr); |
| 4110 } | |
| 4111 | |
| 4112 void Assembler::fstp_d(Address adr) { | |
| 4113 InstructionMark im(this); | |
|
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changeset
|
4114 emit_int8((unsigned char)0xDD); |
| 304 | 4115 emit_operand32(rbx, adr); |
| 4116 } | |
| 4117 | |
| 4118 void Assembler::fstp_d(int index) { | |
| 4119 emit_farith(0xDD, 0xD8, index); | |
| 4120 } | |
| 4121 | |
| 4122 void Assembler::fstp_s(Address adr) { | |
| 4123 InstructionMark im(this); | |
|
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changeset
|
4124 emit_int8((unsigned char)0xD9); |
| 304 | 4125 emit_operand32(rbx, adr); |
| 4126 } | |
| 4127 | |
| 4128 void Assembler::fstp_x(Address adr) { | |
| 4129 InstructionMark im(this); | |
|
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changeset
|
4130 emit_int8((unsigned char)0xDB); |
| 304 | 4131 emit_operand32(rdi, adr); |
| 4132 } | |
| 4133 | |
| 4134 void Assembler::fsub(int i) { | |
| 4135 emit_farith(0xD8, 0xE0, i); | |
| 4136 } | |
| 4137 | |
| 4138 void Assembler::fsub_d(Address src) { | |
| 4139 InstructionMark im(this); | |
|
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changeset
|
4140 emit_int8((unsigned char)0xDC); |
| 304 | 4141 emit_operand32(rsp, src); |
| 4142 } | |
| 4143 | |
| 4144 void Assembler::fsub_s(Address src) { | |
| 4145 InstructionMark im(this); | |
|
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changeset
|
4146 emit_int8((unsigned char)0xD8); |
| 304 | 4147 emit_operand32(rsp, src); |
| 4148 } | |
| 4149 | |
| 4150 void Assembler::fsuba(int i) { | |
| 4151 emit_farith(0xDC, 0xE8, i); | |
| 4152 } | |
| 4153 | |
| 4154 void Assembler::fsubp(int i) { | |
| 4155 emit_farith(0xDE, 0xE8, i); // ST(0) <- ST(0) - ST(1) and pop (Intel manual wrong) | |
| 4156 } | |
| 4157 | |
| 4158 void Assembler::fsubr(int i) { | |
| 4159 emit_farith(0xD8, 0xE8, i); | |
| 4160 } | |
| 4161 | |
| 4162 void Assembler::fsubr_d(Address src) { | |
| 4163 InstructionMark im(this); | |
|
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|
4164 emit_int8((unsigned char)0xDC); |
| 304 | 4165 emit_operand32(rbp, src); |
| 4166 } | |
| 4167 | |
| 4168 void Assembler::fsubr_s(Address src) { | |
| 4169 InstructionMark im(this); | |
|
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|
4170 emit_int8((unsigned char)0xD8); |
| 304 | 4171 emit_operand32(rbp, src); |
| 4172 } | |
| 4173 | |
| 4174 void Assembler::fsubra(int i) { | |
| 4175 emit_farith(0xDC, 0xE0, i); | |
| 4176 } | |
| 4177 | |
| 4178 void Assembler::fsubrp(int i) { | |
| 4179 emit_farith(0xDE, 0xE0, i); // ST(0) <- ST(1) - ST(0) and pop (Intel manual wrong) | |
| 0 | 4180 } |
| 4181 | |
| 4182 void Assembler::ftan() { | |
|
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|
4183 emit_int8((unsigned char)0xD9); |
|
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|
4184 emit_int8((unsigned char)0xF2); |
|
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|
4185 emit_int8((unsigned char)0xDD); |
|
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|
4186 emit_int8((unsigned char)0xD8); |
| 0 | 4187 } |
| 4188 | |
| 304 | 4189 void Assembler::ftst() { |
|
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|
4190 emit_int8((unsigned char)0xD9); |
|
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|
4191 emit_int8((unsigned char)0xE4); |
| 304 | 4192 } |
| 0 | 4193 |
| 4194 void Assembler::fucomi(int i) { | |
| 4195 // make sure the instruction is supported (introduced for P6, together with cmov) | |
| 4196 guarantee(VM_Version::supports_cmov(), "illegal instruction"); | |
| 4197 emit_farith(0xDB, 0xE8, i); | |
| 4198 } | |
| 4199 | |
| 4200 void Assembler::fucomip(int i) { | |
| 4201 // make sure the instruction is supported (introduced for P6, together with cmov) | |
| 4202 guarantee(VM_Version::supports_cmov(), "illegal instruction"); | |
| 4203 emit_farith(0xDF, 0xE8, i); | |
| 4204 } | |
| 4205 | |
| 4206 void Assembler::fwait() { | |
|
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|
4207 emit_int8((unsigned char)0x9B); |
| 0 | 4208 } |
| 4209 | |
| 304 | 4210 void Assembler::fxch(int i) { |
| 4211 emit_farith(0xD9, 0xC8, i); | |
| 4212 } | |
| 4213 | |
| 4214 void Assembler::fyl2x() { | |
|
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|
4215 emit_int8((unsigned char)0xD9); |
|
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|
4216 emit_int8((unsigned char)0xF1); |
| 304 | 4217 } |
| 4218 | |
|
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|
4219 void Assembler::frndint() { |
|
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|
4220 emit_int8((unsigned char)0xD9); |
|
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|
4221 emit_int8((unsigned char)0xFC); |
|
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|
4222 } |
|
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|
4223 |
|
6759698e3140
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|
4224 void Assembler::f2xm1() { |
|
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|
4225 emit_int8((unsigned char)0xD9); |
|
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changeset
|
4226 emit_int8((unsigned char)0xF0); |
|
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|
4227 } |
|
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|
4228 |
|
6759698e3140
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changeset
|
4229 void Assembler::fldl2e() { |
|
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changeset
|
4230 emit_int8((unsigned char)0xD9); |
|
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changeset
|
4231 emit_int8((unsigned char)0xEA); |
|
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|
4232 } |
|
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|
4233 |
| 4759 | 4234 // SSE SIMD prefix byte values corresponding to VexSimdPrefix encoding. |
| 4235 static int simd_pre[4] = { 0, 0x66, 0xF3, 0xF2 }; | |
| 4236 // SSE opcode second byte values (first is 0x0F) corresponding to VexOpcode encoding. | |
| 4237 static int simd_opc[4] = { 0, 0, 0x38, 0x3A }; | |
| 4238 | |
| 4239 // Generate SSE legacy REX prefix and SIMD opcode based on VEX encoding. | |
| 4240 void Assembler::rex_prefix(Address adr, XMMRegister xreg, VexSimdPrefix pre, VexOpcode opc, bool rex_w) { | |
| 4241 if (pre > 0) { | |
|
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|
4242 emit_int8(simd_pre[pre]); |
| 4759 | 4243 } |
| 4244 if (rex_w) { | |
| 4245 prefixq(adr, xreg); | |
| 4246 } else { | |
| 4247 prefix(adr, xreg); | |
| 4248 } | |
| 4249 if (opc > 0) { | |
|
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|
4250 emit_int8(0x0F); |
| 4759 | 4251 int opc2 = simd_opc[opc]; |
| 4252 if (opc2 > 0) { | |
|
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changeset
|
4253 emit_int8(opc2); |
| 4759 | 4254 } |
| 4255 } | |
| 4256 } | |
| 4257 | |
| 4258 int Assembler::rex_prefix_and_encode(int dst_enc, int src_enc, VexSimdPrefix pre, VexOpcode opc, bool rex_w) { | |
| 4259 if (pre > 0) { | |
|
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changeset
|
4260 emit_int8(simd_pre[pre]); |
| 4759 | 4261 } |
| 4262 int encode = (rex_w) ? prefixq_and_encode(dst_enc, src_enc) : | |
| 4263 prefix_and_encode(dst_enc, src_enc); | |
| 4264 if (opc > 0) { | |
|
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|
4265 emit_int8(0x0F); |
| 4759 | 4266 int opc2 = simd_opc[opc]; |
| 4267 if (opc2 > 0) { | |
|
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|
4268 emit_int8(opc2); |
| 4759 | 4269 } |
| 4270 } | |
| 4271 return encode; | |
| 4272 } | |
| 4273 | |
| 4274 | |
| 4275 void Assembler::vex_prefix(bool vex_r, bool vex_b, bool vex_x, bool vex_w, int nds_enc, VexSimdPrefix pre, VexOpcode opc, bool vector256) { | |
| 4276 if (vex_b || vex_x || vex_w || (opc == VEX_OPCODE_0F_38) || (opc == VEX_OPCODE_0F_3A)) { | |
| 4277 prefix(VEX_3bytes); | |
| 4278 | |
| 4279 int byte1 = (vex_r ? VEX_R : 0) | (vex_x ? VEX_X : 0) | (vex_b ? VEX_B : 0); | |
| 4280 byte1 = (~byte1) & 0xE0; | |
| 4281 byte1 |= opc; | |
|
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changeset
|
4282 emit_int8(byte1); |
| 4759 | 4283 |
| 4284 int byte2 = ((~nds_enc) & 0xf) << 3; | |
| 4285 byte2 |= (vex_w ? VEX_W : 0) | (vector256 ? 4 : 0) | pre; | |
|
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changeset
|
4286 emit_int8(byte2); |
| 4759 | 4287 } else { |
| 4288 prefix(VEX_2bytes); | |
| 4289 | |
| 4290 int byte1 = vex_r ? VEX_R : 0; | |
| 4291 byte1 = (~byte1) & 0x80; | |
| 4292 byte1 |= ((~nds_enc) & 0xf) << 3; | |
| 4293 byte1 |= (vector256 ? 4 : 0) | pre; | |
|
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changeset
|
4294 emit_int8(byte1); |
| 4759 | 4295 } |
| 4296 } | |
| 4297 | |
| 4298 void Assembler::vex_prefix(Address adr, int nds_enc, int xreg_enc, VexSimdPrefix pre, VexOpcode opc, bool vex_w, bool vector256){ | |
| 4299 bool vex_r = (xreg_enc >= 8); | |
| 4300 bool vex_b = adr.base_needs_rex(); | |
| 4301 bool vex_x = adr.index_needs_rex(); | |
| 4302 vex_prefix(vex_r, vex_b, vex_x, vex_w, nds_enc, pre, opc, vector256); | |
| 4303 } | |
| 4304 | |
| 4305 int Assembler::vex_prefix_and_encode(int dst_enc, int nds_enc, int src_enc, VexSimdPrefix pre, VexOpcode opc, bool vex_w, bool vector256) { | |
| 4306 bool vex_r = (dst_enc >= 8); | |
| 4307 bool vex_b = (src_enc >= 8); | |
| 4308 bool vex_x = false; | |
| 4309 vex_prefix(vex_r, vex_b, vex_x, vex_w, nds_enc, pre, opc, vector256); | |
| 4310 return (((dst_enc & 7) << 3) | (src_enc & 7)); | |
| 4311 } | |
| 4312 | |
| 4313 | |
| 4314 void Assembler::simd_prefix(XMMRegister xreg, XMMRegister nds, Address adr, VexSimdPrefix pre, VexOpcode opc, bool rex_w, bool vector256) { | |
| 4315 if (UseAVX > 0) { | |
| 4316 int xreg_enc = xreg->encoding(); | |
| 4317 int nds_enc = nds->is_valid() ? nds->encoding() : 0; | |
| 4318 vex_prefix(adr, nds_enc, xreg_enc, pre, opc, rex_w, vector256); | |
| 4319 } else { | |
| 4320 assert((nds == xreg) || (nds == xnoreg), "wrong sse encoding"); | |
| 4321 rex_prefix(adr, xreg, pre, opc, rex_w); | |
| 4322 } | |
| 4323 } | |
| 4324 | |
| 4325 int Assembler::simd_prefix_and_encode(XMMRegister dst, XMMRegister nds, XMMRegister src, VexSimdPrefix pre, VexOpcode opc, bool rex_w, bool vector256) { | |
| 4326 int dst_enc = dst->encoding(); | |
| 4327 int src_enc = src->encoding(); | |
| 4328 if (UseAVX > 0) { | |
| 4329 int nds_enc = nds->is_valid() ? nds->encoding() : 0; | |
| 4330 return vex_prefix_and_encode(dst_enc, nds_enc, src_enc, pre, opc, rex_w, vector256); | |
| 4331 } else { | |
| 4332 assert((nds == dst) || (nds == src) || (nds == xnoreg), "wrong sse encoding"); | |
| 4333 return rex_prefix_and_encode(dst_enc, src_enc, pre, opc, rex_w); | |
| 4334 } | |
| 4335 } | |
| 304 | 4336 |
|
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|
4337 void Assembler::emit_simd_arith(int opcode, XMMRegister dst, Address src, VexSimdPrefix pre) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
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|
4338 InstructionMark im(this); |
|
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changeset
|
4339 simd_prefix(dst, dst, src, pre); |
|
7430
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changeset
|
4340 emit_int8(opcode); |
|
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changeset
|
4341 emit_operand(dst, src); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
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changeset
|
4342 } |
|
006050192a5a
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changeset
|
4343 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
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changeset
|
4344 void Assembler::emit_simd_arith(int opcode, XMMRegister dst, XMMRegister src, VexSimdPrefix pre) { |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
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changeset
|
4345 int encode = simd_prefix_and_encode(dst, dst, src, pre); |
|
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changeset
|
4346 emit_int8(opcode); |
|
d02120b7a34f
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changeset
|
4347 emit_int8((unsigned char)(0xC0 | encode)); |
|
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|
4348 } |
|
006050192a5a
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|
4349 |
|
006050192a5a
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changeset
|
4350 // Versions with no second source register (non-destructive source). |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
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changeset
|
4351 void Assembler::emit_simd_arith_nonds(int opcode, XMMRegister dst, Address src, VexSimdPrefix pre) { |
|
006050192a5a
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|
4352 InstructionMark im(this); |
|
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changeset
|
4353 simd_prefix(dst, xnoreg, src, pre); |
|
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changeset
|
4354 emit_int8(opcode); |
|
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|
4355 emit_operand(dst, src); |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
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changeset
|
4356 } |
|
006050192a5a
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|
4357 |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
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|
4358 void Assembler::emit_simd_arith_nonds(int opcode, XMMRegister dst, XMMRegister src, VexSimdPrefix pre) { |
|
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|
4359 int encode = simd_prefix_and_encode(dst, xnoreg, src, pre); |
|
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changeset
|
4360 emit_int8(opcode); |
|
d02120b7a34f
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|
4361 emit_int8((unsigned char)(0xC0 | encode)); |
|
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|
4362 } |
|
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|
4363 |
|
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changeset
|
4364 // 3-operands AVX instructions |
|
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changeset
|
4365 void Assembler::emit_vex_arith(int opcode, XMMRegister dst, XMMRegister nds, |
|
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|
4366 Address src, VexSimdPrefix pre, bool vector256) { |
|
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changeset
|
4367 InstructionMark im(this); |
|
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changeset
|
4368 vex_prefix(dst, nds, src, pre, vector256); |
|
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|
4369 emit_int8(opcode); |
|
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|
4370 emit_operand(dst, src); |
|
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|
4371 } |
|
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|
4372 |
|
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changeset
|
4373 void Assembler::emit_vex_arith(int opcode, XMMRegister dst, XMMRegister nds, |
|
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changeset
|
4374 XMMRegister src, VexSimdPrefix pre, bool vector256) { |
|
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changeset
|
4375 int encode = vex_prefix_and_encode(dst, nds, src, pre, vector256); |
|
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
4376 emit_int8(opcode); |
|
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
4377 emit_int8((unsigned char)(0xC0 | encode)); |
|
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
4378 } |
|
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
4379 |
| 304 | 4380 #ifndef _LP64 |
| 4381 | |
| 4382 void Assembler::incl(Register dst) { | |
| 4383 // Don't use it directly. Use MacroAssembler::incrementl() instead. | |
|
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
4384 emit_int8(0x40 | dst->encoding()); |
| 304 | 4385 } |
| 4386 | |
| 4387 void Assembler::lea(Register dst, Address src) { | |
| 4388 leal(dst, src); | |
| 4389 } | |
| 4390 | |
| 4391 void Assembler::mov_literal32(Address dst, int32_t imm32, RelocationHolder const& rspec) { | |
| 4392 InstructionMark im(this); | |
|
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
4393 emit_int8((unsigned char)0xC7); |
| 304 | 4394 emit_operand(rax, dst); |
| 4395 emit_data((int)imm32, rspec, 0); | |
| 4396 } | |
| 4397 | |
|
642
660978a2a31a
6791178: Specialize for zero as the compressed oop vm heap base
kvn
parents:
624
diff
changeset
|
4398 void Assembler::mov_literal32(Register dst, int32_t imm32, RelocationHolder const& rspec) { |
|
660978a2a31a
6791178: Specialize for zero as the compressed oop vm heap base
kvn
parents:
624
diff
changeset
|
4399 InstructionMark im(this); |
|
660978a2a31a
6791178: Specialize for zero as the compressed oop vm heap base
kvn
parents:
624
diff
changeset
|
4400 int encode = prefix_and_encode(dst->encoding()); |
|
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
4401 emit_int8((unsigned char)(0xB8 | encode)); |
|
642
660978a2a31a
6791178: Specialize for zero as the compressed oop vm heap base
kvn
parents:
624
diff
changeset
|
4402 emit_data((int)imm32, rspec, 0); |
|
660978a2a31a
6791178: Specialize for zero as the compressed oop vm heap base
kvn
parents:
624
diff
changeset
|
4403 } |
| 304 | 4404 |
| 4405 void Assembler::popa() { // 32bit | |
|
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
4406 emit_int8(0x61); |
| 304 | 4407 } |
| 4408 | |
| 4409 void Assembler::push_literal32(int32_t imm32, RelocationHolder const& rspec) { | |
| 4410 InstructionMark im(this); | |
|
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
4411 emit_int8(0x68); |
| 304 | 4412 emit_data(imm32, rspec, 0); |
| 4413 } | |
| 4414 | |
| 4415 void Assembler::pusha() { // 32bit | |
|
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
4416 emit_int8(0x60); |
| 304 | 4417 } |
| 4418 | |
| 4419 void Assembler::set_byte_if_not_zero(Register dst) { | |
|
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
4420 emit_int8(0x0F); |
|
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
4421 emit_int8((unsigned char)0x95); |
|
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
4422 emit_int8((unsigned char)(0xE0 | dst->encoding())); |
| 304 | 4423 } |
| 4424 | |
| 4425 void Assembler::shldl(Register dst, Register src) { | |
|
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
4426 emit_int8(0x0F); |
|
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
4427 emit_int8((unsigned char)0xA5); |
|
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
4428 emit_int8((unsigned char)(0xC0 | src->encoding() << 3 | dst->encoding())); |
| 304 | 4429 } |
| 4430 | |
| 4431 void Assembler::shrdl(Register dst, Register src) { | |
|
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
4432 emit_int8(0x0F); |
|
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
4433 emit_int8((unsigned char)0xAD); |
|
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
4434 emit_int8((unsigned char)(0xC0 | src->encoding() << 3 | dst->encoding())); |
| 304 | 4435 } |
| 4436 | |
| 4437 #else // LP64 | |
| 4438 | |
| 1369 | 4439 void Assembler::set_byte_if_not_zero(Register dst) { |
| 4440 int enc = prefix_and_encode(dst->encoding(), true); | |
|
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
4441 emit_int8(0x0F); |
|
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
4442 emit_int8((unsigned char)0x95); |
|
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
4443 emit_int8((unsigned char)(0xE0 | enc)); |
| 1369 | 4444 } |
| 4445 | |
| 304 | 4446 // 64bit only pieces of the assembler |
| 4447 // This should only be used by 64bit instructions that can use rip-relative | |
| 4448 // it cannot be used by instructions that want an immediate value. | |
| 4449 | |
| 4450 bool Assembler::reachable(AddressLiteral adr) { | |
| 4451 int64_t disp; | |
| 4452 // None will force a 64bit literal to the code stream. Likely a placeholder | |
| 4453 // for something that will be patched later and we need to certain it will | |
| 4454 // always be reachable. | |
| 4455 if (adr.reloc() == relocInfo::none) { | |
| 4456 return false; | |
| 4457 } | |
| 4458 if (adr.reloc() == relocInfo::internal_word_type) { | |
| 4459 // This should be rip relative and easily reachable. | |
| 4460 return true; | |
| 4461 } | |
| 4462 if (adr.reloc() == relocInfo::virtual_call_type || | |
| 4463 adr.reloc() == relocInfo::opt_virtual_call_type || | |
| 4464 adr.reloc() == relocInfo::static_call_type || | |
| 4465 adr.reloc() == relocInfo::static_stub_type ) { | |
| 4466 // This should be rip relative within the code cache and easily | |
| 4467 // reachable until we get huge code caches. (At which point | |
| 4468 // ic code is going to have issues). | |
| 4469 return true; | |
| 4470 } | |
| 4471 if (adr.reloc() != relocInfo::external_word_type && | |
| 4472 adr.reloc() != relocInfo::poll_return_type && // these are really external_word but need special | |
| 4473 adr.reloc() != relocInfo::poll_type && // relocs to identify them | |
| 4474 adr.reloc() != relocInfo::runtime_call_type ) { | |
| 4475 return false; | |
| 4476 } | |
| 4477 | |
| 4478 // Stress the correction code | |
| 4479 if (ForceUnreachable) { | |
| 4480 // Must be runtimecall reloc, see if it is in the codecache | |
| 4481 // Flipping stuff in the codecache to be unreachable causes issues | |
| 4482 // with things like inline caches where the additional instructions | |
| 4483 // are not handled. | |
| 4484 if (CodeCache::find_blob(adr._target) == NULL) { | |
| 4485 return false; | |
| 4486 } | |
| 4487 } | |
| 4488 // For external_word_type/runtime_call_type if it is reachable from where we | |
| 4489 // are now (possibly a temp buffer) and where we might end up | |
| 4490 // anywhere in the codeCache then we are always reachable. | |
| 4491 // This would have to change if we ever save/restore shared code | |
| 4492 // to be more pessimistic. | |
| 4493 disp = (int64_t)adr._target - ((int64_t)CodeCache::low_bound() + sizeof(int)); | |
| 4494 if (!is_simm32(disp)) return false; | |
| 4495 disp = (int64_t)adr._target - ((int64_t)CodeCache::high_bound() + sizeof(int)); | |
| 4496 if (!is_simm32(disp)) return false; | |
| 4497 | |
|
7198
6ab62ad83507
8003195: AbstractAssembler should not store code pointers but use the CodeSection directly
twisti
parents:
6894
diff
changeset
|
4498 disp = (int64_t)adr._target - ((int64_t)pc() + sizeof(int)); |
| 304 | 4499 |
| 4500 // Because rip relative is a disp + address_of_next_instruction and we | |
| 4501 // don't know the value of address_of_next_instruction we apply a fudge factor | |
| 4502 // to make sure we will be ok no matter the size of the instruction we get placed into. | |
| 4503 // We don't have to fudge the checks above here because they are already worst case. | |
| 4504 | |
| 4505 // 12 == override/rex byte, opcode byte, rm byte, sib byte, a 4-byte disp , 4-byte literal | |
| 4506 // + 4 because better safe than sorry. | |
| 4507 const int fudge = 12 + 4; | |
| 4508 if (disp < 0) { | |
| 4509 disp -= fudge; | |
| 4510 } else { | |
| 4511 disp += fudge; | |
| 4512 } | |
| 4513 return is_simm32(disp); | |
| 4514 } | |
| 4515 | |
|
2404
b40d4fa697bf
6964776: c2 should ensure the polling page is reachable on 64 bit
iveresov
parents:
2357
diff
changeset
|
4516 // Check if the polling page is not reachable from the code cache using rip-relative |
|
b40d4fa697bf
6964776: c2 should ensure the polling page is reachable on 64 bit
iveresov
parents:
2357
diff
changeset
|
4517 // addressing. |
|
b40d4fa697bf
6964776: c2 should ensure the polling page is reachable on 64 bit
iveresov
parents:
2357
diff
changeset
|
4518 bool Assembler::is_polling_page_far() { |
|
b40d4fa697bf
6964776: c2 should ensure the polling page is reachable on 64 bit
iveresov
parents:
2357
diff
changeset
|
4519 intptr_t addr = (intptr_t)os::get_polling_page(); |
|
4118
59bc0d4d9ea3
7110489: C1: 64-bit tiered with ForceUnreachable: assert(reachable(src)) failed: Address should be reachable
never
parents:
3938
diff
changeset
|
4520 return ForceUnreachable || |
|
59bc0d4d9ea3
7110489: C1: 64-bit tiered with ForceUnreachable: assert(reachable(src)) failed: Address should be reachable
never
parents:
3938
diff
changeset
|
4521 !is_simm32(addr - (intptr_t)CodeCache::low_bound()) || |
|
2404
b40d4fa697bf
6964776: c2 should ensure the polling page is reachable on 64 bit
iveresov
parents:
2357
diff
changeset
|
4522 !is_simm32(addr - (intptr_t)CodeCache::high_bound()); |
|
b40d4fa697bf
6964776: c2 should ensure the polling page is reachable on 64 bit
iveresov
parents:
2357
diff
changeset
|
4523 } |
|
b40d4fa697bf
6964776: c2 should ensure the polling page is reachable on 64 bit
iveresov
parents:
2357
diff
changeset
|
4524 |
| 304 | 4525 void Assembler::emit_data64(jlong data, |
| 4526 relocInfo::relocType rtype, | |
| 4527 int format) { | |
| 4528 if (rtype == relocInfo::none) { | |
|
7198
6ab62ad83507
8003195: AbstractAssembler should not store code pointers but use the CodeSection directly
twisti
parents:
6894
diff
changeset
|
4529 emit_int64(data); |
| 304 | 4530 } else { |
| 4531 emit_data64(data, Relocation::spec_simple(rtype), format); | |
| 4532 } | |
| 4533 } | |
| 4534 | |
| 4535 void Assembler::emit_data64(jlong data, | |
| 4536 RelocationHolder const& rspec, | |
| 4537 int format) { | |
| 4538 assert(imm_operand == 0, "default format must be immediate in this file"); | |
| 4539 assert(imm_operand == format, "must be immediate"); | |
| 4540 assert(inst_mark() != NULL, "must be inside InstructionMark"); | |
| 4541 // Do not use AbstractAssembler::relocate, which is not intended for | |
| 4542 // embedded words. Instead, relocate to the enclosing instruction. | |
| 4543 code_section()->relocate(inst_mark(), rspec, format); | |
| 4544 #ifdef ASSERT | |
| 4545 check_relocation(rspec, format); | |
| 4546 #endif | |
|
7198
6ab62ad83507
8003195: AbstractAssembler should not store code pointers but use the CodeSection directly
twisti
parents:
6894
diff
changeset
|
4547 emit_int64(data); |
| 304 | 4548 } |
| 4549 | |
| 4550 int Assembler::prefix_and_encode(int reg_enc, bool byteinst) { | |
| 4551 if (reg_enc >= 8) { | |
| 4552 prefix(REX_B); | |
| 4553 reg_enc -= 8; | |
| 4554 } else if (byteinst && reg_enc >= 4) { | |
| 4555 prefix(REX); | |
| 4556 } | |
| 4557 return reg_enc; | |
| 4558 } | |
| 4559 | |
| 4560 int Assembler::prefixq_and_encode(int reg_enc) { | |
| 4561 if (reg_enc < 8) { | |
| 4562 prefix(REX_W); | |
| 4563 } else { | |
| 4564 prefix(REX_WB); | |
| 4565 reg_enc -= 8; | |
| 4566 } | |
| 4567 return reg_enc; | |
| 4568 } | |
| 4569 | |
|
16064
03eda0a202e9
Better fix for prefix byte for AMD64 byte instructions
Christian Wimmer <christian.wimmer@oracle.com>
parents:
16047
diff
changeset
|
4570 int Assembler::prefix_and_encode(int dst_enc, bool dst_is_byte, int src_enc, bool src_is_byte) { |
| 304 | 4571 if (dst_enc < 8) { |
| 4572 if (src_enc >= 8) { | |
| 4573 prefix(REX_B); | |
| 4574 src_enc -= 8; | |
|
16064
03eda0a202e9
Better fix for prefix byte for AMD64 byte instructions
Christian Wimmer <christian.wimmer@oracle.com>
parents:
16047
diff
changeset
|
4575 } else if ((src_is_byte && src_enc >= 4) || (dst_is_byte && dst_enc >= 4)) { |
| 304 | 4576 prefix(REX); |
| 4577 } | |
| 4578 } else { | |
| 4579 if (src_enc < 8) { | |
| 4580 prefix(REX_R); | |
| 4581 } else { | |
| 4582 prefix(REX_RB); | |
| 4583 src_enc -= 8; | |
| 4584 } | |
| 4585 dst_enc -= 8; | |
| 4586 } | |
| 4587 return dst_enc << 3 | src_enc; | |
| 4588 } | |
| 4589 | |
| 4590 int Assembler::prefixq_and_encode(int dst_enc, int src_enc) { | |
| 4591 if (dst_enc < 8) { | |
| 4592 if (src_enc < 8) { | |
| 4593 prefix(REX_W); | |
| 4594 } else { | |
| 4595 prefix(REX_WB); | |
| 4596 src_enc -= 8; | |
| 4597 } | |
| 4598 } else { | |
| 4599 if (src_enc < 8) { | |
| 4600 prefix(REX_WR); | |
| 4601 } else { | |
| 4602 prefix(REX_WRB); | |
| 4603 src_enc -= 8; | |
| 4604 } | |
| 4605 dst_enc -= 8; | |
| 4606 } | |
| 4607 return dst_enc << 3 | src_enc; | |
| 4608 } | |
| 4609 | |
| 4610 void Assembler::prefix(Register reg) { | |
| 4611 if (reg->encoding() >= 8) { | |
| 4612 prefix(REX_B); | |
| 4613 } | |
| 4614 } | |
| 4615 | |
| 4616 void Assembler::prefix(Address adr) { | |
| 4617 if (adr.base_needs_rex()) { | |
| 4618 if (adr.index_needs_rex()) { | |
| 4619 prefix(REX_XB); | |
| 4620 } else { | |
| 4621 prefix(REX_B); | |
| 4622 } | |
| 4623 } else { | |
| 4624 if (adr.index_needs_rex()) { | |
| 4625 prefix(REX_X); | |
| 4626 } | |
| 4627 } | |
| 4628 } | |
| 4629 | |
| 4630 void Assembler::prefixq(Address adr) { | |
| 4631 if (adr.base_needs_rex()) { | |
| 4632 if (adr.index_needs_rex()) { | |
| 4633 prefix(REX_WXB); | |
| 4634 } else { | |
| 4635 prefix(REX_WB); | |
| 4636 } | |
| 4637 } else { | |
| 4638 if (adr.index_needs_rex()) { | |
| 4639 prefix(REX_WX); | |
| 4640 } else { | |
| 4641 prefix(REX_W); | |
| 4642 } | |
| 4643 } | |
| 4644 } | |
| 4645 | |
| 4646 | |
| 4647 void Assembler::prefix(Address adr, Register reg, bool byteinst) { | |
| 4648 if (reg->encoding() < 8) { | |
| 4649 if (adr.base_needs_rex()) { | |
| 4650 if (adr.index_needs_rex()) { | |
| 4651 prefix(REX_XB); | |
| 4652 } else { | |
| 4653 prefix(REX_B); | |
| 4654 } | |
| 4655 } else { | |
| 4656 if (adr.index_needs_rex()) { | |
| 4657 prefix(REX_X); | |
| 3855 | 4658 } else if (byteinst && reg->encoding() >= 4 ) { |
| 304 | 4659 prefix(REX); |
| 4660 } | |
| 4661 } | |
| 4662 } else { | |
| 4663 if (adr.base_needs_rex()) { | |
| 4664 if (adr.index_needs_rex()) { | |
| 4665 prefix(REX_RXB); | |
| 4666 } else { | |
| 4667 prefix(REX_RB); | |
| 4668 } | |
| 4669 } else { | |
| 4670 if (adr.index_needs_rex()) { | |
| 4671 prefix(REX_RX); | |
| 4672 } else { | |
| 4673 prefix(REX_R); | |
| 4674 } | |
| 4675 } | |
| 4676 } | |
| 4677 } | |
| 4678 | |
| 4679 void Assembler::prefixq(Address adr, Register src) { | |
| 4680 if (src->encoding() < 8) { | |
| 4681 if (adr.base_needs_rex()) { | |
| 4682 if (adr.index_needs_rex()) { | |
| 4683 prefix(REX_WXB); | |
| 4684 } else { | |
| 4685 prefix(REX_WB); | |
| 4686 } | |
| 4687 } else { | |
| 4688 if (adr.index_needs_rex()) { | |
| 4689 prefix(REX_WX); | |
| 4690 } else { | |
| 4691 prefix(REX_W); | |
| 4692 } | |
| 4693 } | |
| 4694 } else { | |
| 4695 if (adr.base_needs_rex()) { | |
| 4696 if (adr.index_needs_rex()) { | |
| 4697 prefix(REX_WRXB); | |
| 4698 } else { | |
| 4699 prefix(REX_WRB); | |
| 4700 } | |
| 4701 } else { | |
| 4702 if (adr.index_needs_rex()) { | |
| 4703 prefix(REX_WRX); | |
| 4704 } else { | |
| 4705 prefix(REX_WR); | |
| 4706 } | |
| 4707 } | |
| 4708 } | |
| 4709 } | |
| 4710 | |
| 4711 void Assembler::prefix(Address adr, XMMRegister reg) { | |
| 4712 if (reg->encoding() < 8) { | |
| 4713 if (adr.base_needs_rex()) { | |
| 4714 if (adr.index_needs_rex()) { | |
| 4715 prefix(REX_XB); | |
| 4716 } else { | |
| 4717 prefix(REX_B); | |
| 4718 } | |
| 4719 } else { | |
| 4720 if (adr.index_needs_rex()) { | |
| 4721 prefix(REX_X); | |
| 4722 } | |
| 4723 } | |
| 4724 } else { | |
| 4725 if (adr.base_needs_rex()) { | |
| 4726 if (adr.index_needs_rex()) { | |
| 4727 prefix(REX_RXB); | |
| 4728 } else { | |
| 4729 prefix(REX_RB); | |
| 4730 } | |
| 4731 } else { | |
| 4732 if (adr.index_needs_rex()) { | |
| 4733 prefix(REX_RX); | |
| 4734 } else { | |
| 4735 prefix(REX_R); | |
| 4736 } | |
| 4737 } | |
| 4738 } | |
| 4739 } | |
| 4740 | |
| 4759 | 4741 void Assembler::prefixq(Address adr, XMMRegister src) { |
| 4742 if (src->encoding() < 8) { | |
| 4743 if (adr.base_needs_rex()) { | |
| 4744 if (adr.index_needs_rex()) { | |
| 4745 prefix(REX_WXB); | |
| 4746 } else { | |
| 4747 prefix(REX_WB); | |
| 4748 } | |
| 4749 } else { | |
| 4750 if (adr.index_needs_rex()) { | |
| 4751 prefix(REX_WX); | |
| 4752 } else { | |
| 4753 prefix(REX_W); | |
| 4754 } | |
| 4755 } | |
| 4756 } else { | |
| 4757 if (adr.base_needs_rex()) { | |
| 4758 if (adr.index_needs_rex()) { | |
| 4759 prefix(REX_WRXB); | |
| 4760 } else { | |
| 4761 prefix(REX_WRB); | |
| 4762 } | |
| 4763 } else { | |
| 4764 if (adr.index_needs_rex()) { | |
| 4765 prefix(REX_WRX); | |
| 4766 } else { | |
| 4767 prefix(REX_WR); | |
| 4768 } | |
| 4769 } | |
| 4770 } | |
| 4771 } | |
| 4772 | |
| 304 | 4773 void Assembler::adcq(Register dst, int32_t imm32) { |
| 4774 (void) prefixq_and_encode(dst->encoding()); | |
| 4775 emit_arith(0x81, 0xD0, dst, imm32); | |
| 4776 } | |
| 4777 | |
| 4778 void Assembler::adcq(Register dst, Address src) { | |
| 4779 InstructionMark im(this); | |
| 4780 prefixq(src, dst); | |
|
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diff
changeset
|
4781 emit_int8(0x13); |
| 304 | 4782 emit_operand(dst, src); |
| 4783 } | |
| 4784 | |
| 4785 void Assembler::adcq(Register dst, Register src) { | |
| 12329 | 4786 (void) prefixq_and_encode(dst->encoding(), src->encoding()); |
| 304 | 4787 emit_arith(0x13, 0xC0, dst, src); |
| 4788 } | |
| 4789 | |
| 4790 void Assembler::addq(Address dst, int32_t imm32) { | |
| 4791 InstructionMark im(this); | |
| 4792 prefixq(dst); | |
| 4793 emit_arith_operand(0x81, rax, dst,imm32); | |
| 4794 } | |
| 4795 | |
| 4796 void Assembler::addq(Address dst, Register src) { | |
| 4797 InstructionMark im(this); | |
| 4798 prefixq(dst, src); | |
|
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d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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7427
diff
changeset
|
4799 emit_int8(0x01); |
| 304 | 4800 emit_operand(src, dst); |
| 4801 } | |
| 4802 | |
| 4803 void Assembler::addq(Register dst, int32_t imm32) { | |
| 4804 (void) prefixq_and_encode(dst->encoding()); | |
| 4805 emit_arith(0x81, 0xC0, dst, imm32); | |
| 4806 } | |
| 4807 | |
| 4808 void Assembler::addq(Register dst, Address src) { | |
| 4809 InstructionMark im(this); | |
| 4810 prefixq(src, dst); | |
|
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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diff
changeset
|
4811 emit_int8(0x03); |
| 304 | 4812 emit_operand(dst, src); |
| 4813 } | |
| 4814 | |
| 4815 void Assembler::addq(Register dst, Register src) { | |
| 4816 (void) prefixq_and_encode(dst->encoding(), src->encoding()); | |
| 4817 emit_arith(0x03, 0xC0, dst, src); | |
| 4818 } | |
| 4819 | |
| 3457 | 4820 void Assembler::andq(Address dst, int32_t imm32) { |
| 4821 InstructionMark im(this); | |
| 4822 prefixq(dst); | |
|
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d02120b7a34f
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diff
changeset
|
4823 emit_int8((unsigned char)0x81); |
| 3457 | 4824 emit_operand(rsp, dst, 4); |
|
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ffa87474d7a4
8004537: replace AbstractAssembler emit_long with emit_int32
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7475
diff
changeset
|
4825 emit_int32(imm32); |
| 3457 | 4826 } |
| 4827 | |
| 304 | 4828 void Assembler::andq(Register dst, int32_t imm32) { |
| 4829 (void) prefixq_and_encode(dst->encoding()); | |
| 4830 emit_arith(0x81, 0xE0, dst, imm32); | |
| 4831 } | |
| 4832 | |
| 4833 void Assembler::andq(Register dst, Address src) { | |
| 4834 InstructionMark im(this); | |
| 4835 prefixq(src, dst); | |
|
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d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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diff
changeset
|
4836 emit_int8(0x23); |
| 304 | 4837 emit_operand(dst, src); |
| 4838 } | |
| 4839 | |
| 4840 void Assembler::andq(Register dst, Register src) { | |
| 12329 | 4841 (void) prefixq_and_encode(dst->encoding(), src->encoding()); |
| 304 | 4842 emit_arith(0x23, 0xC0, dst, src); |
| 4843 } | |
| 4844 | |
|
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93c14e5562c4
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changeset
|
4845 void Assembler::bsfq(Register dst, Register src) { |
|
93c14e5562c4
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changeset
|
4846 int encode = prefixq_and_encode(dst->encoding(), src->encoding()); |
|
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changeset
|
4847 emit_int8(0x0F); |
|
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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changeset
|
4848 emit_int8((unsigned char)0xBC); |
|
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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diff
changeset
|
4849 emit_int8((unsigned char)(0xC0 | encode)); |
|
775
93c14e5562c4
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710
diff
changeset
|
4850 } |
|
93c14e5562c4
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diff
changeset
|
4851 |
|
93c14e5562c4
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diff
changeset
|
4852 void Assembler::bsrq(Register dst, Register src) { |
|
93c14e5562c4
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diff
changeset
|
4853 assert(!VM_Version::supports_lzcnt(), "encoding is treated as LZCNT"); |
|
93c14e5562c4
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diff
changeset
|
4854 int encode = prefixq_and_encode(dst->encoding(), src->encoding()); |
|
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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diff
changeset
|
4855 emit_int8(0x0F); |
|
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
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7427
diff
changeset
|
4856 emit_int8((unsigned char)0xBD); |
|
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
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diff
changeset
|
4857 emit_int8((unsigned char)(0xC0 | encode)); |
|
775
93c14e5562c4
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710
diff
changeset
|
4858 } |
|
93c14e5562c4
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twisti
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diff
changeset
|
4859 |
| 304 | 4860 void Assembler::bswapq(Register reg) { |
| 4861 int encode = prefixq_and_encode(reg->encoding()); | |
|
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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diff
changeset
|
4862 emit_int8(0x0F); |
|
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
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7427
diff
changeset
|
4863 emit_int8((unsigned char)(0xC8 | encode)); |
| 304 | 4864 } |
| 4865 | |
| 4866 void Assembler::cdqq() { | |
| 4867 prefix(REX_W); | |
|
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twisti
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diff
changeset
|
4868 emit_int8((unsigned char)0x99); |
| 304 | 4869 } |
| 4870 | |
| 4871 void Assembler::clflush(Address adr) { | |
| 4872 prefix(adr); | |
|
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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diff
changeset
|
4873 emit_int8(0x0F); |
|
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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diff
changeset
|
4874 emit_int8((unsigned char)0xAE); |
| 304 | 4875 emit_operand(rdi, adr); |
| 4876 } | |
| 4877 | |
| 4878 void Assembler::cmovq(Condition cc, Register dst, Register src) { | |
| 4879 int encode = prefixq_and_encode(dst->encoding(), src->encoding()); | |
|
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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diff
changeset
|
4880 emit_int8(0x0F); |
|
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
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diff
changeset
|
4881 emit_int8(0x40 | cc); |
|
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
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7427
diff
changeset
|
4882 emit_int8((unsigned char)(0xC0 | encode)); |
| 304 | 4883 } |
| 4884 | |
| 4885 void Assembler::cmovq(Condition cc, Register dst, Address src) { | |
| 4886 InstructionMark im(this); | |
| 4887 prefixq(src, dst); | |
|
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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7427
diff
changeset
|
4888 emit_int8(0x0F); |
|
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
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7427
diff
changeset
|
4889 emit_int8(0x40 | cc); |
| 304 | 4890 emit_operand(dst, src); |
| 4891 } | |
| 4892 | |
| 4893 void Assembler::cmpq(Address dst, int32_t imm32) { | |
| 4894 InstructionMark im(this); | |
| 4895 prefixq(dst); | |
|
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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7427
diff
changeset
|
4896 emit_int8((unsigned char)0x81); |
| 304 | 4897 emit_operand(rdi, dst, 4); |
|
7476
ffa87474d7a4
8004537: replace AbstractAssembler emit_long with emit_int32
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7475
diff
changeset
|
4898 emit_int32(imm32); |
| 304 | 4899 } |
| 4900 | |
| 4901 void Assembler::cmpq(Register dst, int32_t imm32) { | |
| 4902 (void) prefixq_and_encode(dst->encoding()); | |
| 4903 emit_arith(0x81, 0xF8, dst, imm32); | |
| 4904 } | |
| 4905 | |
| 4906 void Assembler::cmpq(Address dst, Register src) { | |
| 4907 InstructionMark im(this); | |
| 4908 prefixq(dst, src); | |
|
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
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7427
diff
changeset
|
4909 emit_int8(0x3B); |
| 304 | 4910 emit_operand(src, dst); |
| 4911 } | |
| 4912 | |
| 4913 void Assembler::cmpq(Register dst, Register src) { | |
| 4914 (void) prefixq_and_encode(dst->encoding(), src->encoding()); | |
| 4915 emit_arith(0x3B, 0xC0, dst, src); | |
| 4916 } | |
| 4917 | |
| 4918 void Assembler::cmpq(Register dst, Address src) { | |
| 4919 InstructionMark im(this); | |
| 4920 prefixq(src, dst); | |
|
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
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7427
diff
changeset
|
4921 emit_int8(0x3B); |
| 304 | 4922 emit_operand(dst, src); |
| 4923 } | |
| 4924 | |
| 4925 void Assembler::cmpxchgq(Register reg, Address adr) { | |
| 4926 InstructionMark im(this); | |
| 4927 prefixq(adr, reg); | |
|
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
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7427
diff
changeset
|
4928 emit_int8(0x0F); |
|
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
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7427
diff
changeset
|
4929 emit_int8((unsigned char)0xB1); |
| 304 | 4930 emit_operand(reg, adr); |
| 4931 } | |
| 4932 | |
| 4933 void Assembler::cvtsi2sdq(XMMRegister dst, Register src) { | |
| 4934 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
| 4759 | 4935 int encode = simd_prefix_and_encode_q(dst, dst, src, VEX_SIMD_F2); |
|
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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7427
diff
changeset
|
4936 emit_int8(0x2A); |
|
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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diff
changeset
|
4937 emit_int8((unsigned char)(0xC0 | encode)); |
| 304 | 4938 } |
| 4939 | |
| 4759 | 4940 void Assembler::cvtsi2sdq(XMMRegister dst, Address src) { |
| 4941 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
| 4942 InstructionMark im(this); | |
| 4943 simd_prefix_q(dst, dst, src, VEX_SIMD_F2); | |
|
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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7427
diff
changeset
|
4944 emit_int8(0x2A); |
| 4759 | 4945 emit_operand(dst, src); |
| 4946 } | |
| 4947 | |
| 304 | 4948 void Assembler::cvtsi2ssq(XMMRegister dst, Register src) { |
| 4949 NOT_LP64(assert(VM_Version::supports_sse(), "")); | |
| 4759 | 4950 int encode = simd_prefix_and_encode_q(dst, dst, src, VEX_SIMD_F3); |
|
7430
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changeset
|
4951 emit_int8(0x2A); |
|
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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diff
changeset
|
4952 emit_int8((unsigned char)(0xC0 | encode)); |
| 304 | 4953 } |
| 4954 | |
| 4759 | 4955 void Assembler::cvtsi2ssq(XMMRegister dst, Address src) { |
| 4956 NOT_LP64(assert(VM_Version::supports_sse(), "")); | |
| 4957 InstructionMark im(this); | |
| 4958 simd_prefix_q(dst, dst, src, VEX_SIMD_F3); | |
|
7430
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diff
changeset
|
4959 emit_int8(0x2A); |
| 4759 | 4960 emit_operand(dst, src); |
| 4961 } | |
| 4962 | |
| 304 | 4963 void Assembler::cvttsd2siq(Register dst, XMMRegister src) { |
| 4964 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
| 4759 | 4965 int encode = simd_prefix_and_encode_q(dst, src, VEX_SIMD_F2); |
|
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diff
changeset
|
4966 emit_int8(0x2C); |
|
d02120b7a34f
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diff
changeset
|
4967 emit_int8((unsigned char)(0xC0 | encode)); |
| 304 | 4968 } |
| 4969 | |
| 4970 void Assembler::cvttss2siq(Register dst, XMMRegister src) { | |
| 4971 NOT_LP64(assert(VM_Version::supports_sse(), "")); | |
| 4759 | 4972 int encode = simd_prefix_and_encode_q(dst, src, VEX_SIMD_F3); |
|
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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changeset
|
4973 emit_int8(0x2C); |
|
d02120b7a34f
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diff
changeset
|
4974 emit_int8((unsigned char)(0xC0 | encode)); |
| 304 | 4975 } |
| 4976 | |
| 4977 void Assembler::decl(Register dst) { | |
| 4978 // Don't use it directly. Use MacroAssembler::decrementl() instead. | |
| 4979 // Use two-byte form (one-byte form is a REX prefix in 64-bit mode) | |
| 4980 int encode = prefix_and_encode(dst->encoding()); | |
|
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changeset
|
4981 emit_int8((unsigned char)0xFF); |
|
d02120b7a34f
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changeset
|
4982 emit_int8((unsigned char)(0xC8 | encode)); |
| 304 | 4983 } |
| 4984 | |
| 4985 void Assembler::decq(Register dst) { | |
| 4986 // Don't use it directly. Use MacroAssembler::decrementq() instead. | |
| 4987 // Use two-byte form (one-byte from is a REX prefix in 64-bit mode) | |
| 4988 int encode = prefixq_and_encode(dst->encoding()); | |
|
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changeset
|
4989 emit_int8((unsigned char)0xFF); |
|
d02120b7a34f
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changeset
|
4990 emit_int8(0xC8 | encode); |
| 304 | 4991 } |
| 4992 | |
| 4993 void Assembler::decq(Address dst) { | |
| 4994 // Don't use it directly. Use MacroAssembler::decrementq() instead. | |
| 4995 InstructionMark im(this); | |
| 4996 prefixq(dst); | |
|
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changeset
|
4997 emit_int8((unsigned char)0xFF); |
| 304 | 4998 emit_operand(rcx, dst); |
| 4999 } | |
| 5000 | |
| 5001 void Assembler::fxrstor(Address src) { | |
| 5002 prefixq(src); | |
|
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changeset
|
5003 emit_int8(0x0F); |
|
d02120b7a34f
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changeset
|
5004 emit_int8((unsigned char)0xAE); |
| 304 | 5005 emit_operand(as_Register(1), src); |
| 5006 } | |
| 5007 | |
| 5008 void Assembler::fxsave(Address dst) { | |
| 5009 prefixq(dst); | |
|
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changeset
|
5010 emit_int8(0x0F); |
|
d02120b7a34f
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changeset
|
5011 emit_int8((unsigned char)0xAE); |
| 304 | 5012 emit_operand(as_Register(0), dst); |
| 5013 } | |
| 5014 | |
| 5015 void Assembler::idivq(Register src) { | |
| 5016 int encode = prefixq_and_encode(src->encoding()); | |
|
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changeset
|
5017 emit_int8((unsigned char)0xF7); |
|
d02120b7a34f
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changeset
|
5018 emit_int8((unsigned char)(0xF8 | encode)); |
| 304 | 5019 } |
| 5020 | |
| 5021 void Assembler::imulq(Register dst, Register src) { | |
| 5022 int encode = prefixq_and_encode(dst->encoding(), src->encoding()); | |
|
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changeset
|
5023 emit_int8(0x0F); |
|
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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changeset
|
5024 emit_int8((unsigned char)0xAF); |
|
d02120b7a34f
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twisti
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changeset
|
5025 emit_int8((unsigned char)(0xC0 | encode)); |
| 304 | 5026 } |
| 5027 | |
| 5028 void Assembler::imulq(Register dst, Register src, int value) { | |
| 5029 int encode = prefixq_and_encode(dst->encoding(), src->encoding()); | |
| 5030 if (is8bit(value)) { | |
|
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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7427
diff
changeset
|
5031 emit_int8(0x6B); |
|
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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7427
diff
changeset
|
5032 emit_int8((unsigned char)(0xC0 | encode)); |
|
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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7427
diff
changeset
|
5033 emit_int8(value & 0xFF); |
| 304 | 5034 } else { |
|
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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7427
diff
changeset
|
5035 emit_int8(0x69); |
|
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
5036 emit_int8((unsigned char)(0xC0 | encode)); |
|
7476
ffa87474d7a4
8004537: replace AbstractAssembler emit_long with emit_int32
twisti
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7475
diff
changeset
|
5037 emit_int32(value); |
| 304 | 5038 } |
| 5039 } | |
| 5040 | |
|
12972
59e8ad757e19
8026844: Various Math functions needs intrinsification
rbackman
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12329
diff
changeset
|
5041 void Assembler::imulq(Register dst, Address src) { |
|
59e8ad757e19
8026844: Various Math functions needs intrinsification
rbackman
parents:
12329
diff
changeset
|
5042 InstructionMark im(this); |
|
59e8ad757e19
8026844: Various Math functions needs intrinsification
rbackman
parents:
12329
diff
changeset
|
5043 prefixq(src, dst); |
|
59e8ad757e19
8026844: Various Math functions needs intrinsification
rbackman
parents:
12329
diff
changeset
|
5044 emit_int8(0x0F); |
|
59e8ad757e19
8026844: Various Math functions needs intrinsification
rbackman
parents:
12329
diff
changeset
|
5045 emit_int8((unsigned char) 0xAF); |
|
59e8ad757e19
8026844: Various Math functions needs intrinsification
rbackman
parents:
12329
diff
changeset
|
5046 emit_operand(dst, src); |
|
59e8ad757e19
8026844: Various Math functions needs intrinsification
rbackman
parents:
12329
diff
changeset
|
5047 } |
|
59e8ad757e19
8026844: Various Math functions needs intrinsification
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diff
changeset
|
5048 |
| 304 | 5049 void Assembler::incl(Register dst) { |
| 5050 // Don't use it directly. Use MacroAssembler::incrementl() instead. | |
| 5051 // Use two-byte form (one-byte from is a REX prefix in 64-bit mode) | |
| 5052 int encode = prefix_and_encode(dst->encoding()); | |
|
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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7427
diff
changeset
|
5053 emit_int8((unsigned char)0xFF); |
|
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
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diff
changeset
|
5054 emit_int8((unsigned char)(0xC0 | encode)); |
| 304 | 5055 } |
| 5056 | |
| 5057 void Assembler::incq(Register dst) { | |
| 5058 // Don't use it directly. Use MacroAssembler::incrementq() instead. | |
| 5059 // Use two-byte form (one-byte from is a REX prefix in 64-bit mode) | |
| 5060 int encode = prefixq_and_encode(dst->encoding()); | |
|
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7427
diff
changeset
|
5061 emit_int8((unsigned char)0xFF); |
|
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
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7427
diff
changeset
|
5062 emit_int8((unsigned char)(0xC0 | encode)); |
| 304 | 5063 } |
| 5064 | |
| 5065 void Assembler::incq(Address dst) { | |
| 5066 // Don't use it directly. Use MacroAssembler::incrementq() instead. | |
| 5067 InstructionMark im(this); | |
| 5068 prefixq(dst); | |
|
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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diff
changeset
|
5069 emit_int8((unsigned char)0xFF); |
| 304 | 5070 emit_operand(rax, dst); |
| 5071 } | |
| 5072 | |
| 5073 void Assembler::lea(Register dst, Address src) { | |
| 5074 leaq(dst, src); | |
| 5075 } | |
| 5076 | |
| 5077 void Assembler::leaq(Register dst, Address src) { | |
| 5078 InstructionMark im(this); | |
| 5079 prefixq(src, dst); | |
|
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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7427
diff
changeset
|
5080 emit_int8((unsigned char)0x8D); |
| 304 | 5081 emit_operand(dst, src); |
| 5082 } | |
| 5083 | |
| 5084 void Assembler::mov64(Register dst, int64_t imm64) { | |
| 5085 InstructionMark im(this); | |
| 5086 int encode = prefixq_and_encode(dst->encoding()); | |
|
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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parents:
7427
diff
changeset
|
5087 emit_int8((unsigned char)(0xB8 | encode)); |
|
7198
6ab62ad83507
8003195: AbstractAssembler should not store code pointers but use the CodeSection directly
twisti
parents:
6894
diff
changeset
|
5088 emit_int64(imm64); |
| 304 | 5089 } |
| 5090 | |
| 5091 void Assembler::mov_literal64(Register dst, intptr_t imm64, RelocationHolder const& rspec) { | |
| 5092 InstructionMark im(this); | |
| 5093 int encode = prefixq_and_encode(dst->encoding()); | |
|
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
5094 emit_int8(0xB8 | encode); |
| 304 | 5095 emit_data64(imm64, rspec); |
| 5096 } | |
| 5097 | |
|
642
660978a2a31a
6791178: Specialize for zero as the compressed oop vm heap base
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624
diff
changeset
|
5098 void Assembler::mov_narrow_oop(Register dst, int32_t imm32, RelocationHolder const& rspec) { |
|
660978a2a31a
6791178: Specialize for zero as the compressed oop vm heap base
kvn
parents:
624
diff
changeset
|
5099 InstructionMark im(this); |
|
660978a2a31a
6791178: Specialize for zero as the compressed oop vm heap base
kvn
parents:
624
diff
changeset
|
5100 int encode = prefix_and_encode(dst->encoding()); |
|
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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parents:
7427
diff
changeset
|
5101 emit_int8((unsigned char)(0xB8 | encode)); |
|
642
660978a2a31a
6791178: Specialize for zero as the compressed oop vm heap base
kvn
parents:
624
diff
changeset
|
5102 emit_data((int)imm32, rspec, narrow_oop_operand); |
|
660978a2a31a
6791178: Specialize for zero as the compressed oop vm heap base
kvn
parents:
624
diff
changeset
|
5103 } |
|
660978a2a31a
6791178: Specialize for zero as the compressed oop vm heap base
kvn
parents:
624
diff
changeset
|
5104 |
|
660978a2a31a
6791178: Specialize for zero as the compressed oop vm heap base
kvn
parents:
624
diff
changeset
|
5105 void Assembler::mov_narrow_oop(Address dst, int32_t imm32, RelocationHolder const& rspec) { |
|
660978a2a31a
6791178: Specialize for zero as the compressed oop vm heap base
kvn
parents:
624
diff
changeset
|
5106 InstructionMark im(this); |
|
660978a2a31a
6791178: Specialize for zero as the compressed oop vm heap base
kvn
parents:
624
diff
changeset
|
5107 prefix(dst); |
|
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
5108 emit_int8((unsigned char)0xC7); |
|
642
660978a2a31a
6791178: Specialize for zero as the compressed oop vm heap base
kvn
parents:
624
diff
changeset
|
5109 emit_operand(rax, dst, 4); |
|
660978a2a31a
6791178: Specialize for zero as the compressed oop vm heap base
kvn
parents:
624
diff
changeset
|
5110 emit_data((int)imm32, rspec, narrow_oop_operand); |
|
660978a2a31a
6791178: Specialize for zero as the compressed oop vm heap base
kvn
parents:
624
diff
changeset
|
5111 } |
|
660978a2a31a
6791178: Specialize for zero as the compressed oop vm heap base
kvn
parents:
624
diff
changeset
|
5112 |
|
660978a2a31a
6791178: Specialize for zero as the compressed oop vm heap base
kvn
parents:
624
diff
changeset
|
5113 void Assembler::cmp_narrow_oop(Register src1, int32_t imm32, RelocationHolder const& rspec) { |
|
660978a2a31a
6791178: Specialize for zero as the compressed oop vm heap base
kvn
parents:
624
diff
changeset
|
5114 InstructionMark im(this); |
|
660978a2a31a
6791178: Specialize for zero as the compressed oop vm heap base
kvn
parents:
624
diff
changeset
|
5115 int encode = prefix_and_encode(src1->encoding()); |
|
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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7427
diff
changeset
|
5116 emit_int8((unsigned char)0x81); |
|
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
5117 emit_int8((unsigned char)(0xF8 | encode)); |
|
642
660978a2a31a
6791178: Specialize for zero as the compressed oop vm heap base
kvn
parents:
624
diff
changeset
|
5118 emit_data((int)imm32, rspec, narrow_oop_operand); |
|
660978a2a31a
6791178: Specialize for zero as the compressed oop vm heap base
kvn
parents:
624
diff
changeset
|
5119 } |
|
660978a2a31a
6791178: Specialize for zero as the compressed oop vm heap base
kvn
parents:
624
diff
changeset
|
5120 |
|
660978a2a31a
6791178: Specialize for zero as the compressed oop vm heap base
kvn
parents:
624
diff
changeset
|
5121 void Assembler::cmp_narrow_oop(Address src1, int32_t imm32, RelocationHolder const& rspec) { |
|
660978a2a31a
6791178: Specialize for zero as the compressed oop vm heap base
kvn
parents:
624
diff
changeset
|
5122 InstructionMark im(this); |
|
660978a2a31a
6791178: Specialize for zero as the compressed oop vm heap base
kvn
parents:
624
diff
changeset
|
5123 prefix(src1); |
|
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
5124 emit_int8((unsigned char)0x81); |
|
642
660978a2a31a
6791178: Specialize for zero as the compressed oop vm heap base
kvn
parents:
624
diff
changeset
|
5125 emit_operand(rax, src1, 4); |
|
660978a2a31a
6791178: Specialize for zero as the compressed oop vm heap base
kvn
parents:
624
diff
changeset
|
5126 emit_data((int)imm32, rspec, narrow_oop_operand); |
|
660978a2a31a
6791178: Specialize for zero as the compressed oop vm heap base
kvn
parents:
624
diff
changeset
|
5127 } |
|
660978a2a31a
6791178: Specialize for zero as the compressed oop vm heap base
kvn
parents:
624
diff
changeset
|
5128 |
|
775
93c14e5562c4
6823354: Add intrinsics for {Integer,Long}.{numberOfLeadingZeros,numberOfTrailingZeros}()
twisti
parents:
710
diff
changeset
|
5129 void Assembler::lzcntq(Register dst, Register src) { |
|
93c14e5562c4
6823354: Add intrinsics for {Integer,Long}.{numberOfLeadingZeros,numberOfTrailingZeros}()
twisti
parents:
710
diff
changeset
|
5130 assert(VM_Version::supports_lzcnt(), "encoding is treated as BSR"); |
|
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
5131 emit_int8((unsigned char)0xF3); |
|
775
93c14e5562c4
6823354: Add intrinsics for {Integer,Long}.{numberOfLeadingZeros,numberOfTrailingZeros}()
twisti
parents:
710
diff
changeset
|
5132 int encode = prefixq_and_encode(dst->encoding(), src->encoding()); |
|
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
5133 emit_int8(0x0F); |
|
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
5134 emit_int8((unsigned char)0xBD); |
|
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
5135 emit_int8((unsigned char)(0xC0 | encode)); |
|
775
93c14e5562c4
6823354: Add intrinsics for {Integer,Long}.{numberOfLeadingZeros,numberOfTrailingZeros}()
twisti
parents:
710
diff
changeset
|
5136 } |
|
93c14e5562c4
6823354: Add intrinsics for {Integer,Long}.{numberOfLeadingZeros,numberOfTrailingZeros}()
twisti
parents:
710
diff
changeset
|
5137 |
| 304 | 5138 void Assembler::movdq(XMMRegister dst, Register src) { |
| 5139 // table D-1 says MMX/SSE2 | |
| 4759 | 5140 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
| 5141 int encode = simd_prefix_and_encode_q(dst, src, VEX_SIMD_66); | |
|
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
5142 emit_int8(0x6E); |
|
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
5143 emit_int8((unsigned char)(0xC0 | encode)); |
| 304 | 5144 } |
| 5145 | |
| 5146 void Assembler::movdq(Register dst, XMMRegister src) { | |
| 5147 // table D-1 says MMX/SSE2 | |
| 4759 | 5148 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
| 304 | 5149 // swap src/dst to get correct prefix |
| 4759 | 5150 int encode = simd_prefix_and_encode_q(src, dst, VEX_SIMD_66); |
|
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
5151 emit_int8(0x7E); |
|
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
5152 emit_int8((unsigned char)(0xC0 | encode)); |
| 304 | 5153 } |
| 5154 | |
| 5155 void Assembler::movq(Register dst, Register src) { | |
| 5156 int encode = prefixq_and_encode(dst->encoding(), src->encoding()); | |
|
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
5157 emit_int8((unsigned char)0x8B); |
|
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
5158 emit_int8((unsigned char)(0xC0 | encode)); |
| 304 | 5159 } |
| 5160 | |
| 5161 void Assembler::movq(Register dst, Address src) { | |
| 5162 InstructionMark im(this); | |
| 5163 prefixq(src, dst); | |
|
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
5164 emit_int8((unsigned char)0x8B); |
| 304 | 5165 emit_operand(dst, src); |
| 5166 } | |
| 5167 | |
| 5168 void Assembler::movq(Address dst, Register src) { | |
| 5169 InstructionMark im(this); | |
| 5170 prefixq(dst, src); | |
|
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
5171 emit_int8((unsigned char)0x89); |
| 304 | 5172 emit_operand(src, dst); |
| 5173 } | |
| 5174 | |
| 624 | 5175 void Assembler::movsbq(Register dst, Address src) { |
| 5176 InstructionMark im(this); | |
| 5177 prefixq(src, dst); | |
|
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
5178 emit_int8(0x0F); |
|
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
5179 emit_int8((unsigned char)0xBE); |
| 624 | 5180 emit_operand(dst, src); |
| 5181 } | |
| 5182 | |
| 5183 void Assembler::movsbq(Register dst, Register src) { | |
| 5184 int encode = prefixq_and_encode(dst->encoding(), src->encoding()); | |
|
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
5185 emit_int8(0x0F); |
|
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
5186 emit_int8((unsigned char)0xBE); |
|
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
5187 emit_int8((unsigned char)(0xC0 | encode)); |
| 624 | 5188 } |
| 5189 | |
| 304 | 5190 void Assembler::movslq(Register dst, int32_t imm32) { |
| 5191 // dbx shows movslq(rcx, 3) as movq $0x0000000049000000,(%rbx) | |
| 5192 // and movslq(r8, 3); as movl $0x0000000048000000,(%rbx) | |
| 5193 // as a result we shouldn't use until tested at runtime... | |
| 5194 ShouldNotReachHere(); | |
| 5195 InstructionMark im(this); | |
| 5196 int encode = prefixq_and_encode(dst->encoding()); | |
|
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
5197 emit_int8((unsigned char)(0xC7 | encode)); |
|
7476
ffa87474d7a4
8004537: replace AbstractAssembler emit_long with emit_int32
twisti
parents:
7475
diff
changeset
|
5198 emit_int32(imm32); |
| 304 | 5199 } |
| 5200 | |
| 5201 void Assembler::movslq(Address dst, int32_t imm32) { | |
| 5202 assert(is_simm32(imm32), "lost bits"); | |
| 5203 InstructionMark im(this); | |
| 5204 prefixq(dst); | |
|
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
5205 emit_int8((unsigned char)0xC7); |
| 304 | 5206 emit_operand(rax, dst, 4); |
|
7476
ffa87474d7a4
8004537: replace AbstractAssembler emit_long with emit_int32
twisti
parents:
7475
diff
changeset
|
5207 emit_int32(imm32); |
| 304 | 5208 } |
| 5209 | |
| 5210 void Assembler::movslq(Register dst, Address src) { | |
| 5211 InstructionMark im(this); | |
| 5212 prefixq(src, dst); | |
|
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
5213 emit_int8(0x63); |
| 304 | 5214 emit_operand(dst, src); |
| 5215 } | |
| 5216 | |
| 5217 void Assembler::movslq(Register dst, Register src) { | |
| 5218 int encode = prefixq_and_encode(dst->encoding(), src->encoding()); | |
|
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
5219 emit_int8(0x63); |
|
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
5220 emit_int8((unsigned char)(0xC0 | encode)); |
| 304 | 5221 } |
| 5222 | |
| 624 | 5223 void Assembler::movswq(Register dst, Address src) { |
| 5224 InstructionMark im(this); | |
| 5225 prefixq(src, dst); | |
|
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changeset
|
5226 emit_int8(0x0F); |
|
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changeset
|
5227 emit_int8((unsigned char)0xBF); |
| 624 | 5228 emit_operand(dst, src); |
| 5229 } | |
| 5230 | |
| 5231 void Assembler::movswq(Register dst, Register src) { | |
| 5232 int encode = prefixq_and_encode(dst->encoding(), src->encoding()); | |
|
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|
5233 emit_int8((unsigned char)0x0F); |
|
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changeset
|
5234 emit_int8((unsigned char)0xBF); |
|
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|
5235 emit_int8((unsigned char)(0xC0 | encode)); |
| 624 | 5236 } |
| 5237 | |
| 5238 void Assembler::movzbq(Register dst, Address src) { | |
| 5239 InstructionMark im(this); | |
| 5240 prefixq(src, dst); | |
|
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changeset
|
5241 emit_int8((unsigned char)0x0F); |
|
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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changeset
|
5242 emit_int8((unsigned char)0xB6); |
| 624 | 5243 emit_operand(dst, src); |
| 5244 } | |
| 5245 | |
| 5246 void Assembler::movzbq(Register dst, Register src) { | |
| 5247 int encode = prefixq_and_encode(dst->encoding(), src->encoding()); | |
|
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changeset
|
5248 emit_int8(0x0F); |
|
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changeset
|
5249 emit_int8((unsigned char)0xB6); |
|
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changeset
|
5250 emit_int8(0xC0 | encode); |
| 624 | 5251 } |
| 5252 | |
| 5253 void Assembler::movzwq(Register dst, Address src) { | |
| 5254 InstructionMark im(this); | |
| 5255 prefixq(src, dst); | |
|
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changeset
|
5256 emit_int8((unsigned char)0x0F); |
|
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changeset
|
5257 emit_int8((unsigned char)0xB7); |
| 624 | 5258 emit_operand(dst, src); |
| 5259 } | |
| 5260 | |
| 5261 void Assembler::movzwq(Register dst, Register src) { | |
| 5262 int encode = prefixq_and_encode(dst->encoding(), src->encoding()); | |
|
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changeset
|
5263 emit_int8((unsigned char)0x0F); |
|
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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changeset
|
5264 emit_int8((unsigned char)0xB7); |
|
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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changeset
|
5265 emit_int8((unsigned char)(0xC0 | encode)); |
| 624 | 5266 } |
| 5267 | |
| 304 | 5268 void Assembler::negq(Register dst) { |
| 5269 int encode = prefixq_and_encode(dst->encoding()); | |
|
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changeset
|
5270 emit_int8((unsigned char)0xF7); |
|
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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changeset
|
5271 emit_int8((unsigned char)(0xD8 | encode)); |
| 304 | 5272 } |
| 5273 | |
| 5274 void Assembler::notq(Register dst) { | |
| 5275 int encode = prefixq_and_encode(dst->encoding()); | |
|
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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changeset
|
5276 emit_int8((unsigned char)0xF7); |
|
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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changeset
|
5277 emit_int8((unsigned char)(0xD0 | encode)); |
| 304 | 5278 } |
| 5279 | |
| 5280 void Assembler::orq(Address dst, int32_t imm32) { | |
| 5281 InstructionMark im(this); | |
| 5282 prefixq(dst); | |
|
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changeset
|
5283 emit_int8((unsigned char)0x81); |
| 304 | 5284 emit_operand(rcx, dst, 4); |
|
7476
ffa87474d7a4
8004537: replace AbstractAssembler emit_long with emit_int32
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7475
diff
changeset
|
5285 emit_int32(imm32); |
| 304 | 5286 } |
| 5287 | |
| 5288 void Assembler::orq(Register dst, int32_t imm32) { | |
| 5289 (void) prefixq_and_encode(dst->encoding()); | |
| 5290 emit_arith(0x81, 0xC8, dst, imm32); | |
| 5291 } | |
| 5292 | |
| 5293 void Assembler::orq(Register dst, Address src) { | |
| 5294 InstructionMark im(this); | |
| 5295 prefixq(src, dst); | |
|
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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7427
diff
changeset
|
5296 emit_int8(0x0B); |
| 304 | 5297 emit_operand(dst, src); |
| 5298 } | |
| 5299 | |
| 5300 void Assembler::orq(Register dst, Register src) { | |
| 5301 (void) prefixq_and_encode(dst->encoding(), src->encoding()); | |
| 5302 emit_arith(0x0B, 0xC0, dst, src); | |
| 5303 } | |
| 5304 | |
| 5305 void Assembler::popa() { // 64bit | |
| 5306 movq(r15, Address(rsp, 0)); | |
| 5307 movq(r14, Address(rsp, wordSize)); | |
| 5308 movq(r13, Address(rsp, 2 * wordSize)); | |
| 5309 movq(r12, Address(rsp, 3 * wordSize)); | |
| 5310 movq(r11, Address(rsp, 4 * wordSize)); | |
| 5311 movq(r10, Address(rsp, 5 * wordSize)); | |
| 5312 movq(r9, Address(rsp, 6 * wordSize)); | |
| 5313 movq(r8, Address(rsp, 7 * wordSize)); | |
| 5314 movq(rdi, Address(rsp, 8 * wordSize)); | |
| 5315 movq(rsi, Address(rsp, 9 * wordSize)); | |
| 5316 movq(rbp, Address(rsp, 10 * wordSize)); | |
| 5317 // skip rsp | |
| 5318 movq(rbx, Address(rsp, 12 * wordSize)); | |
| 5319 movq(rdx, Address(rsp, 13 * wordSize)); | |
| 5320 movq(rcx, Address(rsp, 14 * wordSize)); | |
| 5321 movq(rax, Address(rsp, 15 * wordSize)); | |
| 5322 | |
| 5323 addq(rsp, 16 * wordSize); | |
| 5324 } | |
| 5325 | |
|
643
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6378821: bitCount() should use POPC on SPARC processors and AMD+10h
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diff
changeset
|
5326 void Assembler::popcntq(Register dst, Address src) { |
|
c771b7f43bbf
6378821: bitCount() should use POPC on SPARC processors and AMD+10h
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642
diff
changeset
|
5327 assert(VM_Version::supports_popcnt(), "must support"); |
|
c771b7f43bbf
6378821: bitCount() should use POPC on SPARC processors and AMD+10h
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diff
changeset
|
5328 InstructionMark im(this); |
|
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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changeset
|
5329 emit_int8((unsigned char)0xF3); |
|
643
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6378821: bitCount() should use POPC on SPARC processors and AMD+10h
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642
diff
changeset
|
5330 prefixq(src, dst); |
|
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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changeset
|
5331 emit_int8((unsigned char)0x0F); |
|
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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7427
diff
changeset
|
5332 emit_int8((unsigned char)0xB8); |
|
643
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6378821: bitCount() should use POPC on SPARC processors and AMD+10h
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642
diff
changeset
|
5333 emit_operand(dst, src); |
|
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6378821: bitCount() should use POPC on SPARC processors and AMD+10h
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642
diff
changeset
|
5334 } |
|
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6378821: bitCount() should use POPC on SPARC processors and AMD+10h
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diff
changeset
|
5335 |
|
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6378821: bitCount() should use POPC on SPARC processors and AMD+10h
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diff
changeset
|
5336 void Assembler::popcntq(Register dst, Register src) { |
|
c771b7f43bbf
6378821: bitCount() should use POPC on SPARC processors and AMD+10h
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642
diff
changeset
|
5337 assert(VM_Version::supports_popcnt(), "must support"); |
|
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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diff
changeset
|
5338 emit_int8((unsigned char)0xF3); |
|
643
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6378821: bitCount() should use POPC on SPARC processors and AMD+10h
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diff
changeset
|
5339 int encode = prefixq_and_encode(dst->encoding(), src->encoding()); |
|
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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7427
diff
changeset
|
5340 emit_int8((unsigned char)0x0F); |
|
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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changeset
|
5341 emit_int8((unsigned char)0xB8); |
|
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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7427
diff
changeset
|
5342 emit_int8((unsigned char)(0xC0 | encode)); |
|
643
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diff
changeset
|
5343 } |
|
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6378821: bitCount() should use POPC on SPARC processors and AMD+10h
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diff
changeset
|
5344 |
| 304 | 5345 void Assembler::popq(Address dst) { |
| 5346 InstructionMark im(this); | |
| 5347 prefixq(dst); | |
|
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d02120b7a34f
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7427
diff
changeset
|
5348 emit_int8((unsigned char)0x8F); |
| 304 | 5349 emit_operand(rax, dst); |
| 5350 } | |
| 5351 | |
| 5352 void Assembler::pusha() { // 64bit | |
| 5353 // we have to store original rsp. ABI says that 128 bytes | |
| 5354 // below rsp are local scratch. | |
| 5355 movq(Address(rsp, -5 * wordSize), rsp); | |
| 5356 | |
| 5357 subq(rsp, 16 * wordSize); | |
| 5358 | |
| 5359 movq(Address(rsp, 15 * wordSize), rax); | |
| 5360 movq(Address(rsp, 14 * wordSize), rcx); | |
| 5361 movq(Address(rsp, 13 * wordSize), rdx); | |
| 5362 movq(Address(rsp, 12 * wordSize), rbx); | |
| 5363 // skip rsp | |
| 5364 movq(Address(rsp, 10 * wordSize), rbp); | |
| 5365 movq(Address(rsp, 9 * wordSize), rsi); | |
| 5366 movq(Address(rsp, 8 * wordSize), rdi); | |
| 5367 movq(Address(rsp, 7 * wordSize), r8); | |
| 5368 movq(Address(rsp, 6 * wordSize), r9); | |
| 5369 movq(Address(rsp, 5 * wordSize), r10); | |
| 5370 movq(Address(rsp, 4 * wordSize), r11); | |
| 5371 movq(Address(rsp, 3 * wordSize), r12); | |
| 5372 movq(Address(rsp, 2 * wordSize), r13); | |
| 5373 movq(Address(rsp, wordSize), r14); | |
| 5374 movq(Address(rsp, 0), r15); | |
| 5375 } | |
| 5376 | |
| 5377 void Assembler::pushq(Address src) { | |
| 5378 InstructionMark im(this); | |
| 5379 prefixq(src); | |
|
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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diff
changeset
|
5380 emit_int8((unsigned char)0xFF); |
| 304 | 5381 emit_operand(rsi, src); |
| 5382 } | |
| 5383 | |
| 5384 void Assembler::rclq(Register dst, int imm8) { | |
| 5385 assert(isShiftCount(imm8 >> 1), "illegal shift count"); | |
| 5386 int encode = prefixq_and_encode(dst->encoding()); | |
| 5387 if (imm8 == 1) { | |
|
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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changeset
|
5388 emit_int8((unsigned char)0xD1); |
|
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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changeset
|
5389 emit_int8((unsigned char)(0xD0 | encode)); |
| 304 | 5390 } else { |
|
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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changeset
|
5391 emit_int8((unsigned char)0xC1); |
|
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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changeset
|
5392 emit_int8((unsigned char)(0xD0 | encode)); |
|
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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changeset
|
5393 emit_int8(imm8); |
| 304 | 5394 } |
| 5395 } | |
| 5396 void Assembler::sarq(Register dst, int imm8) { | |
| 5397 assert(isShiftCount(imm8 >> 1), "illegal shift count"); | |
| 5398 int encode = prefixq_and_encode(dst->encoding()); | |
| 5399 if (imm8 == 1) { | |
|
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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changeset
|
5400 emit_int8((unsigned char)0xD1); |
|
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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changeset
|
5401 emit_int8((unsigned char)(0xF8 | encode)); |
| 304 | 5402 } else { |
|
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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changeset
|
5403 emit_int8((unsigned char)0xC1); |
|
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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changeset
|
5404 emit_int8((unsigned char)(0xF8 | encode)); |
|
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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changeset
|
5405 emit_int8(imm8); |
| 304 | 5406 } |
| 5407 } | |
| 5408 | |
| 5409 void Assembler::sarq(Register dst) { | |
| 5410 int encode = prefixq_and_encode(dst->encoding()); | |
|
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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changeset
|
5411 emit_int8((unsigned char)0xD3); |
|
d02120b7a34f
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changeset
|
5412 emit_int8((unsigned char)(0xF8 | encode)); |
| 304 | 5413 } |
|
2100
b1a2afa37ec4
7003271: Hotspot should track cumulative Java heap bytes allocated on a per-thread basis
phh
parents:
2014
diff
changeset
|
5414 |
| 304 | 5415 void Assembler::sbbq(Address dst, int32_t imm32) { |
| 5416 InstructionMark im(this); | |
| 5417 prefixq(dst); | |
| 5418 emit_arith_operand(0x81, rbx, dst, imm32); | |
| 5419 } | |
| 5420 | |
| 5421 void Assembler::sbbq(Register dst, int32_t imm32) { | |
| 5422 (void) prefixq_and_encode(dst->encoding()); | |
| 5423 emit_arith(0x81, 0xD8, dst, imm32); | |
| 5424 } | |
| 5425 | |
| 5426 void Assembler::sbbq(Register dst, Address src) { | |
| 5427 InstructionMark im(this); | |
| 5428 prefixq(src, dst); | |
|
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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changeset
|
5429 emit_int8(0x1B); |
| 304 | 5430 emit_operand(dst, src); |
| 5431 } | |
| 5432 | |
| 5433 void Assembler::sbbq(Register dst, Register src) { | |
| 5434 (void) prefixq_and_encode(dst->encoding(), src->encoding()); | |
| 5435 emit_arith(0x1B, 0xC0, dst, src); | |
| 5436 } | |
| 5437 | |
| 5438 void Assembler::shlq(Register dst, int imm8) { | |
| 5439 assert(isShiftCount(imm8 >> 1), "illegal shift count"); | |
| 5440 int encode = prefixq_and_encode(dst->encoding()); | |
| 5441 if (imm8 == 1) { | |
|
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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diff
changeset
|
5442 emit_int8((unsigned char)0xD1); |
|
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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changeset
|
5443 emit_int8((unsigned char)(0xE0 | encode)); |
| 304 | 5444 } else { |
|
7430
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changeset
|
5445 emit_int8((unsigned char)0xC1); |
|
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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changeset
|
5446 emit_int8((unsigned char)(0xE0 | encode)); |
|
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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changeset
|
5447 emit_int8(imm8); |
| 304 | 5448 } |
| 5449 } | |
| 5450 | |
| 5451 void Assembler::shlq(Register dst) { | |
| 5452 int encode = prefixq_and_encode(dst->encoding()); | |
|
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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changeset
|
5453 emit_int8((unsigned char)0xD3); |
|
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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changeset
|
5454 emit_int8((unsigned char)(0xE0 | encode)); |
| 304 | 5455 } |
| 5456 | |
| 5457 void Assembler::shrq(Register dst, int imm8) { | |
| 5458 assert(isShiftCount(imm8 >> 1), "illegal shift count"); | |
| 5459 int encode = prefixq_and_encode(dst->encoding()); | |
|
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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diff
changeset
|
5460 emit_int8((unsigned char)0xC1); |
|
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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changeset
|
5461 emit_int8((unsigned char)(0xE8 | encode)); |
|
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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changeset
|
5462 emit_int8(imm8); |
| 304 | 5463 } |
| 5464 | |
| 5465 void Assembler::shrq(Register dst) { | |
| 5466 int encode = prefixq_and_encode(dst->encoding()); | |
|
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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parents:
7427
diff
changeset
|
5467 emit_int8((unsigned char)0xD3); |
|
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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diff
changeset
|
5468 emit_int8(0xE8 | encode); |
| 304 | 5469 } |
| 5470 | |
| 5471 void Assembler::subq(Address dst, int32_t imm32) { | |
| 5472 InstructionMark im(this); | |
| 5473 prefixq(dst); | |
|
2100
b1a2afa37ec4
7003271: Hotspot should track cumulative Java heap bytes allocated on a per-thread basis
phh
parents:
2014
diff
changeset
|
5474 emit_arith_operand(0x81, rbp, dst, imm32); |
| 304 | 5475 } |
| 5476 | |
| 5477 void Assembler::subq(Address dst, Register src) { | |
| 5478 InstructionMark im(this); | |
| 5479 prefixq(dst, src); | |
|
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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diff
changeset
|
5480 emit_int8(0x29); |
| 304 | 5481 emit_operand(src, dst); |
| 5482 } | |
| 5483 | |
|
2100
b1a2afa37ec4
7003271: Hotspot should track cumulative Java heap bytes allocated on a per-thread basis
phh
parents:
2014
diff
changeset
|
5484 void Assembler::subq(Register dst, int32_t imm32) { |
|
b1a2afa37ec4
7003271: Hotspot should track cumulative Java heap bytes allocated on a per-thread basis
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parents:
2014
diff
changeset
|
5485 (void) prefixq_and_encode(dst->encoding()); |
|
b1a2afa37ec4
7003271: Hotspot should track cumulative Java heap bytes allocated on a per-thread basis
phh
parents:
2014
diff
changeset
|
5486 emit_arith(0x81, 0xE8, dst, imm32); |
|
b1a2afa37ec4
7003271: Hotspot should track cumulative Java heap bytes allocated on a per-thread basis
phh
parents:
2014
diff
changeset
|
5487 } |
|
b1a2afa37ec4
7003271: Hotspot should track cumulative Java heap bytes allocated on a per-thread basis
phh
parents:
2014
diff
changeset
|
5488 |
|
4947
fd8114661503
7125136: SIGILL on linux amd64 in gc/ArrayJuggle/Juggle29
kvn
parents:
4770
diff
changeset
|
5489 // Force generation of a 4 byte immediate value even if it fits into 8bit |
|
fd8114661503
7125136: SIGILL on linux amd64 in gc/ArrayJuggle/Juggle29
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diff
changeset
|
5490 void Assembler::subq_imm32(Register dst, int32_t imm32) { |
|
fd8114661503
7125136: SIGILL on linux amd64 in gc/ArrayJuggle/Juggle29
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parents:
4770
diff
changeset
|
5491 (void) prefixq_and_encode(dst->encoding()); |
|
fd8114661503
7125136: SIGILL on linux amd64 in gc/ArrayJuggle/Juggle29
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parents:
4770
diff
changeset
|
5492 emit_arith_imm32(0x81, 0xE8, dst, imm32); |
|
fd8114661503
7125136: SIGILL on linux amd64 in gc/ArrayJuggle/Juggle29
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diff
changeset
|
5493 } |
|
fd8114661503
7125136: SIGILL on linux amd64 in gc/ArrayJuggle/Juggle29
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4770
diff
changeset
|
5494 |
| 304 | 5495 void Assembler::subq(Register dst, Address src) { |
| 5496 InstructionMark im(this); | |
| 5497 prefixq(src, dst); | |
|
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
5498 emit_int8(0x2B); |
| 304 | 5499 emit_operand(dst, src); |
| 5500 } | |
| 5501 | |
| 5502 void Assembler::subq(Register dst, Register src) { | |
| 5503 (void) prefixq_and_encode(dst->encoding(), src->encoding()); | |
| 5504 emit_arith(0x2B, 0xC0, dst, src); | |
| 5505 } | |
| 5506 | |
| 5507 void Assembler::testq(Register dst, int32_t imm32) { | |
| 5508 // not using emit_arith because test | |
| 5509 // doesn't support sign-extension of | |
| 5510 // 8bit operands | |
| 5511 int encode = dst->encoding(); | |
| 5512 if (encode == 0) { | |
| 5513 prefix(REX_W); | |
|
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
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diff
changeset
|
5514 emit_int8((unsigned char)0xA9); |
| 304 | 5515 } else { |
| 5516 encode = prefixq_and_encode(encode); | |
|
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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diff
changeset
|
5517 emit_int8((unsigned char)0xF7); |
|
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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diff
changeset
|
5518 emit_int8((unsigned char)(0xC0 | encode)); |
| 304 | 5519 } |
|
7476
ffa87474d7a4
8004537: replace AbstractAssembler emit_long with emit_int32
twisti
parents:
7475
diff
changeset
|
5520 emit_int32(imm32); |
| 304 | 5521 } |
| 5522 | |
| 5523 void Assembler::testq(Register dst, Register src) { | |
| 5524 (void) prefixq_and_encode(dst->encoding(), src->encoding()); | |
| 5525 emit_arith(0x85, 0xC0, dst, src); | |
| 5526 } | |
| 5527 | |
| 5528 void Assembler::xaddq(Address dst, Register src) { | |
| 5529 InstructionMark im(this); | |
| 5530 prefixq(dst, src); | |
|
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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diff
changeset
|
5531 emit_int8(0x0F); |
|
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
5532 emit_int8((unsigned char)0xC1); |
| 304 | 5533 emit_operand(src, dst); |
| 5534 } | |
| 5535 | |
| 5536 void Assembler::xchgq(Register dst, Address src) { | |
| 5537 InstructionMark im(this); | |
| 5538 prefixq(src, dst); | |
|
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
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diff
changeset
|
5539 emit_int8((unsigned char)0x87); |
| 304 | 5540 emit_operand(dst, src); |
| 5541 } | |
| 5542 | |
| 5543 void Assembler::xchgq(Register dst, Register src) { | |
| 5544 int encode = prefixq_and_encode(dst->encoding(), src->encoding()); | |
|
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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parents:
7427
diff
changeset
|
5545 emit_int8((unsigned char)0x87); |
|
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
5546 emit_int8((unsigned char)(0xc0 | encode)); |
| 304 | 5547 } |
| 5548 | |
| 5549 void Assembler::xorq(Register dst, Register src) { | |
| 5550 (void) prefixq_and_encode(dst->encoding(), src->encoding()); | |
| 5551 emit_arith(0x33, 0xC0, dst, src); | |
| 5552 } | |
| 5553 | |
| 5554 void Assembler::xorq(Register dst, Address src) { | |
| 5555 InstructionMark im(this); | |
| 5556 prefixq(src, dst); | |
|
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
5557 emit_int8(0x33); |
| 304 | 5558 emit_operand(dst, src); |
| 5559 } | |
| 5560 | |
| 5561 #endif // !LP64 |